Static Call Graph for image .\Objects\WL668T_P6A_S47_CSOT6_ICNA3511A_20240202.axf

Function Pointers

• AP_NRESET_IRQn_Handler from drv_gpio.o(i.AP_NRESET_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• DMA_IRQn_Handler from drv_dma.o(i.DMA_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• EXTI_INT0_IRQn_Handler from drv_gpio.o(i.EXTI_INT0_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• EXTI_INT1_IRQn_Handler from drv_gpio.o(i.EXTI_INT1_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• EXTI_INT2_IRQn_Handler from drv_gpio.o(i.EXTI_INT2_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• EXTI_INT3_IRQn_Handler from drv_gpio.o(i.EXTI_INT3_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• EXTI_INT4_IRQn_Handler from drv_gpio.o(i.EXTI_INT4_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• EXTI_INT5_IRQn_Handler from drv_gpio.o(i.EXTI_INT5_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• EXTI_INT6_IRQn_Handler from drv_gpio.o(i.EXTI_INT6_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• EXTI_INT7_IRQn_Handler from drv_gpio.o(i.EXTI_INT7_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• FLSCTRL_IRQn_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
• HardFault_Handler from drv_common.o(i.HardFault_Handler) referenced from startup_armcm0.o(RESET)
• I2C0_IRQn_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
• I2C1_IRQn_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
• I2C2_IRQn_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
• LCDC_IRQn_Handler from hal_internal_vsync.o(i.LCDC_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• MEMC_IRQn_Handler from drv_memc.o(i.MEMC_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• MIPI_RX_IRQn_Handler from drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• MIPI_TX_IRQn_Handler from drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• NMI_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
• OTP_IRQn_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
• PVD_IRQn_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
• PendSV_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
• Reset_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
• SPIM_IRQn_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
• SPIS_IRQn_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
• SVC_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
• SWIRE_IRQn_Handler from drv_swire.o(i.SWIRE_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• SysTick_Handler from drv_common.o(i.SysTick_Handler) referenced from startup_armcm0.o(RESET)
• TIMER0_IRQn_Handler from drv_timer.o(i.TIMER0_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• TIMER1_IRQn_Handler from drv_timer.o(i.TIMER1_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• TIMER2_IRQn_Handler from drv_timer.o(i.TIMER2_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• TIMER3_IRQn_Handler from drv_timer.o(i.TIMER3_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• UART_IRQn_Handler from drv_uart.o(i.UART_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• VIDC_IRQn_Handler from drv_vidc.o(i.VIDC_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• VPRE1_IRQn_Handler from drv_rxbr.o(i.VPRE1_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• VPRE_IRQn_Handler from hal_internal_dcs.o(i.VPRE_IRQn_Handler) referenced from startup_armcm0.o(RESET)
• WDG_IRQn_Handler from startup_armcm0.o(.text) referenced from startup_armcm0.o(RESET)
• __main from entry.o(.ARM.Collect$$$$00000000) referenced from startup_armcm0.o(.text)
• _sputc from printfa.o(i._sputc) referenced from printfa.o(i.__0vsprintf)
• ap_dcs_read from p6a_demo.o(i.ap_dcs_read) referenced from p6a_demo.o(i.app_mipi_rx_init)
• ap_dcs_set_backlight from p6a_demo.o(i.ap_dcs_set_backlight) referenced from p6a_demo.o(.constdata)
• ap_dcs_set_display_off from p6a_demo.o(i.ap_dcs_set_display_off) referenced from p6a_demo.o(.constdata)
• ap_dcs_set_display_on from p6a_demo.o(i.ap_dcs_set_display_on) referenced from p6a_demo.o(.constdata)
• ap_dcs_set_enter_sleep_mode from p6a_demo.o(i.ap_dcs_set_enter_sleep_mode) referenced from p6a_demo.o(.constdata)
• ap_dcs_set_exit_sleep_mode from p6a_demo.o(i.ap_dcs_set_exit_sleep_mode) referenced from p6a_demo.o(.constdata)
• ap_rstn_pull_down_cb from p6a_demo.o(i.ap_rstn_pull_down_cb) referenced from p6a_demo.o(i.ap_dcs_set_enter_sleep_mode)
• ap_rstn_pull_high_cb from p6a_demo.o(i.ap_rstn_pull_high_cb) referenced from p6a_demo.o(i.app_system_suspend)
• app_mipi_rx_start_cb from p6a_demo.o(i.app_mipi_rx_start_cb) referenced from p6a_demo.o(i.app_mipi_rx_init)
• fputc from tau_log.o(i.fputc) referenced from printfa.o(i.__0printf)
• hal_nonshadow_func_update from hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) referenced from hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init)
• hal_tx_frame_rate_adjust from hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) referenced from hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing)
• hal_vsync_func_update from hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) referenced from hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init)
• main from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
• pps_update_handle from p6a_demo.o(i.pps_update_handle) referenced from p6a_demo.o(i.app_mipi_rx_init)
• rxbr_irq1_callback from hal_internal_vsync.o(i.rxbr_irq1_callback) referenced from hal_internal_vsync.o(i.hal_internal_vsync_init_rx)
• soft_gen_te from hal_internal_vsync.o(i.soft_gen_te) referenced from hal_internal_vsync.o(i.hal_internal_vsync_init_rx)
• soft_gen_te_double_buffer from hal_internal_vsync.o(i.soft_gen_te_double_buffer) referenced from hal_internal_vsync.o(i.hal_internal_vsync_init_rx)
• stop_sleep_cb from hal_pwr.o(i.stop_sleep_cb) referenced from hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin)
• svs_sync_handle from hal_internal_svs.o(i.svs_sync_handle) referenced from hal_internal_svs.o(i.svs_wait_fr_stab)
• svs_wait_fr_stab from hal_internal_svs.o(i.svs_wait_fr_stab) referenced from hal_internal_svs.o(i.svs_wait_start)
• svs_wait_start from hal_internal_svs.o(i.svs_wait_start) referenced from hal_internal_svs.o(i.hal_intl_svs_deinit_rx)
• svs_wait_start from hal_internal_svs.o(i.svs_wait_start) referenced from hal_internal_svs.o(i.hal_intl_svs_init_rx)
• vidc_callback from hal_internal_vsync.o(i.vidc_callback) referenced from hal_internal_vsync.o(i.hal_internal_vsync_init_rx)

Global Symbols

__main (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
[Address Reference Count : 1]

• startup_armcm0.o(.text)

_main_stk (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))

_main_scatterload (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))

[Calls]

• >>   __scatterload

__main_after_scatterload (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))

[Called By]

• >>   __scatterload

_main_clock (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))

_main_cpp_init (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))

_main_init (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))

__rt_final_cpp (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))

__rt_final_exit (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))

Reset_Handler (Thumb, 28 bytes, Stack size 0 bytes, startup_armcm0.o(.text))
[Address Reference Count : 1]

• startup_armcm0.o(RESET)

NMI_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))

[Calls]

• >>   NMI_Handler

• >>   NMI_Handler

• startup_armcm0.o(RESET)

SVC_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))

[Calls]

• >>   SVC_Handler

• >>   SVC_Handler

• startup_armcm0.o(RESET)

PendSV_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))

[Calls]

• >>   PendSV_Handler

• >>   PendSV_Handler

• startup_armcm0.o(RESET)

FLSCTRL_IRQn_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))

[Calls]

• >>   FLSCTRL_IRQn_Handler

• >>   FLSCTRL_IRQn_Handler

• startup_armcm0.o(RESET)

WDG_IRQn_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))

[Calls]

• >>   WDG_IRQn_Handler

• >>   WDG_IRQn_Handler

• startup_armcm0.o(RESET)

I2C0_IRQn_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))

[Calls]

• >>   I2C0_IRQn_Handler

• >>   I2C0_IRQn_Handler

• startup_armcm0.o(RESET)

I2C1_IRQn_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))

[Calls]

• >>   I2C1_IRQn_Handler

• >>   I2C1_IRQn_Handler

• startup_armcm0.o(RESET)

SPIS_IRQn_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))

[Calls]

• >>   SPIS_IRQn_Handler

• >>   SPIS_IRQn_Handler

• startup_armcm0.o(RESET)

SPIM_IRQn_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))

[Calls]

• >>   SPIM_IRQn_Handler

• >>   SPIM_IRQn_Handler

• startup_armcm0.o(RESET)

I2C2_IRQn_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))

[Calls]

• >>   I2C2_IRQn_Handler

• >>   I2C2_IRQn_Handler

• startup_armcm0.o(RESET)

OTP_IRQn_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))

[Calls]

• >>   OTP_IRQn_Handler

• >>   OTP_IRQn_Handler

• startup_armcm0.o(RESET)

PVD_IRQn_Handler (Thumb, 2 bytes, Stack size 0 bytes, startup_armcm0.o(.text))

[Calls]

• >>   PVD_IRQn_Handler

• >>   PVD_IRQn_Handler

• startup_armcm0.o(RESET)

__aeabi_uidiv (Thumb, 0 bytes, Stack size 12 bytes, uidiv.o(.text), UNUSED)

__aeabi_uidivmod (Thumb, 44 bytes, Stack size 12 bytes, uidiv.o(.text))

[Stack]

• Max Depth = 12
• Call Chain = __aeabi_uidivmod

• >>   drv_dsi_tx_phy_test_setup
• >>   hal_lcdc_upscaler_config
• >>   hal_dsi_tx_vid_mode_cal_timing
• >>   hal_dsi_tx_timing_info_update
• >>   hal_dsi_tx_init_dpi_timing
• >>   hal_dsi_tx_cmd_mode_cal_timing
• >>   drv_dsi_rx_set_up_phy
• >>   drv_crgu_get_rxbr_clk
• >>   hal_dsi_rx_ctrl_init_vidc
• >>   hal_dsi_rx_ctrl_init_dsi_rx
• >>   hal_swire_init
• >>   hal_dsi_rx_ctrl_init
• >>   svs_wait_fr_stab
• >>   svs_get_rel_intv
• >>   svs_direct_mode_setting
• >>   hal_intl_fb_edge_resize
• >>   hal_intl_fb_check_bandwidth
• >>   ha_intl_fb_check_pu_size
• >>   hal_intl_dcs_rx_receive_pps
• >>   hal_vsync_reset_lcdc_scaler
• >>   drv_timer_set_compare_val
• >>   hal_internal_vsync_set_tear_mode
• >>   __aeabi_idivmod
• >>   drv_uart_set_baud_rate
• >>   _printf_core

__aeabi_idiv (Thumb, 0 bytes, Stack size 16 bytes, idiv.o(.text), UNUSED)

__aeabi_idivmod (Thumb, 40 bytes, Stack size 16 bytes, idiv.o(.text))

[Stack]

• Max Depth = 28
• Call Chain = __aeabi_idivmod ⇒ __aeabi_uidivmod

• >>   __aeabi_uidivmod

• >>   hal_dsi_tx_vid_mode_cal_timing
• >>   hal_dsi_tx_cmd_mode_cal_timing
• >>   ap_dcs_set_backlight
• >>   hal_internal_vsync_set_tear_mode

__aeabi_memcpy (Thumb, 36 bytes, Stack size 0 bytes, memcpya.o(.text))

[Called By]

• >>   hal_intl_fb_cal_fb_info
• >>   tau_log_push_log

__aeabi_memcpy4 (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text))

[Called By]

• >>   hal_dsi_tx_init_dpi_timing
• >>   hal_intl_fb_get_rx_fb_info
• >>   hal_internal_vsync_init_rx
• >>   hal_internal_sync_input_resolution_change
• >>   hal_dsi_rx_ctrl_init_vidc
• >>   hal_intl_dcs_rx_receive_pps
• >>   hal_intl_fb_cal_fb_info
• >>   hal_intl_fb_get_tx_fb_info
• >>   hal_internal_vsync_init_tx

__aeabi_memcpy8 (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)

__aeabi_memset (Thumb, 14 bytes, Stack size 0 bytes, memseta.o(.text))

[Called By]

• >>   hal_intl_dcs_set_auto_hw_filter
• >>   _memset$wrapper
• >>   __aeabi_memclr

__aeabi_memset4 (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

__aeabi_memset8 (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

__aeabi_memclr (Thumb, 4 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

[Calls]

• >>   __aeabi_memset

__aeabi_memclr4 (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text))

[Called By]

• >>   hal_dsi_tx_init_cfg
• >>   hal_dsi_tx_ctrl_deinit
• >>   hal_dsi_tx_ctrl_create_handle
• >>   hal_dsi_rx_ctrl_create_handle
• >>   tau_log_printf
• >>   hal_intl_dcs_rx_receive_pps
• >>   hal_intl_svs_init_rx
• >>   hal_intl_fb_cal_fb_info
• >>   hal_internal_vsync_deinit
• >>   soft_pro_motion_init
• >>   drv_uart_trans_create_handle
• >>   hal_uart_init
• >>   hal_internal_vsync_init_tx

__aeabi_memclr8 (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

_memset$wrapper (Thumb, 18 bytes, Stack size 8 bytes, memseta.o(.text), UNUSED)

[Calls]

• >>   __aeabi_memset

strlen (Thumb, 14 bytes, Stack size 0 bytes, strlen.o(.text))

[Called By]

• >>   tau_log_printf

memcmp (Thumb, 26 bytes, Stack size 12 bytes, memcmp.o(.text))

[Stack]

• Max Depth = 12
• Call Chain = memcmp

• >>   hal_intl_dcs_rx_receive_pps

__aeabi_fadd (Thumb, 162 bytes, Stack size 24 bytes, fadd.o(.text))

[Stack]

• Max Depth = 36
• Call Chain = __aeabi_fadd ⇒ _float_epilogue

• >>   _float_round
• >>   _float_epilogue

• >>   hal_dsi_tx_cmd_mode_cal_timing
• >>   drv_dsi_rx_calc_ipi_tx_delay
• >>   __aeabi_fsub
• >>   __aeabi_frsub

__aeabi_fsub (Thumb, 8 bytes, Stack size 0 bytes, fadd.o(.text))

[Stack]

• Max Depth = 36
• Call Chain = __aeabi_fsub ⇒ __aeabi_fadd ⇒ _float_epilogue

• >>   __aeabi_fadd

• >>   drv_dsi_rx_calc_ipi_tx_delay

__aeabi_frsub (Thumb, 8 bytes, Stack size 0 bytes, fadd.o(.text), UNUSED)

[Calls]

• >>   __aeabi_fadd

__aeabi_fmul (Thumb, 122 bytes, Stack size 16 bytes, fmul.o(.text))

[Stack]

• Max Depth = 16
• Call Chain = __aeabi_fmul

• >>   hal_dsi_tx_vid_mode_cal_timing
• >>   hal_dsi_tx_cmd_mode_cal_timing
• >>   drv_dsi_rx_calc_ipi_tx_delay
• >>   svs_wait_start
• >>   svs_wait_fr_stab
• >>   svs_sync_handle

__aeabi_fdiv (Thumb, 124 bytes, Stack size 16 bytes, fdiv.o(.text))

[Stack]

• Max Depth = 16
• Call Chain = __aeabi_fdiv

• >>   _float_round

• >>   hal_lcdc_init_clk
• >>   hal_dsi_tx_vid_mode_cal_timing
• >>   hal_dsi_tx_cmd_mode_cal_timing
• >>   drv_dsi_rx_calc_ipi_tx_delay
• >>   svs_wait_start
• >>   svs_sync_handle

__ARM_scalbnf (Thumb, 24 bytes, Stack size 0 bytes, fscalb.o(.text))

[Called By]

• >>   hal_lcdc_init_clk

scalbnf (Thumb, 0 bytes, Stack size 0 bytes, fscalb.o(.text), UNUSED)

__aeabi_dadd (Thumb, 328 bytes, Stack size 48 bytes, dadd.o(.text))

[Stack]

• Max Depth = 104
• Call Chain = __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   __aeabi_lasr
• >>   __aeabi_llsl
• >>   _double_round
• >>   _double_epilogue

• >>   hal_lcdc_upscaler_config
• >>   drv_dsi_rx_calc_ipi_tx_delay
• >>   hal_dsi_rx_ctrl_init_vidc
• >>   svs_sync_handle
• >>   hal_vsync_reset_lcdc_scaler
• >>   __aeabi_drsub
• >>   ceil
• >>   __aeabi_dsub
• >>   _fp_digits

__aeabi_dsub (Thumb, 12 bytes, Stack size 8 bytes, dadd.o(.text), UNUSED)

[Calls]

• >>   __aeabi_dadd

__aeabi_drsub (Thumb, 12 bytes, Stack size 8 bytes, dadd.o(.text))

[Stack]

• Max Depth = 112
• Call Chain = __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   __aeabi_dadd

• >>   ceil

__aeabi_dmul (Thumb, 202 bytes, Stack size 72 bytes, dmul.o(.text))

[Stack]

• Max Depth = 128
• Call Chain = __aeabi_dmul ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   _double_epilogue

• >>   hal_intl_svs_update_rxbr_clk
• >>   _fp_digits

__aeabi_ui2f (Thumb, 14 bytes, Stack size 8 bytes, ffltui.o(.text))

[Stack]

• Max Depth = 20
• Call Chain = __aeabi_ui2f ⇒ _float_epilogue

• >>   _float_epilogue

• >>   hal_lcdc_init_clk
• >>   hal_dsi_tx_vid_mode_cal_timing
• >>   hal_dsi_tx_cmd_mode_cal_timing
• >>   drv_dsi_rx_calc_ipi_tx_delay
• >>   svs_wait_start
• >>   svs_wait_fr_stab
• >>   svs_sync_handle

__aeabi_ui2d (Thumb, 24 bytes, Stack size 16 bytes, dfltui.o(.text))

[Stack]

• Max Depth = 72
• Call Chain = __aeabi_ui2d ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   _double_epilogue

• >>   hal_lcdc_upscaler_config
• >>   hal_intl_svs_update_rxbr_clk
• >>   hal_dsi_rx_ctrl_init_vidc
• >>   hal_vsync_reset_lcdc_scaler

__aeabi_f2uiz (Thumb, 40 bytes, Stack size 0 bytes, ffixui.o(.text))

[Called By]

• >>   svs_wait_fr_stab

__aeabi_d2uiz (Thumb, 50 bytes, Stack size 8 bytes, dfixui.o(.text))

[Stack]

• Max Depth = 16
• Call Chain = __aeabi_d2uiz ⇒ __aeabi_llsr

• >>   __aeabi_llsr

• >>   hal_lcdc_upscaler_config
• >>   hal_lcdc_init_clk
• >>   hal_dsi_tx_vid_mode_cal_timing
• >>   hal_dsi_tx_cmd_mode_cal_timing
• >>   hal_intl_svs_update_rxbr_clk
• >>   drv_dsi_rx_calc_ipi_tx_delay
• >>   hal_dsi_rx_ctrl_init_vidc
• >>   svs_wait_start
• >>   svs_sync_handle
• >>   hal_vsync_reset_lcdc_scaler

__aeabi_f2d (Thumb, 40 bytes, Stack size 0 bytes, f2d.o(.text))

[Called By]

• >>   hal_lcdc_init_clk
• >>   hal_dsi_tx_vid_mode_cal_timing
• >>   hal_dsi_tx_cmd_mode_cal_timing
• >>   drv_dsi_rx_calc_ipi_tx_delay
• >>   svs_wait_start
• >>   svs_sync_handle

__aeabi_d2f (Thumb, 56 bytes, Stack size 8 bytes, d2f.o(.text))

[Stack]

• Max Depth = 8
• Call Chain = __aeabi_d2f

• >>   _float_round

• >>   hal_dsi_tx_timing_info_update

__aeabi_cfcmpeq (Thumb, 0 bytes, Stack size 0 bytes, cfcmple.o(.text), UNUSED)

__aeabi_cfcmple (Thumb, 20 bytes, Stack size 0 bytes, cfcmple.o(.text))

[Called By]

• >>   hal_tx_frame_rate_adjust

__aeabi_cfrcmple (Thumb, 20 bytes, Stack size 0 bytes, cfrcmple.o(.text))

[Called By]

• >>   drv_dsi_rx_calc_ipi_tx_delay

__aeabi_uldivmod (Thumb, 96 bytes, Stack size 48 bytes, uldiv.o(.text), UNUSED)

[Calls]

• >>   __aeabi_llsr
• >>   __aeabi_llsl

• >>   _printf_core
• >>   _fp_digits

__aeabi_llsl (Thumb, 32 bytes, Stack size 8 bytes, llshl.o(.text))

[Stack]

• Max Depth = 8
• Call Chain = __aeabi_llsl

• >>   __aeabi_dadd
• >>   __aeabi_uldivmod
• >>   _double_epilogue
• >>   __aeabi_d2ulz

_ll_shift_l (Thumb, 0 bytes, Stack size 8 bytes, llshl.o(.text), UNUSED)

__aeabi_llsr (Thumb, 34 bytes, Stack size 8 bytes, llushr.o(.text))

[Stack]

• Max Depth = 8
• Call Chain = __aeabi_llsr

• >>   __aeabi_d2uiz
• >>   __aeabi_uldivmod
• >>   _double_epilogue
• >>   __aeabi_d2ulz

_ll_ushift_r (Thumb, 0 bytes, Stack size 8 bytes, llushr.o(.text), UNUSED)

__aeabi_lasr (Thumb, 38 bytes, Stack size 8 bytes, llsshr.o(.text))

[Stack]

• Max Depth = 8
• Call Chain = __aeabi_lasr

• >>   __aeabi_dadd

_ll_sshift_r (Thumb, 0 bytes, Stack size 8 bytes, llsshr.o(.text), UNUSED)

__I$use$fp (Thumb, 0 bytes, Stack size 0 bytes, iusefp.o(.text), UNUSED)

_float_round (Thumb, 16 bytes, Stack size 0 bytes, fepilogue.o(.text))

[Called By]

• >>   __aeabi_fadd
• >>   __aeabi_d2f
• >>   __aeabi_fdiv

_float_epilogue (Thumb, 114 bytes, Stack size 12 bytes, fepilogue.o(.text))

[Stack]

• Max Depth = 12
• Call Chain = _float_epilogue

• >>   __aeabi_ui2f
• >>   __aeabi_fadd

_double_round (Thumb, 26 bytes, Stack size 8 bytes, depilogue.o(.text))

[Stack]

• Max Depth = 8
• Call Chain = _double_round

• >>   __aeabi_dadd
• >>   _double_epilogue
• >>   __aeabi_ddiv

_double_epilogue (Thumb, 164 bytes, Stack size 48 bytes, depilogue.o(.text))

[Stack]

• Max Depth = 56
• Call Chain = _double_epilogue ⇒ __aeabi_llsr

• >>   __ARM_clz
• >>   __aeabi_llsr
• >>   __aeabi_llsl
• >>   _double_round

• >>   __aeabi_ui2d
• >>   __aeabi_dadd
• >>   __aeabi_dmul

__aeabi_ddiv (Thumb, 234 bytes, Stack size 40 bytes, ddiv.o(.text), UNUSED)

[Calls]

• >>   _double_round

• >>   _fp_digits

__aeabi_d2ulz (Thumb, 54 bytes, Stack size 8 bytes, dfixul.o(.text), UNUSED)

[Calls]

• >>   __aeabi_llsr
• >>   __aeabi_llsl

• >>   _fp_digits

__aeabi_cdrcmple (Thumb, 38 bytes, Stack size 0 bytes, cdrcmple.o(.text))

[Called By]

• >>   ceil
• >>   _fp_digits

__scatterload (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))

[Calls]

• >>   __main_after_scatterload

• >>   _main_scatterload

__scatterload_rt2 (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)

__decompress (Thumb, 0 bytes, Stack size unknown bytes, __dczerorl2.o(.text), UNUSED)

__decompress1 (Thumb, 86 bytes, Stack size unknown bytes, __dczerorl2.o(.text), UNUSED)

AP_NRESET_IRQn_Handler (Thumb, 22 bytes, Stack size 8 bytes, drv_gpio.o(i.AP_NRESET_IRQn_Handler))

[Stack]

• Max Depth = 16
• Call Chain = AP_NRESET_IRQn_Handler ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_clear_pending

• startup_armcm0.o(RESET)

DMA_IRQn_Handler (Thumb, 78 bytes, Stack size 24 bytes, drv_dma.o(i.DMA_IRQn_Handler))

[Stack]

• Max Depth = 32
• Call Chain = DMA_IRQn_Handler ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_clear_pending
• >>   drv_dma_clear_status
• >>   drv_dma_get_int_source

• startup_armcm0.o(RESET)

EXTI_INT0_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_gpio.o(i.EXTI_INT0_IRQn_Handler))

[Stack]

• Max Depth = 24
• Call Chain = EXTI_INT0_IRQn_Handler ⇒ drv_gpio_handle_int ⇒ drv_sys_cfg_clear_pending

• >>   drv_gpio_handle_int

• startup_armcm0.o(RESET)

EXTI_INT1_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_gpio.o(i.EXTI_INT1_IRQn_Handler))

[Stack]

• Max Depth = 24
• Call Chain = EXTI_INT1_IRQn_Handler ⇒ drv_gpio_handle_int ⇒ drv_sys_cfg_clear_pending

• >>   drv_gpio_handle_int

• startup_armcm0.o(RESET)

EXTI_INT2_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_gpio.o(i.EXTI_INT2_IRQn_Handler))

[Stack]

• Max Depth = 24
• Call Chain = EXTI_INT2_IRQn_Handler ⇒ drv_gpio_handle_int ⇒ drv_sys_cfg_clear_pending

• >>   drv_gpio_handle_int

• startup_armcm0.o(RESET)

EXTI_INT3_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_gpio.o(i.EXTI_INT3_IRQn_Handler))

[Stack]

• Max Depth = 24
• Call Chain = EXTI_INT3_IRQn_Handler ⇒ drv_gpio_handle_int ⇒ drv_sys_cfg_clear_pending

• >>   drv_gpio_handle_int

• startup_armcm0.o(RESET)

EXTI_INT4_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_gpio.o(i.EXTI_INT4_IRQn_Handler))

[Stack]

• Max Depth = 24
• Call Chain = EXTI_INT4_IRQn_Handler ⇒ drv_gpio_handle_int ⇒ drv_sys_cfg_clear_pending

• >>   drv_gpio_handle_int

• startup_armcm0.o(RESET)

EXTI_INT5_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_gpio.o(i.EXTI_INT5_IRQn_Handler))

[Stack]

• Max Depth = 24
• Call Chain = EXTI_INT5_IRQn_Handler ⇒ drv_gpio_handle_int ⇒ drv_sys_cfg_clear_pending

• >>   drv_gpio_handle_int

• startup_armcm0.o(RESET)

EXTI_INT6_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_gpio.o(i.EXTI_INT6_IRQn_Handler))

[Stack]

• Max Depth = 24
• Call Chain = EXTI_INT6_IRQn_Handler ⇒ drv_gpio_handle_int ⇒ drv_sys_cfg_clear_pending

• >>   drv_gpio_handle_int

• startup_armcm0.o(RESET)

EXTI_INT7_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_gpio.o(i.EXTI_INT7_IRQn_Handler))

[Stack]

• Max Depth = 24
• Call Chain = EXTI_INT7_IRQn_Handler ⇒ drv_gpio_handle_int ⇒ drv_sys_cfg_clear_pending

• >>   drv_gpio_handle_int

• startup_armcm0.o(RESET)

HardFault_Handler (Thumb, 14 bytes, Stack size 0 bytes, drv_common.o(i.HardFault_Handler))

[Stack]

• Max Depth = 336
• Call Chain = HardFault_Handler ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   tau_log_printf

• startup_armcm0.o(RESET)

LCDC_IRQn_Handler (Thumb, 118 bytes, Stack size 24 bytes, hal_internal_vsync.o(i.LCDC_IRQn_Handler))

[Stack]

• Max Depth = 360
• Call Chain = LCDC_IRQn_Handler ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   tau_log_printf
• >>   drv_sys_cfg_clear_pending

• startup_armcm0.o(RESET)

MEMC_IRQn_Handler (Thumb, 154 bytes, Stack size 8 bytes, drv_memc.o(i.MEMC_IRQn_Handler))

[Stack]

• Max Depth = 16
• Call Chain = MEMC_IRQn_Handler ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_clear_pending
• >>   drv_memc_get_status
• >>   drv_memc_clear_status

• startup_armcm0.o(RESET)

MIPI_TX_IRQn_Handler (Thumb, 70 bytes, Stack size 24 bytes, drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler))

[Stack]

• Max Depth = 360
• Call Chain = MIPI_TX_IRQn_Handler ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   tau_log_printf
• >>   drv_sys_cfg_clear_pending

• startup_armcm0.o(RESET)

SWIRE_IRQn_Handler (Thumb, 38 bytes, Stack size 8 bytes, drv_swire.o(i.SWIRE_IRQn_Handler))

[Stack]

• Max Depth = 16
• Call Chain = SWIRE_IRQn_Handler ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_clear_pending

• startup_armcm0.o(RESET)

SysTick_Handler (Thumb, 20 bytes, Stack size 0 bytes, drv_common.o(i.SysTick_Handler))
[Address Reference Count : 1]

• startup_armcm0.o(RESET)

TIMER0_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_timer.o(i.TIMER0_IRQn_Handler))

[Stack]

• Max Depth = 52
• Call Chain = TIMER0_IRQn_Handler ⇒ drv_timer_handle_interrupt ⇒ drv_timer_set_compare_val ⇒ __aeabi_uidivmod

• >>   drv_timer_handle_interrupt

• startup_armcm0.o(RESET)

TIMER1_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_timer.o(i.TIMER1_IRQn_Handler))

[Stack]

• Max Depth = 52
• Call Chain = TIMER1_IRQn_Handler ⇒ drv_timer_handle_interrupt ⇒ drv_timer_set_compare_val ⇒ __aeabi_uidivmod

• >>   drv_timer_handle_interrupt

• startup_armcm0.o(RESET)

TIMER2_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_timer.o(i.TIMER2_IRQn_Handler))

[Stack]

• Max Depth = 52
• Call Chain = TIMER2_IRQn_Handler ⇒ drv_timer_handle_interrupt ⇒ drv_timer_set_compare_val ⇒ __aeabi_uidivmod

• >>   drv_timer_handle_interrupt

• startup_armcm0.o(RESET)

TIMER3_IRQn_Handler (Thumb, 10 bytes, Stack size 8 bytes, drv_timer.o(i.TIMER3_IRQn_Handler))

[Stack]

• Max Depth = 52
• Call Chain = TIMER3_IRQn_Handler ⇒ drv_timer_handle_interrupt ⇒ drv_timer_set_compare_val ⇒ __aeabi_uidivmod

• >>   drv_timer_handle_interrupt

• startup_armcm0.o(RESET)

VIDC_IRQn_Handler (Thumb, 22 bytes, Stack size 8 bytes, drv_vidc.o(i.VIDC_IRQn_Handler))

[Stack]

• Max Depth = 16
• Call Chain = VIDC_IRQn_Handler ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_clear_pending

• startup_armcm0.o(RESET)

VPRE1_IRQn_Handler (Thumb, 22 bytes, Stack size 8 bytes, drv_rxbr.o(i.VPRE1_IRQn_Handler))

[Stack]

• Max Depth = 16
• Call Chain = VPRE1_IRQn_Handler ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_clear_pending

• startup_armcm0.o(RESET)

VPRE_IRQn_Handler (Thumb, 104 bytes, Stack size 8 bytes, hal_internal_dcs.o(i.VPRE_IRQn_Handler))

[Stack]

• Max Depth = 536
• Call Chain = VPRE_IRQn_Handler ⇒ hal_intl_dcs_rx_receive_packet ⇒ hal_intl_dcs_rx_receive_pps ⇒ drv_dsc_dec_enable ⇒ drv_se_set_dsc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_crgu_set_dsc_clk
• >>   drv_dsc_dec_get_nslc
• >>   hal_intl_dcs_rx_receive_packet
• >>   drv_rxbr_get_status0
• >>   drv_rxbr_clear_status0
• >>   drv_sys_cfg_clear_pending

• startup_armcm0.o(RESET)

__0printf (Thumb, 24 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)

[Calls]

• >>   _printf_core

__1printf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)

__2printf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf))

[Stack]

• Max Depth = 24
• Call Chain = __2printf

• >>   tau_log_printf

__c89printf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)

printf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0printf), UNUSED)

__0vsprintf (Thumb, 30 bytes, Stack size 24 bytes, printfa.o(i.__0vsprintf), UNUSED)

[Calls]

• >>   _sputc
• >>   _printf_core

__1vsprintf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0vsprintf), UNUSED)

__2vsprintf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0vsprintf), UNUSED)

__c89vsprintf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0vsprintf), UNUSED)

vsprintf (Thumb, 0 bytes, Stack size 24 bytes, printfa.o(i.__0vsprintf))

[Stack]

• Max Depth = 24
• Call Chain = vsprintf

• >>   tau_log_printf

__ARM_clz (Thumb, 46 bytes, Stack size 0 bytes, depilogue.o(i.__ARM_clz))

[Called By]

• >>   _double_epilogue

__ARM_common_switch8 (Thumb, 26 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.__ARM_common_switch8))

[Stack]

• Max Depth = 8
• Call Chain = __ARM_common_switch8

• >>   drv_dsi_tx_phy_status_stopstate
• >>   hal_dsi_rx_ctrl_init_memc
• >>   drv_dsi_rx_get_color_bpp

__scatterload_null (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)

MIPI_RX_IRQn_Handler (Thumb, 354 bytes, Stack size 24 bytes, drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler))

[Stack]

• Max Depth = 360
• Call Chain = MIPI_RX_IRQn_Handler ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   tau_log_printf
• >>   drv_sys_cfg_clear_pending

• startup_armcm0.o(RESET)

UART_IRQn_Handler (Thumb, 364 bytes, Stack size 32 bytes, drv_uart.o(i.UART_IRQn_Handler))

[Stack]

• Max Depth = 64
• Call Chain = UART_IRQn_Handler ⇒ drv_uart_abort_send ⇒ drv_uart_reset_tx_fifo ⇒ drv_uart_get_instance

• >>   drv_sys_cfg_clear_pending
• >>   drv_uart_config_int
• >>   drv_uart_abort_send
• >>   drv_uart_abort_recv
• >>   drv_uart_int_trans_handle

• startup_armcm0.o(RESET)

__scatterload_copy (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)

__scatterload_zeroinit (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)

app_display_init (Thumb, 44 bytes, Stack size 8 bytes, p6a_demo.o(i.app_display_init))

[Stack]

• Max Depth = 568
• Call Chain = app_display_init ⇒ app_mipi_rx_init ⇒ hal_dsi_rx_ctrl_init ⇒ hal_dsi_rx_ctrl_init_vidc ⇒ drv_vidc_set_src_parameter ⇒ drv_se_set_vidc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_swire_set_timer
• >>   hal_swire_init
• >>   hal_pwr_get_vcc_power_ready
• >>   app_gpio_init
• >>   app_mipi_tx_start
• >>   app_mipi_tx_init
• >>   app_mipi_rx_init

• >>   app_system_resume
• >>   google_p6a_demo

app_gpio_init (Thumb, 22 bytes, Stack size 24 bytes, p6a_demo.o(i.app_gpio_init))

[Stack]

• Max Depth = 64
• Call Chain = app_gpio_init ⇒ hal_gpio_config_pad ⇒ hal_gpio_init_output ⇒ hal_gpio_set_mode ⇒ drv_gpio_set_mode

• >>   hal_gpio_config_pad

• >>   app_display_init

board_Init (Thumb, 20 bytes, Stack size 8 bytes, board.o(i.board_Init))

[Stack]

• Max Depth = 140
• Call Chain = board_Init ⇒ tau_log_init ⇒ hal_uart_init ⇒ drv_uart_init ⇒ drv_uart_set_baud_rate ⇒ __aeabi_uidivmod

• >>   tau_log_init
• >>   hal_system_init

• >>   main

ceil (Thumb, 180 bytes, Stack size 24 bytes, ceil.o(i.ceil))

[Stack]

• Max Depth = 136
• Call Chain = ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   __aeabi_dadd
• >>   __aeabi_drsub
• >>   __aeabi_cdrcmple

• >>   hal_lcdc_init_clk
• >>   hal_dsi_tx_vid_mode_cal_timing
• >>   hal_dsi_tx_cmd_mode_cal_timing
• >>   svs_wait_start

dcs_packet_fifo_alloc (Thumb, 80 bytes, Stack size 12 bytes, dcs_packet_fifo.o(i.dcs_packet_fifo_alloc))

[Stack]

• Max Depth = 12
• Call Chain = dcs_packet_fifo_alloc

• >>   hal_intl_dcs_rx_get_dcs_packet_data

dcs_packet_fifo_init (Thumb, 18 bytes, Stack size 0 bytes, dcs_packet_fifo.o(i.dcs_packet_fifo_init))

[Called By]

• >>   hal_internal_vsync_init_rx

dcs_packet_free_fifo_header (Thumb, 60 bytes, Stack size 0 bytes, dcs_packet_fifo.o(i.dcs_packet_free_fifo_header))

[Called By]

• >>   hal_dsi_rx_ctrl_dcs_async_handler

dcs_packet_get_fifo_header (Thumb, 26 bytes, Stack size 0 bytes, dcs_packet_fifo.o(i.dcs_packet_get_fifo_header))

[Called By]

• >>   hal_dsi_rx_ctrl_dcs_async_handler

delayMs (Thumb, 24 bytes, Stack size 8 bytes, tau_delay.o(i.delayMs))

[Stack]

• Max Depth = 16
• Call Chain = delayMs ⇒ delayUs

• >>   delayUs

• >>   app_tx_panel_reset
• >>   app_mipi_tx_start
• >>   app_init_panel
• >>   ap_dcs_set_enter_sleep_mode

delayUs (Thumb, 40 bytes, Stack size 8 bytes, tau_delay.o(i.delayUs))

[Stack]

• Max Depth = 8
• Call Chain = delayUs

• >>   hal_internal_sync_input_resolution_change
• >>   delayMs
• >>   tau_log_push_log

drv_common_system_init (Thumb, 8 bytes, Stack size 8 bytes, drv_common.o(i.drv_common_system_init))

[Stack]

• Max Depth = 40
• Call Chain = drv_common_system_init ⇒ drv_se_init ⇒ drv_efuse_read

• >>   drv_se_init

• >>   hal_system_init

drv_crgu_enable_clock (Thumb, 54 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_enable_clock))

[Called By]

• >>   hal_dsi_tx_ctrl_init_clk
• >>   hal_dsi_rx_ctrl_init_clk
• >>   hal_system_init
• >>   hal_timer_init
• >>   hal_swire_init
• >>   hal_swire_deinit
• >>   hal_dsi_tx_ctrl_deinit
• >>   hal_dsi_rx_ctrl_deinit
• >>   hal_intl_dcs_rx_receive_pps
• >>   hal_timer_deinit
• >>   drv_uart_enable_clk
• >>   drv_efuse_enter_inactive

drv_crgu_get_rxbr_clk (Thumb, 70 bytes, Stack size 8 bytes, drv_crgu.o(i.drv_crgu_get_rxbr_clk))

[Stack]

• Max Depth = 20
• Call Chain = drv_crgu_get_rxbr_clk ⇒ __aeabi_uidivmod

• >>   __aeabi_uidivmod

• >>   hal_intl_svs_update_rxbr_clk
• >>   hal_dsi_rx_ctrl_init_dsi_rx
• >>   svs_wait_start

drv_crgu_reset_modules (Thumb, 10 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_reset_modules))

[Called By]

• >>   hal_dsi_tx_ctrl_deinit
• >>   hal_dsi_rx_ctrl_deinit

drv_crgu_set_ahb_clk (Thumb, 34 bytes, Stack size 8 bytes, drv_crgu.o(i.drv_crgu_set_ahb_clk))

[Stack]

• Max Depth = 8
• Call Chain = drv_crgu_set_ahb_clk

• >>   hal_system_updata_sysclk

drv_crgu_set_clock_div (Thumb, 12 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_clock_div))

[Called By]

• >>   hal_swire_init

drv_crgu_set_dpi_clk (Thumb, 54 bytes, Stack size 12 bytes, drv_crgu.o(i.drv_crgu_set_dpi_clk))

[Stack]

• Max Depth = 12
• Call Chain = drv_crgu_set_dpi_clk

• >>   hal_dsi_tx_init_dpi_timing

drv_crgu_set_dsc_clk (Thumb, 52 bytes, Stack size 12 bytes, drv_crgu.o(i.drv_crgu_set_dsc_clk))

[Stack]

• Max Depth = 12
• Call Chain = drv_crgu_set_dsc_clk

• >>   hal_dsi_rx_ctrl_init_clk
• >>   VPRE_IRQn_Handler

drv_crgu_set_fb_clk (Thumb, 34 bytes, Stack size 8 bytes, drv_crgu.o(i.drv_crgu_set_fb_clk))

[Stack]

• Max Depth = 8
• Call Chain = drv_crgu_set_fb_clk

• >>   hal_dsi_rx_ctrl_init_clk

drv_crgu_set_lcdc_clk (Thumb, 36 bytes, Stack size 8 bytes, drv_crgu.o(i.drv_crgu_set_lcdc_clk))

[Stack]

• Max Depth = 8
• Call Chain = drv_crgu_set_lcdc_clk

• >>   hal_lcdc_init_clk

drv_crgu_set_reset (Thumb, 20 bytes, Stack size 0 bytes, drv_crgu.o(i.drv_crgu_set_reset))

[Called By]

• >>   hal_swire_deinit
• >>   hal_dsi_rx_ctrl_deinit
• >>   vpre_err_reset
• >>   hal_timer_deinit

drv_crgu_set_rxbr_clk (Thumb, 34 bytes, Stack size 8 bytes, drv_crgu.o(i.drv_crgu_set_rxbr_clk))

[Stack]

• Max Depth = 8
• Call Chain = drv_crgu_set_rxbr_clk

• >>   hal_dsi_rx_ctrl_init_clk

drv_crgu_set_vidc_clk (Thumb, 36 bytes, Stack size 8 bytes, drv_crgu.o(i.drv_crgu_set_vidc_clk))

[Stack]

• Max Depth = 8
• Call Chain = drv_crgu_set_vidc_clk

• >>   hal_dsi_rx_ctrl_init_clk

drv_dma_clear_status (Thumb, 20 bytes, Stack size 0 bytes, drv_dma.o(i.drv_dma_clear_status))

[Called By]

• >>   DMA_IRQn_Handler

drv_dsc_dec_disable (Thumb, 20 bytes, Stack size 0 bytes, drv_dsc_dec.o(i.drv_dsc_dec_disable))

[Called By]

• >>   hal_dsi_rx_ctrl_deinit

drv_dsc_dec_enable (Thumb, 44 bytes, Stack size 8 bytes, drv_dsc_dec.o(i.drv_dsc_dec_enable))

[Stack]

• Max Depth = 360
• Call Chain = drv_dsc_dec_enable ⇒ drv_se_set_dsc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_se_set_dsc

• >>   hal_dsi_rx_ctrl_init
• >>   hal_intl_dcs_rx_receive_pps

drv_dsc_dec_get_nslc (Thumb, 22 bytes, Stack size 0 bytes, drv_dsc_dec.o(i.drv_dsc_dec_get_nslc))

[Called By]

• >>   VPRE_IRQn_Handler

drv_dsc_dec_set_irqen (Thumb, 24 bytes, Stack size 0 bytes, drv_dsc_dec.o(i.drv_dsc_dec_set_irqen))

[Called By]

• >>   hal_dsi_rx_ctrl_init

drv_dsi_rx_calc_ipi_tx_delay (Thumb, 252 bytes, Stack size 56 bytes, drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay))

[Stack]

• Max Depth = 160
• Call Chain = drv_dsi_rx_calc_ipi_tx_delay ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   __aeabi_ui2f
• >>   __aeabi_fmul
• >>   __aeabi_fadd
• >>   __aeabi_f2d
• >>   __aeabi_fdiv
• >>   __aeabi_dadd
• >>   __aeabi_d2uiz
• >>   __aeabi_fsub
• >>   __aeabi_cfrcmple
• >>   drv_dsi_rx_get_color_pcc
• >>   drv_dsi_rx_get_color_bpp

• >>   hal_dsi_rx_ctrl_set_ipi_cfg

drv_dsi_rx_enable_irq (Thumb, 58 bytes, Stack size 8 bytes, drv_dsi_rx.o(i.drv_dsi_rx_enable_irq))

[Stack]

• Max Depth = 16
• Call Chain = drv_dsi_rx_enable_irq ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_set_int
• >>   drv_sys_cfg_clear_pending

• >>   hal_dsi_rx_ctrl_init_dsi_rx
• >>   hal_dsi_rx_ctrl_deinit

drv_dsi_rx_get_compression_en (Thumb, 10 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en))

[Called By]

• >>   hal_intl_dcs_rx_receive_pps

drv_dsi_rx_get_ddi_crc_en (Thumb, 10 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en))

[Called By]

• >>   hal_intl_dcs_rx_get_dcs_packet_data

drv_dsi_rx_get_max_ret_size (Thumb, 8 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size))

[Called By]

• >>   hal_dsi_rx_ctrl_get_max_ret_size

drv_dsi_rx_power_up (Thumb, 14 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_power_up))

[Called By]

• >>   hal_dsi_rx_ctrl_start

drv_dsi_rx_set_check_crc (Thumb, 24 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc))

[Called By]

• >>   hal_dsi_rx_ctrl_init_dsi_rx

drv_dsi_rx_set_ctrl_cfg (Thumb, 32 bytes, Stack size 12 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg))

[Stack]

• Max Depth = 12
• Call Chain = drv_dsi_rx_set_ctrl_cfg

• >>   hal_dsi_rx_ctrl_init_dsi_rx

drv_dsi_rx_set_ddi_cfg (Thumb, 10 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg))

[Called By]

• >>   hal_dsi_rx_ctrl_init_dsi_rx

drv_dsi_rx_set_ddi_crc_en (Thumb, 24 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en))

[Called By]

• >>   hal_dsi_rx_ctrl_init_dsi_rx

drv_dsi_rx_set_inten (Thumb, 8 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_inten))

[Called By]

• >>   hal_dsi_rx_ctrl_init_dsi_rx

drv_dsi_rx_set_ipi_cfg (Thumb, 12 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg))

[Called By]

• >>   hal_dsi_rx_ctrl_set_ipi_cfg

drv_dsi_rx_set_ipi_ycbcr_frmt (Thumb, 24 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt))

[Called By]

• >>   hal_dsi_rx_ctrl_init_dsi_rx

drv_dsi_rx_set_lane_swap (Thumb, 16 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap))

[Called By]

• >>   hal_dsi_rx_ctrl_init_dsi_rx

drv_dsi_rx_set_resp_cnt (Thumb, 32 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt))

[Called By]

• >>   hal_dsi_rx_ctrl_init_dsi_rx

drv_dsi_rx_set_tear_resp_en (Thumb, 24 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en))

[Called By]

• >>   hal_dsi_rx_ctrl_init_dsi_rx

drv_dsi_rx_set_up_phy (Thumb, 224 bytes, Stack size 32 bytes, drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy))

[Stack]

• Max Depth = 44
• Call Chain = drv_dsi_rx_set_up_phy ⇒ __aeabi_uidivmod

• >>   __aeabi_uidivmod
• >>   drv_phy_test_lock
• >>   drv_phy_test_clear

• >>   hal_dsi_rx_ctrl_init_dsi_rx

drv_dsi_rx_shut_down (Thumb, 14 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_shut_down))

[Called By]

• >>   hal_dsi_rx_ctrl_stop

drv_dsi_tx_command_header (Thumb, 18 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_command_header))

[Called By]

• >>   hal_dsi_tx_send_cmd

drv_dsi_tx_command_mode_cfg (Thumb, 82 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg))

[Called By]

• >>   hal_dsi_tx_init_cfg
• >>   hal_dsi_tx_ctrl_start

drv_dsi_tx_command_put_payload (Thumb, 6 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload))

[Called By]

• >>   hal_dsi_tx_ctrl_write_cmd
• >>   hal_intl_dcs_rx_get_dcs_packet_data

drv_dsi_tx_config_eotp (Thumb, 26 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_config_eotp))

[Called By]

• >>   hal_dsi_tx_init_cfg
• >>   hal_dsi_tx_ctrl_start

drv_dsi_tx_config_int (Thumb, 8 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_config_int))

[Called By]

• >>   hal_dsi_tx_init_cfg

drv_dsi_tx_dpi_lpcmd_time (Thumb, 10 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time))

[Called By]

• >>   hal_dsi_tx_init_cfg

drv_dsi_tx_dpi_mode (Thumb, 12 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode))

[Called By]

• >>   hal_dsi_tx_init_cfg

drv_dsi_tx_dpi_polarity (Thumb, 32 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity))

[Called By]

• >>   hal_dsi_tx_init_cfg

drv_dsi_tx_edpi_cmd_size (Thumb, 6 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size))

[Called By]

• >>   hal_dsi_tx_init_timing

drv_dsi_tx_get_cmd_status (Thumb, 6 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status))

[Called By]

• >>   hal_dsi_tx_send_cmd
• >>   hal_dsi_tx_ctrl_write_cmd

drv_dsi_tx_mode (Thumb, 6 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_mode))

[Called By]

• >>   hal_dsi_tx_init_cfg
• >>   hal_dsi_tx_ctrl_start

drv_dsi_tx_phy_clock_lane_auto_lp (Thumb, 24 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp))

[Called By]

• >>   hal_dsi_tx_init_cfg
• >>   hal_dsi_tx_ctrl_start

drv_dsi_tx_phy_clock_lane_req_hs (Thumb, 26 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs))

[Called By]

• >>   hal_dsi_tx_init_cfg
• >>   rxbr_irq1_callback

drv_dsi_tx_phy_lane_mode (Thumb, 12 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode))

[Called By]

• >>   hal_dsi_tx_init_cfg

drv_dsi_tx_phy_status_ready (Thumb, 100 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready))

[Called By]

• >>   hal_dsi_tx_ctrl_init

drv_dsi_tx_phy_status_stopstate (Thumb, 62 bytes, Stack size 4 bytes, drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate))

[Stack]

• Max Depth = 12
• Call Chain = drv_dsi_tx_phy_status_stopstate ⇒ __ARM_common_switch8

• >>   __ARM_common_switch8

• >>   hal_dsi_tx_send_cmd

drv_dsi_tx_phy_test_setup (Thumb, 314 bytes, Stack size 32 bytes, drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup))

[Stack]

• Max Depth = 44
• Call Chain = drv_dsi_tx_phy_test_setup ⇒ __aeabi_uidivmod

• >>   __aeabi_uidivmod
• >>   drv_tx_phy_test_write_code
• >>   drv_tx_phy_test_exit
• >>   drv_tx_phy_test_enter
• >>   drv_phy_test_clear

• >>   hal_dsi_tx_init_phy_cfg

drv_dsi_tx_phy_time_cfg (Thumb, 28 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg))

[Called By]

• >>   hal_dsi_tx_init_phy_cfg

drv_dsi_tx_powerup (Thumb, 8 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_powerup))

[Called By]

• >>   hal_dsi_tx_ctrl_start
• >>   hal_dsi_tx_ctrl_init

drv_dsi_tx_response_mode (Thumb, 30 bytes, Stack size 12 bytes, drv_dsi_tx.o(i.drv_dsi_tx_response_mode))

[Stack]

• Max Depth = 12
• Call Chain = drv_dsi_tx_response_mode

• >>   hal_dsi_tx_init_cfg

drv_dsi_tx_set_bta_ack (Thumb, 24 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack))

[Called By]

• >>   hal_dsi_tx_init_cfg

drv_dsi_tx_set_esc_div (Thumb, 14 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div))

[Called By]

• >>   hal_dsi_tx_init_cfg

drv_dsi_tx_set_int (Thumb, 58 bytes, Stack size 8 bytes, drv_dsi_tx.o(i.drv_dsi_tx_set_int))

[Stack]

• Max Depth = 16
• Call Chain = drv_dsi_tx_set_int ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_set_int
• >>   drv_sys_cfg_clear_pending

• >>   hal_dsi_tx_init_cfg
• >>   hal_dsi_tx_ctrl_stop

drv_dsi_tx_set_time_out_div (Thumb, 18 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div))

[Called By]

• >>   hal_dsi_tx_init_cfg

drv_dsi_tx_set_video_chunk (Thumb, 14 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk))

[Called By]

• >>   hal_dsi_tx_init_vid_timing

drv_dsi_tx_set_video_timing (Thumb, 30 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing))

[Called By]

• >>   hal_dsi_tx_init_vid_timing

drv_dsi_tx_shutdown (Thumb, 8 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_shutdown))

[Called By]

• >>   hal_dsi_tx_ctrl_stop
• >>   hal_dsi_tx_ctrl_start

drv_dsi_tx_timeout_cfg (Thumb, 38 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg))

[Called By]

• >>   hal_dsi_tx_init_cfg

drv_dsi_tx_video_mode_cfg (Thumb, 226 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg))

[Called By]

• >>   hal_dsi_tx_init_cfg

drv_efuse_enter_inactive (Thumb, 54 bytes, Stack size 8 bytes, drv_efuse.o(i.drv_efuse_enter_inactive))

[Stack]

• Max Depth = 8
• Call Chain = drv_efuse_enter_inactive

• >>   drv_crgu_enable_clock
• >>   drv_efuse_int_enable

• >>   drv_se_init

drv_efuse_int_enable (Thumb, 12 bytes, Stack size 0 bytes, drv_efuse.o(i.drv_efuse_int_enable))

[Called By]

• >>   drv_efuse_enter_inactive

drv_efuse_read (Thumb, 58 bytes, Stack size 16 bytes, drv_efuse.o(i.drv_efuse_read))

[Stack]

• Max Depth = 16
• Call Chain = drv_efuse_read

• >>   drv_pwr_efuse_pd
• >>   drv_efuse_read_req

• >>   drv_se_init

drv_efuse_read_req (Thumb, 24 bytes, Stack size 0 bytes, drv_efuse.o(i.drv_efuse_read_req))

[Called By]

• >>   drv_efuse_read

drv_gpio_register_ap_reset_callback (Thumb, 6 bytes, Stack size 0 bytes, drv_gpio.o(i.drv_gpio_register_ap_reset_callback))

[Called By]

• >>   hal_gpio_set_ap_reset_int

drv_gpio_register_callback (Thumb, 14 bytes, Stack size 0 bytes, drv_gpio.o(i.drv_gpio_register_callback))

[Called By]

• >>   hal_gpio_reg_eint_cb

drv_gpio_set_int (Thumb, 62 bytes, Stack size 16 bytes, drv_gpio.o(i.drv_gpio_set_int))

[Stack]

• Max Depth = 16
• Call Chain = drv_gpio_set_int

• >>   drv_sys_cfg_set_int

• >>   hal_gpio_ctrl_eint

drv_gpio_set_ioe (Thumb, 26 bytes, Stack size 0 bytes, drv_gpio.o(i.drv_gpio_set_ioe))

[Called By]

• >>   hal_gpio_init_output
• >>   hal_gpio_init_input
• >>   hal_gpio_init_eint

drv_gpio_set_mode (Thumb, 16 bytes, Stack size 8 bytes, drv_gpio.o(i.drv_gpio_set_mode))

[Stack]

• Max Depth = 8
• Call Chain = drv_gpio_set_mode

• >>   hal_gpio_set_mode

drv_lcdc_bcsa_config (Thumb, 30 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_bcsa_config))

[Called By]

• >>   hal_nonshadow_func_update
• >>   hal_lcdc_postproc_config

drv_lcdc_cfg_int_frame (Thumb, 34 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_cfg_int_frame))

[Called By]

• >>   hal_dsi_tx_ctrl_start

drv_lcdc_cmd_start (Thumb, 46 bytes, Stack size 8 bytes, drv_lcdc.o(i.drv_lcdc_cmd_start))

[Stack]

• Max Depth = 360
• Call Chain = drv_lcdc_cmd_start ⇒ drv_se_set_lcdc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_se_set_lcdc

• >>   hal_lcdc_start
• >>   rxbr_irq1_callback

drv_lcdc_config_acc_command_mode (Thumb, 14 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_config_acc_command_mode))

[Called By]

• >>   hal_internal_vsync_set_tear_mode

drv_lcdc_config_int (Thumb, 50 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_config_int))

[Called By]

• >>   hal_lcdc_init_cfg

drv_lcdc_config_int_single (Thumb, 34 bytes, Stack size 8 bytes, drv_lcdc.o(i.drv_lcdc_config_int_single))

[Stack]

• Max Depth = 8
• Call Chain = drv_lcdc_config_int_single

• >>   hal_vsync_func_update
• >>   hal_nonshadow_func_update
• >>   hal_internal_vsync_set_tear_mode

drv_lcdc_config_overwrite_rgb (Thumb, 18 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb))

[Called By]

• >>   hal_dsi_tx_ctrl_set_overwrite_rgb

drv_lcdc_config_src_parameter (Thumb, 72 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_config_src_parameter))

[Called By]

• >>   hal_lcdc_timinggen_config

drv_lcdc_crop_hact (Thumb, 10 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_crop_hact))

[Called By]

• >>   hal_lcdc_displayproc_config

drv_lcdc_ctrl_flow (Thumb, 50 bytes, Stack size 16 bytes, drv_lcdc.o(i.drv_lcdc_ctrl_flow))

[Stack]

• Max Depth = 16
• Call Chain = drv_lcdc_ctrl_flow

• >>   drv_lcdc_function_enable

• >>   hal_lcdc_timinggen_config

drv_lcdc_dith_config (Thumb, 40 bytes, Stack size 8 bytes, drv_lcdc.o(i.drv_lcdc_dith_config))

[Stack]

• Max Depth = 8
• Call Chain = drv_lcdc_dith_config

• >>   hal_lcdc_postproc_config

drv_lcdc_edge_dect_config (Thumb, 50 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_edge_dect_config))

[Called By]

• >>   hal_nonshadow_func_update
• >>   hal_lcdc_postproc_config

drv_lcdc_edge_enh_config (Thumb, 86 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_edge_enh_config))

[Called By]

• >>   hal_nonshadow_func_update
• >>   hal_lcdc_postproc_config

drv_lcdc_enable_shadow_reg (Thumb, 32 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_enable_shadow_reg))

[Called By]

• >>   hal_dsi_tx_ctrl_start

drv_lcdc_endianness_config (Thumb, 24 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_endianness_config))

[Called By]

• >>   hal_lcdc_displayproc_config

drv_lcdc_fc_config (Thumb, 24 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_fc_config))

[Called By]

• >>   hal_nonshadow_func_update
• >>   hal_lcdc_postproc_config

drv_lcdc_fldc_config (Thumb, 32 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_fldc_config))

[Called By]

• >>   hal_lcdc_postproc_config

drv_lcdc_function_disable (Thumb, 30 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_function_disable))

[Called By]

• >>   hal_lcdc_postproc_config
• >>   vidc_callback
• >>   hal_internal_vsync_set_tx_state
• >>   hal_internal_vsync_set_tear_mode

drv_lcdc_function_enable (Thumb, 30 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_function_enable))

[Called By]

• >>   drv_lcdc_ctrl_flow
• >>   hal_lcdc_upscaler_config
• >>   hal_lcdc_postproc_config
• >>   hal_dsi_tx_ctrl_start
• >>   hal_internal_vsync_set_tear_mode

drv_lcdc_set_int (Thumb, 54 bytes, Stack size 8 bytes, drv_lcdc.o(i.drv_lcdc_set_int))

[Stack]

• Max Depth = 24
• Call Chain = drv_lcdc_set_int ⇒ drv_lcdc_clear_int ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_set_int
• >>   drv_lcdc_clear_int

• >>   hal_lcdc_init_cfg
• >>   hal_dsi_tx_ctrl_stop

drv_lcdc_set_prefetch (Thumb, 24 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_set_prefetch))

[Called By]

• >>   hal_lcdc_timinggen_config

drv_lcdc_set_tear_line (Thumb, 24 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_set_tear_line))

[Called By]

• >>   hal_internal_vsync_set_tear_mode

drv_lcdc_stop_display (Thumb, 12 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_stop_display))

[Called By]

• >>   hal_dsi_tx_ctrl_stop

drv_lcdc_vid_hw_start (Thumb, 56 bytes, Stack size 8 bytes, drv_lcdc.o(i.drv_lcdc_vid_hw_start))

[Stack]

• Max Depth = 360
• Call Chain = drv_lcdc_vid_hw_start ⇒ drv_se_set_lcdc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_se_set_lcdc

• >>   hal_lcdc_start

drv_lcdc_vintp_mode_config (Thumb, 18 bytes, Stack size 0 bytes, drv_lcdc.o(i.drv_lcdc_vintp_mode_config))

[Called By]

• >>   hal_lcdc_postproc_config

drv_memc_clear_status (Thumb, 14 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_clear_status))

[Called By]

• >>   MEMC_IRQn_Handler

drv_memc_enable_irq (Thumb, 58 bytes, Stack size 8 bytes, drv_memc.o(i.drv_memc_enable_irq))

[Stack]

• Max Depth = 16
• Call Chain = drv_memc_enable_irq ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_set_int
• >>   drv_sys_cfg_clear_pending

• >>   hal_dsi_rx_ctrl_init_memc
• >>   hal_dsi_rx_ctrl_deinit

drv_memc_gen_a_tear_signal (Thumb, 12 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_gen_a_tear_signal))

[Called By]

• >>   hal_dsi_tx_ctrl_gen_a_tear_signal

drv_memc_get_status (Thumb, 20 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_get_status))

[Called By]

• >>   MEMC_IRQn_Handler

drv_memc_get_tear_mode (Thumb, 10 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_get_tear_mode))

[Called By]

• >>   hal_dsi_tx_ctrl_gen_a_tear_signal

drv_memc_rate_transfer_sel (Thumb, 22 bytes, Stack size 8 bytes, drv_memc.o(i.drv_memc_rate_transfer_sel))

[Stack]

• Max Depth = 352
• Call Chain = drv_memc_rate_transfer_sel ⇒ drv_se_set_memc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_se_set_memc

• >>   hal_dsi_rx_ctrl_init_memc

drv_memc_sel_vsync (Thumb, 16 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_sel_vsync))

[Called By]

• >>   hal_dsi_rx_ctrl_init_memc

drv_memc_set_active_height (Thumb, 16 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_active_height))

[Called By]

• >>   hal_dsi_rx_ctrl_init_memc

drv_memc_set_circ_mode_enable (Thumb, 24 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_circ_mode_enable))

[Called By]

• >>   hal_dsi_rx_ctrl_init_memc

drv_memc_set_data_mode (Thumb, 14 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_data_mode))

[Called By]

• >>   hal_dsi_rx_ctrl_init_memc

drv_memc_set_double_buffer (Thumb, 18 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_double_buffer))

[Called By]

• >>   hal_dsi_rx_ctrl_init_memc

drv_memc_set_frame_drop_select (Thumb, 24 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_frame_drop_select))

[Called By]

• >>   hal_internal_vsync_set_tear_mode

drv_memc_set_fs_en_conditions (Thumb, 18 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_fs_en_conditions))

[Called By]

• >>   hal_dsi_rx_ctrl_init_memc

drv_memc_set_lcdc_st_conditions (Thumb, 20 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_lcdc_st_conditions))

[Called By]

• >>   hal_dsi_rx_ctrl_init_memc

drv_memc_set_ltpo_mode (Thumb, 28 bytes, Stack size 8 bytes, drv_memc.o(i.drv_memc_set_ltpo_mode))

[Stack]

• Max Depth = 352
• Call Chain = drv_memc_set_ltpo_mode ⇒ drv_se_set_memc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_se_set_memc

• >>   hal_dsi_rx_ctrl_init_memc

drv_memc_set_ltpo_pu_thres (Thumb, 18 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_ltpo_pu_thres))

[Called By]

• >>   hal_dsi_rx_ctrl_init_memc

drv_memc_set_tear_mode (Thumb, 16 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_tear_mode))

[Called By]

• >>   hal_dsi_rx_ctrl_init_memc
• >>   hal_dsi_tx_ctrl_gen_a_tear_signal
• >>   hal_internal_vsync_set_tear_mode

drv_memc_set_tear_waveform (Thumb, 36 bytes, Stack size 8 bytes, drv_memc.o(i.drv_memc_set_tear_waveform))

[Stack]

• Max Depth = 8
• Call Chain = drv_memc_set_tear_waveform

• >>   hal_dsi_rx_ctrl_init_memc

drv_memc_set_vidc_sync_cnt (Thumb, 16 bytes, Stack size 0 bytes, drv_memc.o(i.drv_memc_set_vidc_sync_cnt))

[Called By]

• >>   hal_dsi_rx_ctrl_init_memc

drv_phy_test_clear (Thumb, 16 bytes, Stack size 0 bytes, drv_phy_common.o(i.drv_phy_test_clear))

[Called By]

• >>   drv_dsi_tx_phy_test_setup
• >>   drv_dsi_rx_set_up_phy

drv_phy_test_lock (Thumb, 24 bytes, Stack size 0 bytes, drv_phy_common.o(i.drv_phy_test_lock))

[Called By]

• >>   drv_dsi_rx_set_up_phy

drv_pwr_efuse_pd (Thumb, 36 bytes, Stack size 0 bytes, drv_pwr.o(i.drv_pwr_efuse_pd))

[Called By]

• >>   drv_efuse_read

drv_pwr_enter_deep_sleep_mode (Thumb, 60 bytes, Stack size 8 bytes, drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode))

[Stack]

• Max Depth = 8
• Call Chain = drv_pwr_enter_deep_sleep_mode

• >>   hal_pwr_enter_deep_sleep_mode

drv_pwr_enter_sleep_mode_ex (Thumb, 34 bytes, Stack size 0 bytes, drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex))

[Called By]

• >>   hal_pwr_enter_normal_sleep_mode

drv_pwr_enter_stop_sleep_mode (Thumb, 132 bytes, Stack size 24 bytes, drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode))

[Stack]

• Max Depth = 24
• Call Chain = drv_pwr_enter_stop_sleep_mode

• >>   drv_pwr_write_lock

• >>   hal_pwr_enter_stop_sleep_mode

drv_pwr_exit_sleep_mode (Thumb, 32 bytes, Stack size 4 bytes, drv_pwr.o(i.drv_pwr_exit_sleep_mode))

[Stack]

• Max Depth = 4
• Call Chain = drv_pwr_exit_sleep_mode

• >>   drv_pwr_write_lock

• >>   hal_pwr_exit_sleep_mode

drv_pwr_get_power_ready_st (Thumb, 10 bytes, Stack size 0 bytes, drv_pwr.o(i.drv_pwr_get_power_ready_st))

[Called By]

• >>   hal_pwr_get_vcc_power_ready

drv_pwr_set_breath_screen_power_sel (Thumb, 34 bytes, Stack size 8 bytes, drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel))

[Stack]

• Max Depth = 8
• Call Chain = drv_pwr_set_breath_screen_power_sel

• >>   drv_pwr_write_lock

• >>   hal_pwr_set_sleep_mode_power

drv_pwr_set_digit_power_sel (Thumb, 34 bytes, Stack size 8 bytes, drv_pwr.o(i.drv_pwr_set_digit_power_sel))

[Stack]

• Max Depth = 8
• Call Chain = drv_pwr_set_digit_power_sel

• >>   drv_pwr_write_lock

• >>   hal_pwr_set_main_power

drv_pwr_set_pll_clk (Thumb, 30 bytes, Stack size 0 bytes, drv_pwr.o(i.drv_pwr_set_pll_clk))

[Called By]

• >>   hal_dsi_rx_ctrl_init_clk
• >>   hal_system_init

drv_pwr_set_wakeup_type (Thumb, 40 bytes, Stack size 4 bytes, drv_pwr.o(i.drv_pwr_set_wakeup_type))

[Stack]

• Max Depth = 4
• Call Chain = drv_pwr_set_wakeup_type

• >>   drv_pwr_write_lock

• >>   hal_pwr_enter_deep_sleep_mode

drv_pwr_write_lock (Thumb, 18 bytes, Stack size 0 bytes, drv_pwr.o(i.drv_pwr_write_lock))

[Called By]

• >>   drv_pwr_set_wakeup_type
• >>   drv_pwr_set_digit_power_sel
• >>   drv_pwr_set_breath_screen_power_sel
• >>   drv_pwr_exit_sleep_mode
• >>   drv_pwr_enter_stop_sleep_mode

drv_rxbr_clear_pkt_buffer (Thumb, 12 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer))

[Called By]

• >>   hal_intl_dcs_rx_receive_pps
• >>   hal_intl_dcs_rx_receive_packet
• >>   check_pkt_buf_rev
• >>   rxbr_irq1_callback

drv_rxbr_clear_status0 (Thumb, 6 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_clear_status0))

[Called By]

• >>   hal_internal_sync_input_resolution_change
• >>   svs_wait_start
• >>   svs_direct_mode_setting
• >>   VPRE_IRQn_Handler
• >>   hal_intl_dcs_rx_receive_packet
• >>   check_pkt_buf_rev
• >>   rxbr_irq1_callback

drv_rxbr_enable_irq (Thumb, 90 bytes, Stack size 8 bytes, drv_rxbr.o(i.drv_rxbr_enable_irq))

[Stack]

• Max Depth = 16
• Call Chain = drv_rxbr_enable_irq ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_set_int
• >>   drv_sys_cfg_clear_pending
• >>   __NVIC_EnableIRQ
• >>   __NVIC_DisableIRQ

• >>   hal_dsi_rx_ctrl_init_rxbr
• >>   hal_dsi_rx_ctrl_deinit

drv_rxbr_frame_drop_cfg (Thumb, 18 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_frame_drop_cfg))

[Called By]

• >>   hal_dsi_rx_ctrl_init_rxbr
• >>   svs_wait_fr_stab

drv_rxbr_hline_rcv1_cfg (Thumb, 14 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg))

[Called By]

• >>   svs_wait_start
• >>   svs_direct_mode_setting

drv_rxbr_hline_rcv_cfg (Thumb, 10 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg))

[Called By]

• >>   hal_dsi_rx_ctrl_init_rxbr

drv_rxbr_register_irq1_callback (Thumb, 6 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_register_irq1_callback))

[Called By]

• >>   hal_internal_vsync_init_rx

drv_rxbr_set_ack_pkt_header (Thumb, 18 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header))

[Called By]

• >>   hal_dsi_rx_ctrl_send_ack_cmd

drv_rxbr_set_color_format (Thumb, 24 bytes, Stack size 8 bytes, drv_rxbr.o(i.drv_rxbr_set_color_format))

[Stack]

• Max Depth = 360
• Call Chain = drv_rxbr_set_color_format ⇒ drv_se_set_rxbr ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_se_set_rxbr

• >>   hal_dsi_rx_ctrl_init_rxbr

drv_rxbr_set_filter_regs (Thumb, 32 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_set_filter_regs))

[Called By]

• >>   hal_intl_dcs_set_auto_hw_filter

drv_rxbr_set_inten (Thumb, 22 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_set_inten))

[Called By]

• >>   hal_dsi_rx_ctrl_init_rxbr
• >>   svs_wait_start
• >>   hal_intl_svs_init_rx
• >>   hal_intl_svs_deinit_rx
• >>   rxbr_irq1_callback

drv_rxbr_set_ltpo_drop_th (Thumb, 18 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th))

[Called By]

• >>   hal_dsi_rx_ctrl_init_rxbr

drv_rxbr_set_usr_cfg (Thumb, 56 bytes, Stack size 20 bytes, drv_rxbr.o(i.drv_rxbr_set_usr_cfg))

[Stack]

• Max Depth = 20
• Call Chain = drv_rxbr_set_usr_cfg

• >>   hal_dsi_rx_ctrl_init_rxbr

drv_rxbr_set_usr_col (Thumb, 10 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_set_usr_col))

[Called By]

• >>   hal_dsi_rx_ctrl_init_rxbr

drv_rxbr_set_usr_row (Thumb, 10 bytes, Stack size 0 bytes, drv_rxbr.o(i.drv_rxbr_set_usr_row))

[Called By]

• >>   hal_dsi_rx_ctrl_init_rxbr

drv_se_init (Thumb, 106 bytes, Stack size 16 bytes, drv_se.o(i.drv_se_init))

[Stack]

• Max Depth = 32
• Call Chain = drv_se_init ⇒ drv_efuse_read

• >>   drv_efuse_read
• >>   drv_efuse_enter_inactive

• >>   drv_common_system_init

drv_se_set_dsc (Thumb, 162 bytes, Stack size 16 bytes, drv_se.o(i.drv_se_set_dsc))

[Stack]

• Max Depth = 352
• Call Chain = drv_se_set_dsc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   tau_log_printf

• >>   drv_dsc_dec_enable

drv_se_set_lcdc (Thumb, 88 bytes, Stack size 16 bytes, drv_se.o(i.drv_se_set_lcdc))

[Stack]

• Max Depth = 352
• Call Chain = drv_se_set_lcdc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   tau_log_printf

• >>   drv_lcdc_vid_hw_start
• >>   drv_lcdc_cmd_start

drv_se_set_memc (Thumb, 54 bytes, Stack size 8 bytes, drv_se.o(i.drv_se_set_memc))

[Stack]

• Max Depth = 344
• Call Chain = drv_se_set_memc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   tau_log_printf

• >>   drv_memc_set_ltpo_mode
• >>   drv_memc_rate_transfer_sel

drv_se_set_rxbr (Thumb, 158 bytes, Stack size 16 bytes, drv_se.o(i.drv_se_set_rxbr))

[Stack]

• Max Depth = 352
• Call Chain = drv_se_set_rxbr ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   tau_log_printf

• >>   drv_rxbr_set_color_format

drv_se_set_vidc (Thumb, 122 bytes, Stack size 16 bytes, drv_se.o(i.drv_se_set_vidc))

[Stack]

• Max Depth = 352
• Call Chain = drv_se_set_vidc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   tau_log_printf

• >>   drv_vidc_set_src_parameter

drv_se_start_rx (Thumb, 16 bytes, Stack size 0 bytes, drv_se.o(i.drv_se_start_rx))

[Called By]

• >>   hal_dsi_rx_ctrl_init

drv_swire_enable (Thumb, 24 bytes, Stack size 0 bytes, drv_swire.o(i.drv_swire_enable))

[Called By]

• >>   hal_swire_init
• >>   hal_swire_deinit

drv_swire_get_pulse_count (Thumb, 6 bytes, Stack size 0 bytes, drv_swire.o(i.drv_swire_get_pulse_count))

[Called By]

• >>   hal_swire_enable

drv_swire_register_callback (Thumb, 6 bytes, Stack size 0 bytes, drv_swire.o(i.drv_swire_register_callback))

[Called By]

• >>   hal_swire_deinit

drv_swire_set_bit_time (Thumb, 18 bytes, Stack size 0 bytes, drv_swire.o(i.drv_swire_set_bit_time))

[Called By]

• >>   hal_swire_init

drv_swire_set_int (Thumb, 64 bytes, Stack size 16 bytes, drv_swire.o(i.drv_swire_set_int))

[Stack]

• Max Depth = 16
• Call Chain = drv_swire_set_int

• >>   drv_sys_cfg_set_int

• >>   hal_swire_enable
• >>   hal_swire_deinit

drv_swire_set_power_down (Thumb, 24 bytes, Stack size 0 bytes, drv_swire.o(i.drv_swire_set_power_down))

[Called By]

• >>   hal_swire_init
• >>   hal_swire_enable

drv_swire_set_pulse_count (Thumb, 6 bytes, Stack size 0 bytes, drv_swire.o(i.drv_swire_set_pulse_count))

[Called By]

• >>   hal_swire_set_pulse

drv_swire_set_trig_mode (Thumb, 24 bytes, Stack size 0 bytes, drv_swire.o(i.drv_swire_set_trig_mode))

[Called By]

• >>   hal_swire_set_timer
• >>   hal_swire_set_pulse
• >>   hal_swire_enable

drv_sys_cfg_clear_all_int (Thumb, 8 bytes, Stack size 0 bytes, drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int))

[Called By]

• >>   hal_system_init

drv_sys_cfg_clear_pending (Thumb, 32 bytes, Stack size 8 bytes, drv_sys_cfg.o(i.drv_sys_cfg_clear_pending))

[Stack]

• Max Depth = 8
• Call Chain = drv_sys_cfg_clear_pending

• >>   drv_dsi_tx_set_int
• >>   drv_vidc_enable_irq
• >>   drv_rxbr_enable_irq
• >>   drv_memc_enable_irq
• >>   drv_dsi_rx_enable_irq
• >>   hal_gpio_set_ap_reset_int
• >>   SWIRE_IRQn_Handler
• >>   AP_NRESET_IRQn_Handler
• >>   drv_gpio_handle_int
• >>   VPRE_IRQn_Handler
• >>   LCDC_IRQn_Handler
• >>   hal_gpio_init_eint
• >>   UART_IRQn_Handler
• >>   DMA_IRQn_Handler
• >>   VIDC_IRQn_Handler
• >>   VPRE1_IRQn_Handler
• >>   MEMC_IRQn_Handler
• >>   drv_lcdc_clear_int
• >>   MIPI_TX_IRQn_Handler
• >>   MIPI_RX_IRQn_Handler
• >>   drv_timer_clear_status_flags

drv_sys_cfg_sel_ap_rst_trig (Thumb, 30 bytes, Stack size 0 bytes, drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig))

[Called By]

• >>   hal_gpio_set_ap_reset_int

drv_sys_cfg_sel_gpio_group (Thumb, 30 bytes, Stack size 0 bytes, drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group))

[Called By]

• >>   hal_gpio_init_eint

drv_sys_cfg_sel_int_trig (Thumb, 32 bytes, Stack size 0 bytes, drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig))

[Called By]

• >>   hal_gpio_init_eint

drv_sys_cfg_sel_swire_timer (Thumb, 18 bytes, Stack size 0 bytes, drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer))

[Called By]

• >>   hal_swire_set_timer

drv_sys_cfg_set_int (Thumb, 30 bytes, Stack size 0 bytes, drv_sys_cfg.o(i.drv_sys_cfg_set_int))

[Called By]

• >>   drv_lcdc_set_int
• >>   drv_dsi_tx_set_int
• >>   drv_vidc_enable_irq
• >>   drv_rxbr_enable_irq
• >>   drv_memc_enable_irq
• >>   drv_dsi_rx_enable_irq
• >>   hal_pwr_enter_stop_sleep_mode
• >>   hal_gpio_set_ap_reset_int
• >>   drv_timer_set_int
• >>   drv_swire_set_int
• >>   drv_gpio_set_int
• >>   drv_uart_enable_int

drv_timer_enable (Thumb, 32 bytes, Stack size 4 bytes, drv_timer.o(i.drv_timer_enable))

[Stack]

• Max Depth = 4
• Call Chain = drv_timer_enable

• >>   drv_timer_get_instance

• >>   hal_swire_enable
• >>   hal_timer_deinit

drv_timer_get_instance (Thumb, 10 bytes, Stack size 0 bytes, drv_timer.o(i.drv_timer_get_instance))

[Called By]

• >>   drv_timer_set_prescaler
• >>   drv_timer_set_compare_val
• >>   drv_timer_enable
• >>   drv_timer_clear_status_flags

drv_timer_set_compare_val (Thumb, 50 bytes, Stack size 16 bytes, drv_timer.o(i.drv_timer_set_compare_val))

[Stack]

• Max Depth = 28
• Call Chain = drv_timer_set_compare_val ⇒ __aeabi_uidivmod

• >>   __aeabi_uidivmod
• >>   drv_timer_get_instance

• >>   hal_swire_set_timer
• >>   drv_timer_handle_interrupt

drv_timer_set_int (Thumb, 68 bytes, Stack size 16 bytes, drv_timer.o(i.drv_timer_set_int))

[Stack]

• Max Depth = 16
• Call Chain = drv_timer_set_int

• >>   drv_sys_cfg_set_int

• >>   hal_timer_deinit
• >>   drv_timer_handle_interrupt

drv_timer_set_prescaler (Thumb, 36 bytes, Stack size 12 bytes, drv_timer.o(i.drv_timer_set_prescaler))

[Stack]

• Max Depth = 12
• Call Chain = drv_timer_set_prescaler

• >>   drv_timer_get_instance

• >>   hal_timer_init

drv_timer_set_repeat (Thumb, 12 bytes, Stack size 0 bytes, drv_timer.o(i.drv_timer_set_repeat))

[Called By]

• >>   hal_timer_set_repeat
• >>   hal_timer_deinit

drv_tx_phy_test_enter (Thumb, 28 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_tx_phy_test_enter))

[Called By]

• >>   drv_dsi_tx_phy_test_setup

drv_tx_phy_test_exit (Thumb, 28 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_tx_phy_test_exit))

[Called By]

• >>   drv_dsi_tx_phy_test_setup

drv_tx_phy_test_write_code (Thumb, 34 bytes, Stack size 0 bytes, drv_dsi_tx.o(i.drv_tx_phy_test_write_code))

[Called By]

• >>   drv_dsi_tx_phy_test_setup

drv_uart_abort_recv (Thumb, 46 bytes, Stack size 12 bytes, drv_uart.o(i.drv_uart_abort_recv))

[Stack]

• Max Depth = 32
• Call Chain = drv_uart_abort_recv ⇒ drv_uart_reset_rx_fifo ⇒ drv_uart_get_instance

• >>   drv_uart_reset_rx_fifo
• >>   drv_uart_get_instance
• >>   drv_uart_config_int

• >>   UART_IRQn_Handler

drv_uart_abort_send (Thumb, 46 bytes, Stack size 12 bytes, drv_uart.o(i.drv_uart_abort_send))

[Stack]

• Max Depth = 32
• Call Chain = drv_uart_abort_send ⇒ drv_uart_reset_tx_fifo ⇒ drv_uart_get_instance

• >>   drv_uart_reset_tx_fifo
• >>   drv_uart_get_instance
• >>   drv_uart_config_int

• >>   UART_IRQn_Handler

drv_uart_config_int (Thumb, 20 bytes, Stack size 0 bytes, drv_uart.o(i.drv_uart_config_int))

[Called By]

• >>   drv_uart_abort_send
• >>   drv_uart_abort_recv
• >>   UART_IRQn_Handler

drv_uart_enable_int (Thumb, 84 bytes, Stack size 24 bytes, drv_uart.o(i.drv_uart_enable_int))

[Stack]

• Max Depth = 36
• Call Chain = drv_uart_enable_int ⇒ drv_uart_get_instance

• >>   drv_sys_cfg_set_int
• >>   drv_uart_get_instance

• >>   drv_uart_init

drv_uart_get_instance (Thumb, 36 bytes, Stack size 12 bytes, drv_uart.o(i.drv_uart_get_instance))

[Stack]

• Max Depth = 12
• Call Chain = drv_uart_get_instance

• >>   drv_uart_trans_create_handle
• >>   drv_uart_init
• >>   drv_uart_reset_tx_fifo
• >>   drv_uart_reset_rx_fifo
• >>   drv_uart_enable_int
• >>   drv_uart_abort_send
• >>   drv_uart_abort_recv

drv_uart_init (Thumb, 206 bytes, Stack size 16 bytes, drv_uart.o(i.drv_uart_init))

[Stack]

• Max Depth = 52
• Call Chain = drv_uart_init ⇒ drv_uart_set_baud_rate ⇒ __aeabi_uidivmod

• >>   drv_uart_set_baud_rate
• >>   drv_uart_get_instance
• >>   drv_uart_enable_int
• >>   drv_uart_enable_clk

• >>   hal_uart_init

drv_uart_reset_rx_fifo (Thumb, 28 bytes, Stack size 8 bytes, drv_uart.o(i.drv_uart_reset_rx_fifo))

[Stack]

• Max Depth = 20
• Call Chain = drv_uart_reset_rx_fifo ⇒ drv_uart_get_instance

• >>   drv_uart_get_instance

• >>   drv_uart_abort_recv

drv_uart_reset_tx_fifo (Thumb, 28 bytes, Stack size 8 bytes, drv_uart.o(i.drv_uart_reset_tx_fifo))

[Stack]

• Max Depth = 20
• Call Chain = drv_uart_reset_tx_fifo ⇒ drv_uart_get_instance

• >>   drv_uart_get_instance

• >>   drv_uart_abort_send

drv_uart_send_blocking (Thumb, 26 bytes, Stack size 0 bytes, drv_uart.o(i.drv_uart_send_blocking))

[Called By]

• >>   hal_uart_send_blocking

drv_uart_set_baud_rate (Thumb, 84 bytes, Stack size 24 bytes, drv_uart.o(i.drv_uart_set_baud_rate))

[Stack]

• Max Depth = 36
• Call Chain = drv_uart_set_baud_rate ⇒ __aeabi_uidivmod

• >>   __aeabi_uidivmod

• >>   drv_uart_init

drv_uart_trans_create_handle (Thumb, 72 bytes, Stack size 24 bytes, drv_uart.o(i.drv_uart_trans_create_handle))

[Stack]

• Max Depth = 36
• Call Chain = drv_uart_trans_create_handle ⇒ drv_uart_get_instance

• >>   __aeabi_memclr4
• >>   drv_uart_get_instance

• >>   hal_uart_init

drv_vidc_clear_irq (Thumb, 10 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_clear_irq))

[Called By]

• >>   vidc_callback

drv_vidc_enable (Thumb, 26 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_enable))

[Called By]

• >>   hal_internal_sync_input_resolution_change
• >>   hal_dsi_rx_ctrl_stop
• >>   hal_dsi_rx_ctrl_start
• >>   rxbr_irq1_callback

drv_vidc_enable_irq (Thumb, 58 bytes, Stack size 8 bytes, drv_vidc.o(i.drv_vidc_enable_irq))

[Stack]

• Max Depth = 16
• Call Chain = drv_vidc_enable_irq ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_set_int
• >>   drv_sys_cfg_clear_pending

• >>   hal_dsi_rx_ctrl_init_vidc
• >>   hal_dsi_rx_ctrl_deinit

drv_vidc_get_int_source (Thumb, 40 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_get_int_source))

[Called By]

• >>   vidc_callback

drv_vidc_get_irq_status (Thumb, 20 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_get_irq_status))

[Called By]

• >>   vidc_callback

drv_vidc_init_module_enable (Thumb, 36 bytes, Stack size 12 bytes, drv_vidc.o(i.drv_vidc_init_module_enable))

[Stack]

• Max Depth = 12
• Call Chain = drv_vidc_init_module_enable

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_register_callback (Thumb, 6 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_register_callback))

[Called By]

• >>   hal_internal_vsync_init_rx

drv_vidc_reset (Thumb, 8 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_reset))

[Called By]

• >>   hal_internal_sync_input_resolution_change
• >>   vpre_err_reset

drv_vidc_set_circ_mode_enable (Thumb, 24 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_circ_mode_enable))

[Called By]

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_dither_config (Thumb, 50 bytes, Stack size 8 bytes, drv_vidc.o(i.drv_vidc_set_dither_config))

[Stack]

• Max Depth = 8
• Call Chain = drv_vidc_set_dither_config

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_dst_parameter (Thumb, 86 bytes, Stack size 16 bytes, drv_vidc.o(i.drv_vidc_set_dst_parameter))

[Stack]

• Max Depth = 16
• Call Chain = drv_vidc_set_dst_parameter

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_honly_hcoef0 (Thumb, 6 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_honly_hcoef0))

[Called By]

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_honly_hinitb (Thumb, 38 bytes, Stack size 12 bytes, drv_vidc.o(i.drv_vidc_set_honly_hinitb))

[Stack]

• Max Depth = 12
• Call Chain = drv_vidc_set_honly_hinitb

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_honly_hinitr (Thumb, 42 bytes, Stack size 16 bytes, drv_vidc.o(i.drv_vidc_set_honly_hinitr))

[Stack]

• Max Depth = 16
• Call Chain = drv_vidc_set_honly_hinitr

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_irqen (Thumb, 22 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_irqen))

[Called By]

• >>   hal_dsi_rx_ctrl_init_vidc
• >>   vidc_callback

drv_vidc_set_mirror (Thumb, 16 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_mirror))

[Called By]

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_pentile_swap (Thumb, 20 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_pentile_swap))

[Called By]

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_pu_ctrl (Thumb, 6 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_pu_ctrl))

[Called By]

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_rotation (Thumb, 18 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_rotation))

[Called By]

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_scld_hcoef0 (Thumb, 6 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_scld_hcoef0))

[Called By]

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_scld_hcoef1 (Thumb, 6 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_scld_hcoef1))

[Called By]

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_scld_step (Thumb, 14 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_scld_step))

[Called By]

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_scld_vcoef0 (Thumb, 6 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_scld_vcoef0))

[Called By]

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_scld_vcoef1 (Thumb, 6 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_scld_vcoef1))

[Called By]

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_src_parameter (Thumb, 28 bytes, Stack size 16 bytes, drv_vidc.o(i.drv_vidc_set_src_parameter))

[Stack]

• Max Depth = 368
• Call Chain = drv_vidc_set_src_parameter ⇒ drv_se_set_vidc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_se_set_vidc

• >>   hal_dsi_rx_ctrl_init_vidc

drv_vidc_set_vintp_config (Thumb, 52 bytes, Stack size 0 bytes, drv_vidc.o(i.drv_vidc_set_vintp_config))

[Called By]

• >>   hal_dsi_rx_ctrl_init_vidc

fputc (Thumb, 42 bytes, Stack size 24 bytes, tau_log.o(i.fputc))

[Stack]

• Max Depth = 64
• Call Chain = fputc ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_uart_send_blocking
• >>   tau_log_push_log

• printfa.o(i.__0printf)

google_p6a_demo (Thumb, 48 bytes, Stack size 0 bytes, p6a_demo.o(i.google_p6a_demo))

[Stack]

• Max Depth = 584
• Call Chain = google_p6a_demo ⇒ app_system_process ⇒ app_system_resume ⇒ app_display_init ⇒ app_mipi_rx_init ⇒ hal_dsi_rx_ctrl_init ⇒ hal_dsi_rx_ctrl_init_vidc ⇒ drv_vidc_set_src_parameter ⇒ drv_se_set_vidc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_pwr_set_main_power
• >>   hal_dsi_rx_ctrl_dcs_async_handler
• >>   app_display_init
• >>   app_system_process
• >>   tau_log_printf

• >>   main

hal_dsi_rx_ctrl_create_handle (Thumb, 60 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle))

[Stack]

• Max Depth = 8
• Call Chain = hal_dsi_rx_ctrl_create_handle

• >>   __aeabi_memclr4

• >>   app_mipi_rx_init

hal_dsi_rx_ctrl_dcs_async_handler (Thumb, 60 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler))

[Stack]

• Max Depth = 8
• Call Chain = hal_dsi_rx_ctrl_dcs_async_handler

• >>   dcs_packet_get_fifo_header
• >>   dcs_packet_free_fifo_header

• >>   google_p6a_demo
• >>   hal_intl_dcs_rx_get_dcs_packet_data

hal_dsi_rx_ctrl_deinit (Thumb, 132 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit))

[Stack]

• Max Depth = 24
• Call Chain = hal_dsi_rx_ctrl_deinit ⇒ hal_internal_vsync_set_rx_state ⇒ hal_intl_svs_deinit_rx

• >>   hal_internal_vsync_set_rx_state
• >>   hal_internal_vsync_get_tx_state
• >>   hal_internal_vsync_get_rx_state
• >>   drv_vidc_enable_irq
• >>   drv_rxbr_enable_irq
• >>   drv_memc_enable_irq
• >>   drv_dsi_rx_enable_irq
• >>   drv_dsc_dec_disable
• >>   drv_crgu_set_reset
• >>   drv_crgu_reset_modules
• >>   drv_crgu_enable_clock

• >>   app_system_suspend

hal_dsi_rx_ctrl_get_max_ret_size (Thumb, 28 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size))

[Stack]

• Max Depth = 8
• Call Chain = hal_dsi_rx_ctrl_get_max_ret_size

• >>   drv_dsi_rx_get_max_ret_size

• >>   ap_dcs_read

hal_dsi_rx_ctrl_init (Thumb, 158 bytes, Stack size 16 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init))

[Stack]

• Max Depth = 552
• Call Chain = hal_dsi_rx_ctrl_init ⇒ hal_dsi_rx_ctrl_init_vidc ⇒ drv_vidc_set_src_parameter ⇒ drv_se_set_vidc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_internal_vsync_set_rx_state
• >>   hal_internal_vsync_init_rx
• >>   drv_se_start_rx
• >>   drv_dsc_dec_set_irqen
• >>   drv_dsc_dec_enable
• >>   hal_dsi_rx_ctrl_init_vidc
• >>   hal_dsi_rx_ctrl_init_rxbr
• >>   hal_dsi_rx_ctrl_init_memc
• >>   hal_dsi_rx_ctrl_init_dsi_rx
• >>   hal_dsi_rx_ctrl_init_clk
• >>   __aeabi_uidivmod

• >>   hal_internal_sync_input_resolution_change
• >>   app_mipi_rx_init

hal_dsi_rx_ctrl_pre_init_pps (Thumb, 50 bytes, Stack size 12 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps))

[Stack]

• Max Depth = 12
• Call Chain = hal_dsi_rx_ctrl_pre_init_pps

• >>   app_mipi_rx_init

hal_dsi_rx_ctrl_send_ack_cmd (Thumb, 210 bytes, Stack size 48 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd))

[Stack]

• Max Depth = 384
• Call Chain = hal_dsi_rx_ctrl_send_ack_cmd ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_rxbr_set_ack_pkt_header
• >>   tau_log_printf

• >>   ap_dcs_read

hal_dsi_rx_ctrl_start (Thumb, 42 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start))

[Stack]

• Max Depth = 24
• Call Chain = hal_dsi_rx_ctrl_start ⇒ hal_internal_vsync_set_rx_state ⇒ hal_intl_svs_deinit_rx

• >>   hal_internal_vsync_set_rx_state
• >>   drv_vidc_enable
• >>   drv_dsi_rx_power_up

• >>   hal_internal_sync_input_resolution_change
• >>   app_mipi_rx_start_cb

hal_dsi_rx_ctrl_stop (Thumb, 42 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop))

[Stack]

• Max Depth = 24
• Call Chain = hal_dsi_rx_ctrl_stop ⇒ hal_internal_vsync_set_rx_state ⇒ hal_intl_svs_deinit_rx

• >>   hal_internal_vsync_set_rx_state
• >>   drv_vidc_enable
• >>   drv_dsi_rx_shut_down

• >>   app_system_suspend

hal_dsi_rx_ctrl_toggle_resolution (Thumb, 28 bytes, Stack size 8 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution))

[Stack]

• Max Depth = 624
• Call Chain = hal_dsi_rx_ctrl_toggle_resolution ⇒ hal_internal_sync_input_resolution_change ⇒ hal_dsi_rx_ctrl_init ⇒ hal_dsi_rx_ctrl_init_vidc ⇒ drv_vidc_set_src_parameter ⇒ drv_se_set_vidc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_internal_sync_input_resolution_change

• >>   pps_update_handle

hal_dsi_tx_ctrl_create_handle (Thumb, 48 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle))

[Stack]

• Max Depth = 8
• Call Chain = hal_dsi_tx_ctrl_create_handle

• >>   __aeabi_memclr4

• >>   app_mipi_tx_init

hal_dsi_tx_ctrl_deinit (Thumb, 102 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit))

[Stack]

• Max Depth = 32
• Call Chain = hal_dsi_tx_ctrl_deinit ⇒ hal_internal_vsync_set_tx_state ⇒ hal_internal_vsync_deinit

• >>   drv_crgu_reset_modules
• >>   drv_crgu_enable_clock
• >>   hal_internal_vsync_set_tx_state
• >>   hal_internal_sync_register_lcdc_cb
• >>   __aeabi_memclr4

• >>   app_system_suspend

hal_dsi_tx_ctrl_gen_a_tear_signal (Thumb, 34 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal))

[Stack]

• Max Depth = 8
• Call Chain = hal_dsi_tx_ctrl_gen_a_tear_signal

• >>   drv_memc_set_tear_mode
• >>   drv_memc_get_tear_mode
• >>   drv_memc_gen_a_tear_signal

• >>   hal_internal_sync_input_resolution_change

hal_dsi_tx_ctrl_init (Thumb, 110 bytes, Stack size 16 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init))

[Stack]

• Max Depth = 432
• Call Chain = hal_dsi_tx_ctrl_init ⇒ hal_dsi_tx_init_timing ⇒ hal_dsi_tx_cmd_mode_cal_timing ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_dsi_tx_powerup
• >>   drv_dsi_tx_phy_status_ready
• >>   hal_lcdc_init_clk
• >>   hal_lcdc_init_cfg
• >>   hal_dsi_tx_init_timing
• >>   hal_dsi_tx_init_cfg
• >>   hal_dsi_tx_ctrl_init_clk
• >>   hal_internal_vsync_set_tx_state
• >>   hal_internal_vsync_init_tx
• >>   hal_internal_sync_register_lcdc_cb

• >>   hal_tx_frame_rate_adjust
• >>   app_mipi_tx_init

hal_dsi_tx_ctrl_set_overwrite_rgb (Thumb, 8 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb))

[Stack]

• Max Depth = 8
• Call Chain = hal_dsi_tx_ctrl_set_overwrite_rgb

• >>   drv_lcdc_config_overwrite_rgb

• >>   app_mipi_tx_init

hal_dsi_tx_ctrl_set_tear_mode (Thumb, 10 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode))

[Stack]

• Max Depth = 376
• Call Chain = hal_dsi_tx_ctrl_set_tear_mode ⇒ hal_internal_vsync_set_tear_mode ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_internal_vsync_set_tear_mode

• >>   pps_update_handle
• >>   app_mipi_tx_start
• >>   app_mipi_tx_init
• >>   ap_dcs_set_enter_sleep_mode

hal_dsi_tx_ctrl_start (Thumb, 134 bytes, Stack size 24 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start))

[Stack]

• Max Depth = 392
• Call Chain = hal_dsi_tx_ctrl_start ⇒ hal_lcdc_start ⇒ drv_lcdc_vid_hw_start ⇒ drv_se_set_lcdc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_lcdc_function_enable
• >>   drv_lcdc_enable_shadow_reg
• >>   drv_lcdc_cfg_int_frame
• >>   drv_dsi_tx_shutdown
• >>   drv_dsi_tx_powerup
• >>   drv_dsi_tx_phy_clock_lane_auto_lp
• >>   drv_dsi_tx_mode
• >>   drv_dsi_tx_config_eotp
• >>   drv_dsi_tx_command_mode_cfg
• >>   hal_lcdc_start
• >>   hal_intl_fb_get_memc_flow_mode
• >>   hal_internal_vsync_set_tx_state

• >>   app_mipi_tx_start

hal_dsi_tx_ctrl_stop (Thumb, 52 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop))

[Stack]

• Max Depth = 32
• Call Chain = hal_dsi_tx_ctrl_stop ⇒ drv_lcdc_set_int ⇒ drv_lcdc_clear_int ⇒ drv_sys_cfg_clear_pending

• >>   drv_lcdc_stop_display
• >>   drv_lcdc_set_int
• >>   drv_dsi_tx_shutdown
• >>   drv_dsi_tx_set_int
• >>   hal_internal_vsync_set_tx_state

• >>   app_system_suspend

hal_dsi_tx_ctrl_write_cmd (Thumb, 202 bytes, Stack size 48 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd))

[Stack]

• Max Depth = 84
• Call Chain = hal_dsi_tx_ctrl_write_cmd ⇒ hal_dsi_tx_send_cmd ⇒ drv_dsi_tx_phy_status_stopstate ⇒ __ARM_common_switch8

• >>   drv_dsi_tx_get_cmd_status
• >>   drv_dsi_tx_command_put_payload
• >>   hal_dsi_tx_send_cmd
• >>   hal_internal_vsync_get_tx_state

• >>   app_mipi_tx_start
• >>   app_init_panel
• >>   ap_dcs_set_enter_sleep_mode
• >>   ap_dcs_set_display_on
• >>   ap_dcs_set_backlight

hal_gpio_config_pad (Thumb, 58 bytes, Stack size 16 bytes, hal_gpio.o(i.hal_gpio_config_pad))

[Stack]

• Max Depth = 40
• Call Chain = hal_gpio_config_pad ⇒ hal_gpio_init_output ⇒ hal_gpio_set_mode ⇒ drv_gpio_set_mode

• >>   hal_gpio_init_output
• >>   hal_gpio_set_mode
• >>   hal_gpio_init_input

• >>   app_gpio_init

hal_gpio_ctrl_eint (Thumb, 18 bytes, Stack size 8 bytes, hal_gpio.o(i.hal_gpio_ctrl_eint))

[Stack]

• Max Depth = 24
• Call Chain = hal_gpio_ctrl_eint ⇒ drv_gpio_set_int

• >>   drv_gpio_set_int

• >>   hal_pwr_set_stop_sleep_wakeup_pin

hal_gpio_init_eint (Thumb, 58 bytes, Stack size 24 bytes, hal_gpio.o(i.hal_gpio_init_eint))

[Stack]

• Max Depth = 40
• Call Chain = hal_gpio_init_eint ⇒ hal_gpio_set_mode ⇒ drv_gpio_set_mode

• >>   drv_sys_cfg_sel_int_trig
• >>   drv_sys_cfg_sel_gpio_group
• >>   drv_sys_cfg_clear_pending
• >>   drv_gpio_set_ioe
• >>   hal_gpio_set_mode

• >>   hal_pwr_set_stop_sleep_wakeup_pin

hal_gpio_init_input (Thumb, 22 bytes, Stack size 8 bytes, hal_gpio.o(i.hal_gpio_init_input))

[Stack]

• Max Depth = 24
• Call Chain = hal_gpio_init_input ⇒ hal_gpio_set_mode ⇒ drv_gpio_set_mode

• >>   drv_gpio_set_ioe
• >>   hal_gpio_set_mode

• >>   hal_gpio_config_pad

hal_gpio_init_output (Thumb, 28 bytes, Stack size 8 bytes, hal_gpio.o(i.hal_gpio_init_output))

[Stack]

• Max Depth = 24
• Call Chain = hal_gpio_init_output ⇒ hal_gpio_set_mode ⇒ drv_gpio_set_mode

• >>   drv_gpio_set_ioe
• >>   hal_gpio_set_mode
• >>   drv_gpio_set_output_data

• >>   hal_gpio_config_pad
• >>   app_system_suspend
• >>   app_mipi_tx_start
• >>   ap_dcs_set_enter_sleep_mode

hal_gpio_reg_eint_cb (Thumb, 22 bytes, Stack size 8 bytes, hal_gpio.o(i.hal_gpio_reg_eint_cb))

[Stack]

• Max Depth = 8
• Call Chain = hal_gpio_reg_eint_cb

• >>   drv_gpio_register_callback

• >>   hal_pwr_set_stop_sleep_wakeup_pin

hal_gpio_set_ap_reset_int (Thumb, 76 bytes, Stack size 16 bytes, hal_gpio.o(i.hal_gpio_set_ap_reset_int))

[Stack]

• Max Depth = 24
• Call Chain = hal_gpio_set_ap_reset_int ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_set_int
• >>   drv_sys_cfg_sel_ap_rst_trig
• >>   drv_sys_cfg_clear_pending
• >>   drv_gpio_register_ap_reset_callback

• >>   hal_pwr_set_stop_sleep_wakeup_pin
• >>   app_system_suspend
• >>   app_mipi_rx_start_cb
• >>   app_mipi_rx_init
• >>   ap_rstn_pull_high_cb
• >>   ap_rstn_pull_down_cb
• >>   ap_dcs_set_enter_sleep_mode

hal_gpio_set_mode (Thumb, 92 bytes, Stack size 8 bytes, hal_gpio.o(i.hal_gpio_set_mode))

[Stack]

• Max Depth = 16
• Call Chain = hal_gpio_set_mode ⇒ drv_gpio_set_mode

• >>   drv_gpio_set_mode

• >>   hal_system_init
• >>   hal_swire_init
• >>   hal_gpio_init_output
• >>   hal_gpio_config_pad
• >>   hal_gpio_init_input
• >>   hal_gpio_init_eint

hal_gpio_set_output_data (Thumb, 8 bytes, Stack size 8 bytes, hal_gpio.o(i.hal_gpio_set_output_data))

[Stack]

• Max Depth = 8
• Call Chain = hal_gpio_set_output_data

• >>   drv_gpio_set_output_data

• >>   app_tx_panel_reset
• >>   ap_dcs_set_enter_sleep_mode

hal_internal_sync_get_hight_performan_mode (Thumb, 10 bytes, Stack size 0 bytes, hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode))

[Called By]

• >>   hal_dsi_tx_vid_mode_cal_timing
• >>   hal_dsi_tx_init_dpi_timing
• >>   hal_dsi_tx_cmd_mode_cal_timing
• >>   hal_intl_fb_check_bandwidth

hal_internal_sync_input_resolution_change (Thumb, 336 bytes, Stack size 64 bytes, hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change))

[Stack]

• Max Depth = 616
• Call Chain = hal_internal_sync_input_resolution_change ⇒ hal_dsi_rx_ctrl_init ⇒ hal_dsi_rx_ctrl_init_vidc ⇒ drv_vidc_set_src_parameter ⇒ drv_se_set_vidc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_vidc_enable
• >>   hal_dsi_tx_ctrl_gen_a_tear_signal
• >>   hal_dsi_rx_ctrl_start
• >>   hal_dsi_rx_ctrl_init
• >>   delayUs
• >>   tau_log_printf
• >>   hal_intl_fb_cal_fb_info
• >>   drv_vidc_reset
• >>   drv_rxbr_clear_status0
• >>   hal_vsync_reset_lcdc_scaler
• >>   hal_internal_vsync_set_tear_mode
• >>   hal_internal_vsync_get_sync_line
• >>   __aeabi_memcpy4

• >>   hal_dsi_rx_ctrl_toggle_resolution

hal_internal_sync_register_lcdc_cb (Thumb, 8 bytes, Stack size 0 bytes, hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb))

[Called By]

• >>   hal_dsi_tx_ctrl_init
• >>   hal_dsi_tx_ctrl_deinit

hal_internal_vsync_deinit (Thumb, 22 bytes, Stack size 8 bytes, hal_internal_vsync.o(i.hal_internal_vsync_deinit))

[Stack]

• Max Depth = 8
• Call Chain = hal_internal_vsync_deinit

• >>   __aeabi_memclr4

• >>   hal_internal_vsync_set_rx_state
• >>   hal_internal_vsync_set_tx_state

hal_internal_vsync_get_rx_state (Thumb, 6 bytes, Stack size 0 bytes, hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state))

[Called By]

• >>   hal_dsi_rx_ctrl_deinit

hal_internal_vsync_get_sync_line (Thumb, 16 bytes, Stack size 0 bytes, hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line))

[Called By]

• >>   hal_lcdc_timinggen_config
• >>   hal_internal_sync_input_resolution_change
• >>   hal_internal_vsync_set_tear_mode

hal_internal_vsync_get_tx_state (Thumb, 6 bytes, Stack size 0 bytes, hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state))

[Called By]

• >>   hal_tx_frame_rate_adjust
• >>   hal_dsi_tx_send_cmd
• >>   hal_dsi_tx_ctrl_write_cmd
• >>   hal_dsi_rx_ctrl_deinit
• >>   svs_wait_start

hal_internal_vsync_init_rx (Thumb, 206 bytes, Stack size 56 bytes, hal_internal_vsync.o(i.hal_internal_vsync_init_rx))

[Stack]

• Max Depth = 216
• Call Chain = hal_internal_vsync_init_rx ⇒ hal_intl_svs_init_rx ⇒ hal_intl_svs_update_rxbr_clk ⇒ __aeabi_dmul ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   hal_intl_svs_init_rx
• >>   hal_intl_fb_cal_fb_info
• >>   hal_intl_dcs_init_sw_fltr
• >>   drv_vidc_register_callback
• >>   drv_rxbr_register_irq1_callback
• >>   dcs_packet_fifo_init
• >>   soft_pro_motion_init
• >>   check_mipi_rx_tx_video_info
• >>   hal_intl_fb_get_user_flow
• >>   __aeabi_memcpy4

• >>   hal_dsi_rx_ctrl_init

hal_internal_vsync_init_tx (Thumb, 194 bytes, Stack size 80 bytes, hal_internal_vsync.o(i.hal_internal_vsync_init_tx))

[Stack]

• Max Depth = 220
• Call Chain = hal_internal_vsync_init_tx ⇒ hal_intl_fb_cal_fb_info ⇒ hal_intl_fb_edge_resize ⇒ __aeabi_uidivmod

• >>   hal_intl_fb_cal_fb_info
• >>   check_mipi_rx_tx_video_info
• >>   __aeabi_memclr4
• >>   __aeabi_memcpy4

• >>   hal_dsi_tx_ctrl_init

hal_internal_vsync_set_rx_state (Thumb, 28 bytes, Stack size 8 bytes, hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state))

[Stack]

• Max Depth = 16
• Call Chain = hal_internal_vsync_set_rx_state ⇒ hal_intl_svs_deinit_rx

• >>   hal_intl_svs_deinit_rx
• >>   hal_internal_vsync_deinit
• >>   hal_intl_fb_get_user_flow

• >>   hal_dsi_rx_ctrl_stop
• >>   hal_dsi_rx_ctrl_start
• >>   hal_dsi_rx_ctrl_init
• >>   hal_dsi_rx_ctrl_deinit

hal_internal_vsync_set_tear_mode (Thumb, 424 bytes, Stack size 32 bytes, hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode))

[Stack]

• Max Depth = 368
• Call Chain = hal_internal_vsync_set_tear_mode ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_lcdc_function_enable
• >>   drv_lcdc_function_disable
• >>   drv_lcdc_config_int_single
• >>   drv_memc_set_tear_mode
• >>   tau_log_printf
• >>   drv_memc_set_frame_drop_select
• >>   drv_lcdc_set_tear_line
• >>   drv_lcdc_config_acc_command_mode
• >>   hal_internal_vsync_get_sync_line
• >>   __aeabi_idivmod
• >>   __aeabi_uidivmod

• >>   hal_internal_sync_input_resolution_change
• >>   hal_dsi_tx_ctrl_set_tear_mode

hal_internal_vsync_set_tx_state (Thumb, 78 bytes, Stack size 16 bytes, hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state))

[Stack]

• Max Depth = 24
• Call Chain = hal_internal_vsync_set_tx_state ⇒ hal_internal_vsync_deinit

• >>   drv_lcdc_function_disable
• >>   hal_intl_svs_deinit_tx
• >>   hal_internal_vsync_deinit
• >>   soft_pro_motion_init
• >>   hal_intl_fb_get_user_flow

• >>   hal_tx_frame_rate_adjust
• >>   hal_dsi_tx_ctrl_stop
• >>   hal_dsi_tx_ctrl_start
• >>   hal_dsi_tx_ctrl_init
• >>   hal_dsi_tx_ctrl_deinit

hal_intl_dcs_init_sw_fltr (Thumb, 90 bytes, Stack size 28 bytes, hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr))

[Stack]

• Max Depth = 28
• Call Chain = hal_intl_dcs_init_sw_fltr

• >>   hal_internal_vsync_init_rx

hal_intl_dcs_set_auto_hw_filter (Thumb, 130 bytes, Stack size 48 bytes, hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter))

[Stack]

• Max Depth = 48
• Call Chain = hal_intl_dcs_set_auto_hw_filter

• >>   drv_rxbr_set_filter_regs
• >>   __aeabi_memset

• >>   hal_dsi_rx_ctrl_init_rxbr

hal_intl_fb_cal_fb_info (Thumb, 780 bytes, Stack size 80 bytes, hal_internal_fb.o(i.hal_intl_fb_cal_fb_info))

[Stack]

• Max Depth = 140
• Call Chain = hal_intl_fb_cal_fb_info ⇒ hal_intl_fb_edge_resize ⇒ __aeabi_uidivmod

• >>   hal_intl_fb_flow_control_adapter
• >>   hal_intl_fb_edge_resize
• >>   hal_intl_fb_check_bandwidth
• >>   ha_intl_fb_check_pu_size
• >>   __aeabi_memclr4
• >>   __aeabi_memcpy4
• >>   __aeabi_memcpy

• >>   hal_internal_vsync_init_rx
• >>   hal_internal_sync_input_resolution_change
• >>   hal_internal_vsync_init_tx

hal_intl_fb_get_memc_flow_mode (Thumb, 6 bytes, Stack size 0 bytes, hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode))

[Called By]

• >>   hal_lcdc_timinggen_config
• >>   hal_lcdc_start
• >>   hal_dsi_rx_ctrl_init_rxbr
• >>   hal_dsi_rx_ctrl_init_memc
• >>   hal_dsi_tx_ctrl_start

hal_intl_fb_get_rx_fb_info (Thumb, 12 bytes, Stack size 8 bytes, hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info))

[Stack]

• Max Depth = 8
• Call Chain = hal_intl_fb_get_rx_fb_info

• >>   __aeabi_memcpy4

• >>   hal_dsi_rx_ctrl_init_vidc
• >>   hal_dsi_rx_ctrl_init_rxbr
• >>   hal_dsi_rx_ctrl_init_memc
• >>   svs_direct_mode_setting

hal_intl_fb_get_tx_fb_info (Thumb, 12 bytes, Stack size 8 bytes, hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info))

[Stack]

• Max Depth = 8
• Call Chain = hal_intl_fb_get_tx_fb_info

• >>   __aeabi_memcpy4

• >>   hal_lcdc_postproc_config
• >>   hal_lcdc_init_cfg

hal_intl_fb_get_user_flow (Thumb, 6 bytes, Stack size 0 bytes, hal_internal_fb.o(i.hal_intl_fb_get_user_flow))

[Called By]

• >>   hal_lcdc_start
• >>   hal_dsi_tx_vid_mode_cal_timing
• >>   hal_internal_vsync_set_rx_state
• >>   hal_internal_vsync_init_rx
• >>   hal_intl_svs_init_rx
• >>   rxbr_irq1_callback
• >>   hal_internal_vsync_set_tx_state

hal_intl_svs_deinit_rx (Thumb, 32 bytes, Stack size 8 bytes, hal_internal_svs.o(i.hal_intl_svs_deinit_rx))

[Stack]

• Max Depth = 8
• Call Chain = hal_intl_svs_deinit_rx

• >>   drv_rxbr_set_inten

• >>   hal_internal_vsync_set_rx_state

hal_intl_svs_deinit_tx (Thumb, 10 bytes, Stack size 0 bytes, hal_internal_svs.o(i.hal_intl_svs_deinit_tx))

[Called By]

• >>   hal_internal_vsync_set_tx_state

hal_intl_svs_handle (Thumb, 24 bytes, Stack size 8 bytes, hal_internal_svs.o(i.hal_intl_svs_handle))

[Stack]

• Max Depth = 8
• Call Chain = hal_intl_svs_handle

• >>   rxbr_irq1_callback

hal_intl_svs_init_rx (Thumb, 120 bytes, Stack size 16 bytes, hal_internal_svs.o(i.hal_intl_svs_init_rx))

[Stack]

• Max Depth = 160
• Call Chain = hal_intl_svs_init_rx ⇒ hal_intl_svs_update_rxbr_clk ⇒ __aeabi_dmul ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   hal_intl_svs_update_rxbr_clk
• >>   drv_rxbr_set_inten
• >>   hal_intl_fb_get_user_flow
• >>   __aeabi_memclr4

• >>   hal_internal_vsync_init_rx

hal_intl_svs_init_tx (Thumb, 16 bytes, Stack size 8 bytes, hal_internal_svs.o(i.hal_intl_svs_init_tx))

[Stack]

• Max Depth = 8
• Call Chain = hal_intl_svs_init_tx

• >>   hal_dsi_tx_vid_mode_cal_timing

hal_intl_svs_set_rx_vtt (Thumb, 6 bytes, Stack size 0 bytes, hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt))

[Called By]

• >>   rxbr_irq1_callback

hal_intl_svs_update_rxbr_clk (Thumb, 52 bytes, Stack size 16 bytes, hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk))

[Stack]

• Max Depth = 144
• Call Chain = hal_intl_svs_update_rxbr_clk ⇒ __aeabi_dmul ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   drv_crgu_get_rxbr_clk
• >>   __aeabi_ui2d
• >>   __aeabi_d2uiz
• >>   __aeabi_dmul

• >>   hal_intl_svs_init_rx

hal_lcdc_displayproc_config (Thumb, 94 bytes, Stack size 24 bytes, hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config))

[Stack]

• Max Depth = 24
• Call Chain = hal_lcdc_displayproc_config

• >>   drv_lcdc_endianness_config
• >>   drv_lcdc_crop_hact

• >>   hal_lcdc_init_cfg

hal_lcdc_postproc_config (Thumb, 276 bytes, Stack size 88 bytes, hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config))

[Stack]

• Max Depth = 232
• Call Chain = hal_lcdc_postproc_config ⇒ hal_lcdc_upscaler_config ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   drv_lcdc_function_enable
• >>   drv_lcdc_function_disable
• >>   drv_lcdc_fldc_config
• >>   drv_lcdc_fc_config
• >>   drv_lcdc_edge_enh_config
• >>   drv_lcdc_edge_dect_config
• >>   drv_lcdc_dith_config
• >>   drv_lcdc_bcsa_config
• >>   hal_lcdc_upscaler_config
• >>   hal_intl_fb_get_tx_fb_info
• >>   drv_lcdc_vintp_mode_config

• >>   hal_lcdc_init_cfg

hal_lcdc_upscaler_config (Thumb, 202 bytes, Stack size 40 bytes, hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config))

[Stack]

• Max Depth = 144
• Call Chain = hal_lcdc_upscaler_config ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   drv_lcdc_function_enable
• >>   __aeabi_ui2d
• >>   __aeabi_dadd
• >>   __aeabi_d2uiz
• >>   __aeabi_uidivmod

• >>   hal_lcdc_postproc_config

hal_nonshadow_func_update (Thumb, 180 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update))

[Stack]

• Max Depth = 16
• Call Chain = hal_nonshadow_func_update ⇒ drv_lcdc_config_int_single

• >>   drv_lcdc_fc_config
• >>   drv_lcdc_edge_enh_config
• >>   drv_lcdc_edge_dect_config
• >>   drv_lcdc_config_int_single
• >>   drv_lcdc_bcsa_config

• hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init)

hal_pwr_enter_deep_sleep_mode (Thumb, 42 bytes, Stack size 8 bytes, hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode))

[Stack]

• Max Depth = 16
• Call Chain = hal_pwr_enter_deep_sleep_mode ⇒ drv_pwr_enter_deep_sleep_mode

• >>   drv_pwr_set_wakeup_type
• >>   drv_pwr_enter_deep_sleep_mode

• >>   app_system_suspend

hal_pwr_enter_normal_sleep_mode (Thumb, 8 bytes, Stack size 8 bytes, hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode))

[Stack]

• Max Depth = 8
• Call Chain = hal_pwr_enter_normal_sleep_mode

• >>   drv_pwr_enter_sleep_mode_ex

• >>   app_system_suspend

hal_pwr_enter_stop_sleep_mode (Thumb, 88 bytes, Stack size 16 bytes, hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode))

[Stack]

• Max Depth = 40
• Call Chain = hal_pwr_enter_stop_sleep_mode ⇒ drv_pwr_enter_stop_sleep_mode

• >>   drv_pwr_enter_stop_sleep_mode
• >>   drv_sys_cfg_set_int

• >>   app_system_suspend

hal_pwr_exit_sleep_mode (Thumb, 10 bytes, Stack size 8 bytes, hal_pwr.o(i.hal_pwr_exit_sleep_mode))

[Stack]

• Max Depth = 12
• Call Chain = hal_pwr_exit_sleep_mode ⇒ drv_pwr_exit_sleep_mode

• >>   drv_pwr_exit_sleep_mode

• >>   app_system_resume

hal_pwr_get_vcc_power_ready (Thumb, 8 bytes, Stack size 8 bytes, hal_pwr.o(i.hal_pwr_get_vcc_power_ready))

[Stack]

• Max Depth = 8
• Call Chain = hal_pwr_get_vcc_power_ready

• >>   drv_pwr_get_power_ready_st

• >>   app_display_init

hal_pwr_set_main_power (Thumb, 8 bytes, Stack size 8 bytes, hal_pwr.o(i.hal_pwr_set_main_power))

[Stack]

• Max Depth = 16
• Call Chain = hal_pwr_set_main_power ⇒ drv_pwr_set_digit_power_sel

• >>   drv_pwr_set_digit_power_sel

• >>   google_p6a_demo

hal_pwr_set_sleep_mode_power (Thumb, 8 bytes, Stack size 8 bytes, hal_pwr.o(i.hal_pwr_set_sleep_mode_power))

[Stack]

• Max Depth = 16
• Call Chain = hal_pwr_set_sleep_mode_power ⇒ drv_pwr_set_breath_screen_power_sel

• >>   drv_pwr_set_breath_screen_power_sel

• >>   app_system_suspend

hal_pwr_set_stop_sleep_wakeup_pin (Thumb, 86 bytes, Stack size 24 bytes, hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin))

[Stack]

• Max Depth = 64
• Call Chain = hal_pwr_set_stop_sleep_wakeup_pin ⇒ hal_gpio_init_eint ⇒ hal_gpio_set_mode ⇒ drv_gpio_set_mode

• >>   hal_gpio_set_ap_reset_int
• >>   hal_gpio_reg_eint_cb
• >>   hal_gpio_init_eint
• >>   hal_gpio_ctrl_eint

• >>   app_system_suspend

hal_swire_deinit (Thumb, 60 bytes, Stack size 8 bytes, hal_swire.o(i.hal_swire_deinit))

[Stack]

• Max Depth = 32
• Call Chain = hal_swire_deinit ⇒ hal_timer_deinit ⇒ drv_timer_set_int

• >>   drv_crgu_set_reset
• >>   drv_crgu_enable_clock
• >>   hal_timer_deinit
• >>   drv_swire_set_int
• >>   drv_swire_register_callback
• >>   drv_swire_enable

• >>   app_system_suspend

hal_swire_enable (Thumb, 86 bytes, Stack size 8 bytes, hal_swire.o(i.hal_swire_enable))

[Stack]

• Max Depth = 24
• Call Chain = hal_swire_enable ⇒ drv_swire_set_int

• >>   drv_timer_enable
• >>   drv_swire_set_trig_mode
• >>   drv_swire_set_power_down
• >>   drv_swire_set_int
• >>   drv_swire_get_pulse_count

• >>   app_mipi_tx_start
• >>   ap_dcs_set_enter_sleep_mode

hal_swire_init (Thumb, 74 bytes, Stack size 8 bytes, hal_swire.o(i.hal_swire_init))

[Stack]

• Max Depth = 24
• Call Chain = hal_swire_init ⇒ hal_gpio_set_mode ⇒ drv_gpio_set_mode

• >>   drv_crgu_enable_clock
• >>   drv_swire_set_power_down
• >>   drv_swire_set_bit_time
• >>   drv_swire_enable
• >>   drv_crgu_set_clock_div
• >>   hal_gpio_set_mode
• >>   __aeabi_uidivmod

• >>   app_display_init

hal_swire_set_pulse (Thumb, 32 bytes, Stack size 8 bytes, hal_swire.o(i.hal_swire_set_pulse))

[Stack]

• Max Depth = 8
• Call Chain = hal_swire_set_pulse

• >>   drv_swire_set_trig_mode
• >>   drv_swire_set_pulse_count

• >>   app_mipi_tx_start

hal_swire_set_timer (Thumb, 60 bytes, Stack size 24 bytes, hal_swire.o(i.hal_swire_set_timer))

[Stack]

• Max Depth = 52
• Call Chain = hal_swire_set_timer ⇒ drv_timer_set_compare_val ⇒ __aeabi_uidivmod

• >>   hal_timer_init
• >>   hal_timer_set_repeat
• >>   drv_timer_set_compare_val
• >>   drv_sys_cfg_sel_swire_timer
• >>   drv_swire_set_trig_mode

• >>   app_display_init

hal_system_init (Thumb, 192 bytes, Stack size 8 bytes, hal_system.o(i.hal_system_init))

[Stack]

• Max Depth = 48
• Call Chain = hal_system_init ⇒ drv_common_system_init ⇒ drv_se_init ⇒ drv_efuse_read

• >>   drv_pwr_set_pll_clk
• >>   drv_crgu_enable_clock
• >>   drv_sys_cfg_clear_all_int
• >>   drv_common_system_init
• >>   hal_system_updata_sysclk
• >>   hal_gpio_set_mode

• >>   board_Init

hal_system_updata_sysclk (Thumb, 60 bytes, Stack size 8 bytes, hal_system.o(i.hal_system_updata_sysclk))

[Stack]

• Max Depth = 16
• Call Chain = hal_system_updata_sysclk ⇒ drv_crgu_set_ahb_clk

• >>   drv_crgu_set_ahb_clk

• >>   hal_system_init

hal_timer_deinit (Thumb, 48 bytes, Stack size 8 bytes, hal_timer.o(i.hal_timer_deinit))

[Stack]

• Max Depth = 24
• Call Chain = hal_timer_deinit ⇒ drv_timer_set_int

• >>   drv_crgu_set_reset
• >>   drv_crgu_enable_clock
• >>   drv_timer_set_repeat
• >>   drv_timer_set_int
• >>   drv_timer_enable

• >>   hal_swire_deinit

hal_timer_init (Thumb, 28 bytes, Stack size 8 bytes, hal_timer.o(i.hal_timer_init))

[Stack]

• Max Depth = 20
• Call Chain = hal_timer_init ⇒ drv_timer_set_prescaler

• >>   drv_crgu_enable_clock
• >>   drv_timer_set_prescaler

• >>   hal_swire_set_timer

hal_timer_set_repeat (Thumb, 8 bytes, Stack size 8 bytes, hal_timer.o(i.hal_timer_set_repeat))

[Stack]

• Max Depth = 8
• Call Chain = hal_timer_set_repeat

• >>   drv_timer_set_repeat

• >>   hal_swire_set_timer

hal_uart_init (Thumb, 134 bytes, Stack size 48 bytes, hal_uart.o(i.hal_uart_init))

[Stack]

• Max Depth = 100
• Call Chain = hal_uart_init ⇒ drv_uart_init ⇒ drv_uart_set_baud_rate ⇒ __aeabi_uidivmod

• >>   drv_uart_trans_create_handle
• >>   drv_uart_init
• >>   __aeabi_memclr4

• >>   tau_log_init

hal_uart_send_blocking (Thumb, 24 bytes, Stack size 16 bytes, hal_uart.o(i.hal_uart_send_blocking))

[Stack]

• Max Depth = 16
• Call Chain = hal_uart_send_blocking

• >>   drv_uart_send_blocking

• >>   fputc

hal_vsync_func_update (Thumb, 18 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_vsync_func_update))

[Stack]

• Max Depth = 16
• Call Chain = hal_vsync_func_update ⇒ drv_lcdc_config_int_single

• >>   drv_lcdc_config_int_single

• hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init)

hal_vsync_reset_lcdc_scaler (Thumb, 206 bytes, Stack size 48 bytes, hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler))

[Stack]

• Max Depth = 152
• Call Chain = hal_vsync_reset_lcdc_scaler ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   __aeabi_ui2d
• >>   __aeabi_dadd
• >>   __aeabi_d2uiz
• >>   soft_pro_motion_init
• >>   __aeabi_uidivmod

• >>   hal_internal_sync_input_resolution_change

main (Thumb, 32 bytes, Stack size 0 bytes, main.o(i.main))

[Stack]

• Max Depth = 584
• Call Chain = main ⇒ google_p6a_demo ⇒ app_system_process ⇒ app_system_resume ⇒ app_display_init ⇒ app_mipi_rx_init ⇒ hal_dsi_rx_ctrl_init ⇒ hal_dsi_rx_ctrl_init_vidc ⇒ drv_vidc_set_src_parameter ⇒ drv_se_set_vidc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   tau_log_printf
• >>   google_p6a_demo
• >>   board_Init

• entry9a.o(.ARM.Collect$$$$0000000B)

tau_log_init (Thumb, 48 bytes, Stack size 32 bytes, tau_log.o(i.tau_log_init))

[Stack]

• Max Depth = 132
• Call Chain = tau_log_init ⇒ hal_uart_init ⇒ drv_uart_init ⇒ drv_uart_set_baud_rate ⇒ __aeabi_uidivmod

• >>   hal_uart_init

• >>   board_Init

tau_log_printf (Thumb, 116 bytes, Stack size 296 bytes, tau_log.o(i.tau_log_printf))

[Stack]

• Max Depth = 336
• Call Chain = tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   tau_log_push_log
• >>   __aeabi_memclr4
• >>   vsprintf
• >>   __2printf
• >>   strlen

• >>   hal_dsi_tx_cmd_mode_cal_timing
• >>   hal_internal_sync_input_resolution_change
• >>   hal_dsi_rx_ctrl_send_ack_cmd
• >>   app_system_suspend
• >>   app_system_resume
• >>   app_system_process
• >>   app_mipi_tx_start
• >>   app_mipi_tx_init
• >>   app_mipi_rx_start_cb
• >>   app_mipi_rx_init
• >>   ap_rstn_pull_down_cb
• >>   ap_dcs_set_exit_sleep_mode
• >>   ap_dcs_set_enter_sleep_mode
• >>   ap_dcs_set_display_on
• >>   ap_dcs_set_display_off
• >>   ap_dcs_read
• >>   google_p6a_demo
• >>   main
• >>   drv_se_set_dsc
• >>   HardFault_Handler
• >>   svs_wait_fr_stab
• >>   hal_intl_dcs_rx_receive_pps
• >>   hal_intl_dcs_rx_get_dcs_packet_data
• >>   check_pkt_buf_rev
• >>   LCDC_IRQn_Handler
• >>   vidc_callback
• >>   rxbr_irq1_callback
• >>   hal_internal_vsync_set_tear_mode
• >>   MIPI_TX_IRQn_Handler
• >>   MIPI_RX_IRQn_Handler
• >>   drv_se_set_vidc
• >>   drv_se_set_rxbr
• >>   drv_se_set_memc
• >>   drv_se_set_lcdc

tau_log_push_log (Thumb, 118 bytes, Stack size 32 bytes, tau_log.o(i.tau_log_push_log))

[Stack]

• Max Depth = 40
• Call Chain = tau_log_push_log ⇒ delayUs

• >>   delayUs
• >>   __aeabi_memcpy

• >>   tau_log_printf
• >>   fputc

Local Symbols

ap_dcs_read (Thumb, 280 bytes, Stack size 72 bytes, p6a_demo.o(i.ap_dcs_read))

[Stack]

• Max Depth = 456
• Call Chain = ap_dcs_read ⇒ hal_dsi_rx_ctrl_send_ack_cmd ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_dsi_rx_ctrl_send_ack_cmd
• >>   hal_dsi_rx_ctrl_get_max_ret_size
• >>   tau_log_printf

• p6a_demo.o(i.app_mipi_rx_init)

ap_dcs_set_backlight (Thumb, 146 bytes, Stack size 24 bytes, p6a_demo.o(i.ap_dcs_set_backlight))

[Stack]

• Max Depth = 108
• Call Chain = ap_dcs_set_backlight ⇒ hal_dsi_tx_ctrl_write_cmd ⇒ hal_dsi_tx_send_cmd ⇒ drv_dsi_tx_phy_status_stopstate ⇒ __ARM_common_switch8

• >>   hal_dsi_tx_ctrl_write_cmd
• >>   __aeabi_idivmod

• p6a_demo.o(.constdata)

ap_dcs_set_display_off (Thumb, 34 bytes, Stack size 16 bytes, p6a_demo.o(i.ap_dcs_set_display_off))

[Stack]

• Max Depth = 352
• Call Chain = ap_dcs_set_display_off ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   tau_log_printf

• p6a_demo.o(.constdata)

ap_dcs_set_display_on (Thumb, 40 bytes, Stack size 16 bytes, p6a_demo.o(i.ap_dcs_set_display_on))

[Stack]

• Max Depth = 352
• Call Chain = ap_dcs_set_display_on ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_dsi_tx_ctrl_write_cmd
• >>   tau_log_printf

• p6a_demo.o(.constdata)

ap_dcs_set_enter_sleep_mode (Thumb, 120 bytes, Stack size 16 bytes, p6a_demo.o(i.ap_dcs_set_enter_sleep_mode))

[Stack]

• Max Depth = 392
• Call Chain = ap_dcs_set_enter_sleep_mode ⇒ hal_dsi_tx_ctrl_set_tear_mode ⇒ hal_internal_vsync_set_tear_mode ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_swire_enable
• >>   hal_gpio_set_output_data
• >>   hal_gpio_set_ap_reset_int
• >>   hal_gpio_init_output
• >>   hal_dsi_tx_ctrl_write_cmd
• >>   hal_dsi_tx_ctrl_set_tear_mode
• >>   delayMs
• >>   tau_log_printf

• p6a_demo.o(.constdata)

ap_dcs_set_exit_sleep_mode (Thumb, 28 bytes, Stack size 16 bytes, p6a_demo.o(i.ap_dcs_set_exit_sleep_mode))

[Stack]

• Max Depth = 352
• Call Chain = ap_dcs_set_exit_sleep_mode ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   tau_log_printf

• p6a_demo.o(.constdata)

ap_rstn_pull_down_cb (Thumb, 38 bytes, Stack size 8 bytes, p6a_demo.o(i.ap_rstn_pull_down_cb))

[Stack]

• Max Depth = 344
• Call Chain = ap_rstn_pull_down_cb ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_gpio_set_ap_reset_int
• >>   tau_log_printf

• p6a_demo.o(i.ap_dcs_set_enter_sleep_mode)

ap_rstn_pull_high_cb (Thumb, 22 bytes, Stack size 8 bytes, p6a_demo.o(i.ap_rstn_pull_high_cb))

[Stack]

• Max Depth = 32
• Call Chain = ap_rstn_pull_high_cb ⇒ hal_gpio_set_ap_reset_int ⇒ drv_sys_cfg_clear_pending

• >>   hal_gpio_set_ap_reset_int

• p6a_demo.o(i.app_system_suspend)

app_init_panel (Thumb, 12916 bytes, Stack size 216 bytes, p6a_demo.o(i.app_init_panel))

[Stack]

• Max Depth = 300
• Call Chain = app_init_panel ⇒ hal_dsi_tx_ctrl_write_cmd ⇒ hal_dsi_tx_send_cmd ⇒ drv_dsi_tx_phy_status_stopstate ⇒ __ARM_common_switch8

• >>   hal_dsi_tx_ctrl_write_cmd
• >>   delayMs
• >>   app_tx_panel_reset

• >>   app_mipi_tx_start

app_mipi_rx_init (Thumb, 240 bytes, Stack size 8 bytes, p6a_demo.o(i.app_mipi_rx_init))

[Stack]

• Max Depth = 560
• Call Chain = app_mipi_rx_init ⇒ hal_dsi_rx_ctrl_init ⇒ hal_dsi_rx_ctrl_init_vidc ⇒ drv_vidc_set_src_parameter ⇒ drv_se_set_vidc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_gpio_set_ap_reset_int
• >>   hal_dsi_rx_ctrl_pre_init_pps
• >>   hal_dsi_rx_ctrl_init
• >>   hal_dsi_rx_ctrl_create_handle
• >>   tau_log_printf

• >>   app_display_init

app_mipi_rx_start_cb (Thumb, 40 bytes, Stack size 8 bytes, p6a_demo.o(i.app_mipi_rx_start_cb))

[Stack]

• Max Depth = 344
• Call Chain = app_mipi_rx_start_cb ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_gpio_set_ap_reset_int
• >>   hal_dsi_rx_ctrl_start
• >>   tau_log_printf

• p6a_demo.o(i.app_mipi_rx_init)

app_mipi_tx_init (Thumb, 232 bytes, Stack size 8 bytes, p6a_demo.o(i.app_mipi_tx_init))

[Stack]

• Max Depth = 440
• Call Chain = app_mipi_tx_init ⇒ hal_dsi_tx_ctrl_init ⇒ hal_dsi_tx_init_timing ⇒ hal_dsi_tx_cmd_mode_cal_timing ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_dsi_tx_ctrl_set_tear_mode
• >>   hal_dsi_tx_ctrl_set_overwrite_rgb
• >>   hal_dsi_tx_ctrl_init
• >>   hal_dsi_tx_ctrl_create_handle
• >>   tau_log_printf

• >>   app_display_init

app_mipi_tx_start (Thumb, 116 bytes, Stack size 8 bytes, p6a_demo.o(i.app_mipi_tx_start))

[Stack]

• Max Depth = 400
• Call Chain = app_mipi_tx_start ⇒ hal_dsi_tx_ctrl_start ⇒ hal_lcdc_start ⇒ drv_lcdc_vid_hw_start ⇒ drv_se_set_lcdc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_swire_set_pulse
• >>   hal_swire_enable
• >>   hal_gpio_init_output
• >>   hal_dsi_tx_ctrl_write_cmd
• >>   hal_dsi_tx_ctrl_start
• >>   hal_dsi_tx_ctrl_set_tear_mode
• >>   delayMs
• >>   app_init_panel
• >>   tau_log_printf

• >>   app_display_init

app_system_process (Thumb, 60 bytes, Stack size 8 bytes, p6a_demo.o(i.app_system_process))

[Stack]

• Max Depth = 584
• Call Chain = app_system_process ⇒ app_system_resume ⇒ app_display_init ⇒ app_mipi_rx_init ⇒ hal_dsi_rx_ctrl_init ⇒ hal_dsi_rx_ctrl_init_vidc ⇒ drv_vidc_set_src_parameter ⇒ drv_se_set_vidc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   app_system_suspend
• >>   app_system_resume
• >>   tau_log_printf

• >>   google_p6a_demo

app_system_resume (Thumb, 30 bytes, Stack size 8 bytes, p6a_demo.o(i.app_system_resume))

[Stack]

• Max Depth = 576
• Call Chain = app_system_resume ⇒ app_display_init ⇒ app_mipi_rx_init ⇒ hal_dsi_rx_ctrl_init ⇒ hal_dsi_rx_ctrl_init_vidc ⇒ drv_vidc_set_src_parameter ⇒ drv_se_set_vidc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_pwr_exit_sleep_mode
• >>   app_display_init
• >>   tau_log_printf

• >>   app_system_process

app_system_suspend (Thumb, 202 bytes, Stack size 16 bytes, p6a_demo.o(i.app_system_suspend))

[Stack]

• Max Depth = 352
• Call Chain = app_system_suspend ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_swire_deinit
• >>   hal_pwr_set_stop_sleep_wakeup_pin
• >>   hal_pwr_set_sleep_mode_power
• >>   hal_pwr_enter_stop_sleep_mode
• >>   hal_pwr_enter_normal_sleep_mode
• >>   hal_pwr_enter_deep_sleep_mode
• >>   hal_gpio_set_ap_reset_int
• >>   hal_gpio_init_output
• >>   hal_dsi_tx_ctrl_stop
• >>   hal_dsi_tx_ctrl_deinit
• >>   hal_dsi_rx_ctrl_stop
• >>   hal_dsi_rx_ctrl_deinit
• >>   tau_log_printf

• >>   app_system_process

app_tx_panel_reset (Thumb, 46 bytes, Stack size 8 bytes, p6a_demo.o(i.app_tx_panel_reset))

[Stack]

• Max Depth = 24
• Call Chain = app_tx_panel_reset ⇒ delayMs ⇒ delayUs

• >>   hal_gpio_set_output_data
• >>   delayMs

• >>   app_init_panel

pps_update_handle (Thumb, 104 bytes, Stack size 24 bytes, p6a_demo.o(i.pps_update_handle))

[Stack]

• Max Depth = 648
• Call Chain = pps_update_handle ⇒ hal_dsi_rx_ctrl_toggle_resolution ⇒ hal_internal_sync_input_resolution_change ⇒ hal_dsi_rx_ctrl_init ⇒ hal_dsi_rx_ctrl_init_vidc ⇒ drv_vidc_set_src_parameter ⇒ drv_se_set_vidc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_dsi_tx_ctrl_set_tear_mode
• >>   hal_dsi_rx_ctrl_toggle_resolution

• p6a_demo.o(i.app_mipi_rx_init)

hal_dsi_rx_ctrl_init_clk (Thumb, 222 bytes, Stack size 32 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk))

[Stack]

• Max Depth = 44
• Call Chain = hal_dsi_rx_ctrl_init_clk ⇒ drv_crgu_set_dsc_clk

• >>   drv_pwr_set_pll_clk
• >>   drv_crgu_set_vidc_clk
• >>   drv_crgu_set_rxbr_clk
• >>   drv_crgu_set_fb_clk
• >>   drv_crgu_set_dsc_clk
• >>   drv_crgu_enable_clock

• >>   hal_dsi_rx_ctrl_init

hal_dsi_rx_ctrl_init_dsi_rx (Thumb, 232 bytes, Stack size 32 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx))

[Stack]

• Max Depth = 216
• Call Chain = hal_dsi_rx_ctrl_init_dsi_rx ⇒ hal_dsi_rx_ctrl_set_ipi_cfg ⇒ drv_dsi_rx_calc_ipi_tx_delay ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   drv_dsi_rx_set_up_phy
• >>   drv_dsi_rx_set_tear_resp_en
• >>   drv_dsi_rx_set_resp_cnt
• >>   drv_dsi_rx_set_lane_swap
• >>   drv_dsi_rx_set_ipi_ycbcr_frmt
• >>   drv_dsi_rx_set_inten
• >>   drv_dsi_rx_set_ddi_crc_en
• >>   drv_dsi_rx_set_ddi_cfg
• >>   drv_dsi_rx_set_ctrl_cfg
• >>   drv_dsi_rx_set_check_crc
• >>   drv_dsi_rx_enable_irq
• >>   drv_crgu_get_rxbr_clk
• >>   hal_dsi_rx_ctrl_set_ipi_cfg
• >>   __aeabi_uidivmod

• >>   hal_dsi_rx_ctrl_init

hal_dsi_rx_ctrl_init_memc (Thumb, 294 bytes, Stack size 80 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc))

[Stack]

• Max Depth = 432
• Call Chain = hal_dsi_rx_ctrl_init_memc ⇒ drv_memc_set_ltpo_mode ⇒ drv_se_set_memc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_intl_fb_get_rx_fb_info
• >>   hal_intl_fb_get_memc_flow_mode
• >>   drv_memc_set_vidc_sync_cnt
• >>   drv_memc_set_tear_waveform
• >>   drv_memc_set_tear_mode
• >>   drv_memc_set_ltpo_pu_thres
• >>   drv_memc_set_ltpo_mode
• >>   drv_memc_set_lcdc_st_conditions
• >>   drv_memc_set_fs_en_conditions
• >>   drv_memc_set_double_buffer
• >>   drv_memc_set_data_mode
• >>   drv_memc_set_circ_mode_enable
• >>   drv_memc_set_active_height
• >>   drv_memc_sel_vsync
• >>   drv_memc_rate_transfer_sel
• >>   drv_memc_enable_irq
• >>   __ARM_common_switch8

• >>   hal_dsi_rx_ctrl_init

hal_dsi_rx_ctrl_init_rxbr (Thumb, 314 bytes, Stack size 144 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr))

[Stack]

• Max Depth = 504
• Call Chain = hal_dsi_rx_ctrl_init_rxbr ⇒ drv_rxbr_set_color_format ⇒ drv_se_set_rxbr ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_intl_fb_get_rx_fb_info
• >>   hal_intl_fb_get_memc_flow_mode
• >>   hal_intl_dcs_set_auto_hw_filter
• >>   drv_rxbr_set_usr_row
• >>   drv_rxbr_set_usr_col
• >>   drv_rxbr_set_usr_cfg
• >>   drv_rxbr_set_ltpo_drop_th
• >>   drv_rxbr_set_inten
• >>   drv_rxbr_set_color_format
• >>   drv_rxbr_hline_rcv_cfg
• >>   drv_rxbr_frame_drop_cfg
• >>   drv_rxbr_enable_irq

• >>   hal_dsi_rx_ctrl_init

hal_dsi_rx_ctrl_init_vidc (Thumb, 624 bytes, Stack size 168 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc))

[Stack]

• Max Depth = 536
• Call Chain = hal_dsi_rx_ctrl_init_vidc ⇒ drv_vidc_set_src_parameter ⇒ drv_se_set_vidc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_intl_fb_get_rx_fb_info
• >>   drv_vidc_set_vintp_config
• >>   drv_vidc_set_src_parameter
• >>   drv_vidc_set_scld_vcoef1
• >>   drv_vidc_set_scld_vcoef0
• >>   drv_vidc_set_scld_step
• >>   drv_vidc_set_scld_hcoef1
• >>   drv_vidc_set_scld_hcoef0
• >>   drv_vidc_set_rotation
• >>   drv_vidc_set_pu_ctrl
• >>   drv_vidc_set_pentile_swap
• >>   drv_vidc_set_mirror
• >>   drv_vidc_set_irqen
• >>   drv_vidc_set_honly_hinitr
• >>   drv_vidc_set_honly_hinitb
• >>   drv_vidc_set_honly_hcoef0
• >>   drv_vidc_set_dst_parameter
• >>   drv_vidc_set_dither_config
• >>   drv_vidc_set_circ_mode_enable
• >>   drv_vidc_init_module_enable
• >>   drv_vidc_enable_irq
• >>   __aeabi_ui2d
• >>   __aeabi_dadd
• >>   __aeabi_d2uiz
• >>   __aeabi_memcpy4
• >>   __aeabi_uidivmod

• >>   hal_dsi_rx_ctrl_init

hal_dsi_rx_ctrl_set_ipi_cfg (Thumb, 48 bytes, Stack size 24 bytes, hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg))

[Stack]

• Max Depth = 184
• Call Chain = hal_dsi_rx_ctrl_set_ipi_cfg ⇒ drv_dsi_rx_calc_ipi_tx_delay ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   drv_dsi_rx_set_ipi_cfg
• >>   drv_dsi_rx_calc_ipi_tx_delay

• >>   hal_dsi_rx_ctrl_init_dsi_rx

hal_dsi_tx_cmd_mode_cal_timing (Thumb, 510 bytes, Stack size 64 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing))

[Stack]

• Max Depth = 400
• Call Chain = hal_dsi_tx_cmd_mode_cal_timing ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   __aeabi_ui2f
• >>   __aeabi_fmul
• >>   __aeabi_fadd
• >>   __aeabi_f2d
• >>   __aeabi_fdiv
• >>   __aeabi_d2uiz
• >>   tau_log_printf
• >>   hal_internal_sync_get_hight_performan_mode
• >>   __aeabi_idivmod
• >>   __aeabi_uidivmod
• >>   ceil

• >>   hal_dsi_tx_init_timing

hal_dsi_tx_ctrl_init_clk (Thumb, 12 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk))

[Stack]

• Max Depth = 8
• Call Chain = hal_dsi_tx_ctrl_init_clk

• >>   drv_crgu_enable_clock

• >>   hal_dsi_tx_ctrl_init

hal_dsi_tx_init_cfg (Thumb, 250 bytes, Stack size 80 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg))

[Stack]

• Max Depth = 96
• Call Chain = hal_dsi_tx_init_cfg ⇒ drv_dsi_tx_set_int ⇒ drv_sys_cfg_clear_pending

• >>   drv_dsi_tx_video_mode_cfg
• >>   drv_dsi_tx_timeout_cfg
• >>   drv_dsi_tx_set_time_out_div
• >>   drv_dsi_tx_set_int
• >>   drv_dsi_tx_set_esc_div
• >>   drv_dsi_tx_set_bta_ack
• >>   drv_dsi_tx_response_mode
• >>   drv_dsi_tx_phy_lane_mode
• >>   drv_dsi_tx_phy_clock_lane_req_hs
• >>   drv_dsi_tx_phy_clock_lane_auto_lp
• >>   drv_dsi_tx_mode
• >>   drv_dsi_tx_dpi_polarity
• >>   drv_dsi_tx_dpi_mode
• >>   drv_dsi_tx_dpi_lpcmd_time
• >>   drv_dsi_tx_config_int
• >>   drv_dsi_tx_config_eotp
• >>   drv_dsi_tx_command_mode_cfg
• >>   __aeabi_memclr4

• >>   hal_dsi_tx_ctrl_init

hal_dsi_tx_init_dpi_timing (Thumb, 58 bytes, Stack size 40 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing))

[Stack]

• Max Depth = 52
• Call Chain = hal_dsi_tx_init_dpi_timing ⇒ drv_crgu_set_dpi_clk

• >>   drv_crgu_set_dpi_clk
• >>   hal_internal_sync_get_hight_performan_mode
• >>   __aeabi_memcpy4
• >>   __aeabi_uidivmod

• >>   hal_dsi_tx_init_timing

hal_dsi_tx_init_phy_cfg (Thumb, 22 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg))

[Stack]

• Max Depth = 52
• Call Chain = hal_dsi_tx_init_phy_cfg ⇒ drv_dsi_tx_phy_test_setup ⇒ __aeabi_uidivmod

• >>   drv_dsi_tx_phy_time_cfg
• >>   drv_dsi_tx_phy_test_setup

• >>   hal_dsi_tx_init_timing

hal_dsi_tx_init_timing (Thumb, 82 bytes, Stack size 16 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing))

[Stack]

• Max Depth = 416
• Call Chain = hal_dsi_tx_init_timing ⇒ hal_dsi_tx_cmd_mode_cal_timing ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_dsi_tx_edpi_cmd_size
• >>   hal_dsi_tx_vid_mode_cal_timing
• >>   hal_dsi_tx_timing_info_update
• >>   hal_dsi_tx_init_vid_timing
• >>   hal_dsi_tx_init_phy_cfg
• >>   hal_dsi_tx_init_dpi_timing
• >>   hal_dsi_tx_cmd_mode_cal_timing

• >>   hal_dsi_tx_ctrl_init

hal_dsi_tx_init_vid_timing (Thumb, 70 bytes, Stack size 16 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing))

[Stack]

• Max Depth = 16
• Call Chain = hal_dsi_tx_init_vid_timing

• >>   drv_dsi_tx_set_video_timing
• >>   drv_dsi_tx_set_video_chunk

• >>   hal_dsi_tx_init_timing

hal_dsi_tx_send_cmd (Thumb, 58 bytes, Stack size 24 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd))

[Stack]

• Max Depth = 36
• Call Chain = hal_dsi_tx_send_cmd ⇒ drv_dsi_tx_phy_status_stopstate ⇒ __ARM_common_switch8

• >>   drv_dsi_tx_phy_status_stopstate
• >>   drv_dsi_tx_get_cmd_status
• >>   drv_dsi_tx_command_header
• >>   hal_internal_vsync_get_tx_state

• >>   hal_dsi_tx_ctrl_write_cmd

hal_dsi_tx_timing_info_update (Thumb, 142 bytes, Stack size 16 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update))

[Stack]

• Max Depth = 28
• Call Chain = hal_dsi_tx_timing_info_update ⇒ __aeabi_uidivmod

• >>   __aeabi_d2f
• >>   __aeabi_uidivmod

• >>   hal_dsi_tx_init_timing

hal_dsi_tx_vid_mode_cal_timing (Thumb, 766 bytes, Stack size 96 bytes, hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing))

[Stack]

• Max Depth = 232
• Call Chain = hal_dsi_tx_vid_mode_cal_timing ⇒ ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   __aeabi_ui2f
• >>   __aeabi_fmul
• >>   __aeabi_f2d
• >>   __aeabi_fdiv
• >>   __aeabi_d2uiz
• >>   hal_intl_svs_init_tx
• >>   hal_intl_fb_get_user_flow
• >>   hal_internal_sync_get_hight_performan_mode
• >>   __aeabi_idivmod
• >>   __aeabi_uidivmod
• >>   ceil

• >>   hal_dsi_tx_init_timing

hal_lcdc_init_cfg (Thumb, 62 bytes, Stack size 88 bytes, hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg))

[Stack]

• Max Depth = 320
• Call Chain = hal_lcdc_init_cfg ⇒ hal_lcdc_postproc_config ⇒ hal_lcdc_upscaler_config ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   drv_lcdc_set_int
• >>   drv_lcdc_config_int
• >>   hal_lcdc_postproc_config
• >>   hal_lcdc_displayproc_config
• >>   hal_lcdc_timinggen_config
• >>   hal_intl_fb_get_tx_fb_info

• >>   hal_dsi_tx_ctrl_init

hal_lcdc_init_clk (Thumb, 112 bytes, Stack size 16 bytes, hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk))

[Stack]

• Max Depth = 152
• Call Chain = hal_lcdc_init_clk ⇒ ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   drv_crgu_set_lcdc_clk
• >>   __aeabi_ui2f
• >>   __aeabi_f2d
• >>   __ARM_scalbnf
• >>   __aeabi_fdiv
• >>   __aeabi_d2uiz
• >>   ceil

• >>   hal_dsi_tx_ctrl_init

hal_lcdc_start (Thumb, 36 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_lcdc_start))

[Stack]

• Max Depth = 368
• Call Chain = hal_lcdc_start ⇒ drv_lcdc_vid_hw_start ⇒ drv_se_set_lcdc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_lcdc_vid_hw_start
• >>   drv_lcdc_cmd_start
• >>   hal_intl_fb_get_memc_flow_mode
• >>   hal_intl_fb_get_user_flow

• >>   hal_dsi_tx_ctrl_start

hal_lcdc_timinggen_config (Thumb, 60 bytes, Stack size 8 bytes, hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config))

[Stack]

• Max Depth = 24
• Call Chain = hal_lcdc_timinggen_config ⇒ drv_lcdc_ctrl_flow

• >>   drv_lcdc_set_prefetch
• >>   drv_lcdc_ctrl_flow
• >>   drv_lcdc_config_src_parameter
• >>   hal_intl_fb_get_memc_flow_mode
• >>   hal_internal_vsync_get_sync_line

• >>   hal_lcdc_init_cfg

hal_tx_frame_rate_adjust (Thumb, 44 bytes, Stack size 16 bytes, hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust))

[Stack]

• Max Depth = 448
• Call Chain = hal_tx_frame_rate_adjust ⇒ hal_dsi_tx_ctrl_init ⇒ hal_dsi_tx_init_timing ⇒ hal_dsi_tx_cmd_mode_cal_timing ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   __aeabi_cfcmple
• >>   hal_internal_vsync_get_tx_state
• >>   hal_dsi_tx_ctrl_init
• >>   hal_internal_vsync_set_tx_state

• hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing)

drv_gpio_set_output_data (Thumb, 26 bytes, Stack size 0 bytes, hal_gpio.o(i.drv_gpio_set_output_data))

[Called By]

• >>   hal_gpio_set_output_data
• >>   hal_gpio_init_output

stop_sleep_cb (Thumb, 18 bytes, Stack size 0 bytes, hal_pwr.o(i.stop_sleep_cb))
[Address Reference Count : 1]

• hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin)

check_mipi_rx_tx_video_info (Thumb, 44 bytes, Stack size 16 bytes, hal_internal_vsync.o(i.check_mipi_rx_tx_video_info))

[Stack]

• Max Depth = 16
• Call Chain = check_mipi_rx_tx_video_info

• >>   hal_internal_vsync_init_rx
• >>   hal_internal_vsync_init_tx

drv_rxbr_get_int_source (Thumb, 20 bytes, Stack size 0 bytes, hal_internal_vsync.o(i.drv_rxbr_get_int_source))

[Called By]

• >>   rxbr_irq1_callback

rxbr_irq1_callback (Thumb, 478 bytes, Stack size 40 bytes, hal_internal_vsync.o(i.rxbr_irq1_callback))

[Stack]

• Max Depth = 400
• Call Chain = rxbr_irq1_callback ⇒ drv_lcdc_cmd_start ⇒ drv_se_set_lcdc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_lcdc_cmd_start
• >>   drv_dsi_tx_phy_clock_lane_req_hs
• >>   drv_vidc_enable
• >>   drv_rxbr_set_inten
• >>   tau_log_printf
• >>   hal_intl_svs_set_rx_vtt
• >>   hal_intl_svs_handle
• >>   drv_rxbr_clear_status0
• >>   drv_rxbr_clear_pkt_buffer
• >>   vpre_err_reset
• >>   soft_double_buffer_update
• >>   drv_rxbr_get_int_source
• >>   hal_intl_fb_get_user_flow

• hal_internal_vsync.o(i.hal_internal_vsync_init_rx)

soft_double_buffer_update (Thumb, 56 bytes, Stack size 16 bytes, hal_internal_vsync.o(i.soft_double_buffer_update))

[Stack]

• Max Depth = 16
• Call Chain = soft_double_buffer_update

• >>   rxbr_irq1_callback

soft_gen_te (Thumb, 86 bytes, Stack size 8 bytes, hal_internal_vsync.o(i.soft_gen_te))

[Stack]

• Max Depth = 8
• Call Chain = soft_gen_te

• >>   soft_tear_adjust_line

• hal_internal_vsync.o(i.hal_internal_vsync_init_rx)

soft_gen_te_double_buffer (Thumb, 202 bytes, Stack size 16 bytes, hal_internal_vsync.o(i.soft_gen_te_double_buffer))

[Stack]

• Max Depth = 16
• Call Chain = soft_gen_te_double_buffer

• >>   soft_tear_adjust_line

• hal_internal_vsync.o(i.hal_internal_vsync_init_rx)

soft_pro_motion_init (Thumb, 46 bytes, Stack size 8 bytes, hal_internal_vsync.o(i.soft_pro_motion_init))

[Stack]

• Max Depth = 8
• Call Chain = soft_pro_motion_init

• >>   __aeabi_memclr4

• >>   hal_internal_vsync_init_rx
• >>   hal_vsync_reset_lcdc_scaler
• >>   hal_internal_vsync_set_tx_state

soft_tear_adjust_line (Thumb, 26 bytes, Stack size 0 bytes, hal_internal_vsync.o(i.soft_tear_adjust_line))

[Called By]

• >>   soft_gen_te_double_buffer
• >>   soft_gen_te

vidc_callback (Thumb, 150 bytes, Stack size 24 bytes, hal_internal_vsync.o(i.vidc_callback))

[Stack]

• Max Depth = 360
• Call Chain = vidc_callback ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_lcdc_function_disable
• >>   drv_vidc_set_irqen
• >>   tau_log_printf
• >>   drv_vidc_get_irq_status
• >>   drv_vidc_get_int_source
• >>   drv_vidc_clear_irq

• hal_internal_vsync.o(i.hal_internal_vsync_init_rx)

vpre_err_reset (Thumb, 254 bytes, Stack size 64 bytes, hal_internal_vsync.o(i.vpre_err_reset))

[Stack]

• Max Depth = 64
• Call Chain = vpre_err_reset

• >>   drv_crgu_set_reset
• >>   drv_vidc_reset

• >>   rxbr_irq1_callback

check_pkt_buf_rev (Thumb, 84 bytes, Stack size 24 bytes, hal_internal_dcs.o(i.check_pkt_buf_rev))

[Stack]

• Max Depth = 360
• Call Chain = check_pkt_buf_rev ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   tau_log_printf
• >>   drv_rxbr_get_status0
• >>   drv_rxbr_clear_status0
• >>   drv_rxbr_clear_pkt_buffer

• >>   hal_intl_dcs_rx_receive_pps
• >>   hal_intl_dcs_rx_get_dcs_packet_data

drv_rxbr_get_status0 (Thumb, 20 bytes, Stack size 0 bytes, hal_internal_dcs.o(i.drv_rxbr_get_status0))

[Called By]

• >>   VPRE_IRQn_Handler
• >>   check_pkt_buf_rev

hal_intl_dcs_rx_get_dcs_packet_data (Thumb, 782 bytes, Stack size 64 bytes, hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data))

[Stack]

• Max Depth = 424
• Call Chain = hal_intl_dcs_rx_get_dcs_packet_data ⇒ check_pkt_buf_rev ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_dsi_tx_command_put_payload
• >>   hal_dsi_rx_ctrl_dcs_async_handler
• >>   tau_log_printf
• >>   drv_dsi_rx_get_ddi_crc_en
• >>   dcs_packet_fifo_alloc
• >>   hal_intl_dcs_sw_filter_handle
• >>   check_pkt_buf_rev

• >>   hal_intl_dcs_rx_receive_packet

hal_intl_dcs_rx_receive_packet (Thumb, 122 bytes, Stack size 8 bytes, hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet))

[Stack]

• Max Depth = 528
• Call Chain = hal_intl_dcs_rx_receive_packet ⇒ hal_intl_dcs_rx_receive_pps ⇒ drv_dsc_dec_enable ⇒ drv_se_set_dsc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   hal_intl_dcs_rx_receive_pps
• >>   hal_intl_dcs_rx_get_dcs_packet_data
• >>   drv_rxbr_clear_status0
• >>   drv_rxbr_clear_pkt_buffer

• >>   VPRE_IRQn_Handler

hal_intl_dcs_rx_receive_pps (Thumb, 266 bytes, Stack size 160 bytes, hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps))

[Stack]

• Max Depth = 520
• Call Chain = hal_intl_dcs_rx_receive_pps ⇒ drv_dsc_dec_enable ⇒ drv_se_set_dsc ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   drv_dsi_rx_get_compression_en
• >>   drv_dsc_dec_enable
• >>   drv_crgu_enable_clock
• >>   tau_log_printf
• >>   check_pkt_buf_rev
• >>   drv_rxbr_clear_pkt_buffer
• >>   __aeabi_memclr4
• >>   __aeabi_memcpy4
• >>   __aeabi_uidivmod
• >>   memcmp

• >>   hal_intl_dcs_rx_receive_packet

hal_intl_dcs_sw_filter_handle (Thumb, 36 bytes, Stack size 0 bytes, hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle))

[Called By]

• >>   hal_intl_dcs_rx_get_dcs_packet_data

ha_intl_fb_check_pu_size (Thumb, 58 bytes, Stack size 16 bytes, hal_internal_fb.o(i.ha_intl_fb_check_pu_size))

[Stack]

• Max Depth = 28
• Call Chain = ha_intl_fb_check_pu_size ⇒ __aeabi_uidivmod

• >>   __aeabi_uidivmod

• >>   hal_intl_fb_cal_fb_info

hal_intl_fb_check_bandwidth (Thumb, 92 bytes, Stack size 40 bytes, hal_internal_fb.o(i.hal_intl_fb_check_bandwidth))

[Stack]

• Max Depth = 52
• Call Chain = hal_intl_fb_check_bandwidth ⇒ __aeabi_uidivmod

• >>   hal_internal_sync_get_hight_performan_mode
• >>   __aeabi_uidivmod

• >>   hal_intl_fb_cal_fb_info

hal_intl_fb_edge_resize (Thumb, 214 bytes, Stack size 48 bytes, hal_internal_fb.o(i.hal_intl_fb_edge_resize))

[Stack]

• Max Depth = 60
• Call Chain = hal_intl_fb_edge_resize ⇒ __aeabi_uidivmod

• >>   __aeabi_uidivmod

• >>   hal_intl_fb_cal_fb_info

hal_intl_fb_flow_control_adapter (Thumb, 110 bytes, Stack size 24 bytes, hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter))

[Stack]

• Max Depth = 24
• Call Chain = hal_intl_fb_flow_control_adapter

• >>   hal_intl_fb_cal_fb_info

svs_direct_mode_setting (Thumb, 154 bytes, Stack size 88 bytes, hal_internal_svs.o(i.svs_direct_mode_setting))

[Stack]

• Max Depth = 100
• Call Chain = svs_direct_mode_setting ⇒ __aeabi_uidivmod

• >>   hal_intl_fb_get_rx_fb_info
• >>   drv_rxbr_hline_rcv1_cfg
• >>   drv_rxbr_clear_status0
• >>   __aeabi_uidivmod

• >>   svs_wait_start

svs_get_rel_intv (Thumb, 20 bytes, Stack size 8 bytes, hal_internal_svs.o(i.svs_get_rel_intv))

[Stack]

• Max Depth = 20
• Call Chain = svs_get_rel_intv ⇒ __aeabi_uidivmod

• >>   __aeabi_uidivmod

• >>   svs_wait_start
• >>   svs_wait_fr_stab
• >>   svs_sync_handle

svs_sync_handle (Thumb, 158 bytes, Stack size 24 bytes, hal_internal_svs.o(i.svs_sync_handle))

[Stack]

• Max Depth = 128
• Call Chain = svs_sync_handle ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   __aeabi_ui2f
• >>   __aeabi_fmul
• >>   __aeabi_f2d
• >>   __aeabi_fdiv
• >>   __aeabi_dadd
• >>   __aeabi_d2uiz
• >>   svs_get_rel_intv

• hal_internal_svs.o(i.svs_wait_fr_stab)

svs_wait_fr_stab (Thumb, 148 bytes, Stack size 16 bytes, hal_internal_svs.o(i.svs_wait_fr_stab))

[Stack]

• Max Depth = 352
• Call Chain = svs_wait_fr_stab ⇒ tau_log_printf ⇒ tau_log_push_log ⇒ delayUs

• >>   __aeabi_ui2f
• >>   __aeabi_fmul
• >>   drv_rxbr_frame_drop_cfg
• >>   tau_log_printf
• >>   __aeabi_f2uiz
• >>   svs_get_rel_intv
• >>   __aeabi_uidivmod

• hal_internal_svs.o(i.svs_wait_start)

svs_wait_start (Thumb, 250 bytes, Stack size 24 bytes, hal_internal_svs.o(i.svs_wait_start))

[Stack]

• Max Depth = 160
• Call Chain = svs_wait_start ⇒ ceil ⇒ __aeabi_drsub ⇒ __aeabi_dadd ⇒ _double_epilogue ⇒ __aeabi_llsr

• >>   __aeabi_ui2f
• >>   __aeabi_fmul
• >>   __aeabi_f2d
• >>   hal_internal_vsync_get_tx_state
• >>   drv_rxbr_set_inten
• >>   drv_crgu_get_rxbr_clk
• >>   __aeabi_fdiv
• >>   __aeabi_d2uiz
• >>   drv_rxbr_hline_rcv1_cfg
• >>   svs_get_rel_intv
• >>   svs_direct_mode_setting
• >>   drv_rxbr_clear_status0
• >>   ceil

• hal_internal_svs.o(i.hal_intl_svs_deinit_rx)
• hal_internal_svs.o(i.hal_intl_svs_init_rx)

drv_gpio_handle_int (Thumb, 30 bytes, Stack size 8 bytes, drv_gpio.o(i.drv_gpio_handle_int))

[Stack]

• Max Depth = 16
• Call Chain = drv_gpio_handle_int ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_clear_pending

• >>   EXTI_INT7_IRQn_Handler
• >>   EXTI_INT6_IRQn_Handler
• >>   EXTI_INT5_IRQn_Handler
• >>   EXTI_INT4_IRQn_Handler
• >>   EXTI_INT3_IRQn_Handler
• >>   EXTI_INT2_IRQn_Handler
• >>   EXTI_INT1_IRQn_Handler
• >>   EXTI_INT0_IRQn_Handler

drv_timer_clear_status_flags (Thumb, 26 bytes, Stack size 8 bytes, drv_timer.o(i.drv_timer_clear_status_flags))

[Stack]

• Max Depth = 16
• Call Chain = drv_timer_clear_status_flags ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_clear_pending
• >>   drv_timer_get_instance

• >>   drv_timer_handle_interrupt

drv_timer_handle_interrupt (Thumb, 54 bytes, Stack size 16 bytes, drv_timer.o(i.drv_timer_handle_interrupt))

[Stack]

• Max Depth = 44
• Call Chain = drv_timer_handle_interrupt ⇒ drv_timer_set_compare_val ⇒ __aeabi_uidivmod

• >>   drv_timer_set_int
• >>   drv_timer_set_compare_val
• >>   drv_timer_clear_status_flags

• >>   TIMER3_IRQn_Handler
• >>   TIMER2_IRQn_Handler
• >>   TIMER1_IRQn_Handler
• >>   TIMER0_IRQn_Handler

drv_dsi_rx_get_color_bpp (Thumb, 62 bytes, Stack size 4 bytes, drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp))

[Stack]

• Max Depth = 12
• Call Chain = drv_dsi_rx_get_color_bpp ⇒ __ARM_common_switch8

• >>   __ARM_common_switch8

• >>   drv_dsi_rx_calc_ipi_tx_delay

drv_dsi_rx_get_color_pcc (Thumb, 24 bytes, Stack size 0 bytes, drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc))

[Called By]

• >>   drv_dsi_rx_calc_ipi_tx_delay

drv_lcdc_clear_int (Thumb, 20 bytes, Stack size 8 bytes, drv_lcdc.o(i.drv_lcdc_clear_int))

[Stack]

• Max Depth = 16
• Call Chain = drv_lcdc_clear_int ⇒ drv_sys_cfg_clear_pending

• >>   drv_sys_cfg_clear_pending

• >>   drv_lcdc_set_int

__NVIC_DisableIRQ (Thumb, 26 bytes, Stack size 0 bytes, drv_rxbr.o(i.__NVIC_DisableIRQ))

[Called By]

• >>   drv_rxbr_enable_irq

__NVIC_EnableIRQ (Thumb, 18 bytes, Stack size 0 bytes, drv_rxbr.o(i.__NVIC_EnableIRQ))

[Called By]

• >>   drv_rxbr_enable_irq

drv_dma_get_int_source (Thumb, 16 bytes, Stack size 0 bytes, drv_dma.o(i.drv_dma_get_int_source))

[Called By]

• >>   DMA_IRQn_Handler

drv_uart_enable_clk (Thumb, 24 bytes, Stack size 8 bytes, drv_uart.o(i.drv_uart_enable_clk))

[Stack]

• Max Depth = 8
• Call Chain = drv_uart_enable_clk

• >>   drv_crgu_enable_clock

• >>   drv_uart_init

drv_uart_int_trans_handle (Thumb, 54 bytes, Stack size 8 bytes, drv_uart.o(i.drv_uart_int_trans_handle))

[Stack]

• Max Depth = 8
• Call Chain = drv_uart_int_trans_handle

• >>   UART_IRQn_Handler

_fp_digits (Thumb, 344 bytes, Stack size 64 bytes, printfa.o(i._fp_digits), UNUSED)

[Calls]

• >>   __aeabi_dadd
• >>   __aeabi_dmul
• >>   __aeabi_cdrcmple
• >>   __aeabi_uldivmod
• >>   __aeabi_ddiv
• >>   __aeabi_d2ulz

• >>   _printf_core

_printf_core (Thumb, 1754 bytes, Stack size 128 bytes, printfa.o(i._printf_core), UNUSED)

[Calls]

• >>   __aeabi_uidivmod
• >>   __aeabi_uldivmod
• >>   _printf_pre_padding
• >>   _printf_post_padding
• >>   _fp_digits

• >>   __0vsprintf
• >>   __0printf

_printf_post_padding (Thumb, 32 bytes, Stack size 24 bytes, printfa.o(i._printf_post_padding), UNUSED)

[Called By]

• >>   _printf_core

_printf_pre_padding (Thumb, 44 bytes, Stack size 40 bytes, printfa.o(i._printf_pre_padding), UNUSED)

[Called By]

• >>   _printf_core

_sputc (Thumb, 10 bytes, Stack size 0 bytes, printfa.o(i._sputc))

[Called By]

• >>   __0vsprintf

• printfa.o(i.__0vsprintf)

Undefined Global Symbols