commit aebbd7deb43f85164dc109ff5fe124ea34682aed Author: “苏飞源” Date: Wed Apr 24 17:40:41 2024 +0800 1、首次提交，已经正常点亮 diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..243d6b9 --- /dev/null +++ b/.gitignore @@ -0,0 +1,85 @@ +# A .gitignore for Keil projects. +# Taken mostly from http://www.keil.com/support/man/docs/uv4/uv4_b_filetypes.htm + +# User-specific uVision files +*.opt +*.uvopt +*.uvoptx +*.uvgui +*.uvgui.* +*.uvguix.* + +# Listing files +#*.cod +#*.map +#*.m51 +#*.m66 +*._ip +*.i +*.lst +*/Listings/*.txt + +# define exception below if needed +*.scr + +# Object and HEX files +*.axf +*.b[0-3][0-9] +*.hex +*.d +*.crf +*.elf +*.hex +*.h86 +*.obj +*.o +*.sbr +*.htm + +# Build files +# define exception below if needed +*.bat +*._ia +*.__i +*._ii + +# Generated output files +/Listings/* +/Objects/* + +# Debugger files +# define exception below if needed +*.ini + +# Other files +*.build_log.htm +*.cdb +*.dep +*.ic +*.lin +*.lnp +*.orc +# define exception below if needed +*.pack +# define exception below if needed +*.pdsc +*.plg +# define exception below if needed +*.sct +*.sfd +*.sfr + +# Miscellaneous +*.tra +*.fed +*.l1p +*.l2p +*.iex + + +/si/ +!*.bin +!*.map + +# To explicitly override the above, define any exceptions here; e.g.: +# !my_customized_scatter_file.sct diff --git a/project/WL668T/Listings/WL668T_Honor90Pro_20240424.map b/project/WL668T/Listings/WL668T_Honor90Pro_20240424.map new file mode 100644 index 0000000..d72a124 --- /dev/null +++ b/project/WL668T/Listings/WL668T_Honor90Pro_20240424.map @@ -0,0 +1,4012 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to honor90pro_demo.o(i.Note11Pro_demo) for Note11Pro_demo + main.o(i.main) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + honor90pro_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + honor90pro_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + honor90pro_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + honor90pro_demo.o(i.Note11Pro_demo) refers to hal_pwr.o(i.hal_pwr_set_main_power) for hal_pwr_set_main_power + honor90pro_demo.o(i.Note11Pro_demo) refers to honor90pro_demo.o(i.app_display_init) for app_display_init + honor90pro_demo.o(i.Note11Pro_demo) refers to hal_pwr.o(i.hal_pwr_ldo18s_en) for hal_pwr_ldo18s_en + honor90pro_demo.o(i.Note11Pro_demo) refers to hal_pwr.o(i.hal_pwr_ldo18s_set) for hal_pwr_ldo18s_set + honor90pro_demo.o(i.Note11Pro_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) for hal_dsi_rx_ctrl_dcs_async_handler + honor90pro_demo.o(i.Note11Pro_demo) refers to honor90pro_demo.o(i.app_system_suspend) for app_system_suspend + honor90pro_demo.o(i.Note11Pro_demo) refers to hal_pwr.o(i.hal_pwr_exit_sleep_mode) for hal_pwr_exit_sleep_mode + honor90pro_demo.o(i.Note11Pro_demo) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.Note11Pro_demo) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + honor90pro_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + honor90pro_demo.o(i.ap_dcs_read) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.ap_dcs_read) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.ap_dcs_set_display_off) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.ap_dcs_set_display_off) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.ap_dcs_set_display_on) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.ap_dcs_set_display_on) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) for hal_dsi_tx_ctrl_set_tear_mode + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_swire.o(i.hal_swire_enable) for hal_swire_enable + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to honor90pro_demo.o(i.ap_rstn_pull_down_cb) for ap_rstn_pull_down_cb + honor90pro_demo.o(i.ap_dcs_set_exit_sleep_mode) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.ap_rstn_pull_down_cb) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + honor90pro_demo.o(i.ap_rstn_pull_down_cb) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.ap_rstn_pull_down_cb) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.ap_rstn_pull_high_cb) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + honor90pro_demo.o(i.ap_rstn_pull_high_cb) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.ap_set_backlight) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + honor90pro_demo.o(i.ap_update_frame_rate) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.ap_update_frame_rate) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) for hal_dsi_tx_ctrl_set_tear_mode + honor90pro_demo.o(i.ap_update_frame_rate) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.app_display_init) refers to honor90pro_demo.o(i.app_mipi_rx_init) for app_mipi_rx_init + honor90pro_demo.o(i.app_display_init) refers to hal_pwr.o(i.hal_pwr_get_vcc_power_ready) for hal_pwr_get_vcc_power_ready + honor90pro_demo.o(i.app_display_init) refers to honor90pro_demo.o(i.app_gpio_init) for app_gpio_init + honor90pro_demo.o(i.app_display_init) refers to hal_swire.o(i.hal_swire_init) for hal_swire_init + honor90pro_demo.o(i.app_display_init) refers to hal_swire.o(i.hal_swire_set_timer) for hal_swire_set_timer + honor90pro_demo.o(i.app_display_init) refers to honor90pro_demo.o(i.app_mipi_tx_init) for app_mipi_tx_init + honor90pro_demo.o(i.app_display_init) refers to honor90pro_demo.o(i.app_mipi_tx_start) for app_mipi_tx_start + honor90pro_demo.o(i.app_gpio_init) refers to hal_gpio.o(i.hal_gpio_config_pad) for hal_gpio_config_pad + honor90pro_demo.o(i.app_gpio_init) refers to honor90pro_demo.o(.constdata) for .constdata + honor90pro_demo.o(i.app_init_panel) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + honor90pro_demo.o(i.app_init_panel) refers to tau_delay.o(i.delayMs) for delayMs + honor90pro_demo.o(i.app_init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + honor90pro_demo.o(i.app_init_panel) refers to tau_delay.o(i.delayUs) for delayUs + honor90pro_demo.o(i.app_init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + honor90pro_demo.o(i.app_init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + honor90pro_demo.o(i.app_init_panel) refers to hal_swire.o(i.hal_swire_enable) for hal_swire_enable + honor90pro_demo.o(i.app_init_panel) refers to hal_swire.o(i.hal_swire_set_pulse) for hal_swire_set_pulse + honor90pro_demo.o(i.app_init_panel) refers to honor90pro_demo.o(.constdata) for .constdata + honor90pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + honor90pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) for hal_dsi_rx_ctrl_set_check_crc + honor90pro_demo.o(i.app_mipi_rx_init) refers to memcpya.o(.text) for __aeabi_memcpy4 + honor90pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + honor90pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + honor90pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) for hal_dsi_rx_ctrl_set_auto_ack + honor90pro_demo.o(i.app_mipi_rx_init) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + honor90pro_demo.o(i.app_mipi_rx_init) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.app_mipi_rx_init) refers to honor90pro_demo.o(.constdata) for .constdata + honor90pro_demo.o(i.app_mipi_rx_init) refers to honor90pro_demo.o(i.ap_dcs_read) for ap_dcs_read + honor90pro_demo.o(i.app_mipi_rx_init) refers to honor90pro_demo.o(i.pps_update_handle) for pps_update_handle + honor90pro_demo.o(i.app_mipi_rx_init) refers to honor90pro_demo.o(i.app_mipi_rx_start_cb) for app_mipi_rx_start_cb + honor90pro_demo.o(i.app_mipi_rx_start_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + honor90pro_demo.o(i.app_mipi_rx_start_cb) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + honor90pro_demo.o(i.app_mipi_rx_start_cb) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.app_mipi_rx_start_cb) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.app_mipi_tx_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + honor90pro_demo.o(i.app_mipi_tx_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + honor90pro_demo.o(i.app_mipi_tx_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + honor90pro_demo.o(i.app_mipi_tx_init) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.app_mipi_tx_start) refers to honor90pro_demo.o(i.app_init_panel) for app_init_panel + honor90pro_demo.o(i.app_mipi_tx_start) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + honor90pro_demo.o(i.app_mipi_tx_start) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) for hal_dsi_tx_ctrl_set_tear_mode + honor90pro_demo.o(i.app_mipi_tx_start) refers to tau_delay.o(i.delayMs) for delayMs + honor90pro_demo.o(i.app_mipi_tx_start) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + honor90pro_demo.o(i.app_mipi_tx_start) refers to hal_swire.o(i.hal_swire_set_pulse) for hal_swire_set_pulse + honor90pro_demo.o(i.app_mipi_tx_start) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.app_mipi_tx_start) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.app_mipi_tx_start) refers to honor90pro_demo.o(i.Note11Pro_demo) for i.Note11Pro_demo + honor90pro_demo.o(i.app_system_suspend) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + honor90pro_demo.o(i.app_system_suspend) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + honor90pro_demo.o(i.app_system_suspend) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + honor90pro_demo.o(i.app_system_suspend) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + honor90pro_demo.o(i.app_system_suspend) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + honor90pro_demo.o(i.app_system_suspend) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + honor90pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_set_sleep_mode_power) for hal_pwr_set_sleep_mode_power + honor90pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) for hal_pwr_enter_deep_sleep_mode + honor90pro_demo.o(i.app_system_suspend) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + honor90pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) for hal_pwr_enter_normal_sleep_mode + honor90pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) for hal_pwr_set_stop_sleep_wakeup_pin + honor90pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) for hal_pwr_enter_stop_sleep_mode + honor90pro_demo.o(i.app_system_suspend) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.app_system_suspend) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.app_system_suspend) refers to honor90pro_demo.o(i.ap_rstn_pull_high_cb) for ap_rstn_pull_high_cb + honor90pro_demo.o(i.pps_update_handle) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + honor90pro_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + honor90pro_demo.o(i.pps_update_handle) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.pps_update_handle) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(.constdata) refers to honor90pro_demo.o(i.ap_dcs_set_display_on) for ap_dcs_set_display_on + honor90pro_demo.o(.constdata) refers to honor90pro_demo.o(i.ap_dcs_set_display_off) for ap_dcs_set_display_off + honor90pro_demo.o(.constdata) refers to honor90pro_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + honor90pro_demo.o(.constdata) refers to honor90pro_demo.o(i.ap_set_backlight) for ap_set_backlight + honor90pro_demo.o(.constdata) refers to honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) for ap_dcs_set_enter_sleep_mode + honor90pro_demo.o(.constdata) refers to honor90pro_demo.o(i.ap_dcs_set_exit_sleep_mode) for ap_dcs_set_exit_sleep_mode + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to tau_log.o(i.tau_log_init) for tau_log_init + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to drv_common.o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to drv_common.o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to drv_vidc.o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to hal_internal_vsync.o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_memc.o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to hal_internal_dcs.o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_dma.o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_uart.o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_rxbr.o(i.VPRE1_IRQn_Handler) for VPRE1_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_swire.o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_md) for drv_rxbr_set_ack_pkt_md + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_lpdt_fifo_status) for drv_dsi_rx_get_lpdt_fifo_status + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to hal_dsi_rx_ctrl.o(i.swap_uint16_t) for swap_uint16_t + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex) for hal_dsi_rx_ctrl_set_pixel_data_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_rxbr.o(i.drv_rxbr_swpxl_clr) for drv_rxbr_swpxl_clr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_rxbr.o(i.drv_rxbr_set_swpxl_data) for drv_rxbr_set_swpxl_data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) for hal_dsi_rx_ctrl_set_rx_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.constdata) for .constdata + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_force_video_crtl) refers to drv_dsi_rx.o(i.drv_dsi_rx_force_video_crtl) for drv_dsi_rx_force_video_crtl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_cap_pixel_color) refers to drv_vidc.o(i.drv_vidc_get_status2) for drv_vidc_get_status2 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_irqen) for drv_dsc_dec_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_se.o(i.drv_se_start_rx) for drv_se_start_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_pwr.o(i.drv_pwr_set_pll_clk) for drv_pwr_set_pll_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_clk) for drv_crgu_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_clk) for drv_crgu_set_dsc_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_clk) for drv_crgu_set_vidc_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_clk) for drv_crgu_set_fb_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en) for drv_dsi_rx_set_ddi_crc_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt) for drv_dsi_rx_set_ipi_ycbcr_frmt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en) for drv_dsi_rx_set_tear_resp_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) for drv_dsi_rx_set_check_crc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_circ_mode_enable) for drv_memc_set_circ_mode_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_pu_thres) for drv_memc_set_ltpo_pu_thres + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) for hal_intl_dcs_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_circ_mode_enable) for drv_vidc_set_circ_mode_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dither_config) for drv_vidc_set_dither_config + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_vintp_config) for drv_vidc_set_vintp_config + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_honly_hinitr) for drv_vidc_set_honly_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_honly_hinitb) for drv_vidc_set_honly_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_honly_hcoef0) for drv_vidc_set_honly_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.constdata) for .constdata + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to hal_internal_vsync.o(i.hal_internal_sync_register_rx_callback) for hal_internal_sync_register_rx_callback + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to drv_vidc.o(i.drv_vidc_set_irq_line) for drv_vidc_set_irq_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_write_cmd_entry) refers to hal_internal_dcs.o(i.hal_intl_dcs_register_write_cmd_entry) for hal_intl_dcs_register_write_cmd_entry + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_response) for drv_rxbr_set_cmd_response + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) for hal_intl_dcs_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cap_pixel_pos) refers to drv_vidc.o(i.drv_vidc_debug_cap_pixel) for drv_vidc_debug_cap_pixel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) for drv_dsi_rx_set_check_crc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_log_level) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_drv_log_level) for drv_dsi_rx_set_drv_log_level + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to drv_rxbr.o(i.drv_rxbr_sw_reset) for drv_rxbr_sw_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex) refers to drv_rxbr.o(i.drv_rxbr_sw_reset) for drv_rxbr_sw_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) for hal_intl_svs_update_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_clk) for drv_crgu_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) for hal_internal_vsync_toggle_input_frame_rate + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) for hal_internal_sync_register_lcdc_cb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) for hal_internal_sync_set_fb_setting_manual + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame) refers to drv_lcdc.o(i.drv_lcdc_fixed_frame_output) for drv_lcdc_fixed_frame_output + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_get_tear_mode) for drv_memc_get_tear_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) for hal_internal_sync_register_lcdc_cb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) for hal_dsi_tx_init_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) for hal_dsi_tx_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) for hal_nonshadow_func_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) for hal_vsync_func_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_overwrite_enable) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_overwrite_enable) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_partial_disp_enable) refers to drv_lcdc.o(i.drv_lcdc_part_display_config) for drv_lcdc_part_display_config + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_partial_disp_enable) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_sync_line) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) for hal_dsi_tx_ctrl_draw_flick + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_cfg_int_frame) for drv_lcdc_cfg_int_frame + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_start) for hal_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_stop_display) for drv_lcdc_stop_display + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) for hal_dsi_tx_ctrl_read_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to drv_crgu.o(i.drv_crgu_set_dpi_clk) for drv_crgu_set_dpi_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) for hal_dsi_tx_timing_info_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) for hal_dsi_tx_cmd_mode_cal_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) for hal_dsi_tx_init_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) for hal_dsi_tx_vid_mode_cal_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) for hal_dsi_tx_init_vid_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) refers to d2f.o(.text) for __aeabi_d2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_internal_svs.o(i.hal_intl_svs_init_tx) for hal_intl_svs_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) for hal_tx_frame_rate_adjust + hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) refers to drv_lcdc.o(i.drv_lcdc_endianness_config) for drv_lcdc_endianness_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) refers to drv_lcdc.o(i.drv_lcdc_crop_hact) for drv_lcdc_crop_hact + hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) for hal_lcdc_postproc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) for hal_lcdc_displayproc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) for hal_intl_fb_get_tx_fb_info + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) for hal_lcdc_timinggen_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_clk) for drv_crgu_set_lcdc_clk + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) for hal_intl_fb_get_tx_fb_info + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) for hal_lcdc_upscaler_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_fldc_config) for drv_lcdc_fldc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_bcsa_config) for drv_lcdc_bcsa_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_fc_config) for drv_lcdc_fc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_edge_dect_config) for drv_lcdc_edge_dect_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_edge_enh_config) for drv_lcdc_edge_enh_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_vintp_mode_config) for drv_lcdc_vintp_mode_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_dith_config) for drv_lcdc_dith_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to drv_lcdc.o(i.drv_lcdc_vid_hw_start) for drv_lcdc_vid_hw_start + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to drv_lcdc.o(i.drv_lcdc_cmd_start) for drv_lcdc_cmd_start + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to drv_lcdc.o(i.drv_lcdc_set_prefetch) for drv_lcdc_set_prefetch + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for sg_pq_para + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_bcsa_config) for drv_lcdc_bcsa_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_fc_config) for drv_lcdc_fc_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_edge_dect_config) for drv_lcdc_edge_dect_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_edge_enh_config) for drv_lcdc_edge_enh_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for sg_pq_para + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to cfcmple.o(.text) for __aeabi_cfcmple + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_gpio.o(i.hal_gpio_config_pad) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_config_pad) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_gpio.o(i.hal_gpio_config_pad) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_high_impedance) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode) for drv_gpio_set_mode + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_swire.o(i.hal_swire_deinit) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + hal_swire.o(i.hal_swire_deinit) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_get_pulse_count) for drv_swire_get_pulse_count + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_set_trig_mode) for drv_swire_set_trig_mode + hal_swire.o(i.hal_swire_enable) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_enable) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock_div) for drv_crgu_set_clock_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_init) refers to drv_common.o(.data) for g_system_clock + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_set_pulse) refers to drv_swire.o(i.drv_swire_set_trig_mode) for drv_swire_set_trig_mode + hal_swire.o(i.hal_swire_set_pulse) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_set_pulse) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_set_timer) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer) for drv_sys_cfg_sel_swire_timer + hal_swire.o(i.hal_swire_set_timer) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + hal_swire.o(i.hal_swire_set_timer) refers to hal_timer.o(i.hal_timer_set_repeat) for hal_timer_set_repeat + hal_swire.o(i.hal_swire_set_timer) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_swire.o(i.hal_swire_set_timer) refers to drv_swire.o(i.drv_swire_set_trig_mode) for drv_swire_set_trig_mode + hal_swire.o(i.hal_swire_set_timer) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_set_waveform) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_set_waveform) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_set_waveform) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pll_clk) for drv_pwr_set_pll_clk + hal_system.o(i.hal_system_init) refers to hal_system.o(i.hal_system_updata_sysclk) for hal_system_updata_sysclk + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_reset_chip) refers to drv_crgu.o(i.drv_crgu_reset_chip) for drv_crgu_reset_chip + hal_system.o(i.hal_system_updata_sysclk) refers to drv_crgu.o(i.drv_crgu_set_ahb_clk) for drv_crgu_set_ahb_clk + hal_system.o(i.hal_system_updata_sysclk) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_updata_sysclk) refers to drv_common.o(.data) for g_system_delay_step + hal_pwr.o(i.hal_pwr_elvcc_close) refers to drv_pwr.o(i.drv_pwr_pwmled_electric_current) for drv_pwr_pwmled_electric_current + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_pwmled_electric_current) for drv_pwr_pwmled_electric_current + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_hv_ldo_mode_sel) for drv_pwr_hv_ldo_mode_sel + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_hv_ldo_mode_clock_sel) for drv_pwr_hv_ldo_mode_clock_sel + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_pwmled_driver_current_Big_step) for drv_pwr_pwmled_driver_current_Big_step + hal_pwr.o(i.hal_pwr_elvcc_vol_set) refers to drv_pwr.o(i.drv_pwr_hv_ldo_voltage_set) for drv_pwr_hv_ldo_voltage_set + hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_set_wakeup_type) for drv_pwr_set_wakeup_type + hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex) for drv_pwr_enter_sleep_mode_ex + hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) for drv_pwr_enter_stop_sleep_mode + hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) refers to hal_pwr.o(.data) for .data + hal_pwr.o(i.hal_pwr_exit_sleep_mode) refers to drv_pwr.o(i.drv_pwr_exit_sleep_mode) for drv_pwr_exit_sleep_mode + hal_pwr.o(i.hal_pwr_get_reset_flag) refers to drv_crgu.o(i.drv_crgu_get_all_reset_flag) for drv_crgu_get_all_reset_flag + hal_pwr.o(i.hal_pwr_get_reset_flag) refers to drv_pwr.o(i.drv_pwr_get_wakeflag) for drv_pwr_get_wakeflag + hal_pwr.o(i.hal_pwr_get_reset_flag) refers to drv_crgu.o(i.drv_crgu_clear_all_reset_flags) for drv_crgu_clear_all_reset_flags + hal_pwr.o(i.hal_pwr_get_vcc_power_ready) refers to drv_pwr.o(i.drv_pwr_get_power_ready_st) for drv_pwr_get_power_ready_st + hal_pwr.o(i.hal_pwr_ldo13s_en) refers to drv_pwr.o(i.drv_pwr_ldo13s_en) for drv_pwr_ldo13s_en + hal_pwr.o(i.hal_pwr_ldo13s_set) refers to drv_pwr.o(i.drv_pwr_ldo13s_set) for drv_pwr_ldo13s_set + hal_pwr.o(i.hal_pwr_ldo18s_en) refers to drv_pwr.o(i.drv_pwr_ldo18s_en) for drv_pwr_ldo18s_en + hal_pwr.o(i.hal_pwr_ldo18s_set) refers to drv_pwr.o(i.drv_pwr_ldo18s_set) for drv_pwr_ldo18s_set + hal_pwr.o(i.hal_pwr_set_main_power) refers to drv_pwr.o(i.drv_pwr_set_digit_power_sel) for drv_pwr_set_digit_power_sel + hal_pwr.o(i.hal_pwr_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd) for drv_pwr_set_pvd + hal_pwr.o(i.hal_pwr_set_sleep_mode_power) refers to drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) for drv_pwr_set_breath_screen_power_sel + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_pwr.o(.data) for .data + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_pwr.o(i.stop_sleep_cb) for stop_sleep_cb + hal_pwr.o(i.hal_pwr_set_vcc_enable) refers to drv_pwr.o(i.drv_pwr_charge_pump_en) for drv_pwr_charge_pump_en + hal_pwr.o(i.hal_pwr_sw_tp18_en) refers to drv_pwr.o(i.drv_pwr_sw_tp18_en) for drv_pwr_sw_tp18_en + hal_pwr.o(i.stop_sleep_cb) refers to hal_pwr.o(.data) for .data + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_delay.o(i.delayUs) refers to drv_common.o(.data) for g_system_delay_step + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_recv_blocking) for hal_uart_recv_blocking + tau_log.o(i.fgetc) refers to hal_system.o(i.hal_system_get_debug_state) for hal_system_get_debug_state + tau_log.o(i.fgetc) refers to hal_system.o(i.hal_system_clear_debug_state) for hal_system_clear_debug_state + tau_log.o(i.fgetc) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.fputc) refers to tau_log.o(i.tau_log_push_log) for tau_log_push_log + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_send_blocking) for hal_uart_send_blocking + tau_log.o(i.fputc) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.tau_log_init) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + tau_log.o(i.tau_log_init) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.tau_log_printf) refers to memseta.o(.text) for __aeabi_memclr4 + tau_log.o(i.tau_log_printf) refers to strlen.o(.text) for strlen + tau_log.o(i.tau_log_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.tau_log_printf) refers to tau_log.o(i.tau_log_push_log) for tau_log_push_log + tau_log.o(i.tau_log_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.tau_log_printf) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.tau_log_printf) refers to tau_log.o(.bss) for g_log_buf + tau_log.o(i.tau_log_push_log) refers to memcpya.o(.text) for __aeabi_memcpy + tau_log.o(i.tau_log_push_log) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(.ARM.__at_0x1101C) refers to tau_log.o(.bss) for g_log_buf + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_uart.o(i.hal_uart0_rx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart0_tx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart1_rx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart1_tx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.drv_uart_deinit) for drv_uart_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_uart.o(i.hal_uart_deinit) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_dma_path_close) refers to drv_dma.o(i.drv_dma_disable) for drv_dma_disable + hal_uart.o(i.hal_uart_dma_path_close) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_dma_path_close) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_apply_handle) for drv_dma_apply_handle + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_register_callback) for drv_dma_register_callback + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_enable_int) for drv_dma_enable_int + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_disable) for drv_dma_disable + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_set_mem_trans_info) for drv_dma_set_mem_trans_info + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_enable) for drv_dma_enable + hal_uart.o(i.hal_uart_dma_recv) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_uart.o(i.hal_uart_dma_recv) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_dma_recv) refers to hal_uart.o(i.hal_uart0_rx_dma_cb) for hal_uart0_rx_dma_cb + hal_uart.o(i.hal_uart_dma_recv) refers to hal_uart.o(i.hal_uart1_rx_dma_cb) for hal_uart1_rx_dma_cb + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_apply_handle) for drv_dma_apply_handle + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_register_callback) for drv_dma_register_callback + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_enable_int) for drv_dma_enable_int + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_disable) for drv_dma_disable + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_set_mem_trans_info) for drv_dma_set_mem_trans_info + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_enable) for drv_dma_enable + hal_uart.o(i.hal_uart_dma_send) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_uart.o(i.hal_uart_dma_send) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_dma_send) refers to hal_uart.o(i.hal_uart0_tx_dma_cb) for hal_uart0_tx_dma_cb + hal_uart.o(i.hal_uart_dma_send) refers to hal_uart.o(i.hal_uart1_tx_dma_cb) for hal_uart1_tx_dma_cb + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.drv_uart_init) for drv_uart_init + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.drv_uart_trans_create_handle) for drv_uart_trans_create_handle + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_recv_blocking) refers to drv_uart.o(i.drv_uart_recv_blocking) for drv_uart_recv_blocking + hal_uart.o(i.hal_uart_recv_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_recv_none_blocking) refers to drv_uart.o(i.drv_uart_recv_none_blocking) for drv_uart_recv_none_blocking + hal_uart.o(i.hal_uart_recv_none_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_send_blocking) refers to drv_uart.o(i.drv_uart_send_blocking) for drv_uart_send_blocking + hal_uart.o(i.hal_uart_send_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_send_none_blocking) refers to drv_uart.o(i.drv_uart_send_none_blocking) for drv_uart_send_none_blocking + hal_uart.o(i.hal_uart_send_none_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_internal_vsync.o(i.LCDC_IRQn_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) for hal_intl_fb_cal_fb_info + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) for hal_dsi_tx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_register_rx_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) for hal_intl_fb_set_fb_info_manual + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) for hal_intl_fb_cal_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_svs.o(i.hal_intl_svs_init_rx) for hal_intl_svs_init_rx + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) for hal_intl_dcs_init_sw_fltr + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_pro_motion_init) for soft_pro_motion_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) for hal_intl_fb_cal_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_svs.o(i.hal_intl_svs_deinit_rx) for hal_intl_svs_deinit_rx + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_svs.o(i.hal_intl_svs_set_sync_coef) for hal_intl_svs_set_sync_coef + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_memc.o(i.drv_memc_set_frame_drop_select) for drv_memc_set_frame_drop_select + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_set_tear_line) for drv_lcdc_set_tear_line + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to idiv.o(.text) for __aeabi_idivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_config_acc_command_mode) for drv_lcdc_config_acc_command_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_svs.o(i.hal_intl_svs_deinit_tx) for hal_intl_svs_deinit_tx + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.soft_pro_motion_init) for soft_pro_motion_init + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_svs.o(i.hal_intl_svs_set_input_frate) for hal_intl_svs_set_input_frate + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.soft_pro_motion_init) for soft_pro_motion_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.soft_double_buffer_update) for soft_double_buffer_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_svs.o(i.hal_intl_svs_handle) for hal_intl_svs_handle + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_lcdc.o(i.drv_lcdc_cmd_start) for drv_lcdc_cmd_start + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) for hal_intl_svs_set_rx_vtt + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_double_buffer_update) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(i.soft_tear_adjust_line) for soft_tear_adjust_line + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(i.soft_tear_adjust_line) for soft_tear_adjust_line + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_pro_motion_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.soft_pro_motion_init) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_pro_motion_init) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.soft_tear_adjust_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_int_source) for drv_vidc_get_int_source + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to hal_internal_dcs.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) for hal_intl_dcs_rx_receive_packet + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_crgu.o(i.drv_crgu_set_dsc_clk) for drv_crgu_set_dsc_clk + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to hal_internal_dcs.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) refers to hal_internal_dcs.o(.bss) for .bss + hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_register_write_cmd_entry) refers to hal_internal_dcs.o(.data) for .data + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) for hal_intl_dcs_sw_filter_handle + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) for hal_dsi_rx_ctrl_dcs_async_handler + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en) for drv_dsi_rx_get_ddi_crc_en + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_dcs.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_dcs.o(.data) for .data + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) for hal_intl_dcs_rx_get_dcs_packet_data + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) for hal_intl_dcs_rx_receive_pps + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to hal_internal_dcs.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to memcmp.o(.text) for memcmp + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to hal_internal_dcs.o(.conststring) for .conststring + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) refers to memseta.o(.text) for __aeabi_memset + hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_filter_regs) for drv_rxbr_set_filter_regs + hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) refers to hal_internal_dcs.o(.bss) for .bss + hal_internal_dcs.o(i.hal_intl_dcs_set_dcs_direct_mode) refers to hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) for hal_intl_dcs_set_auto_hw_filter + hal_internal_dcs.o(i.hal_intl_dcs_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) refers to hal_internal_dcs.o(.data) for .data + hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) refers to hal_internal_dcs.o(.bss) for .bss + hal_internal_dcs.o(.data) refers to hal_internal_dcs.o(.bss) for g_imm_buffer + hal_internal_fb.o(i.ha_intl_fb_check_pu_size) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.ha_intl_fb_check_pu_size) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) for hal_intl_fb_flow_control_adapter + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) for hal_intl_fb_check_bandwidth + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.ha_intl_fb_check_pu_size) for ha_intl_fb_check_pu_size + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.hal_intl_fb_edge_resize) for hal_intl_fb_edge_resize + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_fb.o(i.hal_intl_fb_edge_resize) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.hal_intl_fb_edge_resize) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_user_flow) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to hal_internal_fb.o(.conststring) for .conststring + hal_internal_svs.o(i.hal_intl_svs_deinit_rx) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.hal_intl_svs_deinit_rx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_deinit_rx) refers to hal_internal_svs.o(i.svs_wait_start) for svs_wait_start + hal_internal_svs.o(i.hal_intl_svs_deinit_tx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_handle) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) for hal_intl_svs_update_rxbr_clk + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_svs.o(i.svs_wait_start) for svs_wait_start + hal_internal_svs.o(i.hal_intl_svs_init_tx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_svs.o(i.svs_wait_start) for svs_wait_start + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_svs.o(i.svs_wait_fr_stab) for svs_wait_fr_stab + hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_set_sync_coef) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_direct_mode_setting) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_svs.o(i.svs_direct_mode_setting) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_internal_svs.o(i.svs_direct_mode_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_svs.o(i.svs_direct_mode_setting) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) for drv_rxbr_hline_rcv1_cfg + hal_internal_svs.o(i.svs_direct_mode_setting) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_get_rel_intv) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_svs.o(i.svs_get_rel_intv) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_sync_handle) refers to hal_internal_svs.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_svs.o(i.svs_sync_handle) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_svs.o(i.svs_sync_handle) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_svs.o(i.svs_sync_handle) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_svs.o(i.svs_sync_handle) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_svs.o(i.svs_sync_handle) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_svs.o(i.svs_sync_handle) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_svs.o(i.svs_sync_handle) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_wait_fr_stab) refers to hal_internal_svs.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_svs.o(i.svs_wait_fr_stab) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_svs.o(i.svs_wait_fr_stab) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_svs.o(i.svs_wait_fr_stab) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_svs.o(i.svs_wait_fr_stab) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_svs.o(i.svs_wait_fr_stab) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_svs.o(i.svs_wait_fr_stab) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_internal_svs.o(i.svs_wait_fr_stab) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_wait_fr_stab) refers to hal_internal_svs.o(i.svs_sync_handle) for svs_sync_handle + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_svs.o(i.svs_wait_start) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_internal_svs.o(i.svs_wait_start) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_svs.o(i.svs_wait_start) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_internal_svs.o(i.svs_wait_start) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_svs.o(i.svs_wait_start) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_svs.o(i.svs_wait_start) refers to ceil.o(i.ceil) for ceil + hal_internal_svs.o(i.svs_wait_start) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(i.svs_direct_mode_setting) for svs_direct_mode_setting + hal_internal_svs.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_svs.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) for drv_rxbr_hline_rcv1_cfg + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(i.svs_wait_fr_stab) for svs_wait_fr_stab + drv_common.o(i.HardFault_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_common.o(i.SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_se.o(i.drv_se_init) for drv_se_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_crgu.o(i.drv_crgu_get_rxbr_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_crgu.o(i.drv_crgu_get_system_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_se.o(i.drv_se_set_dsc) for drv_se_set_dsc + drv_gpio.o(i.AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.drv_gpio_handle_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_handle_int) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_pwr.o(i.drv_pwr_analog_pwm_en) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_elvcc_pwm_en) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_elvcc_pwm_en) refers to tau_delay.o(i.delayMs) for delayMs + drv_pwr.o(i.drv_pwr_enter_sleep_mode) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_enter_sleep_mode) refers to drv_pwr.o(i.drv_pwr_por_mode_flag) for drv_pwr_por_mode_flag + drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_exit_sleep_mode) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_hv_ldo_mode_clock_sel) refers to drv_pwr.o(i.drv_pwr_hv_ldo_10M_clock) for drv_pwr_hv_ldo_10M_clock + drv_pwr.o(i.drv_pwr_pwm_output_pwm_led) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_digit_power_sel) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_system_clk) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_wakeup_type) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_swire.o(i.SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_sys_cfg_sel_dma_req) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_timer.o(i.TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_compare_val) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_common.o(.data) for g_system_clock + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_se.o(i.drv_se_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_se.o(i.drv_se_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_se.o(i.drv_se_init) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_dsc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_dsc) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_lcdc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_lcdc) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_memc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_memc) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_rxbr) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_rxbr) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_vidc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_vidc) refers to drv_se.o(.data) for .data + drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) refers to drv_dsi_rx.o(.data) for .data + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_set_drv_log_level) refers to drv_dsi_rx.o(.data) for .data + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_lcdc.o(i.drv_lcdc_clear_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_cmd_start) refers to drv_se.o(i.drv_se_set_lcdc) for drv_se_set_lcdc + drv_lcdc.o(i.drv_lcdc_ctrl_flow) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + drv_lcdc.o(i.drv_lcdc_part_display_config) refers to drv_lcdc.o(i.drv_lcdc_pixel_value_config) for drv_lcdc_pixel_value_config + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_lcdc.o(i.drv_lcdc_clear_int) for drv_lcdc_clear_int + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_lcdc.o(i.drv_lcdc_vid_hw_start) refers to drv_se.o(i.drv_se_set_lcdc) for drv_se_set_lcdc + drv_memc.o(i.MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.drv_memc_rate_transfer_sel) refers to drv_se.o(i.drv_se_set_memc) for drv_se_set_memc + drv_memc.o(i.drv_memc_set_ltpo_mode) refers to drv_se.o(i.drv_se_set_memc) for drv_se_set_memc + drv_rxbr.o(i.VPRE1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.VPRE1_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_set_cmd_response) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_set_color_format) refers to drv_se.o(i.drv_se_set_rxbr) for drv_se_set_rxbr + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to tau_delay.o(i.delayMs) for delayMs + drv_rxbr.o(i.drv_rxbr_sw_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_rxbr.o(i.drv_rxbr_sw_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + drv_vidc.o(i.VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_set_src_parameter) refers to drv_se.o(i.drv_se_set_vidc) for drv_se_set_vidc + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(i.drv_dma_get_int_source) for drv_dma_get_int_source + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(i.drv_dma_clear_status) for drv_dma_clear_status + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(.data) for .data + drv_dma.o(i.drv_dma_apply_handle) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dma.o(i.drv_dma_apply_handle) refers to drv_dma.o(.data) for .data + drv_dma.o(i.drv_dma_apply_handle) refers to drv_dma.o(.constdata) for .constdata + drv_dma.o(i.drv_dma_deinit) refers to drv_dma.o(i.drv_dma_disable_int) for drv_dma_disable_int + drv_dma.o(i.drv_dma_disable_int) refers to drv_dma.o(i.drv_dma_int_list_delete) for drv_dma_int_list_delete + drv_dma.o(i.drv_dma_disable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_int) refers to drv_dma.o(i.drv_dma_int_list_inset) for drv_dma_int_list_inset + drv_dma.o(i.drv_dma_enable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_init) refers to drv_per_common.o(i.drv_per_set_clock) for drv_per_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_update_handle_setting) for drv_dma_update_handle_setting + drv_dma.o(i.drv_dma_int_list_delete) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_int_list_inset) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_update_handle_setting) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_dma_req) for drv_sys_cfg_sel_dma_req + drv_dma.o(i.drv_dma_update_req_by_default) refers to drv_dma.o(i.drv_dma_update_handle_setting) for drv_dma_update_handle_setting + drv_dma.o(i.drv_dma_update_req_by_default) refers to drv_dma.o(.constdata) for .constdata + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_int_trans_handle) for drv_uart_int_trans_handle + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_abort_recv) for drv_uart_abort_recv + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_abort_send) for drv_uart_abort_send + drv_uart.o(i.UART_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(i.drv_uart_reset_rx_fifo) for drv_uart_reset_rx_fifo + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(i.drv_uart_reset_tx_fifo) for drv_uart_reset_tx_fifo + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_deinit) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_deinit) refers to drv_uart.o(i.drv_uart_enable_clk) for drv_uart_enable_clk + drv_uart.o(i.drv_uart_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.drv_uart_deinit) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_enable_clk) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + drv_uart.o(i.drv_uart_enable_int) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_enable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.drv_uart_get_def_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.drv_uart_get_def_cfg) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.drv_uart_get_instance) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_enable_clk) for drv_uart_enable_clk + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_set_baud_rate) for drv_uart_set_baud_rate + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_enable_int) for drv_uart_enable_int + drv_uart.o(i.drv_uart_int_trans_handle) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_recv_none_blocking) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_recv_none_blocking) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_recv_none_blocking) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_reset_rx_fifo) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_reset_tx_fifo) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_send_none_blocking) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_send_none_blocking) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_send_none_blocking) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_set_baud_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.drv_uart_trans_create_handle) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_trans_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.drv_uart_trans_create_handle) refers to drv_uart.o(.bss) for .bss + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_pwr.o(i.drv_pwr_efuse_pd) for drv_pwr_efuse_pd + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_pwr.o(i.drv_pwr_efuse_pd) for drv_pwr_efuse_pd + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_efuse.o(i.drv_efuse_write_read_req_clear) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_efuse.o(i.drv_efuse_write_read_req_clear) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_per_common.o(i.drv_per_get_system_clk) refers to drv_crgu.o(i.drv_crgu_get_system_clk) for drv_crgu_get_system_clk + drv_per_common.o(i.drv_per_reset_module) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + drv_per_common.o(i.drv_per_set_clock) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + d2f.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + d2f.o(.text) refers to fepilogue.o(.text) for _float_round + cfcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing honor90pro_demo.o(.rev16_text), (4 bytes). + Removing honor90pro_demo.o(.revsh_text), (4 bytes). + Removing honor90pro_demo.o(i.Gpio_swire_output), (78 bytes). + Removing honor90pro_demo.o(.data), (1 bytes). + Removing honor90pro_demo.o(.data), (1 bytes). + Removing honor90pro_demo.o(.data), (2 bytes). + Removing honor90pro_demo.o(.data), (4 bytes). + Removing honor90pro_demo.o(.data), (128 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (220 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line), (604 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (320 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (256 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_force_video_crtl), (12 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_cap_pixel_color), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback), (66 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_write_cmd_entry), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cap_pixel_pos), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (32 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_log_level), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (240 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex), (392 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (72 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.swap_uint16_t), (10 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode), (120 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick), (244 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame), (12 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_get_disp_line), (12 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_overwrite_enable), (22 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_partial_disp_enable), (70 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (128 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (32 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm), (8 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_sync_line), (36 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (12 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (52 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera), (68 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update), (16 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_input_data), (18 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (40 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (44 bytes). + Removing hal_gpio.o(i.hal_gpio_set_high_impedance), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_pull_state), (72 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (52 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (52 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (22 bytes). + Removing hal_swire.o(i.hal_swire_set_waveform), (92 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_enable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (10 bytes). + Removing hal_pwr.o(.rev16_text), (4 bytes). + Removing hal_pwr.o(.revsh_text), (4 bytes). + Removing hal_pwr.o(i.hal_pwr_elvcc_close), (10 bytes). + Removing hal_pwr.o(i.hal_pwr_elvcc_ldo_en), (46 bytes). + Removing hal_pwr.o(i.hal_pwr_elvcc_vol_set), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_get_reset_flag), (66 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo13s_en), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo13s_set), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_set_pvd), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_set_vcc_enable), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_sw_tp18_en), (8 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (72 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_start), (48 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (42 bytes). + Removing hal_timer.o(i.hal_timer_stop), (40 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart0_rx_dma_cb), (20 bytes). + Removing hal_uart.o(i.hal_uart0_tx_dma_cb), (36 bytes). + Removing hal_uart.o(i.hal_uart1_rx_dma_cb), (20 bytes). + Removing hal_uart.o(i.hal_uart1_tx_dma_cb), (36 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (48 bytes). + Removing hal_uart.o(i.hal_uart_dma_path_close), (92 bytes). + Removing hal_uart.o(i.hal_uart_dma_recv), (276 bytes). + Removing hal_uart.o(i.hal_uart_dma_send), (280 bytes). + Removing hal_uart.o(i.hal_uart_recv_blocking), (28 bytes). + Removing hal_uart.o(i.hal_uart_recv_none_blocking), (28 bytes). + Removing hal_uart.o(i.hal_uart_send_none_blocking), (28 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (2 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_register_rx_callback), (28 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (28 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line), (60 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate), (134 bytes). + Removing hal_internal_vsync.o(.data), (4 bytes). + Removing hal_internal_dcs.o(.rev16_text), (4 bytes). + Removing hal_internal_dcs.o(.revsh_text), (4 bytes). + Removing hal_internal_dcs.o(i.hal_intl_dcs_register_write_cmd_entry), (12 bytes). + Removing hal_internal_dcs.o(i.hal_intl_dcs_set_dcs_direct_mode), (44 bytes). + Removing hal_internal_fb.o(.rev16_text), (4 bytes). + Removing hal_internal_fb.o(.revsh_text), (4 bytes). + Removing hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual), (480 bytes). + Removing hal_internal_fb.o(.conststring), (152 bytes). + Removing hal_internal_svs.o(.rev16_text), (4 bytes). + Removing hal_internal_svs.o(.revsh_text), (4 bytes). + Removing hal_internal_svs.o(i.hal_intl_svs_set_input_frate), (112 bytes). + Removing hal_internal_svs.o(i.hal_intl_svs_set_sync_coef), (12 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_enable_systick), (88 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_get_all_reset_flag), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (104 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_clock_src), (16 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_attribute), (16 bytes). + Removing drv_gpio.o(i.drv_gpio_get_input_data), (24 bytes). + Removing drv_gpio.o(i.drv_gpio_set_attribute), (28 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_10bit_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_analog_pwm_en), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_charge_pump_en), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_close_iov18_tp18), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_dsc_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_elvcc_pwm_en), (124 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_sleep_mode), (152 bytes). + Removing drv_pwr.o(i.drv_pwr_exit_sleep_mode_ex), (40 bytes). + Removing drv_pwr.o(i.drv_pwr_fb_pd), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_get_wakeflag), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_get_write_lock_st), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_hf_frm_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_10M_clock), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_mode_clock_sel), (60 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_mode_sel), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_voltage_set), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo11d_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo13s_en), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo13s_set), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo15_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_ltpo_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_osc32k_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_osc80m_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_p3k_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_por_mode_flag), (32 bytes). + Removing drv_pwr.o(i.drv_pwr_power_in), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_power_ready_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_power_sel), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_pwm_output_pwm_led), (56 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_driver_current_Big_step), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_driver_current_small_step), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_electric_current), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_open_drain), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_ram_pd_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_read_boot_chipst), (12 bytes). + Removing drv_pwr.o(i.drv_pwr_read_chipcfg), (12 bytes). + Removing drv_pwr.o(i.drv_pwr_rgbr_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_set_ap_rst_mode), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_set_ldo11_mode), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_set_ldo15_mode), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_set_pvd), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_set_pvd_mode), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_set_system_clk), (32 bytes). + Removing drv_pwr.o(i.drv_pwr_sw_tp18_en), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_wakeflag_get), (16 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_sel_dma_req), (128 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing drv_timer.o(i.drv_timer_register_callback), (20 bytes). + Removing dcs_packet_fifo.o(.rev16_text), (4 bytes). + Removing dcs_packet_fifo.o(.revsh_text), (4 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_se.o(.rev16_text), (4 bytes). + Removing drv_se.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_force_video_crtl), (28 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_lpdt_fifo_status), (16 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (68 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (12 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (24 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_drv_log_level), (12 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (16 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (24 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (16 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (68 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (296 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (228 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (32 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (100 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (20 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_clear), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_lock), (32 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (16 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_clear_irq), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_dpisignal_output_ctrl), (44 bytes). + Removing drv_lcdc.o(i.drv_lcdc_fixed_frame_output), (56 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_dpbuf_num), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_dpi_status), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_frame_clk_count), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_int_en_status), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_int_status), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_line_status), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_rgb2pen_subpixel), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_part_display_config), (52 bytes). + Removing drv_lcdc.o(i.drv_lcdc_pixel_value_config), (32 bytes). + Removing drv_lcdc.o(i.drv_lcdc_rd_st_line_config), (28 bytes). + Removing drv_lcdc.o(i.drv_lcdc_software_reset), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_vid_sw_start), (56 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (36 bytes). + Removing drv_memc.o(i.drv_memc_set_double_buffer_reverse), (24 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_pri), (44 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_inten), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (24 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (24 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (24 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_clr_swp_cnt), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_col_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_frame_data_interval), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_hline_dcat), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_page_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_swpxl_cnt), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg), (20 bytes). + Removing drv_rxbr.o(i.drv_rxbr_register_irq0_callback), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_ack_pkt_md), (28 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_cmd_filter), (320 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (32 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_data_catch_hline), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_swpxl_data), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_tmpdith_bp), (28 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (32 bytes). + Removing drv_rxbr.o(i.drv_rxbr_sw_reset), (164 bytes). + Removing drv_rxbr.o(i.drv_rxbr_swpxl_clr), (32 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (28 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (36 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (28 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_apply_handle), (304 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (52 bytes). + Removing drv_dma.o(i.drv_dma_disable), (20 bytes). + Removing drv_dma.o(i.drv_dma_disable_int), (40 bytes). + Removing drv_dma.o(i.drv_dma_enable), (36 bytes). + Removing drv_dma.o(i.drv_dma_enable_int), (68 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_trans_num), (20 bytes). + Removing drv_dma.o(i.drv_dma_get_status), (20 bytes). + Removing drv_dma.o(i.drv_dma_init), (22 bytes). + Removing drv_dma.o(i.drv_dma_int_list_delete), (88 bytes). + Removing drv_dma.o(i.drv_dma_int_list_inset), (48 bytes). + Removing drv_dma.o(i.drv_dma_register_callback), (4 bytes). + Removing drv_dma.o(i.drv_dma_reset), (36 bytes). + Removing drv_dma.o(i.drv_dma_set_bitwide), (56 bytes). + Removing drv_dma.o(i.drv_dma_set_burst), (20 bytes). + Removing drv_dma.o(i.drv_dma_set_circle_mode), (40 bytes). + Removing drv_dma.o(i.drv_dma_set_dir), (40 bytes). + Removing drv_dma.o(i.drv_dma_set_increment), (72 bytes). + Removing drv_dma.o(i.drv_dma_set_mem_trans_info), (40 bytes). + Removing drv_dma.o(i.drv_dma_set_mem_trans_offset), (24 bytes). + Removing drv_dma.o(i.drv_dma_set_per_address), (20 bytes). + Removing drv_dma.o(i.drv_dma_set_priority), (32 bytes). + Removing drv_dma.o(i.drv_dma_set_tran_int_cnt), (28 bytes). + Removing drv_dma.o(i.drv_dma_update_handle_setting), (148 bytes). + Removing drv_dma.o(i.drv_dma_update_req_by_default), (40 bytes). + Removing drv_dma.o(.constdata), (136 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.drv_uart_deinit), (60 bytes). + Removing drv_uart.o(i.drv_uart_get_def_cfg), (72 bytes). + Removing drv_uart.o(i.drv_uart_recv_blocking), (48 bytes). + Removing drv_uart.o(i.drv_uart_recv_none_blocking), (60 bytes). + Removing drv_uart.o(i.drv_uart_send_none_blocking), (60 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (56 bytes). + Removing drv_efuse.o(i.drv_efuse_write_read_req_clear), (22 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_per_common.o(.rev16_text), (4 bytes). + Removing drv_per_common.o(.revsh_text), (4 bytes). + Removing drv_per_common.o(i.drv_per_get_system_clk), (8 bytes). + Removing drv_per_common.o(i.drv_per_reset_module), (14 bytes). + Removing drv_per_common.o(i.drv_per_set_clock), (14 bytes). + Removing fflti.o(.text), (22 bytes). + +373 unused section(s) (total 17746 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcmp.c 0x00000000 Number 0 memcmp.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/string/strlen.c 0x00000000 Number 0 strlen.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/d2f.c 0x00000000 Number 0 d2f.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_per_common.c 0x00000000 Number 0 drv_per_common.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_pwr.c 0x00000000 Number 0 hal_pwr.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_dcs.c 0x00000000 Number 0 hal_internal_dcs.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_fb.c 0x00000000 Number 0 hal_internal_fb.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_svs.c 0x00000000 Number 0 hal_internal_svs.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\driver\cuckoo\src\drv_se.c 0x00000000 Number 0 drv_se.o ABSOLUTE + ..\..\src\app\Honor 90Pro\Honor90Pro_demo.c 0x00000000 Number 0 honor90pro_demo.o ABSOLUTE + ..\..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_per_common.c 0x00000000 Number 0 drv_per_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_pwr.c 0x00000000 Number 0 hal_pwr.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_dcs.c 0x00000000 Number 0 hal_internal_dcs.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_fb.c 0x00000000 Number 0 hal_internal_fb.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_svs.c 0x00000000 Number 0 hal_internal_svs.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\src\\drv_se.c 0x00000000 Number 0 drv_se.o ABSOLUTE + ..\\..\\src\\app\\Honor 90Pro\\Honor90Pro_demo.c 0x00000000 Number 0 honor90pro_demo.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfcmple.s 0x00000000 Number 0 cfcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 strlen.o(.text) + .text 0x000101f6 Section 0 memcmp.o(.text) + .text 0x00010210 Section 0 fadd.o(.text) + .text 0x000102c2 Section 0 fmul.o(.text) + .text 0x0001033c Section 0 fdiv.o(.text) + .text 0x000103b8 Section 0 fscalb.o(.text) + .text 0x000103d0 Section 0 dadd.o(.text) + .text 0x00010534 Section 0 dmul.o(.text) + .text 0x00010604 Section 0 ffltui.o(.text) + .text 0x00010614 Section 0 dfltui.o(.text) + .text 0x00010630 Section 0 ffixui.o(.text) + .text 0x00010658 Section 0 dfixui.o(.text) + .text 0x00010694 Section 0 f2d.o(.text) + .text 0x000106bc Section 0 d2f.o(.text) + .text 0x000106f4 Section 20 cfcmple.o(.text) + .text 0x00010708 Section 20 cfrcmple.o(.text) + .text 0x0001071c Section 0 uldiv.o(.text) + .text 0x0001077c Section 0 llshl.o(.text) + .text 0x0001079c Section 0 llushr.o(.text) + .text 0x000107be Section 0 llsshr.o(.text) + .text 0x000107e4 Section 0 fepilogue.o(.text) + .text 0x000107e4 Section 0 iusefp.o(.text) + .text 0x00010866 Section 0 depilogue.o(.text) + .text 0x00010924 Section 0 ddiv.o(.text) + .text 0x00010a14 Section 0 dfixul.o(.text) + .text 0x00010a54 Section 40 cdrcmple.o(.text) + .text 0x00010a7c Section 36 init.o(.text) + .text 0x00010aa0 Section 0 __dczerorl2.o(.text) + i.AP_NRESET_IRQn_Handler 0x00010af8 Section 0 drv_gpio.o(i.AP_NRESET_IRQn_Handler) + i.DMA_IRQn_Handler 0x00010b14 Section 0 drv_dma.o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010b70 Section 0 drv_gpio.o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010b7a Section 0 drv_gpio.o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010b84 Section 0 drv_gpio.o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010b8e Section 0 drv_gpio.o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010b98 Section 0 drv_gpio.o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010ba2 Section 0 drv_gpio.o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010bac Section 0 drv_gpio.o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010bb6 Section 0 drv_gpio.o(i.EXTI_INT7_IRQn_Handler) + i.HardFault_Handler 0x00010bc0 Section 0 drv_common.o(i.HardFault_Handler) + i.LCDC_IRQn_Handler 0x00010c08 Section 0 hal_internal_vsync.o(i.LCDC_IRQn_Handler) + i.MEMC_IRQn_Handler 0x00010d08 Section 0 drv_memc.o(i.MEMC_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010da4 Section 0 drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) + i.Note11Pro_demo 0x00010e5c Section 0 honor90pro_demo.o(i.Note11Pro_demo) + i.SWIRE_IRQn_Handler 0x00010ee0 Section 0 drv_swire.o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00010f10 Section 0 drv_common.o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00010f28 Section 0 drv_timer.o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x00010f32 Section 0 drv_timer.o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00010f3c Section 0 drv_timer.o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x00010f46 Section 0 drv_timer.o(i.TIMER3_IRQn_Handler) + i.VIDC_IRQn_Handler 0x00010f50 Section 0 drv_vidc.o(i.VIDC_IRQn_Handler) + i.VPRE1_IRQn_Handler 0x00010f6c Section 0 drv_rxbr.o(i.VPRE1_IRQn_Handler) + i.VPRE_IRQn_Handler 0x00010f88 Section 0 hal_internal_dcs.o(i.VPRE_IRQn_Handler) + i.__scatterload_null 0x00010ff4 Section 2 handlers.o(i.__scatterload_null) + i._sputc 0x00010ff6 Section 0 printfa.o(i._sputc) + _sputc 0x00010ff7 Thumb Code 10 printfa.o(i._sputc) + .ARM.__at_0x11000 0x00011000 Section 28 drv_common.o(.ARM.__at_0x11000) + .ARM.__at_0x1101C 0x0001101c Section 16 tau_log.o(.ARM.__at_0x1101C) + .ARM.__at_0x1102C 0x0001102c Section 22 hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) + i.MIPI_RX_IRQn_Handler 0x00011044 Section 0 drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) + i.UART_IRQn_Handler 0x000113a8 Section 0 drv_uart.o(i.UART_IRQn_Handler) + i.__0printf 0x00011528 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x00011548 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x0001156c Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x0001159a Section 0 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + i.__NVIC_DisableIRQ 0x000115b4 Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x000115b5 Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x000115d4 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x000115d5 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__scatterload_copy 0x000115ec Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_zeroinit 0x000115fa Section 14 handlers.o(i.__scatterload_zeroinit) + i._fp_digits 0x00011608 Section 0 printfa.o(i._fp_digits) + _fp_digits 0x00011609 Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x0001177c Section 0 printfa.o(i._printf_core) + _printf_core 0x0001177d Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011e68 Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011e69 Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011e88 Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011e89 Thumb Code 44 printfa.o(i._printf_pre_padding) + i.ap_dcs_read 0x00011eb4 Section 0 honor90pro_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011eb5 Thumb Code 222 honor90pro_demo.o(i.ap_dcs_read) + i.ap_dcs_set_display_off 0x00011fc0 Section 0 honor90pro_demo.o(i.ap_dcs_set_display_off) + ap_dcs_set_display_off 0x00011fc1 Thumb Code 26 honor90pro_demo.o(i.ap_dcs_set_display_off) + i.ap_dcs_set_display_on 0x00012008 Section 0 honor90pro_demo.o(i.ap_dcs_set_display_on) + ap_dcs_set_display_on 0x00012009 Thumb Code 28 honor90pro_demo.o(i.ap_dcs_set_display_on) + i.ap_dcs_set_enter_sleep_mode 0x0001204c Section 0 honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) + ap_dcs_set_enter_sleep_mode 0x0001204d Thumb Code 90 honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) + i.ap_dcs_set_exit_sleep_mode 0x000120b0 Section 0 honor90pro_demo.o(i.ap_dcs_set_exit_sleep_mode) + ap_dcs_set_exit_sleep_mode 0x000120b1 Thumb Code 20 honor90pro_demo.o(i.ap_dcs_set_exit_sleep_mode) + i.ap_rstn_pull_down_cb 0x000120f0 Section 0 honor90pro_demo.o(i.ap_rstn_pull_down_cb) + ap_rstn_pull_down_cb 0x000120f1 Thumb Code 32 honor90pro_demo.o(i.ap_rstn_pull_down_cb) + i.ap_rstn_pull_high_cb 0x00012148 Section 0 honor90pro_demo.o(i.ap_rstn_pull_high_cb) + ap_rstn_pull_high_cb 0x00012149 Thumb Code 20 honor90pro_demo.o(i.ap_rstn_pull_high_cb) + i.ap_set_backlight 0x00012160 Section 0 honor90pro_demo.o(i.ap_set_backlight) + ap_set_backlight 0x00012161 Thumb Code 50 honor90pro_demo.o(i.ap_set_backlight) + i.ap_update_frame_rate 0x00012194 Section 0 honor90pro_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x00012195 Thumb Code 86 honor90pro_demo.o(i.ap_update_frame_rate) + i.app_display_init 0x0001225c Section 0 honor90pro_demo.o(i.app_display_init) + i.app_gpio_init 0x00012288 Section 0 honor90pro_demo.o(i.app_gpio_init) + i.app_init_panel 0x000122a0 Section 0 honor90pro_demo.o(i.app_init_panel) + app_init_panel 0x000122a1 Thumb Code 146 honor90pro_demo.o(i.app_init_panel) + i.app_mipi_rx_init 0x0001233c Section 0 honor90pro_demo.o(i.app_mipi_rx_init) + app_mipi_rx_init 0x0001233d Thumb Code 198 honor90pro_demo.o(i.app_mipi_rx_init) + i.app_mipi_rx_start_cb 0x00012424 Section 0 honor90pro_demo.o(i.app_mipi_rx_start_cb) + app_mipi_rx_start_cb 0x00012425 Thumb Code 34 honor90pro_demo.o(i.app_mipi_rx_start_cb) + i.app_mipi_tx_init 0x00012474 Section 0 honor90pro_demo.o(i.app_mipi_tx_init) + app_mipi_tx_init 0x00012475 Thumb Code 92 honor90pro_demo.o(i.app_mipi_tx_init) + i.app_mipi_tx_start 0x000124d8 Section 0 honor90pro_demo.o(i.app_mipi_tx_start) + app_mipi_tx_start 0x000124d9 Thumb Code 64 honor90pro_demo.o(i.app_mipi_tx_start) + i.app_system_suspend 0x0001253c Section 0 honor90pro_demo.o(i.app_system_suspend) + app_system_suspend 0x0001253d Thumb Code 134 honor90pro_demo.o(i.app_system_suspend) + i.board_Init 0x00012618 Section 0 board.o(i.board_Init) + i.ceil 0x00012630 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x000126f8 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x000126f9 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x00012724 Section 0 hal_internal_dcs.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x00012725 Thumb Code 84 hal_internal_dcs.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x000127ac Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x00012804 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x0001281c Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00012860 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.delayMs 0x00012884 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x0001289c Section 0 tau_delay.o(i.delayUs) + i.drv_common_system_init 0x000128c8 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_enable_clock 0x000128d0 Section 0 drv_crgu.o(i.drv_crgu_enable_clock) + i.drv_crgu_get_rxbr_clk 0x0001290c Section 0 drv_crgu.o(i.drv_crgu_get_rxbr_clk) + i.drv_crgu_reset_modules 0x00012974 Section 0 drv_crgu.o(i.drv_crgu_reset_modules) + i.drv_crgu_set_ahb_clk 0x00012984 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_clk) + i.drv_crgu_set_clock_div 0x000129ac Section 0 drv_crgu.o(i.drv_crgu_set_clock_div) + i.drv_crgu_set_dpi_clk 0x000129bc Section 0 drv_crgu.o(i.drv_crgu_set_dpi_clk) + i.drv_crgu_set_dsc_clk 0x000129f8 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_clk) + i.drv_crgu_set_fb_clk 0x00012a30 Section 0 drv_crgu.o(i.drv_crgu_set_fb_clk) + i.drv_crgu_set_lcdc_clk 0x00012a58 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_clk) + i.drv_crgu_set_reset 0x00012a80 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_clk 0x00012a98 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_clk) + i.drv_crgu_set_vidc_clk 0x00012ac0 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_clk) + i.drv_dma_clear_status 0x00012ae8 Section 0 drv_dma.o(i.drv_dma_clear_status) + i.drv_dma_get_int_source 0x00012b00 Section 0 drv_dma.o(i.drv_dma_get_int_source) + drv_dma_get_int_source 0x00012b01 Thumb Code 16 drv_dma.o(i.drv_dma_get_int_source) + i.drv_dsc_dec_disable 0x00012b14 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00012b30 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00012b68 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_irqen 0x00012b88 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_irqen) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00012ba4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00012cb0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00012cf0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00012cf1 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00012d40 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00012d41 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00012d5c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_ddi_crc_en 0x00012d6c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en) + i.drv_dsi_rx_get_max_ret_size 0x00012d7c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00012d88 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_check_crc 0x00012da0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) + i.drv_dsi_rx_set_ctrl_cfg 0x00012dbc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00012de0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_ddi_crc_en 0x00012df0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en) + i.drv_dsi_rx_set_inten 0x00012e0c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00012e18 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_ipi_ycbcr_frmt 0x00012e28 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt) + i.drv_dsi_rx_set_lane_swap 0x00012e44 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00012e58 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_tear_resp_en 0x00012e7c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en) + i.drv_dsi_rx_set_up_phy 0x00012e98 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00012f98 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00012fb0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00012fc8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00013020 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x0001302c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x0001304c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00013058 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00013068 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00013078 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x0001309c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x000130a8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x000130b4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x000130c0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x000130dc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x000130fc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x0001310c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x00013174 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x000131b8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00013308 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x00013328 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00013334 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x00013358 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x00013374 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x00013388 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x000133c8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x000133e0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x000133f4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00013418 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x00013424 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00013450 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_efuse_enter_inactive 0x00013538 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x0001356e Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x0001357a Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x000135b4 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_handle_int 0x000135cc Section 0 drv_gpio.o(i.drv_gpio_handle_int) + drv_gpio_handle_int 0x000135cd Thumb Code 30 drv_gpio.o(i.drv_gpio_handle_int) + i.drv_gpio_register_ap_reset_callback 0x000135f0 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x000135fc Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00013610 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x00013654 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode 0x00013674 Section 0 drv_gpio.o(i.drv_gpio_set_mode) + i.drv_gpio_set_output_data 0x00013688 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00013689 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_lcdc_bcsa_config 0x000136a8 Section 0 drv_lcdc.o(i.drv_lcdc_bcsa_config) + i.drv_lcdc_cfg_int_frame 0x000136d0 Section 0 drv_lcdc.o(i.drv_lcdc_cfg_int_frame) + i.drv_lcdc_clear_int 0x000136fc Section 0 drv_lcdc.o(i.drv_lcdc_clear_int) + drv_lcdc_clear_int 0x000136fd Thumb Code 20 drv_lcdc.o(i.drv_lcdc_clear_int) + i.drv_lcdc_cmd_start 0x00013714 Section 0 drv_lcdc.o(i.drv_lcdc_cmd_start) + i.drv_lcdc_config_acc_command_mode 0x00013748 Section 0 drv_lcdc.o(i.drv_lcdc_config_acc_command_mode) + i.drv_lcdc_config_int 0x0001375c Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00013794 Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite_rgb 0x000137bc Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_src_parameter 0x000137d4 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_crop_hact 0x00013824 Section 0 drv_lcdc.o(i.drv_lcdc_crop_hact) + i.drv_lcdc_ctrl_flow 0x00013834 Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_dith_config 0x0001386c Section 0 drv_lcdc.o(i.drv_lcdc_dith_config) + i.drv_lcdc_edge_dect_config 0x0001389c Section 0 drv_lcdc.o(i.drv_lcdc_edge_dect_config) + i.drv_lcdc_edge_enh_config 0x000138d8 Section 0 drv_lcdc.o(i.drv_lcdc_edge_enh_config) + i.drv_lcdc_enable_shadow_reg 0x0001393c Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_endianness_config 0x00013960 Section 0 drv_lcdc.o(i.drv_lcdc_endianness_config) + i.drv_lcdc_fc_config 0x0001397c Section 0 drv_lcdc.o(i.drv_lcdc_fc_config) + i.drv_lcdc_fldc_config 0x0001399c Section 0 drv_lcdc.o(i.drv_lcdc_fldc_config) + i.drv_lcdc_function_disable 0x000139c0 Section 0 drv_lcdc.o(i.drv_lcdc_function_disable) + i.drv_lcdc_function_enable 0x000139e4 Section 0 drv_lcdc.o(i.drv_lcdc_function_enable) + i.drv_lcdc_set_int 0x00013a08 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_prefetch 0x00013a44 Section 0 drv_lcdc.o(i.drv_lcdc_set_prefetch) + i.drv_lcdc_set_tear_line 0x00013a60 Section 0 drv_lcdc.o(i.drv_lcdc_set_tear_line) + i.drv_lcdc_stop_display 0x00013a7c Section 0 drv_lcdc.o(i.drv_lcdc_stop_display) + i.drv_lcdc_vid_hw_start 0x00013a8c Section 0 drv_lcdc.o(i.drv_lcdc_vid_hw_start) + i.drv_lcdc_vintp_mode_config 0x00013ac8 Section 0 drv_lcdc.o(i.drv_lcdc_vintp_mode_config) + i.drv_memc_clear_status 0x00013ae0 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00013af4 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00013b34 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00013b44 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_get_tear_mode 0x00013b5c Section 0 drv_memc.o(i.drv_memc_get_tear_mode) + i.drv_memc_rate_transfer_sel 0x00013b6c Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00013b88 Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00013b9c Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_circ_mode_enable 0x00013bb4 Section 0 drv_memc.o(i.drv_memc_set_circ_mode_enable) + i.drv_memc_set_data_mode 0x00013bd0 Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00013be4 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_frame_drop_select 0x00013bfc Section 0 drv_memc.o(i.drv_memc_set_frame_drop_select) + i.drv_memc_set_fs_en_conditions 0x00013c18 Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_lcdc_st_conditions 0x00013c30 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00013c4c Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_ltpo_pu_thres 0x00013c6c Section 0 drv_memc.o(i.drv_memc_set_ltpo_pu_thres) + i.drv_memc_set_tear_mode 0x00013c84 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00013c98 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00013cc4 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_phy_test_clear 0x00013cd8 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00013ce8 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_pwr_efuse_pd 0x00013d00 Section 0 drv_pwr.o(i.drv_pwr_efuse_pd) + i.drv_pwr_enter_deep_sleep_mode 0x00013d30 Section 0 drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) + i.drv_pwr_enter_sleep_mode_ex 0x00013d7c Section 0 drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex) + i.drv_pwr_enter_stop_sleep_mode 0x00013db0 Section 0 drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) + i.drv_pwr_exit_sleep_mode 0x00013e48 Section 0 drv_pwr.o(i.drv_pwr_exit_sleep_mode) + i.drv_pwr_get_power_ready_st 0x00013e70 Section 0 drv_pwr.o(i.drv_pwr_get_power_ready_st) + i.drv_pwr_ldo18s_en 0x00013e80 Section 0 drv_pwr.o(i.drv_pwr_ldo18s_en) + i.drv_pwr_ldo18s_set 0x00013eb0 Section 0 drv_pwr.o(i.drv_pwr_ldo18s_set) + i.drv_pwr_set_breath_screen_power_sel 0x00013edc Section 0 drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) + i.drv_pwr_set_digit_power_sel 0x00013f04 Section 0 drv_pwr.o(i.drv_pwr_set_digit_power_sel) + i.drv_pwr_set_pll_clk 0x00013f2c Section 0 drv_pwr.o(i.drv_pwr_set_pll_clk) + i.drv_pwr_set_wakeup_type 0x00013f60 Section 0 drv_pwr.o(i.drv_pwr_set_wakeup_type) + i.drv_pwr_write_lock 0x00013f8c Section 0 drv_pwr.o(i.drv_pwr_write_lock) + i.drv_rxbr_clear_pkt_buffer 0x00013fac Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00013fbc Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00013fc8 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x00014024 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_int_source 0x00014040 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00014041 Thumb Code 20 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_status0 0x00014058 Section 0 hal_internal_dcs.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x00014059 Thumb Code 20 hal_internal_dcs.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv1_cfg 0x00014070 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00014084 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq1_callback 0x00014094 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x000140a0 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_response 0x000140b8 Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_response) + i.drv_rxbr_set_color_format 0x000141fc Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_filter_regs 0x00014218 Section 0 drv_rxbr.o(i.drv_rxbr_set_filter_regs) + i.drv_rxbr_set_inten 0x0001423c Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x00014258 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x00014270 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x000142b0 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x000142c0 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_se_init 0x000142d0 Section 0 drv_se.o(i.drv_se_init) + i.drv_se_set_dsc 0x00014348 Section 0 drv_se.o(i.drv_se_set_dsc) + i.drv_se_set_lcdc 0x0001441c Section 0 drv_se.o(i.drv_se_set_lcdc) + i.drv_se_set_memc 0x000144a4 Section 0 drv_se.o(i.drv_se_set_memc) + i.drv_se_set_rxbr 0x0001450c Section 0 drv_se.o(i.drv_se_set_rxbr) + i.drv_se_set_vidc 0x000145dc Section 0 drv_se.o(i.drv_se_set_vidc) + i.drv_se_start_rx 0x00014688 Section 0 drv_se.o(i.drv_se_start_rx) + i.drv_swire_enable 0x0001469c Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_get_pulse_count 0x000146b8 Section 0 drv_swire.o(i.drv_swire_get_pulse_count) + i.drv_swire_register_callback 0x000146c4 Section 0 drv_swire.o(i.drv_swire_register_callback) + i.drv_swire_set_bit_time 0x000146d0 Section 0 drv_swire.o(i.drv_swire_set_bit_time) + i.drv_swire_set_int 0x000146e8 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x00014730 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_swire_set_pulse_count 0x0001474c Section 0 drv_swire.o(i.drv_swire_set_pulse_count) + i.drv_swire_set_trig_mode 0x00014758 Section 0 drv_swire.o(i.drv_swire_set_trig_mode) + i.drv_sys_cfg_clear_all_int 0x00014774 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00014780 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_trig 0x000147a8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x000147cc Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x000147f0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_sel_swire_timer 0x00014814 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer) + i.drv_sys_cfg_set_int 0x0001482c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x00014850 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x00014851 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x0001486a Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x0001488c Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_handle_interrupt 0x0001489c Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x0001489d Thumb Code 54 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_set_compare_val 0x000148d8 Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x00014918 Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x00014960 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x00014988 Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_enter 0x00014998 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x000149b8 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_code 0x000149d8 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_uart_abort_recv 0x00014a00 Section 0 drv_uart.o(i.drv_uart_abort_recv) + i.drv_uart_abort_send 0x00014a34 Section 0 drv_uart.o(i.drv_uart_abort_send) + i.drv_uart_config_int 0x00014a68 Section 0 drv_uart.o(i.drv_uart_config_int) + i.drv_uart_enable_clk 0x00014a7c Section 0 drv_uart.o(i.drv_uart_enable_clk) + drv_uart_enable_clk 0x00014a7d Thumb Code 24 drv_uart.o(i.drv_uart_enable_clk) + i.drv_uart_enable_int 0x00014a94 Section 0 drv_uart.o(i.drv_uart_enable_int) + i.drv_uart_get_instance 0x00014af0 Section 0 drv_uart.o(i.drv_uart_get_instance) + i.drv_uart_init 0x00014b18 Section 0 drv_uart.o(i.drv_uart_init) + i.drv_uart_int_trans_handle 0x00014be8 Section 0 drv_uart.o(i.drv_uart_int_trans_handle) + drv_uart_int_trans_handle 0x00014be9 Thumb Code 54 drv_uart.o(i.drv_uart_int_trans_handle) + i.drv_uart_reset_rx_fifo 0x00014c24 Section 0 drv_uart.o(i.drv_uart_reset_rx_fifo) + i.drv_uart_reset_tx_fifo 0x00014c40 Section 0 drv_uart.o(i.drv_uart_reset_tx_fifo) + i.drv_uart_send_blocking 0x00014c5c Section 0 drv_uart.o(i.drv_uart_send_blocking) + i.drv_uart_set_baud_rate 0x00014c76 Section 0 drv_uart.o(i.drv_uart_set_baud_rate) + i.drv_uart_trans_create_handle 0x00014ccc Section 0 drv_uart.o(i.drv_uart_trans_create_handle) + i.drv_vidc_clear_irq 0x00014d18 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00014d28 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00014d48 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_int_source 0x00014d88 Section 0 drv_vidc.o(i.drv_vidc_get_int_source) + i.drv_vidc_get_irq_status 0x00014db4 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x00014dcc Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x00014df8 Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x00014e04 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_circ_mode_enable 0x00014e10 Section 0 drv_vidc.o(i.drv_vidc_set_circ_mode_enable) + i.drv_vidc_set_dither_config 0x00014e2c Section 0 drv_vidc.o(i.drv_vidc_set_dither_config) + i.drv_vidc_set_dst_parameter 0x00014e64 Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_honly_hcoef0 0x00014ec0 Section 0 drv_vidc.o(i.drv_vidc_set_honly_hcoef0) + i.drv_vidc_set_honly_hinitb 0x00014ecc Section 0 drv_vidc.o(i.drv_vidc_set_honly_hinitb) + i.drv_vidc_set_honly_hinitr 0x00014ef8 Section 0 drv_vidc.o(i.drv_vidc_set_honly_hinitr) + i.drv_vidc_set_irqen 0x00014f28 Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00014f44 Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_pentile_swap 0x00014f58 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x00014f74 Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x00014f80 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x00014f98 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00014fa4 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x00014fb0 Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00014fc4 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00014fd0 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00014fdc Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_vidc_set_vintp_config 0x00014ffc Section 0 drv_vidc.o(i.drv_vidc_set_vintp_config) + i.fputc 0x00015034 Section 0 tau_log.o(i.fputc) + i.ha_intl_fb_check_pu_size 0x00015068 Section 0 hal_internal_fb.o(i.ha_intl_fb_check_pu_size) + ha_intl_fb_check_pu_size 0x00015069 Thumb Code 58 hal_internal_fb.o(i.ha_intl_fb_check_pu_size) + i.hal_dsi_rx_ctrl_create_handle 0x000150a8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_dcs_async_handler 0x000150e8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) + i.hal_dsi_rx_ctrl_deinit 0x00015128 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x000151bc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x000151dc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00015288 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00015289 Thumb Code 222 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00015388 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00015389 Thumb Code 232 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00015490 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00015491 Thumb Code 294 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x000155bc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x000155bd Thumb Code 314 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x00015704 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x00015705 Thumb Code 624 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x00015984 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x000159bc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_auto_ack 0x00015aac Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) + i.hal_dsi_rx_ctrl_set_check_crc 0x00015b5c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00015b74 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00015b75 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_start 0x00015ba4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x00015bd4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x00015c04 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_cmd_mode_cal_timing 0x00015c24 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) + hal_dsi_tx_cmd_mode_cal_timing 0x00015c25 Thumb Code 510 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) + i.hal_dsi_tx_ctrl_create_handle 0x00015ea4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00015edc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_gen_a_tear_signal 0x00015f50 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) + i.hal_dsi_tx_ctrl_init 0x00015f74 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00015ff0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00015ff1 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00016000 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_tear_mode 0x00016008 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) + i.hal_dsi_tx_ctrl_start 0x00016014 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x000160a4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x000160dc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x000161d0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_cfg 0x000162a0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) + hal_dsi_tx_init_cfg 0x000162a1 Thumb Code 250 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) + i.hal_dsi_tx_init_dpi_timing 0x000163a4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) + hal_dsi_tx_init_dpi_timing 0x000163a5 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) + i.hal_dsi_tx_init_phy_cfg 0x000163e8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x000163e9 Thumb Code 22 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_timing 0x000163fe Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) + hal_dsi_tx_init_timing 0x000163ff Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) + i.hal_dsi_tx_init_vid_timing 0x00016450 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) + hal_dsi_tx_init_vid_timing 0x00016451 Thumb Code 70 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) + i.hal_dsi_tx_send_cmd 0x000164a4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x000164a5 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_dsi_tx_timing_info_update 0x000164e4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) + hal_dsi_tx_timing_info_update 0x000164e5 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) + i.hal_dsi_tx_vid_mode_cal_timing 0x00016578 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) + hal_dsi_tx_vid_mode_cal_timing 0x00016579 Thumb Code 766 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) + i.hal_gpio_config_pad 0x00016888 Section 0 hal_gpio.o(i.hal_gpio_config_pad) + i.hal_gpio_ctrl_eint 0x000168c4 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_init_eint 0x000168dc Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x0001691c Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x00016932 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00016950 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x0001696c Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x000169bc Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x00016a1c Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_internal_sync_get_hight_performan_mode 0x00016a24 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change 0x00016a34 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_sync_register_lcdc_cb 0x00016be8 Section 0 hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) + i.hal_internal_vsync_deinit 0x00016bf4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00016c14 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00016c20 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tx_state 0x00016c34 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00016c40 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00016d28 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_rx_state 0x00016df0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_tear_mode 0x00016e10 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00016ffc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_intl_dcs_init_sw_fltr 0x00017054 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) + i.hal_intl_dcs_rx_get_dcs_packet_data 0x000170c0 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) + hal_intl_dcs_rx_get_dcs_packet_data 0x000170c1 Thumb Code 782 hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) + i.hal_intl_dcs_rx_receive_packet 0x000174f0 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) + hal_intl_dcs_rx_receive_packet 0x000174f1 Thumb Code 122 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) + i.hal_intl_dcs_rx_receive_pps 0x00017578 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) + hal_intl_dcs_rx_receive_pps 0x00017579 Thumb Code 266 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) + i.hal_intl_dcs_set_auto_hw_filter 0x000176ec Section 0 hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) + i.hal_intl_dcs_sw_filter_handle 0x00017778 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) + hal_intl_dcs_sw_filter_handle 0x00017779 Thumb Code 36 hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) + i.hal_intl_fb_cal_fb_info 0x000177a4 Section 0 hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) + i.hal_intl_fb_check_bandwidth 0x00017abc Section 0 hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) + hal_intl_fb_check_bandwidth 0x00017abd Thumb Code 92 hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) + i.hal_intl_fb_edge_resize 0x00017b20 Section 0 hal_internal_fb.o(i.hal_intl_fb_edge_resize) + hal_intl_fb_edge_resize 0x00017b21 Thumb Code 214 hal_internal_fb.o(i.hal_intl_fb_edge_resize) + i.hal_intl_fb_flow_control_adapter 0x00017bfc Section 0 hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) + hal_intl_fb_flow_control_adapter 0x00017bfd Thumb Code 110 hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) + i.hal_intl_fb_get_memc_flow_mode 0x00017c70 Section 0 hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) + i.hal_intl_fb_get_rx_fb_info 0x00017c7c Section 0 hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) + i.hal_intl_fb_get_tx_fb_info 0x00017c8c Section 0 hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) + i.hal_intl_fb_get_user_flow 0x00017c9c Section 0 hal_internal_fb.o(i.hal_intl_fb_get_user_flow) + i.hal_intl_svs_deinit_rx 0x00017ca8 Section 0 hal_internal_svs.o(i.hal_intl_svs_deinit_rx) + i.hal_intl_svs_deinit_tx 0x00017cd0 Section 0 hal_internal_svs.o(i.hal_intl_svs_deinit_tx) + i.hal_intl_svs_handle 0x00017ce0 Section 0 hal_internal_svs.o(i.hal_intl_svs_handle) + i.hal_intl_svs_init_rx 0x00017d04 Section 0 hal_internal_svs.o(i.hal_intl_svs_init_rx) + i.hal_intl_svs_init_tx 0x00017d84 Section 0 hal_internal_svs.o(i.hal_intl_svs_init_tx) + i.hal_intl_svs_set_rx_vtt 0x00017d98 Section 0 hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) + i.hal_intl_svs_update_rxbr_clk 0x00017da4 Section 0 hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) + i.hal_lcdc_displayproc_config 0x00017dec Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) + i.hal_lcdc_init_cfg 0x00017e5c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00017e5d Thumb Code 62 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x00017e9a Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x00017e9b Thumb Code 112 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_postproc_config 0x00017f0c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) + i.hal_lcdc_start 0x00018034 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_start) + hal_lcdc_start 0x00018035 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_lcdc_start) + i.hal_lcdc_timinggen_config 0x00018058 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) + hal_lcdc_timinggen_config 0x00018059 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) + i.hal_lcdc_upscaler_config 0x00018094 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) + i.hal_nonshadow_func_update 0x00018174 Section 0 hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) + i.hal_pwr_enter_deep_sleep_mode 0x00018230 Section 0 hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) + i.hal_pwr_enter_normal_sleep_mode 0x0001825a Section 0 hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) + i.hal_pwr_enter_stop_sleep_mode 0x00018264 Section 0 hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) + i.hal_pwr_exit_sleep_mode 0x000182c8 Section 0 hal_pwr.o(i.hal_pwr_exit_sleep_mode) + i.hal_pwr_get_vcc_power_ready 0x000182d2 Section 0 hal_pwr.o(i.hal_pwr_get_vcc_power_ready) + i.hal_pwr_ldo18s_en 0x000182da Section 0 hal_pwr.o(i.hal_pwr_ldo18s_en) + i.hal_pwr_ldo18s_set 0x000182e2 Section 0 hal_pwr.o(i.hal_pwr_ldo18s_set) + i.hal_pwr_set_main_power 0x000182ea Section 0 hal_pwr.o(i.hal_pwr_set_main_power) + i.hal_pwr_set_sleep_mode_power 0x000182f2 Section 0 hal_pwr.o(i.hal_pwr_set_sleep_mode_power) + i.hal_pwr_set_stop_sleep_wakeup_pin 0x000182fc Section 0 hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) + i.hal_swire_deinit 0x00018360 Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_enable 0x000183a0 Section 0 hal_swire.o(i.hal_swire_enable) + i.hal_swire_init 0x000183fc Section 0 hal_swire.o(i.hal_swire_init) + i.hal_swire_set_pulse 0x00018454 Section 0 hal_swire.o(i.hal_swire_set_pulse) + i.hal_swire_set_timer 0x00018478 Section 0 hal_swire.o(i.hal_swire_set_timer) + i.hal_system_init 0x000184b8 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_updata_sysclk 0x0001859c Section 0 hal_system.o(i.hal_system_updata_sysclk) + i.hal_timer_deinit 0x000185ec Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x0001861c Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_set_repeat 0x00018638 Section 0 hal_timer.o(i.hal_timer_set_repeat) + i.hal_tx_frame_rate_adjust 0x00018640 Section 0 hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) + hal_tx_frame_rate_adjust 0x00018641 Thumb Code 44 hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) + i.hal_uart_init 0x00018670 Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_send_blocking 0x00018704 Section 0 hal_uart.o(i.hal_uart_send_blocking) + i.hal_vsync_func_update 0x00018720 Section 0 hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) + i.hal_vsync_reset_lcdc_scaler 0x00018738 Section 0 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + i.main 0x00018818 Section 0 main.o(i.main) + i.pps_update_handle 0x00018850 Section 0 honor90pro_demo.o(i.pps_update_handle) + pps_update_handle 0x00018851 Thumb Code 80 honor90pro_demo.o(i.pps_update_handle) + i.rxbr_irq1_callback 0x000188e8 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x000188e9 Thumb Code 496 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_double_buffer_update 0x00018bdc Section 0 hal_internal_vsync.o(i.soft_double_buffer_update) + soft_double_buffer_update 0x00018bdd Thumb Code 56 hal_internal_vsync.o(i.soft_double_buffer_update) + i.soft_gen_te 0x00018c20 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x00018c21 Thumb Code 86 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x00018c8c Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x00018c8d Thumb Code 202 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_pro_motion_init 0x00018d6c Section 0 hal_internal_vsync.o(i.soft_pro_motion_init) + soft_pro_motion_init 0x00018d6d Thumb Code 46 hal_internal_vsync.o(i.soft_pro_motion_init) + i.soft_tear_adjust_line 0x00018da4 Section 0 hal_internal_vsync.o(i.soft_tear_adjust_line) + soft_tear_adjust_line 0x00018da5 Thumb Code 26 hal_internal_vsync.o(i.soft_tear_adjust_line) + i.stop_sleep_cb 0x00018dc8 Section 0 hal_pwr.o(i.stop_sleep_cb) + stop_sleep_cb 0x00018dc9 Thumb Code 18 hal_pwr.o(i.stop_sleep_cb) + i.svs_direct_mode_setting 0x00018de0 Section 0 hal_internal_svs.o(i.svs_direct_mode_setting) + svs_direct_mode_setting 0x00018de1 Thumb Code 154 hal_internal_svs.o(i.svs_direct_mode_setting) + i.svs_get_rel_intv 0x00018e8c Section 0 hal_internal_svs.o(i.svs_get_rel_intv) + svs_get_rel_intv 0x00018e8d Thumb Code 20 hal_internal_svs.o(i.svs_get_rel_intv) + i.svs_sync_handle 0x00018ea8 Section 0 hal_internal_svs.o(i.svs_sync_handle) + svs_sync_handle 0x00018ea9 Thumb Code 158 hal_internal_svs.o(i.svs_sync_handle) + i.svs_wait_fr_stab 0x00018f58 Section 0 hal_internal_svs.o(i.svs_wait_fr_stab) + svs_wait_fr_stab 0x00018f59 Thumb Code 148 hal_internal_svs.o(i.svs_wait_fr_stab) + i.svs_wait_start 0x00019024 Section 0 hal_internal_svs.o(i.svs_wait_start) + svs_wait_start 0x00019025 Thumb Code 250 hal_internal_svs.o(i.svs_wait_start) + i.tau_log_init 0x00019130 Section 0 tau_log.o(i.tau_log_init) + i.tau_log_printf 0x00019164 Section 0 tau_log.o(i.tau_log_printf) + i.tau_log_push_log 0x000191e8 Section 0 tau_log.o(i.tau_log_push_log) + i.vidc_callback 0x00019260 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x00019261 Thumb Code 150 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x00019314 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x00019315 Thumb Code 254 hal_internal_vsync.o(i.vpre_err_reset) + .constdata 0x0001942c Section 18876 honor90pro_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001942c Data 84 honor90pro_demo.o(.constdata) + .constdata 0x0001dde8 Section 40 hal_dsi_rx_ctrl.o(.constdata) + .constdata 0x0001de10 Section 28 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001de2c Section 182 hal_gpio.o(.constdata) + s_gpio_map 0x0001de2c Data 104 hal_gpio.o(.constdata) + s_gpio_perf 0x0001de94 Data 78 hal_gpio.o(.constdata) + .constdata 0x0001dee4 Section 48 hal_uart.o(.constdata) + .constdata 0x0001df14 Section 16 drv_uart.o(.constdata) + .conststring 0x0001df24 Section 135 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001dfac Section 144 hal_internal_vsync.o(.conststring) + .conststring 0x0001e03c Section 70 hal_internal_dcs.o(.conststring) + .data 0x00070000 Section 16 honor90pro_demo.o(.data) + panel_display_done 0x00070000 Data 1 honor90pro_demo.o(.data) + sg_system_resume 0x00070001 Data 1 honor90pro_demo.o(.data) + sg_system_suspend 0x00070002 Data 1 honor90pro_demo.o(.data) + AOD_ON 0x00070003 Data 1 honor90pro_demo.o(.data) + display_on_flag 0x00070004 Data 1 honor90pro_demo.o(.data) + g_rx_ctrl_handle 0x00070008 Data 4 honor90pro_demo.o(.data) + g_tx_ctrl_handle 0x0007000c Data 4 honor90pro_demo.o(.data) + .data 0x00070010 Section 48 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00070010 Data 1 hal_dsi_rx_ctrl.o(.data) + g_crc_check_enable 0x00070011 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00070014 Data 4 hal_dsi_rx_ctrl.o(.data) + g_before_draw_col 0x00070018 Data 4 hal_dsi_rx_ctrl.o(.data) + g_before_draw_page 0x0007001c Data 4 hal_dsi_rx_ctrl.o(.data) + pre_step 0x00070020 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_cmd_filter 0x00070024 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_x 0x00070028 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_y 0x0007002c Data 4 hal_dsi_rx_ctrl.o(.data) + pre_value 0x00070030 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_x 0x00070034 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_y 0x00070038 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_value 0x0007003c Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00070040 Section 92 hal_dsi_tx_ctrl.o(.data) + sg_bta_vsync_flag 0x00070040 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_vsync_flag 0x00070041 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_enter_sleep_cmd 0x00070042 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_fldc_cg_mode 0x00070043 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_scl_fir 0x00070044 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_honly_bypass_fir 0x00070045 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_bcs 0x00070046 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_enhc 0x00070047 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_edge_dect 0x00070048 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_edge_enh 0x00070049 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_dith 0x0007004a Data 1 hal_dsi_tx_ctrl.o(.data) + sg_dith_judge 0x0007004b Data 1 hal_dsi_tx_ctrl.o(.data) + sg_endianness 0x0007004c Data 1 hal_dsi_tx_ctrl.o(.data) + sg_test_pattern_en 0x0007004d Data 1 hal_dsi_tx_ctrl.o(.data) + sg_dith_judge_thr 0x00070050 Data 4 hal_dsi_tx_ctrl.o(.data) + sg_ccm_para 0x00070054 Data 36 hal_dsi_tx_ctrl.o(.data) + sg_honly_para 0x00070078 Data 36 hal_dsi_tx_ctrl.o(.data) + .data 0x0007009c Section 2 hal_swire.o(.data) + sg_swire_timer 0x0007009c Data 1 hal_swire.o(.data) + sg_swire_repeat 0x0007009d Data 1 hal_swire.o(.data) + .data 0x000700a0 Section 8 hal_pwr.o(.data) + sg_wake_up_io 0x000700a0 Data 1 hal_pwr.o(.data) + sg_stop_sleep_wakeup_int 0x000700a4 Data 4 hal_pwr.o(.data) + .data 0x000700a8 Section 1 tau_log.o(.data) + g_log_port 0x000700a8 Data 1 tau_log.o(.data) + .data 0x000700ac Section 24 hal_uart.o(.data) + sg_dma_callback 0x000700bc Data 4 hal_uart.o(.data) + sg_user_data 0x000700c0 Data 4 hal_uart.o(.data) + .data 0x000700c4 Section 16 hal_internal_vsync.o(.data) + s_te_refine_mode 0x000700c4 Data 1 hal_internal_vsync.o(.data) + .data 0x000700d4 Section 36 hal_internal_dcs.o(.data) + g_imm_packet 0x000700d4 Data 24 hal_internal_dcs.o(.data) + g_cus_rx_write_cmd_handle 0x000700ec Data 12 hal_internal_dcs.o(.data) + .data 0x000700f8 Section 12 drv_common.o(.data) + s_my_tick 0x000700f8 Data 4 drv_common.o(.data) + .data 0x00070104 Section 1 drv_common.o(.data) + .data 0x00070108 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x00070108 Data 4 drv_gpio.o(.data) + .data 0x0007010c Section 4 drv_swire.o(.data) + sg_drv_swire_cb 0x0007010c Data 4 drv_swire.o(.data) + .data 0x00070110 Section 80 drv_timer.o(.data) + sg_timer_info 0x00070110 Data 80 drv_timer.o(.data) + .data 0x00070160 Section 4 drv_se.o(.data) + chip_info 0x00070160 Data 4 drv_se.o(.data) + .data 0x00070164 Section 1 drv_dsi_rx.o(.data) + sg_rx_drv_level 0x00070164 Data 1 drv_dsi_rx.o(.data) + .data 0x00070168 Section 8 drv_rxbr.o(.data) + .data 0x00070170 Section 4 drv_vidc.o(.data) + .data 0x00070174 Section 400 drv_dma.o(.data) + sg_dma_handle 0x00070174 Data 256 drv_dma.o(.data) + .data 0x00070304 Section 4 stdout.o(.data) + .bss 0x00070308 Section 208 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x00070308 Data 208 hal_dsi_rx_ctrl.o(.bss) + .bss 0x000703d8 Section 184 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x000703d8 Data 92 hal_dsi_tx_ctrl.o(.bss) + sg_dsi_tx_param 0x00070434 Data 92 hal_dsi_tx_ctrl.o(.bss) + .bss 0x00070490 Section 256 tau_log.o(.bss) + g_log_buf 0x00070490 Data 256 tau_log.o(.bss) + .bss 0x00070590 Section 68 hal_internal_vsync.o(.bss) + .bss 0x000705d4 Section 2048 hal_internal_dcs.o(.bss) + .bss 0x00070dd4 Section 255 hal_internal_dcs.o(.bss) + g_imm_buffer 0x00070dd4 Data 255 hal_internal_dcs.o(.bss) + .bss 0x00070ed4 Section 68 hal_internal_fb.o(.bss) + .bss 0x00070f18 Section 68 hal_internal_svs.o(.bss) + sg_sys_handler 0x00070f18 Data 68 hal_internal_svs.o(.bss) + .bss 0x00070f5c Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00070f5c Data 64 drv_gpio.o(.bss) + .bss 0x00070f9c Section 4204 dcs_packet_fifo.o(.bss) + .bss 0x00072008 Section 16 drv_dma.o(.bss) + sg_dma_int_list 0x00072008 Data 16 drv_dma.o(.bss) + .bss 0x00072018 Section 96 drv_uart.o(.bss) + sg_uart_userdata 0x00072018 Data 96 drv_uart.o(.bss) + STACK 0x00072078 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + FLSCTRL_IRQn_Handler 0x00010107 Thumb Code 2 startup_armcm0.o(.text) + WDG_IRQn_Handler 0x00010113 Thumb Code 2 startup_armcm0.o(.text) + I2C0_IRQn_Handler 0x00010117 Thumb Code 2 startup_armcm0.o(.text) + I2C1_IRQn_Handler 0x00010119 Thumb Code 2 startup_armcm0.o(.text) + SPIS_IRQn_Handler 0x0001011b Thumb Code 2 startup_armcm0.o(.text) + SPIM_IRQn_Handler 0x0001011d Thumb Code 2 startup_armcm0.o(.text) + I2C2_IRQn_Handler 0x00010121 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + strlen 0x000101e9 Thumb Code 14 strlen.o(.text) + memcmp 0x000101f7 Thumb Code 26 memcmp.o(.text) + __aeabi_fadd 0x00010211 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x000102b3 Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x000102bb Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x000102c3 Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x0001033d Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x000103b9 Thumb Code 24 fscalb.o(.text) + scalbnf 0x000103b9 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103d1 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x00010519 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x00010525 Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x00010535 Thumb Code 202 dmul.o(.text) + __aeabi_ui2f 0x00010605 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x00010615 Thumb Code 24 dfltui.o(.text) + __aeabi_f2uiz 0x00010631 Thumb Code 40 ffixui.o(.text) + __aeabi_d2uiz 0x00010659 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x00010695 Thumb Code 40 f2d.o(.text) + __aeabi_d2f 0x000106bd Thumb Code 56 d2f.o(.text) + __aeabi_cfcmpeq 0x000106f5 Thumb Code 0 cfcmple.o(.text) + __aeabi_cfcmple 0x000106f5 Thumb Code 20 cfcmple.o(.text) + __aeabi_cfrcmple 0x00010709 Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x0001071d Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x0001077d Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x0001077d Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x0001079d Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x0001079d Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000107bf Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000107bf Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x000107e5 Thumb Code 0 iusefp.o(.text) + _float_round 0x000107e5 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x000107f5 Thumb Code 114 fepilogue.o(.text) + _double_round 0x00010867 Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x00010881 Thumb Code 164 depilogue.o(.text) + __aeabi_ddiv 0x00010925 Thumb Code 234 ddiv.o(.text) + __aeabi_d2ulz 0x00010a15 Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010a55 Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010a7d Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010a7d Thumb Code 0 init.o(.text) + __decompress 0x00010aa1 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010aa1 Thumb Code 86 __dczerorl2.o(.text) + AP_NRESET_IRQn_Handler 0x00010af9 Thumb Code 22 drv_gpio.o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010b15 Thumb Code 78 drv_dma.o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010b71 Thumb Code 10 drv_gpio.o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010b7b Thumb Code 10 drv_gpio.o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010b85 Thumb Code 10 drv_gpio.o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010b8f Thumb Code 10 drv_gpio.o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010b99 Thumb Code 10 drv_gpio.o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010ba3 Thumb Code 10 drv_gpio.o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010bad Thumb Code 10 drv_gpio.o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010bb7 Thumb Code 10 drv_gpio.o(i.EXTI_INT7_IRQn_Handler) + HardFault_Handler 0x00010bc1 Thumb Code 14 drv_common.o(i.HardFault_Handler) + LCDC_IRQn_Handler 0x00010c09 Thumb Code 118 hal_internal_vsync.o(i.LCDC_IRQn_Handler) + MEMC_IRQn_Handler 0x00010d09 Thumb Code 154 drv_memc.o(i.MEMC_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010da5 Thumb Code 70 drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) + Note11Pro_demo 0x00010e5d Thumb Code 82 honor90pro_demo.o(i.Note11Pro_demo) + SWIRE_IRQn_Handler 0x00010ee1 Thumb Code 38 drv_swire.o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00010f11 Thumb Code 20 drv_common.o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00010f29 Thumb Code 10 drv_timer.o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x00010f33 Thumb Code 10 drv_timer.o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00010f3d Thumb Code 10 drv_timer.o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x00010f47 Thumb Code 10 drv_timer.o(i.TIMER3_IRQn_Handler) + VIDC_IRQn_Handler 0x00010f51 Thumb Code 22 drv_vidc.o(i.VIDC_IRQn_Handler) + VPRE1_IRQn_Handler 0x00010f6d Thumb Code 22 drv_rxbr.o(i.VPRE1_IRQn_Handler) + VPRE_IRQn_Handler 0x00010f89 Thumb Code 104 hal_internal_dcs.o(i.VPRE_IRQn_Handler) + __scatterload_null 0x00010ff5 Thumb Code 2 handlers.o(i.__scatterload_null) + s_RAM_CK 0x00011000 Data 28 drv_common.o(.ARM.__at_0x11000) + g_tau_log 0x0001101c Data 16 tau_log.o(.ARM.__at_0x1101C) + sg_pq_para 0x0001102c Data 22 hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) + MIPI_RX_IRQn_Handler 0x00011045 Thumb Code 354 drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) + UART_IRQn_Handler 0x000113a9 Thumb Code 364 drv_uart.o(i.UART_IRQn_Handler) + __0printf 0x00011529 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x00011549 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x0001156d Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x0001159b Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_copy 0x000115ed Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x000115fb Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + app_display_init 0x0001225d Thumb Code 42 honor90pro_demo.o(i.app_display_init) + app_gpio_init 0x00012289 Thumb Code 20 honor90pro_demo.o(i.app_gpio_init) + board_Init 0x00012619 Thumb Code 20 board.o(i.board_Init) + ceil 0x00012631 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x000127ad Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x00012805 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x0001281d Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00012861 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x00012885 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x0001289d Thumb Code 40 tau_delay.o(i.delayUs) + drv_common_system_init 0x000128c9 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_enable_clock 0x000128d1 Thumb Code 54 drv_crgu.o(i.drv_crgu_enable_clock) + drv_crgu_get_rxbr_clk 0x0001290d Thumb Code 70 drv_crgu.o(i.drv_crgu_get_rxbr_clk) + drv_crgu_reset_modules 0x00012975 Thumb Code 10 drv_crgu.o(i.drv_crgu_reset_modules) + drv_crgu_set_ahb_clk 0x00012985 Thumb Code 34 drv_crgu.o(i.drv_crgu_set_ahb_clk) + drv_crgu_set_clock_div 0x000129ad Thumb Code 12 drv_crgu.o(i.drv_crgu_set_clock_div) + drv_crgu_set_dpi_clk 0x000129bd Thumb Code 54 drv_crgu.o(i.drv_crgu_set_dpi_clk) + drv_crgu_set_dsc_clk 0x000129f9 Thumb Code 52 drv_crgu.o(i.drv_crgu_set_dsc_clk) + drv_crgu_set_fb_clk 0x00012a31 Thumb Code 34 drv_crgu.o(i.drv_crgu_set_fb_clk) + drv_crgu_set_lcdc_clk 0x00012a59 Thumb Code 36 drv_crgu.o(i.drv_crgu_set_lcdc_clk) + drv_crgu_set_reset 0x00012a81 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_clk 0x00012a99 Thumb Code 34 drv_crgu.o(i.drv_crgu_set_rxbr_clk) + drv_crgu_set_vidc_clk 0x00012ac1 Thumb Code 36 drv_crgu.o(i.drv_crgu_set_vidc_clk) + drv_dma_clear_status 0x00012ae9 Thumb Code 20 drv_dma.o(i.drv_dma_clear_status) + drv_dsc_dec_disable 0x00012b15 Thumb Code 20 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00012b31 Thumb Code 44 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00012b69 Thumb Code 22 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_irqen 0x00012b89 Thumb Code 24 drv_dsc_dec.o(i.drv_dsc_dec_set_irqen) + drv_dsi_rx_calc_ipi_tx_delay 0x00012ba5 Thumb Code 252 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00012cb1 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00012d5d Thumb Code 10 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_ddi_crc_en 0x00012d6d Thumb Code 10 drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en) + drv_dsi_rx_get_max_ret_size 0x00012d7d Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00012d89 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_check_crc 0x00012da1 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) + drv_dsi_rx_set_ctrl_cfg 0x00012dbd Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00012de1 Thumb Code 10 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_ddi_crc_en 0x00012df1 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en) + drv_dsi_rx_set_inten 0x00012e0d Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00012e19 Thumb Code 12 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_ipi_ycbcr_frmt 0x00012e29 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt) + drv_dsi_rx_set_lane_swap 0x00012e45 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00012e59 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_tear_resp_en 0x00012e7d Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en) + drv_dsi_rx_set_up_phy 0x00012e99 Thumb Code 224 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00012f99 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00012fb1 Thumb Code 18 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00012fc9 Thumb Code 82 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00013021 Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x0001302d Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x0001304d Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00013059 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00013069 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00013079 Thumb Code 32 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x0001309d Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x000130a9 Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x000130b5 Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x000130c1 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x000130dd Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x000130fd Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x0001310d Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x00013175 Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x000131b9 Thumb Code 314 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00013309 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x00013329 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00013335 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x00013359 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x00013375 Thumb Code 14 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x00013389 Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x000133c9 Thumb Code 18 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x000133e1 Thumb Code 14 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x000133f5 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00013419 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x00013425 Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00013451 Thumb Code 226 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_efuse_enter_inactive 0x00013539 Thumb Code 54 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x0001356f Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x0001357b Thumb Code 58 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x000135b5 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_register_ap_reset_callback 0x000135f1 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x000135fd Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00013611 Thumb Code 62 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x00013655 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode 0x00013675 Thumb Code 16 drv_gpio.o(i.drv_gpio_set_mode) + drv_lcdc_bcsa_config 0x000136a9 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_bcsa_config) + drv_lcdc_cfg_int_frame 0x000136d1 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_cfg_int_frame) + drv_lcdc_cmd_start 0x00013715 Thumb Code 46 drv_lcdc.o(i.drv_lcdc_cmd_start) + drv_lcdc_config_acc_command_mode 0x00013749 Thumb Code 14 drv_lcdc.o(i.drv_lcdc_config_acc_command_mode) + drv_lcdc_config_int 0x0001375d Thumb Code 50 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00013795 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite_rgb 0x000137bd Thumb Code 18 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_src_parameter 0x000137d5 Thumb Code 72 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_crop_hact 0x00013825 Thumb Code 10 drv_lcdc.o(i.drv_lcdc_crop_hact) + drv_lcdc_ctrl_flow 0x00013835 Thumb Code 50 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_dith_config 0x0001386d Thumb Code 40 drv_lcdc.o(i.drv_lcdc_dith_config) + drv_lcdc_edge_dect_config 0x0001389d Thumb Code 50 drv_lcdc.o(i.drv_lcdc_edge_dect_config) + drv_lcdc_edge_enh_config 0x000138d9 Thumb Code 86 drv_lcdc.o(i.drv_lcdc_edge_enh_config) + drv_lcdc_enable_shadow_reg 0x0001393d Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_endianness_config 0x00013961 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_endianness_config) + drv_lcdc_fc_config 0x0001397d Thumb Code 24 drv_lcdc.o(i.drv_lcdc_fc_config) + drv_lcdc_fldc_config 0x0001399d Thumb Code 32 drv_lcdc.o(i.drv_lcdc_fldc_config) + drv_lcdc_function_disable 0x000139c1 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_function_disable) + drv_lcdc_function_enable 0x000139e5 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_function_enable) + drv_lcdc_set_int 0x00013a09 Thumb Code 54 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_prefetch 0x00013a45 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_prefetch) + drv_lcdc_set_tear_line 0x00013a61 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_tear_line) + drv_lcdc_stop_display 0x00013a7d Thumb Code 12 drv_lcdc.o(i.drv_lcdc_stop_display) + drv_lcdc_vid_hw_start 0x00013a8d Thumb Code 56 drv_lcdc.o(i.drv_lcdc_vid_hw_start) + drv_lcdc_vintp_mode_config 0x00013ac9 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_vintp_mode_config) + drv_memc_clear_status 0x00013ae1 Thumb Code 14 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00013af5 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00013b35 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00013b45 Thumb Code 20 drv_memc.o(i.drv_memc_get_status) + drv_memc_get_tear_mode 0x00013b5d Thumb Code 10 drv_memc.o(i.drv_memc_get_tear_mode) + drv_memc_rate_transfer_sel 0x00013b6d Thumb Code 22 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00013b89 Thumb Code 16 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00013b9d Thumb Code 16 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_circ_mode_enable 0x00013bb5 Thumb Code 24 drv_memc.o(i.drv_memc_set_circ_mode_enable) + drv_memc_set_data_mode 0x00013bd1 Thumb Code 14 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00013be5 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_frame_drop_select 0x00013bfd Thumb Code 24 drv_memc.o(i.drv_memc_set_frame_drop_select) + drv_memc_set_fs_en_conditions 0x00013c19 Thumb Code 18 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_lcdc_st_conditions 0x00013c31 Thumb Code 20 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00013c4d Thumb Code 28 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_ltpo_pu_thres 0x00013c6d Thumb Code 18 drv_memc.o(i.drv_memc_set_ltpo_pu_thres) + drv_memc_set_tear_mode 0x00013c85 Thumb Code 16 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00013c99 Thumb Code 36 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00013cc5 Thumb Code 16 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_phy_test_clear 0x00013cd9 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00013ce9 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_pwr_efuse_pd 0x00013d01 Thumb Code 36 drv_pwr.o(i.drv_pwr_efuse_pd) + drv_pwr_enter_deep_sleep_mode 0x00013d31 Thumb Code 60 drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) + drv_pwr_enter_sleep_mode_ex 0x00013d7d Thumb Code 34 drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex) + drv_pwr_enter_stop_sleep_mode 0x00013db1 Thumb Code 132 drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) + drv_pwr_exit_sleep_mode 0x00013e49 Thumb Code 32 drv_pwr.o(i.drv_pwr_exit_sleep_mode) + drv_pwr_get_power_ready_st 0x00013e71 Thumb Code 10 drv_pwr.o(i.drv_pwr_get_power_ready_st) + drv_pwr_ldo18s_en 0x00013e81 Thumb Code 36 drv_pwr.o(i.drv_pwr_ldo18s_en) + drv_pwr_ldo18s_set 0x00013eb1 Thumb Code 32 drv_pwr.o(i.drv_pwr_ldo18s_set) + drv_pwr_set_breath_screen_power_sel 0x00013edd Thumb Code 34 drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) + drv_pwr_set_digit_power_sel 0x00013f05 Thumb Code 34 drv_pwr.o(i.drv_pwr_set_digit_power_sel) + drv_pwr_set_pll_clk 0x00013f2d Thumb Code 30 drv_pwr.o(i.drv_pwr_set_pll_clk) + drv_pwr_set_wakeup_type 0x00013f61 Thumb Code 40 drv_pwr.o(i.drv_pwr_set_wakeup_type) + drv_pwr_write_lock 0x00013f8d Thumb Code 18 drv_pwr.o(i.drv_pwr_write_lock) + drv_rxbr_clear_pkt_buffer 0x00013fad Thumb Code 12 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00013fbd Thumb Code 6 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00013fc9 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x00014025 Thumb Code 18 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_hline_rcv1_cfg 0x00014071 Thumb Code 14 drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) + drv_rxbr_hline_rcv_cfg 0x00014085 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq1_callback 0x00014095 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x000140a1 Thumb Code 18 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_response 0x000140b9 Thumb Code 320 drv_rxbr.o(i.drv_rxbr_set_cmd_response) + drv_rxbr_set_color_format 0x000141fd Thumb Code 24 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_filter_regs 0x00014219 Thumb Code 32 drv_rxbr.o(i.drv_rxbr_set_filter_regs) + drv_rxbr_set_inten 0x0001423d Thumb Code 22 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x00014259 Thumb Code 18 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x00014271 Thumb Code 56 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x000142b1 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x000142c1 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_se_init 0x000142d1 Thumb Code 106 drv_se.o(i.drv_se_init) + drv_se_set_dsc 0x00014349 Thumb Code 162 drv_se.o(i.drv_se_set_dsc) + drv_se_set_lcdc 0x0001441d Thumb Code 88 drv_se.o(i.drv_se_set_lcdc) + drv_se_set_memc 0x000144a5 Thumb Code 54 drv_se.o(i.drv_se_set_memc) + drv_se_set_rxbr 0x0001450d Thumb Code 158 drv_se.o(i.drv_se_set_rxbr) + drv_se_set_vidc 0x000145dd Thumb Code 122 drv_se.o(i.drv_se_set_vidc) + drv_se_start_rx 0x00014689 Thumb Code 16 drv_se.o(i.drv_se_start_rx) + drv_swire_enable 0x0001469d Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_get_pulse_count 0x000146b9 Thumb Code 6 drv_swire.o(i.drv_swire_get_pulse_count) + drv_swire_register_callback 0x000146c5 Thumb Code 6 drv_swire.o(i.drv_swire_register_callback) + drv_swire_set_bit_time 0x000146d1 Thumb Code 18 drv_swire.o(i.drv_swire_set_bit_time) + drv_swire_set_int 0x000146e9 Thumb Code 64 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x00014731 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_swire_set_pulse_count 0x0001474d Thumb Code 6 drv_swire.o(i.drv_swire_set_pulse_count) + drv_swire_set_trig_mode 0x00014759 Thumb Code 24 drv_swire.o(i.drv_swire_set_trig_mode) + drv_sys_cfg_clear_all_int 0x00014775 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00014781 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_trig 0x000147a9 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x000147cd Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x000147f1 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_sel_swire_timer 0x00014815 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer) + drv_sys_cfg_set_int 0x0001482d Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x0001486b Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x0001488d Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_set_compare_val 0x000148d9 Thumb Code 50 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x00014919 Thumb Code 68 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x00014961 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x00014989 Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x00014999 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x000149b9 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_tx_phy_test_write_code 0x000149d9 Thumb Code 34 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_uart_abort_recv 0x00014a01 Thumb Code 46 drv_uart.o(i.drv_uart_abort_recv) + drv_uart_abort_send 0x00014a35 Thumb Code 46 drv_uart.o(i.drv_uart_abort_send) + drv_uart_config_int 0x00014a69 Thumb Code 20 drv_uart.o(i.drv_uart_config_int) + drv_uart_enable_int 0x00014a95 Thumb Code 84 drv_uart.o(i.drv_uart_enable_int) + drv_uart_get_instance 0x00014af1 Thumb Code 36 drv_uart.o(i.drv_uart_get_instance) + drv_uart_init 0x00014b19 Thumb Code 206 drv_uart.o(i.drv_uart_init) + drv_uart_reset_rx_fifo 0x00014c25 Thumb Code 28 drv_uart.o(i.drv_uart_reset_rx_fifo) + drv_uart_reset_tx_fifo 0x00014c41 Thumb Code 28 drv_uart.o(i.drv_uart_reset_tx_fifo) + drv_uart_send_blocking 0x00014c5d Thumb Code 26 drv_uart.o(i.drv_uart_send_blocking) + drv_uart_set_baud_rate 0x00014c77 Thumb Code 84 drv_uart.o(i.drv_uart_set_baud_rate) + drv_uart_trans_create_handle 0x00014ccd Thumb Code 72 drv_uart.o(i.drv_uart_trans_create_handle) + drv_vidc_clear_irq 0x00014d19 Thumb Code 10 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00014d29 Thumb Code 26 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00014d49 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_int_source 0x00014d89 Thumb Code 40 drv_vidc.o(i.drv_vidc_get_int_source) + drv_vidc_get_irq_status 0x00014db5 Thumb Code 20 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x00014dcd Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x00014df9 Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x00014e05 Thumb Code 8 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_circ_mode_enable 0x00014e11 Thumb Code 24 drv_vidc.o(i.drv_vidc_set_circ_mode_enable) + drv_vidc_set_dither_config 0x00014e2d Thumb Code 50 drv_vidc.o(i.drv_vidc_set_dither_config) + drv_vidc_set_dst_parameter 0x00014e65 Thumb Code 86 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_honly_hcoef0 0x00014ec1 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_honly_hcoef0) + drv_vidc_set_honly_hinitb 0x00014ecd Thumb Code 38 drv_vidc.o(i.drv_vidc_set_honly_hinitb) + drv_vidc_set_honly_hinitr 0x00014ef9 Thumb Code 42 drv_vidc.o(i.drv_vidc_set_honly_hinitr) + drv_vidc_set_irqen 0x00014f29 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00014f45 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_pentile_swap 0x00014f59 Thumb Code 20 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x00014f75 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x00014f81 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x00014f99 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00014fa5 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x00014fb1 Thumb Code 14 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00014fc5 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00014fd1 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00014fdd Thumb Code 28 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_vidc_set_vintp_config 0x00014ffd Thumb Code 52 drv_vidc.o(i.drv_vidc_set_vintp_config) + fputc 0x00015035 Thumb Code 42 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x000150a9 Thumb Code 60 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_dcs_async_handler 0x000150e9 Thumb Code 60 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) + hal_dsi_rx_ctrl_deinit 0x00015129 Thumb Code 132 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_get_max_ret_size 0x000151bd Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x000151dd Thumb Code 158 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x00015985 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_send_ack_cmd 0x000159bd Thumb Code 210 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_auto_ack 0x00015aad Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) + hal_dsi_rx_ctrl_set_check_crc 0x00015b5d Thumb Code 20 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) + hal_dsi_rx_ctrl_start 0x00015ba5 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x00015bd5 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x00015c05 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x00015ea5 Thumb Code 48 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00015edd Thumb Code 102 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_gen_a_tear_signal 0x00015f51 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) + hal_dsi_tx_ctrl_init 0x00015f75 Thumb Code 110 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00016001 Thumb Code 8 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_tear_mode 0x00016009 Thumb Code 10 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) + hal_dsi_tx_ctrl_start 0x00016015 Thumb Code 134 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x000160a5 Thumb Code 52 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x000160dd Thumb Code 238 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x000161d1 Thumb Code 202 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_config_pad 0x00016889 Thumb Code 58 hal_gpio.o(i.hal_gpio_config_pad) + hal_gpio_ctrl_eint 0x000168c5 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_init_eint 0x000168dd Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x0001691d Thumb Code 22 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x00016933 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00016951 Thumb Code 22 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x0001696d Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x000169bd Thumb Code 92 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x00016a1d Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_internal_sync_get_hight_performan_mode 0x00016a25 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change 0x00016a35 Thumb Code 336 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_sync_register_lcdc_cb 0x00016be9 Thumb Code 8 hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) + hal_internal_vsync_deinit 0x00016bf5 Thumb Code 22 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00016c15 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00016c21 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tx_state 0x00016c35 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00016c41 Thumb Code 206 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00016d29 Thumb Code 194 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_rx_state 0x00016df1 Thumb Code 28 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_tear_mode 0x00016e11 Thumb Code 424 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00016ffd Thumb Code 78 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_intl_dcs_init_sw_fltr 0x00017055 Thumb Code 90 hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) + hal_intl_dcs_set_auto_hw_filter 0x000176ed Thumb Code 130 hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) + hal_intl_fb_cal_fb_info 0x000177a5 Thumb Code 780 hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) + hal_intl_fb_get_memc_flow_mode 0x00017c71 Thumb Code 6 hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) + hal_intl_fb_get_rx_fb_info 0x00017c7d Thumb Code 12 hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) + hal_intl_fb_get_tx_fb_info 0x00017c8d Thumb Code 12 hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) + hal_intl_fb_get_user_flow 0x00017c9d Thumb Code 6 hal_internal_fb.o(i.hal_intl_fb_get_user_flow) + hal_intl_svs_deinit_rx 0x00017ca9 Thumb Code 32 hal_internal_svs.o(i.hal_intl_svs_deinit_rx) + hal_intl_svs_deinit_tx 0x00017cd1 Thumb Code 10 hal_internal_svs.o(i.hal_intl_svs_deinit_tx) + hal_intl_svs_handle 0x00017ce1 Thumb Code 24 hal_internal_svs.o(i.hal_intl_svs_handle) + hal_intl_svs_init_rx 0x00017d05 Thumb Code 120 hal_internal_svs.o(i.hal_intl_svs_init_rx) + hal_intl_svs_init_tx 0x00017d85 Thumb Code 16 hal_internal_svs.o(i.hal_intl_svs_init_tx) + hal_intl_svs_set_rx_vtt 0x00017d99 Thumb Code 6 hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) + hal_intl_svs_update_rxbr_clk 0x00017da5 Thumb Code 52 hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) + hal_lcdc_displayproc_config 0x00017ded Thumb Code 94 hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) + hal_lcdc_postproc_config 0x00017f0d Thumb Code 276 hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) + hal_lcdc_upscaler_config 0x00018095 Thumb Code 202 hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) + hal_nonshadow_func_update 0x00018175 Thumb Code 180 hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) + hal_pwr_enter_deep_sleep_mode 0x00018231 Thumb Code 42 hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) + hal_pwr_enter_normal_sleep_mode 0x0001825b Thumb Code 8 hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) + hal_pwr_enter_stop_sleep_mode 0x00018265 Thumb Code 88 hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) + hal_pwr_exit_sleep_mode 0x000182c9 Thumb Code 10 hal_pwr.o(i.hal_pwr_exit_sleep_mode) + hal_pwr_get_vcc_power_ready 0x000182d3 Thumb Code 8 hal_pwr.o(i.hal_pwr_get_vcc_power_ready) + hal_pwr_ldo18s_en 0x000182db Thumb Code 8 hal_pwr.o(i.hal_pwr_ldo18s_en) + hal_pwr_ldo18s_set 0x000182e3 Thumb Code 8 hal_pwr.o(i.hal_pwr_ldo18s_set) + hal_pwr_set_main_power 0x000182eb Thumb Code 8 hal_pwr.o(i.hal_pwr_set_main_power) + hal_pwr_set_sleep_mode_power 0x000182f3 Thumb Code 8 hal_pwr.o(i.hal_pwr_set_sleep_mode_power) + hal_pwr_set_stop_sleep_wakeup_pin 0x000182fd Thumb Code 86 hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) + hal_swire_deinit 0x00018361 Thumb Code 60 hal_swire.o(i.hal_swire_deinit) + hal_swire_enable 0x000183a1 Thumb Code 86 hal_swire.o(i.hal_swire_enable) + hal_swire_init 0x000183fd Thumb Code 74 hal_swire.o(i.hal_swire_init) + hal_swire_set_pulse 0x00018455 Thumb Code 32 hal_swire.o(i.hal_swire_set_pulse) + hal_swire_set_timer 0x00018479 Thumb Code 60 hal_swire.o(i.hal_swire_set_timer) + hal_system_init 0x000184b9 Thumb Code 192 hal_system.o(i.hal_system_init) + hal_system_updata_sysclk 0x0001859d Thumb Code 60 hal_system.o(i.hal_system_updata_sysclk) + hal_timer_deinit 0x000185ed Thumb Code 48 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x0001861d Thumb Code 28 hal_timer.o(i.hal_timer_init) + hal_timer_set_repeat 0x00018639 Thumb Code 8 hal_timer.o(i.hal_timer_set_repeat) + hal_uart_init 0x00018671 Thumb Code 134 hal_uart.o(i.hal_uart_init) + hal_uart_send_blocking 0x00018705 Thumb Code 24 hal_uart.o(i.hal_uart_send_blocking) + hal_vsync_func_update 0x00018721 Thumb Code 18 hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) + hal_vsync_reset_lcdc_scaler 0x00018739 Thumb Code 206 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + main 0x00018819 Thumb Code 22 main.o(i.main) + tau_log_init 0x00019131 Thumb Code 48 tau_log.o(i.tau_log_init) + tau_log_printf 0x00019165 Thumb Code 116 tau_log.o(i.tau_log_printf) + tau_log_push_log 0x000191e9 Thumb Code 118 tau_log.o(i.tau_log_push_log) + panel_init_code 0x00019480 Data 18646 honor90pro_demo.o(.constdata) + Region$$Table$$Base 0x0001e084 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001e0a4 Number 0 anon$$obj.o(Region$$Table) + sg_uart0_tx_handle 0x000700ac Data 4 hal_uart.o(.data) + sg_uart0_rx_handle 0x000700b0 Data 4 hal_uart.o(.data) + sg_uart1_tx_handle 0x000700b4 Data 4 hal_uart.o(.data) + sg_uart1_rx_handle 0x000700b8 Data 4 hal_uart.o(.data) + g_sof_gen_te_func 0x000700c8 Data 4 hal_internal_vsync.o(.data) + hal_internal_vsync_handle_callback 0x000700cc Data 4 hal_internal_vsync.o(.data) + hal_internal_disp_end_handle_callback 0x000700d0 Data 4 hal_internal_vsync.o(.data) + g_systick_cb_func 0x000700fc Data 4 drv_common.o(.data) + g_system_clock 0x00070100 Data 4 drv_common.o(.data) + g_system_delay_step 0x00070104 Data 1 drv_common.o(.data) + g_int_rxbr_irq0_cb_func 0x00070168 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x0007016c Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x00070170 Data 4 drv_vidc.o(.data) + dma_req_map 0x00070274 Data 144 drv_dma.o(.data) + __stdout 0x00070304 Data 4 stdout.o(.data) + g_vsync_handle 0x00070590 Data 40 hal_internal_vsync.o(.bss) + sg_pro_motion_handle 0x000705b8 Data 28 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x000705d4 Data 2048 hal_internal_dcs.o(.bss) + g_rx_fb_info 0x00070ed4 Data 68 hal_internal_fb.o(.bss) + g_packet_fifo 0x00070f9c Data 4204 dcs_packet_fifo.o(.bss) + __stack_limit 0x00072078 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00073078 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000e3ac, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000e198]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000e0a4, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 275 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 1834 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2142 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2145 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2147 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2149 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2150 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2152 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2154 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2143 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 276 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 1837 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 1839 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 1841 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 1843 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x0000000e Code RO 1845 .text mc_p.l(strlen.o) + 0x000101f6 0x000101f6 0x0000001a Code RO 1847 .text mc_p.l(memcmp.o) + 0x00010210 0x00010210 0x000000b2 Code RO 2112 .text mf_p.l(fadd.o) + 0x000102c2 0x000102c2 0x0000007a Code RO 2114 .text mf_p.l(fmul.o) + 0x0001033c 0x0001033c 0x0000007c Code RO 2116 .text mf_p.l(fdiv.o) + 0x000103b8 0x000103b8 0x00000018 Code RO 2118 .text mf_p.l(fscalb.o) + 0x000103d0 0x000103d0 0x00000164 Code RO 2120 .text mf_p.l(dadd.o) + 0x00010534 0x00010534 0x000000d0 Code RO 2122 .text mf_p.l(dmul.o) + 0x00010604 0x00010604 0x0000000e Code RO 2126 .text mf_p.l(ffltui.o) + 0x00010612 0x00010612 0x00000002 PAD + 0x00010614 0x00010614 0x0000001c Code RO 2128 .text mf_p.l(dfltui.o) + 0x00010630 0x00010630 0x00000028 Code RO 2130 .text mf_p.l(ffixui.o) + 0x00010658 0x00010658 0x0000003c Code RO 2132 .text mf_p.l(dfixui.o) + 0x00010694 0x00010694 0x00000028 Code RO 2134 .text mf_p.l(f2d.o) + 0x000106bc 0x000106bc 0x00000038 Code RO 2136 .text mf_p.l(d2f.o) + 0x000106f4 0x000106f4 0x00000014 Code RO 2138 .text mf_p.l(cfcmple.o) + 0x00010708 0x00010708 0x00000014 Code RO 2140 .text mf_p.l(cfrcmple.o) + 0x0001071c 0x0001071c 0x00000060 Code RO 2157 .text mc_p.l(uldiv.o) + 0x0001077c 0x0001077c 0x00000020 Code RO 2159 .text mc_p.l(llshl.o) + 0x0001079c 0x0001079c 0x00000022 Code RO 2161 .text mc_p.l(llushr.o) + 0x000107be 0x000107be 0x00000026 Code RO 2163 .text mc_p.l(llsshr.o) + 0x000107e4 0x000107e4 0x00000000 Code RO 2165 .text mc_p.l(iusefp.o) + 0x000107e4 0x000107e4 0x00000082 Code RO 2166 .text mf_p.l(fepilogue.o) + 0x00010866 0x00010866 0x000000be Code RO 2168 .text mf_p.l(depilogue.o) + 0x00010924 0x00010924 0x000000f0 Code RO 2172 .text mf_p.l(ddiv.o) + 0x00010a14 0x00010a14 0x00000040 Code RO 2174 .text mf_p.l(dfixul.o) + 0x00010a54 0x00010a54 0x00000028 Code RO 2176 .text mf_p.l(cdrcmple.o) + 0x00010a7c 0x00010a7c 0x00000024 Code RO 2178 .text mc_p.l(init.o) + 0x00010aa0 0x00010aa0 0x00000056 Code RO 2188 .text mc_p.l(__dczerorl2.o) + 0x00010af6 0x00010af6 0x00000002 PAD + 0x00010af8 0x00010af8 0x0000001c Code RO 916 i.AP_NRESET_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b14 0x00010b14 0x0000005c Code RO 1683 i.DMA_IRQn_Handler CVWL668T.lib(drv_dma.o) + 0x00010b70 0x00010b70 0x0000000a Code RO 917 i.EXTI_INT0_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b7a 0x00010b7a 0x0000000a Code RO 918 i.EXTI_INT1_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b84 0x00010b84 0x0000000a Code RO 919 i.EXTI_INT2_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b8e 0x00010b8e 0x0000000a Code RO 920 i.EXTI_INT3_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b98 0x00010b98 0x0000000a Code RO 921 i.EXTI_INT4_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010ba2 0x00010ba2 0x0000000a Code RO 922 i.EXTI_INT5_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010bac 0x00010bac 0x0000000a Code RO 923 i.EXTI_INT6_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010bb6 0x00010bb6 0x0000000a Code RO 924 i.EXTI_INT7_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010bc0 0x00010bc0 0x00000048 Code RO 839 i.HardFault_Handler CVWL668T.lib(drv_common.o) + 0x00010c08 0x00010c08 0x00000100 Code RO 684 i.LCDC_IRQn_Handler CVWL668T.lib(hal_internal_vsync.o) + 0x00010d08 0x00010d08 0x0000009a Code RO 1443 i.MEMC_IRQn_Handler CVWL668T.lib(drv_memc.o) + 0x00010da2 0x00010da2 0x00000002 PAD + 0x00010da4 0x00010da4 0x000000b8 Code RO 1249 i.MIPI_TX_IRQn_Handler CVWL668T.lib(drv_dsi_tx.o) + 0x00010e5c 0x00010e5c 0x00000084 Code RO 90 i.Note11Pro_demo honor90pro_demo.o + 0x00010ee0 0x00010ee0 0x00000030 Code RO 1078 i.SWIRE_IRQn_Handler CVWL668T.lib(drv_swire.o) + 0x00010f10 0x00010f10 0x00000018 Code RO 840 i.SysTick_Handler CVWL668T.lib(drv_common.o) + 0x00010f28 0x00010f28 0x0000000a Code RO 1121 i.TIMER0_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f32 0x00010f32 0x0000000a Code RO 1122 i.TIMER1_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f3c 0x00010f3c 0x0000000a Code RO 1123 i.TIMER2_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f46 0x00010f46 0x0000000a Code RO 1124 i.TIMER3_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f50 0x00010f50 0x0000001c Code RO 1598 i.VIDC_IRQn_Handler CVWL668T.lib(drv_vidc.o) + 0x00010f6c 0x00010f6c 0x0000001c Code RO 1509 i.VPRE1_IRQn_Handler CVWL668T.lib(drv_rxbr.o) + 0x00010f88 0x00010f88 0x0000006c Code RO 750 i.VPRE_IRQn_Handler CVWL668T.lib(hal_internal_dcs.o) + 0x00010ff4 0x00010ff4 0x00000002 Code RO 2183 i.__scatterload_null mc_p.l(handlers.o) + 0x00010ff6 0x00010ff6 0x0000000a Code RO 2096 i._sputc mc_p.l(printfa.o) + 0x00011000 0x00011000 0x0000001c Data RO 847 .ARM.__at_0x11000 CVWL668T.lib(drv_common.o) + 0x0001101c 0x0001101c 0x00000010 Data RO 622 .ARM.__at_0x1101C CVWL668T.lib(tau_log.o) + 0x0001102c 0x0001102c 0x00000016 Data RO 423 .ARM.__at_0x1102C CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00011042 0x00011042 0x00000002 PAD + 0x00011044 0x00011044 0x00000364 Code RO 1188 i.MIPI_RX_IRQn_Handler CVWL668T.lib(drv_dsi_rx.o) + 0x000113a8 0x000113a8 0x00000180 Code RO 1746 i.UART_IRQn_Handler CVWL668T.lib(drv_uart.o) + 0x00011528 0x00011528 0x00000020 Code RO 2084 i.__0printf mc_p.l(printfa.o) + 0x00011548 0x00011548 0x00000024 Code RO 2090 i.__0vsprintf mc_p.l(printfa.o) + 0x0001156c 0x0001156c 0x0000002e Code RO 2170 i.__ARM_clz mf_p.l(depilogue.o) + 0x0001159a 0x0001159a 0x0000001a Code RO 370 i.__ARM_common_switch8 CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000115b4 0x000115b4 0x00000020 Code RO 1510 i.__NVIC_DisableIRQ CVWL668T.lib(drv_rxbr.o) + 0x000115d4 0x000115d4 0x00000018 Code RO 1511 i.__NVIC_EnableIRQ CVWL668T.lib(drv_rxbr.o) + 0x000115ec 0x000115ec 0x0000000e Code RO 2182 i.__scatterload_copy mc_p.l(handlers.o) + 0x000115fa 0x000115fa 0x0000000e Code RO 2184 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x00011608 0x00011608 0x00000174 Code RO 2091 i._fp_digits mc_p.l(printfa.o) + 0x0001177c 0x0001177c 0x000006ec Code RO 2092 i._printf_core mc_p.l(printfa.o) + 0x00011e68 0x00011e68 0x00000020 Code RO 2093 i._printf_post_padding mc_p.l(printfa.o) + 0x00011e88 0x00011e88 0x0000002c Code RO 2094 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011eb4 0x00011eb4 0x0000010c Code RO 91 i.ap_dcs_read honor90pro_demo.o + 0x00011fc0 0x00011fc0 0x00000048 Code RO 92 i.ap_dcs_set_display_off honor90pro_demo.o + 0x00012008 0x00012008 0x00000044 Code RO 93 i.ap_dcs_set_display_on honor90pro_demo.o + 0x0001204c 0x0001204c 0x00000064 Code RO 94 i.ap_dcs_set_enter_sleep_mode honor90pro_demo.o + 0x000120b0 0x000120b0 0x00000040 Code RO 95 i.ap_dcs_set_exit_sleep_mode honor90pro_demo.o + 0x000120f0 0x000120f0 0x00000058 Code RO 96 i.ap_rstn_pull_down_cb honor90pro_demo.o + 0x00012148 0x00012148 0x00000018 Code RO 97 i.ap_rstn_pull_high_cb honor90pro_demo.o + 0x00012160 0x00012160 0x00000032 Code RO 98 i.ap_set_backlight honor90pro_demo.o + 0x00012192 0x00012192 0x00000002 PAD + 0x00012194 0x00012194 0x000000c8 Code RO 99 i.ap_update_frame_rate honor90pro_demo.o + 0x0001225c 0x0001225c 0x0000002a Code RO 100 i.app_display_init honor90pro_demo.o + 0x00012286 0x00012286 0x00000002 PAD + 0x00012288 0x00012288 0x00000018 Code RO 101 i.app_gpio_init honor90pro_demo.o + 0x000122a0 0x000122a0 0x0000009c Code RO 102 i.app_init_panel honor90pro_demo.o + 0x0001233c 0x0001233c 0x000000e8 Code RO 103 i.app_mipi_rx_init honor90pro_demo.o + 0x00012424 0x00012424 0x00000050 Code RO 104 i.app_mipi_rx_start_cb honor90pro_demo.o + 0x00012474 0x00012474 0x00000064 Code RO 105 i.app_mipi_tx_init honor90pro_demo.o + 0x000124d8 0x000124d8 0x00000064 Code RO 106 i.app_mipi_tx_start honor90pro_demo.o + 0x0001253c 0x0001253c 0x000000dc Code RO 107 i.app_system_suspend honor90pro_demo.o + 0x00012618 0x00012618 0x00000018 Code RO 249 i.board_Init board.o + 0x00012630 0x00012630 0x000000c8 Code RO 1831 i.ceil m_ps.l(ceil.o) + 0x000126f8 0x000126f8 0x0000002c Code RO 685 i.check_mipi_rx_tx_video_info CVWL668T.lib(hal_internal_vsync.o) + 0x00012724 0x00012724 0x00000088 Code RO 751 i.check_pkt_buf_rev CVWL668T.lib(hal_internal_dcs.o) + 0x000127ac 0x000127ac 0x00000058 Code RO 1154 i.dcs_packet_fifo_alloc CVWL668T.lib(dcs_packet_fifo.o) + 0x00012804 0x00012804 0x00000018 Code RO 1155 i.dcs_packet_fifo_init CVWL668T.lib(dcs_packet_fifo.o) + 0x0001281c 0x0001281c 0x00000044 Code RO 1156 i.dcs_packet_free_fifo_header CVWL668T.lib(dcs_packet_fifo.o) + 0x00012860 0x00012860 0x00000024 Code RO 1157 i.dcs_packet_get_fifo_header CVWL668T.lib(dcs_packet_fifo.o) + 0x00012884 0x00012884 0x00000018 Code RO 609 i.delayMs CVWL668T.lib(tau_delay.o) + 0x0001289c 0x0001289c 0x0000002c Code RO 610 i.delayUs CVWL668T.lib(tau_delay.o) + 0x000128c8 0x000128c8 0x00000008 Code RO 845 i.drv_common_system_init CVWL668T.lib(drv_common.o) + 0x000128d0 0x000128d0 0x0000003c Code RO 864 i.drv_crgu_enable_clock CVWL668T.lib(drv_crgu.o) + 0x0001290c 0x0001290c 0x00000068 Code RO 867 i.drv_crgu_get_rxbr_clk CVWL668T.lib(drv_crgu.o) + 0x00012974 0x00012974 0x00000010 Code RO 870 i.drv_crgu_reset_modules CVWL668T.lib(drv_crgu.o) + 0x00012984 0x00012984 0x00000028 Code RO 871 i.drv_crgu_set_ahb_clk CVWL668T.lib(drv_crgu.o) + 0x000129ac 0x000129ac 0x00000010 Code RO 872 i.drv_crgu_set_clock_div CVWL668T.lib(drv_crgu.o) + 0x000129bc 0x000129bc 0x0000003c Code RO 874 i.drv_crgu_set_dpi_clk CVWL668T.lib(drv_crgu.o) + 0x000129f8 0x000129f8 0x00000038 Code RO 875 i.drv_crgu_set_dsc_clk CVWL668T.lib(drv_crgu.o) + 0x00012a30 0x00012a30 0x00000028 Code RO 876 i.drv_crgu_set_fb_clk CVWL668T.lib(drv_crgu.o) + 0x00012a58 0x00012a58 0x00000028 Code RO 877 i.drv_crgu_set_lcdc_clk CVWL668T.lib(drv_crgu.o) + 0x00012a80 0x00012a80 0x00000018 Code RO 878 i.drv_crgu_set_reset CVWL668T.lib(drv_crgu.o) + 0x00012a98 0x00012a98 0x00000028 Code RO 879 i.drv_crgu_set_rxbr_clk CVWL668T.lib(drv_crgu.o) + 0x00012ac0 0x00012ac0 0x00000028 Code RO 880 i.drv_crgu_set_vidc_clk CVWL668T.lib(drv_crgu.o) + 0x00012ae8 0x00012ae8 0x00000018 Code RO 1685 i.drv_dma_clear_status CVWL668T.lib(drv_dma.o) + 0x00012b00 0x00012b00 0x00000014 Code RO 1691 i.drv_dma_get_int_source CVWL668T.lib(drv_dma.o) + 0x00012b14 0x00012b14 0x0000001c Code RO 904 i.drv_dsc_dec_disable CVWL668T.lib(drv_dsc_dec.o) + 0x00012b30 0x00012b30 0x00000038 Code RO 905 i.drv_dsc_dec_enable CVWL668T.lib(drv_dsc_dec.o) + 0x00012b68 0x00012b68 0x00000020 Code RO 906 i.drv_dsc_dec_get_nslc CVWL668T.lib(drv_dsc_dec.o) + 0x00012b88 0x00012b88 0x0000001c Code RO 907 i.drv_dsc_dec_set_irqen CVWL668T.lib(drv_dsc_dec.o) + 0x00012ba4 0x00012ba4 0x0000010c Code RO 1189 i.drv_dsi_rx_calc_ipi_tx_delay CVWL668T.lib(drv_dsi_rx.o) + 0x00012cb0 0x00012cb0 0x00000040 Code RO 1190 i.drv_dsi_rx_enable_irq CVWL668T.lib(drv_dsi_rx.o) + 0x00012cf0 0x00012cf0 0x00000050 Code RO 1192 i.drv_dsi_rx_get_color_bpp CVWL668T.lib(drv_dsi_rx.o) + 0x00012d40 0x00012d40 0x0000001c Code RO 1193 i.drv_dsi_rx_get_color_pcc CVWL668T.lib(drv_dsi_rx.o) + 0x00012d5c 0x00012d5c 0x00000010 Code RO 1194 i.drv_dsi_rx_get_compression_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012d6c 0x00012d6c 0x00000010 Code RO 1195 i.drv_dsi_rx_get_ddi_crc_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012d7c 0x00012d7c 0x0000000c Code RO 1197 i.drv_dsi_rx_get_max_ret_size CVWL668T.lib(drv_dsi_rx.o) + 0x00012d88 0x00012d88 0x00000018 Code RO 1200 i.drv_dsi_rx_power_up CVWL668T.lib(drv_dsi_rx.o) + 0x00012da0 0x00012da0 0x0000001c Code RO 1201 i.drv_dsi_rx_set_check_crc CVWL668T.lib(drv_dsi_rx.o) + 0x00012dbc 0x00012dbc 0x00000024 Code RO 1202 i.drv_dsi_rx_set_ctrl_cfg CVWL668T.lib(drv_dsi_rx.o) + 0x00012de0 0x00012de0 0x00000010 Code RO 1203 i.drv_dsi_rx_set_ddi_cfg CVWL668T.lib(drv_dsi_rx.o) + 0x00012df0 0x00012df0 0x0000001c Code RO 1204 i.drv_dsi_rx_set_ddi_crc_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012e0c 0x00012e0c 0x0000000c Code RO 1207 i.drv_dsi_rx_set_inten CVWL668T.lib(drv_dsi_rx.o) + 0x00012e18 0x00012e18 0x00000010 Code RO 1208 i.drv_dsi_rx_set_ipi_cfg CVWL668T.lib(drv_dsi_rx.o) + 0x00012e28 0x00012e28 0x0000001c Code RO 1210 i.drv_dsi_rx_set_ipi_ycbcr_frmt CVWL668T.lib(drv_dsi_rx.o) + 0x00012e44 0x00012e44 0x00000014 Code RO 1211 i.drv_dsi_rx_set_lane_swap CVWL668T.lib(drv_dsi_rx.o) + 0x00012e58 0x00012e58 0x00000024 Code RO 1212 i.drv_dsi_rx_set_resp_cnt CVWL668T.lib(drv_dsi_rx.o) + 0x00012e7c 0x00012e7c 0x0000001c Code RO 1213 i.drv_dsi_rx_set_tear_resp_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012e98 0x00012e98 0x00000100 Code RO 1214 i.drv_dsi_rx_set_up_phy CVWL668T.lib(drv_dsi_rx.o) + 0x00012f98 0x00012f98 0x00000018 Code RO 1215 i.drv_dsi_rx_shut_down CVWL668T.lib(drv_dsi_rx.o) + 0x00012fb0 0x00012fb0 0x00000018 Code RO 1251 i.drv_dsi_tx_command_header CVWL668T.lib(drv_dsi_tx.o) + 0x00012fc8 0x00012fc8 0x00000058 Code RO 1252 i.drv_dsi_tx_command_mode_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x00013020 0x00013020 0x0000000c Code RO 1253 i.drv_dsi_tx_command_put_payload CVWL668T.lib(drv_dsi_tx.o) + 0x0001302c 0x0001302c 0x00000020 Code RO 1254 i.drv_dsi_tx_config_eotp CVWL668T.lib(drv_dsi_tx.o) + 0x0001304c 0x0001304c 0x0000000c Code RO 1255 i.drv_dsi_tx_config_int CVWL668T.lib(drv_dsi_tx.o) + 0x00013058 0x00013058 0x00000010 Code RO 1256 i.drv_dsi_tx_dpi_lpcmd_time CVWL668T.lib(drv_dsi_tx.o) + 0x00013068 0x00013068 0x00000010 Code RO 1257 i.drv_dsi_tx_dpi_mode CVWL668T.lib(drv_dsi_tx.o) + 0x00013078 0x00013078 0x00000024 Code RO 1258 i.drv_dsi_tx_dpi_polarity CVWL668T.lib(drv_dsi_tx.o) + 0x0001309c 0x0001309c 0x0000000c Code RO 1259 i.drv_dsi_tx_edpi_cmd_size CVWL668T.lib(drv_dsi_tx.o) + 0x000130a8 0x000130a8 0x0000000c Code RO 1261 i.drv_dsi_tx_get_cmd_status CVWL668T.lib(drv_dsi_tx.o) + 0x000130b4 0x000130b4 0x0000000c Code RO 1263 i.drv_dsi_tx_mode CVWL668T.lib(drv_dsi_tx.o) + 0x000130c0 0x000130c0 0x0000001c Code RO 1264 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL668T.lib(drv_dsi_tx.o) + 0x000130dc 0x000130dc 0x00000020 Code RO 1265 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL668T.lib(drv_dsi_tx.o) + 0x000130fc 0x000130fc 0x00000010 Code RO 1267 i.drv_dsi_tx_phy_lane_mode CVWL668T.lib(drv_dsi_tx.o) + 0x0001310c 0x0001310c 0x00000068 Code RO 1270 i.drv_dsi_tx_phy_status_ready CVWL668T.lib(drv_dsi_tx.o) + 0x00013174 0x00013174 0x00000044 Code RO 1271 i.drv_dsi_tx_phy_status_stopstate CVWL668T.lib(drv_dsi_tx.o) + 0x000131b8 0x000131b8 0x00000150 Code RO 1273 i.drv_dsi_tx_phy_test_setup CVWL668T.lib(drv_dsi_tx.o) + 0x00013308 0x00013308 0x00000020 Code RO 1274 i.drv_dsi_tx_phy_time_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x00013328 0x00013328 0x0000000c Code RO 1278 i.drv_dsi_tx_powerup CVWL668T.lib(drv_dsi_tx.o) + 0x00013334 0x00013334 0x00000024 Code RO 1279 i.drv_dsi_tx_response_mode CVWL668T.lib(drv_dsi_tx.o) + 0x00013358 0x00013358 0x0000001c Code RO 1282 i.drv_dsi_tx_set_bta_ack CVWL668T.lib(drv_dsi_tx.o) + 0x00013374 0x00013374 0x00000014 Code RO 1283 i.drv_dsi_tx_set_esc_div CVWL668T.lib(drv_dsi_tx.o) + 0x00013388 0x00013388 0x00000040 Code RO 1284 i.drv_dsi_tx_set_int CVWL668T.lib(drv_dsi_tx.o) + 0x000133c8 0x000133c8 0x00000018 Code RO 1285 i.drv_dsi_tx_set_time_out_div CVWL668T.lib(drv_dsi_tx.o) + 0x000133e0 0x000133e0 0x00000014 Code RO 1286 i.drv_dsi_tx_set_video_chunk CVWL668T.lib(drv_dsi_tx.o) + 0x000133f4 0x000133f4 0x00000024 Code RO 1287 i.drv_dsi_tx_set_video_timing CVWL668T.lib(drv_dsi_tx.o) + 0x00013418 0x00013418 0x0000000c Code RO 1289 i.drv_dsi_tx_shutdown CVWL668T.lib(drv_dsi_tx.o) + 0x00013424 0x00013424 0x0000002c Code RO 1290 i.drv_dsi_tx_timeout_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x00013450 0x00013450 0x000000e8 Code RO 1293 i.drv_dsi_tx_video_mode_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x00013538 0x00013538 0x00000036 Code RO 1791 i.drv_efuse_enter_inactive CVWL668T.lib(drv_efuse.o) + 0x0001356e 0x0001356e 0x0000000c Code RO 1794 i.drv_efuse_int_enable CVWL668T.lib(drv_efuse.o) + 0x0001357a 0x0001357a 0x0000003a Code RO 1795 i.drv_efuse_read CVWL668T.lib(drv_efuse.o) + 0x000135b4 0x000135b4 0x00000018 Code RO 1796 i.drv_efuse_read_req CVWL668T.lib(drv_efuse.o) + 0x000135cc 0x000135cc 0x00000024 Code RO 927 i.drv_gpio_handle_int CVWL668T.lib(drv_gpio.o) + 0x000135f0 0x000135f0 0x0000000c Code RO 928 i.drv_gpio_register_ap_reset_callback CVWL668T.lib(drv_gpio.o) + 0x000135fc 0x000135fc 0x00000014 Code RO 929 i.drv_gpio_register_callback CVWL668T.lib(drv_gpio.o) + 0x00013610 0x00013610 0x00000044 Code RO 931 i.drv_gpio_set_int CVWL668T.lib(drv_gpio.o) + 0x00013654 0x00013654 0x00000020 Code RO 932 i.drv_gpio_set_ioe CVWL668T.lib(drv_gpio.o) + 0x00013674 0x00013674 0x00000014 Code RO 933 i.drv_gpio_set_mode CVWL668T.lib(drv_gpio.o) + 0x00013688 0x00013688 0x00000020 Code RO 480 i.drv_gpio_set_output_data CVWL668T.lib(hal_gpio.o) + 0x000136a8 0x000136a8 0x00000028 Code RO 1355 i.drv_lcdc_bcsa_config CVWL668T.lib(drv_lcdc.o) + 0x000136d0 0x000136d0 0x0000002c Code RO 1356 i.drv_lcdc_cfg_int_frame CVWL668T.lib(drv_lcdc.o) + 0x000136fc 0x000136fc 0x00000018 Code RO 1357 i.drv_lcdc_clear_int CVWL668T.lib(drv_lcdc.o) + 0x00013714 0x00013714 0x00000034 Code RO 1359 i.drv_lcdc_cmd_start CVWL668T.lib(drv_lcdc.o) + 0x00013748 0x00013748 0x00000014 Code RO 1360 i.drv_lcdc_config_acc_command_mode CVWL668T.lib(drv_lcdc.o) + 0x0001375c 0x0001375c 0x00000038 Code RO 1361 i.drv_lcdc_config_int CVWL668T.lib(drv_lcdc.o) + 0x00013794 0x00013794 0x00000028 Code RO 1362 i.drv_lcdc_config_int_single CVWL668T.lib(drv_lcdc.o) + 0x000137bc 0x000137bc 0x00000018 Code RO 1363 i.drv_lcdc_config_overwrite_rgb CVWL668T.lib(drv_lcdc.o) + 0x000137d4 0x000137d4 0x00000050 Code RO 1364 i.drv_lcdc_config_src_parameter CVWL668T.lib(drv_lcdc.o) + 0x00013824 0x00013824 0x00000010 Code RO 1365 i.drv_lcdc_crop_hact CVWL668T.lib(drv_lcdc.o) + 0x00013834 0x00013834 0x00000038 Code RO 1366 i.drv_lcdc_ctrl_flow CVWL668T.lib(drv_lcdc.o) + 0x0001386c 0x0001386c 0x00000030 Code RO 1367 i.drv_lcdc_dith_config CVWL668T.lib(drv_lcdc.o) + 0x0001389c 0x0001389c 0x0000003c Code RO 1369 i.drv_lcdc_edge_dect_config CVWL668T.lib(drv_lcdc.o) + 0x000138d8 0x000138d8 0x00000064 Code RO 1370 i.drv_lcdc_edge_enh_config CVWL668T.lib(drv_lcdc.o) + 0x0001393c 0x0001393c 0x00000024 Code RO 1371 i.drv_lcdc_enable_shadow_reg CVWL668T.lib(drv_lcdc.o) + 0x00013960 0x00013960 0x0000001c Code RO 1372 i.drv_lcdc_endianness_config CVWL668T.lib(drv_lcdc.o) + 0x0001397c 0x0001397c 0x00000020 Code RO 1373 i.drv_lcdc_fc_config CVWL668T.lib(drv_lcdc.o) + 0x0001399c 0x0001399c 0x00000024 Code RO 1375 i.drv_lcdc_fldc_config CVWL668T.lib(drv_lcdc.o) + 0x000139c0 0x000139c0 0x00000024 Code RO 1376 i.drv_lcdc_function_disable CVWL668T.lib(drv_lcdc.o) + 0x000139e4 0x000139e4 0x00000024 Code RO 1377 i.drv_lcdc_function_enable CVWL668T.lib(drv_lcdc.o) + 0x00013a08 0x00013a08 0x0000003c Code RO 1388 i.drv_lcdc_set_int CVWL668T.lib(drv_lcdc.o) + 0x00013a44 0x00013a44 0x0000001c Code RO 1389 i.drv_lcdc_set_prefetch CVWL668T.lib(drv_lcdc.o) + 0x00013a60 0x00013a60 0x0000001c Code RO 1390 i.drv_lcdc_set_tear_line CVWL668T.lib(drv_lcdc.o) + 0x00013a7c 0x00013a7c 0x00000010 Code RO 1392 i.drv_lcdc_stop_display CVWL668T.lib(drv_lcdc.o) + 0x00013a8c 0x00013a8c 0x0000003c Code RO 1394 i.drv_lcdc_vid_hw_start CVWL668T.lib(drv_lcdc.o) + 0x00013ac8 0x00013ac8 0x00000018 Code RO 1396 i.drv_lcdc_vintp_mode_config CVWL668T.lib(drv_lcdc.o) + 0x00013ae0 0x00013ae0 0x00000014 Code RO 1444 i.drv_memc_clear_status CVWL668T.lib(drv_memc.o) + 0x00013af4 0x00013af4 0x00000040 Code RO 1445 i.drv_memc_enable_irq CVWL668T.lib(drv_memc.o) + 0x00013b34 0x00013b34 0x00000010 Code RO 1446 i.drv_memc_gen_a_tear_signal CVWL668T.lib(drv_memc.o) + 0x00013b44 0x00013b44 0x00000018 Code RO 1447 i.drv_memc_get_status CVWL668T.lib(drv_memc.o) + 0x00013b5c 0x00013b5c 0x00000010 Code RO 1448 i.drv_memc_get_tear_mode CVWL668T.lib(drv_memc.o) + 0x00013b6c 0x00013b6c 0x0000001c Code RO 1449 i.drv_memc_rate_transfer_sel CVWL668T.lib(drv_memc.o) + 0x00013b88 0x00013b88 0x00000014 Code RO 1450 i.drv_memc_sel_vsync CVWL668T.lib(drv_memc.o) + 0x00013b9c 0x00013b9c 0x00000018 Code RO 1451 i.drv_memc_set_active_height CVWL668T.lib(drv_memc.o) + 0x00013bb4 0x00013bb4 0x0000001c Code RO 1452 i.drv_memc_set_circ_mode_enable CVWL668T.lib(drv_memc.o) + 0x00013bd0 0x00013bd0 0x00000014 Code RO 1453 i.drv_memc_set_data_mode CVWL668T.lib(drv_memc.o) + 0x00013be4 0x00013be4 0x00000018 Code RO 1456 i.drv_memc_set_double_buffer CVWL668T.lib(drv_memc.o) + 0x00013bfc 0x00013bfc 0x0000001c Code RO 1460 i.drv_memc_set_frame_drop_select CVWL668T.lib(drv_memc.o) + 0x00013c18 0x00013c18 0x00000018 Code RO 1461 i.drv_memc_set_fs_en_conditions CVWL668T.lib(drv_memc.o) + 0x00013c30 0x00013c30 0x0000001c Code RO 1463 i.drv_memc_set_lcdc_st_conditions CVWL668T.lib(drv_memc.o) + 0x00013c4c 0x00013c4c 0x00000020 Code RO 1464 i.drv_memc_set_ltpo_mode CVWL668T.lib(drv_memc.o) + 0x00013c6c 0x00013c6c 0x00000018 Code RO 1465 i.drv_memc_set_ltpo_pu_thres CVWL668T.lib(drv_memc.o) + 0x00013c84 0x00013c84 0x00000014 Code RO 1469 i.drv_memc_set_tear_mode CVWL668T.lib(drv_memc.o) + 0x00013c98 0x00013c98 0x0000002c Code RO 1470 i.drv_memc_set_tear_waveform CVWL668T.lib(drv_memc.o) + 0x00013cc4 0x00013cc4 0x00000014 Code RO 1472 i.drv_memc_set_vidc_sync_cnt CVWL668T.lib(drv_memc.o) + 0x00013cd8 0x00013cd8 0x00000010 Code RO 1814 i.drv_phy_test_clear CVWL668T.lib(drv_phy_common.o) + 0x00013ce8 0x00013ce8 0x00000018 Code RO 1815 i.drv_phy_test_lock CVWL668T.lib(drv_phy_common.o) + 0x00013d00 0x00013d00 0x00000030 Code RO 963 i.drv_pwr_efuse_pd CVWL668T.lib(drv_pwr.o) + 0x00013d30 0x00013d30 0x0000004c Code RO 965 i.drv_pwr_enter_deep_sleep_mode CVWL668T.lib(drv_pwr.o) + 0x00013d7c 0x00013d7c 0x00000034 Code RO 967 i.drv_pwr_enter_sleep_mode_ex CVWL668T.lib(drv_pwr.o) + 0x00013db0 0x00013db0 0x00000098 Code RO 968 i.drv_pwr_enter_stop_sleep_mode CVWL668T.lib(drv_pwr.o) + 0x00013e48 0x00013e48 0x00000028 Code RO 969 i.drv_pwr_exit_sleep_mode CVWL668T.lib(drv_pwr.o) + 0x00013e70 0x00013e70 0x00000010 Code RO 972 i.drv_pwr_get_power_ready_st CVWL668T.lib(drv_pwr.o) + 0x00013e80 0x00013e80 0x00000030 Code RO 984 i.drv_pwr_ldo18s_en CVWL668T.lib(drv_pwr.o) + 0x00013eb0 0x00013eb0 0x0000002c Code RO 985 i.drv_pwr_ldo18s_set CVWL668T.lib(drv_pwr.o) + 0x00013edc 0x00013edc 0x00000028 Code RO 1004 i.drv_pwr_set_breath_screen_power_sel CVWL668T.lib(drv_pwr.o) + 0x00013f04 0x00013f04 0x00000028 Code RO 1005 i.drv_pwr_set_digit_power_sel CVWL668T.lib(drv_pwr.o) + 0x00013f2c 0x00013f2c 0x00000034 Code RO 1008 i.drv_pwr_set_pll_clk CVWL668T.lib(drv_pwr.o) + 0x00013f60 0x00013f60 0x0000002c Code RO 1012 i.drv_pwr_set_wakeup_type CVWL668T.lib(drv_pwr.o) + 0x00013f8c 0x00013f8c 0x00000020 Code RO 1015 i.drv_pwr_write_lock CVWL668T.lib(drv_pwr.o) + 0x00013fac 0x00013fac 0x00000010 Code RO 1512 i.drv_rxbr_clear_pkt_buffer CVWL668T.lib(drv_rxbr.o) + 0x00013fbc 0x00013fbc 0x0000000c Code RO 1513 i.drv_rxbr_clear_status0 CVWL668T.lib(drv_rxbr.o) + 0x00013fc8 0x00013fc8 0x0000005a Code RO 1516 i.drv_rxbr_enable_irq CVWL668T.lib(drv_rxbr.o) + 0x00014022 0x00014022 0x00000002 PAD + 0x00014024 0x00014024 0x0000001c Code RO 1517 i.drv_rxbr_frame_drop_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014040 0x00014040 0x00000018 Code RO 686 i.drv_rxbr_get_int_source CVWL668T.lib(hal_internal_vsync.o) + 0x00014058 0x00014058 0x00000018 Code RO 752 i.drv_rxbr_get_status0 CVWL668T.lib(hal_internal_dcs.o) + 0x00014070 0x00014070 0x00000014 Code RO 1527 i.drv_rxbr_hline_rcv1_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014084 0x00014084 0x00000010 Code RO 1528 i.drv_rxbr_hline_rcv_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014094 0x00014094 0x0000000c Code RO 1530 i.drv_rxbr_register_irq1_callback CVWL668T.lib(drv_rxbr.o) + 0x000140a0 0x000140a0 0x00000018 Code RO 1531 i.drv_rxbr_set_ack_pkt_header CVWL668T.lib(drv_rxbr.o) + 0x000140b8 0x000140b8 0x00000144 Code RO 1534 i.drv_rxbr_set_cmd_response CVWL668T.lib(drv_rxbr.o) + 0x000141fc 0x000141fc 0x0000001c Code RO 1536 i.drv_rxbr_set_color_format CVWL668T.lib(drv_rxbr.o) + 0x00014218 0x00014218 0x00000024 Code RO 1539 i.drv_rxbr_set_filter_regs CVWL668T.lib(drv_rxbr.o) + 0x0001423c 0x0001423c 0x0000001c Code RO 1540 i.drv_rxbr_set_inten CVWL668T.lib(drv_rxbr.o) + 0x00014258 0x00014258 0x00000018 Code RO 1541 i.drv_rxbr_set_ltpo_drop_th CVWL668T.lib(drv_rxbr.o) + 0x00014270 0x00014270 0x00000040 Code RO 1545 i.drv_rxbr_set_usr_cfg CVWL668T.lib(drv_rxbr.o) + 0x000142b0 0x000142b0 0x00000010 Code RO 1546 i.drv_rxbr_set_usr_col CVWL668T.lib(drv_rxbr.o) + 0x000142c0 0x000142c0 0x00000010 Code RO 1547 i.drv_rxbr_set_usr_row CVWL668T.lib(drv_rxbr.o) + 0x000142d0 0x000142d0 0x00000078 Code RO 1169 i.drv_se_init CVWL668T.lib(drv_se.o) + 0x00014348 0x00014348 0x000000d4 Code RO 1170 i.drv_se_set_dsc CVWL668T.lib(drv_se.o) + 0x0001441c 0x0001441c 0x00000088 Code RO 1171 i.drv_se_set_lcdc CVWL668T.lib(drv_se.o) + 0x000144a4 0x000144a4 0x00000068 Code RO 1172 i.drv_se_set_memc CVWL668T.lib(drv_se.o) + 0x0001450c 0x0001450c 0x000000d0 Code RO 1173 i.drv_se_set_rxbr CVWL668T.lib(drv_se.o) + 0x000145dc 0x000145dc 0x000000ac Code RO 1174 i.drv_se_set_vidc CVWL668T.lib(drv_se.o) + 0x00014688 0x00014688 0x00000014 Code RO 1175 i.drv_se_start_rx CVWL668T.lib(drv_se.o) + 0x0001469c 0x0001469c 0x0000001c Code RO 1079 i.drv_swire_enable CVWL668T.lib(drv_swire.o) + 0x000146b8 0x000146b8 0x0000000c Code RO 1080 i.drv_swire_get_pulse_count CVWL668T.lib(drv_swire.o) + 0x000146c4 0x000146c4 0x0000000c Code RO 1081 i.drv_swire_register_callback CVWL668T.lib(drv_swire.o) + 0x000146d0 0x000146d0 0x00000018 Code RO 1082 i.drv_swire_set_bit_time CVWL668T.lib(drv_swire.o) + 0x000146e8 0x000146e8 0x00000048 Code RO 1083 i.drv_swire_set_int CVWL668T.lib(drv_swire.o) + 0x00014730 0x00014730 0x0000001c Code RO 1084 i.drv_swire_set_power_down CVWL668T.lib(drv_swire.o) + 0x0001474c 0x0001474c 0x0000000c Code RO 1085 i.drv_swire_set_pulse_count CVWL668T.lib(drv_swire.o) + 0x00014758 0x00014758 0x0000001c Code RO 1086 i.drv_swire_set_trig_mode CVWL668T.lib(drv_swire.o) + 0x00014774 0x00014774 0x0000000c Code RO 1101 i.drv_sys_cfg_clear_all_int CVWL668T.lib(drv_sys_cfg.o) + 0x00014780 0x00014780 0x00000028 Code RO 1102 i.drv_sys_cfg_clear_pending CVWL668T.lib(drv_sys_cfg.o) + 0x000147a8 0x000147a8 0x00000024 Code RO 1103 i.drv_sys_cfg_sel_ap_rst_trig CVWL668T.lib(drv_sys_cfg.o) + 0x000147cc 0x000147cc 0x00000024 Code RO 1105 i.drv_sys_cfg_sel_gpio_group CVWL668T.lib(drv_sys_cfg.o) + 0x000147f0 0x000147f0 0x00000024 Code RO 1106 i.drv_sys_cfg_sel_int_trig CVWL668T.lib(drv_sys_cfg.o) + 0x00014814 0x00014814 0x00000018 Code RO 1107 i.drv_sys_cfg_sel_swire_timer CVWL668T.lib(drv_sys_cfg.o) + 0x0001482c 0x0001482c 0x00000024 Code RO 1108 i.drv_sys_cfg_set_int CVWL668T.lib(drv_sys_cfg.o) + 0x00014850 0x00014850 0x0000001a Code RO 1125 i.drv_timer_clear_status_flags CVWL668T.lib(drv_timer.o) + 0x0001486a 0x0001486a 0x00000020 Code RO 1126 i.drv_timer_enable CVWL668T.lib(drv_timer.o) + 0x0001488a 0x0001488a 0x00000002 PAD + 0x0001488c 0x0001488c 0x00000010 Code RO 1127 i.drv_timer_get_instance CVWL668T.lib(drv_timer.o) + 0x0001489c 0x0001489c 0x0000003c Code RO 1129 i.drv_timer_handle_interrupt CVWL668T.lib(drv_timer.o) + 0x000148d8 0x000148d8 0x00000040 Code RO 1131 i.drv_timer_set_compare_val CVWL668T.lib(drv_timer.o) + 0x00014918 0x00014918 0x00000048 Code RO 1132 i.drv_timer_set_int CVWL668T.lib(drv_timer.o) + 0x00014960 0x00014960 0x00000028 Code RO 1133 i.drv_timer_set_prescaler CVWL668T.lib(drv_timer.o) + 0x00014988 0x00014988 0x00000010 Code RO 1134 i.drv_timer_set_repeat CVWL668T.lib(drv_timer.o) + 0x00014998 0x00014998 0x00000020 Code RO 1295 i.drv_tx_phy_test_enter CVWL668T.lib(drv_dsi_tx.o) + 0x000149b8 0x000149b8 0x00000020 Code RO 1296 i.drv_tx_phy_test_exit CVWL668T.lib(drv_dsi_tx.o) + 0x000149d8 0x000149d8 0x00000028 Code RO 1299 i.drv_tx_phy_test_write_code CVWL668T.lib(drv_dsi_tx.o) + 0x00014a00 0x00014a00 0x00000034 Code RO 1747 i.drv_uart_abort_recv CVWL668T.lib(drv_uart.o) + 0x00014a34 0x00014a34 0x00000034 Code RO 1748 i.drv_uart_abort_send CVWL668T.lib(drv_uart.o) + 0x00014a68 0x00014a68 0x00000014 Code RO 1749 i.drv_uart_config_int CVWL668T.lib(drv_uart.o) + 0x00014a7c 0x00014a7c 0x00000018 Code RO 1751 i.drv_uart_enable_clk CVWL668T.lib(drv_uart.o) + 0x00014a94 0x00014a94 0x0000005c Code RO 1752 i.drv_uart_enable_int CVWL668T.lib(drv_uart.o) + 0x00014af0 0x00014af0 0x00000028 Code RO 1754 i.drv_uart_get_instance CVWL668T.lib(drv_uart.o) + 0x00014b18 0x00014b18 0x000000ce Code RO 1755 i.drv_uart_init CVWL668T.lib(drv_uart.o) + 0x00014be6 0x00014be6 0x00000002 PAD + 0x00014be8 0x00014be8 0x0000003c Code RO 1756 i.drv_uart_int_trans_handle CVWL668T.lib(drv_uart.o) + 0x00014c24 0x00014c24 0x0000001c Code RO 1759 i.drv_uart_reset_rx_fifo CVWL668T.lib(drv_uart.o) + 0x00014c40 0x00014c40 0x0000001c Code RO 1760 i.drv_uart_reset_tx_fifo CVWL668T.lib(drv_uart.o) + 0x00014c5c 0x00014c5c 0x0000001a Code RO 1761 i.drv_uart_send_blocking CVWL668T.lib(drv_uart.o) + 0x00014c76 0x00014c76 0x00000054 Code RO 1763 i.drv_uart_set_baud_rate CVWL668T.lib(drv_uart.o) + 0x00014cca 0x00014cca 0x00000002 PAD + 0x00014ccc 0x00014ccc 0x0000004c Code RO 1764 i.drv_uart_trans_create_handle CVWL668T.lib(drv_uart.o) + 0x00014d18 0x00014d18 0x00000010 Code RO 1599 i.drv_vidc_clear_irq CVWL668T.lib(drv_vidc.o) + 0x00014d28 0x00014d28 0x00000020 Code RO 1603 i.drv_vidc_enable CVWL668T.lib(drv_vidc.o) + 0x00014d48 0x00014d48 0x00000040 Code RO 1604 i.drv_vidc_enable_irq CVWL668T.lib(drv_vidc.o) + 0x00014d88 0x00014d88 0x0000002c Code RO 1605 i.drv_vidc_get_int_source CVWL668T.lib(drv_vidc.o) + 0x00014db4 0x00014db4 0x00000018 Code RO 1606 i.drv_vidc_get_irq_status CVWL668T.lib(drv_vidc.o) + 0x00014dcc 0x00014dcc 0x0000002c Code RO 1610 i.drv_vidc_init_module_enable CVWL668T.lib(drv_vidc.o) + 0x00014df8 0x00014df8 0x0000000c Code RO 1611 i.drv_vidc_register_callback CVWL668T.lib(drv_vidc.o) + 0x00014e04 0x00014e04 0x0000000c Code RO 1612 i.drv_vidc_reset CVWL668T.lib(drv_vidc.o) + 0x00014e10 0x00014e10 0x0000001c Code RO 1613 i.drv_vidc_set_circ_mode_enable CVWL668T.lib(drv_vidc.o) + 0x00014e2c 0x00014e2c 0x00000038 Code RO 1614 i.drv_vidc_set_dither_config CVWL668T.lib(drv_vidc.o) + 0x00014e64 0x00014e64 0x0000005c Code RO 1616 i.drv_vidc_set_dst_parameter CVWL668T.lib(drv_vidc.o) + 0x00014ec0 0x00014ec0 0x0000000c Code RO 1618 i.drv_vidc_set_honly_hcoef0 CVWL668T.lib(drv_vidc.o) + 0x00014ecc 0x00014ecc 0x0000002c Code RO 1619 i.drv_vidc_set_honly_hinitb CVWL668T.lib(drv_vidc.o) + 0x00014ef8 0x00014ef8 0x00000030 Code RO 1620 i.drv_vidc_set_honly_hinitr CVWL668T.lib(drv_vidc.o) + 0x00014f28 0x00014f28 0x0000001c Code RO 1623 i.drv_vidc_set_irqen CVWL668T.lib(drv_vidc.o) + 0x00014f44 0x00014f44 0x00000014 Code RO 1624 i.drv_vidc_set_mirror CVWL668T.lib(drv_vidc.o) + 0x00014f58 0x00014f58 0x0000001c Code RO 1627 i.drv_vidc_set_pentile_swap CVWL668T.lib(drv_vidc.o) + 0x00014f74 0x00014f74 0x0000000c Code RO 1628 i.drv_vidc_set_pu_ctrl CVWL668T.lib(drv_vidc.o) + 0x00014f80 0x00014f80 0x00000018 Code RO 1629 i.drv_vidc_set_rotation CVWL668T.lib(drv_vidc.o) + 0x00014f98 0x00014f98 0x0000000c Code RO 1630 i.drv_vidc_set_scld_hcoef0 CVWL668T.lib(drv_vidc.o) + 0x00014fa4 0x00014fa4 0x0000000c Code RO 1631 i.drv_vidc_set_scld_hcoef1 CVWL668T.lib(drv_vidc.o) + 0x00014fb0 0x00014fb0 0x00000014 Code RO 1632 i.drv_vidc_set_scld_step CVWL668T.lib(drv_vidc.o) + 0x00014fc4 0x00014fc4 0x0000000c Code RO 1633 i.drv_vidc_set_scld_vcoef0 CVWL668T.lib(drv_vidc.o) + 0x00014fd0 0x00014fd0 0x0000000c Code RO 1634 i.drv_vidc_set_scld_vcoef1 CVWL668T.lib(drv_vidc.o) + 0x00014fdc 0x00014fdc 0x00000020 Code RO 1635 i.drv_vidc_set_src_parameter CVWL668T.lib(drv_vidc.o) + 0x00014ffc 0x00014ffc 0x00000038 Code RO 1636 i.drv_vidc_set_vintp_config CVWL668T.lib(drv_vidc.o) + 0x00015034 0x00015034 0x00000034 Code RO 618 i.fputc CVWL668T.lib(tau_log.o) + 0x00015068 0x00015068 0x00000040 Code RO 780 i.ha_intl_fb_check_pu_size CVWL668T.lib(hal_internal_fb.o) + 0x000150a8 0x000150a8 0x00000040 Code RO 284 i.hal_dsi_rx_ctrl_create_handle CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000150e8 0x000150e8 0x00000040 Code RO 285 i.hal_dsi_rx_ctrl_dcs_async_handler CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015128 0x00015128 0x00000094 Code RO 286 i.hal_dsi_rx_ctrl_deinit CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000151bc 0x000151bc 0x00000020 Code RO 293 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000151dc 0x000151dc 0x000000ac Code RO 294 i.hal_dsi_rx_ctrl_init CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015288 0x00015288 0x00000100 Code RO 295 i.hal_dsi_rx_ctrl_init_clk CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015388 0x00015388 0x00000108 Code RO 296 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015490 0x00015490 0x0000012c Code RO 297 i.hal_dsi_rx_ctrl_init_memc CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000155bc 0x000155bc 0x00000148 Code RO 298 i.hal_dsi_rx_ctrl_init_rxbr CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015704 0x00015704 0x00000280 Code RO 299 i.hal_dsi_rx_ctrl_init_vidc CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015984 0x00015984 0x00000038 Code RO 300 i.hal_dsi_rx_ctrl_pre_init_pps CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000159bc 0x000159bc 0x000000f0 Code RO 305 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015aac 0x00015aac 0x000000b0 Code RO 306 i.hal_dsi_rx_ctrl_set_auto_ack CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015b5c 0x00015b5c 0x00000018 Code RO 309 i.hal_dsi_rx_ctrl_set_check_crc CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015b74 0x00015b74 0x00000030 Code RO 312 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015ba4 0x00015ba4 0x00000030 Code RO 318 i.hal_dsi_rx_ctrl_start CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015bd4 0x00015bd4 0x00000030 Code RO 319 i.hal_dsi_rx_ctrl_stop CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015c04 0x00015c04 0x00000020 Code RO 321 i.hal_dsi_rx_ctrl_toggle_resolution CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015c24 0x00015c24 0x00000280 Code RO 374 i.hal_dsi_tx_cmd_mode_cal_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015ea4 0x00015ea4 0x00000038 Code RO 376 i.hal_dsi_tx_ctrl_create_handle CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015edc 0x00015edc 0x00000074 Code RO 377 i.hal_dsi_tx_ctrl_deinit CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015f50 0x00015f50 0x00000022 Code RO 380 i.hal_dsi_tx_ctrl_gen_a_tear_signal CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015f72 0x00015f72 0x00000002 PAD + 0x00015f74 0x00015f74 0x0000007c Code RO 382 i.hal_dsi_tx_ctrl_init CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015ff0 0x00015ff0 0x00000010 Code RO 383 i.hal_dsi_tx_ctrl_init_clk CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016000 0x00016000 0x00000008 Code RO 396 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016008 0x00016008 0x0000000a Code RO 397 i.hal_dsi_tx_ctrl_set_tear_mode CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016012 0x00016012 0x00000002 PAD + 0x00016014 0x00016014 0x00000090 Code RO 399 i.hal_dsi_tx_ctrl_start CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000160a4 0x000160a4 0x00000038 Code RO 400 i.hal_dsi_tx_ctrl_stop CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000160dc 0x000160dc 0x000000f4 Code RO 402 i.hal_dsi_tx_ctrl_write_array_cmd CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000161d0 0x000161d0 0x000000d0 Code RO 403 i.hal_dsi_tx_ctrl_write_cmd CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000162a0 0x000162a0 0x00000104 Code RO 404 i.hal_dsi_tx_init_cfg CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000163a4 0x000163a4 0x00000044 Code RO 405 i.hal_dsi_tx_init_dpi_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000163e8 0x000163e8 0x00000016 Code RO 406 i.hal_dsi_tx_init_phy_cfg CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000163fe 0x000163fe 0x00000052 Code RO 407 i.hal_dsi_tx_init_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016450 0x00016450 0x00000054 Code RO 408 i.hal_dsi_tx_init_vid_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000164a4 0x000164a4 0x00000040 Code RO 409 i.hal_dsi_tx_send_cmd CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000164e4 0x000164e4 0x00000094 Code RO 410 i.hal_dsi_tx_timing_info_update CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016578 0x00016578 0x00000310 Code RO 411 i.hal_dsi_tx_vid_mode_cal_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016888 0x00016888 0x0000003a Code RO 481 i.hal_gpio_config_pad CVWL668T.lib(hal_gpio.o) + 0x000168c2 0x000168c2 0x00000002 PAD + 0x000168c4 0x000168c4 0x00000018 Code RO 482 i.hal_gpio_ctrl_eint CVWL668T.lib(hal_gpio.o) + 0x000168dc 0x000168dc 0x00000040 Code RO 486 i.hal_gpio_init_eint CVWL668T.lib(hal_gpio.o) + 0x0001691c 0x0001691c 0x00000016 Code RO 487 i.hal_gpio_init_input CVWL668T.lib(hal_gpio.o) + 0x00016932 0x00016932 0x0000001c Code RO 488 i.hal_gpio_init_output CVWL668T.lib(hal_gpio.o) + 0x0001694e 0x0001694e 0x00000002 PAD + 0x00016950 0x00016950 0x0000001c Code RO 489 i.hal_gpio_reg_eint_cb CVWL668T.lib(hal_gpio.o) + 0x0001696c 0x0001696c 0x00000050 Code RO 490 i.hal_gpio_set_ap_reset_int CVWL668T.lib(hal_gpio.o) + 0x000169bc 0x000169bc 0x00000060 Code RO 493 i.hal_gpio_set_mode CVWL668T.lib(hal_gpio.o) + 0x00016a1c 0x00016a1c 0x00000008 Code RO 494 i.hal_gpio_set_output_data CVWL668T.lib(hal_gpio.o) + 0x00016a24 0x00016a24 0x00000010 Code RO 688 i.hal_internal_sync_get_hight_performan_mode CVWL668T.lib(hal_internal_vsync.o) + 0x00016a34 0x00016a34 0x000001b4 Code RO 689 i.hal_internal_sync_input_resolution_change CVWL668T.lib(hal_internal_vsync.o) + 0x00016be8 0x00016be8 0x0000000c Code RO 690 i.hal_internal_sync_register_lcdc_cb CVWL668T.lib(hal_internal_vsync.o) + 0x00016bf4 0x00016bf4 0x00000020 Code RO 693 i.hal_internal_vsync_deinit CVWL668T.lib(hal_internal_vsync.o) + 0x00016c14 0x00016c14 0x0000000c Code RO 694 i.hal_internal_vsync_get_rx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016c20 0x00016c20 0x00000014 Code RO 695 i.hal_internal_vsync_get_sync_line CVWL668T.lib(hal_internal_vsync.o) + 0x00016c34 0x00016c34 0x0000000c Code RO 696 i.hal_internal_vsync_get_tx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016c40 0x00016c40 0x000000e8 Code RO 697 i.hal_internal_vsync_init_rx CVWL668T.lib(hal_internal_vsync.o) + 0x00016d28 0x00016d28 0x000000c8 Code RO 698 i.hal_internal_vsync_init_tx CVWL668T.lib(hal_internal_vsync.o) + 0x00016df0 0x00016df0 0x00000020 Code RO 699 i.hal_internal_vsync_set_rx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016e10 0x00016e10 0x000001ec Code RO 701 i.hal_internal_vsync_set_tear_mode CVWL668T.lib(hal_internal_vsync.o) + 0x00016ffc 0x00016ffc 0x00000058 Code RO 702 i.hal_internal_vsync_set_tx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00017054 0x00017054 0x0000006c Code RO 753 i.hal_intl_dcs_init_sw_fltr CVWL668T.lib(hal_internal_dcs.o) + 0x000170c0 0x000170c0 0x00000430 Code RO 755 i.hal_intl_dcs_rx_get_dcs_packet_data CVWL668T.lib(hal_internal_dcs.o) + 0x000174f0 0x000174f0 0x00000088 Code RO 756 i.hal_intl_dcs_rx_receive_packet CVWL668T.lib(hal_internal_dcs.o) + 0x00017578 0x00017578 0x00000174 Code RO 757 i.hal_intl_dcs_rx_receive_pps CVWL668T.lib(hal_internal_dcs.o) + 0x000176ec 0x000176ec 0x0000008c Code RO 758 i.hal_intl_dcs_set_auto_hw_filter CVWL668T.lib(hal_internal_dcs.o) + 0x00017778 0x00017778 0x0000002c Code RO 760 i.hal_intl_dcs_sw_filter_handle CVWL668T.lib(hal_internal_dcs.o) + 0x000177a4 0x000177a4 0x00000318 Code RO 781 i.hal_intl_fb_cal_fb_info CVWL668T.lib(hal_internal_fb.o) + 0x00017abc 0x00017abc 0x00000064 Code RO 782 i.hal_intl_fb_check_bandwidth CVWL668T.lib(hal_internal_fb.o) + 0x00017b20 0x00017b20 0x000000dc Code RO 783 i.hal_intl_fb_edge_resize CVWL668T.lib(hal_internal_fb.o) + 0x00017bfc 0x00017bfc 0x00000074 Code RO 784 i.hal_intl_fb_flow_control_adapter CVWL668T.lib(hal_internal_fb.o) + 0x00017c70 0x00017c70 0x0000000c Code RO 785 i.hal_intl_fb_get_memc_flow_mode CVWL668T.lib(hal_internal_fb.o) + 0x00017c7c 0x00017c7c 0x00000010 Code RO 786 i.hal_intl_fb_get_rx_fb_info CVWL668T.lib(hal_internal_fb.o) + 0x00017c8c 0x00017c8c 0x00000010 Code RO 787 i.hal_intl_fb_get_tx_fb_info CVWL668T.lib(hal_internal_fb.o) + 0x00017c9c 0x00017c9c 0x0000000c Code RO 788 i.hal_intl_fb_get_user_flow CVWL668T.lib(hal_internal_fb.o) + 0x00017ca8 0x00017ca8 0x00000028 Code RO 806 i.hal_intl_svs_deinit_rx CVWL668T.lib(hal_internal_svs.o) + 0x00017cd0 0x00017cd0 0x00000010 Code RO 807 i.hal_intl_svs_deinit_tx CVWL668T.lib(hal_internal_svs.o) + 0x00017ce0 0x00017ce0 0x00000024 Code RO 808 i.hal_intl_svs_handle CVWL668T.lib(hal_internal_svs.o) + 0x00017d04 0x00017d04 0x00000080 Code RO 809 i.hal_intl_svs_init_rx CVWL668T.lib(hal_internal_svs.o) + 0x00017d84 0x00017d84 0x00000014 Code RO 810 i.hal_intl_svs_init_tx CVWL668T.lib(hal_internal_svs.o) + 0x00017d98 0x00017d98 0x0000000c Code RO 812 i.hal_intl_svs_set_rx_vtt CVWL668T.lib(hal_internal_svs.o) + 0x00017da4 0x00017da4 0x00000048 Code RO 814 i.hal_intl_svs_update_rxbr_clk CVWL668T.lib(hal_internal_svs.o) + 0x00017dec 0x00017dec 0x00000070 Code RO 412 i.hal_lcdc_displayproc_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017e5c 0x00017e5c 0x0000003e Code RO 413 i.hal_lcdc_init_cfg CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017e9a 0x00017e9a 0x00000070 Code RO 414 i.hal_lcdc_init_clk CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017f0a 0x00017f0a 0x00000002 PAD + 0x00017f0c 0x00017f0c 0x00000128 Code RO 415 i.hal_lcdc_postproc_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018034 0x00018034 0x00000024 Code RO 416 i.hal_lcdc_start CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018058 0x00018058 0x0000003c Code RO 417 i.hal_lcdc_timinggen_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018094 0x00018094 0x000000e0 Code RO 418 i.hal_lcdc_upscaler_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018174 0x00018174 0x000000bc Code RO 420 i.hal_nonshadow_func_update CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018230 0x00018230 0x0000002a Code RO 567 i.hal_pwr_enter_deep_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x0001825a 0x0001825a 0x00000008 Code RO 568 i.hal_pwr_enter_normal_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x00018262 0x00018262 0x00000002 PAD + 0x00018264 0x00018264 0x00000064 Code RO 569 i.hal_pwr_enter_stop_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x000182c8 0x000182c8 0x0000000a Code RO 570 i.hal_pwr_exit_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x000182d2 0x000182d2 0x00000008 Code RO 572 i.hal_pwr_get_vcc_power_ready CVWL668T.lib(hal_pwr.o) + 0x000182da 0x000182da 0x00000008 Code RO 575 i.hal_pwr_ldo18s_en CVWL668T.lib(hal_pwr.o) + 0x000182e2 0x000182e2 0x00000008 Code RO 576 i.hal_pwr_ldo18s_set CVWL668T.lib(hal_pwr.o) + 0x000182ea 0x000182ea 0x00000008 Code RO 577 i.hal_pwr_set_main_power CVWL668T.lib(hal_pwr.o) + 0x000182f2 0x000182f2 0x00000008 Code RO 579 i.hal_pwr_set_sleep_mode_power CVWL668T.lib(hal_pwr.o) + 0x000182fa 0x000182fa 0x00000002 PAD + 0x000182fc 0x000182fc 0x00000064 Code RO 580 i.hal_pwr_set_stop_sleep_wakeup_pin CVWL668T.lib(hal_pwr.o) + 0x00018360 0x00018360 0x00000040 Code RO 521 i.hal_swire_deinit CVWL668T.lib(hal_swire.o) + 0x000183a0 0x000183a0 0x0000005c Code RO 522 i.hal_swire_enable CVWL668T.lib(hal_swire.o) + 0x000183fc 0x000183fc 0x00000058 Code RO 523 i.hal_swire_init CVWL668T.lib(hal_swire.o) + 0x00018454 0x00018454 0x00000024 Code RO 525 i.hal_swire_set_pulse CVWL668T.lib(hal_swire.o) + 0x00018478 0x00018478 0x00000040 Code RO 526 i.hal_swire_set_timer CVWL668T.lib(hal_swire.o) + 0x000184b8 0x000184b8 0x000000e4 Code RO 546 i.hal_system_init CVWL668T.lib(hal_system.o) + 0x0001859c 0x0001859c 0x00000050 Code RO 549 i.hal_system_updata_sysclk CVWL668T.lib(hal_system.o) + 0x000185ec 0x000185ec 0x00000030 Code RO 634 i.hal_timer_deinit CVWL668T.lib(hal_timer.o) + 0x0001861c 0x0001861c 0x0000001c Code RO 636 i.hal_timer_init CVWL668T.lib(hal_timer.o) + 0x00018638 0x00018638 0x00000008 Code RO 637 i.hal_timer_set_repeat CVWL668T.lib(hal_timer.o) + 0x00018640 0x00018640 0x00000030 Code RO 421 i.hal_tx_frame_rate_adjust CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018670 0x00018670 0x00000094 Code RO 660 i.hal_uart_init CVWL668T.lib(hal_uart.o) + 0x00018704 0x00018704 0x0000001c Code RO 663 i.hal_uart_send_blocking CVWL668T.lib(hal_uart.o) + 0x00018720 0x00018720 0x00000018 Code RO 422 i.hal_vsync_func_update CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018738 0x00018738 0x000000e0 Code RO 704 i.hal_vsync_reset_lcdc_scaler CVWL668T.lib(hal_internal_vsync.o) + 0x00018818 0x00018818 0x00000038 Code RO 3 i.main main.o + 0x00018850 0x00018850 0x00000098 Code RO 108 i.pps_update_handle honor90pro_demo.o + 0x000188e8 0x000188e8 0x000002f4 Code RO 705 i.rxbr_irq1_callback CVWL668T.lib(hal_internal_vsync.o) + 0x00018bdc 0x00018bdc 0x00000044 Code RO 706 i.soft_double_buffer_update CVWL668T.lib(hal_internal_vsync.o) + 0x00018c20 0x00018c20 0x0000006c Code RO 707 i.soft_gen_te CVWL668T.lib(hal_internal_vsync.o) + 0x00018c8c 0x00018c8c 0x000000e0 Code RO 708 i.soft_gen_te_double_buffer CVWL668T.lib(hal_internal_vsync.o) + 0x00018d6c 0x00018d6c 0x00000038 Code RO 709 i.soft_pro_motion_init CVWL668T.lib(hal_internal_vsync.o) + 0x00018da4 0x00018da4 0x00000024 Code RO 710 i.soft_tear_adjust_line CVWL668T.lib(hal_internal_vsync.o) + 0x00018dc8 0x00018dc8 0x00000018 Code RO 583 i.stop_sleep_cb CVWL668T.lib(hal_pwr.o) + 0x00018de0 0x00018de0 0x000000ac Code RO 815 i.svs_direct_mode_setting CVWL668T.lib(hal_internal_svs.o) + 0x00018e8c 0x00018e8c 0x0000001c Code RO 816 i.svs_get_rel_intv CVWL668T.lib(hal_internal_svs.o) + 0x00018ea8 0x00018ea8 0x000000b0 Code RO 817 i.svs_sync_handle CVWL668T.lib(hal_internal_svs.o) + 0x00018f58 0x00018f58 0x000000cc Code RO 818 i.svs_wait_fr_stab CVWL668T.lib(hal_internal_svs.o) + 0x00019024 0x00019024 0x0000010c Code RO 819 i.svs_wait_start CVWL668T.lib(hal_internal_svs.o) + 0x00019130 0x00019130 0x00000034 Code RO 619 i.tau_log_init CVWL668T.lib(tau_log.o) + 0x00019164 0x00019164 0x00000084 Code RO 620 i.tau_log_printf CVWL668T.lib(tau_log.o) + 0x000191e8 0x000191e8 0x00000076 Code RO 621 i.tau_log_push_log CVWL668T.lib(tau_log.o) + 0x0001925e 0x0001925e 0x00000002 PAD + 0x00019260 0x00019260 0x000000b4 Code RO 711 i.vidc_callback CVWL668T.lib(hal_internal_vsync.o) + 0x00019314 0x00019314 0x00000118 Code RO 712 i.vpre_err_reset CVWL668T.lib(hal_internal_vsync.o) + 0x0001942c 0x0001942c 0x000049bc Data RO 109 .constdata honor90pro_demo.o + 0x0001dde8 0x0001dde8 0x00000028 Data RO 324 .constdata CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001de10 0x0001de10 0x0000001c Data RO 425 .constdata CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0001de2c 0x0001de2c 0x000000b6 Data RO 498 .constdata CVWL668T.lib(hal_gpio.o) + 0x0001dee2 0x0001dee2 0x00000002 PAD + 0x0001dee4 0x0001dee4 0x00000030 Data RO 665 .constdata CVWL668T.lib(hal_uart.o) + 0x0001df14 0x0001df14 0x00000010 Data RO 1766 .constdata CVWL668T.lib(drv_uart.o) + 0x0001df24 0x0001df24 0x00000087 Data RO 325 .conststring CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001dfab 0x0001dfab 0x00000001 PAD + 0x0001dfac 0x0001dfac 0x00000090 Data RO 714 .conststring CVWL668T.lib(hal_internal_vsync.o) + 0x0001e03c 0x0001e03c 0x00000046 Data RO 763 .conststring CVWL668T.lib(hal_internal_dcs.o) + 0x0001e082 0x0001e082 0x00000002 PAD + 0x0001e084 0x0001e084 0x00000020 Data RO 2180 Region$$Table anon$$obj.o + + + Execution Region RW_IRAM1 (Exec base: 0x00070000, Load base: 0x0001e0a4, Size: 0x00003078, Max: 0x00008000, ABSOLUTE, COMPRESSED[0x000000f4]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070000 COMPRESSED 0x00000010 Data RW 110 .data honor90pro_demo.o + 0x00070010 COMPRESSED 0x00000030 Data RW 326 .data CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00070040 COMPRESSED 0x0000005c Data RW 426 .data CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0007009c COMPRESSED 0x00000002 Data RW 528 .data CVWL668T.lib(hal_swire.o) + 0x0007009e COMPRESSED 0x00000002 PAD + 0x000700a0 COMPRESSED 0x00000008 Data RW 584 .data CVWL668T.lib(hal_pwr.o) + 0x000700a8 COMPRESSED 0x00000001 Data RW 624 .data CVWL668T.lib(tau_log.o) + 0x000700a9 COMPRESSED 0x00000003 PAD + 0x000700ac COMPRESSED 0x00000018 Data RW 666 .data CVWL668T.lib(hal_uart.o) + 0x000700c4 COMPRESSED 0x00000010 Data RW 715 .data CVWL668T.lib(hal_internal_vsync.o) + 0x000700d4 COMPRESSED 0x00000024 Data RW 764 .data CVWL668T.lib(hal_internal_dcs.o) + 0x000700f8 COMPRESSED 0x0000000c Data RW 848 .data CVWL668T.lib(drv_common.o) + 0x00070104 COMPRESSED 0x00000001 Data RW 849 .data CVWL668T.lib(drv_common.o) + 0x00070105 COMPRESSED 0x00000003 PAD + 0x00070108 COMPRESSED 0x00000004 Data RW 935 .data CVWL668T.lib(drv_gpio.o) + 0x0007010c COMPRESSED 0x00000004 Data RW 1087 .data CVWL668T.lib(drv_swire.o) + 0x00070110 COMPRESSED 0x00000050 Data RW 1135 .data CVWL668T.lib(drv_timer.o) + 0x00070160 COMPRESSED 0x00000004 Data RW 1176 .data CVWL668T.lib(drv_se.o) + 0x00070164 COMPRESSED 0x00000001 Data RW 1216 .data CVWL668T.lib(drv_dsi_rx.o) + 0x00070165 COMPRESSED 0x00000003 PAD + 0x00070168 COMPRESSED 0x00000008 Data RW 1551 .data CVWL668T.lib(drv_rxbr.o) + 0x00070170 COMPRESSED 0x00000004 Data RW 1638 .data CVWL668T.lib(drv_vidc.o) + 0x00070174 COMPRESSED 0x00000190 Data RW 1713 .data CVWL668T.lib(drv_dma.o) + 0x00070304 COMPRESSED 0x00000004 Data RW 2156 .data mc_p.l(stdout.o) + 0x00070308 - 0x000000d0 Zero RW 323 .bss CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000703d8 - 0x000000b8 Zero RW 424 .bss CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00070490 - 0x00000100 Zero RW 623 .bss CVWL668T.lib(tau_log.o) + 0x00070590 - 0x00000044 Zero RW 713 .bss CVWL668T.lib(hal_internal_vsync.o) + 0x000705d4 - 0x00000800 Zero RW 761 .bss CVWL668T.lib(hal_internal_dcs.o) + 0x00070dd4 - 0x000000ff Zero RW 762 .bss CVWL668T.lib(hal_internal_dcs.o) + 0x00070ed3 COMPRESSED 0x00000001 PAD + 0x00070ed4 - 0x00000044 Zero RW 790 .bss CVWL668T.lib(hal_internal_fb.o) + 0x00070f18 - 0x00000044 Zero RW 820 .bss CVWL668T.lib(hal_internal_svs.o) + 0x00070f5c - 0x00000040 Zero RW 934 .bss CVWL668T.lib(drv_gpio.o) + 0x00070f9c - 0x0000106c Zero RW 1159 .bss CVWL668T.lib(dcs_packet_fifo.o) + 0x00072008 - 0x00000010 Zero RW 1711 .bss CVWL668T.lib(drv_dma.o) + 0x00072018 - 0x00000060 Zero RW 1765 .bss CVWL668T.lib(drv_uart.o) + 0x00072078 - 0x00001000 Zero RW 273 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 24 4 0 0 0 577 board.o + 2172 706 18876 16 0 30206 honor90pro_demo.o + 56 34 0 0 0 10455 main.o + 120 18 192 0 4096 2140 startup_armcm0.o + + ---------------------------------------------------------------------- + 2376 762 19100 16 4096 43378 Object Totals + 0 0 32 0 0 0 (incl. Generated) + 4 0 0 0 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4204 252 dcs_packet_fifo.o + 104 62 28 13 0 192 drv_common.o + 536 90 0 0 0 792 drv_crgu.o + 136 22 0 400 16 196 drv_dma.o + 144 34 0 0 0 248 drv_dsc_dec.o + 1904 682 0 1 0 1340 drv_dsi_rx.o + 1704 306 0 0 0 2036 drv_dsi_tx.o + 148 0 0 0 0 260 drv_efuse.o + 296 40 0 4 64 1000 drv_gpio.o + 1080 166 0 0 0 1620 drv_lcdc.o + 658 104 0 0 0 1240 drv_memc.o + 40 0 0 0 0 120 drv_phy_common.o + 684 156 0 0 0 844 drv_pwr.o + 838 116 0 8 0 1196 drv_rxbr.o + 972 266 0 4 0 488 drv_se.o + 264 54 0 4 0 560 drv_swire.o + 220 40 0 0 0 428 drv_sys_cfg.o + 366 38 0 80 0 816 drv_timer.o + 1172 54 16 0 96 980 drv_uart.o + 824 152 0 4 0 1700 drv_vidc.o + 2966 236 175 48 208 1400 hal_dsi_rx_ctrl.o + 4330 338 50 92 184 2212 hal_dsi_tx_ctrl.o + 440 32 182 0 0 688 hal_gpio.o + 2140 506 70 36 2303 652 hal_internal_dcs.o + 1348 58 0 0 68 700 hal_internal_fb.o + 1172 182 0 0 68 840 hal_internal_svs.o + 3840 802 144 16 68 1688 hal_internal_vsync.o + 324 32 0 8 0 752 hal_pwr.o + 344 32 0 2 0 348 hal_swire.o + 308 56 0 0 0 136 hal_system.o + 84 0 0 0 0 204 hal_timer.o + 176 18 48 24 0 144 hal_uart.o + 68 4 0 0 0 136 tau_delay.o + 354 30 16 1 256 320 tau_log.o + 200 20 0 0 0 76 ceil.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 26 0 0 0 0 72 memcmp.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 14 0 0 0 0 60 strlen.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfcmple.o + 20 0 0 0 0 68 cfrcmple.o + 56 0 0 0 0 68 d2f.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 40 0 0 0 0 60 ffixui.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 35296 4922 736 760 7536 29588 Library Totals + 30 0 7 11 1 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 30200 4740 729 745 7535 26528 CVWL668T.lib + 200 20 0 0 0 76 m_ps.l + 2866 120 0 4 0 1336 mc_p.l + 2000 42 0 0 0 1648 mf_p.l + + ---------------------------------------------------------------------- + 35296 4922 736 760 7536 29588 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 37672 5684 19836 776 11632 53366 Grand Totals + 37672 5684 19836 244 11632 53366 ELF Image Totals (compressed) + 37672 5684 19836 244 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 57508 ( 56.16kB) + Total RW Size (RW Data + ZI Data) 12408 ( 12.12kB) + Total ROM Size (Code + RO Data + RW Data) 57752 ( 56.40kB) + +============================================================================== + diff --git a/project/WL668T/Listings/WL668T_Note11Pro_3520_20240320.map b/project/WL668T/Listings/WL668T_Note11Pro_3520_20240320.map new file mode 100644 index 0000000..bb88ade --- /dev/null +++ b/project/WL668T/Listings/WL668T_Note11Pro_3520_20240320.map @@ -0,0 +1,4034 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to rm_note11pro_demo.o(i.Note11Pro_demo) for Note11Pro_demo + main.o(i.main) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + rm_note11pro_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + rm_note11pro_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + rm_note11pro_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + rm_note11pro_demo.o(i.Note11Pro_demo) refers to hal_pwr.o(i.hal_pwr_set_main_power) for hal_pwr_set_main_power + rm_note11pro_demo.o(i.Note11Pro_demo) refers to rm_note11pro_demo.o(i.app_display_init) for app_display_init + rm_note11pro_demo.o(i.Note11Pro_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) for hal_dsi_rx_ctrl_dcs_async_handler + rm_note11pro_demo.o(i.Note11Pro_demo) refers to rm_note11pro_demo.o(i.app_system_suspend) for app_system_suspend + rm_note11pro_demo.o(i.Note11Pro_demo) refers to hal_pwr.o(i.hal_pwr_exit_sleep_mode) for hal_pwr_exit_sleep_mode + rm_note11pro_demo.o(i.Note11Pro_demo) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.Note11Pro_demo) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + rm_note11pro_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + rm_note11pro_demo.o(i.ap_dcs_read) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_dcs_set_display_off) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_dcs_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + rm_note11pro_demo.o(i.ap_dcs_set_display_off) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_dcs_set_display_on) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_dcs_set_display_on) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) for hal_dsi_tx_ctrl_set_tear_mode + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_swire.o(i.hal_swire_enable) for hal_swire_enable + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) for ap_rstn_pull_down_cb + rm_note11pro_demo.o(i.ap_dcs_set_exit_sleep_mode) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_rstn_pull_high_cb) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + rm_note11pro_demo.o(i.ap_rstn_pull_high_cb) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_set_backlight) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_set_backlight) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + rm_note11pro_demo.o(i.ap_update_frame_rate) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) for hal_dsi_rx_ctrl_toggle_input_frame_rate + rm_note11pro_demo.o(i.ap_update_frame_rate) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_update_frame_rate) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_update_pps_9E) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_update_pps_9E) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + rm_note11pro_demo.o(i.ap_update_pps_9E) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + rm_note11pro_demo.o(i.ap_update_pps_9E) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_update_pps_9E) refers to rm_note11pro_demo.o(.conststring) for .conststring + rm_note11pro_demo.o(i.app_display_init) refers to rm_note11pro_demo.o(i.app_mipi_rx_init) for app_mipi_rx_init + rm_note11pro_demo.o(i.app_display_init) refers to hal_pwr.o(i.hal_pwr_get_vcc_power_ready) for hal_pwr_get_vcc_power_ready + rm_note11pro_demo.o(i.app_display_init) refers to rm_note11pro_demo.o(i.app_gpio_init) for app_gpio_init + rm_note11pro_demo.o(i.app_display_init) refers to hal_swire.o(i.hal_swire_init) for hal_swire_init + rm_note11pro_demo.o(i.app_display_init) refers to hal_swire.o(i.hal_swire_set_timer) for hal_swire_set_timer + rm_note11pro_demo.o(i.app_display_init) refers to rm_note11pro_demo.o(i.app_mipi_tx_init) for app_mipi_tx_init + rm_note11pro_demo.o(i.app_display_init) refers to rm_note11pro_demo.o(i.app_mipi_tx_start) for app_mipi_tx_start + rm_note11pro_demo.o(i.app_gpio_init) refers to memcpya.o(.text) for __aeabi_memcpy4 + rm_note11pro_demo.o(i.app_gpio_init) refers to hal_gpio.o(i.hal_gpio_config_pad) for hal_gpio_config_pad + rm_note11pro_demo.o(i.app_gpio_init) refers to rm_note11pro_demo.o(.constdata) for .constdata + rm_note11pro_demo.o(i.app_init_panel) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + rm_note11pro_demo.o(i.app_init_panel) refers to tau_delay.o(i.delayMs) for delayMs + rm_note11pro_demo.o(i.app_init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + rm_note11pro_demo.o(i.app_init_panel) refers to tau_delay.o(i.delayUs) for delayUs + rm_note11pro_demo.o(i.app_init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + rm_note11pro_demo.o(i.app_init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + rm_note11pro_demo.o(i.app_init_panel) refers to hal_swire.o(i.hal_swire_enable) for hal_swire_enable + rm_note11pro_demo.o(i.app_init_panel) refers to hal_swire.o(i.hal_swire_set_pulse) for hal_swire_set_pulse + rm_note11pro_demo.o(i.app_init_panel) refers to rm_note11pro_demo.o(.constdata) for .constdata + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) for hal_dsi_rx_ctrl_set_check_crc + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to memcpya.o(.text) for __aeabi_memcpy4 + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to rm_note11pro_demo.o(.constdata) for .constdata + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to rm_note11pro_demo.o(i.ap_dcs_read) for ap_dcs_read + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to rm_note11pro_demo.o(i.pps_update_handle) for pps_update_handle + rm_note11pro_demo.o(i.app_mipi_tx_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + rm_note11pro_demo.o(i.app_mipi_tx_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + rm_note11pro_demo.o(i.app_mipi_tx_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + rm_note11pro_demo.o(i.app_mipi_tx_init) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to rm_note11pro_demo.o(i.app_init_panel) for app_init_panel + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to tau_delay.o(i.delayMs) for delayMs + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_swire.o(i.hal_swire_set_pulse) for hal_swire_set_pulse + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to rm_note11pro_demo.o(i.app_tx_cmd_panel_te_cb) for app_tx_cmd_panel_te_cb + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to rm_note11pro_demo.o(i.Note11Pro_demo) for i.Note11Pro_demo + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_set_sleep_mode_power) for hal_pwr_set_sleep_mode_power + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) for hal_pwr_enter_deep_sleep_mode + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) for hal_pwr_enter_normal_sleep_mode + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) for hal_pwr_set_stop_sleep_wakeup_pin + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) for hal_pwr_enter_stop_sleep_mode + rm_note11pro_demo.o(i.app_system_suspend) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.app_system_suspend) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.app_system_suspend) refers to rm_note11pro_demo.o(i.ap_rstn_pull_high_cb) for ap_rstn_pull_high_cb + rm_note11pro_demo.o(i.app_tx_cmd_panel_te_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame) for hal_dsi_tx_ctrl_gen_a_frame + rm_note11pro_demo.o(i.app_tx_cmd_panel_te_cb) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.pps_update_handle) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) for hal_dsi_tx_ctrl_set_tear_mode + rm_note11pro_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) for hal_dsi_rx_ctrl_get_compressen_en + rm_note11pro_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + rm_note11pro_demo.o(i.pps_update_handle) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.pps_update_handle) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_dcs_set_display_on) for ap_dcs_set_display_on + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_dcs_set_display_off) for ap_dcs_set_display_off + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_update_pps_9E) for ap_update_pps_9E + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_set_backlight) for ap_set_backlight + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) for ap_dcs_set_enter_sleep_mode + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_dcs_set_exit_sleep_mode) for ap_dcs_set_exit_sleep_mode + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to tau_log.o(i.tau_log_init) for tau_log_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to drv_common.o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to drv_common.o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to drv_vidc.o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to hal_internal_vsync.o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_memc.o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to hal_internal_dcs.o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_dma.o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_uart.o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_rxbr.o(i.VPRE1_IRQn_Handler) for VPRE1_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_swire.o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_md) for drv_rxbr_set_ack_pkt_md + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_lpdt_fifo_status) for drv_dsi_rx_get_lpdt_fifo_status + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to hal_dsi_rx_ctrl.o(i.swap_uint16_t) for swap_uint16_t + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex) for hal_dsi_rx_ctrl_set_pixel_data_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_rxbr.o(i.drv_rxbr_swpxl_clr) for drv_rxbr_swpxl_clr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_rxbr.o(i.drv_rxbr_set_swpxl_data) for drv_rxbr_set_swpxl_data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) for hal_dsi_rx_ctrl_set_rx_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.constdata) for .constdata + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_force_video_crtl) refers to drv_dsi_rx.o(i.drv_dsi_rx_force_video_crtl) for drv_dsi_rx_force_video_crtl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_cap_pixel_color) refers to drv_vidc.o(i.drv_vidc_get_status2) for drv_vidc_get_status2 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_irqen) for drv_dsc_dec_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_se.o(i.drv_se_start_rx) for drv_se_start_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_pwr.o(i.drv_pwr_set_pll_clk) for drv_pwr_set_pll_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_clk) for drv_crgu_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_clk) for drv_crgu_set_dsc_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_clk) for drv_crgu_set_vidc_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_clk) for drv_crgu_set_fb_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en) for drv_dsi_rx_set_ddi_crc_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt) for drv_dsi_rx_set_ipi_ycbcr_frmt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en) for drv_dsi_rx_set_tear_resp_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) for drv_dsi_rx_set_check_crc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_circ_mode_enable) for drv_memc_set_circ_mode_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_pu_thres) for drv_memc_set_ltpo_pu_thres + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) for hal_intl_dcs_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_circ_mode_enable) for drv_vidc_set_circ_mode_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dither_config) for drv_vidc_set_dither_config + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_vintp_config) for drv_vidc_set_vintp_config + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_honly_hinitr) for drv_vidc_set_honly_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_honly_hinitb) for drv_vidc_set_honly_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_honly_hcoef0) for drv_vidc_set_honly_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.constdata) for .constdata + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to hal_internal_vsync.o(i.hal_internal_sync_register_rx_callback) for hal_internal_sync_register_rx_callback + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to drv_vidc.o(i.drv_vidc_set_irq_line) for drv_vidc_set_irq_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_write_cmd_entry) refers to hal_internal_dcs.o(i.hal_intl_dcs_register_write_cmd_entry) for hal_intl_dcs_register_write_cmd_entry + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_response) for drv_rxbr_set_cmd_response + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) for hal_intl_dcs_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cap_pixel_pos) refers to drv_vidc.o(i.drv_vidc_debug_cap_pixel) for drv_vidc_debug_cap_pixel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) for drv_dsi_rx_set_check_crc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_log_level) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_drv_log_level) for drv_dsi_rx_set_drv_log_level + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to drv_rxbr.o(i.drv_rxbr_sw_reset) for drv_rxbr_sw_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex) refers to drv_rxbr.o(i.drv_rxbr_sw_reset) for drv_rxbr_sw_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) for hal_intl_svs_update_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_clk) for drv_crgu_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) for hal_internal_vsync_toggle_input_frame_rate + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) for hal_internal_sync_register_lcdc_cb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) for hal_internal_sync_set_fb_setting_manual + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame) refers to drv_lcdc.o(i.drv_lcdc_fixed_frame_output) for drv_lcdc_fixed_frame_output + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_get_tear_mode) for drv_memc_get_tear_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) for hal_internal_sync_register_lcdc_cb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) for hal_dsi_tx_init_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) for hal_dsi_tx_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) for hal_nonshadow_func_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) for hal_vsync_func_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_overwrite_enable) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_overwrite_enable) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_partial_disp_enable) refers to drv_lcdc.o(i.drv_lcdc_part_display_config) for drv_lcdc_part_display_config + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_partial_disp_enable) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_sync_line) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) for hal_dsi_tx_ctrl_draw_flick + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_cfg_int_frame) for drv_lcdc_cfg_int_frame + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_start) for hal_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_stop_display) for drv_lcdc_stop_display + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) for hal_dsi_tx_ctrl_read_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to drv_crgu.o(i.drv_crgu_set_dpi_clk) for drv_crgu_set_dpi_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) for hal_dsi_tx_timing_info_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) for hal_dsi_tx_cmd_mode_cal_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) for hal_dsi_tx_init_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) for hal_dsi_tx_vid_mode_cal_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) for hal_dsi_tx_init_vid_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) refers to d2f.o(.text) for __aeabi_d2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_internal_svs.o(i.hal_intl_svs_init_tx) for hal_intl_svs_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) for hal_tx_frame_rate_adjust + hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) refers to drv_lcdc.o(i.drv_lcdc_endianness_config) for drv_lcdc_endianness_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) refers to drv_lcdc.o(i.drv_lcdc_crop_hact) for drv_lcdc_crop_hact + hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) for hal_lcdc_postproc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) for hal_lcdc_displayproc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) for hal_intl_fb_get_tx_fb_info + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) for hal_lcdc_timinggen_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_clk) for drv_crgu_set_lcdc_clk + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) for hal_intl_fb_get_tx_fb_info + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) for hal_lcdc_upscaler_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_fldc_config) for drv_lcdc_fldc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_bcsa_config) for drv_lcdc_bcsa_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_fc_config) for drv_lcdc_fc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_edge_dect_config) for drv_lcdc_edge_dect_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_edge_enh_config) for drv_lcdc_edge_enh_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_vintp_mode_config) for drv_lcdc_vintp_mode_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_dith_config) for drv_lcdc_dith_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to drv_lcdc.o(i.drv_lcdc_vid_hw_start) for drv_lcdc_vid_hw_start + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to drv_lcdc.o(i.drv_lcdc_cmd_start) for drv_lcdc_cmd_start + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to drv_lcdc.o(i.drv_lcdc_set_prefetch) for drv_lcdc_set_prefetch + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for sg_pq_para + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_bcsa_config) for drv_lcdc_bcsa_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_fc_config) for drv_lcdc_fc_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_edge_dect_config) for drv_lcdc_edge_dect_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_edge_enh_config) for drv_lcdc_edge_enh_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for sg_pq_para + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to cfcmple.o(.text) for __aeabi_cfcmple + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_gpio.o(i.hal_gpio_config_pad) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_config_pad) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_gpio.o(i.hal_gpio_config_pad) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_high_impedance) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode) for drv_gpio_set_mode + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_swire.o(i.hal_swire_deinit) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + hal_swire.o(i.hal_swire_deinit) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_get_pulse_count) for drv_swire_get_pulse_count + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_set_trig_mode) for drv_swire_set_trig_mode + hal_swire.o(i.hal_swire_enable) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_enable) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock_div) for drv_crgu_set_clock_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_init) refers to drv_common.o(.data) for g_system_clock + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_set_pulse) refers to drv_swire.o(i.drv_swire_set_trig_mode) for drv_swire_set_trig_mode + hal_swire.o(i.hal_swire_set_pulse) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_set_pulse) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_set_timer) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer) for drv_sys_cfg_sel_swire_timer + hal_swire.o(i.hal_swire_set_timer) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + hal_swire.o(i.hal_swire_set_timer) refers to hal_timer.o(i.hal_timer_set_repeat) for hal_timer_set_repeat + hal_swire.o(i.hal_swire_set_timer) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_swire.o(i.hal_swire_set_timer) refers to drv_swire.o(i.drv_swire_set_trig_mode) for drv_swire_set_trig_mode + hal_swire.o(i.hal_swire_set_timer) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_set_waveform) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_set_waveform) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_set_waveform) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pll_clk) for drv_pwr_set_pll_clk + hal_system.o(i.hal_system_init) refers to hal_system.o(i.hal_system_updata_sysclk) for hal_system_updata_sysclk + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_reset_chip) refers to drv_crgu.o(i.drv_crgu_reset_chip) for drv_crgu_reset_chip + hal_system.o(i.hal_system_updata_sysclk) refers to drv_crgu.o(i.drv_crgu_set_ahb_clk) for drv_crgu_set_ahb_clk + hal_system.o(i.hal_system_updata_sysclk) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_updata_sysclk) refers to drv_common.o(.data) for g_system_delay_step + hal_pwr.o(i.hal_pwr_elvcc_close) refers to drv_pwr.o(i.drv_pwr_pwmled_electric_current) for drv_pwr_pwmled_electric_current + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_pwmled_electric_current) for drv_pwr_pwmled_electric_current + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_hv_ldo_mode_sel) for drv_pwr_hv_ldo_mode_sel + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_hv_ldo_mode_clock_sel) for drv_pwr_hv_ldo_mode_clock_sel + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_pwmled_driver_current_Big_step) for drv_pwr_pwmled_driver_current_Big_step + hal_pwr.o(i.hal_pwr_elvcc_vol_set) refers to drv_pwr.o(i.drv_pwr_hv_ldo_voltage_set) for drv_pwr_hv_ldo_voltage_set + hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_set_wakeup_type) for drv_pwr_set_wakeup_type + hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex) for drv_pwr_enter_sleep_mode_ex + hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) for drv_pwr_enter_stop_sleep_mode + hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) refers to hal_pwr.o(.data) for .data + hal_pwr.o(i.hal_pwr_exit_sleep_mode) refers to drv_pwr.o(i.drv_pwr_exit_sleep_mode) for drv_pwr_exit_sleep_mode + hal_pwr.o(i.hal_pwr_get_reset_flag) refers to drv_crgu.o(i.drv_crgu_get_all_reset_flag) for drv_crgu_get_all_reset_flag + hal_pwr.o(i.hal_pwr_get_reset_flag) refers to drv_pwr.o(i.drv_pwr_get_wakeflag) for drv_pwr_get_wakeflag + hal_pwr.o(i.hal_pwr_get_reset_flag) refers to drv_crgu.o(i.drv_crgu_clear_all_reset_flags) for drv_crgu_clear_all_reset_flags + hal_pwr.o(i.hal_pwr_get_vcc_power_ready) refers to drv_pwr.o(i.drv_pwr_get_power_ready_st) for drv_pwr_get_power_ready_st + hal_pwr.o(i.hal_pwr_ldo13s_en) refers to drv_pwr.o(i.drv_pwr_ldo13s_en) for drv_pwr_ldo13s_en + hal_pwr.o(i.hal_pwr_ldo13s_set) refers to drv_pwr.o(i.drv_pwr_ldo13s_set) for drv_pwr_ldo13s_set + hal_pwr.o(i.hal_pwr_ldo18s_en) refers to drv_pwr.o(i.drv_pwr_ldo18s_en) for drv_pwr_ldo18s_en + hal_pwr.o(i.hal_pwr_ldo18s_set) refers to drv_pwr.o(i.drv_pwr_ldo18s_set) for drv_pwr_ldo18s_set + hal_pwr.o(i.hal_pwr_set_main_power) refers to drv_pwr.o(i.drv_pwr_set_digit_power_sel) for drv_pwr_set_digit_power_sel + hal_pwr.o(i.hal_pwr_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd) for drv_pwr_set_pvd + hal_pwr.o(i.hal_pwr_set_sleep_mode_power) refers to drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) for drv_pwr_set_breath_screen_power_sel + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_pwr.o(.data) for .data + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_pwr.o(i.stop_sleep_cb) for stop_sleep_cb + hal_pwr.o(i.hal_pwr_set_vcc_enable) refers to drv_pwr.o(i.drv_pwr_charge_pump_en) for drv_pwr_charge_pump_en + hal_pwr.o(i.hal_pwr_sw_tp18_en) refers to drv_pwr.o(i.drv_pwr_sw_tp18_en) for drv_pwr_sw_tp18_en + hal_pwr.o(i.stop_sleep_cb) refers to hal_pwr.o(.data) for .data + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_delay.o(i.delayUs) refers to drv_common.o(.data) for g_system_delay_step + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_recv_blocking) for hal_uart_recv_blocking + tau_log.o(i.fgetc) refers to hal_system.o(i.hal_system_get_debug_state) for hal_system_get_debug_state + tau_log.o(i.fgetc) refers to hal_system.o(i.hal_system_clear_debug_state) for hal_system_clear_debug_state + tau_log.o(i.fgetc) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.fputc) refers to tau_log.o(i.tau_log_push_log) for tau_log_push_log + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_send_blocking) for hal_uart_send_blocking + tau_log.o(i.fputc) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.tau_log_init) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + tau_log.o(i.tau_log_init) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.tau_log_printf) refers to memseta.o(.text) for __aeabi_memclr4 + tau_log.o(i.tau_log_printf) refers to strlen.o(.text) for strlen + tau_log.o(i.tau_log_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.tau_log_printf) refers to tau_log.o(i.tau_log_push_log) for tau_log_push_log + tau_log.o(i.tau_log_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.tau_log_printf) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.tau_log_printf) refers to tau_log.o(.bss) for g_log_buf + tau_log.o(i.tau_log_push_log) refers to memcpya.o(.text) for __aeabi_memcpy + tau_log.o(i.tau_log_push_log) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(.ARM.__at_0x1101C) refers to tau_log.o(.bss) for g_log_buf + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_uart.o(i.hal_uart0_rx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart0_tx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart1_rx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart1_tx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.drv_uart_deinit) for drv_uart_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_uart.o(i.hal_uart_deinit) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_dma_path_close) refers to drv_dma.o(i.drv_dma_disable) for drv_dma_disable + hal_uart.o(i.hal_uart_dma_path_close) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_dma_path_close) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_apply_handle) for drv_dma_apply_handle + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_register_callback) for drv_dma_register_callback + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_enable_int) for drv_dma_enable_int + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_disable) for drv_dma_disable + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_set_mem_trans_info) for drv_dma_set_mem_trans_info + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_enable) for drv_dma_enable + hal_uart.o(i.hal_uart_dma_recv) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_uart.o(i.hal_uart_dma_recv) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_dma_recv) refers to hal_uart.o(i.hal_uart0_rx_dma_cb) for hal_uart0_rx_dma_cb + hal_uart.o(i.hal_uart_dma_recv) refers to hal_uart.o(i.hal_uart1_rx_dma_cb) for hal_uart1_rx_dma_cb + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_apply_handle) for drv_dma_apply_handle + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_register_callback) for drv_dma_register_callback + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_enable_int) for drv_dma_enable_int + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_disable) for drv_dma_disable + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_set_mem_trans_info) for drv_dma_set_mem_trans_info + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_enable) for drv_dma_enable + hal_uart.o(i.hal_uart_dma_send) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_uart.o(i.hal_uart_dma_send) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_dma_send) refers to hal_uart.o(i.hal_uart0_tx_dma_cb) for hal_uart0_tx_dma_cb + hal_uart.o(i.hal_uart_dma_send) refers to hal_uart.o(i.hal_uart1_tx_dma_cb) for hal_uart1_tx_dma_cb + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.drv_uart_init) for drv_uart_init + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.drv_uart_trans_create_handle) for drv_uart_trans_create_handle + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_recv_blocking) refers to drv_uart.o(i.drv_uart_recv_blocking) for drv_uart_recv_blocking + hal_uart.o(i.hal_uart_recv_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_recv_none_blocking) refers to drv_uart.o(i.drv_uart_recv_none_blocking) for drv_uart_recv_none_blocking + hal_uart.o(i.hal_uart_recv_none_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_send_blocking) refers to drv_uart.o(i.drv_uart_send_blocking) for drv_uart_send_blocking + hal_uart.o(i.hal_uart_send_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_send_none_blocking) refers to drv_uart.o(i.drv_uart_send_none_blocking) for drv_uart_send_none_blocking + hal_uart.o(i.hal_uart_send_none_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_internal_vsync.o(i.LCDC_IRQn_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) for hal_intl_fb_cal_fb_info + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) for hal_dsi_tx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_register_rx_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) for hal_intl_fb_set_fb_info_manual + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) for hal_intl_fb_cal_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_svs.o(i.hal_intl_svs_init_rx) for hal_intl_svs_init_rx + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) for hal_intl_dcs_init_sw_fltr + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_pro_motion_init) for soft_pro_motion_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) for hal_intl_fb_cal_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_svs.o(i.hal_intl_svs_deinit_rx) for hal_intl_svs_deinit_rx + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_svs.o(i.hal_intl_svs_set_sync_coef) for hal_intl_svs_set_sync_coef + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_memc.o(i.drv_memc_set_frame_drop_select) for drv_memc_set_frame_drop_select + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_set_tear_line) for drv_lcdc_set_tear_line + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to idiv.o(.text) for __aeabi_idivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_config_acc_command_mode) for drv_lcdc_config_acc_command_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_svs.o(i.hal_intl_svs_deinit_tx) for hal_intl_svs_deinit_tx + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.soft_pro_motion_init) for soft_pro_motion_init + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_svs.o(i.hal_intl_svs_set_input_frate) for hal_intl_svs_set_input_frate + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.soft_pro_motion_init) for soft_pro_motion_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.soft_double_buffer_update) for soft_double_buffer_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_svs.o(i.hal_intl_svs_handle) for hal_intl_svs_handle + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_lcdc.o(i.drv_lcdc_cmd_start) for drv_lcdc_cmd_start + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) for hal_intl_svs_set_rx_vtt + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_double_buffer_update) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(i.soft_tear_adjust_line) for soft_tear_adjust_line + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(i.soft_tear_adjust_line) for soft_tear_adjust_line + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_pro_motion_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.soft_pro_motion_init) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_pro_motion_init) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.soft_tear_adjust_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_int_source) for drv_vidc_get_int_source + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to hal_internal_dcs.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) for hal_intl_dcs_rx_receive_packet + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_crgu.o(i.drv_crgu_set_dsc_clk) for drv_crgu_set_dsc_clk + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to hal_internal_dcs.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) refers to hal_internal_dcs.o(.bss) for .bss + hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_register_write_cmd_entry) refers to hal_internal_dcs.o(.data) for .data + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) for hal_intl_dcs_sw_filter_handle + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) for hal_dsi_rx_ctrl_dcs_async_handler + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en) for drv_dsi_rx_get_ddi_crc_en + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_dcs.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_dcs.o(.data) for .data + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) for hal_intl_dcs_rx_get_dcs_packet_data + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) for hal_intl_dcs_rx_receive_pps + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to hal_internal_dcs.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to memcmp.o(.text) for memcmp + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to hal_internal_dcs.o(.conststring) for .conststring + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) refers to memseta.o(.text) for __aeabi_memset + hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_filter_regs) for drv_rxbr_set_filter_regs + hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) refers to hal_internal_dcs.o(.bss) for .bss + hal_internal_dcs.o(i.hal_intl_dcs_set_dcs_direct_mode) refers to hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) for hal_intl_dcs_set_auto_hw_filter + hal_internal_dcs.o(i.hal_intl_dcs_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) refers to hal_internal_dcs.o(.data) for .data + hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) refers to hal_internal_dcs.o(.bss) for .bss + hal_internal_dcs.o(.data) refers to hal_internal_dcs.o(.bss) for g_imm_buffer + hal_internal_fb.o(i.ha_intl_fb_check_pu_size) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.ha_intl_fb_check_pu_size) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) for hal_intl_fb_flow_control_adapter + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) for hal_intl_fb_check_bandwidth + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.ha_intl_fb_check_pu_size) for ha_intl_fb_check_pu_size + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.hal_intl_fb_edge_resize) for hal_intl_fb_edge_resize + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_fb.o(i.hal_intl_fb_edge_resize) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.hal_intl_fb_edge_resize) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_user_flow) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to hal_internal_fb.o(.conststring) for .conststring + hal_internal_svs.o(i.hal_intl_svs_deinit_rx) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.hal_intl_svs_deinit_rx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_deinit_rx) refers to hal_internal_svs.o(i.svs_wait_start) for svs_wait_start + hal_internal_svs.o(i.hal_intl_svs_deinit_tx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_handle) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) for hal_intl_svs_update_rxbr_clk + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_svs.o(i.svs_wait_start) for svs_wait_start + hal_internal_svs.o(i.hal_intl_svs_init_tx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_svs.o(i.svs_wait_start) for svs_wait_start + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_svs.o(i.svs_wait_fr_stab) for svs_wait_fr_stab + hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_set_sync_coef) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_direct_mode_setting) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_svs.o(i.svs_direct_mode_setting) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_internal_svs.o(i.svs_direct_mode_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_svs.o(i.svs_direct_mode_setting) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) for drv_rxbr_hline_rcv1_cfg + hal_internal_svs.o(i.svs_direct_mode_setting) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_get_rel_intv) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_svs.o(i.svs_get_rel_intv) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_sync_handle) refers to hal_internal_svs.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_svs.o(i.svs_sync_handle) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_svs.o(i.svs_sync_handle) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_svs.o(i.svs_sync_handle) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_svs.o(i.svs_sync_handle) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_svs.o(i.svs_sync_handle) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_svs.o(i.svs_sync_handle) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_svs.o(i.svs_sync_handle) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_wait_fr_stab) refers to hal_internal_svs.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_svs.o(i.svs_wait_fr_stab) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_svs.o(i.svs_wait_fr_stab) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_svs.o(i.svs_wait_fr_stab) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_svs.o(i.svs_wait_fr_stab) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_svs.o(i.svs_wait_fr_stab) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_svs.o(i.svs_wait_fr_stab) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_internal_svs.o(i.svs_wait_fr_stab) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_wait_fr_stab) refers to hal_internal_svs.o(i.svs_sync_handle) for svs_sync_handle + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_svs.o(i.svs_wait_start) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_internal_svs.o(i.svs_wait_start) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_svs.o(i.svs_wait_start) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_internal_svs.o(i.svs_wait_start) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_svs.o(i.svs_wait_start) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_svs.o(i.svs_wait_start) refers to ceil.o(i.ceil) for ceil + hal_internal_svs.o(i.svs_wait_start) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(i.svs_direct_mode_setting) for svs_direct_mode_setting + hal_internal_svs.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_svs.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) for drv_rxbr_hline_rcv1_cfg + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(i.svs_wait_fr_stab) for svs_wait_fr_stab + drv_common.o(i.HardFault_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_common.o(i.SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_se.o(i.drv_se_init) for drv_se_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_crgu.o(i.drv_crgu_get_rxbr_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_crgu.o(i.drv_crgu_get_system_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_se.o(i.drv_se_set_dsc) for drv_se_set_dsc + drv_gpio.o(i.AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.drv_gpio_handle_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_handle_int) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_pwr.o(i.drv_pwr_analog_pwm_en) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_elvcc_pwm_en) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_elvcc_pwm_en) refers to tau_delay.o(i.delayMs) for delayMs + drv_pwr.o(i.drv_pwr_enter_sleep_mode) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_enter_sleep_mode) refers to drv_pwr.o(i.drv_pwr_por_mode_flag) for drv_pwr_por_mode_flag + drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_exit_sleep_mode) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_hv_ldo_mode_clock_sel) refers to drv_pwr.o(i.drv_pwr_hv_ldo_10M_clock) for drv_pwr_hv_ldo_10M_clock + drv_pwr.o(i.drv_pwr_pwm_output_pwm_led) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_digit_power_sel) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_system_clk) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_wakeup_type) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_swire.o(i.SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_sys_cfg_sel_dma_req) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_timer.o(i.TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_compare_val) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_common.o(.data) for g_system_clock + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_se.o(i.drv_se_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_se.o(i.drv_se_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_se.o(i.drv_se_init) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_dsc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_dsc) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_lcdc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_lcdc) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_memc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_memc) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_rxbr) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_rxbr) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_vidc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_vidc) refers to drv_se.o(.data) for .data + drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) refers to drv_dsi_rx.o(.data) for .data + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_set_drv_log_level) refers to drv_dsi_rx.o(.data) for .data + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_lcdc.o(i.drv_lcdc_clear_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_cmd_start) refers to drv_se.o(i.drv_se_set_lcdc) for drv_se_set_lcdc + drv_lcdc.o(i.drv_lcdc_ctrl_flow) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + drv_lcdc.o(i.drv_lcdc_part_display_config) refers to drv_lcdc.o(i.drv_lcdc_pixel_value_config) for drv_lcdc_pixel_value_config + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_lcdc.o(i.drv_lcdc_clear_int) for drv_lcdc_clear_int + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_lcdc.o(i.drv_lcdc_vid_hw_start) refers to drv_se.o(i.drv_se_set_lcdc) for drv_se_set_lcdc + drv_memc.o(i.MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.drv_memc_rate_transfer_sel) refers to drv_se.o(i.drv_se_set_memc) for drv_se_set_memc + drv_memc.o(i.drv_memc_set_ltpo_mode) refers to drv_se.o(i.drv_se_set_memc) for drv_se_set_memc + drv_rxbr.o(i.VPRE1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.VPRE1_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_set_cmd_response) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_set_color_format) refers to drv_se.o(i.drv_se_set_rxbr) for drv_se_set_rxbr + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to tau_delay.o(i.delayMs) for delayMs + drv_rxbr.o(i.drv_rxbr_sw_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_rxbr.o(i.drv_rxbr_sw_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + drv_vidc.o(i.VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_set_src_parameter) refers to drv_se.o(i.drv_se_set_vidc) for drv_se_set_vidc + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(i.drv_dma_get_int_source) for drv_dma_get_int_source + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(i.drv_dma_clear_status) for drv_dma_clear_status + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(.data) for .data + drv_dma.o(i.drv_dma_apply_handle) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dma.o(i.drv_dma_apply_handle) refers to drv_dma.o(.data) for .data + drv_dma.o(i.drv_dma_apply_handle) refers to drv_dma.o(.constdata) for .constdata + drv_dma.o(i.drv_dma_deinit) refers to drv_dma.o(i.drv_dma_disable_int) for drv_dma_disable_int + drv_dma.o(i.drv_dma_disable_int) refers to drv_dma.o(i.drv_dma_int_list_delete) for drv_dma_int_list_delete + drv_dma.o(i.drv_dma_disable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_int) refers to drv_dma.o(i.drv_dma_int_list_inset) for drv_dma_int_list_inset + drv_dma.o(i.drv_dma_enable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_init) refers to drv_per_common.o(i.drv_per_set_clock) for drv_per_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_update_handle_setting) for drv_dma_update_handle_setting + drv_dma.o(i.drv_dma_int_list_delete) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_int_list_inset) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_update_handle_setting) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_dma_req) for drv_sys_cfg_sel_dma_req + drv_dma.o(i.drv_dma_update_req_by_default) refers to drv_dma.o(i.drv_dma_update_handle_setting) for drv_dma_update_handle_setting + drv_dma.o(i.drv_dma_update_req_by_default) refers to drv_dma.o(.constdata) for .constdata + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_int_trans_handle) for drv_uart_int_trans_handle + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_abort_recv) for drv_uart_abort_recv + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_abort_send) for drv_uart_abort_send + drv_uart.o(i.UART_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(i.drv_uart_reset_rx_fifo) for drv_uart_reset_rx_fifo + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(i.drv_uart_reset_tx_fifo) for drv_uart_reset_tx_fifo + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_deinit) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_deinit) refers to drv_uart.o(i.drv_uart_enable_clk) for drv_uart_enable_clk + drv_uart.o(i.drv_uart_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.drv_uart_deinit) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_enable_clk) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + drv_uart.o(i.drv_uart_enable_int) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_enable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.drv_uart_get_def_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.drv_uart_get_def_cfg) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.drv_uart_get_instance) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_enable_clk) for drv_uart_enable_clk + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_set_baud_rate) for drv_uart_set_baud_rate + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_enable_int) for drv_uart_enable_int + drv_uart.o(i.drv_uart_int_trans_handle) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_recv_none_blocking) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_recv_none_blocking) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_recv_none_blocking) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_reset_rx_fifo) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_reset_tx_fifo) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_send_none_blocking) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_send_none_blocking) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_send_none_blocking) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_set_baud_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.drv_uart_trans_create_handle) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_trans_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.drv_uart_trans_create_handle) refers to drv_uart.o(.bss) for .bss + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_pwr.o(i.drv_pwr_efuse_pd) for drv_pwr_efuse_pd + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_pwr.o(i.drv_pwr_efuse_pd) for drv_pwr_efuse_pd + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_efuse.o(i.drv_efuse_write_read_req_clear) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_efuse.o(i.drv_efuse_write_read_req_clear) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_per_common.o(i.drv_per_get_system_clk) refers to drv_crgu.o(i.drv_crgu_get_system_clk) for drv_crgu_get_system_clk + drv_per_common.o(i.drv_per_reset_module) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + drv_per_common.o(i.drv_per_set_clock) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + d2f.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + d2f.o(.text) refers to fepilogue.o(.text) for _float_round + cfcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing rm_note11pro_demo.o(.rev16_text), (4 bytes). + Removing rm_note11pro_demo.o(.revsh_text), (4 bytes). + Removing rm_note11pro_demo.o(i.Gpio_swire_output), (78 bytes). + Removing rm_note11pro_demo.o(.data), (1 bytes). + Removing rm_note11pro_demo.o(.data), (2 bytes). + Removing rm_note11pro_demo.o(.data), (4 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (220 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line), (604 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (320 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (256 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_force_video_crtl), (12 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_cap_pixel_color), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback), (66 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_write_cmd_entry), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack), (176 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cap_pixel_pos), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (32 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_log_level), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (240 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex), (392 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (72 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.swap_uint16_t), (10 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode), (120 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick), (244 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_get_disp_line), (12 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_overwrite_enable), (22 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_partial_disp_enable), (70 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (128 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (32 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm), (8 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_sync_line), (36 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (12 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (52 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera), (68 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update), (16 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_input_data), (18 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (40 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (44 bytes). + Removing hal_gpio.o(i.hal_gpio_set_high_impedance), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_pull_state), (72 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (52 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (52 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (22 bytes). + Removing hal_swire.o(i.hal_swire_set_waveform), (92 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (10 bytes). + Removing hal_pwr.o(.rev16_text), (4 bytes). + Removing hal_pwr.o(.revsh_text), (4 bytes). + Removing hal_pwr.o(i.hal_pwr_elvcc_close), (10 bytes). + Removing hal_pwr.o(i.hal_pwr_elvcc_ldo_en), (46 bytes). + Removing hal_pwr.o(i.hal_pwr_elvcc_vol_set), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_get_reset_flag), (66 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo13s_en), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo13s_set), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo18s_en), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo18s_set), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_set_pvd), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_set_vcc_enable), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_sw_tp18_en), (8 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (72 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_start), (48 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (42 bytes). + Removing hal_timer.o(i.hal_timer_stop), (40 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart0_rx_dma_cb), (20 bytes). + Removing hal_uart.o(i.hal_uart0_tx_dma_cb), (36 bytes). + Removing hal_uart.o(i.hal_uart1_rx_dma_cb), (20 bytes). + Removing hal_uart.o(i.hal_uart1_tx_dma_cb), (36 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (48 bytes). + Removing hal_uart.o(i.hal_uart_dma_path_close), (92 bytes). + Removing hal_uart.o(i.hal_uart_dma_recv), (276 bytes). + Removing hal_uart.o(i.hal_uart_dma_send), (280 bytes). + Removing hal_uart.o(i.hal_uart_recv_blocking), (28 bytes). + Removing hal_uart.o(i.hal_uart_recv_none_blocking), (28 bytes). + Removing hal_uart.o(i.hal_uart_send_none_blocking), (28 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (2 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_register_rx_callback), (28 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (28 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line), (60 bytes). + Removing hal_internal_vsync.o(.data), (4 bytes). + Removing hal_internal_dcs.o(.rev16_text), (4 bytes). + Removing hal_internal_dcs.o(.revsh_text), (4 bytes). + Removing hal_internal_dcs.o(i.hal_intl_dcs_register_write_cmd_entry), (12 bytes). + Removing hal_internal_dcs.o(i.hal_intl_dcs_set_dcs_direct_mode), (44 bytes). + Removing hal_internal_fb.o(.rev16_text), (4 bytes). + Removing hal_internal_fb.o(.revsh_text), (4 bytes). + Removing hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual), (480 bytes). + Removing hal_internal_fb.o(.conststring), (152 bytes). + Removing hal_internal_svs.o(.rev16_text), (4 bytes). + Removing hal_internal_svs.o(.revsh_text), (4 bytes). + Removing hal_internal_svs.o(i.hal_intl_svs_set_sync_coef), (12 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_get_all_reset_flag), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (104 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_clock_src), (16 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_attribute), (16 bytes). + Removing drv_gpio.o(i.drv_gpio_get_input_data), (24 bytes). + Removing drv_gpio.o(i.drv_gpio_set_attribute), (28 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_10bit_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_analog_pwm_en), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_charge_pump_en), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_close_iov18_tp18), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_dsc_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_elvcc_pwm_en), (124 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_sleep_mode), (152 bytes). + Removing drv_pwr.o(i.drv_pwr_exit_sleep_mode_ex), (40 bytes). + Removing drv_pwr.o(i.drv_pwr_fb_pd), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_get_wakeflag), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_get_write_lock_st), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_hf_frm_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_10M_clock), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_mode_clock_sel), (60 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_mode_sel), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_voltage_set), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo11d_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo13s_en), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo13s_set), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo15_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo18s_en), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo18s_set), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_ltpo_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_osc32k_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_osc80m_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_p3k_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_por_mode_flag), (32 bytes). + Removing drv_pwr.o(i.drv_pwr_power_in), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_power_ready_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_power_sel), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_pwm_output_pwm_led), (56 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_driver_current_Big_step), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_driver_current_small_step), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_electric_current), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_open_drain), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_ram_pd_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_read_boot_chipst), (12 bytes). + Removing drv_pwr.o(i.drv_pwr_read_chipcfg), (12 bytes). + Removing drv_pwr.o(i.drv_pwr_rgbr_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_set_ap_rst_mode), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_set_ldo11_mode), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_set_ldo15_mode), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_set_pvd), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_set_pvd_mode), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_set_system_clk), (32 bytes). + Removing drv_pwr.o(i.drv_pwr_sw_tp18_en), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_wakeflag_get), (16 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_sel_dma_req), (128 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing drv_timer.o(i.drv_timer_register_callback), (20 bytes). + Removing dcs_packet_fifo.o(.rev16_text), (4 bytes). + Removing dcs_packet_fifo.o(.revsh_text), (4 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_se.o(.rev16_text), (4 bytes). + Removing drv_se.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_force_video_crtl), (28 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_lpdt_fifo_status), (16 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (68 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (12 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (24 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_drv_log_level), (12 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (16 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (24 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (16 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (68 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (296 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (228 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (32 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (100 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (20 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_clear), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_lock), (32 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (16 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_clear_irq), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_dpisignal_output_ctrl), (44 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_dpbuf_num), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_dpi_status), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_frame_clk_count), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_int_en_status), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_int_status), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_line_status), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_rgb2pen_subpixel), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_part_display_config), (52 bytes). + Removing drv_lcdc.o(i.drv_lcdc_pixel_value_config), (32 bytes). + Removing drv_lcdc.o(i.drv_lcdc_rd_st_line_config), (28 bytes). + Removing drv_lcdc.o(i.drv_lcdc_software_reset), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_vid_sw_start), (56 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (36 bytes). + Removing drv_memc.o(i.drv_memc_set_double_buffer_reverse), (24 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_pri), (44 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_inten), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (24 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (24 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (24 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_clr_swp_cnt), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_col_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_frame_data_interval), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_hline_dcat), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_page_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_swpxl_cnt), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_register_irq0_callback), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_ack_pkt_md), (28 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_cmd_filter), (320 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_cmd_response), (324 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (32 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_data_catch_hline), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_swpxl_data), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_tmpdith_bp), (28 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (32 bytes). + Removing drv_rxbr.o(i.drv_rxbr_sw_reset), (164 bytes). + Removing drv_rxbr.o(i.drv_rxbr_swpxl_clr), (32 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (28 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (36 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (28 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_apply_handle), (304 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (52 bytes). + Removing drv_dma.o(i.drv_dma_disable), (20 bytes). + Removing drv_dma.o(i.drv_dma_disable_int), (40 bytes). + Removing drv_dma.o(i.drv_dma_enable), (36 bytes). + Removing drv_dma.o(i.drv_dma_enable_int), (68 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_trans_num), (20 bytes). + Removing drv_dma.o(i.drv_dma_get_status), (20 bytes). + Removing drv_dma.o(i.drv_dma_init), (22 bytes). + Removing drv_dma.o(i.drv_dma_int_list_delete), (88 bytes). + Removing drv_dma.o(i.drv_dma_int_list_inset), (48 bytes). + Removing drv_dma.o(i.drv_dma_register_callback), (4 bytes). + Removing drv_dma.o(i.drv_dma_reset), (36 bytes). + Removing drv_dma.o(i.drv_dma_set_bitwide), (56 bytes). + Removing drv_dma.o(i.drv_dma_set_burst), (20 bytes). + Removing drv_dma.o(i.drv_dma_set_circle_mode), (40 bytes). + Removing drv_dma.o(i.drv_dma_set_dir), (40 bytes). + Removing drv_dma.o(i.drv_dma_set_increment), (72 bytes). + Removing drv_dma.o(i.drv_dma_set_mem_trans_info), (40 bytes). + Removing drv_dma.o(i.drv_dma_set_mem_trans_offset), (24 bytes). + Removing drv_dma.o(i.drv_dma_set_per_address), (20 bytes). + Removing drv_dma.o(i.drv_dma_set_priority), (32 bytes). + Removing drv_dma.o(i.drv_dma_set_tran_int_cnt), (28 bytes). + Removing drv_dma.o(i.drv_dma_update_handle_setting), (148 bytes). + Removing drv_dma.o(i.drv_dma_update_req_by_default), (40 bytes). + Removing drv_dma.o(.constdata), (136 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.drv_uart_deinit), (60 bytes). + Removing drv_uart.o(i.drv_uart_get_def_cfg), (72 bytes). + Removing drv_uart.o(i.drv_uart_recv_blocking), (48 bytes). + Removing drv_uart.o(i.drv_uart_recv_none_blocking), (60 bytes). + Removing drv_uart.o(i.drv_uart_send_none_blocking), (60 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (56 bytes). + Removing drv_efuse.o(i.drv_efuse_write_read_req_clear), (22 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_per_common.o(.rev16_text), (4 bytes). + Removing drv_per_common.o(.revsh_text), (4 bytes). + Removing drv_per_common.o(i.drv_per_get_system_clk), (8 bytes). + Removing drv_per_common.o(i.drv_per_reset_module), (14 bytes). + Removing drv_per_common.o(i.drv_per_set_clock), (14 bytes). + Removing fflti.o(.text), (22 bytes). + +368 unused section(s) (total 17777 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcmp.c 0x00000000 Number 0 memcmp.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/string/strlen.c 0x00000000 Number 0 strlen.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/d2f.c 0x00000000 Number 0 d2f.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_per_common.c 0x00000000 Number 0 drv_per_common.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_pwr.c 0x00000000 Number 0 hal_pwr.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_dcs.c 0x00000000 Number 0 hal_internal_dcs.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_fb.c 0x00000000 Number 0 hal_internal_fb.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_svs.c 0x00000000 Number 0 hal_internal_svs.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\driver\cuckoo\src\drv_se.c 0x00000000 Number 0 drv_se.o ABSOLUTE + ..\..\src\app\RM_Note11Pro\RM_Note11Pro_demo.c 0x00000000 Number 0 rm_note11pro_demo.o ABSOLUTE + ..\..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_per_common.c 0x00000000 Number 0 drv_per_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_pwr.c 0x00000000 Number 0 hal_pwr.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_dcs.c 0x00000000 Number 0 hal_internal_dcs.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_fb.c 0x00000000 Number 0 hal_internal_fb.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_svs.c 0x00000000 Number 0 hal_internal_svs.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\src\\drv_se.c 0x00000000 Number 0 drv_se.o ABSOLUTE + ..\\..\\src\\app\\RM_Note11Pro\\RM_Note11Pro_demo.c 0x00000000 Number 0 rm_note11pro_demo.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfcmple.s 0x00000000 Number 0 cfcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 strlen.o(.text) + .text 0x000101f6 Section 0 memcmp.o(.text) + .text 0x00010210 Section 0 fadd.o(.text) + .text 0x000102c2 Section 0 fmul.o(.text) + .text 0x0001033c Section 0 fdiv.o(.text) + .text 0x000103b8 Section 0 fscalb.o(.text) + .text 0x000103d0 Section 0 dadd.o(.text) + .text 0x00010534 Section 0 dmul.o(.text) + .text 0x00010604 Section 0 ffltui.o(.text) + .text 0x00010614 Section 0 dfltui.o(.text) + .text 0x00010630 Section 0 ffixui.o(.text) + .text 0x00010658 Section 0 dfixui.o(.text) + .text 0x00010694 Section 0 f2d.o(.text) + .text 0x000106bc Section 0 d2f.o(.text) + .text 0x000106f4 Section 20 cfcmple.o(.text) + .text 0x00010708 Section 20 cfrcmple.o(.text) + .text 0x0001071c Section 0 uldiv.o(.text) + .text 0x0001077c Section 0 llshl.o(.text) + .text 0x0001079c Section 0 llushr.o(.text) + .text 0x000107be Section 0 llsshr.o(.text) + .text 0x000107e4 Section 0 iusefp.o(.text) + .text 0x000107e4 Section 0 fepilogue.o(.text) + .text 0x00010866 Section 0 depilogue.o(.text) + .text 0x00010924 Section 0 ddiv.o(.text) + .text 0x00010a14 Section 0 dfixul.o(.text) + .text 0x00010a54 Section 40 cdrcmple.o(.text) + .text 0x00010a7c Section 36 init.o(.text) + .text 0x00010aa0 Section 0 __dczerorl2.o(.text) + i.AP_NRESET_IRQn_Handler 0x00010af8 Section 0 drv_gpio.o(i.AP_NRESET_IRQn_Handler) + i.DMA_IRQn_Handler 0x00010b14 Section 0 drv_dma.o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010b70 Section 0 drv_gpio.o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010b7a Section 0 drv_gpio.o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010b84 Section 0 drv_gpio.o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010b8e Section 0 drv_gpio.o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010b98 Section 0 drv_gpio.o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010ba2 Section 0 drv_gpio.o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010bac Section 0 drv_gpio.o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010bb6 Section 0 drv_gpio.o(i.EXTI_INT7_IRQn_Handler) + i.HardFault_Handler 0x00010bc0 Section 0 drv_common.o(i.HardFault_Handler) + i.LCDC_IRQn_Handler 0x00010c08 Section 0 hal_internal_vsync.o(i.LCDC_IRQn_Handler) + i.MEMC_IRQn_Handler 0x00010d08 Section 0 drv_memc.o(i.MEMC_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010da4 Section 0 drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) + i.Note11Pro_demo 0x00010e5c Section 0 rm_note11pro_demo.o(i.Note11Pro_demo) + i.SWIRE_IRQn_Handler 0x00010ed4 Section 0 drv_swire.o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00010f04 Section 0 drv_common.o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00010f1c Section 0 drv_timer.o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x00010f26 Section 0 drv_timer.o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00010f30 Section 0 drv_timer.o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x00010f3a Section 0 drv_timer.o(i.TIMER3_IRQn_Handler) + i.VIDC_IRQn_Handler 0x00010f44 Section 0 drv_vidc.o(i.VIDC_IRQn_Handler) + i.VPRE1_IRQn_Handler 0x00010f60 Section 0 drv_rxbr.o(i.VPRE1_IRQn_Handler) + i.VPRE_IRQn_Handler 0x00010f7c Section 0 hal_internal_dcs.o(i.VPRE_IRQn_Handler) + i.__NVIC_EnableIRQ 0x00010fe8 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x00010fe9 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + .ARM.__at_0x11000 0x00011000 Section 28 drv_common.o(.ARM.__at_0x11000) + .ARM.__at_0x1101C 0x0001101c Section 16 tau_log.o(.ARM.__at_0x1101C) + .ARM.__at_0x1102C 0x0001102c Section 22 hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) + i.MIPI_RX_IRQn_Handler 0x00011044 Section 0 drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) + i.UART_IRQn_Handler 0x000113a8 Section 0 drv_uart.o(i.UART_IRQn_Handler) + i.__0printf 0x00011528 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x00011548 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x0001156c Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x0001159a Section 0 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + i.__NVIC_DisableIRQ 0x000115b4 Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x000115b5 Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__scatterload_copy 0x000115d4 Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_null 0x000115e2 Section 2 handlers.o(i.__scatterload_null) + i.__scatterload_zeroinit 0x000115e4 Section 14 handlers.o(i.__scatterload_zeroinit) + i._fp_digits 0x000115f4 Section 0 printfa.o(i._fp_digits) + _fp_digits 0x000115f5 Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x00011768 Section 0 printfa.o(i._printf_core) + _printf_core 0x00011769 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011e54 Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011e55 Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011e74 Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011e75 Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011ea0 Section 0 printfa.o(i._sputc) + _sputc 0x00011ea1 Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011eac Section 0 rm_note11pro_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011ead Thumb Code 116 rm_note11pro_demo.o(i.ap_dcs_read) + i.ap_dcs_set_display_off 0x00011f24 Section 0 rm_note11pro_demo.o(i.ap_dcs_set_display_off) + ap_dcs_set_display_off 0x00011f25 Thumb Code 44 rm_note11pro_demo.o(i.ap_dcs_set_display_off) + i.ap_dcs_set_display_on 0x00011f80 Section 0 rm_note11pro_demo.o(i.ap_dcs_set_display_on) + ap_dcs_set_display_on 0x00011f81 Thumb Code 28 rm_note11pro_demo.o(i.ap_dcs_set_display_on) + i.ap_dcs_set_enter_sleep_mode 0x00011fc8 Section 0 rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) + ap_dcs_set_enter_sleep_mode 0x00011fc9 Thumb Code 90 rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) + i.ap_dcs_set_exit_sleep_mode 0x0001202c Section 0 rm_note11pro_demo.o(i.ap_dcs_set_exit_sleep_mode) + ap_dcs_set_exit_sleep_mode 0x0001202d Thumb Code 20 rm_note11pro_demo.o(i.ap_dcs_set_exit_sleep_mode) + i.ap_rstn_pull_down_cb 0x00012070 Section 0 rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) + ap_rstn_pull_down_cb 0x00012071 Thumb Code 32 rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) + i.ap_rstn_pull_high_cb 0x000120cc Section 0 rm_note11pro_demo.o(i.ap_rstn_pull_high_cb) + ap_rstn_pull_high_cb 0x000120cd Thumb Code 20 rm_note11pro_demo.o(i.ap_rstn_pull_high_cb) + i.ap_set_backlight 0x000120e4 Section 0 rm_note11pro_demo.o(i.ap_set_backlight) + ap_set_backlight 0x000120e5 Thumb Code 54 rm_note11pro_demo.o(i.ap_set_backlight) + i.ap_update_frame_rate 0x00012144 Section 0 rm_note11pro_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x00012145 Thumb Code 60 rm_note11pro_demo.o(i.ap_update_frame_rate) + i.ap_update_pps_9E 0x000121d4 Section 0 rm_note11pro_demo.o(i.ap_update_pps_9E) + ap_update_pps_9E 0x000121d5 Thumb Code 98 rm_note11pro_demo.o(i.ap_update_pps_9E) + i.app_display_init 0x00012250 Section 0 rm_note11pro_demo.o(i.app_display_init) + i.app_gpio_init 0x0001227c Section 0 rm_note11pro_demo.o(i.app_gpio_init) + i.app_init_panel 0x0001229c Section 0 rm_note11pro_demo.o(i.app_init_panel) + app_init_panel 0x0001229d Thumb Code 146 rm_note11pro_demo.o(i.app_init_panel) + i.app_mipi_rx_init 0x00012338 Section 0 rm_note11pro_demo.o(i.app_mipi_rx_init) + app_mipi_rx_init 0x00012339 Thumb Code 146 rm_note11pro_demo.o(i.app_mipi_rx_init) + i.app_mipi_tx_init 0x000123e8 Section 0 rm_note11pro_demo.o(i.app_mipi_tx_init) + app_mipi_tx_init 0x000123e9 Thumb Code 100 rm_note11pro_demo.o(i.app_mipi_tx_init) + i.app_mipi_tx_start 0x00012458 Section 0 rm_note11pro_demo.o(i.app_mipi_tx_start) + app_mipi_tx_start 0x00012459 Thumb Code 92 rm_note11pro_demo.o(i.app_mipi_tx_start) + i.app_system_suspend 0x000124dc Section 0 rm_note11pro_demo.o(i.app_system_suspend) + app_system_suspend 0x000124dd Thumb Code 134 rm_note11pro_demo.o(i.app_system_suspend) + i.app_tx_cmd_panel_te_cb 0x000125bc Section 0 rm_note11pro_demo.o(i.app_tx_cmd_panel_te_cb) + app_tx_cmd_panel_te_cb 0x000125bd Thumb Code 16 rm_note11pro_demo.o(i.app_tx_cmd_panel_te_cb) + i.board_Init 0x000125d0 Section 0 board.o(i.board_Init) + i.ceil 0x000125f0 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x000126b8 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x000126b9 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x000126e4 Section 0 hal_internal_dcs.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x000126e5 Thumb Code 84 hal_internal_dcs.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x0001276c Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x000127c4 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x000127dc Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00012820 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.delayMs 0x00012844 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x0001285c Section 0 tau_delay.o(i.delayUs) + i.drv_common_enable_systick 0x00012888 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x000128e0 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_enable_clock 0x000128e8 Section 0 drv_crgu.o(i.drv_crgu_enable_clock) + i.drv_crgu_get_rxbr_clk 0x00012924 Section 0 drv_crgu.o(i.drv_crgu_get_rxbr_clk) + i.drv_crgu_reset_modules 0x0001298c Section 0 drv_crgu.o(i.drv_crgu_reset_modules) + i.drv_crgu_set_ahb_clk 0x0001299c Section 0 drv_crgu.o(i.drv_crgu_set_ahb_clk) + i.drv_crgu_set_clock_div 0x000129c4 Section 0 drv_crgu.o(i.drv_crgu_set_clock_div) + i.drv_crgu_set_dpi_clk 0x000129d4 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_clk) + i.drv_crgu_set_dsc_clk 0x00012a10 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_clk) + i.drv_crgu_set_fb_clk 0x00012a48 Section 0 drv_crgu.o(i.drv_crgu_set_fb_clk) + i.drv_crgu_set_lcdc_clk 0x00012a70 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_clk) + i.drv_crgu_set_reset 0x00012a98 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_clk 0x00012ab0 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_clk) + i.drv_crgu_set_vidc_clk 0x00012ad8 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_clk) + i.drv_dma_clear_status 0x00012b00 Section 0 drv_dma.o(i.drv_dma_clear_status) + i.drv_dma_get_int_source 0x00012b18 Section 0 drv_dma.o(i.drv_dma_get_int_source) + drv_dma_get_int_source 0x00012b19 Thumb Code 16 drv_dma.o(i.drv_dma_get_int_source) + i.drv_dsc_dec_disable 0x00012b2c Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00012b48 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00012b80 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_irqen 0x00012ba0 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_irqen) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00012bbc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00012cc8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00012d08 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00012d09 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00012d58 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00012d59 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00012d74 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_ddi_crc_en 0x00012d84 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en) + i.drv_dsi_rx_get_max_ret_size 0x00012d94 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00012da0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_check_crc 0x00012db8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) + i.drv_dsi_rx_set_ctrl_cfg 0x00012dd4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00012df8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_ddi_crc_en 0x00012e08 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en) + i.drv_dsi_rx_set_inten 0x00012e24 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00012e30 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_ipi_ycbcr_frmt 0x00012e40 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt) + i.drv_dsi_rx_set_lane_swap 0x00012e5c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00012e70 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_tear_resp_en 0x00012e94 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en) + i.drv_dsi_rx_set_up_phy 0x00012eb0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00012fb0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00012fc8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00012fe0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00013038 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x00013044 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00013064 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00013070 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00013080 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00013090 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x000130b4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x000130c0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x000130cc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x000130d8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x000130f4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x00013114 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00013124 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x0001318c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x000131d0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00013320 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x00013340 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x0001334c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x00013370 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x0001338c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x000133a0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x000133e0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x000133f8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x0001340c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00013430 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x0001343c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00013468 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_efuse_enter_inactive 0x00013550 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x00013586 Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x00013592 Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x000135cc Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_handle_int 0x000135e4 Section 0 drv_gpio.o(i.drv_gpio_handle_int) + drv_gpio_handle_int 0x000135e5 Thumb Code 30 drv_gpio.o(i.drv_gpio_handle_int) + i.drv_gpio_register_ap_reset_callback 0x00013608 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x00013614 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00013628 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x0001366c Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode 0x0001368c Section 0 drv_gpio.o(i.drv_gpio_set_mode) + i.drv_gpio_set_output_data 0x000136a0 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x000136a1 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_lcdc_bcsa_config 0x000136c0 Section 0 drv_lcdc.o(i.drv_lcdc_bcsa_config) + i.drv_lcdc_cfg_int_frame 0x000136e8 Section 0 drv_lcdc.o(i.drv_lcdc_cfg_int_frame) + i.drv_lcdc_clear_int 0x00013714 Section 0 drv_lcdc.o(i.drv_lcdc_clear_int) + drv_lcdc_clear_int 0x00013715 Thumb Code 20 drv_lcdc.o(i.drv_lcdc_clear_int) + i.drv_lcdc_cmd_start 0x0001372c Section 0 drv_lcdc.o(i.drv_lcdc_cmd_start) + i.drv_lcdc_config_acc_command_mode 0x00013760 Section 0 drv_lcdc.o(i.drv_lcdc_config_acc_command_mode) + i.drv_lcdc_config_int 0x00013774 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x000137ac Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite_rgb 0x000137d4 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_src_parameter 0x000137ec Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_crop_hact 0x0001383c Section 0 drv_lcdc.o(i.drv_lcdc_crop_hact) + i.drv_lcdc_ctrl_flow 0x0001384c Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_dith_config 0x00013884 Section 0 drv_lcdc.o(i.drv_lcdc_dith_config) + i.drv_lcdc_edge_dect_config 0x000138b4 Section 0 drv_lcdc.o(i.drv_lcdc_edge_dect_config) + i.drv_lcdc_edge_enh_config 0x000138f0 Section 0 drv_lcdc.o(i.drv_lcdc_edge_enh_config) + i.drv_lcdc_enable_shadow_reg 0x00013954 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_endianness_config 0x00013978 Section 0 drv_lcdc.o(i.drv_lcdc_endianness_config) + i.drv_lcdc_fc_config 0x00013994 Section 0 drv_lcdc.o(i.drv_lcdc_fc_config) + i.drv_lcdc_fixed_frame_output 0x000139b4 Section 0 drv_lcdc.o(i.drv_lcdc_fixed_frame_output) + i.drv_lcdc_fldc_config 0x000139ec Section 0 drv_lcdc.o(i.drv_lcdc_fldc_config) + i.drv_lcdc_function_disable 0x00013a10 Section 0 drv_lcdc.o(i.drv_lcdc_function_disable) + i.drv_lcdc_function_enable 0x00013a34 Section 0 drv_lcdc.o(i.drv_lcdc_function_enable) + i.drv_lcdc_set_int 0x00013a58 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_prefetch 0x00013a94 Section 0 drv_lcdc.o(i.drv_lcdc_set_prefetch) + i.drv_lcdc_set_tear_line 0x00013ab0 Section 0 drv_lcdc.o(i.drv_lcdc_set_tear_line) + i.drv_lcdc_stop_display 0x00013acc Section 0 drv_lcdc.o(i.drv_lcdc_stop_display) + i.drv_lcdc_vid_hw_start 0x00013adc Section 0 drv_lcdc.o(i.drv_lcdc_vid_hw_start) + i.drv_lcdc_vintp_mode_config 0x00013b18 Section 0 drv_lcdc.o(i.drv_lcdc_vintp_mode_config) + i.drv_memc_clear_status 0x00013b30 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00013b44 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00013b84 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00013b94 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_get_tear_mode 0x00013bac Section 0 drv_memc.o(i.drv_memc_get_tear_mode) + i.drv_memc_rate_transfer_sel 0x00013bbc Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00013bd8 Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00013bec Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_circ_mode_enable 0x00013c04 Section 0 drv_memc.o(i.drv_memc_set_circ_mode_enable) + i.drv_memc_set_data_mode 0x00013c20 Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00013c34 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_frame_drop_select 0x00013c4c Section 0 drv_memc.o(i.drv_memc_set_frame_drop_select) + i.drv_memc_set_fs_en_conditions 0x00013c68 Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_lcdc_st_conditions 0x00013c80 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00013c9c Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_ltpo_pu_thres 0x00013cbc Section 0 drv_memc.o(i.drv_memc_set_ltpo_pu_thres) + i.drv_memc_set_tear_mode 0x00013cd4 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00013ce8 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00013d14 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_phy_test_clear 0x00013d28 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00013d38 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_pwr_efuse_pd 0x00013d50 Section 0 drv_pwr.o(i.drv_pwr_efuse_pd) + i.drv_pwr_enter_deep_sleep_mode 0x00013d80 Section 0 drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) + i.drv_pwr_enter_sleep_mode_ex 0x00013dcc Section 0 drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex) + i.drv_pwr_enter_stop_sleep_mode 0x00013e00 Section 0 drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) + i.drv_pwr_exit_sleep_mode 0x00013e98 Section 0 drv_pwr.o(i.drv_pwr_exit_sleep_mode) + i.drv_pwr_get_power_ready_st 0x00013ec0 Section 0 drv_pwr.o(i.drv_pwr_get_power_ready_st) + i.drv_pwr_set_breath_screen_power_sel 0x00013ed0 Section 0 drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) + i.drv_pwr_set_digit_power_sel 0x00013ef8 Section 0 drv_pwr.o(i.drv_pwr_set_digit_power_sel) + i.drv_pwr_set_pll_clk 0x00013f20 Section 0 drv_pwr.o(i.drv_pwr_set_pll_clk) + i.drv_pwr_set_wakeup_type 0x00013f54 Section 0 drv_pwr.o(i.drv_pwr_set_wakeup_type) + i.drv_pwr_write_lock 0x00013f80 Section 0 drv_pwr.o(i.drv_pwr_write_lock) + i.drv_rxbr_clear_pkt_buffer 0x00013fa0 Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00013fb0 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00013fbc Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x00014018 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_int_source 0x00014034 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00014035 Thumb Code 20 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_status0 0x0001404c Section 0 hal_internal_dcs.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x0001404d Thumb Code 20 hal_internal_dcs.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x00014064 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv1_cfg 0x00014078 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) + i.drv_rxbr_hline_rcv_cfg 0x0001408c Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq1_callback 0x0001409c Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x000140a8 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_color_format 0x000140c0 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_filter_regs 0x000140dc Section 0 drv_rxbr.o(i.drv_rxbr_set_filter_regs) + i.drv_rxbr_set_inten 0x00014100 Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x0001411c Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x00014134 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x00014174 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x00014184 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_se_init 0x00014194 Section 0 drv_se.o(i.drv_se_init) + i.drv_se_set_dsc 0x0001420c Section 0 drv_se.o(i.drv_se_set_dsc) + i.drv_se_set_lcdc 0x000142e0 Section 0 drv_se.o(i.drv_se_set_lcdc) + i.drv_se_set_memc 0x00014368 Section 0 drv_se.o(i.drv_se_set_memc) + i.drv_se_set_rxbr 0x000143d0 Section 0 drv_se.o(i.drv_se_set_rxbr) + i.drv_se_set_vidc 0x000144a0 Section 0 drv_se.o(i.drv_se_set_vidc) + i.drv_se_start_rx 0x0001454c Section 0 drv_se.o(i.drv_se_start_rx) + i.drv_swire_enable 0x00014560 Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_get_pulse_count 0x0001457c Section 0 drv_swire.o(i.drv_swire_get_pulse_count) + i.drv_swire_register_callback 0x00014588 Section 0 drv_swire.o(i.drv_swire_register_callback) + i.drv_swire_set_bit_time 0x00014594 Section 0 drv_swire.o(i.drv_swire_set_bit_time) + i.drv_swire_set_int 0x000145ac Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x000145f4 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_swire_set_pulse_count 0x00014610 Section 0 drv_swire.o(i.drv_swire_set_pulse_count) + i.drv_swire_set_trig_mode 0x0001461c Section 0 drv_swire.o(i.drv_swire_set_trig_mode) + i.drv_sys_cfg_clear_all_int 0x00014638 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00014644 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_trig 0x0001466c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x00014690 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x000146b4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_sel_swire_timer 0x000146d8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer) + i.drv_sys_cfg_set_int 0x000146f0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x00014714 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x00014715 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x0001472e Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x00014750 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_handle_interrupt 0x00014760 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x00014761 Thumb Code 54 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_set_compare_val 0x0001479c Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x000147dc Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x00014824 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x0001484c Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_enter 0x0001485c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x0001487c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_code 0x0001489c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_uart_abort_recv 0x000148c4 Section 0 drv_uart.o(i.drv_uart_abort_recv) + i.drv_uart_abort_send 0x000148f8 Section 0 drv_uart.o(i.drv_uart_abort_send) + i.drv_uart_config_int 0x0001492c Section 0 drv_uart.o(i.drv_uart_config_int) + i.drv_uart_enable_clk 0x00014940 Section 0 drv_uart.o(i.drv_uart_enable_clk) + drv_uart_enable_clk 0x00014941 Thumb Code 24 drv_uart.o(i.drv_uart_enable_clk) + i.drv_uart_enable_int 0x00014958 Section 0 drv_uart.o(i.drv_uart_enable_int) + i.drv_uart_get_instance 0x000149b4 Section 0 drv_uart.o(i.drv_uart_get_instance) + i.drv_uart_init 0x000149dc Section 0 drv_uart.o(i.drv_uart_init) + i.drv_uart_int_trans_handle 0x00014aac Section 0 drv_uart.o(i.drv_uart_int_trans_handle) + drv_uart_int_trans_handle 0x00014aad Thumb Code 54 drv_uart.o(i.drv_uart_int_trans_handle) + i.drv_uart_reset_rx_fifo 0x00014ae8 Section 0 drv_uart.o(i.drv_uart_reset_rx_fifo) + i.drv_uart_reset_tx_fifo 0x00014b04 Section 0 drv_uart.o(i.drv_uart_reset_tx_fifo) + i.drv_uart_send_blocking 0x00014b20 Section 0 drv_uart.o(i.drv_uart_send_blocking) + i.drv_uart_set_baud_rate 0x00014b3a Section 0 drv_uart.o(i.drv_uart_set_baud_rate) + i.drv_uart_trans_create_handle 0x00014b90 Section 0 drv_uart.o(i.drv_uart_trans_create_handle) + i.drv_vidc_clear_irq 0x00014bdc Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00014bec Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00014c0c Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_int_source 0x00014c4c Section 0 drv_vidc.o(i.drv_vidc_get_int_source) + i.drv_vidc_get_irq_status 0x00014c78 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x00014c90 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x00014cbc Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x00014cc8 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_circ_mode_enable 0x00014cd4 Section 0 drv_vidc.o(i.drv_vidc_set_circ_mode_enable) + i.drv_vidc_set_dither_config 0x00014cf0 Section 0 drv_vidc.o(i.drv_vidc_set_dither_config) + i.drv_vidc_set_dst_parameter 0x00014d28 Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_honly_hcoef0 0x00014d84 Section 0 drv_vidc.o(i.drv_vidc_set_honly_hcoef0) + i.drv_vidc_set_honly_hinitb 0x00014d90 Section 0 drv_vidc.o(i.drv_vidc_set_honly_hinitb) + i.drv_vidc_set_honly_hinitr 0x00014dbc Section 0 drv_vidc.o(i.drv_vidc_set_honly_hinitr) + i.drv_vidc_set_irqen 0x00014dec Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00014e08 Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_pentile_swap 0x00014e1c Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x00014e38 Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x00014e44 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x00014e5c Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00014e68 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x00014e74 Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00014e88 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00014e94 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00014ea0 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_vidc_set_vintp_config 0x00014ec0 Section 0 drv_vidc.o(i.drv_vidc_set_vintp_config) + i.fputc 0x00014ef8 Section 0 tau_log.o(i.fputc) + i.ha_intl_fb_check_pu_size 0x00014f2c Section 0 hal_internal_fb.o(i.ha_intl_fb_check_pu_size) + ha_intl_fb_check_pu_size 0x00014f2d Thumb Code 58 hal_internal_fb.o(i.ha_intl_fb_check_pu_size) + i.hal_dsi_rx_ctrl_create_handle 0x00014f6c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_dcs_async_handler 0x00014fac Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) + i.hal_dsi_rx_ctrl_deinit 0x00014fec Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_get_compressen_en 0x00015080 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00015088 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x000150a8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00015154 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00015155 Thumb Code 222 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00015254 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00015255 Thumb Code 232 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x0001535c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x0001535d Thumb Code 294 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x00015488 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x00015489 Thumb Code 314 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x000155d0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x000155d1 Thumb Code 624 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x00015850 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00015888 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_check_crc 0x00015978 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00015990 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00015991 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_start 0x000159c0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x000159f0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_input_frame_rate 0x00015a20 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) + i.hal_dsi_rx_ctrl_toggle_resolution 0x00015a2c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_cmd_mode_cal_timing 0x00015a4c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) + hal_dsi_tx_cmd_mode_cal_timing 0x00015a4d Thumb Code 510 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) + i.hal_dsi_tx_ctrl_create_handle 0x00015ccc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00015d04 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_gen_a_frame 0x00015d78 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame) + i.hal_dsi_tx_ctrl_gen_a_tear_signal 0x00015d84 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) + i.hal_dsi_tx_ctrl_init 0x00015da8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00015e24 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00015e25 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00015e34 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_tear_mode 0x00015e3c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) + i.hal_dsi_tx_ctrl_start 0x00015e48 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00015ed8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00015f10 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00016004 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_cfg 0x000160d4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) + hal_dsi_tx_init_cfg 0x000160d5 Thumb Code 250 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) + i.hal_dsi_tx_init_dpi_timing 0x000161d8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) + hal_dsi_tx_init_dpi_timing 0x000161d9 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) + i.hal_dsi_tx_init_phy_cfg 0x0001621c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x0001621d Thumb Code 22 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_timing 0x00016232 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) + hal_dsi_tx_init_timing 0x00016233 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) + i.hal_dsi_tx_init_vid_timing 0x00016284 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) + hal_dsi_tx_init_vid_timing 0x00016285 Thumb Code 70 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) + i.hal_dsi_tx_send_cmd 0x000162d8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x000162d9 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_dsi_tx_timing_info_update 0x00016318 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) + hal_dsi_tx_timing_info_update 0x00016319 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) + i.hal_dsi_tx_vid_mode_cal_timing 0x000163ac Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) + hal_dsi_tx_vid_mode_cal_timing 0x000163ad Thumb Code 766 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) + i.hal_gpio_config_pad 0x000166bc Section 0 hal_gpio.o(i.hal_gpio_config_pad) + i.hal_gpio_ctrl_eint 0x000166f8 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_init_eint 0x00016710 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x00016750 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x00016766 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00016784 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x000167a0 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x000167f0 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x00016850 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_internal_sync_get_hight_performan_mode 0x00016858 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change 0x00016868 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_sync_register_lcdc_cb 0x00016a1c Section 0 hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) + i.hal_internal_vsync_deinit 0x00016a28 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00016a48 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00016a54 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tx_state 0x00016a68 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00016a74 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00016b5c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_rx_state 0x00016c24 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_tear_mode 0x00016c44 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00016e30 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_internal_vsync_toggle_input_frame_rate 0x00016e88 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) + i.hal_intl_dcs_init_sw_fltr 0x00016f10 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) + i.hal_intl_dcs_rx_get_dcs_packet_data 0x00016f7c Section 0 hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) + hal_intl_dcs_rx_get_dcs_packet_data 0x00016f7d Thumb Code 782 hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) + i.hal_intl_dcs_rx_receive_packet 0x000173ac Section 0 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) + hal_intl_dcs_rx_receive_packet 0x000173ad Thumb Code 122 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) + i.hal_intl_dcs_rx_receive_pps 0x00017434 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) + hal_intl_dcs_rx_receive_pps 0x00017435 Thumb Code 266 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) + i.hal_intl_dcs_set_auto_hw_filter 0x000175a8 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) + i.hal_intl_dcs_sw_filter_handle 0x00017634 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) + hal_intl_dcs_sw_filter_handle 0x00017635 Thumb Code 36 hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) + i.hal_intl_fb_cal_fb_info 0x00017660 Section 0 hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) + i.hal_intl_fb_check_bandwidth 0x00017978 Section 0 hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) + hal_intl_fb_check_bandwidth 0x00017979 Thumb Code 92 hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) + i.hal_intl_fb_edge_resize 0x000179dc Section 0 hal_internal_fb.o(i.hal_intl_fb_edge_resize) + hal_intl_fb_edge_resize 0x000179dd Thumb Code 214 hal_internal_fb.o(i.hal_intl_fb_edge_resize) + i.hal_intl_fb_flow_control_adapter 0x00017ab8 Section 0 hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) + hal_intl_fb_flow_control_adapter 0x00017ab9 Thumb Code 110 hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) + i.hal_intl_fb_get_memc_flow_mode 0x00017b2c Section 0 hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) + i.hal_intl_fb_get_rx_fb_info 0x00017b38 Section 0 hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) + i.hal_intl_fb_get_tx_fb_info 0x00017b48 Section 0 hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) + i.hal_intl_fb_get_user_flow 0x00017b58 Section 0 hal_internal_fb.o(i.hal_intl_fb_get_user_flow) + i.hal_intl_svs_deinit_rx 0x00017b64 Section 0 hal_internal_svs.o(i.hal_intl_svs_deinit_rx) + i.hal_intl_svs_deinit_tx 0x00017b8c Section 0 hal_internal_svs.o(i.hal_intl_svs_deinit_tx) + i.hal_intl_svs_handle 0x00017b9c Section 0 hal_internal_svs.o(i.hal_intl_svs_handle) + i.hal_intl_svs_init_rx 0x00017bc0 Section 0 hal_internal_svs.o(i.hal_intl_svs_init_rx) + i.hal_intl_svs_init_tx 0x00017c40 Section 0 hal_internal_svs.o(i.hal_intl_svs_init_tx) + i.hal_intl_svs_set_input_frate 0x00017c54 Section 0 hal_internal_svs.o(i.hal_intl_svs_set_input_frate) + i.hal_intl_svs_set_rx_vtt 0x00017cc4 Section 0 hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) + i.hal_intl_svs_update_rxbr_clk 0x00017cd0 Section 0 hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) + i.hal_lcdc_displayproc_config 0x00017d18 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) + i.hal_lcdc_init_cfg 0x00017d88 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00017d89 Thumb Code 62 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x00017dc6 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x00017dc7 Thumb Code 112 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_postproc_config 0x00017e38 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) + i.hal_lcdc_start 0x00017f60 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_start) + hal_lcdc_start 0x00017f61 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_lcdc_start) + i.hal_lcdc_timinggen_config 0x00017f84 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) + hal_lcdc_timinggen_config 0x00017f85 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) + i.hal_lcdc_upscaler_config 0x00017fc0 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) + i.hal_nonshadow_func_update 0x000180a0 Section 0 hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) + i.hal_pwr_enter_deep_sleep_mode 0x0001815c Section 0 hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) + i.hal_pwr_enter_normal_sleep_mode 0x00018186 Section 0 hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) + i.hal_pwr_enter_stop_sleep_mode 0x00018190 Section 0 hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) + i.hal_pwr_exit_sleep_mode 0x000181f4 Section 0 hal_pwr.o(i.hal_pwr_exit_sleep_mode) + i.hal_pwr_get_vcc_power_ready 0x000181fe Section 0 hal_pwr.o(i.hal_pwr_get_vcc_power_ready) + i.hal_pwr_set_main_power 0x00018206 Section 0 hal_pwr.o(i.hal_pwr_set_main_power) + i.hal_pwr_set_sleep_mode_power 0x0001820e Section 0 hal_pwr.o(i.hal_pwr_set_sleep_mode_power) + i.hal_pwr_set_stop_sleep_wakeup_pin 0x00018218 Section 0 hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) + i.hal_swire_deinit 0x0001827c Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_enable 0x000182bc Section 0 hal_swire.o(i.hal_swire_enable) + i.hal_swire_init 0x00018318 Section 0 hal_swire.o(i.hal_swire_init) + i.hal_swire_set_pulse 0x00018370 Section 0 hal_swire.o(i.hal_swire_set_pulse) + i.hal_swire_set_timer 0x00018394 Section 0 hal_swire.o(i.hal_swire_set_timer) + i.hal_system_enable_systick 0x000183d4 Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x000183dc Section 0 hal_system.o(i.hal_system_init) + i.hal_system_updata_sysclk 0x000184c0 Section 0 hal_system.o(i.hal_system_updata_sysclk) + i.hal_timer_deinit 0x00018510 Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x00018540 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_set_repeat 0x0001855c Section 0 hal_timer.o(i.hal_timer_set_repeat) + i.hal_tx_frame_rate_adjust 0x00018564 Section 0 hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) + hal_tx_frame_rate_adjust 0x00018565 Thumb Code 44 hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) + i.hal_uart_init 0x00018594 Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_send_blocking 0x00018628 Section 0 hal_uart.o(i.hal_uart_send_blocking) + i.hal_vsync_func_update 0x00018644 Section 0 hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) + i.hal_vsync_reset_lcdc_scaler 0x0001865c Section 0 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + i.main 0x0001873c Section 0 main.o(i.main) + i.pps_update_handle 0x00018774 Section 0 rm_note11pro_demo.o(i.pps_update_handle) + pps_update_handle 0x00018775 Thumb Code 86 rm_note11pro_demo.o(i.pps_update_handle) + i.rxbr_irq1_callback 0x00018818 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x00018819 Thumb Code 496 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_double_buffer_update 0x00018b0c Section 0 hal_internal_vsync.o(i.soft_double_buffer_update) + soft_double_buffer_update 0x00018b0d Thumb Code 56 hal_internal_vsync.o(i.soft_double_buffer_update) + i.soft_gen_te 0x00018b50 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x00018b51 Thumb Code 86 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x00018bbc Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x00018bbd Thumb Code 202 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_pro_motion_init 0x00018c9c Section 0 hal_internal_vsync.o(i.soft_pro_motion_init) + soft_pro_motion_init 0x00018c9d Thumb Code 46 hal_internal_vsync.o(i.soft_pro_motion_init) + i.soft_tear_adjust_line 0x00018cd4 Section 0 hal_internal_vsync.o(i.soft_tear_adjust_line) + soft_tear_adjust_line 0x00018cd5 Thumb Code 26 hal_internal_vsync.o(i.soft_tear_adjust_line) + i.stop_sleep_cb 0x00018cf8 Section 0 hal_pwr.o(i.stop_sleep_cb) + stop_sleep_cb 0x00018cf9 Thumb Code 18 hal_pwr.o(i.stop_sleep_cb) + i.svs_direct_mode_setting 0x00018d10 Section 0 hal_internal_svs.o(i.svs_direct_mode_setting) + svs_direct_mode_setting 0x00018d11 Thumb Code 154 hal_internal_svs.o(i.svs_direct_mode_setting) + i.svs_get_rel_intv 0x00018dbc Section 0 hal_internal_svs.o(i.svs_get_rel_intv) + svs_get_rel_intv 0x00018dbd Thumb Code 20 hal_internal_svs.o(i.svs_get_rel_intv) + i.svs_sync_handle 0x00018dd8 Section 0 hal_internal_svs.o(i.svs_sync_handle) + svs_sync_handle 0x00018dd9 Thumb Code 158 hal_internal_svs.o(i.svs_sync_handle) + i.svs_wait_fr_stab 0x00018e88 Section 0 hal_internal_svs.o(i.svs_wait_fr_stab) + svs_wait_fr_stab 0x00018e89 Thumb Code 148 hal_internal_svs.o(i.svs_wait_fr_stab) + i.svs_wait_start 0x00018f54 Section 0 hal_internal_svs.o(i.svs_wait_start) + svs_wait_start 0x00018f55 Thumb Code 250 hal_internal_svs.o(i.svs_wait_start) + i.tau_log_init 0x00019060 Section 0 tau_log.o(i.tau_log_init) + i.tau_log_printf 0x00019094 Section 0 tau_log.o(i.tau_log_printf) + i.tau_log_push_log 0x00019118 Section 0 tau_log.o(i.tau_log_push_log) + i.vidc_callback 0x00019190 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x00019191 Thumb Code 150 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x00019244 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x00019245 Thumb Code 254 hal_internal_vsync.o(i.vpre_err_reset) + .constdata 0x0001935c Section 4640 rm_note11pro_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001935c Data 96 rm_note11pro_demo.o(.constdata) + .constdata 0x0001a57c Section 40 hal_dsi_rx_ctrl.o(.constdata) + .constdata 0x0001a5a4 Section 28 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001a5c0 Section 182 hal_gpio.o(.constdata) + s_gpio_map 0x0001a5c0 Data 104 hal_gpio.o(.constdata) + s_gpio_perf 0x0001a628 Data 78 hal_gpio.o(.constdata) + .constdata 0x0001a678 Section 48 hal_uart.o(.constdata) + .constdata 0x0001a6a8 Section 16 drv_uart.o(.constdata) + .conststring 0x0001a6b8 Section 67 rm_note11pro_demo.o(.conststring) + .conststring 0x0001a6fc Section 66 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001a740 Section 144 hal_internal_vsync.o(.conststring) + .conststring 0x0001a7d0 Section 70 hal_internal_dcs.o(.conststring) + .data 0x00070000 Section 144 rm_note11pro_demo.o(.data) + panel_display_done 0x00070000 Data 1 rm_note11pro_demo.o(.data) + sg_system_resume 0x00070001 Data 1 rm_note11pro_demo.o(.data) + sg_system_suspend 0x00070002 Data 1 rm_note11pro_demo.o(.data) + AOD_ON 0x00070003 Data 1 rm_note11pro_demo.o(.data) + display_on_flag 0x00070005 Data 1 rm_note11pro_demo.o(.data) + g_rx_ctrl_handle 0x00070008 Data 4 rm_note11pro_demo.o(.data) + g_tx_ctrl_handle 0x0007000c Data 4 rm_note11pro_demo.o(.data) + .data 0x00070090 Section 48 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00070090 Data 1 hal_dsi_rx_ctrl.o(.data) + g_crc_check_enable 0x00070091 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00070094 Data 4 hal_dsi_rx_ctrl.o(.data) + g_before_draw_col 0x00070098 Data 4 hal_dsi_rx_ctrl.o(.data) + g_before_draw_page 0x0007009c Data 4 hal_dsi_rx_ctrl.o(.data) + pre_step 0x000700a0 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_cmd_filter 0x000700a4 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_x 0x000700a8 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_y 0x000700ac Data 4 hal_dsi_rx_ctrl.o(.data) + pre_value 0x000700b0 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_x 0x000700b4 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_y 0x000700b8 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_value 0x000700bc Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x000700c0 Section 92 hal_dsi_tx_ctrl.o(.data) + sg_bta_vsync_flag 0x000700c0 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_vsync_flag 0x000700c1 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_enter_sleep_cmd 0x000700c2 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_fldc_cg_mode 0x000700c3 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_scl_fir 0x000700c4 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_honly_bypass_fir 0x000700c5 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_bcs 0x000700c6 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_enhc 0x000700c7 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_edge_dect 0x000700c8 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_edge_enh 0x000700c9 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_dith 0x000700ca Data 1 hal_dsi_tx_ctrl.o(.data) + sg_dith_judge 0x000700cb Data 1 hal_dsi_tx_ctrl.o(.data) + sg_endianness 0x000700cc Data 1 hal_dsi_tx_ctrl.o(.data) + sg_test_pattern_en 0x000700cd Data 1 hal_dsi_tx_ctrl.o(.data) + sg_dith_judge_thr 0x000700d0 Data 4 hal_dsi_tx_ctrl.o(.data) + sg_ccm_para 0x000700d4 Data 36 hal_dsi_tx_ctrl.o(.data) + sg_honly_para 0x000700f8 Data 36 hal_dsi_tx_ctrl.o(.data) + .data 0x0007011c Section 2 hal_swire.o(.data) + sg_swire_timer 0x0007011c Data 1 hal_swire.o(.data) + sg_swire_repeat 0x0007011d Data 1 hal_swire.o(.data) + .data 0x00070120 Section 8 hal_pwr.o(.data) + sg_wake_up_io 0x00070120 Data 1 hal_pwr.o(.data) + sg_stop_sleep_wakeup_int 0x00070124 Data 4 hal_pwr.o(.data) + .data 0x00070128 Section 1 tau_log.o(.data) + g_log_port 0x00070128 Data 1 tau_log.o(.data) + .data 0x0007012c Section 24 hal_uart.o(.data) + sg_dma_callback 0x0007013c Data 4 hal_uart.o(.data) + sg_user_data 0x00070140 Data 4 hal_uart.o(.data) + .data 0x00070144 Section 16 hal_internal_vsync.o(.data) + s_te_refine_mode 0x00070144 Data 1 hal_internal_vsync.o(.data) + .data 0x00070154 Section 36 hal_internal_dcs.o(.data) + g_imm_packet 0x00070154 Data 24 hal_internal_dcs.o(.data) + g_cus_rx_write_cmd_handle 0x0007016c Data 12 hal_internal_dcs.o(.data) + .data 0x00070178 Section 12 drv_common.o(.data) + s_my_tick 0x00070178 Data 4 drv_common.o(.data) + .data 0x00070184 Section 1 drv_common.o(.data) + .data 0x00070188 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x00070188 Data 4 drv_gpio.o(.data) + .data 0x0007018c Section 4 drv_swire.o(.data) + sg_drv_swire_cb 0x0007018c Data 4 drv_swire.o(.data) + .data 0x00070190 Section 80 drv_timer.o(.data) + sg_timer_info 0x00070190 Data 80 drv_timer.o(.data) + .data 0x000701e0 Section 4 drv_se.o(.data) + chip_info 0x000701e0 Data 4 drv_se.o(.data) + .data 0x000701e4 Section 1 drv_dsi_rx.o(.data) + sg_rx_drv_level 0x000701e4 Data 1 drv_dsi_rx.o(.data) + .data 0x000701e8 Section 8 drv_rxbr.o(.data) + .data 0x000701f0 Section 4 drv_vidc.o(.data) + .data 0x000701f4 Section 400 drv_dma.o(.data) + sg_dma_handle 0x000701f4 Data 256 drv_dma.o(.data) + .data 0x00070384 Section 4 stdout.o(.data) + .bss 0x00070388 Section 208 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x00070388 Data 208 hal_dsi_rx_ctrl.o(.bss) + .bss 0x00070458 Section 184 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x00070458 Data 92 hal_dsi_tx_ctrl.o(.bss) + sg_dsi_tx_param 0x000704b4 Data 92 hal_dsi_tx_ctrl.o(.bss) + .bss 0x00070510 Section 256 tau_log.o(.bss) + g_log_buf 0x00070510 Data 256 tau_log.o(.bss) + .bss 0x00070610 Section 68 hal_internal_vsync.o(.bss) + .bss 0x00070654 Section 2048 hal_internal_dcs.o(.bss) + .bss 0x00070e54 Section 255 hal_internal_dcs.o(.bss) + g_imm_buffer 0x00070e54 Data 255 hal_internal_dcs.o(.bss) + .bss 0x00070f54 Section 68 hal_internal_fb.o(.bss) + .bss 0x00070f98 Section 68 hal_internal_svs.o(.bss) + sg_sys_handler 0x00070f98 Data 68 hal_internal_svs.o(.bss) + .bss 0x00070fdc Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00070fdc Data 64 drv_gpio.o(.bss) + .bss 0x0007101c Section 4204 dcs_packet_fifo.o(.bss) + .bss 0x00072088 Section 16 drv_dma.o(.bss) + sg_dma_int_list 0x00072088 Data 16 drv_dma.o(.bss) + .bss 0x00072098 Section 96 drv_uart.o(.bss) + sg_uart_userdata 0x00072098 Data 96 drv_uart.o(.bss) + STACK 0x000720f8 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + FLSCTRL_IRQn_Handler 0x00010107 Thumb Code 2 startup_armcm0.o(.text) + WDG_IRQn_Handler 0x00010113 Thumb Code 2 startup_armcm0.o(.text) + I2C0_IRQn_Handler 0x00010117 Thumb Code 2 startup_armcm0.o(.text) + I2C1_IRQn_Handler 0x00010119 Thumb Code 2 startup_armcm0.o(.text) + SPIS_IRQn_Handler 0x0001011b Thumb Code 2 startup_armcm0.o(.text) + SPIM_IRQn_Handler 0x0001011d Thumb Code 2 startup_armcm0.o(.text) + I2C2_IRQn_Handler 0x00010121 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + strlen 0x000101e9 Thumb Code 14 strlen.o(.text) + memcmp 0x000101f7 Thumb Code 26 memcmp.o(.text) + __aeabi_fadd 0x00010211 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x000102b3 Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x000102bb Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x000102c3 Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x0001033d Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x000103b9 Thumb Code 24 fscalb.o(.text) + scalbnf 0x000103b9 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103d1 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x00010519 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x00010525 Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x00010535 Thumb Code 202 dmul.o(.text) + __aeabi_ui2f 0x00010605 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x00010615 Thumb Code 24 dfltui.o(.text) + __aeabi_f2uiz 0x00010631 Thumb Code 40 ffixui.o(.text) + __aeabi_d2uiz 0x00010659 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x00010695 Thumb Code 40 f2d.o(.text) + __aeabi_d2f 0x000106bd Thumb Code 56 d2f.o(.text) + __aeabi_cfcmpeq 0x000106f5 Thumb Code 0 cfcmple.o(.text) + __aeabi_cfcmple 0x000106f5 Thumb Code 20 cfcmple.o(.text) + __aeabi_cfrcmple 0x00010709 Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x0001071d Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x0001077d Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x0001077d Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x0001079d Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x0001079d Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000107bf Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000107bf Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x000107e5 Thumb Code 0 iusefp.o(.text) + _float_round 0x000107e5 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x000107f5 Thumb Code 114 fepilogue.o(.text) + _double_round 0x00010867 Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x00010881 Thumb Code 164 depilogue.o(.text) + __aeabi_ddiv 0x00010925 Thumb Code 234 ddiv.o(.text) + __aeabi_d2ulz 0x00010a15 Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010a55 Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010a7d Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010a7d Thumb Code 0 init.o(.text) + __decompress 0x00010aa1 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010aa1 Thumb Code 86 __dczerorl2.o(.text) + AP_NRESET_IRQn_Handler 0x00010af9 Thumb Code 22 drv_gpio.o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010b15 Thumb Code 78 drv_dma.o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010b71 Thumb Code 10 drv_gpio.o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010b7b Thumb Code 10 drv_gpio.o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010b85 Thumb Code 10 drv_gpio.o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010b8f Thumb Code 10 drv_gpio.o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010b99 Thumb Code 10 drv_gpio.o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010ba3 Thumb Code 10 drv_gpio.o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010bad Thumb Code 10 drv_gpio.o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010bb7 Thumb Code 10 drv_gpio.o(i.EXTI_INT7_IRQn_Handler) + HardFault_Handler 0x00010bc1 Thumb Code 14 drv_common.o(i.HardFault_Handler) + LCDC_IRQn_Handler 0x00010c09 Thumb Code 118 hal_internal_vsync.o(i.LCDC_IRQn_Handler) + MEMC_IRQn_Handler 0x00010d09 Thumb Code 154 drv_memc.o(i.MEMC_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010da5 Thumb Code 70 drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) + Note11Pro_demo 0x00010e5d Thumb Code 72 rm_note11pro_demo.o(i.Note11Pro_demo) + SWIRE_IRQn_Handler 0x00010ed5 Thumb Code 38 drv_swire.o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00010f05 Thumb Code 20 drv_common.o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00010f1d Thumb Code 10 drv_timer.o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x00010f27 Thumb Code 10 drv_timer.o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00010f31 Thumb Code 10 drv_timer.o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x00010f3b Thumb Code 10 drv_timer.o(i.TIMER3_IRQn_Handler) + VIDC_IRQn_Handler 0x00010f45 Thumb Code 22 drv_vidc.o(i.VIDC_IRQn_Handler) + VPRE1_IRQn_Handler 0x00010f61 Thumb Code 22 drv_rxbr.o(i.VPRE1_IRQn_Handler) + VPRE_IRQn_Handler 0x00010f7d Thumb Code 104 hal_internal_dcs.o(i.VPRE_IRQn_Handler) + s_RAM_CK 0x00011000 Data 28 drv_common.o(.ARM.__at_0x11000) + g_tau_log 0x0001101c Data 16 tau_log.o(.ARM.__at_0x1101C) + sg_pq_para 0x0001102c Data 22 hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) + MIPI_RX_IRQn_Handler 0x00011045 Thumb Code 354 drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) + UART_IRQn_Handler 0x000113a9 Thumb Code 364 drv_uart.o(i.UART_IRQn_Handler) + __0printf 0x00011529 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x00011549 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x0001156d Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x0001159b Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_copy 0x000115d5 Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_null 0x000115e3 Thumb Code 2 handlers.o(i.__scatterload_null) + __scatterload_zeroinit 0x000115e5 Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + app_display_init 0x00012251 Thumb Code 42 rm_note11pro_demo.o(i.app_display_init) + app_gpio_init 0x0001227d Thumb Code 26 rm_note11pro_demo.o(i.app_gpio_init) + board_Init 0x000125d1 Thumb Code 26 board.o(i.board_Init) + ceil 0x000125f1 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x0001276d Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x000127c5 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x000127dd Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00012821 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x00012845 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x0001285d Thumb Code 40 tau_delay.o(i.delayUs) + drv_common_enable_systick 0x00012889 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x000128e1 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_enable_clock 0x000128e9 Thumb Code 54 drv_crgu.o(i.drv_crgu_enable_clock) + drv_crgu_get_rxbr_clk 0x00012925 Thumb Code 70 drv_crgu.o(i.drv_crgu_get_rxbr_clk) + drv_crgu_reset_modules 0x0001298d Thumb Code 10 drv_crgu.o(i.drv_crgu_reset_modules) + drv_crgu_set_ahb_clk 0x0001299d Thumb Code 34 drv_crgu.o(i.drv_crgu_set_ahb_clk) + drv_crgu_set_clock_div 0x000129c5 Thumb Code 12 drv_crgu.o(i.drv_crgu_set_clock_div) + drv_crgu_set_dpi_clk 0x000129d5 Thumb Code 54 drv_crgu.o(i.drv_crgu_set_dpi_clk) + drv_crgu_set_dsc_clk 0x00012a11 Thumb Code 52 drv_crgu.o(i.drv_crgu_set_dsc_clk) + drv_crgu_set_fb_clk 0x00012a49 Thumb Code 34 drv_crgu.o(i.drv_crgu_set_fb_clk) + drv_crgu_set_lcdc_clk 0x00012a71 Thumb Code 36 drv_crgu.o(i.drv_crgu_set_lcdc_clk) + drv_crgu_set_reset 0x00012a99 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_clk 0x00012ab1 Thumb Code 34 drv_crgu.o(i.drv_crgu_set_rxbr_clk) + drv_crgu_set_vidc_clk 0x00012ad9 Thumb Code 36 drv_crgu.o(i.drv_crgu_set_vidc_clk) + drv_dma_clear_status 0x00012b01 Thumb Code 20 drv_dma.o(i.drv_dma_clear_status) + drv_dsc_dec_disable 0x00012b2d Thumb Code 20 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00012b49 Thumb Code 44 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00012b81 Thumb Code 22 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_irqen 0x00012ba1 Thumb Code 24 drv_dsc_dec.o(i.drv_dsc_dec_set_irqen) + drv_dsi_rx_calc_ipi_tx_delay 0x00012bbd Thumb Code 252 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00012cc9 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00012d75 Thumb Code 10 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_ddi_crc_en 0x00012d85 Thumb Code 10 drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en) + drv_dsi_rx_get_max_ret_size 0x00012d95 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00012da1 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_check_crc 0x00012db9 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) + drv_dsi_rx_set_ctrl_cfg 0x00012dd5 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00012df9 Thumb Code 10 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_ddi_crc_en 0x00012e09 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en) + drv_dsi_rx_set_inten 0x00012e25 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00012e31 Thumb Code 12 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_ipi_ycbcr_frmt 0x00012e41 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt) + drv_dsi_rx_set_lane_swap 0x00012e5d Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00012e71 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_tear_resp_en 0x00012e95 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en) + drv_dsi_rx_set_up_phy 0x00012eb1 Thumb Code 224 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00012fb1 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00012fc9 Thumb Code 18 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00012fe1 Thumb Code 82 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00013039 Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x00013045 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00013065 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00013071 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00013081 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00013091 Thumb Code 32 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x000130b5 Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x000130c1 Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x000130cd Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x000130d9 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x000130f5 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x00013115 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00013125 Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x0001318d Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x000131d1 Thumb Code 314 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00013321 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x00013341 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x0001334d Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x00013371 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x0001338d Thumb Code 14 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x000133a1 Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x000133e1 Thumb Code 18 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x000133f9 Thumb Code 14 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x0001340d Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00013431 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x0001343d Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00013469 Thumb Code 226 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_efuse_enter_inactive 0x00013551 Thumb Code 54 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x00013587 Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x00013593 Thumb Code 58 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x000135cd Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_register_ap_reset_callback 0x00013609 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x00013615 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00013629 Thumb Code 62 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x0001366d Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode 0x0001368d Thumb Code 16 drv_gpio.o(i.drv_gpio_set_mode) + drv_lcdc_bcsa_config 0x000136c1 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_bcsa_config) + drv_lcdc_cfg_int_frame 0x000136e9 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_cfg_int_frame) + drv_lcdc_cmd_start 0x0001372d Thumb Code 46 drv_lcdc.o(i.drv_lcdc_cmd_start) + drv_lcdc_config_acc_command_mode 0x00013761 Thumb Code 14 drv_lcdc.o(i.drv_lcdc_config_acc_command_mode) + drv_lcdc_config_int 0x00013775 Thumb Code 50 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x000137ad Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite_rgb 0x000137d5 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_src_parameter 0x000137ed Thumb Code 72 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_crop_hact 0x0001383d Thumb Code 10 drv_lcdc.o(i.drv_lcdc_crop_hact) + drv_lcdc_ctrl_flow 0x0001384d Thumb Code 50 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_dith_config 0x00013885 Thumb Code 40 drv_lcdc.o(i.drv_lcdc_dith_config) + drv_lcdc_edge_dect_config 0x000138b5 Thumb Code 50 drv_lcdc.o(i.drv_lcdc_edge_dect_config) + drv_lcdc_edge_enh_config 0x000138f1 Thumb Code 86 drv_lcdc.o(i.drv_lcdc_edge_enh_config) + drv_lcdc_enable_shadow_reg 0x00013955 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_endianness_config 0x00013979 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_endianness_config) + drv_lcdc_fc_config 0x00013995 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_fc_config) + drv_lcdc_fixed_frame_output 0x000139b5 Thumb Code 42 drv_lcdc.o(i.drv_lcdc_fixed_frame_output) + drv_lcdc_fldc_config 0x000139ed Thumb Code 32 drv_lcdc.o(i.drv_lcdc_fldc_config) + drv_lcdc_function_disable 0x00013a11 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_function_disable) + drv_lcdc_function_enable 0x00013a35 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_function_enable) + drv_lcdc_set_int 0x00013a59 Thumb Code 54 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_prefetch 0x00013a95 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_prefetch) + drv_lcdc_set_tear_line 0x00013ab1 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_tear_line) + drv_lcdc_stop_display 0x00013acd Thumb Code 12 drv_lcdc.o(i.drv_lcdc_stop_display) + drv_lcdc_vid_hw_start 0x00013add Thumb Code 56 drv_lcdc.o(i.drv_lcdc_vid_hw_start) + drv_lcdc_vintp_mode_config 0x00013b19 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_vintp_mode_config) + drv_memc_clear_status 0x00013b31 Thumb Code 14 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00013b45 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00013b85 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00013b95 Thumb Code 20 drv_memc.o(i.drv_memc_get_status) + drv_memc_get_tear_mode 0x00013bad Thumb Code 10 drv_memc.o(i.drv_memc_get_tear_mode) + drv_memc_rate_transfer_sel 0x00013bbd Thumb Code 22 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00013bd9 Thumb Code 16 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00013bed Thumb Code 16 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_circ_mode_enable 0x00013c05 Thumb Code 24 drv_memc.o(i.drv_memc_set_circ_mode_enable) + drv_memc_set_data_mode 0x00013c21 Thumb Code 14 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00013c35 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_frame_drop_select 0x00013c4d Thumb Code 24 drv_memc.o(i.drv_memc_set_frame_drop_select) + drv_memc_set_fs_en_conditions 0x00013c69 Thumb Code 18 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_lcdc_st_conditions 0x00013c81 Thumb Code 20 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00013c9d Thumb Code 28 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_ltpo_pu_thres 0x00013cbd Thumb Code 18 drv_memc.o(i.drv_memc_set_ltpo_pu_thres) + drv_memc_set_tear_mode 0x00013cd5 Thumb Code 16 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00013ce9 Thumb Code 36 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00013d15 Thumb Code 16 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_phy_test_clear 0x00013d29 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00013d39 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_pwr_efuse_pd 0x00013d51 Thumb Code 36 drv_pwr.o(i.drv_pwr_efuse_pd) + drv_pwr_enter_deep_sleep_mode 0x00013d81 Thumb Code 60 drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) + drv_pwr_enter_sleep_mode_ex 0x00013dcd Thumb Code 34 drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex) + drv_pwr_enter_stop_sleep_mode 0x00013e01 Thumb Code 132 drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) + drv_pwr_exit_sleep_mode 0x00013e99 Thumb Code 32 drv_pwr.o(i.drv_pwr_exit_sleep_mode) + drv_pwr_get_power_ready_st 0x00013ec1 Thumb Code 10 drv_pwr.o(i.drv_pwr_get_power_ready_st) + drv_pwr_set_breath_screen_power_sel 0x00013ed1 Thumb Code 34 drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) + drv_pwr_set_digit_power_sel 0x00013ef9 Thumb Code 34 drv_pwr.o(i.drv_pwr_set_digit_power_sel) + drv_pwr_set_pll_clk 0x00013f21 Thumb Code 30 drv_pwr.o(i.drv_pwr_set_pll_clk) + drv_pwr_set_wakeup_type 0x00013f55 Thumb Code 40 drv_pwr.o(i.drv_pwr_set_wakeup_type) + drv_pwr_write_lock 0x00013f81 Thumb Code 18 drv_pwr.o(i.drv_pwr_write_lock) + drv_rxbr_clear_pkt_buffer 0x00013fa1 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00013fb1 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00013fbd Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x00014019 Thumb Code 18 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_hline_rcv0_cfg 0x00014065 Thumb Code 14 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv1_cfg 0x00014079 Thumb Code 14 drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) + drv_rxbr_hline_rcv_cfg 0x0001408d Thumb Code 10 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq1_callback 0x0001409d Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x000140a9 Thumb Code 18 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_color_format 0x000140c1 Thumb Code 24 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_filter_regs 0x000140dd Thumb Code 32 drv_rxbr.o(i.drv_rxbr_set_filter_regs) + drv_rxbr_set_inten 0x00014101 Thumb Code 22 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x0001411d Thumb Code 18 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x00014135 Thumb Code 56 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x00014175 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x00014185 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_se_init 0x00014195 Thumb Code 106 drv_se.o(i.drv_se_init) + drv_se_set_dsc 0x0001420d Thumb Code 162 drv_se.o(i.drv_se_set_dsc) + drv_se_set_lcdc 0x000142e1 Thumb Code 88 drv_se.o(i.drv_se_set_lcdc) + drv_se_set_memc 0x00014369 Thumb Code 54 drv_se.o(i.drv_se_set_memc) + drv_se_set_rxbr 0x000143d1 Thumb Code 158 drv_se.o(i.drv_se_set_rxbr) + drv_se_set_vidc 0x000144a1 Thumb Code 122 drv_se.o(i.drv_se_set_vidc) + drv_se_start_rx 0x0001454d Thumb Code 16 drv_se.o(i.drv_se_start_rx) + drv_swire_enable 0x00014561 Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_get_pulse_count 0x0001457d Thumb Code 6 drv_swire.o(i.drv_swire_get_pulse_count) + drv_swire_register_callback 0x00014589 Thumb Code 6 drv_swire.o(i.drv_swire_register_callback) + drv_swire_set_bit_time 0x00014595 Thumb Code 18 drv_swire.o(i.drv_swire_set_bit_time) + drv_swire_set_int 0x000145ad Thumb Code 64 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x000145f5 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_swire_set_pulse_count 0x00014611 Thumb Code 6 drv_swire.o(i.drv_swire_set_pulse_count) + drv_swire_set_trig_mode 0x0001461d Thumb Code 24 drv_swire.o(i.drv_swire_set_trig_mode) + drv_sys_cfg_clear_all_int 0x00014639 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00014645 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_trig 0x0001466d Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x00014691 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x000146b5 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_sel_swire_timer 0x000146d9 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer) + drv_sys_cfg_set_int 0x000146f1 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x0001472f Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x00014751 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_set_compare_val 0x0001479d Thumb Code 50 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x000147dd Thumb Code 68 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x00014825 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x0001484d Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x0001485d Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x0001487d Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_tx_phy_test_write_code 0x0001489d Thumb Code 34 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_uart_abort_recv 0x000148c5 Thumb Code 46 drv_uart.o(i.drv_uart_abort_recv) + drv_uart_abort_send 0x000148f9 Thumb Code 46 drv_uart.o(i.drv_uart_abort_send) + drv_uart_config_int 0x0001492d Thumb Code 20 drv_uart.o(i.drv_uart_config_int) + drv_uart_enable_int 0x00014959 Thumb Code 84 drv_uart.o(i.drv_uart_enable_int) + drv_uart_get_instance 0x000149b5 Thumb Code 36 drv_uart.o(i.drv_uart_get_instance) + drv_uart_init 0x000149dd Thumb Code 206 drv_uart.o(i.drv_uart_init) + drv_uart_reset_rx_fifo 0x00014ae9 Thumb Code 28 drv_uart.o(i.drv_uart_reset_rx_fifo) + drv_uart_reset_tx_fifo 0x00014b05 Thumb Code 28 drv_uart.o(i.drv_uart_reset_tx_fifo) + drv_uart_send_blocking 0x00014b21 Thumb Code 26 drv_uart.o(i.drv_uart_send_blocking) + drv_uart_set_baud_rate 0x00014b3b Thumb Code 84 drv_uart.o(i.drv_uart_set_baud_rate) + drv_uart_trans_create_handle 0x00014b91 Thumb Code 72 drv_uart.o(i.drv_uart_trans_create_handle) + drv_vidc_clear_irq 0x00014bdd Thumb Code 10 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00014bed Thumb Code 26 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00014c0d Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_int_source 0x00014c4d Thumb Code 40 drv_vidc.o(i.drv_vidc_get_int_source) + drv_vidc_get_irq_status 0x00014c79 Thumb Code 20 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x00014c91 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x00014cbd Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x00014cc9 Thumb Code 8 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_circ_mode_enable 0x00014cd5 Thumb Code 24 drv_vidc.o(i.drv_vidc_set_circ_mode_enable) + drv_vidc_set_dither_config 0x00014cf1 Thumb Code 50 drv_vidc.o(i.drv_vidc_set_dither_config) + drv_vidc_set_dst_parameter 0x00014d29 Thumb Code 86 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_honly_hcoef0 0x00014d85 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_honly_hcoef0) + drv_vidc_set_honly_hinitb 0x00014d91 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_honly_hinitb) + drv_vidc_set_honly_hinitr 0x00014dbd Thumb Code 42 drv_vidc.o(i.drv_vidc_set_honly_hinitr) + drv_vidc_set_irqen 0x00014ded Thumb Code 22 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00014e09 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_pentile_swap 0x00014e1d Thumb Code 20 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x00014e39 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x00014e45 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x00014e5d Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00014e69 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x00014e75 Thumb Code 14 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00014e89 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00014e95 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00014ea1 Thumb Code 28 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_vidc_set_vintp_config 0x00014ec1 Thumb Code 52 drv_vidc.o(i.drv_vidc_set_vintp_config) + fputc 0x00014ef9 Thumb Code 42 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00014f6d Thumb Code 60 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_dcs_async_handler 0x00014fad Thumb Code 60 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) + hal_dsi_rx_ctrl_deinit 0x00014fed Thumb Code 132 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_get_compressen_en 0x00015081 Thumb Code 8 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) + hal_dsi_rx_ctrl_get_max_ret_size 0x00015089 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x000150a9 Thumb Code 158 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x00015851 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_send_ack_cmd 0x00015889 Thumb Code 210 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_check_crc 0x00015979 Thumb Code 20 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) + hal_dsi_rx_ctrl_start 0x000159c1 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x000159f1 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_input_frame_rate 0x00015a21 Thumb Code 10 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) + hal_dsi_rx_ctrl_toggle_resolution 0x00015a2d Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x00015ccd Thumb Code 48 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00015d05 Thumb Code 102 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_gen_a_frame 0x00015d79 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame) + hal_dsi_tx_ctrl_gen_a_tear_signal 0x00015d85 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) + hal_dsi_tx_ctrl_init 0x00015da9 Thumb Code 110 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00015e35 Thumb Code 8 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_tear_mode 0x00015e3d Thumb Code 10 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) + hal_dsi_tx_ctrl_start 0x00015e49 Thumb Code 134 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00015ed9 Thumb Code 52 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00015f11 Thumb Code 238 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00016005 Thumb Code 202 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_config_pad 0x000166bd Thumb Code 58 hal_gpio.o(i.hal_gpio_config_pad) + hal_gpio_ctrl_eint 0x000166f9 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_init_eint 0x00016711 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x00016751 Thumb Code 22 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x00016767 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00016785 Thumb Code 22 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x000167a1 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x000167f1 Thumb Code 92 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x00016851 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_internal_sync_get_hight_performan_mode 0x00016859 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change 0x00016869 Thumb Code 336 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_sync_register_lcdc_cb 0x00016a1d Thumb Code 8 hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) + hal_internal_vsync_deinit 0x00016a29 Thumb Code 22 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00016a49 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00016a55 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tx_state 0x00016a69 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00016a75 Thumb Code 206 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00016b5d Thumb Code 194 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_rx_state 0x00016c25 Thumb Code 28 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_tear_mode 0x00016c45 Thumb Code 424 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00016e31 Thumb Code 78 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_internal_vsync_toggle_input_frame_rate 0x00016e89 Thumb Code 134 hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) + hal_intl_dcs_init_sw_fltr 0x00016f11 Thumb Code 90 hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) + hal_intl_dcs_set_auto_hw_filter 0x000175a9 Thumb Code 130 hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) + hal_intl_fb_cal_fb_info 0x00017661 Thumb Code 780 hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) + hal_intl_fb_get_memc_flow_mode 0x00017b2d Thumb Code 6 hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) + hal_intl_fb_get_rx_fb_info 0x00017b39 Thumb Code 12 hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) + hal_intl_fb_get_tx_fb_info 0x00017b49 Thumb Code 12 hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) + hal_intl_fb_get_user_flow 0x00017b59 Thumb Code 6 hal_internal_fb.o(i.hal_intl_fb_get_user_flow) + hal_intl_svs_deinit_rx 0x00017b65 Thumb Code 32 hal_internal_svs.o(i.hal_intl_svs_deinit_rx) + hal_intl_svs_deinit_tx 0x00017b8d Thumb Code 10 hal_internal_svs.o(i.hal_intl_svs_deinit_tx) + hal_intl_svs_handle 0x00017b9d Thumb Code 24 hal_internal_svs.o(i.hal_intl_svs_handle) + hal_intl_svs_init_rx 0x00017bc1 Thumb Code 120 hal_internal_svs.o(i.hal_intl_svs_init_rx) + hal_intl_svs_init_tx 0x00017c41 Thumb Code 16 hal_internal_svs.o(i.hal_intl_svs_init_tx) + hal_intl_svs_set_input_frate 0x00017c55 Thumb Code 100 hal_internal_svs.o(i.hal_intl_svs_set_input_frate) + hal_intl_svs_set_rx_vtt 0x00017cc5 Thumb Code 6 hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) + hal_intl_svs_update_rxbr_clk 0x00017cd1 Thumb Code 52 hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) + hal_lcdc_displayproc_config 0x00017d19 Thumb Code 94 hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) + hal_lcdc_postproc_config 0x00017e39 Thumb Code 276 hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) + hal_lcdc_upscaler_config 0x00017fc1 Thumb Code 202 hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) + hal_nonshadow_func_update 0x000180a1 Thumb Code 180 hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) + hal_pwr_enter_deep_sleep_mode 0x0001815d Thumb Code 42 hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) + hal_pwr_enter_normal_sleep_mode 0x00018187 Thumb Code 8 hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) + hal_pwr_enter_stop_sleep_mode 0x00018191 Thumb Code 88 hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) + hal_pwr_exit_sleep_mode 0x000181f5 Thumb Code 10 hal_pwr.o(i.hal_pwr_exit_sleep_mode) + hal_pwr_get_vcc_power_ready 0x000181ff Thumb Code 8 hal_pwr.o(i.hal_pwr_get_vcc_power_ready) + hal_pwr_set_main_power 0x00018207 Thumb Code 8 hal_pwr.o(i.hal_pwr_set_main_power) + hal_pwr_set_sleep_mode_power 0x0001820f Thumb Code 8 hal_pwr.o(i.hal_pwr_set_sleep_mode_power) + hal_pwr_set_stop_sleep_wakeup_pin 0x00018219 Thumb Code 86 hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) + hal_swire_deinit 0x0001827d Thumb Code 60 hal_swire.o(i.hal_swire_deinit) + hal_swire_enable 0x000182bd Thumb Code 86 hal_swire.o(i.hal_swire_enable) + hal_swire_init 0x00018319 Thumb Code 74 hal_swire.o(i.hal_swire_init) + hal_swire_set_pulse 0x00018371 Thumb Code 32 hal_swire.o(i.hal_swire_set_pulse) + hal_swire_set_timer 0x00018395 Thumb Code 60 hal_swire.o(i.hal_swire_set_timer) + hal_system_enable_systick 0x000183d5 Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x000183dd Thumb Code 192 hal_system.o(i.hal_system_init) + hal_system_updata_sysclk 0x000184c1 Thumb Code 60 hal_system.o(i.hal_system_updata_sysclk) + hal_timer_deinit 0x00018511 Thumb Code 48 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x00018541 Thumb Code 28 hal_timer.o(i.hal_timer_init) + hal_timer_set_repeat 0x0001855d Thumb Code 8 hal_timer.o(i.hal_timer_set_repeat) + hal_uart_init 0x00018595 Thumb Code 134 hal_uart.o(i.hal_uart_init) + hal_uart_send_blocking 0x00018629 Thumb Code 24 hal_uart.o(i.hal_uart_send_blocking) + hal_vsync_func_update 0x00018645 Thumb Code 18 hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) + hal_vsync_reset_lcdc_scaler 0x0001865d Thumb Code 206 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + main 0x0001873d Thumb Code 22 main.o(i.main) + tau_log_init 0x00019061 Thumb Code 48 tau_log.o(i.tau_log_init) + tau_log_printf 0x00019095 Thumb Code 116 tau_log.o(i.tau_log_printf) + tau_log_push_log 0x00019119 Thumb Code 118 tau_log.o(i.tau_log_push_log) + panel_init_code 0x000193bc Data 4393 rm_note11pro_demo.o(.constdata) + Region$$Table$$Base 0x0001a818 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001a838 Number 0 anon$$obj.o(Region$$Table) + note10_pro 0x00070004 Data 1 rm_note11pro_demo.o(.data) + s_pps 0x00070010 Data 128 rm_note11pro_demo.o(.data) + sg_uart0_tx_handle 0x0007012c Data 4 hal_uart.o(.data) + sg_uart0_rx_handle 0x00070130 Data 4 hal_uart.o(.data) + sg_uart1_tx_handle 0x00070134 Data 4 hal_uart.o(.data) + sg_uart1_rx_handle 0x00070138 Data 4 hal_uart.o(.data) + g_sof_gen_te_func 0x00070148 Data 4 hal_internal_vsync.o(.data) + hal_internal_vsync_handle_callback 0x0007014c Data 4 hal_internal_vsync.o(.data) + hal_internal_disp_end_handle_callback 0x00070150 Data 4 hal_internal_vsync.o(.data) + g_systick_cb_func 0x0007017c Data 4 drv_common.o(.data) + g_system_clock 0x00070180 Data 4 drv_common.o(.data) + g_system_delay_step 0x00070184 Data 1 drv_common.o(.data) + g_int_rxbr_irq0_cb_func 0x000701e8 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x000701ec Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x000701f0 Data 4 drv_vidc.o(.data) + dma_req_map 0x000702f4 Data 144 drv_dma.o(.data) + __stdout 0x00070384 Data 4 stdout.o(.data) + g_vsync_handle 0x00070610 Data 40 hal_internal_vsync.o(.bss) + sg_pro_motion_handle 0x00070638 Data 28 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00070654 Data 2048 hal_internal_dcs.o(.bss) + g_rx_fb_info 0x00070f54 Data 68 hal_internal_fb.o(.bss) + g_packet_fifo 0x0007101c Data 4204 dcs_packet_fifo.o(.bss) + __stack_limit 0x000720f8 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x000730f8 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000abc0, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000a988]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000a838, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 279 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 1838 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2146 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2149 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2151 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2153 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2154 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2156 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2158 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2147 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 280 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 1841 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 1843 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 1845 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 1847 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x0000000e Code RO 1849 .text mc_p.l(strlen.o) + 0x000101f6 0x000101f6 0x0000001a Code RO 1851 .text mc_p.l(memcmp.o) + 0x00010210 0x00010210 0x000000b2 Code RO 2116 .text mf_p.l(fadd.o) + 0x000102c2 0x000102c2 0x0000007a Code RO 2118 .text mf_p.l(fmul.o) + 0x0001033c 0x0001033c 0x0000007c Code RO 2120 .text mf_p.l(fdiv.o) + 0x000103b8 0x000103b8 0x00000018 Code RO 2122 .text mf_p.l(fscalb.o) + 0x000103d0 0x000103d0 0x00000164 Code RO 2124 .text mf_p.l(dadd.o) + 0x00010534 0x00010534 0x000000d0 Code RO 2126 .text mf_p.l(dmul.o) + 0x00010604 0x00010604 0x0000000e Code RO 2130 .text mf_p.l(ffltui.o) + 0x00010612 0x00010612 0x00000002 PAD + 0x00010614 0x00010614 0x0000001c Code RO 2132 .text mf_p.l(dfltui.o) + 0x00010630 0x00010630 0x00000028 Code RO 2134 .text mf_p.l(ffixui.o) + 0x00010658 0x00010658 0x0000003c Code RO 2136 .text mf_p.l(dfixui.o) + 0x00010694 0x00010694 0x00000028 Code RO 2138 .text mf_p.l(f2d.o) + 0x000106bc 0x000106bc 0x00000038 Code RO 2140 .text mf_p.l(d2f.o) + 0x000106f4 0x000106f4 0x00000014 Code RO 2142 .text mf_p.l(cfcmple.o) + 0x00010708 0x00010708 0x00000014 Code RO 2144 .text mf_p.l(cfrcmple.o) + 0x0001071c 0x0001071c 0x00000060 Code RO 2161 .text mc_p.l(uldiv.o) + 0x0001077c 0x0001077c 0x00000020 Code RO 2163 .text mc_p.l(llshl.o) + 0x0001079c 0x0001079c 0x00000022 Code RO 2165 .text mc_p.l(llushr.o) + 0x000107be 0x000107be 0x00000026 Code RO 2167 .text mc_p.l(llsshr.o) + 0x000107e4 0x000107e4 0x00000000 Code RO 2169 .text mc_p.l(iusefp.o) + 0x000107e4 0x000107e4 0x00000082 Code RO 2170 .text mf_p.l(fepilogue.o) + 0x00010866 0x00010866 0x000000be Code RO 2172 .text mf_p.l(depilogue.o) + 0x00010924 0x00010924 0x000000f0 Code RO 2176 .text mf_p.l(ddiv.o) + 0x00010a14 0x00010a14 0x00000040 Code RO 2178 .text mf_p.l(dfixul.o) + 0x00010a54 0x00010a54 0x00000028 Code RO 2180 .text mf_p.l(cdrcmple.o) + 0x00010a7c 0x00010a7c 0x00000024 Code RO 2182 .text mc_p.l(init.o) + 0x00010aa0 0x00010aa0 0x00000056 Code RO 2192 .text mc_p.l(__dczerorl2.o) + 0x00010af6 0x00010af6 0x00000002 PAD + 0x00010af8 0x00010af8 0x0000001c Code RO 920 i.AP_NRESET_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b14 0x00010b14 0x0000005c Code RO 1687 i.DMA_IRQn_Handler CVWL668T.lib(drv_dma.o) + 0x00010b70 0x00010b70 0x0000000a Code RO 921 i.EXTI_INT0_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b7a 0x00010b7a 0x0000000a Code RO 922 i.EXTI_INT1_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b84 0x00010b84 0x0000000a Code RO 923 i.EXTI_INT2_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b8e 0x00010b8e 0x0000000a Code RO 924 i.EXTI_INT3_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b98 0x00010b98 0x0000000a Code RO 925 i.EXTI_INT4_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010ba2 0x00010ba2 0x0000000a Code RO 926 i.EXTI_INT5_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010bac 0x00010bac 0x0000000a Code RO 927 i.EXTI_INT6_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010bb6 0x00010bb6 0x0000000a Code RO 928 i.EXTI_INT7_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010bc0 0x00010bc0 0x00000048 Code RO 843 i.HardFault_Handler CVWL668T.lib(drv_common.o) + 0x00010c08 0x00010c08 0x00000100 Code RO 688 i.LCDC_IRQn_Handler CVWL668T.lib(hal_internal_vsync.o) + 0x00010d08 0x00010d08 0x0000009a Code RO 1447 i.MEMC_IRQn_Handler CVWL668T.lib(drv_memc.o) + 0x00010da2 0x00010da2 0x00000002 PAD + 0x00010da4 0x00010da4 0x000000b8 Code RO 1253 i.MIPI_TX_IRQn_Handler CVWL668T.lib(drv_dsi_tx.o) + 0x00010e5c 0x00010e5c 0x00000078 Code RO 90 i.Note11Pro_demo rm_note11pro_demo.o + 0x00010ed4 0x00010ed4 0x00000030 Code RO 1082 i.SWIRE_IRQn_Handler CVWL668T.lib(drv_swire.o) + 0x00010f04 0x00010f04 0x00000018 Code RO 844 i.SysTick_Handler CVWL668T.lib(drv_common.o) + 0x00010f1c 0x00010f1c 0x0000000a Code RO 1125 i.TIMER0_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f26 0x00010f26 0x0000000a Code RO 1126 i.TIMER1_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f30 0x00010f30 0x0000000a Code RO 1127 i.TIMER2_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f3a 0x00010f3a 0x0000000a Code RO 1128 i.TIMER3_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f44 0x00010f44 0x0000001c Code RO 1602 i.VIDC_IRQn_Handler CVWL668T.lib(drv_vidc.o) + 0x00010f60 0x00010f60 0x0000001c Code RO 1513 i.VPRE1_IRQn_Handler CVWL668T.lib(drv_rxbr.o) + 0x00010f7c 0x00010f7c 0x0000006c Code RO 754 i.VPRE_IRQn_Handler CVWL668T.lib(hal_internal_dcs.o) + 0x00010fe8 0x00010fe8 0x00000018 Code RO 1515 i.__NVIC_EnableIRQ CVWL668T.lib(drv_rxbr.o) + 0x00011000 0x00011000 0x0000001c Data RO 851 .ARM.__at_0x11000 CVWL668T.lib(drv_common.o) + 0x0001101c 0x0001101c 0x00000010 Data RO 626 .ARM.__at_0x1101C CVWL668T.lib(tau_log.o) + 0x0001102c 0x0001102c 0x00000016 Data RO 427 .ARM.__at_0x1102C CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00011042 0x00011042 0x00000002 PAD + 0x00011044 0x00011044 0x00000364 Code RO 1192 i.MIPI_RX_IRQn_Handler CVWL668T.lib(drv_dsi_rx.o) + 0x000113a8 0x000113a8 0x00000180 Code RO 1750 i.UART_IRQn_Handler CVWL668T.lib(drv_uart.o) + 0x00011528 0x00011528 0x00000020 Code RO 2088 i.__0printf mc_p.l(printfa.o) + 0x00011548 0x00011548 0x00000024 Code RO 2094 i.__0vsprintf mc_p.l(printfa.o) + 0x0001156c 0x0001156c 0x0000002e Code RO 2174 i.__ARM_clz mf_p.l(depilogue.o) + 0x0001159a 0x0001159a 0x0000001a Code RO 374 i.__ARM_common_switch8 CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000115b4 0x000115b4 0x00000020 Code RO 1514 i.__NVIC_DisableIRQ CVWL668T.lib(drv_rxbr.o) + 0x000115d4 0x000115d4 0x0000000e Code RO 2186 i.__scatterload_copy mc_p.l(handlers.o) + 0x000115e2 0x000115e2 0x00000002 Code RO 2187 i.__scatterload_null mc_p.l(handlers.o) + 0x000115e4 0x000115e4 0x0000000e Code RO 2188 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x000115f2 0x000115f2 0x00000002 PAD + 0x000115f4 0x000115f4 0x00000174 Code RO 2095 i._fp_digits mc_p.l(printfa.o) + 0x00011768 0x00011768 0x000006ec Code RO 2096 i._printf_core mc_p.l(printfa.o) + 0x00011e54 0x00011e54 0x00000020 Code RO 2097 i._printf_post_padding mc_p.l(printfa.o) + 0x00011e74 0x00011e74 0x0000002c Code RO 2098 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011ea0 0x00011ea0 0x0000000a Code RO 2100 i._sputc mc_p.l(printfa.o) + 0x00011eaa 0x00011eaa 0x00000002 PAD + 0x00011eac 0x00011eac 0x00000078 Code RO 91 i.ap_dcs_read rm_note11pro_demo.o + 0x00011f24 0x00011f24 0x0000005c Code RO 92 i.ap_dcs_set_display_off rm_note11pro_demo.o + 0x00011f80 0x00011f80 0x00000048 Code RO 93 i.ap_dcs_set_display_on rm_note11pro_demo.o + 0x00011fc8 0x00011fc8 0x00000064 Code RO 94 i.ap_dcs_set_enter_sleep_mode rm_note11pro_demo.o + 0x0001202c 0x0001202c 0x00000044 Code RO 95 i.ap_dcs_set_exit_sleep_mode rm_note11pro_demo.o + 0x00012070 0x00012070 0x0000005c Code RO 96 i.ap_rstn_pull_down_cb rm_note11pro_demo.o + 0x000120cc 0x000120cc 0x00000018 Code RO 97 i.ap_rstn_pull_high_cb rm_note11pro_demo.o + 0x000120e4 0x000120e4 0x00000060 Code RO 98 i.ap_set_backlight rm_note11pro_demo.o + 0x00012144 0x00012144 0x00000090 Code RO 99 i.ap_update_frame_rate rm_note11pro_demo.o + 0x000121d4 0x000121d4 0x0000007c Code RO 100 i.ap_update_pps_9E rm_note11pro_demo.o + 0x00012250 0x00012250 0x0000002a Code RO 101 i.app_display_init rm_note11pro_demo.o + 0x0001227a 0x0001227a 0x00000002 PAD + 0x0001227c 0x0001227c 0x00000020 Code RO 102 i.app_gpio_init rm_note11pro_demo.o + 0x0001229c 0x0001229c 0x0000009c Code RO 103 i.app_init_panel rm_note11pro_demo.o + 0x00012338 0x00012338 0x000000b0 Code RO 104 i.app_mipi_rx_init rm_note11pro_demo.o + 0x000123e8 0x000123e8 0x00000070 Code RO 105 i.app_mipi_tx_init rm_note11pro_demo.o + 0x00012458 0x00012458 0x00000084 Code RO 106 i.app_mipi_tx_start rm_note11pro_demo.o + 0x000124dc 0x000124dc 0x000000e0 Code RO 107 i.app_system_suspend rm_note11pro_demo.o + 0x000125bc 0x000125bc 0x00000014 Code RO 108 i.app_tx_cmd_panel_te_cb rm_note11pro_demo.o + 0x000125d0 0x000125d0 0x00000020 Code RO 253 i.board_Init board.o + 0x000125f0 0x000125f0 0x000000c8 Code RO 1835 i.ceil m_ps.l(ceil.o) + 0x000126b8 0x000126b8 0x0000002c Code RO 689 i.check_mipi_rx_tx_video_info CVWL668T.lib(hal_internal_vsync.o) + 0x000126e4 0x000126e4 0x00000088 Code RO 755 i.check_pkt_buf_rev CVWL668T.lib(hal_internal_dcs.o) + 0x0001276c 0x0001276c 0x00000058 Code RO 1158 i.dcs_packet_fifo_alloc CVWL668T.lib(dcs_packet_fifo.o) + 0x000127c4 0x000127c4 0x00000018 Code RO 1159 i.dcs_packet_fifo_init CVWL668T.lib(dcs_packet_fifo.o) + 0x000127dc 0x000127dc 0x00000044 Code RO 1160 i.dcs_packet_free_fifo_header CVWL668T.lib(dcs_packet_fifo.o) + 0x00012820 0x00012820 0x00000024 Code RO 1161 i.dcs_packet_get_fifo_header CVWL668T.lib(dcs_packet_fifo.o) + 0x00012844 0x00012844 0x00000018 Code RO 613 i.delayMs CVWL668T.lib(tau_delay.o) + 0x0001285c 0x0001285c 0x0000002c Code RO 614 i.delayUs CVWL668T.lib(tau_delay.o) + 0x00012888 0x00012888 0x00000058 Code RO 846 i.drv_common_enable_systick CVWL668T.lib(drv_common.o) + 0x000128e0 0x000128e0 0x00000008 Code RO 849 i.drv_common_system_init CVWL668T.lib(drv_common.o) + 0x000128e8 0x000128e8 0x0000003c Code RO 868 i.drv_crgu_enable_clock CVWL668T.lib(drv_crgu.o) + 0x00012924 0x00012924 0x00000068 Code RO 871 i.drv_crgu_get_rxbr_clk CVWL668T.lib(drv_crgu.o) + 0x0001298c 0x0001298c 0x00000010 Code RO 874 i.drv_crgu_reset_modules CVWL668T.lib(drv_crgu.o) + 0x0001299c 0x0001299c 0x00000028 Code RO 875 i.drv_crgu_set_ahb_clk CVWL668T.lib(drv_crgu.o) + 0x000129c4 0x000129c4 0x00000010 Code RO 876 i.drv_crgu_set_clock_div CVWL668T.lib(drv_crgu.o) + 0x000129d4 0x000129d4 0x0000003c Code RO 878 i.drv_crgu_set_dpi_clk CVWL668T.lib(drv_crgu.o) + 0x00012a10 0x00012a10 0x00000038 Code RO 879 i.drv_crgu_set_dsc_clk CVWL668T.lib(drv_crgu.o) + 0x00012a48 0x00012a48 0x00000028 Code RO 880 i.drv_crgu_set_fb_clk CVWL668T.lib(drv_crgu.o) + 0x00012a70 0x00012a70 0x00000028 Code RO 881 i.drv_crgu_set_lcdc_clk CVWL668T.lib(drv_crgu.o) + 0x00012a98 0x00012a98 0x00000018 Code RO 882 i.drv_crgu_set_reset CVWL668T.lib(drv_crgu.o) + 0x00012ab0 0x00012ab0 0x00000028 Code RO 883 i.drv_crgu_set_rxbr_clk CVWL668T.lib(drv_crgu.o) + 0x00012ad8 0x00012ad8 0x00000028 Code RO 884 i.drv_crgu_set_vidc_clk CVWL668T.lib(drv_crgu.o) + 0x00012b00 0x00012b00 0x00000018 Code RO 1689 i.drv_dma_clear_status CVWL668T.lib(drv_dma.o) + 0x00012b18 0x00012b18 0x00000014 Code RO 1695 i.drv_dma_get_int_source CVWL668T.lib(drv_dma.o) + 0x00012b2c 0x00012b2c 0x0000001c Code RO 908 i.drv_dsc_dec_disable CVWL668T.lib(drv_dsc_dec.o) + 0x00012b48 0x00012b48 0x00000038 Code RO 909 i.drv_dsc_dec_enable CVWL668T.lib(drv_dsc_dec.o) + 0x00012b80 0x00012b80 0x00000020 Code RO 910 i.drv_dsc_dec_get_nslc CVWL668T.lib(drv_dsc_dec.o) + 0x00012ba0 0x00012ba0 0x0000001c Code RO 911 i.drv_dsc_dec_set_irqen CVWL668T.lib(drv_dsc_dec.o) + 0x00012bbc 0x00012bbc 0x0000010c Code RO 1193 i.drv_dsi_rx_calc_ipi_tx_delay CVWL668T.lib(drv_dsi_rx.o) + 0x00012cc8 0x00012cc8 0x00000040 Code RO 1194 i.drv_dsi_rx_enable_irq CVWL668T.lib(drv_dsi_rx.o) + 0x00012d08 0x00012d08 0x00000050 Code RO 1196 i.drv_dsi_rx_get_color_bpp CVWL668T.lib(drv_dsi_rx.o) + 0x00012d58 0x00012d58 0x0000001c Code RO 1197 i.drv_dsi_rx_get_color_pcc CVWL668T.lib(drv_dsi_rx.o) + 0x00012d74 0x00012d74 0x00000010 Code RO 1198 i.drv_dsi_rx_get_compression_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012d84 0x00012d84 0x00000010 Code RO 1199 i.drv_dsi_rx_get_ddi_crc_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012d94 0x00012d94 0x0000000c Code RO 1201 i.drv_dsi_rx_get_max_ret_size CVWL668T.lib(drv_dsi_rx.o) + 0x00012da0 0x00012da0 0x00000018 Code RO 1204 i.drv_dsi_rx_power_up CVWL668T.lib(drv_dsi_rx.o) + 0x00012db8 0x00012db8 0x0000001c Code RO 1205 i.drv_dsi_rx_set_check_crc CVWL668T.lib(drv_dsi_rx.o) + 0x00012dd4 0x00012dd4 0x00000024 Code RO 1206 i.drv_dsi_rx_set_ctrl_cfg CVWL668T.lib(drv_dsi_rx.o) + 0x00012df8 0x00012df8 0x00000010 Code RO 1207 i.drv_dsi_rx_set_ddi_cfg CVWL668T.lib(drv_dsi_rx.o) + 0x00012e08 0x00012e08 0x0000001c Code RO 1208 i.drv_dsi_rx_set_ddi_crc_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012e24 0x00012e24 0x0000000c Code RO 1211 i.drv_dsi_rx_set_inten CVWL668T.lib(drv_dsi_rx.o) + 0x00012e30 0x00012e30 0x00000010 Code RO 1212 i.drv_dsi_rx_set_ipi_cfg CVWL668T.lib(drv_dsi_rx.o) + 0x00012e40 0x00012e40 0x0000001c Code RO 1214 i.drv_dsi_rx_set_ipi_ycbcr_frmt CVWL668T.lib(drv_dsi_rx.o) + 0x00012e5c 0x00012e5c 0x00000014 Code RO 1215 i.drv_dsi_rx_set_lane_swap CVWL668T.lib(drv_dsi_rx.o) + 0x00012e70 0x00012e70 0x00000024 Code RO 1216 i.drv_dsi_rx_set_resp_cnt CVWL668T.lib(drv_dsi_rx.o) + 0x00012e94 0x00012e94 0x0000001c Code RO 1217 i.drv_dsi_rx_set_tear_resp_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012eb0 0x00012eb0 0x00000100 Code RO 1218 i.drv_dsi_rx_set_up_phy CVWL668T.lib(drv_dsi_rx.o) + 0x00012fb0 0x00012fb0 0x00000018 Code RO 1219 i.drv_dsi_rx_shut_down CVWL668T.lib(drv_dsi_rx.o) + 0x00012fc8 0x00012fc8 0x00000018 Code RO 1255 i.drv_dsi_tx_command_header CVWL668T.lib(drv_dsi_tx.o) + 0x00012fe0 0x00012fe0 0x00000058 Code RO 1256 i.drv_dsi_tx_command_mode_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x00013038 0x00013038 0x0000000c Code RO 1257 i.drv_dsi_tx_command_put_payload CVWL668T.lib(drv_dsi_tx.o) + 0x00013044 0x00013044 0x00000020 Code RO 1258 i.drv_dsi_tx_config_eotp CVWL668T.lib(drv_dsi_tx.o) + 0x00013064 0x00013064 0x0000000c Code RO 1259 i.drv_dsi_tx_config_int CVWL668T.lib(drv_dsi_tx.o) + 0x00013070 0x00013070 0x00000010 Code RO 1260 i.drv_dsi_tx_dpi_lpcmd_time CVWL668T.lib(drv_dsi_tx.o) + 0x00013080 0x00013080 0x00000010 Code RO 1261 i.drv_dsi_tx_dpi_mode CVWL668T.lib(drv_dsi_tx.o) + 0x00013090 0x00013090 0x00000024 Code RO 1262 i.drv_dsi_tx_dpi_polarity CVWL668T.lib(drv_dsi_tx.o) + 0x000130b4 0x000130b4 0x0000000c Code RO 1263 i.drv_dsi_tx_edpi_cmd_size CVWL668T.lib(drv_dsi_tx.o) + 0x000130c0 0x000130c0 0x0000000c Code RO 1265 i.drv_dsi_tx_get_cmd_status CVWL668T.lib(drv_dsi_tx.o) + 0x000130cc 0x000130cc 0x0000000c Code RO 1267 i.drv_dsi_tx_mode CVWL668T.lib(drv_dsi_tx.o) + 0x000130d8 0x000130d8 0x0000001c Code RO 1268 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL668T.lib(drv_dsi_tx.o) + 0x000130f4 0x000130f4 0x00000020 Code RO 1269 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL668T.lib(drv_dsi_tx.o) + 0x00013114 0x00013114 0x00000010 Code RO 1271 i.drv_dsi_tx_phy_lane_mode CVWL668T.lib(drv_dsi_tx.o) + 0x00013124 0x00013124 0x00000068 Code RO 1274 i.drv_dsi_tx_phy_status_ready CVWL668T.lib(drv_dsi_tx.o) + 0x0001318c 0x0001318c 0x00000044 Code RO 1275 i.drv_dsi_tx_phy_status_stopstate CVWL668T.lib(drv_dsi_tx.o) + 0x000131d0 0x000131d0 0x00000150 Code RO 1277 i.drv_dsi_tx_phy_test_setup CVWL668T.lib(drv_dsi_tx.o) + 0x00013320 0x00013320 0x00000020 Code RO 1278 i.drv_dsi_tx_phy_time_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x00013340 0x00013340 0x0000000c Code RO 1282 i.drv_dsi_tx_powerup CVWL668T.lib(drv_dsi_tx.o) + 0x0001334c 0x0001334c 0x00000024 Code RO 1283 i.drv_dsi_tx_response_mode CVWL668T.lib(drv_dsi_tx.o) + 0x00013370 0x00013370 0x0000001c Code RO 1286 i.drv_dsi_tx_set_bta_ack CVWL668T.lib(drv_dsi_tx.o) + 0x0001338c 0x0001338c 0x00000014 Code RO 1287 i.drv_dsi_tx_set_esc_div CVWL668T.lib(drv_dsi_tx.o) + 0x000133a0 0x000133a0 0x00000040 Code RO 1288 i.drv_dsi_tx_set_int CVWL668T.lib(drv_dsi_tx.o) + 0x000133e0 0x000133e0 0x00000018 Code RO 1289 i.drv_dsi_tx_set_time_out_div CVWL668T.lib(drv_dsi_tx.o) + 0x000133f8 0x000133f8 0x00000014 Code RO 1290 i.drv_dsi_tx_set_video_chunk CVWL668T.lib(drv_dsi_tx.o) + 0x0001340c 0x0001340c 0x00000024 Code RO 1291 i.drv_dsi_tx_set_video_timing CVWL668T.lib(drv_dsi_tx.o) + 0x00013430 0x00013430 0x0000000c Code RO 1293 i.drv_dsi_tx_shutdown CVWL668T.lib(drv_dsi_tx.o) + 0x0001343c 0x0001343c 0x0000002c Code RO 1294 i.drv_dsi_tx_timeout_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x00013468 0x00013468 0x000000e8 Code RO 1297 i.drv_dsi_tx_video_mode_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x00013550 0x00013550 0x00000036 Code RO 1795 i.drv_efuse_enter_inactive CVWL668T.lib(drv_efuse.o) + 0x00013586 0x00013586 0x0000000c Code RO 1798 i.drv_efuse_int_enable CVWL668T.lib(drv_efuse.o) + 0x00013592 0x00013592 0x0000003a Code RO 1799 i.drv_efuse_read CVWL668T.lib(drv_efuse.o) + 0x000135cc 0x000135cc 0x00000018 Code RO 1800 i.drv_efuse_read_req CVWL668T.lib(drv_efuse.o) + 0x000135e4 0x000135e4 0x00000024 Code RO 931 i.drv_gpio_handle_int CVWL668T.lib(drv_gpio.o) + 0x00013608 0x00013608 0x0000000c Code RO 932 i.drv_gpio_register_ap_reset_callback CVWL668T.lib(drv_gpio.o) + 0x00013614 0x00013614 0x00000014 Code RO 933 i.drv_gpio_register_callback CVWL668T.lib(drv_gpio.o) + 0x00013628 0x00013628 0x00000044 Code RO 935 i.drv_gpio_set_int CVWL668T.lib(drv_gpio.o) + 0x0001366c 0x0001366c 0x00000020 Code RO 936 i.drv_gpio_set_ioe CVWL668T.lib(drv_gpio.o) + 0x0001368c 0x0001368c 0x00000014 Code RO 937 i.drv_gpio_set_mode CVWL668T.lib(drv_gpio.o) + 0x000136a0 0x000136a0 0x00000020 Code RO 484 i.drv_gpio_set_output_data CVWL668T.lib(hal_gpio.o) + 0x000136c0 0x000136c0 0x00000028 Code RO 1359 i.drv_lcdc_bcsa_config CVWL668T.lib(drv_lcdc.o) + 0x000136e8 0x000136e8 0x0000002c Code RO 1360 i.drv_lcdc_cfg_int_frame CVWL668T.lib(drv_lcdc.o) + 0x00013714 0x00013714 0x00000018 Code RO 1361 i.drv_lcdc_clear_int CVWL668T.lib(drv_lcdc.o) + 0x0001372c 0x0001372c 0x00000034 Code RO 1363 i.drv_lcdc_cmd_start CVWL668T.lib(drv_lcdc.o) + 0x00013760 0x00013760 0x00000014 Code RO 1364 i.drv_lcdc_config_acc_command_mode CVWL668T.lib(drv_lcdc.o) + 0x00013774 0x00013774 0x00000038 Code RO 1365 i.drv_lcdc_config_int CVWL668T.lib(drv_lcdc.o) + 0x000137ac 0x000137ac 0x00000028 Code RO 1366 i.drv_lcdc_config_int_single CVWL668T.lib(drv_lcdc.o) + 0x000137d4 0x000137d4 0x00000018 Code RO 1367 i.drv_lcdc_config_overwrite_rgb CVWL668T.lib(drv_lcdc.o) + 0x000137ec 0x000137ec 0x00000050 Code RO 1368 i.drv_lcdc_config_src_parameter CVWL668T.lib(drv_lcdc.o) + 0x0001383c 0x0001383c 0x00000010 Code RO 1369 i.drv_lcdc_crop_hact CVWL668T.lib(drv_lcdc.o) + 0x0001384c 0x0001384c 0x00000038 Code RO 1370 i.drv_lcdc_ctrl_flow CVWL668T.lib(drv_lcdc.o) + 0x00013884 0x00013884 0x00000030 Code RO 1371 i.drv_lcdc_dith_config CVWL668T.lib(drv_lcdc.o) + 0x000138b4 0x000138b4 0x0000003c Code RO 1373 i.drv_lcdc_edge_dect_config CVWL668T.lib(drv_lcdc.o) + 0x000138f0 0x000138f0 0x00000064 Code RO 1374 i.drv_lcdc_edge_enh_config CVWL668T.lib(drv_lcdc.o) + 0x00013954 0x00013954 0x00000024 Code RO 1375 i.drv_lcdc_enable_shadow_reg CVWL668T.lib(drv_lcdc.o) + 0x00013978 0x00013978 0x0000001c Code RO 1376 i.drv_lcdc_endianness_config CVWL668T.lib(drv_lcdc.o) + 0x00013994 0x00013994 0x00000020 Code RO 1377 i.drv_lcdc_fc_config CVWL668T.lib(drv_lcdc.o) + 0x000139b4 0x000139b4 0x00000038 Code RO 1378 i.drv_lcdc_fixed_frame_output CVWL668T.lib(drv_lcdc.o) + 0x000139ec 0x000139ec 0x00000024 Code RO 1379 i.drv_lcdc_fldc_config CVWL668T.lib(drv_lcdc.o) + 0x00013a10 0x00013a10 0x00000024 Code RO 1380 i.drv_lcdc_function_disable CVWL668T.lib(drv_lcdc.o) + 0x00013a34 0x00013a34 0x00000024 Code RO 1381 i.drv_lcdc_function_enable CVWL668T.lib(drv_lcdc.o) + 0x00013a58 0x00013a58 0x0000003c Code RO 1392 i.drv_lcdc_set_int CVWL668T.lib(drv_lcdc.o) + 0x00013a94 0x00013a94 0x0000001c Code RO 1393 i.drv_lcdc_set_prefetch CVWL668T.lib(drv_lcdc.o) + 0x00013ab0 0x00013ab0 0x0000001c Code RO 1394 i.drv_lcdc_set_tear_line CVWL668T.lib(drv_lcdc.o) + 0x00013acc 0x00013acc 0x00000010 Code RO 1396 i.drv_lcdc_stop_display CVWL668T.lib(drv_lcdc.o) + 0x00013adc 0x00013adc 0x0000003c Code RO 1398 i.drv_lcdc_vid_hw_start CVWL668T.lib(drv_lcdc.o) + 0x00013b18 0x00013b18 0x00000018 Code RO 1400 i.drv_lcdc_vintp_mode_config CVWL668T.lib(drv_lcdc.o) + 0x00013b30 0x00013b30 0x00000014 Code RO 1448 i.drv_memc_clear_status CVWL668T.lib(drv_memc.o) + 0x00013b44 0x00013b44 0x00000040 Code RO 1449 i.drv_memc_enable_irq CVWL668T.lib(drv_memc.o) + 0x00013b84 0x00013b84 0x00000010 Code RO 1450 i.drv_memc_gen_a_tear_signal CVWL668T.lib(drv_memc.o) + 0x00013b94 0x00013b94 0x00000018 Code RO 1451 i.drv_memc_get_status CVWL668T.lib(drv_memc.o) + 0x00013bac 0x00013bac 0x00000010 Code RO 1452 i.drv_memc_get_tear_mode CVWL668T.lib(drv_memc.o) + 0x00013bbc 0x00013bbc 0x0000001c Code RO 1453 i.drv_memc_rate_transfer_sel CVWL668T.lib(drv_memc.o) + 0x00013bd8 0x00013bd8 0x00000014 Code RO 1454 i.drv_memc_sel_vsync CVWL668T.lib(drv_memc.o) + 0x00013bec 0x00013bec 0x00000018 Code RO 1455 i.drv_memc_set_active_height CVWL668T.lib(drv_memc.o) + 0x00013c04 0x00013c04 0x0000001c Code RO 1456 i.drv_memc_set_circ_mode_enable CVWL668T.lib(drv_memc.o) + 0x00013c20 0x00013c20 0x00000014 Code RO 1457 i.drv_memc_set_data_mode CVWL668T.lib(drv_memc.o) + 0x00013c34 0x00013c34 0x00000018 Code RO 1460 i.drv_memc_set_double_buffer CVWL668T.lib(drv_memc.o) + 0x00013c4c 0x00013c4c 0x0000001c Code RO 1464 i.drv_memc_set_frame_drop_select CVWL668T.lib(drv_memc.o) + 0x00013c68 0x00013c68 0x00000018 Code RO 1465 i.drv_memc_set_fs_en_conditions CVWL668T.lib(drv_memc.o) + 0x00013c80 0x00013c80 0x0000001c Code RO 1467 i.drv_memc_set_lcdc_st_conditions CVWL668T.lib(drv_memc.o) + 0x00013c9c 0x00013c9c 0x00000020 Code RO 1468 i.drv_memc_set_ltpo_mode CVWL668T.lib(drv_memc.o) + 0x00013cbc 0x00013cbc 0x00000018 Code RO 1469 i.drv_memc_set_ltpo_pu_thres CVWL668T.lib(drv_memc.o) + 0x00013cd4 0x00013cd4 0x00000014 Code RO 1473 i.drv_memc_set_tear_mode CVWL668T.lib(drv_memc.o) + 0x00013ce8 0x00013ce8 0x0000002c Code RO 1474 i.drv_memc_set_tear_waveform CVWL668T.lib(drv_memc.o) + 0x00013d14 0x00013d14 0x00000014 Code RO 1476 i.drv_memc_set_vidc_sync_cnt CVWL668T.lib(drv_memc.o) + 0x00013d28 0x00013d28 0x00000010 Code RO 1818 i.drv_phy_test_clear CVWL668T.lib(drv_phy_common.o) + 0x00013d38 0x00013d38 0x00000018 Code RO 1819 i.drv_phy_test_lock CVWL668T.lib(drv_phy_common.o) + 0x00013d50 0x00013d50 0x00000030 Code RO 967 i.drv_pwr_efuse_pd CVWL668T.lib(drv_pwr.o) + 0x00013d80 0x00013d80 0x0000004c Code RO 969 i.drv_pwr_enter_deep_sleep_mode CVWL668T.lib(drv_pwr.o) + 0x00013dcc 0x00013dcc 0x00000034 Code RO 971 i.drv_pwr_enter_sleep_mode_ex CVWL668T.lib(drv_pwr.o) + 0x00013e00 0x00013e00 0x00000098 Code RO 972 i.drv_pwr_enter_stop_sleep_mode CVWL668T.lib(drv_pwr.o) + 0x00013e98 0x00013e98 0x00000028 Code RO 973 i.drv_pwr_exit_sleep_mode CVWL668T.lib(drv_pwr.o) + 0x00013ec0 0x00013ec0 0x00000010 Code RO 976 i.drv_pwr_get_power_ready_st CVWL668T.lib(drv_pwr.o) + 0x00013ed0 0x00013ed0 0x00000028 Code RO 1008 i.drv_pwr_set_breath_screen_power_sel CVWL668T.lib(drv_pwr.o) + 0x00013ef8 0x00013ef8 0x00000028 Code RO 1009 i.drv_pwr_set_digit_power_sel CVWL668T.lib(drv_pwr.o) + 0x00013f20 0x00013f20 0x00000034 Code RO 1012 i.drv_pwr_set_pll_clk CVWL668T.lib(drv_pwr.o) + 0x00013f54 0x00013f54 0x0000002c Code RO 1016 i.drv_pwr_set_wakeup_type CVWL668T.lib(drv_pwr.o) + 0x00013f80 0x00013f80 0x00000020 Code RO 1019 i.drv_pwr_write_lock CVWL668T.lib(drv_pwr.o) + 0x00013fa0 0x00013fa0 0x00000010 Code RO 1516 i.drv_rxbr_clear_pkt_buffer CVWL668T.lib(drv_rxbr.o) + 0x00013fb0 0x00013fb0 0x0000000c Code RO 1517 i.drv_rxbr_clear_status0 CVWL668T.lib(drv_rxbr.o) + 0x00013fbc 0x00013fbc 0x0000005a Code RO 1520 i.drv_rxbr_enable_irq CVWL668T.lib(drv_rxbr.o) + 0x00014016 0x00014016 0x00000002 PAD + 0x00014018 0x00014018 0x0000001c Code RO 1521 i.drv_rxbr_frame_drop_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014034 0x00014034 0x00000018 Code RO 690 i.drv_rxbr_get_int_source CVWL668T.lib(hal_internal_vsync.o) + 0x0001404c 0x0001404c 0x00000018 Code RO 756 i.drv_rxbr_get_status0 CVWL668T.lib(hal_internal_dcs.o) + 0x00014064 0x00014064 0x00000014 Code RO 1530 i.drv_rxbr_hline_rcv0_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014078 0x00014078 0x00000014 Code RO 1531 i.drv_rxbr_hline_rcv1_cfg CVWL668T.lib(drv_rxbr.o) + 0x0001408c 0x0001408c 0x00000010 Code RO 1532 i.drv_rxbr_hline_rcv_cfg CVWL668T.lib(drv_rxbr.o) + 0x0001409c 0x0001409c 0x0000000c Code RO 1534 i.drv_rxbr_register_irq1_callback CVWL668T.lib(drv_rxbr.o) + 0x000140a8 0x000140a8 0x00000018 Code RO 1535 i.drv_rxbr_set_ack_pkt_header CVWL668T.lib(drv_rxbr.o) + 0x000140c0 0x000140c0 0x0000001c Code RO 1540 i.drv_rxbr_set_color_format CVWL668T.lib(drv_rxbr.o) + 0x000140dc 0x000140dc 0x00000024 Code RO 1543 i.drv_rxbr_set_filter_regs CVWL668T.lib(drv_rxbr.o) + 0x00014100 0x00014100 0x0000001c Code RO 1544 i.drv_rxbr_set_inten CVWL668T.lib(drv_rxbr.o) + 0x0001411c 0x0001411c 0x00000018 Code RO 1545 i.drv_rxbr_set_ltpo_drop_th CVWL668T.lib(drv_rxbr.o) + 0x00014134 0x00014134 0x00000040 Code RO 1549 i.drv_rxbr_set_usr_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014174 0x00014174 0x00000010 Code RO 1550 i.drv_rxbr_set_usr_col CVWL668T.lib(drv_rxbr.o) + 0x00014184 0x00014184 0x00000010 Code RO 1551 i.drv_rxbr_set_usr_row CVWL668T.lib(drv_rxbr.o) + 0x00014194 0x00014194 0x00000078 Code RO 1173 i.drv_se_init CVWL668T.lib(drv_se.o) + 0x0001420c 0x0001420c 0x000000d4 Code RO 1174 i.drv_se_set_dsc CVWL668T.lib(drv_se.o) + 0x000142e0 0x000142e0 0x00000088 Code RO 1175 i.drv_se_set_lcdc CVWL668T.lib(drv_se.o) + 0x00014368 0x00014368 0x00000068 Code RO 1176 i.drv_se_set_memc CVWL668T.lib(drv_se.o) + 0x000143d0 0x000143d0 0x000000d0 Code RO 1177 i.drv_se_set_rxbr CVWL668T.lib(drv_se.o) + 0x000144a0 0x000144a0 0x000000ac Code RO 1178 i.drv_se_set_vidc CVWL668T.lib(drv_se.o) + 0x0001454c 0x0001454c 0x00000014 Code RO 1179 i.drv_se_start_rx CVWL668T.lib(drv_se.o) + 0x00014560 0x00014560 0x0000001c Code RO 1083 i.drv_swire_enable CVWL668T.lib(drv_swire.o) + 0x0001457c 0x0001457c 0x0000000c Code RO 1084 i.drv_swire_get_pulse_count CVWL668T.lib(drv_swire.o) + 0x00014588 0x00014588 0x0000000c Code RO 1085 i.drv_swire_register_callback CVWL668T.lib(drv_swire.o) + 0x00014594 0x00014594 0x00000018 Code RO 1086 i.drv_swire_set_bit_time CVWL668T.lib(drv_swire.o) + 0x000145ac 0x000145ac 0x00000048 Code RO 1087 i.drv_swire_set_int CVWL668T.lib(drv_swire.o) + 0x000145f4 0x000145f4 0x0000001c Code RO 1088 i.drv_swire_set_power_down CVWL668T.lib(drv_swire.o) + 0x00014610 0x00014610 0x0000000c Code RO 1089 i.drv_swire_set_pulse_count CVWL668T.lib(drv_swire.o) + 0x0001461c 0x0001461c 0x0000001c Code RO 1090 i.drv_swire_set_trig_mode CVWL668T.lib(drv_swire.o) + 0x00014638 0x00014638 0x0000000c Code RO 1105 i.drv_sys_cfg_clear_all_int CVWL668T.lib(drv_sys_cfg.o) + 0x00014644 0x00014644 0x00000028 Code RO 1106 i.drv_sys_cfg_clear_pending CVWL668T.lib(drv_sys_cfg.o) + 0x0001466c 0x0001466c 0x00000024 Code RO 1107 i.drv_sys_cfg_sel_ap_rst_trig CVWL668T.lib(drv_sys_cfg.o) + 0x00014690 0x00014690 0x00000024 Code RO 1109 i.drv_sys_cfg_sel_gpio_group CVWL668T.lib(drv_sys_cfg.o) + 0x000146b4 0x000146b4 0x00000024 Code RO 1110 i.drv_sys_cfg_sel_int_trig CVWL668T.lib(drv_sys_cfg.o) + 0x000146d8 0x000146d8 0x00000018 Code RO 1111 i.drv_sys_cfg_sel_swire_timer CVWL668T.lib(drv_sys_cfg.o) + 0x000146f0 0x000146f0 0x00000024 Code RO 1112 i.drv_sys_cfg_set_int CVWL668T.lib(drv_sys_cfg.o) + 0x00014714 0x00014714 0x0000001a Code RO 1129 i.drv_timer_clear_status_flags CVWL668T.lib(drv_timer.o) + 0x0001472e 0x0001472e 0x00000020 Code RO 1130 i.drv_timer_enable CVWL668T.lib(drv_timer.o) + 0x0001474e 0x0001474e 0x00000002 PAD + 0x00014750 0x00014750 0x00000010 Code RO 1131 i.drv_timer_get_instance CVWL668T.lib(drv_timer.o) + 0x00014760 0x00014760 0x0000003c Code RO 1133 i.drv_timer_handle_interrupt CVWL668T.lib(drv_timer.o) + 0x0001479c 0x0001479c 0x00000040 Code RO 1135 i.drv_timer_set_compare_val CVWL668T.lib(drv_timer.o) + 0x000147dc 0x000147dc 0x00000048 Code RO 1136 i.drv_timer_set_int CVWL668T.lib(drv_timer.o) + 0x00014824 0x00014824 0x00000028 Code RO 1137 i.drv_timer_set_prescaler CVWL668T.lib(drv_timer.o) + 0x0001484c 0x0001484c 0x00000010 Code RO 1138 i.drv_timer_set_repeat CVWL668T.lib(drv_timer.o) + 0x0001485c 0x0001485c 0x00000020 Code RO 1299 i.drv_tx_phy_test_enter CVWL668T.lib(drv_dsi_tx.o) + 0x0001487c 0x0001487c 0x00000020 Code RO 1300 i.drv_tx_phy_test_exit CVWL668T.lib(drv_dsi_tx.o) + 0x0001489c 0x0001489c 0x00000028 Code RO 1303 i.drv_tx_phy_test_write_code CVWL668T.lib(drv_dsi_tx.o) + 0x000148c4 0x000148c4 0x00000034 Code RO 1751 i.drv_uart_abort_recv CVWL668T.lib(drv_uart.o) + 0x000148f8 0x000148f8 0x00000034 Code RO 1752 i.drv_uart_abort_send CVWL668T.lib(drv_uart.o) + 0x0001492c 0x0001492c 0x00000014 Code RO 1753 i.drv_uart_config_int CVWL668T.lib(drv_uart.o) + 0x00014940 0x00014940 0x00000018 Code RO 1755 i.drv_uart_enable_clk CVWL668T.lib(drv_uart.o) + 0x00014958 0x00014958 0x0000005c Code RO 1756 i.drv_uart_enable_int CVWL668T.lib(drv_uart.o) + 0x000149b4 0x000149b4 0x00000028 Code RO 1758 i.drv_uart_get_instance CVWL668T.lib(drv_uart.o) + 0x000149dc 0x000149dc 0x000000ce Code RO 1759 i.drv_uart_init CVWL668T.lib(drv_uart.o) + 0x00014aaa 0x00014aaa 0x00000002 PAD + 0x00014aac 0x00014aac 0x0000003c Code RO 1760 i.drv_uart_int_trans_handle CVWL668T.lib(drv_uart.o) + 0x00014ae8 0x00014ae8 0x0000001c Code RO 1763 i.drv_uart_reset_rx_fifo CVWL668T.lib(drv_uart.o) + 0x00014b04 0x00014b04 0x0000001c Code RO 1764 i.drv_uart_reset_tx_fifo CVWL668T.lib(drv_uart.o) + 0x00014b20 0x00014b20 0x0000001a Code RO 1765 i.drv_uart_send_blocking CVWL668T.lib(drv_uart.o) + 0x00014b3a 0x00014b3a 0x00000054 Code RO 1767 i.drv_uart_set_baud_rate CVWL668T.lib(drv_uart.o) + 0x00014b8e 0x00014b8e 0x00000002 PAD + 0x00014b90 0x00014b90 0x0000004c Code RO 1768 i.drv_uart_trans_create_handle CVWL668T.lib(drv_uart.o) + 0x00014bdc 0x00014bdc 0x00000010 Code RO 1603 i.drv_vidc_clear_irq CVWL668T.lib(drv_vidc.o) + 0x00014bec 0x00014bec 0x00000020 Code RO 1607 i.drv_vidc_enable CVWL668T.lib(drv_vidc.o) + 0x00014c0c 0x00014c0c 0x00000040 Code RO 1608 i.drv_vidc_enable_irq CVWL668T.lib(drv_vidc.o) + 0x00014c4c 0x00014c4c 0x0000002c Code RO 1609 i.drv_vidc_get_int_source CVWL668T.lib(drv_vidc.o) + 0x00014c78 0x00014c78 0x00000018 Code RO 1610 i.drv_vidc_get_irq_status CVWL668T.lib(drv_vidc.o) + 0x00014c90 0x00014c90 0x0000002c Code RO 1614 i.drv_vidc_init_module_enable CVWL668T.lib(drv_vidc.o) + 0x00014cbc 0x00014cbc 0x0000000c Code RO 1615 i.drv_vidc_register_callback CVWL668T.lib(drv_vidc.o) + 0x00014cc8 0x00014cc8 0x0000000c Code RO 1616 i.drv_vidc_reset CVWL668T.lib(drv_vidc.o) + 0x00014cd4 0x00014cd4 0x0000001c Code RO 1617 i.drv_vidc_set_circ_mode_enable CVWL668T.lib(drv_vidc.o) + 0x00014cf0 0x00014cf0 0x00000038 Code RO 1618 i.drv_vidc_set_dither_config CVWL668T.lib(drv_vidc.o) + 0x00014d28 0x00014d28 0x0000005c Code RO 1620 i.drv_vidc_set_dst_parameter CVWL668T.lib(drv_vidc.o) + 0x00014d84 0x00014d84 0x0000000c Code RO 1622 i.drv_vidc_set_honly_hcoef0 CVWL668T.lib(drv_vidc.o) + 0x00014d90 0x00014d90 0x0000002c Code RO 1623 i.drv_vidc_set_honly_hinitb CVWL668T.lib(drv_vidc.o) + 0x00014dbc 0x00014dbc 0x00000030 Code RO 1624 i.drv_vidc_set_honly_hinitr CVWL668T.lib(drv_vidc.o) + 0x00014dec 0x00014dec 0x0000001c Code RO 1627 i.drv_vidc_set_irqen CVWL668T.lib(drv_vidc.o) + 0x00014e08 0x00014e08 0x00000014 Code RO 1628 i.drv_vidc_set_mirror CVWL668T.lib(drv_vidc.o) + 0x00014e1c 0x00014e1c 0x0000001c Code RO 1631 i.drv_vidc_set_pentile_swap CVWL668T.lib(drv_vidc.o) + 0x00014e38 0x00014e38 0x0000000c Code RO 1632 i.drv_vidc_set_pu_ctrl CVWL668T.lib(drv_vidc.o) + 0x00014e44 0x00014e44 0x00000018 Code RO 1633 i.drv_vidc_set_rotation CVWL668T.lib(drv_vidc.o) + 0x00014e5c 0x00014e5c 0x0000000c Code RO 1634 i.drv_vidc_set_scld_hcoef0 CVWL668T.lib(drv_vidc.o) + 0x00014e68 0x00014e68 0x0000000c Code RO 1635 i.drv_vidc_set_scld_hcoef1 CVWL668T.lib(drv_vidc.o) + 0x00014e74 0x00014e74 0x00000014 Code RO 1636 i.drv_vidc_set_scld_step CVWL668T.lib(drv_vidc.o) + 0x00014e88 0x00014e88 0x0000000c Code RO 1637 i.drv_vidc_set_scld_vcoef0 CVWL668T.lib(drv_vidc.o) + 0x00014e94 0x00014e94 0x0000000c Code RO 1638 i.drv_vidc_set_scld_vcoef1 CVWL668T.lib(drv_vidc.o) + 0x00014ea0 0x00014ea0 0x00000020 Code RO 1639 i.drv_vidc_set_src_parameter CVWL668T.lib(drv_vidc.o) + 0x00014ec0 0x00014ec0 0x00000038 Code RO 1640 i.drv_vidc_set_vintp_config CVWL668T.lib(drv_vidc.o) + 0x00014ef8 0x00014ef8 0x00000034 Code RO 622 i.fputc CVWL668T.lib(tau_log.o) + 0x00014f2c 0x00014f2c 0x00000040 Code RO 784 i.ha_intl_fb_check_pu_size CVWL668T.lib(hal_internal_fb.o) + 0x00014f6c 0x00014f6c 0x00000040 Code RO 288 i.hal_dsi_rx_ctrl_create_handle CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00014fac 0x00014fac 0x00000040 Code RO 289 i.hal_dsi_rx_ctrl_dcs_async_handler CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00014fec 0x00014fec 0x00000094 Code RO 290 i.hal_dsi_rx_ctrl_deinit CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015080 0x00015080 0x00000008 Code RO 296 i.hal_dsi_rx_ctrl_get_compressen_en CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015088 0x00015088 0x00000020 Code RO 297 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000150a8 0x000150a8 0x000000ac Code RO 298 i.hal_dsi_rx_ctrl_init CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015154 0x00015154 0x00000100 Code RO 299 i.hal_dsi_rx_ctrl_init_clk CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015254 0x00015254 0x00000108 Code RO 300 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001535c 0x0001535c 0x0000012c Code RO 301 i.hal_dsi_rx_ctrl_init_memc CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015488 0x00015488 0x00000148 Code RO 302 i.hal_dsi_rx_ctrl_init_rxbr CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000155d0 0x000155d0 0x00000280 Code RO 303 i.hal_dsi_rx_ctrl_init_vidc CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015850 0x00015850 0x00000038 Code RO 304 i.hal_dsi_rx_ctrl_pre_init_pps CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015888 0x00015888 0x000000f0 Code RO 309 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015978 0x00015978 0x00000018 Code RO 313 i.hal_dsi_rx_ctrl_set_check_crc CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015990 0x00015990 0x00000030 Code RO 316 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000159c0 0x000159c0 0x00000030 Code RO 322 i.hal_dsi_rx_ctrl_start CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000159f0 0x000159f0 0x00000030 Code RO 323 i.hal_dsi_rx_ctrl_stop CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015a20 0x00015a20 0x0000000a Code RO 324 i.hal_dsi_rx_ctrl_toggle_input_frame_rate CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015a2a 0x00015a2a 0x00000002 PAD + 0x00015a2c 0x00015a2c 0x00000020 Code RO 325 i.hal_dsi_rx_ctrl_toggle_resolution CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015a4c 0x00015a4c 0x00000280 Code RO 378 i.hal_dsi_tx_cmd_mode_cal_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015ccc 0x00015ccc 0x00000038 Code RO 380 i.hal_dsi_tx_ctrl_create_handle CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015d04 0x00015d04 0x00000074 Code RO 381 i.hal_dsi_tx_ctrl_deinit CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015d78 0x00015d78 0x0000000c Code RO 383 i.hal_dsi_tx_ctrl_gen_a_frame CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015d84 0x00015d84 0x00000022 Code RO 384 i.hal_dsi_tx_ctrl_gen_a_tear_signal CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015da6 0x00015da6 0x00000002 PAD + 0x00015da8 0x00015da8 0x0000007c Code RO 386 i.hal_dsi_tx_ctrl_init CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015e24 0x00015e24 0x00000010 Code RO 387 i.hal_dsi_tx_ctrl_init_clk CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015e34 0x00015e34 0x00000008 Code RO 400 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015e3c 0x00015e3c 0x0000000a Code RO 401 i.hal_dsi_tx_ctrl_set_tear_mode CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015e46 0x00015e46 0x00000002 PAD + 0x00015e48 0x00015e48 0x00000090 Code RO 403 i.hal_dsi_tx_ctrl_start CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015ed8 0x00015ed8 0x00000038 Code RO 404 i.hal_dsi_tx_ctrl_stop CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015f10 0x00015f10 0x000000f4 Code RO 406 i.hal_dsi_tx_ctrl_write_array_cmd CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016004 0x00016004 0x000000d0 Code RO 407 i.hal_dsi_tx_ctrl_write_cmd CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000160d4 0x000160d4 0x00000104 Code RO 408 i.hal_dsi_tx_init_cfg CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000161d8 0x000161d8 0x00000044 Code RO 409 i.hal_dsi_tx_init_dpi_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0001621c 0x0001621c 0x00000016 Code RO 410 i.hal_dsi_tx_init_phy_cfg CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016232 0x00016232 0x00000052 Code RO 411 i.hal_dsi_tx_init_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016284 0x00016284 0x00000054 Code RO 412 i.hal_dsi_tx_init_vid_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000162d8 0x000162d8 0x00000040 Code RO 413 i.hal_dsi_tx_send_cmd CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016318 0x00016318 0x00000094 Code RO 414 i.hal_dsi_tx_timing_info_update CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000163ac 0x000163ac 0x00000310 Code RO 415 i.hal_dsi_tx_vid_mode_cal_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000166bc 0x000166bc 0x0000003a Code RO 485 i.hal_gpio_config_pad CVWL668T.lib(hal_gpio.o) + 0x000166f6 0x000166f6 0x00000002 PAD + 0x000166f8 0x000166f8 0x00000018 Code RO 486 i.hal_gpio_ctrl_eint CVWL668T.lib(hal_gpio.o) + 0x00016710 0x00016710 0x00000040 Code RO 490 i.hal_gpio_init_eint CVWL668T.lib(hal_gpio.o) + 0x00016750 0x00016750 0x00000016 Code RO 491 i.hal_gpio_init_input CVWL668T.lib(hal_gpio.o) + 0x00016766 0x00016766 0x0000001c Code RO 492 i.hal_gpio_init_output CVWL668T.lib(hal_gpio.o) + 0x00016782 0x00016782 0x00000002 PAD + 0x00016784 0x00016784 0x0000001c Code RO 493 i.hal_gpio_reg_eint_cb CVWL668T.lib(hal_gpio.o) + 0x000167a0 0x000167a0 0x00000050 Code RO 494 i.hal_gpio_set_ap_reset_int CVWL668T.lib(hal_gpio.o) + 0x000167f0 0x000167f0 0x00000060 Code RO 497 i.hal_gpio_set_mode CVWL668T.lib(hal_gpio.o) + 0x00016850 0x00016850 0x00000008 Code RO 498 i.hal_gpio_set_output_data CVWL668T.lib(hal_gpio.o) + 0x00016858 0x00016858 0x00000010 Code RO 692 i.hal_internal_sync_get_hight_performan_mode CVWL668T.lib(hal_internal_vsync.o) + 0x00016868 0x00016868 0x000001b4 Code RO 693 i.hal_internal_sync_input_resolution_change CVWL668T.lib(hal_internal_vsync.o) + 0x00016a1c 0x00016a1c 0x0000000c Code RO 694 i.hal_internal_sync_register_lcdc_cb CVWL668T.lib(hal_internal_vsync.o) + 0x00016a28 0x00016a28 0x00000020 Code RO 697 i.hal_internal_vsync_deinit CVWL668T.lib(hal_internal_vsync.o) + 0x00016a48 0x00016a48 0x0000000c Code RO 698 i.hal_internal_vsync_get_rx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016a54 0x00016a54 0x00000014 Code RO 699 i.hal_internal_vsync_get_sync_line CVWL668T.lib(hal_internal_vsync.o) + 0x00016a68 0x00016a68 0x0000000c Code RO 700 i.hal_internal_vsync_get_tx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016a74 0x00016a74 0x000000e8 Code RO 701 i.hal_internal_vsync_init_rx CVWL668T.lib(hal_internal_vsync.o) + 0x00016b5c 0x00016b5c 0x000000c8 Code RO 702 i.hal_internal_vsync_init_tx CVWL668T.lib(hal_internal_vsync.o) + 0x00016c24 0x00016c24 0x00000020 Code RO 703 i.hal_internal_vsync_set_rx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016c44 0x00016c44 0x000001ec Code RO 705 i.hal_internal_vsync_set_tear_mode CVWL668T.lib(hal_internal_vsync.o) + 0x00016e30 0x00016e30 0x00000058 Code RO 706 i.hal_internal_vsync_set_tx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016e88 0x00016e88 0x00000086 Code RO 707 i.hal_internal_vsync_toggle_input_frame_rate CVWL668T.lib(hal_internal_vsync.o) + 0x00016f0e 0x00016f0e 0x00000002 PAD + 0x00016f10 0x00016f10 0x0000006c Code RO 757 i.hal_intl_dcs_init_sw_fltr CVWL668T.lib(hal_internal_dcs.o) + 0x00016f7c 0x00016f7c 0x00000430 Code RO 759 i.hal_intl_dcs_rx_get_dcs_packet_data CVWL668T.lib(hal_internal_dcs.o) + 0x000173ac 0x000173ac 0x00000088 Code RO 760 i.hal_intl_dcs_rx_receive_packet CVWL668T.lib(hal_internal_dcs.o) + 0x00017434 0x00017434 0x00000174 Code RO 761 i.hal_intl_dcs_rx_receive_pps CVWL668T.lib(hal_internal_dcs.o) + 0x000175a8 0x000175a8 0x0000008c Code RO 762 i.hal_intl_dcs_set_auto_hw_filter CVWL668T.lib(hal_internal_dcs.o) + 0x00017634 0x00017634 0x0000002c Code RO 764 i.hal_intl_dcs_sw_filter_handle CVWL668T.lib(hal_internal_dcs.o) + 0x00017660 0x00017660 0x00000318 Code RO 785 i.hal_intl_fb_cal_fb_info CVWL668T.lib(hal_internal_fb.o) + 0x00017978 0x00017978 0x00000064 Code RO 786 i.hal_intl_fb_check_bandwidth CVWL668T.lib(hal_internal_fb.o) + 0x000179dc 0x000179dc 0x000000dc Code RO 787 i.hal_intl_fb_edge_resize CVWL668T.lib(hal_internal_fb.o) + 0x00017ab8 0x00017ab8 0x00000074 Code RO 788 i.hal_intl_fb_flow_control_adapter CVWL668T.lib(hal_internal_fb.o) + 0x00017b2c 0x00017b2c 0x0000000c Code RO 789 i.hal_intl_fb_get_memc_flow_mode CVWL668T.lib(hal_internal_fb.o) + 0x00017b38 0x00017b38 0x00000010 Code RO 790 i.hal_intl_fb_get_rx_fb_info CVWL668T.lib(hal_internal_fb.o) + 0x00017b48 0x00017b48 0x00000010 Code RO 791 i.hal_intl_fb_get_tx_fb_info CVWL668T.lib(hal_internal_fb.o) + 0x00017b58 0x00017b58 0x0000000c Code RO 792 i.hal_intl_fb_get_user_flow CVWL668T.lib(hal_internal_fb.o) + 0x00017b64 0x00017b64 0x00000028 Code RO 810 i.hal_intl_svs_deinit_rx CVWL668T.lib(hal_internal_svs.o) + 0x00017b8c 0x00017b8c 0x00000010 Code RO 811 i.hal_intl_svs_deinit_tx CVWL668T.lib(hal_internal_svs.o) + 0x00017b9c 0x00017b9c 0x00000024 Code RO 812 i.hal_intl_svs_handle CVWL668T.lib(hal_internal_svs.o) + 0x00017bc0 0x00017bc0 0x00000080 Code RO 813 i.hal_intl_svs_init_rx CVWL668T.lib(hal_internal_svs.o) + 0x00017c40 0x00017c40 0x00000014 Code RO 814 i.hal_intl_svs_init_tx CVWL668T.lib(hal_internal_svs.o) + 0x00017c54 0x00017c54 0x00000070 Code RO 815 i.hal_intl_svs_set_input_frate CVWL668T.lib(hal_internal_svs.o) + 0x00017cc4 0x00017cc4 0x0000000c Code RO 816 i.hal_intl_svs_set_rx_vtt CVWL668T.lib(hal_internal_svs.o) + 0x00017cd0 0x00017cd0 0x00000048 Code RO 818 i.hal_intl_svs_update_rxbr_clk CVWL668T.lib(hal_internal_svs.o) + 0x00017d18 0x00017d18 0x00000070 Code RO 416 i.hal_lcdc_displayproc_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017d88 0x00017d88 0x0000003e Code RO 417 i.hal_lcdc_init_cfg CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017dc6 0x00017dc6 0x00000070 Code RO 418 i.hal_lcdc_init_clk CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017e36 0x00017e36 0x00000002 PAD + 0x00017e38 0x00017e38 0x00000128 Code RO 419 i.hal_lcdc_postproc_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017f60 0x00017f60 0x00000024 Code RO 420 i.hal_lcdc_start CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017f84 0x00017f84 0x0000003c Code RO 421 i.hal_lcdc_timinggen_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017fc0 0x00017fc0 0x000000e0 Code RO 422 i.hal_lcdc_upscaler_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000180a0 0x000180a0 0x000000bc Code RO 424 i.hal_nonshadow_func_update CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0001815c 0x0001815c 0x0000002a Code RO 571 i.hal_pwr_enter_deep_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x00018186 0x00018186 0x00000008 Code RO 572 i.hal_pwr_enter_normal_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x0001818e 0x0001818e 0x00000002 PAD + 0x00018190 0x00018190 0x00000064 Code RO 573 i.hal_pwr_enter_stop_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x000181f4 0x000181f4 0x0000000a Code RO 574 i.hal_pwr_exit_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x000181fe 0x000181fe 0x00000008 Code RO 576 i.hal_pwr_get_vcc_power_ready CVWL668T.lib(hal_pwr.o) + 0x00018206 0x00018206 0x00000008 Code RO 581 i.hal_pwr_set_main_power CVWL668T.lib(hal_pwr.o) + 0x0001820e 0x0001820e 0x00000008 Code RO 583 i.hal_pwr_set_sleep_mode_power CVWL668T.lib(hal_pwr.o) + 0x00018216 0x00018216 0x00000002 PAD + 0x00018218 0x00018218 0x00000064 Code RO 584 i.hal_pwr_set_stop_sleep_wakeup_pin CVWL668T.lib(hal_pwr.o) + 0x0001827c 0x0001827c 0x00000040 Code RO 525 i.hal_swire_deinit CVWL668T.lib(hal_swire.o) + 0x000182bc 0x000182bc 0x0000005c Code RO 526 i.hal_swire_enable CVWL668T.lib(hal_swire.o) + 0x00018318 0x00018318 0x00000058 Code RO 527 i.hal_swire_init CVWL668T.lib(hal_swire.o) + 0x00018370 0x00018370 0x00000024 Code RO 529 i.hal_swire_set_pulse CVWL668T.lib(hal_swire.o) + 0x00018394 0x00018394 0x00000040 Code RO 530 i.hal_swire_set_timer CVWL668T.lib(hal_swire.o) + 0x000183d4 0x000183d4 0x00000008 Code RO 546 i.hal_system_enable_systick CVWL668T.lib(hal_system.o) + 0x000183dc 0x000183dc 0x000000e4 Code RO 550 i.hal_system_init CVWL668T.lib(hal_system.o) + 0x000184c0 0x000184c0 0x00000050 Code RO 553 i.hal_system_updata_sysclk CVWL668T.lib(hal_system.o) + 0x00018510 0x00018510 0x00000030 Code RO 638 i.hal_timer_deinit CVWL668T.lib(hal_timer.o) + 0x00018540 0x00018540 0x0000001c Code RO 640 i.hal_timer_init CVWL668T.lib(hal_timer.o) + 0x0001855c 0x0001855c 0x00000008 Code RO 641 i.hal_timer_set_repeat CVWL668T.lib(hal_timer.o) + 0x00018564 0x00018564 0x00000030 Code RO 425 i.hal_tx_frame_rate_adjust CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018594 0x00018594 0x00000094 Code RO 664 i.hal_uart_init CVWL668T.lib(hal_uart.o) + 0x00018628 0x00018628 0x0000001c Code RO 667 i.hal_uart_send_blocking CVWL668T.lib(hal_uart.o) + 0x00018644 0x00018644 0x00000018 Code RO 426 i.hal_vsync_func_update CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0001865c 0x0001865c 0x000000e0 Code RO 708 i.hal_vsync_reset_lcdc_scaler CVWL668T.lib(hal_internal_vsync.o) + 0x0001873c 0x0001873c 0x00000038 Code RO 3 i.main main.o + 0x00018774 0x00018774 0x000000a4 Code RO 109 i.pps_update_handle rm_note11pro_demo.o + 0x00018818 0x00018818 0x000002f4 Code RO 709 i.rxbr_irq1_callback CVWL668T.lib(hal_internal_vsync.o) + 0x00018b0c 0x00018b0c 0x00000044 Code RO 710 i.soft_double_buffer_update CVWL668T.lib(hal_internal_vsync.o) + 0x00018b50 0x00018b50 0x0000006c Code RO 711 i.soft_gen_te CVWL668T.lib(hal_internal_vsync.o) + 0x00018bbc 0x00018bbc 0x000000e0 Code RO 712 i.soft_gen_te_double_buffer CVWL668T.lib(hal_internal_vsync.o) + 0x00018c9c 0x00018c9c 0x00000038 Code RO 713 i.soft_pro_motion_init CVWL668T.lib(hal_internal_vsync.o) + 0x00018cd4 0x00018cd4 0x00000024 Code RO 714 i.soft_tear_adjust_line CVWL668T.lib(hal_internal_vsync.o) + 0x00018cf8 0x00018cf8 0x00000018 Code RO 587 i.stop_sleep_cb CVWL668T.lib(hal_pwr.o) + 0x00018d10 0x00018d10 0x000000ac Code RO 819 i.svs_direct_mode_setting CVWL668T.lib(hal_internal_svs.o) + 0x00018dbc 0x00018dbc 0x0000001c Code RO 820 i.svs_get_rel_intv CVWL668T.lib(hal_internal_svs.o) + 0x00018dd8 0x00018dd8 0x000000b0 Code RO 821 i.svs_sync_handle CVWL668T.lib(hal_internal_svs.o) + 0x00018e88 0x00018e88 0x000000cc Code RO 822 i.svs_wait_fr_stab CVWL668T.lib(hal_internal_svs.o) + 0x00018f54 0x00018f54 0x0000010c Code RO 823 i.svs_wait_start CVWL668T.lib(hal_internal_svs.o) + 0x00019060 0x00019060 0x00000034 Code RO 623 i.tau_log_init CVWL668T.lib(tau_log.o) + 0x00019094 0x00019094 0x00000084 Code RO 624 i.tau_log_printf CVWL668T.lib(tau_log.o) + 0x00019118 0x00019118 0x00000076 Code RO 625 i.tau_log_push_log CVWL668T.lib(tau_log.o) + 0x0001918e 0x0001918e 0x00000002 PAD + 0x00019190 0x00019190 0x000000b4 Code RO 715 i.vidc_callback CVWL668T.lib(hal_internal_vsync.o) + 0x00019244 0x00019244 0x00000118 Code RO 716 i.vpre_err_reset CVWL668T.lib(hal_internal_vsync.o) + 0x0001935c 0x0001935c 0x00001220 Data RO 110 .constdata rm_note11pro_demo.o + 0x0001a57c 0x0001a57c 0x00000028 Data RO 328 .constdata CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001a5a4 0x0001a5a4 0x0000001c Data RO 429 .constdata CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0001a5c0 0x0001a5c0 0x000000b6 Data RO 502 .constdata CVWL668T.lib(hal_gpio.o) + 0x0001a676 0x0001a676 0x00000002 PAD + 0x0001a678 0x0001a678 0x00000030 Data RO 669 .constdata CVWL668T.lib(hal_uart.o) + 0x0001a6a8 0x0001a6a8 0x00000010 Data RO 1770 .constdata CVWL668T.lib(drv_uart.o) + 0x0001a6b8 0x0001a6b8 0x00000043 Data RO 111 .conststring rm_note11pro_demo.o + 0x0001a6fb 0x0001a6fb 0x00000001 PAD + 0x0001a6fc 0x0001a6fc 0x00000042 Data RO 329 .conststring CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001a73e 0x0001a73e 0x00000002 PAD + 0x0001a740 0x0001a740 0x00000090 Data RO 718 .conststring CVWL668T.lib(hal_internal_vsync.o) + 0x0001a7d0 0x0001a7d0 0x00000046 Data RO 767 .conststring CVWL668T.lib(hal_internal_dcs.o) + 0x0001a816 0x0001a816 0x00000002 PAD + 0x0001a818 0x0001a818 0x00000020 Data RO 2184 Region$$Table anon$$obj.o + + + Execution Region RW_IRAM1 (Exec base: 0x00070000, Load base: 0x0001a838, Size: 0x000030f8, Max: 0x00008000, ABSOLUTE, COMPRESSED[0x00000150]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070000 COMPRESSED 0x00000090 Data RW 112 .data rm_note11pro_demo.o + 0x00070090 COMPRESSED 0x00000030 Data RW 330 .data CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000700c0 COMPRESSED 0x0000005c Data RW 430 .data CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0007011c COMPRESSED 0x00000002 Data RW 532 .data CVWL668T.lib(hal_swire.o) + 0x0007011e COMPRESSED 0x00000002 PAD + 0x00070120 COMPRESSED 0x00000008 Data RW 588 .data CVWL668T.lib(hal_pwr.o) + 0x00070128 COMPRESSED 0x00000001 Data RW 628 .data CVWL668T.lib(tau_log.o) + 0x00070129 COMPRESSED 0x00000003 PAD + 0x0007012c COMPRESSED 0x00000018 Data RW 670 .data CVWL668T.lib(hal_uart.o) + 0x00070144 COMPRESSED 0x00000010 Data RW 719 .data CVWL668T.lib(hal_internal_vsync.o) + 0x00070154 COMPRESSED 0x00000024 Data RW 768 .data CVWL668T.lib(hal_internal_dcs.o) + 0x00070178 COMPRESSED 0x0000000c Data RW 852 .data CVWL668T.lib(drv_common.o) + 0x00070184 COMPRESSED 0x00000001 Data RW 853 .data CVWL668T.lib(drv_common.o) + 0x00070185 COMPRESSED 0x00000003 PAD + 0x00070188 COMPRESSED 0x00000004 Data RW 939 .data CVWL668T.lib(drv_gpio.o) + 0x0007018c COMPRESSED 0x00000004 Data RW 1091 .data CVWL668T.lib(drv_swire.o) + 0x00070190 COMPRESSED 0x00000050 Data RW 1139 .data CVWL668T.lib(drv_timer.o) + 0x000701e0 COMPRESSED 0x00000004 Data RW 1180 .data CVWL668T.lib(drv_se.o) + 0x000701e4 COMPRESSED 0x00000001 Data RW 1220 .data CVWL668T.lib(drv_dsi_rx.o) + 0x000701e5 COMPRESSED 0x00000003 PAD + 0x000701e8 COMPRESSED 0x00000008 Data RW 1555 .data CVWL668T.lib(drv_rxbr.o) + 0x000701f0 COMPRESSED 0x00000004 Data RW 1642 .data CVWL668T.lib(drv_vidc.o) + 0x000701f4 COMPRESSED 0x00000190 Data RW 1717 .data CVWL668T.lib(drv_dma.o) + 0x00070384 COMPRESSED 0x00000004 Data RW 2160 .data mc_p.l(stdout.o) + 0x00070388 - 0x000000d0 Zero RW 327 .bss CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00070458 - 0x000000b8 Zero RW 428 .bss CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00070510 - 0x00000100 Zero RW 627 .bss CVWL668T.lib(tau_log.o) + 0x00070610 - 0x00000044 Zero RW 717 .bss CVWL668T.lib(hal_internal_vsync.o) + 0x00070654 - 0x00000800 Zero RW 765 .bss CVWL668T.lib(hal_internal_dcs.o) + 0x00070e54 - 0x000000ff Zero RW 766 .bss CVWL668T.lib(hal_internal_dcs.o) + 0x00070f53 COMPRESSED 0x00000001 PAD + 0x00070f54 - 0x00000044 Zero RW 794 .bss CVWL668T.lib(hal_internal_fb.o) + 0x00070f98 - 0x00000044 Zero RW 824 .bss CVWL668T.lib(hal_internal_svs.o) + 0x00070fdc - 0x00000040 Zero RW 938 .bss CVWL668T.lib(drv_gpio.o) + 0x0007101c - 0x0000106c Zero RW 1163 .bss CVWL668T.lib(dcs_packet_fifo.o) + 0x00072088 - 0x00000010 Zero RW 1715 .bss CVWL668T.lib(drv_dma.o) + 0x00072098 - 0x00000060 Zero RW 1769 .bss CVWL668T.lib(drv_uart.o) + 0x000720f8 - 0x00001000 Zero RW 277 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 32 6 0 0 0 593 board.o + 56 34 0 0 0 13163 main.o + 2110 688 4707 144 0 31310 rm_note11pro_demo.o + 120 18 192 0 4096 2148 startup_armcm0.o + + ---------------------------------------------------------------------- + 2320 746 4932 144 4096 47214 Object Totals + 0 0 32 0 0 0 (incl. Generated) + 2 0 1 0 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4204 252 dcs_packet_fifo.o + 192 80 28 13 0 264 drv_common.o + 536 90 0 0 0 792 drv_crgu.o + 136 22 0 400 16 196 drv_dma.o + 144 34 0 0 0 248 drv_dsc_dec.o + 1904 682 0 1 0 1340 drv_dsi_rx.o + 1704 306 0 0 0 2036 drv_dsi_tx.o + 148 0 0 0 0 260 drv_efuse.o + 296 40 0 4 64 1000 drv_gpio.o + 1136 180 0 0 0 1680 drv_lcdc.o + 658 104 0 0 0 1240 drv_memc.o + 40 0 0 0 0 120 drv_phy_common.o + 592 132 0 0 0 716 drv_pwr.o + 534 108 0 8 0 1180 drv_rxbr.o + 972 266 0 4 0 488 drv_se.o + 264 54 0 4 0 560 drv_swire.o + 220 40 0 0 0 428 drv_sys_cfg.o + 366 38 0 80 0 816 drv_timer.o + 1172 54 16 0 96 980 drv_uart.o + 824 152 0 4 0 1700 drv_vidc.o + 2808 208 106 48 208 1460 hal_dsi_rx_ctrl.o + 4342 338 50 92 184 2280 hal_dsi_tx_ctrl.o + 440 32 182 0 0 688 hal_gpio.o + 2140 506 70 36 2303 652 hal_internal_dcs.o + 1348 58 0 0 68 700 hal_internal_fb.o + 1284 194 0 0 68 912 hal_internal_svs.o + 3974 810 144 16 68 1772 hal_internal_vsync.o + 308 32 0 8 0 616 hal_pwr.o + 344 32 0 2 0 348 hal_swire.o + 316 56 0 0 0 204 hal_system.o + 84 0 0 0 0 204 hal_timer.o + 176 18 48 24 0 144 hal_uart.o + 68 4 0 0 0 136 tau_delay.o + 354 30 16 1 256 320 tau_log.o + 200 20 0 0 0 76 ceil.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 26 0 0 0 0 72 memcmp.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 14 0 0 0 0 60 strlen.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfcmple.o + 20 0 0 0 0 68 cfrcmple.o + 56 0 0 0 0 68 d2f.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 40 0 0 0 0 60 ffixui.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 35144 4914 668 760 7536 29792 Library Totals + 38 0 8 11 1 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 30040 4732 660 745 7535 26732 CVWL668T.lib + 200 20 0 0 0 76 m_ps.l + 2866 120 0 4 0 1336 mc_p.l + 2000 42 0 0 0 1648 mf_p.l + + ---------------------------------------------------------------------- + 35144 4914 668 760 7536 29792 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 37464 5660 5600 904 11632 57230 Grand Totals + 37464 5660 5600 336 11632 57230 ELF Image Totals (compressed) + 37464 5660 5600 336 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 43064 ( 42.05kB) + Total RW Size (RW Data + ZI Data) 12536 ( 12.24kB) + Total ROM Size (Code + RO Data + RW Data) 43400 ( 42.38kB) + +============================================================================== + diff --git a/project/WL668T/Listings/WL668T_Note11Pro_3520_20240408.map b/project/WL668T/Listings/WL668T_Note11Pro_3520_20240408.map new file mode 100644 index 0000000..a170b0f --- /dev/null +++ b/project/WL668T/Listings/WL668T_Note11Pro_3520_20240408.map @@ -0,0 +1,4031 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to rm_note11pro_demo.o(i.Note11Pro_demo) for Note11Pro_demo + main.o(i.main) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + rm_note11pro_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + rm_note11pro_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + rm_note11pro_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + rm_note11pro_demo.o(i.Note11Pro_demo) refers to hal_pwr.o(i.hal_pwr_set_main_power) for hal_pwr_set_main_power + rm_note11pro_demo.o(i.Note11Pro_demo) refers to rm_note11pro_demo.o(i.app_display_init) for app_display_init + rm_note11pro_demo.o(i.Note11Pro_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) for hal_dsi_rx_ctrl_dcs_async_handler + rm_note11pro_demo.o(i.Note11Pro_demo) refers to rm_note11pro_demo.o(i.app_system_suspend) for app_system_suspend + rm_note11pro_demo.o(i.Note11Pro_demo) refers to hal_pwr.o(i.hal_pwr_exit_sleep_mode) for hal_pwr_exit_sleep_mode + rm_note11pro_demo.o(i.Note11Pro_demo) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.Note11Pro_demo) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + rm_note11pro_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + rm_note11pro_demo.o(i.ap_dcs_read) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_dcs_read) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_dcs_set_display_off) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_dcs_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + rm_note11pro_demo.o(i.ap_dcs_set_display_off) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_dcs_set_display_on) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_dcs_set_display_on) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) for hal_dsi_tx_ctrl_set_tear_mode + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_swire.o(i.hal_swire_enable) for hal_swire_enable + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) for ap_rstn_pull_down_cb + rm_note11pro_demo.o(i.ap_dcs_set_exit_sleep_mode) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_rstn_pull_high_cb) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + rm_note11pro_demo.o(i.ap_rstn_pull_high_cb) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_set_backlight) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_set_backlight) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + rm_note11pro_demo.o(i.ap_update_frame_rate) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) for hal_dsi_rx_ctrl_toggle_input_frame_rate + rm_note11pro_demo.o(i.ap_update_frame_rate) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_update_frame_rate) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_update_pps_9E) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_update_pps_9E) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + rm_note11pro_demo.o(i.ap_update_pps_9E) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + rm_note11pro_demo.o(i.ap_update_pps_9E) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_update_pps_9E) refers to rm_note11pro_demo.o(.conststring) for .conststring + rm_note11pro_demo.o(i.app_display_init) refers to rm_note11pro_demo.o(i.app_mipi_rx_init) for app_mipi_rx_init + rm_note11pro_demo.o(i.app_display_init) refers to hal_pwr.o(i.hal_pwr_get_vcc_power_ready) for hal_pwr_get_vcc_power_ready + rm_note11pro_demo.o(i.app_display_init) refers to rm_note11pro_demo.o(i.app_gpio_init) for app_gpio_init + rm_note11pro_demo.o(i.app_display_init) refers to hal_swire.o(i.hal_swire_init) for hal_swire_init + rm_note11pro_demo.o(i.app_display_init) refers to hal_swire.o(i.hal_swire_set_timer) for hal_swire_set_timer + rm_note11pro_demo.o(i.app_display_init) refers to rm_note11pro_demo.o(i.app_mipi_tx_init) for app_mipi_tx_init + rm_note11pro_demo.o(i.app_display_init) refers to rm_note11pro_demo.o(i.app_mipi_tx_start) for app_mipi_tx_start + rm_note11pro_demo.o(i.app_gpio_init) refers to memcpya.o(.text) for __aeabi_memcpy4 + rm_note11pro_demo.o(i.app_gpio_init) refers to hal_gpio.o(i.hal_gpio_config_pad) for hal_gpio_config_pad + rm_note11pro_demo.o(i.app_gpio_init) refers to rm_note11pro_demo.o(.constdata) for .constdata + rm_note11pro_demo.o(i.app_init_panel) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + rm_note11pro_demo.o(i.app_init_panel) refers to tau_delay.o(i.delayMs) for delayMs + rm_note11pro_demo.o(i.app_init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + rm_note11pro_demo.o(i.app_init_panel) refers to tau_delay.o(i.delayUs) for delayUs + rm_note11pro_demo.o(i.app_init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + rm_note11pro_demo.o(i.app_init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + rm_note11pro_demo.o(i.app_init_panel) refers to hal_swire.o(i.hal_swire_enable) for hal_swire_enable + rm_note11pro_demo.o(i.app_init_panel) refers to hal_swire.o(i.hal_swire_set_pulse) for hal_swire_set_pulse + rm_note11pro_demo.o(i.app_init_panel) refers to rm_note11pro_demo.o(.constdata) for .constdata + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) for hal_dsi_rx_ctrl_set_check_crc + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to memcpya.o(.text) for __aeabi_memcpy4 + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to rm_note11pro_demo.o(.constdata) for .constdata + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to rm_note11pro_demo.o(i.ap_dcs_read) for ap_dcs_read + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to rm_note11pro_demo.o(i.pps_update_handle) for pps_update_handle + rm_note11pro_demo.o(i.app_mipi_tx_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + rm_note11pro_demo.o(i.app_mipi_tx_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + rm_note11pro_demo.o(i.app_mipi_tx_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + rm_note11pro_demo.o(i.app_mipi_tx_init) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to rm_note11pro_demo.o(i.app_init_panel) for app_init_panel + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to tau_delay.o(i.delayMs) for delayMs + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_swire.o(i.hal_swire_set_pulse) for hal_swire_set_pulse + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to rm_note11pro_demo.o(i.app_tx_cmd_panel_te_cb) for app_tx_cmd_panel_te_cb + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to rm_note11pro_demo.o(i.Note11Pro_demo) for i.Note11Pro_demo + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_set_sleep_mode_power) for hal_pwr_set_sleep_mode_power + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) for hal_pwr_enter_deep_sleep_mode + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) for hal_pwr_enter_normal_sleep_mode + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) for hal_pwr_set_stop_sleep_wakeup_pin + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) for hal_pwr_enter_stop_sleep_mode + rm_note11pro_demo.o(i.app_system_suspend) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.app_system_suspend) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.app_system_suspend) refers to rm_note11pro_demo.o(i.ap_rstn_pull_high_cb) for ap_rstn_pull_high_cb + rm_note11pro_demo.o(i.app_tx_cmd_panel_te_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame) for hal_dsi_tx_ctrl_gen_a_frame + rm_note11pro_demo.o(i.app_tx_cmd_panel_te_cb) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.pps_update_handle) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) for hal_dsi_tx_ctrl_set_tear_mode + rm_note11pro_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) for hal_dsi_rx_ctrl_get_compressen_en + rm_note11pro_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + rm_note11pro_demo.o(i.pps_update_handle) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.pps_update_handle) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_dcs_set_display_on) for ap_dcs_set_display_on + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_dcs_set_display_off) for ap_dcs_set_display_off + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_update_pps_9E) for ap_update_pps_9E + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_set_backlight) for ap_set_backlight + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) for ap_dcs_set_enter_sleep_mode + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_dcs_set_exit_sleep_mode) for ap_dcs_set_exit_sleep_mode + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to tau_log.o(i.tau_log_init) for tau_log_init + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to drv_common.o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to drv_common.o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to drv_vidc.o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to hal_internal_vsync.o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_memc.o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to hal_internal_dcs.o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_dma.o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_uart.o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_rxbr.o(i.VPRE1_IRQn_Handler) for VPRE1_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_swire.o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_md) for drv_rxbr_set_ack_pkt_md + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_lpdt_fifo_status) for drv_dsi_rx_get_lpdt_fifo_status + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to hal_dsi_rx_ctrl.o(i.swap_uint16_t) for swap_uint16_t + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex) for hal_dsi_rx_ctrl_set_pixel_data_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_rxbr.o(i.drv_rxbr_swpxl_clr) for drv_rxbr_swpxl_clr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_rxbr.o(i.drv_rxbr_set_swpxl_data) for drv_rxbr_set_swpxl_data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) for hal_dsi_rx_ctrl_set_rx_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.constdata) for .constdata + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_force_video_crtl) refers to drv_dsi_rx.o(i.drv_dsi_rx_force_video_crtl) for drv_dsi_rx_force_video_crtl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_cap_pixel_color) refers to drv_vidc.o(i.drv_vidc_get_status2) for drv_vidc_get_status2 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_irqen) for drv_dsc_dec_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_se.o(i.drv_se_start_rx) for drv_se_start_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_pwr.o(i.drv_pwr_set_pll_clk) for drv_pwr_set_pll_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_clk) for drv_crgu_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_clk) for drv_crgu_set_dsc_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_clk) for drv_crgu_set_vidc_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_clk) for drv_crgu_set_fb_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en) for drv_dsi_rx_set_ddi_crc_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt) for drv_dsi_rx_set_ipi_ycbcr_frmt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en) for drv_dsi_rx_set_tear_resp_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) for drv_dsi_rx_set_check_crc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_circ_mode_enable) for drv_memc_set_circ_mode_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_pu_thres) for drv_memc_set_ltpo_pu_thres + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) for hal_intl_dcs_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_circ_mode_enable) for drv_vidc_set_circ_mode_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dither_config) for drv_vidc_set_dither_config + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_vintp_config) for drv_vidc_set_vintp_config + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_honly_hinitr) for drv_vidc_set_honly_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_honly_hinitb) for drv_vidc_set_honly_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_honly_hcoef0) for drv_vidc_set_honly_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.constdata) for .constdata + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to hal_internal_vsync.o(i.hal_internal_sync_register_rx_callback) for hal_internal_sync_register_rx_callback + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to drv_vidc.o(i.drv_vidc_set_irq_line) for drv_vidc_set_irq_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_write_cmd_entry) refers to hal_internal_dcs.o(i.hal_intl_dcs_register_write_cmd_entry) for hal_intl_dcs_register_write_cmd_entry + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_response) for drv_rxbr_set_cmd_response + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) for hal_intl_dcs_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cap_pixel_pos) refers to drv_vidc.o(i.drv_vidc_debug_cap_pixel) for drv_vidc_debug_cap_pixel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) for drv_dsi_rx_set_check_crc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_log_level) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_drv_log_level) for drv_dsi_rx_set_drv_log_level + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to drv_rxbr.o(i.drv_rxbr_sw_reset) for drv_rxbr_sw_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex) refers to drv_rxbr.o(i.drv_rxbr_sw_reset) for drv_rxbr_sw_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) for hal_intl_svs_update_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_clk) for drv_crgu_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) for hal_internal_vsync_toggle_input_frame_rate + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) for hal_internal_sync_register_lcdc_cb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) for hal_internal_sync_set_fb_setting_manual + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame) refers to drv_lcdc.o(i.drv_lcdc_fixed_frame_output) for drv_lcdc_fixed_frame_output + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_get_tear_mode) for drv_memc_get_tear_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) for hal_internal_sync_register_lcdc_cb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) for hal_dsi_tx_init_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) for hal_dsi_tx_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) for hal_nonshadow_func_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) for hal_vsync_func_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_overwrite_enable) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_overwrite_enable) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_partial_disp_enable) refers to drv_lcdc.o(i.drv_lcdc_part_display_config) for drv_lcdc_part_display_config + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_partial_disp_enable) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_sync_line) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) for hal_dsi_tx_ctrl_draw_flick + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_cfg_int_frame) for drv_lcdc_cfg_int_frame + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_start) for hal_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_stop_display) for drv_lcdc_stop_display + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) for hal_dsi_tx_ctrl_read_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to drv_crgu.o(i.drv_crgu_set_dpi_clk) for drv_crgu_set_dpi_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) for hal_dsi_tx_timing_info_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) for hal_dsi_tx_cmd_mode_cal_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) for hal_dsi_tx_init_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) for hal_dsi_tx_vid_mode_cal_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) for hal_dsi_tx_init_vid_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) refers to d2f.o(.text) for __aeabi_d2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_internal_svs.o(i.hal_intl_svs_init_tx) for hal_intl_svs_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) for hal_tx_frame_rate_adjust + hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) refers to drv_lcdc.o(i.drv_lcdc_endianness_config) for drv_lcdc_endianness_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) refers to drv_lcdc.o(i.drv_lcdc_crop_hact) for drv_lcdc_crop_hact + hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) for hal_lcdc_postproc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) for hal_lcdc_displayproc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) for hal_intl_fb_get_tx_fb_info + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) for hal_lcdc_timinggen_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_clk) for drv_crgu_set_lcdc_clk + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) for hal_intl_fb_get_tx_fb_info + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) for hal_lcdc_upscaler_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_fldc_config) for drv_lcdc_fldc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_bcsa_config) for drv_lcdc_bcsa_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_fc_config) for drv_lcdc_fc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_edge_dect_config) for drv_lcdc_edge_dect_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_edge_enh_config) for drv_lcdc_edge_enh_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_vintp_mode_config) for drv_lcdc_vintp_mode_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_dith_config) for drv_lcdc_dith_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to drv_lcdc.o(i.drv_lcdc_vid_hw_start) for drv_lcdc_vid_hw_start + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to drv_lcdc.o(i.drv_lcdc_cmd_start) for drv_lcdc_cmd_start + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to drv_lcdc.o(i.drv_lcdc_set_prefetch) for drv_lcdc_set_prefetch + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for sg_pq_para + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_bcsa_config) for drv_lcdc_bcsa_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_fc_config) for drv_lcdc_fc_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_edge_dect_config) for drv_lcdc_edge_dect_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_edge_enh_config) for drv_lcdc_edge_enh_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for sg_pq_para + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to cfcmple.o(.text) for __aeabi_cfcmple + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_gpio.o(i.hal_gpio_config_pad) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_config_pad) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_gpio.o(i.hal_gpio_config_pad) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_high_impedance) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode) for drv_gpio_set_mode + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_swire.o(i.hal_swire_deinit) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + hal_swire.o(i.hal_swire_deinit) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_get_pulse_count) for drv_swire_get_pulse_count + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_set_trig_mode) for drv_swire_set_trig_mode + hal_swire.o(i.hal_swire_enable) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_enable) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock_div) for drv_crgu_set_clock_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_init) refers to drv_common.o(.data) for g_system_clock + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_set_pulse) refers to drv_swire.o(i.drv_swire_set_trig_mode) for drv_swire_set_trig_mode + hal_swire.o(i.hal_swire_set_pulse) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_set_pulse) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_set_timer) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer) for drv_sys_cfg_sel_swire_timer + hal_swire.o(i.hal_swire_set_timer) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + hal_swire.o(i.hal_swire_set_timer) refers to hal_timer.o(i.hal_timer_set_repeat) for hal_timer_set_repeat + hal_swire.o(i.hal_swire_set_timer) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_swire.o(i.hal_swire_set_timer) refers to drv_swire.o(i.drv_swire_set_trig_mode) for drv_swire_set_trig_mode + hal_swire.o(i.hal_swire_set_timer) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_set_waveform) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_set_waveform) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_set_waveform) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pll_clk) for drv_pwr_set_pll_clk + hal_system.o(i.hal_system_init) refers to hal_system.o(i.hal_system_updata_sysclk) for hal_system_updata_sysclk + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_reset_chip) refers to drv_crgu.o(i.drv_crgu_reset_chip) for drv_crgu_reset_chip + hal_system.o(i.hal_system_updata_sysclk) refers to drv_crgu.o(i.drv_crgu_set_ahb_clk) for drv_crgu_set_ahb_clk + hal_system.o(i.hal_system_updata_sysclk) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_updata_sysclk) refers to drv_common.o(.data) for g_system_delay_step + hal_pwr.o(i.hal_pwr_elvcc_close) refers to drv_pwr.o(i.drv_pwr_pwmled_electric_current) for drv_pwr_pwmled_electric_current + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_pwmled_electric_current) for drv_pwr_pwmled_electric_current + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_hv_ldo_mode_sel) for drv_pwr_hv_ldo_mode_sel + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_hv_ldo_mode_clock_sel) for drv_pwr_hv_ldo_mode_clock_sel + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_pwmled_driver_current_Big_step) for drv_pwr_pwmled_driver_current_Big_step + hal_pwr.o(i.hal_pwr_elvcc_vol_set) refers to drv_pwr.o(i.drv_pwr_hv_ldo_voltage_set) for drv_pwr_hv_ldo_voltage_set + hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_set_wakeup_type) for drv_pwr_set_wakeup_type + hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex) for drv_pwr_enter_sleep_mode_ex + hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) for drv_pwr_enter_stop_sleep_mode + hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) refers to hal_pwr.o(.data) for .data + hal_pwr.o(i.hal_pwr_exit_sleep_mode) refers to drv_pwr.o(i.drv_pwr_exit_sleep_mode) for drv_pwr_exit_sleep_mode + hal_pwr.o(i.hal_pwr_get_reset_flag) refers to drv_crgu.o(i.drv_crgu_get_all_reset_flag) for drv_crgu_get_all_reset_flag + hal_pwr.o(i.hal_pwr_get_reset_flag) refers to drv_pwr.o(i.drv_pwr_get_wakeflag) for drv_pwr_get_wakeflag + hal_pwr.o(i.hal_pwr_get_reset_flag) refers to drv_crgu.o(i.drv_crgu_clear_all_reset_flags) for drv_crgu_clear_all_reset_flags + hal_pwr.o(i.hal_pwr_get_vcc_power_ready) refers to drv_pwr.o(i.drv_pwr_get_power_ready_st) for drv_pwr_get_power_ready_st + hal_pwr.o(i.hal_pwr_ldo13s_en) refers to drv_pwr.o(i.drv_pwr_ldo13s_en) for drv_pwr_ldo13s_en + hal_pwr.o(i.hal_pwr_ldo13s_set) refers to drv_pwr.o(i.drv_pwr_ldo13s_set) for drv_pwr_ldo13s_set + hal_pwr.o(i.hal_pwr_ldo18s_en) refers to drv_pwr.o(i.drv_pwr_ldo18s_en) for drv_pwr_ldo18s_en + hal_pwr.o(i.hal_pwr_ldo18s_set) refers to drv_pwr.o(i.drv_pwr_ldo18s_set) for drv_pwr_ldo18s_set + hal_pwr.o(i.hal_pwr_set_main_power) refers to drv_pwr.o(i.drv_pwr_set_digit_power_sel) for drv_pwr_set_digit_power_sel + hal_pwr.o(i.hal_pwr_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd) for drv_pwr_set_pvd + hal_pwr.o(i.hal_pwr_set_sleep_mode_power) refers to drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) for drv_pwr_set_breath_screen_power_sel + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_pwr.o(.data) for .data + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_pwr.o(i.stop_sleep_cb) for stop_sleep_cb + hal_pwr.o(i.hal_pwr_set_vcc_enable) refers to drv_pwr.o(i.drv_pwr_charge_pump_en) for drv_pwr_charge_pump_en + hal_pwr.o(i.hal_pwr_sw_tp18_en) refers to drv_pwr.o(i.drv_pwr_sw_tp18_en) for drv_pwr_sw_tp18_en + hal_pwr.o(i.stop_sleep_cb) refers to hal_pwr.o(.data) for .data + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_delay.o(i.delayUs) refers to drv_common.o(.data) for g_system_delay_step + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_recv_blocking) for hal_uart_recv_blocking + tau_log.o(i.fgetc) refers to hal_system.o(i.hal_system_get_debug_state) for hal_system_get_debug_state + tau_log.o(i.fgetc) refers to hal_system.o(i.hal_system_clear_debug_state) for hal_system_clear_debug_state + tau_log.o(i.fgetc) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.fputc) refers to tau_log.o(i.tau_log_push_log) for tau_log_push_log + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_send_blocking) for hal_uart_send_blocking + tau_log.o(i.fputc) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.tau_log_init) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + tau_log.o(i.tau_log_init) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.tau_log_printf) refers to memseta.o(.text) for __aeabi_memclr4 + tau_log.o(i.tau_log_printf) refers to strlen.o(.text) for strlen + tau_log.o(i.tau_log_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.tau_log_printf) refers to tau_log.o(i.tau_log_push_log) for tau_log_push_log + tau_log.o(i.tau_log_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.tau_log_printf) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.tau_log_printf) refers to tau_log.o(.bss) for g_log_buf + tau_log.o(i.tau_log_push_log) refers to memcpya.o(.text) for __aeabi_memcpy + tau_log.o(i.tau_log_push_log) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(.ARM.__at_0x1101C) refers to tau_log.o(.bss) for g_log_buf + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_uart.o(i.hal_uart0_rx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart0_tx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart1_rx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart1_tx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.drv_uart_deinit) for drv_uart_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_uart.o(i.hal_uart_deinit) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_dma_path_close) refers to drv_dma.o(i.drv_dma_disable) for drv_dma_disable + hal_uart.o(i.hal_uart_dma_path_close) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_dma_path_close) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_apply_handle) for drv_dma_apply_handle + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_register_callback) for drv_dma_register_callback + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_enable_int) for drv_dma_enable_int + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_disable) for drv_dma_disable + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_set_mem_trans_info) for drv_dma_set_mem_trans_info + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_enable) for drv_dma_enable + hal_uart.o(i.hal_uart_dma_recv) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_uart.o(i.hal_uart_dma_recv) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_dma_recv) refers to hal_uart.o(i.hal_uart0_rx_dma_cb) for hal_uart0_rx_dma_cb + hal_uart.o(i.hal_uart_dma_recv) refers to hal_uart.o(i.hal_uart1_rx_dma_cb) for hal_uart1_rx_dma_cb + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_apply_handle) for drv_dma_apply_handle + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_register_callback) for drv_dma_register_callback + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_enable_int) for drv_dma_enable_int + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_disable) for drv_dma_disable + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_set_mem_trans_info) for drv_dma_set_mem_trans_info + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_enable) for drv_dma_enable + hal_uart.o(i.hal_uart_dma_send) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_uart.o(i.hal_uart_dma_send) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_dma_send) refers to hal_uart.o(i.hal_uart0_tx_dma_cb) for hal_uart0_tx_dma_cb + hal_uart.o(i.hal_uart_dma_send) refers to hal_uart.o(i.hal_uart1_tx_dma_cb) for hal_uart1_tx_dma_cb + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.drv_uart_init) for drv_uart_init + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.drv_uart_trans_create_handle) for drv_uart_trans_create_handle + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_recv_blocking) refers to drv_uart.o(i.drv_uart_recv_blocking) for drv_uart_recv_blocking + hal_uart.o(i.hal_uart_recv_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_recv_none_blocking) refers to drv_uart.o(i.drv_uart_recv_none_blocking) for drv_uart_recv_none_blocking + hal_uart.o(i.hal_uart_recv_none_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_send_blocking) refers to drv_uart.o(i.drv_uart_send_blocking) for drv_uart_send_blocking + hal_uart.o(i.hal_uart_send_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_send_none_blocking) refers to drv_uart.o(i.drv_uart_send_none_blocking) for drv_uart_send_none_blocking + hal_uart.o(i.hal_uart_send_none_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_internal_vsync.o(i.LCDC_IRQn_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) for hal_intl_fb_cal_fb_info + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) for hal_dsi_tx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_register_rx_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) for hal_intl_fb_set_fb_info_manual + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) for hal_intl_fb_cal_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_svs.o(i.hal_intl_svs_init_rx) for hal_intl_svs_init_rx + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) for hal_intl_dcs_init_sw_fltr + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_pro_motion_init) for soft_pro_motion_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) for hal_intl_fb_cal_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_svs.o(i.hal_intl_svs_deinit_rx) for hal_intl_svs_deinit_rx + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_svs.o(i.hal_intl_svs_set_sync_coef) for hal_intl_svs_set_sync_coef + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_memc.o(i.drv_memc_set_frame_drop_select) for drv_memc_set_frame_drop_select + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_set_tear_line) for drv_lcdc_set_tear_line + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to idiv.o(.text) for __aeabi_idivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_config_acc_command_mode) for drv_lcdc_config_acc_command_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_svs.o(i.hal_intl_svs_deinit_tx) for hal_intl_svs_deinit_tx + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.soft_pro_motion_init) for soft_pro_motion_init + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_svs.o(i.hal_intl_svs_set_input_frate) for hal_intl_svs_set_input_frate + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.soft_pro_motion_init) for soft_pro_motion_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.soft_double_buffer_update) for soft_double_buffer_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_svs.o(i.hal_intl_svs_handle) for hal_intl_svs_handle + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_lcdc.o(i.drv_lcdc_cmd_start) for drv_lcdc_cmd_start + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) for hal_intl_svs_set_rx_vtt + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_double_buffer_update) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(i.soft_tear_adjust_line) for soft_tear_adjust_line + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(i.soft_tear_adjust_line) for soft_tear_adjust_line + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_pro_motion_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.soft_pro_motion_init) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_pro_motion_init) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.soft_tear_adjust_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_int_source) for drv_vidc_get_int_source + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to hal_internal_dcs.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) for hal_intl_dcs_rx_receive_packet + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_crgu.o(i.drv_crgu_set_dsc_clk) for drv_crgu_set_dsc_clk + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to hal_internal_dcs.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) refers to hal_internal_dcs.o(.bss) for .bss + hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_register_write_cmd_entry) refers to hal_internal_dcs.o(.data) for .data + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) for hal_intl_dcs_sw_filter_handle + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) for hal_dsi_rx_ctrl_dcs_async_handler + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en) for drv_dsi_rx_get_ddi_crc_en + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_dcs.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_dcs.o(.data) for .data + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) for hal_intl_dcs_rx_get_dcs_packet_data + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) for hal_intl_dcs_rx_receive_pps + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to hal_internal_dcs.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to memcmp.o(.text) for memcmp + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to hal_internal_dcs.o(.conststring) for .conststring + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) refers to memseta.o(.text) for __aeabi_memset + hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_filter_regs) for drv_rxbr_set_filter_regs + hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) refers to hal_internal_dcs.o(.bss) for .bss + hal_internal_dcs.o(i.hal_intl_dcs_set_dcs_direct_mode) refers to hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) for hal_intl_dcs_set_auto_hw_filter + hal_internal_dcs.o(i.hal_intl_dcs_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) refers to hal_internal_dcs.o(.data) for .data + hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) refers to hal_internal_dcs.o(.bss) for .bss + hal_internal_dcs.o(.data) refers to hal_internal_dcs.o(.bss) for g_imm_buffer + hal_internal_fb.o(i.ha_intl_fb_check_pu_size) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.ha_intl_fb_check_pu_size) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) for hal_intl_fb_flow_control_adapter + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) for hal_intl_fb_check_bandwidth + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.ha_intl_fb_check_pu_size) for ha_intl_fb_check_pu_size + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.hal_intl_fb_edge_resize) for hal_intl_fb_edge_resize + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_fb.o(i.hal_intl_fb_edge_resize) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.hal_intl_fb_edge_resize) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_user_flow) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to hal_internal_fb.o(.conststring) for .conststring + hal_internal_svs.o(i.hal_intl_svs_deinit_rx) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.hal_intl_svs_deinit_rx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_deinit_rx) refers to hal_internal_svs.o(i.svs_wait_start) for svs_wait_start + hal_internal_svs.o(i.hal_intl_svs_deinit_tx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_handle) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) for hal_intl_svs_update_rxbr_clk + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_svs.o(i.svs_wait_start) for svs_wait_start + hal_internal_svs.o(i.hal_intl_svs_init_tx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_svs.o(i.svs_wait_start) for svs_wait_start + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_svs.o(i.svs_wait_fr_stab) for svs_wait_fr_stab + hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_set_sync_coef) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_direct_mode_setting) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_svs.o(i.svs_direct_mode_setting) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_internal_svs.o(i.svs_direct_mode_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_svs.o(i.svs_direct_mode_setting) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) for drv_rxbr_hline_rcv1_cfg + hal_internal_svs.o(i.svs_direct_mode_setting) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_get_rel_intv) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_svs.o(i.svs_get_rel_intv) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_sync_handle) refers to hal_internal_svs.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_svs.o(i.svs_sync_handle) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_svs.o(i.svs_sync_handle) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_svs.o(i.svs_sync_handle) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_svs.o(i.svs_sync_handle) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_svs.o(i.svs_sync_handle) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_svs.o(i.svs_sync_handle) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_svs.o(i.svs_sync_handle) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_wait_fr_stab) refers to hal_internal_svs.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_svs.o(i.svs_wait_fr_stab) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_svs.o(i.svs_wait_fr_stab) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_svs.o(i.svs_wait_fr_stab) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_svs.o(i.svs_wait_fr_stab) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_svs.o(i.svs_wait_fr_stab) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_svs.o(i.svs_wait_fr_stab) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_internal_svs.o(i.svs_wait_fr_stab) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_wait_fr_stab) refers to hal_internal_svs.o(i.svs_sync_handle) for svs_sync_handle + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_svs.o(i.svs_wait_start) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_internal_svs.o(i.svs_wait_start) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_svs.o(i.svs_wait_start) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_internal_svs.o(i.svs_wait_start) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_svs.o(i.svs_wait_start) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_svs.o(i.svs_wait_start) refers to ceil.o(i.ceil) for ceil + hal_internal_svs.o(i.svs_wait_start) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(i.svs_direct_mode_setting) for svs_direct_mode_setting + hal_internal_svs.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_svs.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) for drv_rxbr_hline_rcv1_cfg + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(i.svs_wait_fr_stab) for svs_wait_fr_stab + drv_common.o(i.HardFault_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_common.o(i.SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_se.o(i.drv_se_init) for drv_se_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_crgu.o(i.drv_crgu_get_rxbr_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_crgu.o(i.drv_crgu_get_system_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_se.o(i.drv_se_set_dsc) for drv_se_set_dsc + drv_gpio.o(i.AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.drv_gpio_handle_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_handle_int) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_pwr.o(i.drv_pwr_analog_pwm_en) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_elvcc_pwm_en) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_elvcc_pwm_en) refers to tau_delay.o(i.delayMs) for delayMs + drv_pwr.o(i.drv_pwr_enter_sleep_mode) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_enter_sleep_mode) refers to drv_pwr.o(i.drv_pwr_por_mode_flag) for drv_pwr_por_mode_flag + drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_exit_sleep_mode) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_hv_ldo_mode_clock_sel) refers to drv_pwr.o(i.drv_pwr_hv_ldo_10M_clock) for drv_pwr_hv_ldo_10M_clock + drv_pwr.o(i.drv_pwr_pwm_output_pwm_led) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_digit_power_sel) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_system_clk) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_wakeup_type) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_swire.o(i.SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_sys_cfg_sel_dma_req) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_timer.o(i.TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_compare_val) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_common.o(.data) for g_system_clock + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_se.o(i.drv_se_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_se.o(i.drv_se_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_se.o(i.drv_se_init) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_dsc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_dsc) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_lcdc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_lcdc) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_memc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_memc) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_rxbr) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_rxbr) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_vidc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_vidc) refers to drv_se.o(.data) for .data + drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) refers to drv_dsi_rx.o(.data) for .data + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_set_drv_log_level) refers to drv_dsi_rx.o(.data) for .data + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_lcdc.o(i.drv_lcdc_clear_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_cmd_start) refers to drv_se.o(i.drv_se_set_lcdc) for drv_se_set_lcdc + drv_lcdc.o(i.drv_lcdc_ctrl_flow) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + drv_lcdc.o(i.drv_lcdc_part_display_config) refers to drv_lcdc.o(i.drv_lcdc_pixel_value_config) for drv_lcdc_pixel_value_config + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_lcdc.o(i.drv_lcdc_clear_int) for drv_lcdc_clear_int + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_lcdc.o(i.drv_lcdc_vid_hw_start) refers to drv_se.o(i.drv_se_set_lcdc) for drv_se_set_lcdc + drv_memc.o(i.MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.drv_memc_rate_transfer_sel) refers to drv_se.o(i.drv_se_set_memc) for drv_se_set_memc + drv_memc.o(i.drv_memc_set_ltpo_mode) refers to drv_se.o(i.drv_se_set_memc) for drv_se_set_memc + drv_rxbr.o(i.VPRE1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.VPRE1_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_set_cmd_response) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_set_color_format) refers to drv_se.o(i.drv_se_set_rxbr) for drv_se_set_rxbr + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to tau_delay.o(i.delayMs) for delayMs + drv_rxbr.o(i.drv_rxbr_sw_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_rxbr.o(i.drv_rxbr_sw_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + drv_vidc.o(i.VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_set_src_parameter) refers to drv_se.o(i.drv_se_set_vidc) for drv_se_set_vidc + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(i.drv_dma_get_int_source) for drv_dma_get_int_source + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(i.drv_dma_clear_status) for drv_dma_clear_status + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(.data) for .data + drv_dma.o(i.drv_dma_apply_handle) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dma.o(i.drv_dma_apply_handle) refers to drv_dma.o(.data) for .data + drv_dma.o(i.drv_dma_apply_handle) refers to drv_dma.o(.constdata) for .constdata + drv_dma.o(i.drv_dma_deinit) refers to drv_dma.o(i.drv_dma_disable_int) for drv_dma_disable_int + drv_dma.o(i.drv_dma_disable_int) refers to drv_dma.o(i.drv_dma_int_list_delete) for drv_dma_int_list_delete + drv_dma.o(i.drv_dma_disable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_int) refers to drv_dma.o(i.drv_dma_int_list_inset) for drv_dma_int_list_inset + drv_dma.o(i.drv_dma_enable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_init) refers to drv_per_common.o(i.drv_per_set_clock) for drv_per_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_update_handle_setting) for drv_dma_update_handle_setting + drv_dma.o(i.drv_dma_int_list_delete) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_int_list_inset) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_update_handle_setting) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_dma_req) for drv_sys_cfg_sel_dma_req + drv_dma.o(i.drv_dma_update_req_by_default) refers to drv_dma.o(i.drv_dma_update_handle_setting) for drv_dma_update_handle_setting + drv_dma.o(i.drv_dma_update_req_by_default) refers to drv_dma.o(.constdata) for .constdata + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_int_trans_handle) for drv_uart_int_trans_handle + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_abort_recv) for drv_uart_abort_recv + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_abort_send) for drv_uart_abort_send + drv_uart.o(i.UART_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(i.drv_uart_reset_rx_fifo) for drv_uart_reset_rx_fifo + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(i.drv_uart_reset_tx_fifo) for drv_uart_reset_tx_fifo + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_deinit) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_deinit) refers to drv_uart.o(i.drv_uart_enable_clk) for drv_uart_enable_clk + drv_uart.o(i.drv_uart_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.drv_uart_deinit) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_enable_clk) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + drv_uart.o(i.drv_uart_enable_int) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_enable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.drv_uart_get_def_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.drv_uart_get_def_cfg) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.drv_uart_get_instance) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_enable_clk) for drv_uart_enable_clk + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_set_baud_rate) for drv_uart_set_baud_rate + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_enable_int) for drv_uart_enable_int + drv_uart.o(i.drv_uart_int_trans_handle) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_recv_none_blocking) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_recv_none_blocking) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_recv_none_blocking) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_reset_rx_fifo) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_reset_tx_fifo) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_send_none_blocking) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_send_none_blocking) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_send_none_blocking) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_set_baud_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.drv_uart_trans_create_handle) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_trans_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.drv_uart_trans_create_handle) refers to drv_uart.o(.bss) for .bss + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_pwr.o(i.drv_pwr_efuse_pd) for drv_pwr_efuse_pd + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_pwr.o(i.drv_pwr_efuse_pd) for drv_pwr_efuse_pd + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_efuse.o(i.drv_efuse_write_read_req_clear) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_efuse.o(i.drv_efuse_write_read_req_clear) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_per_common.o(i.drv_per_get_system_clk) refers to drv_crgu.o(i.drv_crgu_get_system_clk) for drv_crgu_get_system_clk + drv_per_common.o(i.drv_per_reset_module) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + drv_per_common.o(i.drv_per_set_clock) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + d2f.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + d2f.o(.text) refers to fepilogue.o(.text) for _float_round + cfcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing rm_note11pro_demo.o(.rev16_text), (4 bytes). + Removing rm_note11pro_demo.o(.revsh_text), (4 bytes). + Removing rm_note11pro_demo.o(i.Gpio_swire_output), (78 bytes). + Removing rm_note11pro_demo.o(.data), (1 bytes). + Removing rm_note11pro_demo.o(.data), (2 bytes). + Removing rm_note11pro_demo.o(.data), (4 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (220 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line), (604 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (320 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (256 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_force_video_crtl), (12 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_cap_pixel_color), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback), (66 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_write_cmd_entry), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack), (176 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cap_pixel_pos), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (32 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_log_level), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (240 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex), (392 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (72 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.swap_uint16_t), (10 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode), (120 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick), (244 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_get_disp_line), (12 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_overwrite_enable), (22 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_partial_disp_enable), (70 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (128 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (32 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm), (8 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_sync_line), (36 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (12 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (52 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera), (68 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update), (16 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_input_data), (18 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (40 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (44 bytes). + Removing hal_gpio.o(i.hal_gpio_set_high_impedance), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_pull_state), (72 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (52 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (52 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (22 bytes). + Removing hal_swire.o(i.hal_swire_set_waveform), (92 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_enable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (10 bytes). + Removing hal_pwr.o(.rev16_text), (4 bytes). + Removing hal_pwr.o(.revsh_text), (4 bytes). + Removing hal_pwr.o(i.hal_pwr_elvcc_close), (10 bytes). + Removing hal_pwr.o(i.hal_pwr_elvcc_ldo_en), (46 bytes). + Removing hal_pwr.o(i.hal_pwr_elvcc_vol_set), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_get_reset_flag), (66 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo13s_en), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo13s_set), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo18s_en), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo18s_set), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_set_pvd), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_set_vcc_enable), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_sw_tp18_en), (8 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (72 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_start), (48 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (42 bytes). + Removing hal_timer.o(i.hal_timer_stop), (40 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart0_rx_dma_cb), (20 bytes). + Removing hal_uart.o(i.hal_uart0_tx_dma_cb), (36 bytes). + Removing hal_uart.o(i.hal_uart1_rx_dma_cb), (20 bytes). + Removing hal_uart.o(i.hal_uart1_tx_dma_cb), (36 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (48 bytes). + Removing hal_uart.o(i.hal_uart_dma_path_close), (92 bytes). + Removing hal_uart.o(i.hal_uart_dma_recv), (276 bytes). + Removing hal_uart.o(i.hal_uart_dma_send), (280 bytes). + Removing hal_uart.o(i.hal_uart_recv_blocking), (28 bytes). + Removing hal_uart.o(i.hal_uart_recv_none_blocking), (28 bytes). + Removing hal_uart.o(i.hal_uart_send_none_blocking), (28 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (2 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_register_rx_callback), (28 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (28 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line), (60 bytes). + Removing hal_internal_vsync.o(.data), (4 bytes). + Removing hal_internal_dcs.o(.rev16_text), (4 bytes). + Removing hal_internal_dcs.o(.revsh_text), (4 bytes). + Removing hal_internal_dcs.o(i.hal_intl_dcs_register_write_cmd_entry), (12 bytes). + Removing hal_internal_dcs.o(i.hal_intl_dcs_set_dcs_direct_mode), (44 bytes). + Removing hal_internal_fb.o(.rev16_text), (4 bytes). + Removing hal_internal_fb.o(.revsh_text), (4 bytes). + Removing hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual), (480 bytes). + Removing hal_internal_fb.o(.conststring), (152 bytes). + Removing hal_internal_svs.o(.rev16_text), (4 bytes). + Removing hal_internal_svs.o(.revsh_text), (4 bytes). + Removing hal_internal_svs.o(i.hal_intl_svs_set_sync_coef), (12 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_enable_systick), (88 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_get_all_reset_flag), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (104 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_clock_src), (16 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_attribute), (16 bytes). + Removing drv_gpio.o(i.drv_gpio_get_input_data), (24 bytes). + Removing drv_gpio.o(i.drv_gpio_set_attribute), (28 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_10bit_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_analog_pwm_en), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_charge_pump_en), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_close_iov18_tp18), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_dsc_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_elvcc_pwm_en), (124 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_sleep_mode), (152 bytes). + Removing drv_pwr.o(i.drv_pwr_exit_sleep_mode_ex), (40 bytes). + Removing drv_pwr.o(i.drv_pwr_fb_pd), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_get_wakeflag), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_get_write_lock_st), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_hf_frm_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_10M_clock), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_mode_clock_sel), (60 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_mode_sel), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_voltage_set), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo11d_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo13s_en), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo13s_set), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo15_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo18s_en), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo18s_set), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_ltpo_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_osc32k_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_osc80m_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_p3k_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_por_mode_flag), (32 bytes). + Removing drv_pwr.o(i.drv_pwr_power_in), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_power_ready_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_power_sel), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_pwm_output_pwm_led), (56 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_driver_current_Big_step), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_driver_current_small_step), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_electric_current), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_open_drain), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_ram_pd_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_read_boot_chipst), (12 bytes). + Removing drv_pwr.o(i.drv_pwr_read_chipcfg), (12 bytes). + Removing drv_pwr.o(i.drv_pwr_rgbr_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_set_ap_rst_mode), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_set_ldo11_mode), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_set_ldo15_mode), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_set_pvd), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_set_pvd_mode), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_set_system_clk), (32 bytes). + Removing drv_pwr.o(i.drv_pwr_sw_tp18_en), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_wakeflag_get), (16 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_sel_dma_req), (128 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing drv_timer.o(i.drv_timer_register_callback), (20 bytes). + Removing dcs_packet_fifo.o(.rev16_text), (4 bytes). + Removing dcs_packet_fifo.o(.revsh_text), (4 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_se.o(.rev16_text), (4 bytes). + Removing drv_se.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_force_video_crtl), (28 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_lpdt_fifo_status), (16 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (68 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (12 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (24 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_drv_log_level), (12 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (16 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (24 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (16 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (68 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (296 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (228 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (32 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (100 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (20 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_clear), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_lock), (32 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (16 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_clear_irq), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_dpisignal_output_ctrl), (44 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_dpbuf_num), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_dpi_status), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_frame_clk_count), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_int_en_status), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_int_status), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_line_status), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_rgb2pen_subpixel), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_part_display_config), (52 bytes). + Removing drv_lcdc.o(i.drv_lcdc_pixel_value_config), (32 bytes). + Removing drv_lcdc.o(i.drv_lcdc_rd_st_line_config), (28 bytes). + Removing drv_lcdc.o(i.drv_lcdc_software_reset), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_vid_sw_start), (56 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (36 bytes). + Removing drv_memc.o(i.drv_memc_set_double_buffer_reverse), (24 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_pri), (44 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_inten), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (24 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (24 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (24 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_clr_swp_cnt), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_col_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_frame_data_interval), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_hline_dcat), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_page_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_swpxl_cnt), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_register_irq0_callback), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_ack_pkt_md), (28 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_cmd_filter), (320 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_cmd_response), (324 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (32 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_data_catch_hline), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_swpxl_data), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_tmpdith_bp), (28 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (32 bytes). + Removing drv_rxbr.o(i.drv_rxbr_sw_reset), (164 bytes). + Removing drv_rxbr.o(i.drv_rxbr_swpxl_clr), (32 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (28 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (36 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (28 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_apply_handle), (304 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (52 bytes). + Removing drv_dma.o(i.drv_dma_disable), (20 bytes). + Removing drv_dma.o(i.drv_dma_disable_int), (40 bytes). + Removing drv_dma.o(i.drv_dma_enable), (36 bytes). + Removing drv_dma.o(i.drv_dma_enable_int), (68 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_trans_num), (20 bytes). + Removing drv_dma.o(i.drv_dma_get_status), (20 bytes). + Removing drv_dma.o(i.drv_dma_init), (22 bytes). + Removing drv_dma.o(i.drv_dma_int_list_delete), (88 bytes). + Removing drv_dma.o(i.drv_dma_int_list_inset), (48 bytes). + Removing drv_dma.o(i.drv_dma_register_callback), (4 bytes). + Removing drv_dma.o(i.drv_dma_reset), (36 bytes). + Removing drv_dma.o(i.drv_dma_set_bitwide), (56 bytes). + Removing drv_dma.o(i.drv_dma_set_burst), (20 bytes). + Removing drv_dma.o(i.drv_dma_set_circle_mode), (40 bytes). + Removing drv_dma.o(i.drv_dma_set_dir), (40 bytes). + Removing drv_dma.o(i.drv_dma_set_increment), (72 bytes). + Removing drv_dma.o(i.drv_dma_set_mem_trans_info), (40 bytes). + Removing drv_dma.o(i.drv_dma_set_mem_trans_offset), (24 bytes). + Removing drv_dma.o(i.drv_dma_set_per_address), (20 bytes). + Removing drv_dma.o(i.drv_dma_set_priority), (32 bytes). + Removing drv_dma.o(i.drv_dma_set_tran_int_cnt), (28 bytes). + Removing drv_dma.o(i.drv_dma_update_handle_setting), (148 bytes). + Removing drv_dma.o(i.drv_dma_update_req_by_default), (40 bytes). + Removing drv_dma.o(.constdata), (136 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.drv_uart_deinit), (60 bytes). + Removing drv_uart.o(i.drv_uart_get_def_cfg), (72 bytes). + Removing drv_uart.o(i.drv_uart_recv_blocking), (48 bytes). + Removing drv_uart.o(i.drv_uart_recv_none_blocking), (60 bytes). + Removing drv_uart.o(i.drv_uart_send_none_blocking), (60 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (56 bytes). + Removing drv_efuse.o(i.drv_efuse_write_read_req_clear), (22 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_per_common.o(.rev16_text), (4 bytes). + Removing drv_per_common.o(.revsh_text), (4 bytes). + Removing drv_per_common.o(i.drv_per_get_system_clk), (8 bytes). + Removing drv_per_common.o(i.drv_per_reset_module), (14 bytes). + Removing drv_per_common.o(i.drv_per_set_clock), (14 bytes). + Removing fflti.o(.text), (22 bytes). + +370 unused section(s) (total 17873 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcmp.c 0x00000000 Number 0 memcmp.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/string/strlen.c 0x00000000 Number 0 strlen.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/d2f.c 0x00000000 Number 0 d2f.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_per_common.c 0x00000000 Number 0 drv_per_common.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_pwr.c 0x00000000 Number 0 hal_pwr.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_dcs.c 0x00000000 Number 0 hal_internal_dcs.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_fb.c 0x00000000 Number 0 hal_internal_fb.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_svs.c 0x00000000 Number 0 hal_internal_svs.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\driver\cuckoo\src\drv_se.c 0x00000000 Number 0 drv_se.o ABSOLUTE + ..\..\src\app\RM_Note11Pro\RM_Note11Pro_demo.c 0x00000000 Number 0 rm_note11pro_demo.o ABSOLUTE + ..\..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_per_common.c 0x00000000 Number 0 drv_per_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_pwr.c 0x00000000 Number 0 hal_pwr.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_dcs.c 0x00000000 Number 0 hal_internal_dcs.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_fb.c 0x00000000 Number 0 hal_internal_fb.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_svs.c 0x00000000 Number 0 hal_internal_svs.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\src\\drv_se.c 0x00000000 Number 0 drv_se.o ABSOLUTE + ..\\..\\src\\app\\RM_Note11Pro\\RM_Note11Pro_demo.c 0x00000000 Number 0 rm_note11pro_demo.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfcmple.s 0x00000000 Number 0 cfcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 strlen.o(.text) + .text 0x000101f6 Section 0 memcmp.o(.text) + .text 0x00010210 Section 0 fadd.o(.text) + .text 0x000102c2 Section 0 fmul.o(.text) + .text 0x0001033c Section 0 fdiv.o(.text) + .text 0x000103b8 Section 0 fscalb.o(.text) + .text 0x000103d0 Section 0 dadd.o(.text) + .text 0x00010534 Section 0 dmul.o(.text) + .text 0x00010604 Section 0 ffltui.o(.text) + .text 0x00010614 Section 0 dfltui.o(.text) + .text 0x00010630 Section 0 ffixui.o(.text) + .text 0x00010658 Section 0 dfixui.o(.text) + .text 0x00010694 Section 0 f2d.o(.text) + .text 0x000106bc Section 0 d2f.o(.text) + .text 0x000106f4 Section 20 cfcmple.o(.text) + .text 0x00010708 Section 20 cfrcmple.o(.text) + .text 0x0001071c Section 0 uldiv.o(.text) + .text 0x0001077c Section 0 llshl.o(.text) + .text 0x0001079c Section 0 llushr.o(.text) + .text 0x000107be Section 0 llsshr.o(.text) + .text 0x000107e4 Section 0 iusefp.o(.text) + .text 0x000107e4 Section 0 fepilogue.o(.text) + .text 0x00010866 Section 0 depilogue.o(.text) + .text 0x00010924 Section 0 ddiv.o(.text) + .text 0x00010a14 Section 0 dfixul.o(.text) + .text 0x00010a54 Section 40 cdrcmple.o(.text) + .text 0x00010a7c Section 36 init.o(.text) + .text 0x00010aa0 Section 0 __dczerorl2.o(.text) + i.AP_NRESET_IRQn_Handler 0x00010af8 Section 0 drv_gpio.o(i.AP_NRESET_IRQn_Handler) + i.DMA_IRQn_Handler 0x00010b14 Section 0 drv_dma.o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010b70 Section 0 drv_gpio.o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010b7a Section 0 drv_gpio.o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010b84 Section 0 drv_gpio.o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010b8e Section 0 drv_gpio.o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010b98 Section 0 drv_gpio.o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010ba2 Section 0 drv_gpio.o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010bac Section 0 drv_gpio.o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010bb6 Section 0 drv_gpio.o(i.EXTI_INT7_IRQn_Handler) + i.HardFault_Handler 0x00010bc0 Section 0 drv_common.o(i.HardFault_Handler) + i.LCDC_IRQn_Handler 0x00010c08 Section 0 hal_internal_vsync.o(i.LCDC_IRQn_Handler) + i.MEMC_IRQn_Handler 0x00010d08 Section 0 drv_memc.o(i.MEMC_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010da4 Section 0 drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) + i.Note11Pro_demo 0x00010e5c Section 0 rm_note11pro_demo.o(i.Note11Pro_demo) + i.SWIRE_IRQn_Handler 0x00010ed8 Section 0 drv_swire.o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00010f08 Section 0 drv_common.o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00010f20 Section 0 drv_timer.o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x00010f2a Section 0 drv_timer.o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00010f34 Section 0 drv_timer.o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x00010f3e Section 0 drv_timer.o(i.TIMER3_IRQn_Handler) + i.VIDC_IRQn_Handler 0x00010f48 Section 0 drv_vidc.o(i.VIDC_IRQn_Handler) + i.VPRE1_IRQn_Handler 0x00010f64 Section 0 drv_rxbr.o(i.VPRE1_IRQn_Handler) + i.VPRE_IRQn_Handler 0x00010f80 Section 0 hal_internal_dcs.o(i.VPRE_IRQn_Handler) + i.__scatterload_copy 0x00010fec Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_null 0x00010ffa Section 2 handlers.o(i.__scatterload_null) + .ARM.__at_0x11000 0x00011000 Section 28 drv_common.o(.ARM.__at_0x11000) + .ARM.__at_0x1101C 0x0001101c Section 16 tau_log.o(.ARM.__at_0x1101C) + .ARM.__at_0x1102C 0x0001102c Section 22 hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) + i.MIPI_RX_IRQn_Handler 0x00011044 Section 0 drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) + i.UART_IRQn_Handler 0x000113a8 Section 0 drv_uart.o(i.UART_IRQn_Handler) + i.__0printf 0x00011528 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x00011548 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x0001156c Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x0001159a Section 0 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + i.__NVIC_DisableIRQ 0x000115b4 Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x000115b5 Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x000115d4 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x000115d5 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__scatterload_zeroinit 0x000115ec Section 14 handlers.o(i.__scatterload_zeroinit) + i._fp_digits 0x000115fc Section 0 printfa.o(i._fp_digits) + _fp_digits 0x000115fd Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x00011770 Section 0 printfa.o(i._printf_core) + _printf_core 0x00011771 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011e5c Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011e5d Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011e7c Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011e7d Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011ea8 Section 0 printfa.o(i._sputc) + _sputc 0x00011ea9 Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011eb4 Section 0 rm_note11pro_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011eb5 Thumb Code 142 rm_note11pro_demo.o(i.ap_dcs_read) + i.ap_dcs_set_display_off 0x00011f74 Section 0 rm_note11pro_demo.o(i.ap_dcs_set_display_off) + ap_dcs_set_display_off 0x00011f75 Thumb Code 44 rm_note11pro_demo.o(i.ap_dcs_set_display_off) + i.ap_dcs_set_display_on 0x00011fd0 Section 0 rm_note11pro_demo.o(i.ap_dcs_set_display_on) + ap_dcs_set_display_on 0x00011fd1 Thumb Code 28 rm_note11pro_demo.o(i.ap_dcs_set_display_on) + i.ap_dcs_set_enter_sleep_mode 0x00012018 Section 0 rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) + ap_dcs_set_enter_sleep_mode 0x00012019 Thumb Code 90 rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) + i.ap_dcs_set_exit_sleep_mode 0x0001207c Section 0 rm_note11pro_demo.o(i.ap_dcs_set_exit_sleep_mode) + ap_dcs_set_exit_sleep_mode 0x0001207d Thumb Code 20 rm_note11pro_demo.o(i.ap_dcs_set_exit_sleep_mode) + i.ap_rstn_pull_down_cb 0x000120c0 Section 0 rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) + ap_rstn_pull_down_cb 0x000120c1 Thumb Code 32 rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) + i.ap_rstn_pull_high_cb 0x0001211c Section 0 rm_note11pro_demo.o(i.ap_rstn_pull_high_cb) + ap_rstn_pull_high_cb 0x0001211d Thumb Code 20 rm_note11pro_demo.o(i.ap_rstn_pull_high_cb) + i.ap_set_backlight 0x00012134 Section 0 rm_note11pro_demo.o(i.ap_set_backlight) + ap_set_backlight 0x00012135 Thumb Code 54 rm_note11pro_demo.o(i.ap_set_backlight) + i.ap_update_frame_rate 0x00012194 Section 0 rm_note11pro_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x00012195 Thumb Code 54 rm_note11pro_demo.o(i.ap_update_frame_rate) + i.ap_update_pps_9E 0x00012220 Section 0 rm_note11pro_demo.o(i.ap_update_pps_9E) + ap_update_pps_9E 0x00012221 Thumb Code 98 rm_note11pro_demo.o(i.ap_update_pps_9E) + i.app_display_init 0x0001229c Section 0 rm_note11pro_demo.o(i.app_display_init) + i.app_gpio_init 0x000122c8 Section 0 rm_note11pro_demo.o(i.app_gpio_init) + i.app_init_panel 0x000122e8 Section 0 rm_note11pro_demo.o(i.app_init_panel) + app_init_panel 0x000122e9 Thumb Code 146 rm_note11pro_demo.o(i.app_init_panel) + i.app_mipi_rx_init 0x00012384 Section 0 rm_note11pro_demo.o(i.app_mipi_rx_init) + app_mipi_rx_init 0x00012385 Thumb Code 146 rm_note11pro_demo.o(i.app_mipi_rx_init) + i.app_mipi_tx_init 0x00012434 Section 0 rm_note11pro_demo.o(i.app_mipi_tx_init) + app_mipi_tx_init 0x00012435 Thumb Code 100 rm_note11pro_demo.o(i.app_mipi_tx_init) + i.app_mipi_tx_start 0x000124a4 Section 0 rm_note11pro_demo.o(i.app_mipi_tx_start) + app_mipi_tx_start 0x000124a5 Thumb Code 92 rm_note11pro_demo.o(i.app_mipi_tx_start) + i.app_system_suspend 0x00012528 Section 0 rm_note11pro_demo.o(i.app_system_suspend) + app_system_suspend 0x00012529 Thumb Code 134 rm_note11pro_demo.o(i.app_system_suspend) + i.app_tx_cmd_panel_te_cb 0x00012608 Section 0 rm_note11pro_demo.o(i.app_tx_cmd_panel_te_cb) + app_tx_cmd_panel_te_cb 0x00012609 Thumb Code 16 rm_note11pro_demo.o(i.app_tx_cmd_panel_te_cb) + i.board_Init 0x0001261c Section 0 board.o(i.board_Init) + i.ceil 0x00012634 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x000126fc Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x000126fd Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x00012728 Section 0 hal_internal_dcs.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x00012729 Thumb Code 84 hal_internal_dcs.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x000127b0 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x00012808 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x00012820 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00012864 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.delayMs 0x00012888 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x000128a0 Section 0 tau_delay.o(i.delayUs) + i.drv_common_system_init 0x000128cc Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_enable_clock 0x000128d4 Section 0 drv_crgu.o(i.drv_crgu_enable_clock) + i.drv_crgu_get_rxbr_clk 0x00012910 Section 0 drv_crgu.o(i.drv_crgu_get_rxbr_clk) + i.drv_crgu_reset_modules 0x00012978 Section 0 drv_crgu.o(i.drv_crgu_reset_modules) + i.drv_crgu_set_ahb_clk 0x00012988 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_clk) + i.drv_crgu_set_clock_div 0x000129b0 Section 0 drv_crgu.o(i.drv_crgu_set_clock_div) + i.drv_crgu_set_dpi_clk 0x000129c0 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_clk) + i.drv_crgu_set_dsc_clk 0x000129fc Section 0 drv_crgu.o(i.drv_crgu_set_dsc_clk) + i.drv_crgu_set_fb_clk 0x00012a34 Section 0 drv_crgu.o(i.drv_crgu_set_fb_clk) + i.drv_crgu_set_lcdc_clk 0x00012a5c Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_clk) + i.drv_crgu_set_reset 0x00012a84 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_clk 0x00012a9c Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_clk) + i.drv_crgu_set_vidc_clk 0x00012ac4 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_clk) + i.drv_dma_clear_status 0x00012aec Section 0 drv_dma.o(i.drv_dma_clear_status) + i.drv_dma_get_int_source 0x00012b04 Section 0 drv_dma.o(i.drv_dma_get_int_source) + drv_dma_get_int_source 0x00012b05 Thumb Code 16 drv_dma.o(i.drv_dma_get_int_source) + i.drv_dsc_dec_disable 0x00012b18 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00012b34 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00012b6c Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_irqen 0x00012b8c Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_irqen) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00012ba8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00012cb4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00012cf4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00012cf5 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00012d44 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00012d45 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00012d60 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_ddi_crc_en 0x00012d70 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en) + i.drv_dsi_rx_get_max_ret_size 0x00012d80 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00012d8c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_check_crc 0x00012da4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) + i.drv_dsi_rx_set_ctrl_cfg 0x00012dc0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00012de4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_ddi_crc_en 0x00012df4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en) + i.drv_dsi_rx_set_inten 0x00012e10 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00012e1c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_ipi_ycbcr_frmt 0x00012e2c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt) + i.drv_dsi_rx_set_lane_swap 0x00012e48 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00012e5c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_tear_resp_en 0x00012e80 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en) + i.drv_dsi_rx_set_up_phy 0x00012e9c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00012f9c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00012fb4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00012fcc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00013024 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x00013030 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00013050 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x0001305c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x0001306c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x0001307c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x000130a0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x000130ac Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x000130b8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x000130c4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x000130e0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x00013100 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00013110 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x00013178 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x000131bc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x0001330c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x0001332c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00013338 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x0001335c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x00013378 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x0001338c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x000133cc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x000133e4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x000133f8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x0001341c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x00013428 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00013454 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_efuse_enter_inactive 0x0001353c Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x00013572 Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x0001357e Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x000135b8 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_handle_int 0x000135d0 Section 0 drv_gpio.o(i.drv_gpio_handle_int) + drv_gpio_handle_int 0x000135d1 Thumb Code 30 drv_gpio.o(i.drv_gpio_handle_int) + i.drv_gpio_register_ap_reset_callback 0x000135f4 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x00013600 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00013614 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x00013658 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode 0x00013678 Section 0 drv_gpio.o(i.drv_gpio_set_mode) + i.drv_gpio_set_output_data 0x0001368c Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x0001368d Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_lcdc_bcsa_config 0x000136ac Section 0 drv_lcdc.o(i.drv_lcdc_bcsa_config) + i.drv_lcdc_cfg_int_frame 0x000136d4 Section 0 drv_lcdc.o(i.drv_lcdc_cfg_int_frame) + i.drv_lcdc_clear_int 0x00013700 Section 0 drv_lcdc.o(i.drv_lcdc_clear_int) + drv_lcdc_clear_int 0x00013701 Thumb Code 20 drv_lcdc.o(i.drv_lcdc_clear_int) + i.drv_lcdc_cmd_start 0x00013718 Section 0 drv_lcdc.o(i.drv_lcdc_cmd_start) + i.drv_lcdc_config_acc_command_mode 0x0001374c Section 0 drv_lcdc.o(i.drv_lcdc_config_acc_command_mode) + i.drv_lcdc_config_int 0x00013760 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00013798 Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite_rgb 0x000137c0 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_src_parameter 0x000137d8 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_crop_hact 0x00013828 Section 0 drv_lcdc.o(i.drv_lcdc_crop_hact) + i.drv_lcdc_ctrl_flow 0x00013838 Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_dith_config 0x00013870 Section 0 drv_lcdc.o(i.drv_lcdc_dith_config) + i.drv_lcdc_edge_dect_config 0x000138a0 Section 0 drv_lcdc.o(i.drv_lcdc_edge_dect_config) + i.drv_lcdc_edge_enh_config 0x000138dc Section 0 drv_lcdc.o(i.drv_lcdc_edge_enh_config) + i.drv_lcdc_enable_shadow_reg 0x00013940 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_endianness_config 0x00013964 Section 0 drv_lcdc.o(i.drv_lcdc_endianness_config) + i.drv_lcdc_fc_config 0x00013980 Section 0 drv_lcdc.o(i.drv_lcdc_fc_config) + i.drv_lcdc_fixed_frame_output 0x000139a0 Section 0 drv_lcdc.o(i.drv_lcdc_fixed_frame_output) + i.drv_lcdc_fldc_config 0x000139d8 Section 0 drv_lcdc.o(i.drv_lcdc_fldc_config) + i.drv_lcdc_function_disable 0x000139fc Section 0 drv_lcdc.o(i.drv_lcdc_function_disable) + i.drv_lcdc_function_enable 0x00013a20 Section 0 drv_lcdc.o(i.drv_lcdc_function_enable) + i.drv_lcdc_set_int 0x00013a44 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_prefetch 0x00013a80 Section 0 drv_lcdc.o(i.drv_lcdc_set_prefetch) + i.drv_lcdc_set_tear_line 0x00013a9c Section 0 drv_lcdc.o(i.drv_lcdc_set_tear_line) + i.drv_lcdc_stop_display 0x00013ab8 Section 0 drv_lcdc.o(i.drv_lcdc_stop_display) + i.drv_lcdc_vid_hw_start 0x00013ac8 Section 0 drv_lcdc.o(i.drv_lcdc_vid_hw_start) + i.drv_lcdc_vintp_mode_config 0x00013b04 Section 0 drv_lcdc.o(i.drv_lcdc_vintp_mode_config) + i.drv_memc_clear_status 0x00013b1c Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00013b30 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00013b70 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00013b80 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_get_tear_mode 0x00013b98 Section 0 drv_memc.o(i.drv_memc_get_tear_mode) + i.drv_memc_rate_transfer_sel 0x00013ba8 Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00013bc4 Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00013bd8 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_circ_mode_enable 0x00013bf0 Section 0 drv_memc.o(i.drv_memc_set_circ_mode_enable) + i.drv_memc_set_data_mode 0x00013c0c Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00013c20 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_frame_drop_select 0x00013c38 Section 0 drv_memc.o(i.drv_memc_set_frame_drop_select) + i.drv_memc_set_fs_en_conditions 0x00013c54 Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_lcdc_st_conditions 0x00013c6c Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00013c88 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_ltpo_pu_thres 0x00013ca8 Section 0 drv_memc.o(i.drv_memc_set_ltpo_pu_thres) + i.drv_memc_set_tear_mode 0x00013cc0 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00013cd4 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00013d00 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_phy_test_clear 0x00013d14 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00013d24 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_pwr_efuse_pd 0x00013d3c Section 0 drv_pwr.o(i.drv_pwr_efuse_pd) + i.drv_pwr_enter_deep_sleep_mode 0x00013d6c Section 0 drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) + i.drv_pwr_enter_sleep_mode_ex 0x00013db8 Section 0 drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex) + i.drv_pwr_enter_stop_sleep_mode 0x00013dec Section 0 drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) + i.drv_pwr_exit_sleep_mode 0x00013e84 Section 0 drv_pwr.o(i.drv_pwr_exit_sleep_mode) + i.drv_pwr_get_power_ready_st 0x00013eac Section 0 drv_pwr.o(i.drv_pwr_get_power_ready_st) + i.drv_pwr_set_breath_screen_power_sel 0x00013ebc Section 0 drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) + i.drv_pwr_set_digit_power_sel 0x00013ee4 Section 0 drv_pwr.o(i.drv_pwr_set_digit_power_sel) + i.drv_pwr_set_pll_clk 0x00013f0c Section 0 drv_pwr.o(i.drv_pwr_set_pll_clk) + i.drv_pwr_set_wakeup_type 0x00013f40 Section 0 drv_pwr.o(i.drv_pwr_set_wakeup_type) + i.drv_pwr_write_lock 0x00013f6c Section 0 drv_pwr.o(i.drv_pwr_write_lock) + i.drv_rxbr_clear_pkt_buffer 0x00013f8c Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00013f9c Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00013fa8 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x00014004 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_int_source 0x00014020 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00014021 Thumb Code 20 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_status0 0x00014038 Section 0 hal_internal_dcs.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x00014039 Thumb Code 20 hal_internal_dcs.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x00014050 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv1_cfg 0x00014064 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00014078 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq1_callback 0x00014088 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x00014094 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_color_format 0x000140ac Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_filter_regs 0x000140c8 Section 0 drv_rxbr.o(i.drv_rxbr_set_filter_regs) + i.drv_rxbr_set_inten 0x000140ec Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x00014108 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x00014120 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x00014160 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x00014170 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_se_init 0x00014180 Section 0 drv_se.o(i.drv_se_init) + i.drv_se_set_dsc 0x000141f8 Section 0 drv_se.o(i.drv_se_set_dsc) + i.drv_se_set_lcdc 0x000142cc Section 0 drv_se.o(i.drv_se_set_lcdc) + i.drv_se_set_memc 0x00014354 Section 0 drv_se.o(i.drv_se_set_memc) + i.drv_se_set_rxbr 0x000143bc Section 0 drv_se.o(i.drv_se_set_rxbr) + i.drv_se_set_vidc 0x0001448c Section 0 drv_se.o(i.drv_se_set_vidc) + i.drv_se_start_rx 0x00014538 Section 0 drv_se.o(i.drv_se_start_rx) + i.drv_swire_enable 0x0001454c Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_get_pulse_count 0x00014568 Section 0 drv_swire.o(i.drv_swire_get_pulse_count) + i.drv_swire_register_callback 0x00014574 Section 0 drv_swire.o(i.drv_swire_register_callback) + i.drv_swire_set_bit_time 0x00014580 Section 0 drv_swire.o(i.drv_swire_set_bit_time) + i.drv_swire_set_int 0x00014598 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x000145e0 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_swire_set_pulse_count 0x000145fc Section 0 drv_swire.o(i.drv_swire_set_pulse_count) + i.drv_swire_set_trig_mode 0x00014608 Section 0 drv_swire.o(i.drv_swire_set_trig_mode) + i.drv_sys_cfg_clear_all_int 0x00014624 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00014630 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_trig 0x00014658 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x0001467c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x000146a0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_sel_swire_timer 0x000146c4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer) + i.drv_sys_cfg_set_int 0x000146dc Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x00014700 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x00014701 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x0001471a Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x0001473c Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_handle_interrupt 0x0001474c Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x0001474d Thumb Code 54 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_set_compare_val 0x00014788 Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x000147c8 Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x00014810 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x00014838 Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_enter 0x00014848 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x00014868 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_code 0x00014888 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_uart_abort_recv 0x000148b0 Section 0 drv_uart.o(i.drv_uart_abort_recv) + i.drv_uart_abort_send 0x000148e4 Section 0 drv_uart.o(i.drv_uart_abort_send) + i.drv_uart_config_int 0x00014918 Section 0 drv_uart.o(i.drv_uart_config_int) + i.drv_uart_enable_clk 0x0001492c Section 0 drv_uart.o(i.drv_uart_enable_clk) + drv_uart_enable_clk 0x0001492d Thumb Code 24 drv_uart.o(i.drv_uart_enable_clk) + i.drv_uart_enable_int 0x00014944 Section 0 drv_uart.o(i.drv_uart_enable_int) + i.drv_uart_get_instance 0x000149a0 Section 0 drv_uart.o(i.drv_uart_get_instance) + i.drv_uart_init 0x000149c8 Section 0 drv_uart.o(i.drv_uart_init) + i.drv_uart_int_trans_handle 0x00014a98 Section 0 drv_uart.o(i.drv_uart_int_trans_handle) + drv_uart_int_trans_handle 0x00014a99 Thumb Code 54 drv_uart.o(i.drv_uart_int_trans_handle) + i.drv_uart_reset_rx_fifo 0x00014ad4 Section 0 drv_uart.o(i.drv_uart_reset_rx_fifo) + i.drv_uart_reset_tx_fifo 0x00014af0 Section 0 drv_uart.o(i.drv_uart_reset_tx_fifo) + i.drv_uart_send_blocking 0x00014b0c Section 0 drv_uart.o(i.drv_uart_send_blocking) + i.drv_uart_set_baud_rate 0x00014b26 Section 0 drv_uart.o(i.drv_uart_set_baud_rate) + i.drv_uart_trans_create_handle 0x00014b7c Section 0 drv_uart.o(i.drv_uart_trans_create_handle) + i.drv_vidc_clear_irq 0x00014bc8 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00014bd8 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00014bf8 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_int_source 0x00014c38 Section 0 drv_vidc.o(i.drv_vidc_get_int_source) + i.drv_vidc_get_irq_status 0x00014c64 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x00014c7c Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x00014ca8 Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x00014cb4 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_circ_mode_enable 0x00014cc0 Section 0 drv_vidc.o(i.drv_vidc_set_circ_mode_enable) + i.drv_vidc_set_dither_config 0x00014cdc Section 0 drv_vidc.o(i.drv_vidc_set_dither_config) + i.drv_vidc_set_dst_parameter 0x00014d14 Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_honly_hcoef0 0x00014d70 Section 0 drv_vidc.o(i.drv_vidc_set_honly_hcoef0) + i.drv_vidc_set_honly_hinitb 0x00014d7c Section 0 drv_vidc.o(i.drv_vidc_set_honly_hinitb) + i.drv_vidc_set_honly_hinitr 0x00014da8 Section 0 drv_vidc.o(i.drv_vidc_set_honly_hinitr) + i.drv_vidc_set_irqen 0x00014dd8 Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00014df4 Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_pentile_swap 0x00014e08 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x00014e24 Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x00014e30 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x00014e48 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00014e54 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x00014e60 Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00014e74 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00014e80 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00014e8c Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_vidc_set_vintp_config 0x00014eac Section 0 drv_vidc.o(i.drv_vidc_set_vintp_config) + i.fputc 0x00014ee4 Section 0 tau_log.o(i.fputc) + i.ha_intl_fb_check_pu_size 0x00014f18 Section 0 hal_internal_fb.o(i.ha_intl_fb_check_pu_size) + ha_intl_fb_check_pu_size 0x00014f19 Thumb Code 58 hal_internal_fb.o(i.ha_intl_fb_check_pu_size) + i.hal_dsi_rx_ctrl_create_handle 0x00014f58 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_dcs_async_handler 0x00014f98 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) + i.hal_dsi_rx_ctrl_deinit 0x00014fd8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_get_compressen_en 0x0001506c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00015074 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00015094 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00015140 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00015141 Thumb Code 222 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00015240 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00015241 Thumb Code 232 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00015348 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00015349 Thumb Code 294 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x00015474 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x00015475 Thumb Code 314 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x000155bc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x000155bd Thumb Code 624 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x0001583c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00015874 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_check_crc 0x00015964 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x0001597c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x0001597d Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_start 0x000159ac Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x000159dc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_input_frame_rate 0x00015a0c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) + i.hal_dsi_rx_ctrl_toggle_resolution 0x00015a18 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_cmd_mode_cal_timing 0x00015a38 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) + hal_dsi_tx_cmd_mode_cal_timing 0x00015a39 Thumb Code 510 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) + i.hal_dsi_tx_ctrl_create_handle 0x00015cb8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00015cf0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_gen_a_frame 0x00015d64 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame) + i.hal_dsi_tx_ctrl_gen_a_tear_signal 0x00015d70 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) + i.hal_dsi_tx_ctrl_init 0x00015d94 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00015e10 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00015e11 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00015e20 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_tear_mode 0x00015e28 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) + i.hal_dsi_tx_ctrl_start 0x00015e34 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00015ec4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00015efc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00015ff0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_cfg 0x000160c0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) + hal_dsi_tx_init_cfg 0x000160c1 Thumb Code 250 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) + i.hal_dsi_tx_init_dpi_timing 0x000161c4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) + hal_dsi_tx_init_dpi_timing 0x000161c5 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) + i.hal_dsi_tx_init_phy_cfg 0x00016208 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00016209 Thumb Code 22 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_timing 0x0001621e Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) + hal_dsi_tx_init_timing 0x0001621f Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) + i.hal_dsi_tx_init_vid_timing 0x00016270 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) + hal_dsi_tx_init_vid_timing 0x00016271 Thumb Code 70 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) + i.hal_dsi_tx_send_cmd 0x000162c4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x000162c5 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_dsi_tx_timing_info_update 0x00016304 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) + hal_dsi_tx_timing_info_update 0x00016305 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) + i.hal_dsi_tx_vid_mode_cal_timing 0x00016398 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) + hal_dsi_tx_vid_mode_cal_timing 0x00016399 Thumb Code 766 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) + i.hal_gpio_config_pad 0x000166a8 Section 0 hal_gpio.o(i.hal_gpio_config_pad) + i.hal_gpio_ctrl_eint 0x000166e4 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_init_eint 0x000166fc Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x0001673c Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x00016752 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00016770 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x0001678c Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x000167dc Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x0001683c Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_internal_sync_get_hight_performan_mode 0x00016844 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change 0x00016854 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_sync_register_lcdc_cb 0x00016a08 Section 0 hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) + i.hal_internal_vsync_deinit 0x00016a14 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00016a34 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00016a40 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tx_state 0x00016a54 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00016a60 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00016b48 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_rx_state 0x00016c10 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_tear_mode 0x00016c30 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00016e1c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_internal_vsync_toggle_input_frame_rate 0x00016e74 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) + i.hal_intl_dcs_init_sw_fltr 0x00016efc Section 0 hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) + i.hal_intl_dcs_rx_get_dcs_packet_data 0x00016f68 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) + hal_intl_dcs_rx_get_dcs_packet_data 0x00016f69 Thumb Code 782 hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) + i.hal_intl_dcs_rx_receive_packet 0x00017398 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) + hal_intl_dcs_rx_receive_packet 0x00017399 Thumb Code 122 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) + i.hal_intl_dcs_rx_receive_pps 0x00017420 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) + hal_intl_dcs_rx_receive_pps 0x00017421 Thumb Code 266 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) + i.hal_intl_dcs_set_auto_hw_filter 0x00017594 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) + i.hal_intl_dcs_sw_filter_handle 0x00017620 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) + hal_intl_dcs_sw_filter_handle 0x00017621 Thumb Code 36 hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) + i.hal_intl_fb_cal_fb_info 0x0001764c Section 0 hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) + i.hal_intl_fb_check_bandwidth 0x00017964 Section 0 hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) + hal_intl_fb_check_bandwidth 0x00017965 Thumb Code 92 hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) + i.hal_intl_fb_edge_resize 0x000179c8 Section 0 hal_internal_fb.o(i.hal_intl_fb_edge_resize) + hal_intl_fb_edge_resize 0x000179c9 Thumb Code 214 hal_internal_fb.o(i.hal_intl_fb_edge_resize) + i.hal_intl_fb_flow_control_adapter 0x00017aa4 Section 0 hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) + hal_intl_fb_flow_control_adapter 0x00017aa5 Thumb Code 110 hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) + i.hal_intl_fb_get_memc_flow_mode 0x00017b18 Section 0 hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) + i.hal_intl_fb_get_rx_fb_info 0x00017b24 Section 0 hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) + i.hal_intl_fb_get_tx_fb_info 0x00017b34 Section 0 hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) + i.hal_intl_fb_get_user_flow 0x00017b44 Section 0 hal_internal_fb.o(i.hal_intl_fb_get_user_flow) + i.hal_intl_svs_deinit_rx 0x00017b50 Section 0 hal_internal_svs.o(i.hal_intl_svs_deinit_rx) + i.hal_intl_svs_deinit_tx 0x00017b78 Section 0 hal_internal_svs.o(i.hal_intl_svs_deinit_tx) + i.hal_intl_svs_handle 0x00017b88 Section 0 hal_internal_svs.o(i.hal_intl_svs_handle) + i.hal_intl_svs_init_rx 0x00017bac Section 0 hal_internal_svs.o(i.hal_intl_svs_init_rx) + i.hal_intl_svs_init_tx 0x00017c2c Section 0 hal_internal_svs.o(i.hal_intl_svs_init_tx) + i.hal_intl_svs_set_input_frate 0x00017c40 Section 0 hal_internal_svs.o(i.hal_intl_svs_set_input_frate) + i.hal_intl_svs_set_rx_vtt 0x00017cb0 Section 0 hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) + i.hal_intl_svs_update_rxbr_clk 0x00017cbc Section 0 hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) + i.hal_lcdc_displayproc_config 0x00017d04 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) + i.hal_lcdc_init_cfg 0x00017d74 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00017d75 Thumb Code 62 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x00017db2 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x00017db3 Thumb Code 112 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_postproc_config 0x00017e24 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) + i.hal_lcdc_start 0x00017f4c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_start) + hal_lcdc_start 0x00017f4d Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_lcdc_start) + i.hal_lcdc_timinggen_config 0x00017f70 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) + hal_lcdc_timinggen_config 0x00017f71 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) + i.hal_lcdc_upscaler_config 0x00017fac Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) + i.hal_nonshadow_func_update 0x0001808c Section 0 hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) + i.hal_pwr_enter_deep_sleep_mode 0x00018148 Section 0 hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) + i.hal_pwr_enter_normal_sleep_mode 0x00018172 Section 0 hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) + i.hal_pwr_enter_stop_sleep_mode 0x0001817c Section 0 hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) + i.hal_pwr_exit_sleep_mode 0x000181e0 Section 0 hal_pwr.o(i.hal_pwr_exit_sleep_mode) + i.hal_pwr_get_vcc_power_ready 0x000181ea Section 0 hal_pwr.o(i.hal_pwr_get_vcc_power_ready) + i.hal_pwr_set_main_power 0x000181f2 Section 0 hal_pwr.o(i.hal_pwr_set_main_power) + i.hal_pwr_set_sleep_mode_power 0x000181fa Section 0 hal_pwr.o(i.hal_pwr_set_sleep_mode_power) + i.hal_pwr_set_stop_sleep_wakeup_pin 0x00018204 Section 0 hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) + i.hal_swire_deinit 0x00018268 Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_enable 0x000182a8 Section 0 hal_swire.o(i.hal_swire_enable) + i.hal_swire_init 0x00018304 Section 0 hal_swire.o(i.hal_swire_init) + i.hal_swire_set_pulse 0x0001835c Section 0 hal_swire.o(i.hal_swire_set_pulse) + i.hal_swire_set_timer 0x00018380 Section 0 hal_swire.o(i.hal_swire_set_timer) + i.hal_system_init 0x000183c0 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_updata_sysclk 0x000184a4 Section 0 hal_system.o(i.hal_system_updata_sysclk) + i.hal_timer_deinit 0x000184f4 Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x00018524 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_set_repeat 0x00018540 Section 0 hal_timer.o(i.hal_timer_set_repeat) + i.hal_tx_frame_rate_adjust 0x00018548 Section 0 hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) + hal_tx_frame_rate_adjust 0x00018549 Thumb Code 44 hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) + i.hal_uart_init 0x00018578 Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_send_blocking 0x0001860c Section 0 hal_uart.o(i.hal_uart_send_blocking) + i.hal_vsync_func_update 0x00018628 Section 0 hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) + i.hal_vsync_reset_lcdc_scaler 0x00018640 Section 0 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + i.main 0x00018720 Section 0 main.o(i.main) + i.pps_update_handle 0x00018758 Section 0 rm_note11pro_demo.o(i.pps_update_handle) + pps_update_handle 0x00018759 Thumb Code 88 rm_note11pro_demo.o(i.pps_update_handle) + i.rxbr_irq1_callback 0x000187fc Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x000187fd Thumb Code 496 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_double_buffer_update 0x00018af0 Section 0 hal_internal_vsync.o(i.soft_double_buffer_update) + soft_double_buffer_update 0x00018af1 Thumb Code 56 hal_internal_vsync.o(i.soft_double_buffer_update) + i.soft_gen_te 0x00018b34 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x00018b35 Thumb Code 86 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x00018ba0 Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x00018ba1 Thumb Code 202 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_pro_motion_init 0x00018c80 Section 0 hal_internal_vsync.o(i.soft_pro_motion_init) + soft_pro_motion_init 0x00018c81 Thumb Code 46 hal_internal_vsync.o(i.soft_pro_motion_init) + i.soft_tear_adjust_line 0x00018cb8 Section 0 hal_internal_vsync.o(i.soft_tear_adjust_line) + soft_tear_adjust_line 0x00018cb9 Thumb Code 26 hal_internal_vsync.o(i.soft_tear_adjust_line) + i.stop_sleep_cb 0x00018cdc Section 0 hal_pwr.o(i.stop_sleep_cb) + stop_sleep_cb 0x00018cdd Thumb Code 18 hal_pwr.o(i.stop_sleep_cb) + i.svs_direct_mode_setting 0x00018cf4 Section 0 hal_internal_svs.o(i.svs_direct_mode_setting) + svs_direct_mode_setting 0x00018cf5 Thumb Code 154 hal_internal_svs.o(i.svs_direct_mode_setting) + i.svs_get_rel_intv 0x00018da0 Section 0 hal_internal_svs.o(i.svs_get_rel_intv) + svs_get_rel_intv 0x00018da1 Thumb Code 20 hal_internal_svs.o(i.svs_get_rel_intv) + i.svs_sync_handle 0x00018dbc Section 0 hal_internal_svs.o(i.svs_sync_handle) + svs_sync_handle 0x00018dbd Thumb Code 158 hal_internal_svs.o(i.svs_sync_handle) + i.svs_wait_fr_stab 0x00018e6c Section 0 hal_internal_svs.o(i.svs_wait_fr_stab) + svs_wait_fr_stab 0x00018e6d Thumb Code 148 hal_internal_svs.o(i.svs_wait_fr_stab) + i.svs_wait_start 0x00018f38 Section 0 hal_internal_svs.o(i.svs_wait_start) + svs_wait_start 0x00018f39 Thumb Code 250 hal_internal_svs.o(i.svs_wait_start) + i.tau_log_init 0x00019044 Section 0 tau_log.o(i.tau_log_init) + i.tau_log_printf 0x00019078 Section 0 tau_log.o(i.tau_log_printf) + i.tau_log_push_log 0x000190fc Section 0 tau_log.o(i.tau_log_push_log) + i.vidc_callback 0x00019174 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x00019175 Thumb Code 150 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x00019228 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x00019229 Thumb Code 254 hal_internal_vsync.o(i.vpre_err_reset) + .constdata 0x00019340 Section 4804 rm_note11pro_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x00019340 Data 96 rm_note11pro_demo.o(.constdata) + .constdata 0x0001a604 Section 40 hal_dsi_rx_ctrl.o(.constdata) + .constdata 0x0001a62c Section 28 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001a648 Section 182 hal_gpio.o(.constdata) + s_gpio_map 0x0001a648 Data 104 hal_gpio.o(.constdata) + s_gpio_perf 0x0001a6b0 Data 78 hal_gpio.o(.constdata) + .constdata 0x0001a700 Section 48 hal_uart.o(.constdata) + .constdata 0x0001a730 Section 16 drv_uart.o(.constdata) + .conststring 0x0001a740 Section 67 rm_note11pro_demo.o(.conststring) + .conststring 0x0001a784 Section 66 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001a7c8 Section 144 hal_internal_vsync.o(.conststring) + .conststring 0x0001a858 Section 70 hal_internal_dcs.o(.conststring) + .data 0x00070000 Section 144 rm_note11pro_demo.o(.data) + panel_display_done 0x00070000 Data 1 rm_note11pro_demo.o(.data) + sg_system_resume 0x00070001 Data 1 rm_note11pro_demo.o(.data) + sg_system_suspend 0x00070002 Data 1 rm_note11pro_demo.o(.data) + AOD_ON 0x00070003 Data 1 rm_note11pro_demo.o(.data) + display_on_flag 0x00070005 Data 1 rm_note11pro_demo.o(.data) + g_rx_ctrl_handle 0x00070008 Data 4 rm_note11pro_demo.o(.data) + g_tx_ctrl_handle 0x0007000c Data 4 rm_note11pro_demo.o(.data) + .data 0x00070090 Section 48 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00070090 Data 1 hal_dsi_rx_ctrl.o(.data) + g_crc_check_enable 0x00070091 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00070094 Data 4 hal_dsi_rx_ctrl.o(.data) + g_before_draw_col 0x00070098 Data 4 hal_dsi_rx_ctrl.o(.data) + g_before_draw_page 0x0007009c Data 4 hal_dsi_rx_ctrl.o(.data) + pre_step 0x000700a0 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_cmd_filter 0x000700a4 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_x 0x000700a8 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_y 0x000700ac Data 4 hal_dsi_rx_ctrl.o(.data) + pre_value 0x000700b0 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_x 0x000700b4 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_y 0x000700b8 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_value 0x000700bc Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x000700c0 Section 92 hal_dsi_tx_ctrl.o(.data) + sg_bta_vsync_flag 0x000700c0 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_vsync_flag 0x000700c1 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_enter_sleep_cmd 0x000700c2 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_fldc_cg_mode 0x000700c3 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_scl_fir 0x000700c4 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_honly_bypass_fir 0x000700c5 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_bcs 0x000700c6 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_enhc 0x000700c7 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_edge_dect 0x000700c8 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_edge_enh 0x000700c9 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_dith 0x000700ca Data 1 hal_dsi_tx_ctrl.o(.data) + sg_dith_judge 0x000700cb Data 1 hal_dsi_tx_ctrl.o(.data) + sg_endianness 0x000700cc Data 1 hal_dsi_tx_ctrl.o(.data) + sg_test_pattern_en 0x000700cd Data 1 hal_dsi_tx_ctrl.o(.data) + sg_dith_judge_thr 0x000700d0 Data 4 hal_dsi_tx_ctrl.o(.data) + sg_ccm_para 0x000700d4 Data 36 hal_dsi_tx_ctrl.o(.data) + sg_honly_para 0x000700f8 Data 36 hal_dsi_tx_ctrl.o(.data) + .data 0x0007011c Section 2 hal_swire.o(.data) + sg_swire_timer 0x0007011c Data 1 hal_swire.o(.data) + sg_swire_repeat 0x0007011d Data 1 hal_swire.o(.data) + .data 0x00070120 Section 8 hal_pwr.o(.data) + sg_wake_up_io 0x00070120 Data 1 hal_pwr.o(.data) + sg_stop_sleep_wakeup_int 0x00070124 Data 4 hal_pwr.o(.data) + .data 0x00070128 Section 1 tau_log.o(.data) + g_log_port 0x00070128 Data 1 tau_log.o(.data) + .data 0x0007012c Section 24 hal_uart.o(.data) + sg_dma_callback 0x0007013c Data 4 hal_uart.o(.data) + sg_user_data 0x00070140 Data 4 hal_uart.o(.data) + .data 0x00070144 Section 16 hal_internal_vsync.o(.data) + s_te_refine_mode 0x00070144 Data 1 hal_internal_vsync.o(.data) + .data 0x00070154 Section 36 hal_internal_dcs.o(.data) + g_imm_packet 0x00070154 Data 24 hal_internal_dcs.o(.data) + g_cus_rx_write_cmd_handle 0x0007016c Data 12 hal_internal_dcs.o(.data) + .data 0x00070178 Section 12 drv_common.o(.data) + s_my_tick 0x00070178 Data 4 drv_common.o(.data) + .data 0x00070184 Section 1 drv_common.o(.data) + .data 0x00070188 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x00070188 Data 4 drv_gpio.o(.data) + .data 0x0007018c Section 4 drv_swire.o(.data) + sg_drv_swire_cb 0x0007018c Data 4 drv_swire.o(.data) + .data 0x00070190 Section 80 drv_timer.o(.data) + sg_timer_info 0x00070190 Data 80 drv_timer.o(.data) + .data 0x000701e0 Section 4 drv_se.o(.data) + chip_info 0x000701e0 Data 4 drv_se.o(.data) + .data 0x000701e4 Section 1 drv_dsi_rx.o(.data) + sg_rx_drv_level 0x000701e4 Data 1 drv_dsi_rx.o(.data) + .data 0x000701e8 Section 8 drv_rxbr.o(.data) + .data 0x000701f0 Section 4 drv_vidc.o(.data) + .data 0x000701f4 Section 400 drv_dma.o(.data) + sg_dma_handle 0x000701f4 Data 256 drv_dma.o(.data) + .data 0x00070384 Section 4 stdout.o(.data) + .bss 0x00070388 Section 208 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x00070388 Data 208 hal_dsi_rx_ctrl.o(.bss) + .bss 0x00070458 Section 184 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x00070458 Data 92 hal_dsi_tx_ctrl.o(.bss) + sg_dsi_tx_param 0x000704b4 Data 92 hal_dsi_tx_ctrl.o(.bss) + .bss 0x00070510 Section 256 tau_log.o(.bss) + g_log_buf 0x00070510 Data 256 tau_log.o(.bss) + .bss 0x00070610 Section 68 hal_internal_vsync.o(.bss) + .bss 0x00070654 Section 2048 hal_internal_dcs.o(.bss) + .bss 0x00070e54 Section 255 hal_internal_dcs.o(.bss) + g_imm_buffer 0x00070e54 Data 255 hal_internal_dcs.o(.bss) + .bss 0x00070f54 Section 68 hal_internal_fb.o(.bss) + .bss 0x00070f98 Section 68 hal_internal_svs.o(.bss) + sg_sys_handler 0x00070f98 Data 68 hal_internal_svs.o(.bss) + .bss 0x00070fdc Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00070fdc Data 64 drv_gpio.o(.bss) + .bss 0x0007101c Section 4204 dcs_packet_fifo.o(.bss) + .bss 0x00072088 Section 16 drv_dma.o(.bss) + sg_dma_int_list 0x00072088 Data 16 drv_dma.o(.bss) + .bss 0x00072098 Section 96 drv_uart.o(.bss) + sg_uart_userdata 0x00072098 Data 96 drv_uart.o(.bss) + STACK 0x000720f8 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + FLSCTRL_IRQn_Handler 0x00010107 Thumb Code 2 startup_armcm0.o(.text) + WDG_IRQn_Handler 0x00010113 Thumb Code 2 startup_armcm0.o(.text) + I2C0_IRQn_Handler 0x00010117 Thumb Code 2 startup_armcm0.o(.text) + I2C1_IRQn_Handler 0x00010119 Thumb Code 2 startup_armcm0.o(.text) + SPIS_IRQn_Handler 0x0001011b Thumb Code 2 startup_armcm0.o(.text) + SPIM_IRQn_Handler 0x0001011d Thumb Code 2 startup_armcm0.o(.text) + I2C2_IRQn_Handler 0x00010121 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + strlen 0x000101e9 Thumb Code 14 strlen.o(.text) + memcmp 0x000101f7 Thumb Code 26 memcmp.o(.text) + __aeabi_fadd 0x00010211 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x000102b3 Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x000102bb Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x000102c3 Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x0001033d Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x000103b9 Thumb Code 24 fscalb.o(.text) + scalbnf 0x000103b9 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103d1 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x00010519 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x00010525 Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x00010535 Thumb Code 202 dmul.o(.text) + __aeabi_ui2f 0x00010605 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x00010615 Thumb Code 24 dfltui.o(.text) + __aeabi_f2uiz 0x00010631 Thumb Code 40 ffixui.o(.text) + __aeabi_d2uiz 0x00010659 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x00010695 Thumb Code 40 f2d.o(.text) + __aeabi_d2f 0x000106bd Thumb Code 56 d2f.o(.text) + __aeabi_cfcmpeq 0x000106f5 Thumb Code 0 cfcmple.o(.text) + __aeabi_cfcmple 0x000106f5 Thumb Code 20 cfcmple.o(.text) + __aeabi_cfrcmple 0x00010709 Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x0001071d Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x0001077d Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x0001077d Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x0001079d Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x0001079d Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000107bf Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000107bf Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x000107e5 Thumb Code 0 iusefp.o(.text) + _float_round 0x000107e5 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x000107f5 Thumb Code 114 fepilogue.o(.text) + _double_round 0x00010867 Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x00010881 Thumb Code 164 depilogue.o(.text) + __aeabi_ddiv 0x00010925 Thumb Code 234 ddiv.o(.text) + __aeabi_d2ulz 0x00010a15 Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010a55 Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010a7d Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010a7d Thumb Code 0 init.o(.text) + __decompress 0x00010aa1 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010aa1 Thumb Code 86 __dczerorl2.o(.text) + AP_NRESET_IRQn_Handler 0x00010af9 Thumb Code 22 drv_gpio.o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010b15 Thumb Code 78 drv_dma.o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010b71 Thumb Code 10 drv_gpio.o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010b7b Thumb Code 10 drv_gpio.o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010b85 Thumb Code 10 drv_gpio.o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010b8f Thumb Code 10 drv_gpio.o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010b99 Thumb Code 10 drv_gpio.o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010ba3 Thumb Code 10 drv_gpio.o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010bad Thumb Code 10 drv_gpio.o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010bb7 Thumb Code 10 drv_gpio.o(i.EXTI_INT7_IRQn_Handler) + HardFault_Handler 0x00010bc1 Thumb Code 14 drv_common.o(i.HardFault_Handler) + LCDC_IRQn_Handler 0x00010c09 Thumb Code 118 hal_internal_vsync.o(i.LCDC_IRQn_Handler) + MEMC_IRQn_Handler 0x00010d09 Thumb Code 154 drv_memc.o(i.MEMC_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010da5 Thumb Code 70 drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) + Note11Pro_demo 0x00010e5d Thumb Code 70 rm_note11pro_demo.o(i.Note11Pro_demo) + SWIRE_IRQn_Handler 0x00010ed9 Thumb Code 38 drv_swire.o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00010f09 Thumb Code 20 drv_common.o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00010f21 Thumb Code 10 drv_timer.o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x00010f2b Thumb Code 10 drv_timer.o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00010f35 Thumb Code 10 drv_timer.o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x00010f3f Thumb Code 10 drv_timer.o(i.TIMER3_IRQn_Handler) + VIDC_IRQn_Handler 0x00010f49 Thumb Code 22 drv_vidc.o(i.VIDC_IRQn_Handler) + VPRE1_IRQn_Handler 0x00010f65 Thumb Code 22 drv_rxbr.o(i.VPRE1_IRQn_Handler) + VPRE_IRQn_Handler 0x00010f81 Thumb Code 104 hal_internal_dcs.o(i.VPRE_IRQn_Handler) + __scatterload_copy 0x00010fed Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_null 0x00010ffb Thumb Code 2 handlers.o(i.__scatterload_null) + s_RAM_CK 0x00011000 Data 28 drv_common.o(.ARM.__at_0x11000) + g_tau_log 0x0001101c Data 16 tau_log.o(.ARM.__at_0x1101C) + sg_pq_para 0x0001102c Data 22 hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) + MIPI_RX_IRQn_Handler 0x00011045 Thumb Code 354 drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) + UART_IRQn_Handler 0x000113a9 Thumb Code 364 drv_uart.o(i.UART_IRQn_Handler) + __0printf 0x00011529 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x00011549 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x0001156d Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x0001159b Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_zeroinit 0x000115ed Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + app_display_init 0x0001229d Thumb Code 42 rm_note11pro_demo.o(i.app_display_init) + app_gpio_init 0x000122c9 Thumb Code 26 rm_note11pro_demo.o(i.app_gpio_init) + board_Init 0x0001261d Thumb Code 20 board.o(i.board_Init) + ceil 0x00012635 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x000127b1 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x00012809 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x00012821 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00012865 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x00012889 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x000128a1 Thumb Code 40 tau_delay.o(i.delayUs) + drv_common_system_init 0x000128cd Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_enable_clock 0x000128d5 Thumb Code 54 drv_crgu.o(i.drv_crgu_enable_clock) + drv_crgu_get_rxbr_clk 0x00012911 Thumb Code 70 drv_crgu.o(i.drv_crgu_get_rxbr_clk) + drv_crgu_reset_modules 0x00012979 Thumb Code 10 drv_crgu.o(i.drv_crgu_reset_modules) + drv_crgu_set_ahb_clk 0x00012989 Thumb Code 34 drv_crgu.o(i.drv_crgu_set_ahb_clk) + drv_crgu_set_clock_div 0x000129b1 Thumb Code 12 drv_crgu.o(i.drv_crgu_set_clock_div) + drv_crgu_set_dpi_clk 0x000129c1 Thumb Code 54 drv_crgu.o(i.drv_crgu_set_dpi_clk) + drv_crgu_set_dsc_clk 0x000129fd Thumb Code 52 drv_crgu.o(i.drv_crgu_set_dsc_clk) + drv_crgu_set_fb_clk 0x00012a35 Thumb Code 34 drv_crgu.o(i.drv_crgu_set_fb_clk) + drv_crgu_set_lcdc_clk 0x00012a5d Thumb Code 36 drv_crgu.o(i.drv_crgu_set_lcdc_clk) + drv_crgu_set_reset 0x00012a85 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_clk 0x00012a9d Thumb Code 34 drv_crgu.o(i.drv_crgu_set_rxbr_clk) + drv_crgu_set_vidc_clk 0x00012ac5 Thumb Code 36 drv_crgu.o(i.drv_crgu_set_vidc_clk) + drv_dma_clear_status 0x00012aed Thumb Code 20 drv_dma.o(i.drv_dma_clear_status) + drv_dsc_dec_disable 0x00012b19 Thumb Code 20 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00012b35 Thumb Code 44 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00012b6d Thumb Code 22 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_irqen 0x00012b8d Thumb Code 24 drv_dsc_dec.o(i.drv_dsc_dec_set_irqen) + drv_dsi_rx_calc_ipi_tx_delay 0x00012ba9 Thumb Code 252 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00012cb5 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00012d61 Thumb Code 10 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_ddi_crc_en 0x00012d71 Thumb Code 10 drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en) + drv_dsi_rx_get_max_ret_size 0x00012d81 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00012d8d Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_check_crc 0x00012da5 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) + drv_dsi_rx_set_ctrl_cfg 0x00012dc1 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00012de5 Thumb Code 10 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_ddi_crc_en 0x00012df5 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en) + drv_dsi_rx_set_inten 0x00012e11 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00012e1d Thumb Code 12 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_ipi_ycbcr_frmt 0x00012e2d Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt) + drv_dsi_rx_set_lane_swap 0x00012e49 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00012e5d Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_tear_resp_en 0x00012e81 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en) + drv_dsi_rx_set_up_phy 0x00012e9d Thumb Code 224 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00012f9d Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00012fb5 Thumb Code 18 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00012fcd Thumb Code 82 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00013025 Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x00013031 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00013051 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x0001305d Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x0001306d Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x0001307d Thumb Code 32 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x000130a1 Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x000130ad Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x000130b9 Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x000130c5 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x000130e1 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x00013101 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00013111 Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x00013179 Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x000131bd Thumb Code 314 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x0001330d Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x0001332d Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00013339 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x0001335d Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x00013379 Thumb Code 14 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x0001338d Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x000133cd Thumb Code 18 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x000133e5 Thumb Code 14 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x000133f9 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x0001341d Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x00013429 Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00013455 Thumb Code 226 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_efuse_enter_inactive 0x0001353d Thumb Code 54 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x00013573 Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x0001357f Thumb Code 58 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x000135b9 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_register_ap_reset_callback 0x000135f5 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x00013601 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00013615 Thumb Code 62 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x00013659 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode 0x00013679 Thumb Code 16 drv_gpio.o(i.drv_gpio_set_mode) + drv_lcdc_bcsa_config 0x000136ad Thumb Code 30 drv_lcdc.o(i.drv_lcdc_bcsa_config) + drv_lcdc_cfg_int_frame 0x000136d5 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_cfg_int_frame) + drv_lcdc_cmd_start 0x00013719 Thumb Code 46 drv_lcdc.o(i.drv_lcdc_cmd_start) + drv_lcdc_config_acc_command_mode 0x0001374d Thumb Code 14 drv_lcdc.o(i.drv_lcdc_config_acc_command_mode) + drv_lcdc_config_int 0x00013761 Thumb Code 50 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00013799 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite_rgb 0x000137c1 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_src_parameter 0x000137d9 Thumb Code 72 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_crop_hact 0x00013829 Thumb Code 10 drv_lcdc.o(i.drv_lcdc_crop_hact) + drv_lcdc_ctrl_flow 0x00013839 Thumb Code 50 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_dith_config 0x00013871 Thumb Code 40 drv_lcdc.o(i.drv_lcdc_dith_config) + drv_lcdc_edge_dect_config 0x000138a1 Thumb Code 50 drv_lcdc.o(i.drv_lcdc_edge_dect_config) + drv_lcdc_edge_enh_config 0x000138dd Thumb Code 86 drv_lcdc.o(i.drv_lcdc_edge_enh_config) + drv_lcdc_enable_shadow_reg 0x00013941 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_endianness_config 0x00013965 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_endianness_config) + drv_lcdc_fc_config 0x00013981 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_fc_config) + drv_lcdc_fixed_frame_output 0x000139a1 Thumb Code 42 drv_lcdc.o(i.drv_lcdc_fixed_frame_output) + drv_lcdc_fldc_config 0x000139d9 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_fldc_config) + drv_lcdc_function_disable 0x000139fd Thumb Code 30 drv_lcdc.o(i.drv_lcdc_function_disable) + drv_lcdc_function_enable 0x00013a21 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_function_enable) + drv_lcdc_set_int 0x00013a45 Thumb Code 54 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_prefetch 0x00013a81 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_prefetch) + drv_lcdc_set_tear_line 0x00013a9d Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_tear_line) + drv_lcdc_stop_display 0x00013ab9 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_stop_display) + drv_lcdc_vid_hw_start 0x00013ac9 Thumb Code 56 drv_lcdc.o(i.drv_lcdc_vid_hw_start) + drv_lcdc_vintp_mode_config 0x00013b05 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_vintp_mode_config) + drv_memc_clear_status 0x00013b1d Thumb Code 14 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00013b31 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00013b71 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00013b81 Thumb Code 20 drv_memc.o(i.drv_memc_get_status) + drv_memc_get_tear_mode 0x00013b99 Thumb Code 10 drv_memc.o(i.drv_memc_get_tear_mode) + drv_memc_rate_transfer_sel 0x00013ba9 Thumb Code 22 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00013bc5 Thumb Code 16 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00013bd9 Thumb Code 16 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_circ_mode_enable 0x00013bf1 Thumb Code 24 drv_memc.o(i.drv_memc_set_circ_mode_enable) + drv_memc_set_data_mode 0x00013c0d Thumb Code 14 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00013c21 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_frame_drop_select 0x00013c39 Thumb Code 24 drv_memc.o(i.drv_memc_set_frame_drop_select) + drv_memc_set_fs_en_conditions 0x00013c55 Thumb Code 18 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_lcdc_st_conditions 0x00013c6d Thumb Code 20 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00013c89 Thumb Code 28 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_ltpo_pu_thres 0x00013ca9 Thumb Code 18 drv_memc.o(i.drv_memc_set_ltpo_pu_thres) + drv_memc_set_tear_mode 0x00013cc1 Thumb Code 16 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00013cd5 Thumb Code 36 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00013d01 Thumb Code 16 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_phy_test_clear 0x00013d15 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00013d25 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_pwr_efuse_pd 0x00013d3d Thumb Code 36 drv_pwr.o(i.drv_pwr_efuse_pd) + drv_pwr_enter_deep_sleep_mode 0x00013d6d Thumb Code 60 drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) + drv_pwr_enter_sleep_mode_ex 0x00013db9 Thumb Code 34 drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex) + drv_pwr_enter_stop_sleep_mode 0x00013ded Thumb Code 132 drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) + drv_pwr_exit_sleep_mode 0x00013e85 Thumb Code 32 drv_pwr.o(i.drv_pwr_exit_sleep_mode) + drv_pwr_get_power_ready_st 0x00013ead Thumb Code 10 drv_pwr.o(i.drv_pwr_get_power_ready_st) + drv_pwr_set_breath_screen_power_sel 0x00013ebd Thumb Code 34 drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) + drv_pwr_set_digit_power_sel 0x00013ee5 Thumb Code 34 drv_pwr.o(i.drv_pwr_set_digit_power_sel) + drv_pwr_set_pll_clk 0x00013f0d Thumb Code 30 drv_pwr.o(i.drv_pwr_set_pll_clk) + drv_pwr_set_wakeup_type 0x00013f41 Thumb Code 40 drv_pwr.o(i.drv_pwr_set_wakeup_type) + drv_pwr_write_lock 0x00013f6d Thumb Code 18 drv_pwr.o(i.drv_pwr_write_lock) + drv_rxbr_clear_pkt_buffer 0x00013f8d Thumb Code 12 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00013f9d Thumb Code 6 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00013fa9 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x00014005 Thumb Code 18 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_hline_rcv0_cfg 0x00014051 Thumb Code 14 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv1_cfg 0x00014065 Thumb Code 14 drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) + drv_rxbr_hline_rcv_cfg 0x00014079 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq1_callback 0x00014089 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x00014095 Thumb Code 18 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_color_format 0x000140ad Thumb Code 24 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_filter_regs 0x000140c9 Thumb Code 32 drv_rxbr.o(i.drv_rxbr_set_filter_regs) + drv_rxbr_set_inten 0x000140ed Thumb Code 22 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x00014109 Thumb Code 18 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x00014121 Thumb Code 56 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x00014161 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x00014171 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_se_init 0x00014181 Thumb Code 106 drv_se.o(i.drv_se_init) + drv_se_set_dsc 0x000141f9 Thumb Code 162 drv_se.o(i.drv_se_set_dsc) + drv_se_set_lcdc 0x000142cd Thumb Code 88 drv_se.o(i.drv_se_set_lcdc) + drv_se_set_memc 0x00014355 Thumb Code 54 drv_se.o(i.drv_se_set_memc) + drv_se_set_rxbr 0x000143bd Thumb Code 158 drv_se.o(i.drv_se_set_rxbr) + drv_se_set_vidc 0x0001448d Thumb Code 122 drv_se.o(i.drv_se_set_vidc) + drv_se_start_rx 0x00014539 Thumb Code 16 drv_se.o(i.drv_se_start_rx) + drv_swire_enable 0x0001454d Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_get_pulse_count 0x00014569 Thumb Code 6 drv_swire.o(i.drv_swire_get_pulse_count) + drv_swire_register_callback 0x00014575 Thumb Code 6 drv_swire.o(i.drv_swire_register_callback) + drv_swire_set_bit_time 0x00014581 Thumb Code 18 drv_swire.o(i.drv_swire_set_bit_time) + drv_swire_set_int 0x00014599 Thumb Code 64 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x000145e1 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_swire_set_pulse_count 0x000145fd Thumb Code 6 drv_swire.o(i.drv_swire_set_pulse_count) + drv_swire_set_trig_mode 0x00014609 Thumb Code 24 drv_swire.o(i.drv_swire_set_trig_mode) + drv_sys_cfg_clear_all_int 0x00014625 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00014631 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_trig 0x00014659 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x0001467d Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x000146a1 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_sel_swire_timer 0x000146c5 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer) + drv_sys_cfg_set_int 0x000146dd Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x0001471b Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x0001473d Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_set_compare_val 0x00014789 Thumb Code 50 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x000147c9 Thumb Code 68 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x00014811 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x00014839 Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x00014849 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x00014869 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_tx_phy_test_write_code 0x00014889 Thumb Code 34 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_uart_abort_recv 0x000148b1 Thumb Code 46 drv_uart.o(i.drv_uart_abort_recv) + drv_uart_abort_send 0x000148e5 Thumb Code 46 drv_uart.o(i.drv_uart_abort_send) + drv_uart_config_int 0x00014919 Thumb Code 20 drv_uart.o(i.drv_uart_config_int) + drv_uart_enable_int 0x00014945 Thumb Code 84 drv_uart.o(i.drv_uart_enable_int) + drv_uart_get_instance 0x000149a1 Thumb Code 36 drv_uart.o(i.drv_uart_get_instance) + drv_uart_init 0x000149c9 Thumb Code 206 drv_uart.o(i.drv_uart_init) + drv_uart_reset_rx_fifo 0x00014ad5 Thumb Code 28 drv_uart.o(i.drv_uart_reset_rx_fifo) + drv_uart_reset_tx_fifo 0x00014af1 Thumb Code 28 drv_uart.o(i.drv_uart_reset_tx_fifo) + drv_uart_send_blocking 0x00014b0d Thumb Code 26 drv_uart.o(i.drv_uart_send_blocking) + drv_uart_set_baud_rate 0x00014b27 Thumb Code 84 drv_uart.o(i.drv_uart_set_baud_rate) + drv_uart_trans_create_handle 0x00014b7d Thumb Code 72 drv_uart.o(i.drv_uart_trans_create_handle) + drv_vidc_clear_irq 0x00014bc9 Thumb Code 10 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00014bd9 Thumb Code 26 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00014bf9 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_int_source 0x00014c39 Thumb Code 40 drv_vidc.o(i.drv_vidc_get_int_source) + drv_vidc_get_irq_status 0x00014c65 Thumb Code 20 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x00014c7d Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x00014ca9 Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x00014cb5 Thumb Code 8 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_circ_mode_enable 0x00014cc1 Thumb Code 24 drv_vidc.o(i.drv_vidc_set_circ_mode_enable) + drv_vidc_set_dither_config 0x00014cdd Thumb Code 50 drv_vidc.o(i.drv_vidc_set_dither_config) + drv_vidc_set_dst_parameter 0x00014d15 Thumb Code 86 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_honly_hcoef0 0x00014d71 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_honly_hcoef0) + drv_vidc_set_honly_hinitb 0x00014d7d Thumb Code 38 drv_vidc.o(i.drv_vidc_set_honly_hinitb) + drv_vidc_set_honly_hinitr 0x00014da9 Thumb Code 42 drv_vidc.o(i.drv_vidc_set_honly_hinitr) + drv_vidc_set_irqen 0x00014dd9 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00014df5 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_pentile_swap 0x00014e09 Thumb Code 20 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x00014e25 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x00014e31 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x00014e49 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00014e55 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x00014e61 Thumb Code 14 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00014e75 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00014e81 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00014e8d Thumb Code 28 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_vidc_set_vintp_config 0x00014ead Thumb Code 52 drv_vidc.o(i.drv_vidc_set_vintp_config) + fputc 0x00014ee5 Thumb Code 42 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00014f59 Thumb Code 60 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_dcs_async_handler 0x00014f99 Thumb Code 60 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) + hal_dsi_rx_ctrl_deinit 0x00014fd9 Thumb Code 132 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_get_compressen_en 0x0001506d Thumb Code 8 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) + hal_dsi_rx_ctrl_get_max_ret_size 0x00015075 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00015095 Thumb Code 158 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x0001583d Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_send_ack_cmd 0x00015875 Thumb Code 210 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_check_crc 0x00015965 Thumb Code 20 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) + hal_dsi_rx_ctrl_start 0x000159ad Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x000159dd Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_input_frame_rate 0x00015a0d Thumb Code 10 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) + hal_dsi_rx_ctrl_toggle_resolution 0x00015a19 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x00015cb9 Thumb Code 48 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00015cf1 Thumb Code 102 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_gen_a_frame 0x00015d65 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame) + hal_dsi_tx_ctrl_gen_a_tear_signal 0x00015d71 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) + hal_dsi_tx_ctrl_init 0x00015d95 Thumb Code 110 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00015e21 Thumb Code 8 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_tear_mode 0x00015e29 Thumb Code 10 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) + hal_dsi_tx_ctrl_start 0x00015e35 Thumb Code 134 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00015ec5 Thumb Code 52 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00015efd Thumb Code 238 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00015ff1 Thumb Code 202 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_config_pad 0x000166a9 Thumb Code 58 hal_gpio.o(i.hal_gpio_config_pad) + hal_gpio_ctrl_eint 0x000166e5 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_init_eint 0x000166fd Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x0001673d Thumb Code 22 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x00016753 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00016771 Thumb Code 22 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x0001678d Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x000167dd Thumb Code 92 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x0001683d Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_internal_sync_get_hight_performan_mode 0x00016845 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change 0x00016855 Thumb Code 336 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_sync_register_lcdc_cb 0x00016a09 Thumb Code 8 hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) + hal_internal_vsync_deinit 0x00016a15 Thumb Code 22 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00016a35 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00016a41 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tx_state 0x00016a55 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00016a61 Thumb Code 206 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00016b49 Thumb Code 194 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_rx_state 0x00016c11 Thumb Code 28 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_tear_mode 0x00016c31 Thumb Code 424 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00016e1d Thumb Code 78 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_internal_vsync_toggle_input_frame_rate 0x00016e75 Thumb Code 134 hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) + hal_intl_dcs_init_sw_fltr 0x00016efd Thumb Code 90 hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) + hal_intl_dcs_set_auto_hw_filter 0x00017595 Thumb Code 130 hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) + hal_intl_fb_cal_fb_info 0x0001764d Thumb Code 780 hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) + hal_intl_fb_get_memc_flow_mode 0x00017b19 Thumb Code 6 hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) + hal_intl_fb_get_rx_fb_info 0x00017b25 Thumb Code 12 hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) + hal_intl_fb_get_tx_fb_info 0x00017b35 Thumb Code 12 hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) + hal_intl_fb_get_user_flow 0x00017b45 Thumb Code 6 hal_internal_fb.o(i.hal_intl_fb_get_user_flow) + hal_intl_svs_deinit_rx 0x00017b51 Thumb Code 32 hal_internal_svs.o(i.hal_intl_svs_deinit_rx) + hal_intl_svs_deinit_tx 0x00017b79 Thumb Code 10 hal_internal_svs.o(i.hal_intl_svs_deinit_tx) + hal_intl_svs_handle 0x00017b89 Thumb Code 24 hal_internal_svs.o(i.hal_intl_svs_handle) + hal_intl_svs_init_rx 0x00017bad Thumb Code 120 hal_internal_svs.o(i.hal_intl_svs_init_rx) + hal_intl_svs_init_tx 0x00017c2d Thumb Code 16 hal_internal_svs.o(i.hal_intl_svs_init_tx) + hal_intl_svs_set_input_frate 0x00017c41 Thumb Code 100 hal_internal_svs.o(i.hal_intl_svs_set_input_frate) + hal_intl_svs_set_rx_vtt 0x00017cb1 Thumb Code 6 hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) + hal_intl_svs_update_rxbr_clk 0x00017cbd Thumb Code 52 hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) + hal_lcdc_displayproc_config 0x00017d05 Thumb Code 94 hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) + hal_lcdc_postproc_config 0x00017e25 Thumb Code 276 hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) + hal_lcdc_upscaler_config 0x00017fad Thumb Code 202 hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) + hal_nonshadow_func_update 0x0001808d Thumb Code 180 hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) + hal_pwr_enter_deep_sleep_mode 0x00018149 Thumb Code 42 hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) + hal_pwr_enter_normal_sleep_mode 0x00018173 Thumb Code 8 hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) + hal_pwr_enter_stop_sleep_mode 0x0001817d Thumb Code 88 hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) + hal_pwr_exit_sleep_mode 0x000181e1 Thumb Code 10 hal_pwr.o(i.hal_pwr_exit_sleep_mode) + hal_pwr_get_vcc_power_ready 0x000181eb Thumb Code 8 hal_pwr.o(i.hal_pwr_get_vcc_power_ready) + hal_pwr_set_main_power 0x000181f3 Thumb Code 8 hal_pwr.o(i.hal_pwr_set_main_power) + hal_pwr_set_sleep_mode_power 0x000181fb Thumb Code 8 hal_pwr.o(i.hal_pwr_set_sleep_mode_power) + hal_pwr_set_stop_sleep_wakeup_pin 0x00018205 Thumb Code 86 hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) + hal_swire_deinit 0x00018269 Thumb Code 60 hal_swire.o(i.hal_swire_deinit) + hal_swire_enable 0x000182a9 Thumb Code 86 hal_swire.o(i.hal_swire_enable) + hal_swire_init 0x00018305 Thumb Code 74 hal_swire.o(i.hal_swire_init) + hal_swire_set_pulse 0x0001835d Thumb Code 32 hal_swire.o(i.hal_swire_set_pulse) + hal_swire_set_timer 0x00018381 Thumb Code 60 hal_swire.o(i.hal_swire_set_timer) + hal_system_init 0x000183c1 Thumb Code 192 hal_system.o(i.hal_system_init) + hal_system_updata_sysclk 0x000184a5 Thumb Code 60 hal_system.o(i.hal_system_updata_sysclk) + hal_timer_deinit 0x000184f5 Thumb Code 48 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x00018525 Thumb Code 28 hal_timer.o(i.hal_timer_init) + hal_timer_set_repeat 0x00018541 Thumb Code 8 hal_timer.o(i.hal_timer_set_repeat) + hal_uart_init 0x00018579 Thumb Code 134 hal_uart.o(i.hal_uart_init) + hal_uart_send_blocking 0x0001860d Thumb Code 24 hal_uart.o(i.hal_uart_send_blocking) + hal_vsync_func_update 0x00018629 Thumb Code 18 hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) + hal_vsync_reset_lcdc_scaler 0x00018641 Thumb Code 206 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + main 0x00018721 Thumb Code 22 main.o(i.main) + tau_log_init 0x00019045 Thumb Code 48 tau_log.o(i.tau_log_init) + tau_log_printf 0x00019079 Thumb Code 116 tau_log.o(i.tau_log_printf) + tau_log_push_log 0x000190fd Thumb Code 118 tau_log.o(i.tau_log_push_log) + panel_init_code 0x000193a0 Data 4559 rm_note11pro_demo.o(.constdata) + Region$$Table$$Base 0x0001a8a0 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001a8c0 Number 0 anon$$obj.o(Region$$Table) + note10_pro 0x00070004 Data 1 rm_note11pro_demo.o(.data) + s_pps 0x00070010 Data 128 rm_note11pro_demo.o(.data) + sg_uart0_tx_handle 0x0007012c Data 4 hal_uart.o(.data) + sg_uart0_rx_handle 0x00070130 Data 4 hal_uart.o(.data) + sg_uart1_tx_handle 0x00070134 Data 4 hal_uart.o(.data) + sg_uart1_rx_handle 0x00070138 Data 4 hal_uart.o(.data) + g_sof_gen_te_func 0x00070148 Data 4 hal_internal_vsync.o(.data) + hal_internal_vsync_handle_callback 0x0007014c Data 4 hal_internal_vsync.o(.data) + hal_internal_disp_end_handle_callback 0x00070150 Data 4 hal_internal_vsync.o(.data) + g_systick_cb_func 0x0007017c Data 4 drv_common.o(.data) + g_system_clock 0x00070180 Data 4 drv_common.o(.data) + g_system_delay_step 0x00070184 Data 1 drv_common.o(.data) + g_int_rxbr_irq0_cb_func 0x000701e8 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x000701ec Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x000701f0 Data 4 drv_vidc.o(.data) + dma_req_map 0x000702f4 Data 144 drv_dma.o(.data) + __stdout 0x00070384 Data 4 stdout.o(.data) + g_vsync_handle 0x00070610 Data 40 hal_internal_vsync.o(.bss) + sg_pro_motion_handle 0x00070638 Data 28 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00070654 Data 2048 hal_internal_dcs.o(.bss) + g_rx_fb_info 0x00070f54 Data 68 hal_internal_fb.o(.bss) + g_packet_fifo 0x0007101c Data 4204 dcs_packet_fifo.o(.bss) + __stack_limit 0x000720f8 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x000730f8 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000ac48, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000aa10]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000a8c0, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 279 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 1838 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2146 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2149 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2151 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2153 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2154 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2156 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2158 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2147 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 280 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 1841 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 1843 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 1845 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 1847 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x0000000e Code RO 1849 .text mc_p.l(strlen.o) + 0x000101f6 0x000101f6 0x0000001a Code RO 1851 .text mc_p.l(memcmp.o) + 0x00010210 0x00010210 0x000000b2 Code RO 2116 .text mf_p.l(fadd.o) + 0x000102c2 0x000102c2 0x0000007a Code RO 2118 .text mf_p.l(fmul.o) + 0x0001033c 0x0001033c 0x0000007c Code RO 2120 .text mf_p.l(fdiv.o) + 0x000103b8 0x000103b8 0x00000018 Code RO 2122 .text mf_p.l(fscalb.o) + 0x000103d0 0x000103d0 0x00000164 Code RO 2124 .text mf_p.l(dadd.o) + 0x00010534 0x00010534 0x000000d0 Code RO 2126 .text mf_p.l(dmul.o) + 0x00010604 0x00010604 0x0000000e Code RO 2130 .text mf_p.l(ffltui.o) + 0x00010612 0x00010612 0x00000002 PAD + 0x00010614 0x00010614 0x0000001c Code RO 2132 .text mf_p.l(dfltui.o) + 0x00010630 0x00010630 0x00000028 Code RO 2134 .text mf_p.l(ffixui.o) + 0x00010658 0x00010658 0x0000003c Code RO 2136 .text mf_p.l(dfixui.o) + 0x00010694 0x00010694 0x00000028 Code RO 2138 .text mf_p.l(f2d.o) + 0x000106bc 0x000106bc 0x00000038 Code RO 2140 .text mf_p.l(d2f.o) + 0x000106f4 0x000106f4 0x00000014 Code RO 2142 .text mf_p.l(cfcmple.o) + 0x00010708 0x00010708 0x00000014 Code RO 2144 .text mf_p.l(cfrcmple.o) + 0x0001071c 0x0001071c 0x00000060 Code RO 2161 .text mc_p.l(uldiv.o) + 0x0001077c 0x0001077c 0x00000020 Code RO 2163 .text mc_p.l(llshl.o) + 0x0001079c 0x0001079c 0x00000022 Code RO 2165 .text mc_p.l(llushr.o) + 0x000107be 0x000107be 0x00000026 Code RO 2167 .text mc_p.l(llsshr.o) + 0x000107e4 0x000107e4 0x00000000 Code RO 2169 .text mc_p.l(iusefp.o) + 0x000107e4 0x000107e4 0x00000082 Code RO 2170 .text mf_p.l(fepilogue.o) + 0x00010866 0x00010866 0x000000be Code RO 2172 .text mf_p.l(depilogue.o) + 0x00010924 0x00010924 0x000000f0 Code RO 2176 .text mf_p.l(ddiv.o) + 0x00010a14 0x00010a14 0x00000040 Code RO 2178 .text mf_p.l(dfixul.o) + 0x00010a54 0x00010a54 0x00000028 Code RO 2180 .text mf_p.l(cdrcmple.o) + 0x00010a7c 0x00010a7c 0x00000024 Code RO 2182 .text mc_p.l(init.o) + 0x00010aa0 0x00010aa0 0x00000056 Code RO 2192 .text mc_p.l(__dczerorl2.o) + 0x00010af6 0x00010af6 0x00000002 PAD + 0x00010af8 0x00010af8 0x0000001c Code RO 920 i.AP_NRESET_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b14 0x00010b14 0x0000005c Code RO 1687 i.DMA_IRQn_Handler CVWL668T.lib(drv_dma.o) + 0x00010b70 0x00010b70 0x0000000a Code RO 921 i.EXTI_INT0_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b7a 0x00010b7a 0x0000000a Code RO 922 i.EXTI_INT1_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b84 0x00010b84 0x0000000a Code RO 923 i.EXTI_INT2_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b8e 0x00010b8e 0x0000000a Code RO 924 i.EXTI_INT3_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b98 0x00010b98 0x0000000a Code RO 925 i.EXTI_INT4_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010ba2 0x00010ba2 0x0000000a Code RO 926 i.EXTI_INT5_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010bac 0x00010bac 0x0000000a Code RO 927 i.EXTI_INT6_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010bb6 0x00010bb6 0x0000000a Code RO 928 i.EXTI_INT7_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010bc0 0x00010bc0 0x00000048 Code RO 843 i.HardFault_Handler CVWL668T.lib(drv_common.o) + 0x00010c08 0x00010c08 0x00000100 Code RO 688 i.LCDC_IRQn_Handler CVWL668T.lib(hal_internal_vsync.o) + 0x00010d08 0x00010d08 0x0000009a Code RO 1447 i.MEMC_IRQn_Handler CVWL668T.lib(drv_memc.o) + 0x00010da2 0x00010da2 0x00000002 PAD + 0x00010da4 0x00010da4 0x000000b8 Code RO 1253 i.MIPI_TX_IRQn_Handler CVWL668T.lib(drv_dsi_tx.o) + 0x00010e5c 0x00010e5c 0x0000007c Code RO 90 i.Note11Pro_demo rm_note11pro_demo.o + 0x00010ed8 0x00010ed8 0x00000030 Code RO 1082 i.SWIRE_IRQn_Handler CVWL668T.lib(drv_swire.o) + 0x00010f08 0x00010f08 0x00000018 Code RO 844 i.SysTick_Handler CVWL668T.lib(drv_common.o) + 0x00010f20 0x00010f20 0x0000000a Code RO 1125 i.TIMER0_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f2a 0x00010f2a 0x0000000a Code RO 1126 i.TIMER1_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f34 0x00010f34 0x0000000a Code RO 1127 i.TIMER2_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f3e 0x00010f3e 0x0000000a Code RO 1128 i.TIMER3_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f48 0x00010f48 0x0000001c Code RO 1602 i.VIDC_IRQn_Handler CVWL668T.lib(drv_vidc.o) + 0x00010f64 0x00010f64 0x0000001c Code RO 1513 i.VPRE1_IRQn_Handler CVWL668T.lib(drv_rxbr.o) + 0x00010f80 0x00010f80 0x0000006c Code RO 754 i.VPRE_IRQn_Handler CVWL668T.lib(hal_internal_dcs.o) + 0x00010fec 0x00010fec 0x0000000e Code RO 2186 i.__scatterload_copy mc_p.l(handlers.o) + 0x00010ffa 0x00010ffa 0x00000002 Code RO 2187 i.__scatterload_null mc_p.l(handlers.o) + 0x00010ffc 0x00010ffc 0x00000004 PAD + 0x00011000 0x00011000 0x0000001c Data RO 851 .ARM.__at_0x11000 CVWL668T.lib(drv_common.o) + 0x0001101c 0x0001101c 0x00000010 Data RO 626 .ARM.__at_0x1101C CVWL668T.lib(tau_log.o) + 0x0001102c 0x0001102c 0x00000016 Data RO 427 .ARM.__at_0x1102C CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00011042 0x00011042 0x00000002 PAD + 0x00011044 0x00011044 0x00000364 Code RO 1192 i.MIPI_RX_IRQn_Handler CVWL668T.lib(drv_dsi_rx.o) + 0x000113a8 0x000113a8 0x00000180 Code RO 1750 i.UART_IRQn_Handler CVWL668T.lib(drv_uart.o) + 0x00011528 0x00011528 0x00000020 Code RO 2088 i.__0printf mc_p.l(printfa.o) + 0x00011548 0x00011548 0x00000024 Code RO 2094 i.__0vsprintf mc_p.l(printfa.o) + 0x0001156c 0x0001156c 0x0000002e Code RO 2174 i.__ARM_clz mf_p.l(depilogue.o) + 0x0001159a 0x0001159a 0x0000001a Code RO 374 i.__ARM_common_switch8 CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000115b4 0x000115b4 0x00000020 Code RO 1514 i.__NVIC_DisableIRQ CVWL668T.lib(drv_rxbr.o) + 0x000115d4 0x000115d4 0x00000018 Code RO 1515 i.__NVIC_EnableIRQ CVWL668T.lib(drv_rxbr.o) + 0x000115ec 0x000115ec 0x0000000e Code RO 2188 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x000115fa 0x000115fa 0x00000002 PAD + 0x000115fc 0x000115fc 0x00000174 Code RO 2095 i._fp_digits mc_p.l(printfa.o) + 0x00011770 0x00011770 0x000006ec Code RO 2096 i._printf_core mc_p.l(printfa.o) + 0x00011e5c 0x00011e5c 0x00000020 Code RO 2097 i._printf_post_padding mc_p.l(printfa.o) + 0x00011e7c 0x00011e7c 0x0000002c Code RO 2098 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011ea8 0x00011ea8 0x0000000a Code RO 2100 i._sputc mc_p.l(printfa.o) + 0x00011eb2 0x00011eb2 0x00000002 PAD + 0x00011eb4 0x00011eb4 0x000000c0 Code RO 91 i.ap_dcs_read rm_note11pro_demo.o + 0x00011f74 0x00011f74 0x0000005c Code RO 92 i.ap_dcs_set_display_off rm_note11pro_demo.o + 0x00011fd0 0x00011fd0 0x00000048 Code RO 93 i.ap_dcs_set_display_on rm_note11pro_demo.o + 0x00012018 0x00012018 0x00000064 Code RO 94 i.ap_dcs_set_enter_sleep_mode rm_note11pro_demo.o + 0x0001207c 0x0001207c 0x00000044 Code RO 95 i.ap_dcs_set_exit_sleep_mode rm_note11pro_demo.o + 0x000120c0 0x000120c0 0x0000005c Code RO 96 i.ap_rstn_pull_down_cb rm_note11pro_demo.o + 0x0001211c 0x0001211c 0x00000018 Code RO 97 i.ap_rstn_pull_high_cb rm_note11pro_demo.o + 0x00012134 0x00012134 0x00000060 Code RO 98 i.ap_set_backlight rm_note11pro_demo.o + 0x00012194 0x00012194 0x0000008c Code RO 99 i.ap_update_frame_rate rm_note11pro_demo.o + 0x00012220 0x00012220 0x0000007c Code RO 100 i.ap_update_pps_9E rm_note11pro_demo.o + 0x0001229c 0x0001229c 0x0000002a Code RO 101 i.app_display_init rm_note11pro_demo.o + 0x000122c6 0x000122c6 0x00000002 PAD + 0x000122c8 0x000122c8 0x00000020 Code RO 102 i.app_gpio_init rm_note11pro_demo.o + 0x000122e8 0x000122e8 0x0000009c Code RO 103 i.app_init_panel rm_note11pro_demo.o + 0x00012384 0x00012384 0x000000b0 Code RO 104 i.app_mipi_rx_init rm_note11pro_demo.o + 0x00012434 0x00012434 0x00000070 Code RO 105 i.app_mipi_tx_init rm_note11pro_demo.o + 0x000124a4 0x000124a4 0x00000084 Code RO 106 i.app_mipi_tx_start rm_note11pro_demo.o + 0x00012528 0x00012528 0x000000e0 Code RO 107 i.app_system_suspend rm_note11pro_demo.o + 0x00012608 0x00012608 0x00000014 Code RO 108 i.app_tx_cmd_panel_te_cb rm_note11pro_demo.o + 0x0001261c 0x0001261c 0x00000018 Code RO 253 i.board_Init board.o + 0x00012634 0x00012634 0x000000c8 Code RO 1835 i.ceil m_ps.l(ceil.o) + 0x000126fc 0x000126fc 0x0000002c Code RO 689 i.check_mipi_rx_tx_video_info CVWL668T.lib(hal_internal_vsync.o) + 0x00012728 0x00012728 0x00000088 Code RO 755 i.check_pkt_buf_rev CVWL668T.lib(hal_internal_dcs.o) + 0x000127b0 0x000127b0 0x00000058 Code RO 1158 i.dcs_packet_fifo_alloc CVWL668T.lib(dcs_packet_fifo.o) + 0x00012808 0x00012808 0x00000018 Code RO 1159 i.dcs_packet_fifo_init CVWL668T.lib(dcs_packet_fifo.o) + 0x00012820 0x00012820 0x00000044 Code RO 1160 i.dcs_packet_free_fifo_header CVWL668T.lib(dcs_packet_fifo.o) + 0x00012864 0x00012864 0x00000024 Code RO 1161 i.dcs_packet_get_fifo_header CVWL668T.lib(dcs_packet_fifo.o) + 0x00012888 0x00012888 0x00000018 Code RO 613 i.delayMs CVWL668T.lib(tau_delay.o) + 0x000128a0 0x000128a0 0x0000002c Code RO 614 i.delayUs CVWL668T.lib(tau_delay.o) + 0x000128cc 0x000128cc 0x00000008 Code RO 849 i.drv_common_system_init CVWL668T.lib(drv_common.o) + 0x000128d4 0x000128d4 0x0000003c Code RO 868 i.drv_crgu_enable_clock CVWL668T.lib(drv_crgu.o) + 0x00012910 0x00012910 0x00000068 Code RO 871 i.drv_crgu_get_rxbr_clk CVWL668T.lib(drv_crgu.o) + 0x00012978 0x00012978 0x00000010 Code RO 874 i.drv_crgu_reset_modules CVWL668T.lib(drv_crgu.o) + 0x00012988 0x00012988 0x00000028 Code RO 875 i.drv_crgu_set_ahb_clk CVWL668T.lib(drv_crgu.o) + 0x000129b0 0x000129b0 0x00000010 Code RO 876 i.drv_crgu_set_clock_div CVWL668T.lib(drv_crgu.o) + 0x000129c0 0x000129c0 0x0000003c Code RO 878 i.drv_crgu_set_dpi_clk CVWL668T.lib(drv_crgu.o) + 0x000129fc 0x000129fc 0x00000038 Code RO 879 i.drv_crgu_set_dsc_clk CVWL668T.lib(drv_crgu.o) + 0x00012a34 0x00012a34 0x00000028 Code RO 880 i.drv_crgu_set_fb_clk CVWL668T.lib(drv_crgu.o) + 0x00012a5c 0x00012a5c 0x00000028 Code RO 881 i.drv_crgu_set_lcdc_clk CVWL668T.lib(drv_crgu.o) + 0x00012a84 0x00012a84 0x00000018 Code RO 882 i.drv_crgu_set_reset CVWL668T.lib(drv_crgu.o) + 0x00012a9c 0x00012a9c 0x00000028 Code RO 883 i.drv_crgu_set_rxbr_clk CVWL668T.lib(drv_crgu.o) + 0x00012ac4 0x00012ac4 0x00000028 Code RO 884 i.drv_crgu_set_vidc_clk CVWL668T.lib(drv_crgu.o) + 0x00012aec 0x00012aec 0x00000018 Code RO 1689 i.drv_dma_clear_status CVWL668T.lib(drv_dma.o) + 0x00012b04 0x00012b04 0x00000014 Code RO 1695 i.drv_dma_get_int_source CVWL668T.lib(drv_dma.o) + 0x00012b18 0x00012b18 0x0000001c Code RO 908 i.drv_dsc_dec_disable CVWL668T.lib(drv_dsc_dec.o) + 0x00012b34 0x00012b34 0x00000038 Code RO 909 i.drv_dsc_dec_enable CVWL668T.lib(drv_dsc_dec.o) + 0x00012b6c 0x00012b6c 0x00000020 Code RO 910 i.drv_dsc_dec_get_nslc CVWL668T.lib(drv_dsc_dec.o) + 0x00012b8c 0x00012b8c 0x0000001c Code RO 911 i.drv_dsc_dec_set_irqen CVWL668T.lib(drv_dsc_dec.o) + 0x00012ba8 0x00012ba8 0x0000010c Code RO 1193 i.drv_dsi_rx_calc_ipi_tx_delay CVWL668T.lib(drv_dsi_rx.o) + 0x00012cb4 0x00012cb4 0x00000040 Code RO 1194 i.drv_dsi_rx_enable_irq CVWL668T.lib(drv_dsi_rx.o) + 0x00012cf4 0x00012cf4 0x00000050 Code RO 1196 i.drv_dsi_rx_get_color_bpp CVWL668T.lib(drv_dsi_rx.o) + 0x00012d44 0x00012d44 0x0000001c Code RO 1197 i.drv_dsi_rx_get_color_pcc CVWL668T.lib(drv_dsi_rx.o) + 0x00012d60 0x00012d60 0x00000010 Code RO 1198 i.drv_dsi_rx_get_compression_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012d70 0x00012d70 0x00000010 Code RO 1199 i.drv_dsi_rx_get_ddi_crc_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012d80 0x00012d80 0x0000000c Code RO 1201 i.drv_dsi_rx_get_max_ret_size CVWL668T.lib(drv_dsi_rx.o) + 0x00012d8c 0x00012d8c 0x00000018 Code RO 1204 i.drv_dsi_rx_power_up CVWL668T.lib(drv_dsi_rx.o) + 0x00012da4 0x00012da4 0x0000001c Code RO 1205 i.drv_dsi_rx_set_check_crc CVWL668T.lib(drv_dsi_rx.o) + 0x00012dc0 0x00012dc0 0x00000024 Code RO 1206 i.drv_dsi_rx_set_ctrl_cfg CVWL668T.lib(drv_dsi_rx.o) + 0x00012de4 0x00012de4 0x00000010 Code RO 1207 i.drv_dsi_rx_set_ddi_cfg CVWL668T.lib(drv_dsi_rx.o) + 0x00012df4 0x00012df4 0x0000001c Code RO 1208 i.drv_dsi_rx_set_ddi_crc_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012e10 0x00012e10 0x0000000c Code RO 1211 i.drv_dsi_rx_set_inten CVWL668T.lib(drv_dsi_rx.o) + 0x00012e1c 0x00012e1c 0x00000010 Code RO 1212 i.drv_dsi_rx_set_ipi_cfg CVWL668T.lib(drv_dsi_rx.o) + 0x00012e2c 0x00012e2c 0x0000001c Code RO 1214 i.drv_dsi_rx_set_ipi_ycbcr_frmt CVWL668T.lib(drv_dsi_rx.o) + 0x00012e48 0x00012e48 0x00000014 Code RO 1215 i.drv_dsi_rx_set_lane_swap CVWL668T.lib(drv_dsi_rx.o) + 0x00012e5c 0x00012e5c 0x00000024 Code RO 1216 i.drv_dsi_rx_set_resp_cnt CVWL668T.lib(drv_dsi_rx.o) + 0x00012e80 0x00012e80 0x0000001c Code RO 1217 i.drv_dsi_rx_set_tear_resp_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012e9c 0x00012e9c 0x00000100 Code RO 1218 i.drv_dsi_rx_set_up_phy CVWL668T.lib(drv_dsi_rx.o) + 0x00012f9c 0x00012f9c 0x00000018 Code RO 1219 i.drv_dsi_rx_shut_down CVWL668T.lib(drv_dsi_rx.o) + 0x00012fb4 0x00012fb4 0x00000018 Code RO 1255 i.drv_dsi_tx_command_header CVWL668T.lib(drv_dsi_tx.o) + 0x00012fcc 0x00012fcc 0x00000058 Code RO 1256 i.drv_dsi_tx_command_mode_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x00013024 0x00013024 0x0000000c Code RO 1257 i.drv_dsi_tx_command_put_payload CVWL668T.lib(drv_dsi_tx.o) + 0x00013030 0x00013030 0x00000020 Code RO 1258 i.drv_dsi_tx_config_eotp CVWL668T.lib(drv_dsi_tx.o) + 0x00013050 0x00013050 0x0000000c Code RO 1259 i.drv_dsi_tx_config_int CVWL668T.lib(drv_dsi_tx.o) + 0x0001305c 0x0001305c 0x00000010 Code RO 1260 i.drv_dsi_tx_dpi_lpcmd_time CVWL668T.lib(drv_dsi_tx.o) + 0x0001306c 0x0001306c 0x00000010 Code RO 1261 i.drv_dsi_tx_dpi_mode CVWL668T.lib(drv_dsi_tx.o) + 0x0001307c 0x0001307c 0x00000024 Code RO 1262 i.drv_dsi_tx_dpi_polarity CVWL668T.lib(drv_dsi_tx.o) + 0x000130a0 0x000130a0 0x0000000c Code RO 1263 i.drv_dsi_tx_edpi_cmd_size CVWL668T.lib(drv_dsi_tx.o) + 0x000130ac 0x000130ac 0x0000000c Code RO 1265 i.drv_dsi_tx_get_cmd_status CVWL668T.lib(drv_dsi_tx.o) + 0x000130b8 0x000130b8 0x0000000c Code RO 1267 i.drv_dsi_tx_mode CVWL668T.lib(drv_dsi_tx.o) + 0x000130c4 0x000130c4 0x0000001c Code RO 1268 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL668T.lib(drv_dsi_tx.o) + 0x000130e0 0x000130e0 0x00000020 Code RO 1269 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL668T.lib(drv_dsi_tx.o) + 0x00013100 0x00013100 0x00000010 Code RO 1271 i.drv_dsi_tx_phy_lane_mode CVWL668T.lib(drv_dsi_tx.o) + 0x00013110 0x00013110 0x00000068 Code RO 1274 i.drv_dsi_tx_phy_status_ready CVWL668T.lib(drv_dsi_tx.o) + 0x00013178 0x00013178 0x00000044 Code RO 1275 i.drv_dsi_tx_phy_status_stopstate CVWL668T.lib(drv_dsi_tx.o) + 0x000131bc 0x000131bc 0x00000150 Code RO 1277 i.drv_dsi_tx_phy_test_setup CVWL668T.lib(drv_dsi_tx.o) + 0x0001330c 0x0001330c 0x00000020 Code RO 1278 i.drv_dsi_tx_phy_time_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x0001332c 0x0001332c 0x0000000c Code RO 1282 i.drv_dsi_tx_powerup CVWL668T.lib(drv_dsi_tx.o) + 0x00013338 0x00013338 0x00000024 Code RO 1283 i.drv_dsi_tx_response_mode CVWL668T.lib(drv_dsi_tx.o) + 0x0001335c 0x0001335c 0x0000001c Code RO 1286 i.drv_dsi_tx_set_bta_ack CVWL668T.lib(drv_dsi_tx.o) + 0x00013378 0x00013378 0x00000014 Code RO 1287 i.drv_dsi_tx_set_esc_div CVWL668T.lib(drv_dsi_tx.o) + 0x0001338c 0x0001338c 0x00000040 Code RO 1288 i.drv_dsi_tx_set_int CVWL668T.lib(drv_dsi_tx.o) + 0x000133cc 0x000133cc 0x00000018 Code RO 1289 i.drv_dsi_tx_set_time_out_div CVWL668T.lib(drv_dsi_tx.o) + 0x000133e4 0x000133e4 0x00000014 Code RO 1290 i.drv_dsi_tx_set_video_chunk CVWL668T.lib(drv_dsi_tx.o) + 0x000133f8 0x000133f8 0x00000024 Code RO 1291 i.drv_dsi_tx_set_video_timing CVWL668T.lib(drv_dsi_tx.o) + 0x0001341c 0x0001341c 0x0000000c Code RO 1293 i.drv_dsi_tx_shutdown CVWL668T.lib(drv_dsi_tx.o) + 0x00013428 0x00013428 0x0000002c Code RO 1294 i.drv_dsi_tx_timeout_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x00013454 0x00013454 0x000000e8 Code RO 1297 i.drv_dsi_tx_video_mode_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x0001353c 0x0001353c 0x00000036 Code RO 1795 i.drv_efuse_enter_inactive CVWL668T.lib(drv_efuse.o) + 0x00013572 0x00013572 0x0000000c Code RO 1798 i.drv_efuse_int_enable CVWL668T.lib(drv_efuse.o) + 0x0001357e 0x0001357e 0x0000003a Code RO 1799 i.drv_efuse_read CVWL668T.lib(drv_efuse.o) + 0x000135b8 0x000135b8 0x00000018 Code RO 1800 i.drv_efuse_read_req CVWL668T.lib(drv_efuse.o) + 0x000135d0 0x000135d0 0x00000024 Code RO 931 i.drv_gpio_handle_int CVWL668T.lib(drv_gpio.o) + 0x000135f4 0x000135f4 0x0000000c Code RO 932 i.drv_gpio_register_ap_reset_callback CVWL668T.lib(drv_gpio.o) + 0x00013600 0x00013600 0x00000014 Code RO 933 i.drv_gpio_register_callback CVWL668T.lib(drv_gpio.o) + 0x00013614 0x00013614 0x00000044 Code RO 935 i.drv_gpio_set_int CVWL668T.lib(drv_gpio.o) + 0x00013658 0x00013658 0x00000020 Code RO 936 i.drv_gpio_set_ioe CVWL668T.lib(drv_gpio.o) + 0x00013678 0x00013678 0x00000014 Code RO 937 i.drv_gpio_set_mode CVWL668T.lib(drv_gpio.o) + 0x0001368c 0x0001368c 0x00000020 Code RO 484 i.drv_gpio_set_output_data CVWL668T.lib(hal_gpio.o) + 0x000136ac 0x000136ac 0x00000028 Code RO 1359 i.drv_lcdc_bcsa_config CVWL668T.lib(drv_lcdc.o) + 0x000136d4 0x000136d4 0x0000002c Code RO 1360 i.drv_lcdc_cfg_int_frame CVWL668T.lib(drv_lcdc.o) + 0x00013700 0x00013700 0x00000018 Code RO 1361 i.drv_lcdc_clear_int CVWL668T.lib(drv_lcdc.o) + 0x00013718 0x00013718 0x00000034 Code RO 1363 i.drv_lcdc_cmd_start CVWL668T.lib(drv_lcdc.o) + 0x0001374c 0x0001374c 0x00000014 Code RO 1364 i.drv_lcdc_config_acc_command_mode CVWL668T.lib(drv_lcdc.o) + 0x00013760 0x00013760 0x00000038 Code RO 1365 i.drv_lcdc_config_int CVWL668T.lib(drv_lcdc.o) + 0x00013798 0x00013798 0x00000028 Code RO 1366 i.drv_lcdc_config_int_single CVWL668T.lib(drv_lcdc.o) + 0x000137c0 0x000137c0 0x00000018 Code RO 1367 i.drv_lcdc_config_overwrite_rgb CVWL668T.lib(drv_lcdc.o) + 0x000137d8 0x000137d8 0x00000050 Code RO 1368 i.drv_lcdc_config_src_parameter CVWL668T.lib(drv_lcdc.o) + 0x00013828 0x00013828 0x00000010 Code RO 1369 i.drv_lcdc_crop_hact CVWL668T.lib(drv_lcdc.o) + 0x00013838 0x00013838 0x00000038 Code RO 1370 i.drv_lcdc_ctrl_flow CVWL668T.lib(drv_lcdc.o) + 0x00013870 0x00013870 0x00000030 Code RO 1371 i.drv_lcdc_dith_config CVWL668T.lib(drv_lcdc.o) + 0x000138a0 0x000138a0 0x0000003c Code RO 1373 i.drv_lcdc_edge_dect_config CVWL668T.lib(drv_lcdc.o) + 0x000138dc 0x000138dc 0x00000064 Code RO 1374 i.drv_lcdc_edge_enh_config CVWL668T.lib(drv_lcdc.o) + 0x00013940 0x00013940 0x00000024 Code RO 1375 i.drv_lcdc_enable_shadow_reg CVWL668T.lib(drv_lcdc.o) + 0x00013964 0x00013964 0x0000001c Code RO 1376 i.drv_lcdc_endianness_config CVWL668T.lib(drv_lcdc.o) + 0x00013980 0x00013980 0x00000020 Code RO 1377 i.drv_lcdc_fc_config CVWL668T.lib(drv_lcdc.o) + 0x000139a0 0x000139a0 0x00000038 Code RO 1378 i.drv_lcdc_fixed_frame_output CVWL668T.lib(drv_lcdc.o) + 0x000139d8 0x000139d8 0x00000024 Code RO 1379 i.drv_lcdc_fldc_config CVWL668T.lib(drv_lcdc.o) + 0x000139fc 0x000139fc 0x00000024 Code RO 1380 i.drv_lcdc_function_disable CVWL668T.lib(drv_lcdc.o) + 0x00013a20 0x00013a20 0x00000024 Code RO 1381 i.drv_lcdc_function_enable CVWL668T.lib(drv_lcdc.o) + 0x00013a44 0x00013a44 0x0000003c Code RO 1392 i.drv_lcdc_set_int CVWL668T.lib(drv_lcdc.o) + 0x00013a80 0x00013a80 0x0000001c Code RO 1393 i.drv_lcdc_set_prefetch CVWL668T.lib(drv_lcdc.o) + 0x00013a9c 0x00013a9c 0x0000001c Code RO 1394 i.drv_lcdc_set_tear_line CVWL668T.lib(drv_lcdc.o) + 0x00013ab8 0x00013ab8 0x00000010 Code RO 1396 i.drv_lcdc_stop_display CVWL668T.lib(drv_lcdc.o) + 0x00013ac8 0x00013ac8 0x0000003c Code RO 1398 i.drv_lcdc_vid_hw_start CVWL668T.lib(drv_lcdc.o) + 0x00013b04 0x00013b04 0x00000018 Code RO 1400 i.drv_lcdc_vintp_mode_config CVWL668T.lib(drv_lcdc.o) + 0x00013b1c 0x00013b1c 0x00000014 Code RO 1448 i.drv_memc_clear_status CVWL668T.lib(drv_memc.o) + 0x00013b30 0x00013b30 0x00000040 Code RO 1449 i.drv_memc_enable_irq CVWL668T.lib(drv_memc.o) + 0x00013b70 0x00013b70 0x00000010 Code RO 1450 i.drv_memc_gen_a_tear_signal CVWL668T.lib(drv_memc.o) + 0x00013b80 0x00013b80 0x00000018 Code RO 1451 i.drv_memc_get_status CVWL668T.lib(drv_memc.o) + 0x00013b98 0x00013b98 0x00000010 Code RO 1452 i.drv_memc_get_tear_mode CVWL668T.lib(drv_memc.o) + 0x00013ba8 0x00013ba8 0x0000001c Code RO 1453 i.drv_memc_rate_transfer_sel CVWL668T.lib(drv_memc.o) + 0x00013bc4 0x00013bc4 0x00000014 Code RO 1454 i.drv_memc_sel_vsync CVWL668T.lib(drv_memc.o) + 0x00013bd8 0x00013bd8 0x00000018 Code RO 1455 i.drv_memc_set_active_height CVWL668T.lib(drv_memc.o) + 0x00013bf0 0x00013bf0 0x0000001c Code RO 1456 i.drv_memc_set_circ_mode_enable CVWL668T.lib(drv_memc.o) + 0x00013c0c 0x00013c0c 0x00000014 Code RO 1457 i.drv_memc_set_data_mode CVWL668T.lib(drv_memc.o) + 0x00013c20 0x00013c20 0x00000018 Code RO 1460 i.drv_memc_set_double_buffer CVWL668T.lib(drv_memc.o) + 0x00013c38 0x00013c38 0x0000001c Code RO 1464 i.drv_memc_set_frame_drop_select CVWL668T.lib(drv_memc.o) + 0x00013c54 0x00013c54 0x00000018 Code RO 1465 i.drv_memc_set_fs_en_conditions CVWL668T.lib(drv_memc.o) + 0x00013c6c 0x00013c6c 0x0000001c Code RO 1467 i.drv_memc_set_lcdc_st_conditions CVWL668T.lib(drv_memc.o) + 0x00013c88 0x00013c88 0x00000020 Code RO 1468 i.drv_memc_set_ltpo_mode CVWL668T.lib(drv_memc.o) + 0x00013ca8 0x00013ca8 0x00000018 Code RO 1469 i.drv_memc_set_ltpo_pu_thres CVWL668T.lib(drv_memc.o) + 0x00013cc0 0x00013cc0 0x00000014 Code RO 1473 i.drv_memc_set_tear_mode CVWL668T.lib(drv_memc.o) + 0x00013cd4 0x00013cd4 0x0000002c Code RO 1474 i.drv_memc_set_tear_waveform CVWL668T.lib(drv_memc.o) + 0x00013d00 0x00013d00 0x00000014 Code RO 1476 i.drv_memc_set_vidc_sync_cnt CVWL668T.lib(drv_memc.o) + 0x00013d14 0x00013d14 0x00000010 Code RO 1818 i.drv_phy_test_clear CVWL668T.lib(drv_phy_common.o) + 0x00013d24 0x00013d24 0x00000018 Code RO 1819 i.drv_phy_test_lock CVWL668T.lib(drv_phy_common.o) + 0x00013d3c 0x00013d3c 0x00000030 Code RO 967 i.drv_pwr_efuse_pd CVWL668T.lib(drv_pwr.o) + 0x00013d6c 0x00013d6c 0x0000004c Code RO 969 i.drv_pwr_enter_deep_sleep_mode CVWL668T.lib(drv_pwr.o) + 0x00013db8 0x00013db8 0x00000034 Code RO 971 i.drv_pwr_enter_sleep_mode_ex CVWL668T.lib(drv_pwr.o) + 0x00013dec 0x00013dec 0x00000098 Code RO 972 i.drv_pwr_enter_stop_sleep_mode CVWL668T.lib(drv_pwr.o) + 0x00013e84 0x00013e84 0x00000028 Code RO 973 i.drv_pwr_exit_sleep_mode CVWL668T.lib(drv_pwr.o) + 0x00013eac 0x00013eac 0x00000010 Code RO 976 i.drv_pwr_get_power_ready_st CVWL668T.lib(drv_pwr.o) + 0x00013ebc 0x00013ebc 0x00000028 Code RO 1008 i.drv_pwr_set_breath_screen_power_sel CVWL668T.lib(drv_pwr.o) + 0x00013ee4 0x00013ee4 0x00000028 Code RO 1009 i.drv_pwr_set_digit_power_sel CVWL668T.lib(drv_pwr.o) + 0x00013f0c 0x00013f0c 0x00000034 Code RO 1012 i.drv_pwr_set_pll_clk CVWL668T.lib(drv_pwr.o) + 0x00013f40 0x00013f40 0x0000002c Code RO 1016 i.drv_pwr_set_wakeup_type CVWL668T.lib(drv_pwr.o) + 0x00013f6c 0x00013f6c 0x00000020 Code RO 1019 i.drv_pwr_write_lock CVWL668T.lib(drv_pwr.o) + 0x00013f8c 0x00013f8c 0x00000010 Code RO 1516 i.drv_rxbr_clear_pkt_buffer CVWL668T.lib(drv_rxbr.o) + 0x00013f9c 0x00013f9c 0x0000000c Code RO 1517 i.drv_rxbr_clear_status0 CVWL668T.lib(drv_rxbr.o) + 0x00013fa8 0x00013fa8 0x0000005a Code RO 1520 i.drv_rxbr_enable_irq CVWL668T.lib(drv_rxbr.o) + 0x00014002 0x00014002 0x00000002 PAD + 0x00014004 0x00014004 0x0000001c Code RO 1521 i.drv_rxbr_frame_drop_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014020 0x00014020 0x00000018 Code RO 690 i.drv_rxbr_get_int_source CVWL668T.lib(hal_internal_vsync.o) + 0x00014038 0x00014038 0x00000018 Code RO 756 i.drv_rxbr_get_status0 CVWL668T.lib(hal_internal_dcs.o) + 0x00014050 0x00014050 0x00000014 Code RO 1530 i.drv_rxbr_hline_rcv0_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014064 0x00014064 0x00000014 Code RO 1531 i.drv_rxbr_hline_rcv1_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014078 0x00014078 0x00000010 Code RO 1532 i.drv_rxbr_hline_rcv_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014088 0x00014088 0x0000000c Code RO 1534 i.drv_rxbr_register_irq1_callback CVWL668T.lib(drv_rxbr.o) + 0x00014094 0x00014094 0x00000018 Code RO 1535 i.drv_rxbr_set_ack_pkt_header CVWL668T.lib(drv_rxbr.o) + 0x000140ac 0x000140ac 0x0000001c Code RO 1540 i.drv_rxbr_set_color_format CVWL668T.lib(drv_rxbr.o) + 0x000140c8 0x000140c8 0x00000024 Code RO 1543 i.drv_rxbr_set_filter_regs CVWL668T.lib(drv_rxbr.o) + 0x000140ec 0x000140ec 0x0000001c Code RO 1544 i.drv_rxbr_set_inten CVWL668T.lib(drv_rxbr.o) + 0x00014108 0x00014108 0x00000018 Code RO 1545 i.drv_rxbr_set_ltpo_drop_th CVWL668T.lib(drv_rxbr.o) + 0x00014120 0x00014120 0x00000040 Code RO 1549 i.drv_rxbr_set_usr_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014160 0x00014160 0x00000010 Code RO 1550 i.drv_rxbr_set_usr_col CVWL668T.lib(drv_rxbr.o) + 0x00014170 0x00014170 0x00000010 Code RO 1551 i.drv_rxbr_set_usr_row CVWL668T.lib(drv_rxbr.o) + 0x00014180 0x00014180 0x00000078 Code RO 1173 i.drv_se_init CVWL668T.lib(drv_se.o) + 0x000141f8 0x000141f8 0x000000d4 Code RO 1174 i.drv_se_set_dsc CVWL668T.lib(drv_se.o) + 0x000142cc 0x000142cc 0x00000088 Code RO 1175 i.drv_se_set_lcdc CVWL668T.lib(drv_se.o) + 0x00014354 0x00014354 0x00000068 Code RO 1176 i.drv_se_set_memc CVWL668T.lib(drv_se.o) + 0x000143bc 0x000143bc 0x000000d0 Code RO 1177 i.drv_se_set_rxbr CVWL668T.lib(drv_se.o) + 0x0001448c 0x0001448c 0x000000ac Code RO 1178 i.drv_se_set_vidc CVWL668T.lib(drv_se.o) + 0x00014538 0x00014538 0x00000014 Code RO 1179 i.drv_se_start_rx CVWL668T.lib(drv_se.o) + 0x0001454c 0x0001454c 0x0000001c Code RO 1083 i.drv_swire_enable CVWL668T.lib(drv_swire.o) + 0x00014568 0x00014568 0x0000000c Code RO 1084 i.drv_swire_get_pulse_count CVWL668T.lib(drv_swire.o) + 0x00014574 0x00014574 0x0000000c Code RO 1085 i.drv_swire_register_callback CVWL668T.lib(drv_swire.o) + 0x00014580 0x00014580 0x00000018 Code RO 1086 i.drv_swire_set_bit_time CVWL668T.lib(drv_swire.o) + 0x00014598 0x00014598 0x00000048 Code RO 1087 i.drv_swire_set_int CVWL668T.lib(drv_swire.o) + 0x000145e0 0x000145e0 0x0000001c Code RO 1088 i.drv_swire_set_power_down CVWL668T.lib(drv_swire.o) + 0x000145fc 0x000145fc 0x0000000c Code RO 1089 i.drv_swire_set_pulse_count CVWL668T.lib(drv_swire.o) + 0x00014608 0x00014608 0x0000001c Code RO 1090 i.drv_swire_set_trig_mode CVWL668T.lib(drv_swire.o) + 0x00014624 0x00014624 0x0000000c Code RO 1105 i.drv_sys_cfg_clear_all_int CVWL668T.lib(drv_sys_cfg.o) + 0x00014630 0x00014630 0x00000028 Code RO 1106 i.drv_sys_cfg_clear_pending CVWL668T.lib(drv_sys_cfg.o) + 0x00014658 0x00014658 0x00000024 Code RO 1107 i.drv_sys_cfg_sel_ap_rst_trig CVWL668T.lib(drv_sys_cfg.o) + 0x0001467c 0x0001467c 0x00000024 Code RO 1109 i.drv_sys_cfg_sel_gpio_group CVWL668T.lib(drv_sys_cfg.o) + 0x000146a0 0x000146a0 0x00000024 Code RO 1110 i.drv_sys_cfg_sel_int_trig CVWL668T.lib(drv_sys_cfg.o) + 0x000146c4 0x000146c4 0x00000018 Code RO 1111 i.drv_sys_cfg_sel_swire_timer CVWL668T.lib(drv_sys_cfg.o) + 0x000146dc 0x000146dc 0x00000024 Code RO 1112 i.drv_sys_cfg_set_int CVWL668T.lib(drv_sys_cfg.o) + 0x00014700 0x00014700 0x0000001a Code RO 1129 i.drv_timer_clear_status_flags CVWL668T.lib(drv_timer.o) + 0x0001471a 0x0001471a 0x00000020 Code RO 1130 i.drv_timer_enable CVWL668T.lib(drv_timer.o) + 0x0001473a 0x0001473a 0x00000002 PAD + 0x0001473c 0x0001473c 0x00000010 Code RO 1131 i.drv_timer_get_instance CVWL668T.lib(drv_timer.o) + 0x0001474c 0x0001474c 0x0000003c Code RO 1133 i.drv_timer_handle_interrupt CVWL668T.lib(drv_timer.o) + 0x00014788 0x00014788 0x00000040 Code RO 1135 i.drv_timer_set_compare_val CVWL668T.lib(drv_timer.o) + 0x000147c8 0x000147c8 0x00000048 Code RO 1136 i.drv_timer_set_int CVWL668T.lib(drv_timer.o) + 0x00014810 0x00014810 0x00000028 Code RO 1137 i.drv_timer_set_prescaler CVWL668T.lib(drv_timer.o) + 0x00014838 0x00014838 0x00000010 Code RO 1138 i.drv_timer_set_repeat CVWL668T.lib(drv_timer.o) + 0x00014848 0x00014848 0x00000020 Code RO 1299 i.drv_tx_phy_test_enter CVWL668T.lib(drv_dsi_tx.o) + 0x00014868 0x00014868 0x00000020 Code RO 1300 i.drv_tx_phy_test_exit CVWL668T.lib(drv_dsi_tx.o) + 0x00014888 0x00014888 0x00000028 Code RO 1303 i.drv_tx_phy_test_write_code CVWL668T.lib(drv_dsi_tx.o) + 0x000148b0 0x000148b0 0x00000034 Code RO 1751 i.drv_uart_abort_recv CVWL668T.lib(drv_uart.o) + 0x000148e4 0x000148e4 0x00000034 Code RO 1752 i.drv_uart_abort_send CVWL668T.lib(drv_uart.o) + 0x00014918 0x00014918 0x00000014 Code RO 1753 i.drv_uart_config_int CVWL668T.lib(drv_uart.o) + 0x0001492c 0x0001492c 0x00000018 Code RO 1755 i.drv_uart_enable_clk CVWL668T.lib(drv_uart.o) + 0x00014944 0x00014944 0x0000005c Code RO 1756 i.drv_uart_enable_int CVWL668T.lib(drv_uart.o) + 0x000149a0 0x000149a0 0x00000028 Code RO 1758 i.drv_uart_get_instance CVWL668T.lib(drv_uart.o) + 0x000149c8 0x000149c8 0x000000ce Code RO 1759 i.drv_uart_init CVWL668T.lib(drv_uart.o) + 0x00014a96 0x00014a96 0x00000002 PAD + 0x00014a98 0x00014a98 0x0000003c Code RO 1760 i.drv_uart_int_trans_handle CVWL668T.lib(drv_uart.o) + 0x00014ad4 0x00014ad4 0x0000001c Code RO 1763 i.drv_uart_reset_rx_fifo CVWL668T.lib(drv_uart.o) + 0x00014af0 0x00014af0 0x0000001c Code RO 1764 i.drv_uart_reset_tx_fifo CVWL668T.lib(drv_uart.o) + 0x00014b0c 0x00014b0c 0x0000001a Code RO 1765 i.drv_uart_send_blocking CVWL668T.lib(drv_uart.o) + 0x00014b26 0x00014b26 0x00000054 Code RO 1767 i.drv_uart_set_baud_rate CVWL668T.lib(drv_uart.o) + 0x00014b7a 0x00014b7a 0x00000002 PAD + 0x00014b7c 0x00014b7c 0x0000004c Code RO 1768 i.drv_uart_trans_create_handle CVWL668T.lib(drv_uart.o) + 0x00014bc8 0x00014bc8 0x00000010 Code RO 1603 i.drv_vidc_clear_irq CVWL668T.lib(drv_vidc.o) + 0x00014bd8 0x00014bd8 0x00000020 Code RO 1607 i.drv_vidc_enable CVWL668T.lib(drv_vidc.o) + 0x00014bf8 0x00014bf8 0x00000040 Code RO 1608 i.drv_vidc_enable_irq CVWL668T.lib(drv_vidc.o) + 0x00014c38 0x00014c38 0x0000002c Code RO 1609 i.drv_vidc_get_int_source CVWL668T.lib(drv_vidc.o) + 0x00014c64 0x00014c64 0x00000018 Code RO 1610 i.drv_vidc_get_irq_status CVWL668T.lib(drv_vidc.o) + 0x00014c7c 0x00014c7c 0x0000002c Code RO 1614 i.drv_vidc_init_module_enable CVWL668T.lib(drv_vidc.o) + 0x00014ca8 0x00014ca8 0x0000000c Code RO 1615 i.drv_vidc_register_callback CVWL668T.lib(drv_vidc.o) + 0x00014cb4 0x00014cb4 0x0000000c Code RO 1616 i.drv_vidc_reset CVWL668T.lib(drv_vidc.o) + 0x00014cc0 0x00014cc0 0x0000001c Code RO 1617 i.drv_vidc_set_circ_mode_enable CVWL668T.lib(drv_vidc.o) + 0x00014cdc 0x00014cdc 0x00000038 Code RO 1618 i.drv_vidc_set_dither_config CVWL668T.lib(drv_vidc.o) + 0x00014d14 0x00014d14 0x0000005c Code RO 1620 i.drv_vidc_set_dst_parameter CVWL668T.lib(drv_vidc.o) + 0x00014d70 0x00014d70 0x0000000c Code RO 1622 i.drv_vidc_set_honly_hcoef0 CVWL668T.lib(drv_vidc.o) + 0x00014d7c 0x00014d7c 0x0000002c Code RO 1623 i.drv_vidc_set_honly_hinitb CVWL668T.lib(drv_vidc.o) + 0x00014da8 0x00014da8 0x00000030 Code RO 1624 i.drv_vidc_set_honly_hinitr CVWL668T.lib(drv_vidc.o) + 0x00014dd8 0x00014dd8 0x0000001c Code RO 1627 i.drv_vidc_set_irqen CVWL668T.lib(drv_vidc.o) + 0x00014df4 0x00014df4 0x00000014 Code RO 1628 i.drv_vidc_set_mirror CVWL668T.lib(drv_vidc.o) + 0x00014e08 0x00014e08 0x0000001c Code RO 1631 i.drv_vidc_set_pentile_swap CVWL668T.lib(drv_vidc.o) + 0x00014e24 0x00014e24 0x0000000c Code RO 1632 i.drv_vidc_set_pu_ctrl CVWL668T.lib(drv_vidc.o) + 0x00014e30 0x00014e30 0x00000018 Code RO 1633 i.drv_vidc_set_rotation CVWL668T.lib(drv_vidc.o) + 0x00014e48 0x00014e48 0x0000000c Code RO 1634 i.drv_vidc_set_scld_hcoef0 CVWL668T.lib(drv_vidc.o) + 0x00014e54 0x00014e54 0x0000000c Code RO 1635 i.drv_vidc_set_scld_hcoef1 CVWL668T.lib(drv_vidc.o) + 0x00014e60 0x00014e60 0x00000014 Code RO 1636 i.drv_vidc_set_scld_step CVWL668T.lib(drv_vidc.o) + 0x00014e74 0x00014e74 0x0000000c Code RO 1637 i.drv_vidc_set_scld_vcoef0 CVWL668T.lib(drv_vidc.o) + 0x00014e80 0x00014e80 0x0000000c Code RO 1638 i.drv_vidc_set_scld_vcoef1 CVWL668T.lib(drv_vidc.o) + 0x00014e8c 0x00014e8c 0x00000020 Code RO 1639 i.drv_vidc_set_src_parameter CVWL668T.lib(drv_vidc.o) + 0x00014eac 0x00014eac 0x00000038 Code RO 1640 i.drv_vidc_set_vintp_config CVWL668T.lib(drv_vidc.o) + 0x00014ee4 0x00014ee4 0x00000034 Code RO 622 i.fputc CVWL668T.lib(tau_log.o) + 0x00014f18 0x00014f18 0x00000040 Code RO 784 i.ha_intl_fb_check_pu_size CVWL668T.lib(hal_internal_fb.o) + 0x00014f58 0x00014f58 0x00000040 Code RO 288 i.hal_dsi_rx_ctrl_create_handle CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00014f98 0x00014f98 0x00000040 Code RO 289 i.hal_dsi_rx_ctrl_dcs_async_handler CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00014fd8 0x00014fd8 0x00000094 Code RO 290 i.hal_dsi_rx_ctrl_deinit CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001506c 0x0001506c 0x00000008 Code RO 296 i.hal_dsi_rx_ctrl_get_compressen_en CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015074 0x00015074 0x00000020 Code RO 297 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015094 0x00015094 0x000000ac Code RO 298 i.hal_dsi_rx_ctrl_init CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015140 0x00015140 0x00000100 Code RO 299 i.hal_dsi_rx_ctrl_init_clk CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015240 0x00015240 0x00000108 Code RO 300 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015348 0x00015348 0x0000012c Code RO 301 i.hal_dsi_rx_ctrl_init_memc CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015474 0x00015474 0x00000148 Code RO 302 i.hal_dsi_rx_ctrl_init_rxbr CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000155bc 0x000155bc 0x00000280 Code RO 303 i.hal_dsi_rx_ctrl_init_vidc CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001583c 0x0001583c 0x00000038 Code RO 304 i.hal_dsi_rx_ctrl_pre_init_pps CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015874 0x00015874 0x000000f0 Code RO 309 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015964 0x00015964 0x00000018 Code RO 313 i.hal_dsi_rx_ctrl_set_check_crc CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001597c 0x0001597c 0x00000030 Code RO 316 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000159ac 0x000159ac 0x00000030 Code RO 322 i.hal_dsi_rx_ctrl_start CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000159dc 0x000159dc 0x00000030 Code RO 323 i.hal_dsi_rx_ctrl_stop CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015a0c 0x00015a0c 0x0000000a Code RO 324 i.hal_dsi_rx_ctrl_toggle_input_frame_rate CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015a16 0x00015a16 0x00000002 PAD + 0x00015a18 0x00015a18 0x00000020 Code RO 325 i.hal_dsi_rx_ctrl_toggle_resolution CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015a38 0x00015a38 0x00000280 Code RO 378 i.hal_dsi_tx_cmd_mode_cal_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015cb8 0x00015cb8 0x00000038 Code RO 380 i.hal_dsi_tx_ctrl_create_handle CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015cf0 0x00015cf0 0x00000074 Code RO 381 i.hal_dsi_tx_ctrl_deinit CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015d64 0x00015d64 0x0000000c Code RO 383 i.hal_dsi_tx_ctrl_gen_a_frame CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015d70 0x00015d70 0x00000022 Code RO 384 i.hal_dsi_tx_ctrl_gen_a_tear_signal CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015d92 0x00015d92 0x00000002 PAD + 0x00015d94 0x00015d94 0x0000007c Code RO 386 i.hal_dsi_tx_ctrl_init CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015e10 0x00015e10 0x00000010 Code RO 387 i.hal_dsi_tx_ctrl_init_clk CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015e20 0x00015e20 0x00000008 Code RO 400 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015e28 0x00015e28 0x0000000a Code RO 401 i.hal_dsi_tx_ctrl_set_tear_mode CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015e32 0x00015e32 0x00000002 PAD + 0x00015e34 0x00015e34 0x00000090 Code RO 403 i.hal_dsi_tx_ctrl_start CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015ec4 0x00015ec4 0x00000038 Code RO 404 i.hal_dsi_tx_ctrl_stop CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015efc 0x00015efc 0x000000f4 Code RO 406 i.hal_dsi_tx_ctrl_write_array_cmd CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015ff0 0x00015ff0 0x000000d0 Code RO 407 i.hal_dsi_tx_ctrl_write_cmd CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000160c0 0x000160c0 0x00000104 Code RO 408 i.hal_dsi_tx_init_cfg CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000161c4 0x000161c4 0x00000044 Code RO 409 i.hal_dsi_tx_init_dpi_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016208 0x00016208 0x00000016 Code RO 410 i.hal_dsi_tx_init_phy_cfg CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0001621e 0x0001621e 0x00000052 Code RO 411 i.hal_dsi_tx_init_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016270 0x00016270 0x00000054 Code RO 412 i.hal_dsi_tx_init_vid_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000162c4 0x000162c4 0x00000040 Code RO 413 i.hal_dsi_tx_send_cmd CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016304 0x00016304 0x00000094 Code RO 414 i.hal_dsi_tx_timing_info_update CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016398 0x00016398 0x00000310 Code RO 415 i.hal_dsi_tx_vid_mode_cal_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000166a8 0x000166a8 0x0000003a Code RO 485 i.hal_gpio_config_pad CVWL668T.lib(hal_gpio.o) + 0x000166e2 0x000166e2 0x00000002 PAD + 0x000166e4 0x000166e4 0x00000018 Code RO 486 i.hal_gpio_ctrl_eint CVWL668T.lib(hal_gpio.o) + 0x000166fc 0x000166fc 0x00000040 Code RO 490 i.hal_gpio_init_eint CVWL668T.lib(hal_gpio.o) + 0x0001673c 0x0001673c 0x00000016 Code RO 491 i.hal_gpio_init_input CVWL668T.lib(hal_gpio.o) + 0x00016752 0x00016752 0x0000001c Code RO 492 i.hal_gpio_init_output CVWL668T.lib(hal_gpio.o) + 0x0001676e 0x0001676e 0x00000002 PAD + 0x00016770 0x00016770 0x0000001c Code RO 493 i.hal_gpio_reg_eint_cb CVWL668T.lib(hal_gpio.o) + 0x0001678c 0x0001678c 0x00000050 Code RO 494 i.hal_gpio_set_ap_reset_int CVWL668T.lib(hal_gpio.o) + 0x000167dc 0x000167dc 0x00000060 Code RO 497 i.hal_gpio_set_mode CVWL668T.lib(hal_gpio.o) + 0x0001683c 0x0001683c 0x00000008 Code RO 498 i.hal_gpio_set_output_data CVWL668T.lib(hal_gpio.o) + 0x00016844 0x00016844 0x00000010 Code RO 692 i.hal_internal_sync_get_hight_performan_mode CVWL668T.lib(hal_internal_vsync.o) + 0x00016854 0x00016854 0x000001b4 Code RO 693 i.hal_internal_sync_input_resolution_change CVWL668T.lib(hal_internal_vsync.o) + 0x00016a08 0x00016a08 0x0000000c Code RO 694 i.hal_internal_sync_register_lcdc_cb CVWL668T.lib(hal_internal_vsync.o) + 0x00016a14 0x00016a14 0x00000020 Code RO 697 i.hal_internal_vsync_deinit CVWL668T.lib(hal_internal_vsync.o) + 0x00016a34 0x00016a34 0x0000000c Code RO 698 i.hal_internal_vsync_get_rx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016a40 0x00016a40 0x00000014 Code RO 699 i.hal_internal_vsync_get_sync_line CVWL668T.lib(hal_internal_vsync.o) + 0x00016a54 0x00016a54 0x0000000c Code RO 700 i.hal_internal_vsync_get_tx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016a60 0x00016a60 0x000000e8 Code RO 701 i.hal_internal_vsync_init_rx CVWL668T.lib(hal_internal_vsync.o) + 0x00016b48 0x00016b48 0x000000c8 Code RO 702 i.hal_internal_vsync_init_tx CVWL668T.lib(hal_internal_vsync.o) + 0x00016c10 0x00016c10 0x00000020 Code RO 703 i.hal_internal_vsync_set_rx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016c30 0x00016c30 0x000001ec Code RO 705 i.hal_internal_vsync_set_tear_mode CVWL668T.lib(hal_internal_vsync.o) + 0x00016e1c 0x00016e1c 0x00000058 Code RO 706 i.hal_internal_vsync_set_tx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016e74 0x00016e74 0x00000086 Code RO 707 i.hal_internal_vsync_toggle_input_frame_rate CVWL668T.lib(hal_internal_vsync.o) + 0x00016efa 0x00016efa 0x00000002 PAD + 0x00016efc 0x00016efc 0x0000006c Code RO 757 i.hal_intl_dcs_init_sw_fltr CVWL668T.lib(hal_internal_dcs.o) + 0x00016f68 0x00016f68 0x00000430 Code RO 759 i.hal_intl_dcs_rx_get_dcs_packet_data CVWL668T.lib(hal_internal_dcs.o) + 0x00017398 0x00017398 0x00000088 Code RO 760 i.hal_intl_dcs_rx_receive_packet CVWL668T.lib(hal_internal_dcs.o) + 0x00017420 0x00017420 0x00000174 Code RO 761 i.hal_intl_dcs_rx_receive_pps CVWL668T.lib(hal_internal_dcs.o) + 0x00017594 0x00017594 0x0000008c Code RO 762 i.hal_intl_dcs_set_auto_hw_filter CVWL668T.lib(hal_internal_dcs.o) + 0x00017620 0x00017620 0x0000002c Code RO 764 i.hal_intl_dcs_sw_filter_handle CVWL668T.lib(hal_internal_dcs.o) + 0x0001764c 0x0001764c 0x00000318 Code RO 785 i.hal_intl_fb_cal_fb_info CVWL668T.lib(hal_internal_fb.o) + 0x00017964 0x00017964 0x00000064 Code RO 786 i.hal_intl_fb_check_bandwidth CVWL668T.lib(hal_internal_fb.o) + 0x000179c8 0x000179c8 0x000000dc Code RO 787 i.hal_intl_fb_edge_resize CVWL668T.lib(hal_internal_fb.o) + 0x00017aa4 0x00017aa4 0x00000074 Code RO 788 i.hal_intl_fb_flow_control_adapter CVWL668T.lib(hal_internal_fb.o) + 0x00017b18 0x00017b18 0x0000000c Code RO 789 i.hal_intl_fb_get_memc_flow_mode CVWL668T.lib(hal_internal_fb.o) + 0x00017b24 0x00017b24 0x00000010 Code RO 790 i.hal_intl_fb_get_rx_fb_info CVWL668T.lib(hal_internal_fb.o) + 0x00017b34 0x00017b34 0x00000010 Code RO 791 i.hal_intl_fb_get_tx_fb_info CVWL668T.lib(hal_internal_fb.o) + 0x00017b44 0x00017b44 0x0000000c Code RO 792 i.hal_intl_fb_get_user_flow CVWL668T.lib(hal_internal_fb.o) + 0x00017b50 0x00017b50 0x00000028 Code RO 810 i.hal_intl_svs_deinit_rx CVWL668T.lib(hal_internal_svs.o) + 0x00017b78 0x00017b78 0x00000010 Code RO 811 i.hal_intl_svs_deinit_tx CVWL668T.lib(hal_internal_svs.o) + 0x00017b88 0x00017b88 0x00000024 Code RO 812 i.hal_intl_svs_handle CVWL668T.lib(hal_internal_svs.o) + 0x00017bac 0x00017bac 0x00000080 Code RO 813 i.hal_intl_svs_init_rx CVWL668T.lib(hal_internal_svs.o) + 0x00017c2c 0x00017c2c 0x00000014 Code RO 814 i.hal_intl_svs_init_tx CVWL668T.lib(hal_internal_svs.o) + 0x00017c40 0x00017c40 0x00000070 Code RO 815 i.hal_intl_svs_set_input_frate CVWL668T.lib(hal_internal_svs.o) + 0x00017cb0 0x00017cb0 0x0000000c Code RO 816 i.hal_intl_svs_set_rx_vtt CVWL668T.lib(hal_internal_svs.o) + 0x00017cbc 0x00017cbc 0x00000048 Code RO 818 i.hal_intl_svs_update_rxbr_clk CVWL668T.lib(hal_internal_svs.o) + 0x00017d04 0x00017d04 0x00000070 Code RO 416 i.hal_lcdc_displayproc_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017d74 0x00017d74 0x0000003e Code RO 417 i.hal_lcdc_init_cfg CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017db2 0x00017db2 0x00000070 Code RO 418 i.hal_lcdc_init_clk CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017e22 0x00017e22 0x00000002 PAD + 0x00017e24 0x00017e24 0x00000128 Code RO 419 i.hal_lcdc_postproc_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017f4c 0x00017f4c 0x00000024 Code RO 420 i.hal_lcdc_start CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017f70 0x00017f70 0x0000003c Code RO 421 i.hal_lcdc_timinggen_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017fac 0x00017fac 0x000000e0 Code RO 422 i.hal_lcdc_upscaler_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0001808c 0x0001808c 0x000000bc Code RO 424 i.hal_nonshadow_func_update CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018148 0x00018148 0x0000002a Code RO 571 i.hal_pwr_enter_deep_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x00018172 0x00018172 0x00000008 Code RO 572 i.hal_pwr_enter_normal_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x0001817a 0x0001817a 0x00000002 PAD + 0x0001817c 0x0001817c 0x00000064 Code RO 573 i.hal_pwr_enter_stop_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x000181e0 0x000181e0 0x0000000a Code RO 574 i.hal_pwr_exit_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x000181ea 0x000181ea 0x00000008 Code RO 576 i.hal_pwr_get_vcc_power_ready CVWL668T.lib(hal_pwr.o) + 0x000181f2 0x000181f2 0x00000008 Code RO 581 i.hal_pwr_set_main_power CVWL668T.lib(hal_pwr.o) + 0x000181fa 0x000181fa 0x00000008 Code RO 583 i.hal_pwr_set_sleep_mode_power CVWL668T.lib(hal_pwr.o) + 0x00018202 0x00018202 0x00000002 PAD + 0x00018204 0x00018204 0x00000064 Code RO 584 i.hal_pwr_set_stop_sleep_wakeup_pin CVWL668T.lib(hal_pwr.o) + 0x00018268 0x00018268 0x00000040 Code RO 525 i.hal_swire_deinit CVWL668T.lib(hal_swire.o) + 0x000182a8 0x000182a8 0x0000005c Code RO 526 i.hal_swire_enable CVWL668T.lib(hal_swire.o) + 0x00018304 0x00018304 0x00000058 Code RO 527 i.hal_swire_init CVWL668T.lib(hal_swire.o) + 0x0001835c 0x0001835c 0x00000024 Code RO 529 i.hal_swire_set_pulse CVWL668T.lib(hal_swire.o) + 0x00018380 0x00018380 0x00000040 Code RO 530 i.hal_swire_set_timer CVWL668T.lib(hal_swire.o) + 0x000183c0 0x000183c0 0x000000e4 Code RO 550 i.hal_system_init CVWL668T.lib(hal_system.o) + 0x000184a4 0x000184a4 0x00000050 Code RO 553 i.hal_system_updata_sysclk CVWL668T.lib(hal_system.o) + 0x000184f4 0x000184f4 0x00000030 Code RO 638 i.hal_timer_deinit CVWL668T.lib(hal_timer.o) + 0x00018524 0x00018524 0x0000001c Code RO 640 i.hal_timer_init CVWL668T.lib(hal_timer.o) + 0x00018540 0x00018540 0x00000008 Code RO 641 i.hal_timer_set_repeat CVWL668T.lib(hal_timer.o) + 0x00018548 0x00018548 0x00000030 Code RO 425 i.hal_tx_frame_rate_adjust CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018578 0x00018578 0x00000094 Code RO 664 i.hal_uart_init CVWL668T.lib(hal_uart.o) + 0x0001860c 0x0001860c 0x0000001c Code RO 667 i.hal_uart_send_blocking CVWL668T.lib(hal_uart.o) + 0x00018628 0x00018628 0x00000018 Code RO 426 i.hal_vsync_func_update CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018640 0x00018640 0x000000e0 Code RO 708 i.hal_vsync_reset_lcdc_scaler CVWL668T.lib(hal_internal_vsync.o) + 0x00018720 0x00018720 0x00000038 Code RO 3 i.main main.o + 0x00018758 0x00018758 0x000000a4 Code RO 109 i.pps_update_handle rm_note11pro_demo.o + 0x000187fc 0x000187fc 0x000002f4 Code RO 709 i.rxbr_irq1_callback CVWL668T.lib(hal_internal_vsync.o) + 0x00018af0 0x00018af0 0x00000044 Code RO 710 i.soft_double_buffer_update CVWL668T.lib(hal_internal_vsync.o) + 0x00018b34 0x00018b34 0x0000006c Code RO 711 i.soft_gen_te CVWL668T.lib(hal_internal_vsync.o) + 0x00018ba0 0x00018ba0 0x000000e0 Code RO 712 i.soft_gen_te_double_buffer CVWL668T.lib(hal_internal_vsync.o) + 0x00018c80 0x00018c80 0x00000038 Code RO 713 i.soft_pro_motion_init CVWL668T.lib(hal_internal_vsync.o) + 0x00018cb8 0x00018cb8 0x00000024 Code RO 714 i.soft_tear_adjust_line CVWL668T.lib(hal_internal_vsync.o) + 0x00018cdc 0x00018cdc 0x00000018 Code RO 587 i.stop_sleep_cb CVWL668T.lib(hal_pwr.o) + 0x00018cf4 0x00018cf4 0x000000ac Code RO 819 i.svs_direct_mode_setting CVWL668T.lib(hal_internal_svs.o) + 0x00018da0 0x00018da0 0x0000001c Code RO 820 i.svs_get_rel_intv CVWL668T.lib(hal_internal_svs.o) + 0x00018dbc 0x00018dbc 0x000000b0 Code RO 821 i.svs_sync_handle CVWL668T.lib(hal_internal_svs.o) + 0x00018e6c 0x00018e6c 0x000000cc Code RO 822 i.svs_wait_fr_stab CVWL668T.lib(hal_internal_svs.o) + 0x00018f38 0x00018f38 0x0000010c Code RO 823 i.svs_wait_start CVWL668T.lib(hal_internal_svs.o) + 0x00019044 0x00019044 0x00000034 Code RO 623 i.tau_log_init CVWL668T.lib(tau_log.o) + 0x00019078 0x00019078 0x00000084 Code RO 624 i.tau_log_printf CVWL668T.lib(tau_log.o) + 0x000190fc 0x000190fc 0x00000076 Code RO 625 i.tau_log_push_log CVWL668T.lib(tau_log.o) + 0x00019172 0x00019172 0x00000002 PAD + 0x00019174 0x00019174 0x000000b4 Code RO 715 i.vidc_callback CVWL668T.lib(hal_internal_vsync.o) + 0x00019228 0x00019228 0x00000118 Code RO 716 i.vpre_err_reset CVWL668T.lib(hal_internal_vsync.o) + 0x00019340 0x00019340 0x000012c4 Data RO 110 .constdata rm_note11pro_demo.o + 0x0001a604 0x0001a604 0x00000028 Data RO 328 .constdata CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001a62c 0x0001a62c 0x0000001c Data RO 429 .constdata CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0001a648 0x0001a648 0x000000b6 Data RO 502 .constdata CVWL668T.lib(hal_gpio.o) + 0x0001a6fe 0x0001a6fe 0x00000002 PAD + 0x0001a700 0x0001a700 0x00000030 Data RO 669 .constdata CVWL668T.lib(hal_uart.o) + 0x0001a730 0x0001a730 0x00000010 Data RO 1770 .constdata CVWL668T.lib(drv_uart.o) + 0x0001a740 0x0001a740 0x00000043 Data RO 111 .conststring rm_note11pro_demo.o + 0x0001a783 0x0001a783 0x00000001 PAD + 0x0001a784 0x0001a784 0x00000042 Data RO 329 .conststring CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001a7c6 0x0001a7c6 0x00000002 PAD + 0x0001a7c8 0x0001a7c8 0x00000090 Data RO 718 .conststring CVWL668T.lib(hal_internal_vsync.o) + 0x0001a858 0x0001a858 0x00000046 Data RO 767 .conststring CVWL668T.lib(hal_internal_dcs.o) + 0x0001a89e 0x0001a89e 0x00000002 PAD + 0x0001a8a0 0x0001a8a0 0x00000020 Data RO 2184 Region$$Table anon$$obj.o + + + Execution Region RW_IRAM1 (Exec base: 0x00070000, Load base: 0x0001a8c0, Size: 0x000030f8, Max: 0x00008000, ABSOLUTE, COMPRESSED[0x00000150]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070000 COMPRESSED 0x00000090 Data RW 112 .data rm_note11pro_demo.o + 0x00070090 COMPRESSED 0x00000030 Data RW 330 .data CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000700c0 COMPRESSED 0x0000005c Data RW 430 .data CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0007011c COMPRESSED 0x00000002 Data RW 532 .data CVWL668T.lib(hal_swire.o) + 0x0007011e COMPRESSED 0x00000002 PAD + 0x00070120 COMPRESSED 0x00000008 Data RW 588 .data CVWL668T.lib(hal_pwr.o) + 0x00070128 COMPRESSED 0x00000001 Data RW 628 .data CVWL668T.lib(tau_log.o) + 0x00070129 COMPRESSED 0x00000003 PAD + 0x0007012c COMPRESSED 0x00000018 Data RW 670 .data CVWL668T.lib(hal_uart.o) + 0x00070144 COMPRESSED 0x00000010 Data RW 719 .data CVWL668T.lib(hal_internal_vsync.o) + 0x00070154 COMPRESSED 0x00000024 Data RW 768 .data CVWL668T.lib(hal_internal_dcs.o) + 0x00070178 COMPRESSED 0x0000000c Data RW 852 .data CVWL668T.lib(drv_common.o) + 0x00070184 COMPRESSED 0x00000001 Data RW 853 .data CVWL668T.lib(drv_common.o) + 0x00070185 COMPRESSED 0x00000003 PAD + 0x00070188 COMPRESSED 0x00000004 Data RW 939 .data CVWL668T.lib(drv_gpio.o) + 0x0007018c COMPRESSED 0x00000004 Data RW 1091 .data CVWL668T.lib(drv_swire.o) + 0x00070190 COMPRESSED 0x00000050 Data RW 1139 .data CVWL668T.lib(drv_timer.o) + 0x000701e0 COMPRESSED 0x00000004 Data RW 1180 .data CVWL668T.lib(drv_se.o) + 0x000701e4 COMPRESSED 0x00000001 Data RW 1220 .data CVWL668T.lib(drv_dsi_rx.o) + 0x000701e5 COMPRESSED 0x00000003 PAD + 0x000701e8 COMPRESSED 0x00000008 Data RW 1555 .data CVWL668T.lib(drv_rxbr.o) + 0x000701f0 COMPRESSED 0x00000004 Data RW 1642 .data CVWL668T.lib(drv_vidc.o) + 0x000701f4 COMPRESSED 0x00000190 Data RW 1717 .data CVWL668T.lib(drv_dma.o) + 0x00070384 COMPRESSED 0x00000004 Data RW 2160 .data mc_p.l(stdout.o) + 0x00070388 - 0x000000d0 Zero RW 327 .bss CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00070458 - 0x000000b8 Zero RW 428 .bss CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00070510 - 0x00000100 Zero RW 627 .bss CVWL668T.lib(tau_log.o) + 0x00070610 - 0x00000044 Zero RW 717 .bss CVWL668T.lib(hal_internal_vsync.o) + 0x00070654 - 0x00000800 Zero RW 765 .bss CVWL668T.lib(hal_internal_dcs.o) + 0x00070e54 - 0x000000ff Zero RW 766 .bss CVWL668T.lib(hal_internal_dcs.o) + 0x00070f53 COMPRESSED 0x00000001 PAD + 0x00070f54 - 0x00000044 Zero RW 794 .bss CVWL668T.lib(hal_internal_fb.o) + 0x00070f98 - 0x00000044 Zero RW 824 .bss CVWL668T.lib(hal_internal_svs.o) + 0x00070fdc - 0x00000040 Zero RW 938 .bss CVWL668T.lib(drv_gpio.o) + 0x0007101c - 0x0000106c Zero RW 1163 .bss CVWL668T.lib(dcs_packet_fifo.o) + 0x00072088 - 0x00000010 Zero RW 1715 .bss CVWL668T.lib(drv_dma.o) + 0x00072098 - 0x00000060 Zero RW 1769 .bss CVWL668T.lib(drv_uart.o) + 0x000720f8 - 0x00001000 Zero RW 277 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 24 4 0 0 0 589 board.o + 56 34 0 0 0 13163 main.o + 2182 740 4871 144 0 31366 rm_note11pro_demo.o + 120 18 192 0 4096 2148 startup_armcm0.o + + ---------------------------------------------------------------------- + 2384 796 5096 144 4096 47266 Object Totals + 0 0 32 0 0 0 (incl. Generated) + 2 0 1 0 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4204 252 dcs_packet_fifo.o + 104 62 28 13 0 192 drv_common.o + 536 90 0 0 0 792 drv_crgu.o + 136 22 0 400 16 196 drv_dma.o + 144 34 0 0 0 248 drv_dsc_dec.o + 1904 682 0 1 0 1340 drv_dsi_rx.o + 1704 306 0 0 0 2036 drv_dsi_tx.o + 148 0 0 0 0 260 drv_efuse.o + 296 40 0 4 64 1000 drv_gpio.o + 1136 180 0 0 0 1680 drv_lcdc.o + 658 104 0 0 0 1240 drv_memc.o + 40 0 0 0 0 120 drv_phy_common.o + 592 132 0 0 0 716 drv_pwr.o + 534 108 0 8 0 1180 drv_rxbr.o + 972 266 0 4 0 488 drv_se.o + 264 54 0 4 0 560 drv_swire.o + 220 40 0 0 0 428 drv_sys_cfg.o + 366 38 0 80 0 816 drv_timer.o + 1172 54 16 0 96 980 drv_uart.o + 824 152 0 4 0 1700 drv_vidc.o + 2808 208 106 48 208 1460 hal_dsi_rx_ctrl.o + 4342 338 50 92 184 2280 hal_dsi_tx_ctrl.o + 440 32 182 0 0 688 hal_gpio.o + 2140 506 70 36 2303 652 hal_internal_dcs.o + 1348 58 0 0 68 700 hal_internal_fb.o + 1284 194 0 0 68 912 hal_internal_svs.o + 3974 810 144 16 68 1772 hal_internal_vsync.o + 308 32 0 8 0 616 hal_pwr.o + 344 32 0 2 0 348 hal_swire.o + 308 56 0 0 0 136 hal_system.o + 84 0 0 0 0 204 hal_timer.o + 176 18 48 24 0 144 hal_uart.o + 68 4 0 0 0 136 tau_delay.o + 354 30 16 1 256 320 tau_log.o + 200 20 0 0 0 76 ceil.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 26 0 0 0 0 72 memcmp.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 14 0 0 0 0 60 strlen.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfcmple.o + 20 0 0 0 0 68 cfrcmple.o + 56 0 0 0 0 68 d2f.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 40 0 0 0 0 60 ffixui.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 35052 4896 668 760 7536 29652 Library Totals + 42 0 8 11 1 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 29944 4714 660 745 7535 26592 CVWL668T.lib + 200 20 0 0 0 76 m_ps.l + 2866 120 0 4 0 1336 mc_p.l + 2000 42 0 0 0 1648 mf_p.l + + ---------------------------------------------------------------------- + 35052 4896 668 760 7536 29652 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 37436 5692 5764 904 11632 57230 Grand Totals + 37436 5692 5764 336 11632 57230 ELF Image Totals (compressed) + 37436 5692 5764 336 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 43200 ( 42.19kB) + Total RW Size (RW Data + ZI Data) 12536 ( 12.24kB) + Total ROM Size (Code + RO Data + RW Data) 43536 ( 42.52kB) + +============================================================================== + diff --git a/project/WL668T/Listings/WL668T_Note11Pro_3520_20240410.map b/project/WL668T/Listings/WL668T_Note11Pro_3520_20240410.map new file mode 100644 index 0000000..119e7e4 --- /dev/null +++ b/project/WL668T/Listings/WL668T_Note11Pro_3520_20240410.map @@ -0,0 +1,4030 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to rm_note11pro_demo.o(i.Note11Pro_demo) for Note11Pro_demo + main.o(i.main) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + rm_note11pro_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + rm_note11pro_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + rm_note11pro_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + rm_note11pro_demo.o(i.Note11Pro_demo) refers to hal_pwr.o(i.hal_pwr_set_main_power) for hal_pwr_set_main_power + rm_note11pro_demo.o(i.Note11Pro_demo) refers to rm_note11pro_demo.o(i.app_display_init) for app_display_init + rm_note11pro_demo.o(i.Note11Pro_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) for hal_dsi_rx_ctrl_dcs_async_handler + rm_note11pro_demo.o(i.Note11Pro_demo) refers to rm_note11pro_demo.o(i.app_system_suspend) for app_system_suspend + rm_note11pro_demo.o(i.Note11Pro_demo) refers to hal_pwr.o(i.hal_pwr_exit_sleep_mode) for hal_pwr_exit_sleep_mode + rm_note11pro_demo.o(i.Note11Pro_demo) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.Note11Pro_demo) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + rm_note11pro_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + rm_note11pro_demo.o(i.ap_dcs_read) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_dcs_read) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_dcs_set_display_off) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_dcs_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + rm_note11pro_demo.o(i.ap_dcs_set_display_off) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_dcs_set_display_on) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_dcs_set_display_on) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) for hal_dsi_tx_ctrl_set_tear_mode + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_swire.o(i.hal_swire_enable) for hal_swire_enable + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) for ap_rstn_pull_down_cb + rm_note11pro_demo.o(i.ap_dcs_set_exit_sleep_mode) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_rstn_pull_high_cb) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + rm_note11pro_demo.o(i.ap_rstn_pull_high_cb) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_set_backlight) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_set_backlight) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + rm_note11pro_demo.o(i.ap_update_frame_rate) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) for hal_dsi_rx_ctrl_toggle_input_frame_rate + rm_note11pro_demo.o(i.ap_update_frame_rate) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_update_frame_rate) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_update_pps_9E) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.ap_update_pps_9E) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + rm_note11pro_demo.o(i.ap_update_pps_9E) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + rm_note11pro_demo.o(i.ap_update_pps_9E) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.ap_update_pps_9E) refers to rm_note11pro_demo.o(.conststring) for .conststring + rm_note11pro_demo.o(i.app_display_init) refers to rm_note11pro_demo.o(i.app_mipi_rx_init) for app_mipi_rx_init + rm_note11pro_demo.o(i.app_display_init) refers to hal_pwr.o(i.hal_pwr_get_vcc_power_ready) for hal_pwr_get_vcc_power_ready + rm_note11pro_demo.o(i.app_display_init) refers to rm_note11pro_demo.o(i.app_gpio_init) for app_gpio_init + rm_note11pro_demo.o(i.app_display_init) refers to hal_swire.o(i.hal_swire_init) for hal_swire_init + rm_note11pro_demo.o(i.app_display_init) refers to hal_swire.o(i.hal_swire_set_timer) for hal_swire_set_timer + rm_note11pro_demo.o(i.app_display_init) refers to rm_note11pro_demo.o(i.app_mipi_tx_init) for app_mipi_tx_init + rm_note11pro_demo.o(i.app_display_init) refers to rm_note11pro_demo.o(i.app_mipi_tx_start) for app_mipi_tx_start + rm_note11pro_demo.o(i.app_gpio_init) refers to memcpya.o(.text) for __aeabi_memcpy4 + rm_note11pro_demo.o(i.app_gpio_init) refers to hal_gpio.o(i.hal_gpio_config_pad) for hal_gpio_config_pad + rm_note11pro_demo.o(i.app_gpio_init) refers to rm_note11pro_demo.o(.constdata) for .constdata + rm_note11pro_demo.o(i.app_init_panel) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + rm_note11pro_demo.o(i.app_init_panel) refers to tau_delay.o(i.delayMs) for delayMs + rm_note11pro_demo.o(i.app_init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + rm_note11pro_demo.o(i.app_init_panel) refers to tau_delay.o(i.delayUs) for delayUs + rm_note11pro_demo.o(i.app_init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + rm_note11pro_demo.o(i.app_init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + rm_note11pro_demo.o(i.app_init_panel) refers to hal_swire.o(i.hal_swire_enable) for hal_swire_enable + rm_note11pro_demo.o(i.app_init_panel) refers to hal_swire.o(i.hal_swire_set_pulse) for hal_swire_set_pulse + rm_note11pro_demo.o(i.app_init_panel) refers to rm_note11pro_demo.o(.constdata) for .constdata + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) for hal_dsi_rx_ctrl_set_check_crc + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to memcpya.o(.text) for __aeabi_memcpy4 + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to rm_note11pro_demo.o(.constdata) for .constdata + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to rm_note11pro_demo.o(i.ap_dcs_read) for ap_dcs_read + rm_note11pro_demo.o(i.app_mipi_rx_init) refers to rm_note11pro_demo.o(i.pps_update_handle) for pps_update_handle + rm_note11pro_demo.o(i.app_mipi_tx_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + rm_note11pro_demo.o(i.app_mipi_tx_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + rm_note11pro_demo.o(i.app_mipi_tx_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + rm_note11pro_demo.o(i.app_mipi_tx_init) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to rm_note11pro_demo.o(i.app_init_panel) for app_init_panel + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to tau_delay.o(i.delayMs) for delayMs + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to hal_swire.o(i.hal_swire_set_pulse) for hal_swire_set_pulse + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to rm_note11pro_demo.o(i.app_tx_cmd_panel_te_cb) for app_tx_cmd_panel_te_cb + rm_note11pro_demo.o(i.app_mipi_tx_start) refers to rm_note11pro_demo.o(i.Note11Pro_demo) for i.Note11Pro_demo + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_set_sleep_mode_power) for hal_pwr_set_sleep_mode_power + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) for hal_pwr_enter_deep_sleep_mode + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) for hal_pwr_enter_normal_sleep_mode + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) for hal_pwr_set_stop_sleep_wakeup_pin + rm_note11pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) for hal_pwr_enter_stop_sleep_mode + rm_note11pro_demo.o(i.app_system_suspend) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.app_system_suspend) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.app_system_suspend) refers to rm_note11pro_demo.o(i.ap_rstn_pull_high_cb) for ap_rstn_pull_high_cb + rm_note11pro_demo.o(i.app_tx_cmd_panel_te_cb) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame) for hal_dsi_tx_ctrl_gen_a_frame + rm_note11pro_demo.o(i.app_tx_cmd_panel_te_cb) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(i.pps_update_handle) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) for hal_dsi_tx_ctrl_set_tear_mode + rm_note11pro_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) for hal_dsi_rx_ctrl_get_compressen_en + rm_note11pro_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + rm_note11pro_demo.o(i.pps_update_handle) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + rm_note11pro_demo.o(i.pps_update_handle) refers to rm_note11pro_demo.o(.data) for .data + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_dcs_set_display_on) for ap_dcs_set_display_on + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_dcs_set_display_off) for ap_dcs_set_display_off + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_update_pps_9E) for ap_update_pps_9E + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_set_backlight) for ap_set_backlight + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) for ap_dcs_set_enter_sleep_mode + rm_note11pro_demo.o(.constdata) refers to rm_note11pro_demo.o(i.ap_dcs_set_exit_sleep_mode) for ap_dcs_set_exit_sleep_mode + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to tau_log.o(i.tau_log_init) for tau_log_init + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to drv_common.o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to drv_common.o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to drv_vidc.o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to hal_internal_vsync.o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_memc.o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to hal_internal_dcs.o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_dma.o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_uart.o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_rxbr.o(i.VPRE1_IRQn_Handler) for VPRE1_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_swire.o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_md) for drv_rxbr_set_ack_pkt_md + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_lpdt_fifo_status) for drv_dsi_rx_get_lpdt_fifo_status + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to hal_dsi_rx_ctrl.o(i.swap_uint16_t) for swap_uint16_t + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex) for hal_dsi_rx_ctrl_set_pixel_data_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_rxbr.o(i.drv_rxbr_swpxl_clr) for drv_rxbr_swpxl_clr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_rxbr.o(i.drv_rxbr_set_swpxl_data) for drv_rxbr_set_swpxl_data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) for hal_dsi_rx_ctrl_set_rx_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.constdata) for .constdata + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_force_video_crtl) refers to drv_dsi_rx.o(i.drv_dsi_rx_force_video_crtl) for drv_dsi_rx_force_video_crtl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_cap_pixel_color) refers to drv_vidc.o(i.drv_vidc_get_status2) for drv_vidc_get_status2 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_irqen) for drv_dsc_dec_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_se.o(i.drv_se_start_rx) for drv_se_start_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_pwr.o(i.drv_pwr_set_pll_clk) for drv_pwr_set_pll_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_clk) for drv_crgu_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_clk) for drv_crgu_set_dsc_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_clk) for drv_crgu_set_vidc_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_clk) for drv_crgu_set_fb_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en) for drv_dsi_rx_set_ddi_crc_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt) for drv_dsi_rx_set_ipi_ycbcr_frmt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en) for drv_dsi_rx_set_tear_resp_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) for drv_dsi_rx_set_check_crc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_circ_mode_enable) for drv_memc_set_circ_mode_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_pu_thres) for drv_memc_set_ltpo_pu_thres + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) for hal_intl_dcs_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_circ_mode_enable) for drv_vidc_set_circ_mode_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dither_config) for drv_vidc_set_dither_config + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_vintp_config) for drv_vidc_set_vintp_config + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_honly_hinitr) for drv_vidc_set_honly_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_honly_hinitb) for drv_vidc_set_honly_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_honly_hcoef0) for drv_vidc_set_honly_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.constdata) for .constdata + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to hal_internal_vsync.o(i.hal_internal_sync_register_rx_callback) for hal_internal_sync_register_rx_callback + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to drv_vidc.o(i.drv_vidc_set_irq_line) for drv_vidc_set_irq_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_write_cmd_entry) refers to hal_internal_dcs.o(i.hal_intl_dcs_register_write_cmd_entry) for hal_intl_dcs_register_write_cmd_entry + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_response) for drv_rxbr_set_cmd_response + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) for hal_intl_dcs_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cap_pixel_pos) refers to drv_vidc.o(i.drv_vidc_debug_cap_pixel) for drv_vidc_debug_cap_pixel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) for drv_dsi_rx_set_check_crc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_log_level) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_drv_log_level) for drv_dsi_rx_set_drv_log_level + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to drv_rxbr.o(i.drv_rxbr_sw_reset) for drv_rxbr_sw_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex) refers to drv_rxbr.o(i.drv_rxbr_sw_reset) for drv_rxbr_sw_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) for hal_intl_svs_update_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_clk) for drv_crgu_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) for hal_internal_vsync_toggle_input_frame_rate + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) for hal_internal_sync_register_lcdc_cb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) for hal_internal_sync_set_fb_setting_manual + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame) refers to drv_lcdc.o(i.drv_lcdc_fixed_frame_output) for drv_lcdc_fixed_frame_output + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_get_tear_mode) for drv_memc_get_tear_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) for hal_internal_sync_register_lcdc_cb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) for hal_dsi_tx_init_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) for hal_dsi_tx_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) for hal_nonshadow_func_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) for hal_vsync_func_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_overwrite_enable) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_overwrite_enable) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_partial_disp_enable) refers to drv_lcdc.o(i.drv_lcdc_part_display_config) for drv_lcdc_part_display_config + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_partial_disp_enable) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_sync_line) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) for hal_dsi_tx_ctrl_draw_flick + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_cfg_int_frame) for drv_lcdc_cfg_int_frame + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_start) for hal_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_stop_display) for drv_lcdc_stop_display + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) for hal_dsi_tx_ctrl_read_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to drv_crgu.o(i.drv_crgu_set_dpi_clk) for drv_crgu_set_dpi_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) for hal_dsi_tx_timing_info_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) for hal_dsi_tx_cmd_mode_cal_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) for hal_dsi_tx_init_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) for hal_dsi_tx_vid_mode_cal_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) for hal_dsi_tx_init_vid_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) refers to d2f.o(.text) for __aeabi_d2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_internal_svs.o(i.hal_intl_svs_init_tx) for hal_intl_svs_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) for hal_tx_frame_rate_adjust + hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) refers to drv_lcdc.o(i.drv_lcdc_endianness_config) for drv_lcdc_endianness_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) refers to drv_lcdc.o(i.drv_lcdc_crop_hact) for drv_lcdc_crop_hact + hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) for hal_lcdc_postproc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) for hal_lcdc_displayproc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) for hal_intl_fb_get_tx_fb_info + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) for hal_lcdc_timinggen_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_clk) for drv_crgu_set_lcdc_clk + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) for hal_intl_fb_get_tx_fb_info + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) for hal_lcdc_upscaler_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_fldc_config) for drv_lcdc_fldc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_bcsa_config) for drv_lcdc_bcsa_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_fc_config) for drv_lcdc_fc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_edge_dect_config) for drv_lcdc_edge_dect_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_edge_enh_config) for drv_lcdc_edge_enh_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_vintp_mode_config) for drv_lcdc_vintp_mode_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_dith_config) for drv_lcdc_dith_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to drv_lcdc.o(i.drv_lcdc_vid_hw_start) for drv_lcdc_vid_hw_start + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to drv_lcdc.o(i.drv_lcdc_cmd_start) for drv_lcdc_cmd_start + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to drv_lcdc.o(i.drv_lcdc_set_prefetch) for drv_lcdc_set_prefetch + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for sg_pq_para + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_bcsa_config) for drv_lcdc_bcsa_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_fc_config) for drv_lcdc_fc_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_edge_dect_config) for drv_lcdc_edge_dect_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_edge_enh_config) for drv_lcdc_edge_enh_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for sg_pq_para + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to cfcmple.o(.text) for __aeabi_cfcmple + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_gpio.o(i.hal_gpio_config_pad) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_config_pad) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_gpio.o(i.hal_gpio_config_pad) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_high_impedance) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode) for drv_gpio_set_mode + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_swire.o(i.hal_swire_deinit) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + hal_swire.o(i.hal_swire_deinit) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_get_pulse_count) for drv_swire_get_pulse_count + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_set_trig_mode) for drv_swire_set_trig_mode + hal_swire.o(i.hal_swire_enable) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_enable) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock_div) for drv_crgu_set_clock_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_init) refers to drv_common.o(.data) for g_system_clock + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_set_pulse) refers to drv_swire.o(i.drv_swire_set_trig_mode) for drv_swire_set_trig_mode + hal_swire.o(i.hal_swire_set_pulse) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_set_pulse) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_set_timer) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer) for drv_sys_cfg_sel_swire_timer + hal_swire.o(i.hal_swire_set_timer) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + hal_swire.o(i.hal_swire_set_timer) refers to hal_timer.o(i.hal_timer_set_repeat) for hal_timer_set_repeat + hal_swire.o(i.hal_swire_set_timer) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_swire.o(i.hal_swire_set_timer) refers to drv_swire.o(i.drv_swire_set_trig_mode) for drv_swire_set_trig_mode + hal_swire.o(i.hal_swire_set_timer) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_set_waveform) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_set_waveform) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_set_waveform) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pll_clk) for drv_pwr_set_pll_clk + hal_system.o(i.hal_system_init) refers to hal_system.o(i.hal_system_updata_sysclk) for hal_system_updata_sysclk + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_reset_chip) refers to drv_crgu.o(i.drv_crgu_reset_chip) for drv_crgu_reset_chip + hal_system.o(i.hal_system_updata_sysclk) refers to drv_crgu.o(i.drv_crgu_set_ahb_clk) for drv_crgu_set_ahb_clk + hal_system.o(i.hal_system_updata_sysclk) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_updata_sysclk) refers to drv_common.o(.data) for g_system_delay_step + hal_pwr.o(i.hal_pwr_elvcc_close) refers to drv_pwr.o(i.drv_pwr_pwmled_electric_current) for drv_pwr_pwmled_electric_current + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_pwmled_electric_current) for drv_pwr_pwmled_electric_current + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_hv_ldo_mode_sel) for drv_pwr_hv_ldo_mode_sel + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_hv_ldo_mode_clock_sel) for drv_pwr_hv_ldo_mode_clock_sel + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_pwmled_driver_current_Big_step) for drv_pwr_pwmled_driver_current_Big_step + hal_pwr.o(i.hal_pwr_elvcc_vol_set) refers to drv_pwr.o(i.drv_pwr_hv_ldo_voltage_set) for drv_pwr_hv_ldo_voltage_set + hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_set_wakeup_type) for drv_pwr_set_wakeup_type + hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex) for drv_pwr_enter_sleep_mode_ex + hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) for drv_pwr_enter_stop_sleep_mode + hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) refers to hal_pwr.o(.data) for .data + hal_pwr.o(i.hal_pwr_exit_sleep_mode) refers to drv_pwr.o(i.drv_pwr_exit_sleep_mode) for drv_pwr_exit_sleep_mode + hal_pwr.o(i.hal_pwr_get_reset_flag) refers to drv_crgu.o(i.drv_crgu_get_all_reset_flag) for drv_crgu_get_all_reset_flag + hal_pwr.o(i.hal_pwr_get_reset_flag) refers to drv_pwr.o(i.drv_pwr_get_wakeflag) for drv_pwr_get_wakeflag + hal_pwr.o(i.hal_pwr_get_reset_flag) refers to drv_crgu.o(i.drv_crgu_clear_all_reset_flags) for drv_crgu_clear_all_reset_flags + hal_pwr.o(i.hal_pwr_get_vcc_power_ready) refers to drv_pwr.o(i.drv_pwr_get_power_ready_st) for drv_pwr_get_power_ready_st + hal_pwr.o(i.hal_pwr_ldo13s_en) refers to drv_pwr.o(i.drv_pwr_ldo13s_en) for drv_pwr_ldo13s_en + hal_pwr.o(i.hal_pwr_ldo13s_set) refers to drv_pwr.o(i.drv_pwr_ldo13s_set) for drv_pwr_ldo13s_set + hal_pwr.o(i.hal_pwr_ldo18s_en) refers to drv_pwr.o(i.drv_pwr_ldo18s_en) for drv_pwr_ldo18s_en + hal_pwr.o(i.hal_pwr_ldo18s_set) refers to drv_pwr.o(i.drv_pwr_ldo18s_set) for drv_pwr_ldo18s_set + hal_pwr.o(i.hal_pwr_set_main_power) refers to drv_pwr.o(i.drv_pwr_set_digit_power_sel) for drv_pwr_set_digit_power_sel + hal_pwr.o(i.hal_pwr_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd) for drv_pwr_set_pvd + hal_pwr.o(i.hal_pwr_set_sleep_mode_power) refers to drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) for drv_pwr_set_breath_screen_power_sel + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_pwr.o(.data) for .data + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_pwr.o(i.stop_sleep_cb) for stop_sleep_cb + hal_pwr.o(i.hal_pwr_set_vcc_enable) refers to drv_pwr.o(i.drv_pwr_charge_pump_en) for drv_pwr_charge_pump_en + hal_pwr.o(i.hal_pwr_sw_tp18_en) refers to drv_pwr.o(i.drv_pwr_sw_tp18_en) for drv_pwr_sw_tp18_en + hal_pwr.o(i.stop_sleep_cb) refers to hal_pwr.o(.data) for .data + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_delay.o(i.delayUs) refers to drv_common.o(.data) for g_system_delay_step + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_recv_blocking) for hal_uart_recv_blocking + tau_log.o(i.fgetc) refers to hal_system.o(i.hal_system_get_debug_state) for hal_system_get_debug_state + tau_log.o(i.fgetc) refers to hal_system.o(i.hal_system_clear_debug_state) for hal_system_clear_debug_state + tau_log.o(i.fgetc) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.fputc) refers to tau_log.o(i.tau_log_push_log) for tau_log_push_log + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_send_blocking) for hal_uart_send_blocking + tau_log.o(i.fputc) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.tau_log_init) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + tau_log.o(i.tau_log_init) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.tau_log_printf) refers to memseta.o(.text) for __aeabi_memclr4 + tau_log.o(i.tau_log_printf) refers to strlen.o(.text) for strlen + tau_log.o(i.tau_log_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.tau_log_printf) refers to tau_log.o(i.tau_log_push_log) for tau_log_push_log + tau_log.o(i.tau_log_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.tau_log_printf) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.tau_log_printf) refers to tau_log.o(.bss) for g_log_buf + tau_log.o(i.tau_log_push_log) refers to memcpya.o(.text) for __aeabi_memcpy + tau_log.o(i.tau_log_push_log) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(.ARM.__at_0x1101C) refers to tau_log.o(.bss) for g_log_buf + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_uart.o(i.hal_uart0_rx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart0_tx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart1_rx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart1_tx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.drv_uart_deinit) for drv_uart_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_uart.o(i.hal_uart_deinit) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_dma_path_close) refers to drv_dma.o(i.drv_dma_disable) for drv_dma_disable + hal_uart.o(i.hal_uart_dma_path_close) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_dma_path_close) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_apply_handle) for drv_dma_apply_handle + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_register_callback) for drv_dma_register_callback + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_enable_int) for drv_dma_enable_int + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_disable) for drv_dma_disable + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_set_mem_trans_info) for drv_dma_set_mem_trans_info + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_enable) for drv_dma_enable + hal_uart.o(i.hal_uart_dma_recv) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_uart.o(i.hal_uart_dma_recv) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_dma_recv) refers to hal_uart.o(i.hal_uart0_rx_dma_cb) for hal_uart0_rx_dma_cb + hal_uart.o(i.hal_uart_dma_recv) refers to hal_uart.o(i.hal_uart1_rx_dma_cb) for hal_uart1_rx_dma_cb + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_apply_handle) for drv_dma_apply_handle + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_register_callback) for drv_dma_register_callback + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_enable_int) for drv_dma_enable_int + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_disable) for drv_dma_disable + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_set_mem_trans_info) for drv_dma_set_mem_trans_info + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_enable) for drv_dma_enable + hal_uart.o(i.hal_uart_dma_send) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_uart.o(i.hal_uart_dma_send) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_dma_send) refers to hal_uart.o(i.hal_uart0_tx_dma_cb) for hal_uart0_tx_dma_cb + hal_uart.o(i.hal_uart_dma_send) refers to hal_uart.o(i.hal_uart1_tx_dma_cb) for hal_uart1_tx_dma_cb + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.drv_uart_init) for drv_uart_init + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.drv_uart_trans_create_handle) for drv_uart_trans_create_handle + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_recv_blocking) refers to drv_uart.o(i.drv_uart_recv_blocking) for drv_uart_recv_blocking + hal_uart.o(i.hal_uart_recv_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_recv_none_blocking) refers to drv_uart.o(i.drv_uart_recv_none_blocking) for drv_uart_recv_none_blocking + hal_uart.o(i.hal_uart_recv_none_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_send_blocking) refers to drv_uart.o(i.drv_uart_send_blocking) for drv_uart_send_blocking + hal_uart.o(i.hal_uart_send_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_send_none_blocking) refers to drv_uart.o(i.drv_uart_send_none_blocking) for drv_uart_send_none_blocking + hal_uart.o(i.hal_uart_send_none_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_internal_vsync.o(i.LCDC_IRQn_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) for hal_intl_fb_cal_fb_info + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) for hal_dsi_tx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_register_rx_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) for hal_intl_fb_set_fb_info_manual + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) for hal_intl_fb_cal_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_svs.o(i.hal_intl_svs_init_rx) for hal_intl_svs_init_rx + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) for hal_intl_dcs_init_sw_fltr + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_pro_motion_init) for soft_pro_motion_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) for hal_intl_fb_cal_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_svs.o(i.hal_intl_svs_deinit_rx) for hal_intl_svs_deinit_rx + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_svs.o(i.hal_intl_svs_set_sync_coef) for hal_intl_svs_set_sync_coef + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_memc.o(i.drv_memc_set_frame_drop_select) for drv_memc_set_frame_drop_select + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_set_tear_line) for drv_lcdc_set_tear_line + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to idiv.o(.text) for __aeabi_idivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_config_acc_command_mode) for drv_lcdc_config_acc_command_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_svs.o(i.hal_intl_svs_deinit_tx) for hal_intl_svs_deinit_tx + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.soft_pro_motion_init) for soft_pro_motion_init + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_svs.o(i.hal_intl_svs_set_input_frate) for hal_intl_svs_set_input_frate + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.soft_pro_motion_init) for soft_pro_motion_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.soft_double_buffer_update) for soft_double_buffer_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_svs.o(i.hal_intl_svs_handle) for hal_intl_svs_handle + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_lcdc.o(i.drv_lcdc_cmd_start) for drv_lcdc_cmd_start + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) for hal_intl_svs_set_rx_vtt + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_double_buffer_update) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(i.soft_tear_adjust_line) for soft_tear_adjust_line + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(i.soft_tear_adjust_line) for soft_tear_adjust_line + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_pro_motion_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.soft_pro_motion_init) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_pro_motion_init) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.soft_tear_adjust_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_int_source) for drv_vidc_get_int_source + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to hal_internal_dcs.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) for hal_intl_dcs_rx_receive_packet + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_crgu.o(i.drv_crgu_set_dsc_clk) for drv_crgu_set_dsc_clk + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to hal_internal_dcs.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) refers to hal_internal_dcs.o(.bss) for .bss + hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_register_write_cmd_entry) refers to hal_internal_dcs.o(.data) for .data + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) for hal_intl_dcs_sw_filter_handle + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) for hal_dsi_rx_ctrl_dcs_async_handler + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en) for drv_dsi_rx_get_ddi_crc_en + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_dcs.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_dcs.o(.data) for .data + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) for hal_intl_dcs_rx_get_dcs_packet_data + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) for hal_intl_dcs_rx_receive_pps + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to hal_internal_dcs.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to memcmp.o(.text) for memcmp + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to hal_internal_dcs.o(.conststring) for .conststring + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) refers to memseta.o(.text) for __aeabi_memset + hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_filter_regs) for drv_rxbr_set_filter_regs + hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) refers to hal_internal_dcs.o(.bss) for .bss + hal_internal_dcs.o(i.hal_intl_dcs_set_dcs_direct_mode) refers to hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) for hal_intl_dcs_set_auto_hw_filter + hal_internal_dcs.o(i.hal_intl_dcs_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) refers to hal_internal_dcs.o(.data) for .data + hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) refers to hal_internal_dcs.o(.bss) for .bss + hal_internal_dcs.o(.data) refers to hal_internal_dcs.o(.bss) for g_imm_buffer + hal_internal_fb.o(i.ha_intl_fb_check_pu_size) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.ha_intl_fb_check_pu_size) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) for hal_intl_fb_flow_control_adapter + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) for hal_intl_fb_check_bandwidth + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.ha_intl_fb_check_pu_size) for ha_intl_fb_check_pu_size + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.hal_intl_fb_edge_resize) for hal_intl_fb_edge_resize + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_fb.o(i.hal_intl_fb_edge_resize) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.hal_intl_fb_edge_resize) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_user_flow) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to hal_internal_fb.o(.conststring) for .conststring + hal_internal_svs.o(i.hal_intl_svs_deinit_rx) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.hal_intl_svs_deinit_rx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_deinit_rx) refers to hal_internal_svs.o(i.svs_wait_start) for svs_wait_start + hal_internal_svs.o(i.hal_intl_svs_deinit_tx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_handle) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) for hal_intl_svs_update_rxbr_clk + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_svs.o(i.svs_wait_start) for svs_wait_start + hal_internal_svs.o(i.hal_intl_svs_init_tx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_svs.o(i.svs_wait_start) for svs_wait_start + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_svs.o(i.svs_wait_fr_stab) for svs_wait_fr_stab + hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_set_sync_coef) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_direct_mode_setting) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_svs.o(i.svs_direct_mode_setting) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_internal_svs.o(i.svs_direct_mode_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_svs.o(i.svs_direct_mode_setting) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) for drv_rxbr_hline_rcv1_cfg + hal_internal_svs.o(i.svs_direct_mode_setting) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_get_rel_intv) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_svs.o(i.svs_get_rel_intv) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_sync_handle) refers to hal_internal_svs.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_svs.o(i.svs_sync_handle) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_svs.o(i.svs_sync_handle) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_svs.o(i.svs_sync_handle) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_svs.o(i.svs_sync_handle) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_svs.o(i.svs_sync_handle) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_svs.o(i.svs_sync_handle) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_svs.o(i.svs_sync_handle) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_wait_fr_stab) refers to hal_internal_svs.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_svs.o(i.svs_wait_fr_stab) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_svs.o(i.svs_wait_fr_stab) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_svs.o(i.svs_wait_fr_stab) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_svs.o(i.svs_wait_fr_stab) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_svs.o(i.svs_wait_fr_stab) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_svs.o(i.svs_wait_fr_stab) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_internal_svs.o(i.svs_wait_fr_stab) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_wait_fr_stab) refers to hal_internal_svs.o(i.svs_sync_handle) for svs_sync_handle + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_svs.o(i.svs_wait_start) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_internal_svs.o(i.svs_wait_start) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_svs.o(i.svs_wait_start) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_internal_svs.o(i.svs_wait_start) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_svs.o(i.svs_wait_start) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_svs.o(i.svs_wait_start) refers to ceil.o(i.ceil) for ceil + hal_internal_svs.o(i.svs_wait_start) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(i.svs_direct_mode_setting) for svs_direct_mode_setting + hal_internal_svs.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_svs.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) for drv_rxbr_hline_rcv1_cfg + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(i.svs_wait_fr_stab) for svs_wait_fr_stab + drv_common.o(i.HardFault_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_common.o(i.SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_se.o(i.drv_se_init) for drv_se_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_crgu.o(i.drv_crgu_get_rxbr_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_crgu.o(i.drv_crgu_get_system_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_se.o(i.drv_se_set_dsc) for drv_se_set_dsc + drv_gpio.o(i.AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.drv_gpio_handle_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_handle_int) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_pwr.o(i.drv_pwr_analog_pwm_en) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_elvcc_pwm_en) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_elvcc_pwm_en) refers to tau_delay.o(i.delayMs) for delayMs + drv_pwr.o(i.drv_pwr_enter_sleep_mode) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_enter_sleep_mode) refers to drv_pwr.o(i.drv_pwr_por_mode_flag) for drv_pwr_por_mode_flag + drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_exit_sleep_mode) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_hv_ldo_mode_clock_sel) refers to drv_pwr.o(i.drv_pwr_hv_ldo_10M_clock) for drv_pwr_hv_ldo_10M_clock + drv_pwr.o(i.drv_pwr_pwm_output_pwm_led) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_digit_power_sel) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_system_clk) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_wakeup_type) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_swire.o(i.SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_sys_cfg_sel_dma_req) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_timer.o(i.TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_compare_val) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_common.o(.data) for g_system_clock + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_se.o(i.drv_se_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_se.o(i.drv_se_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_se.o(i.drv_se_init) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_dsc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_dsc) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_lcdc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_lcdc) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_memc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_memc) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_rxbr) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_rxbr) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_vidc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_vidc) refers to drv_se.o(.data) for .data + drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) refers to drv_dsi_rx.o(.data) for .data + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_set_drv_log_level) refers to drv_dsi_rx.o(.data) for .data + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_lcdc.o(i.drv_lcdc_clear_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_cmd_start) refers to drv_se.o(i.drv_se_set_lcdc) for drv_se_set_lcdc + drv_lcdc.o(i.drv_lcdc_ctrl_flow) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + drv_lcdc.o(i.drv_lcdc_part_display_config) refers to drv_lcdc.o(i.drv_lcdc_pixel_value_config) for drv_lcdc_pixel_value_config + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_lcdc.o(i.drv_lcdc_clear_int) for drv_lcdc_clear_int + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_lcdc.o(i.drv_lcdc_vid_hw_start) refers to drv_se.o(i.drv_se_set_lcdc) for drv_se_set_lcdc + drv_memc.o(i.MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.drv_memc_rate_transfer_sel) refers to drv_se.o(i.drv_se_set_memc) for drv_se_set_memc + drv_memc.o(i.drv_memc_set_ltpo_mode) refers to drv_se.o(i.drv_se_set_memc) for drv_se_set_memc + drv_rxbr.o(i.VPRE1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.VPRE1_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_set_cmd_response) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_set_color_format) refers to drv_se.o(i.drv_se_set_rxbr) for drv_se_set_rxbr + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to tau_delay.o(i.delayMs) for delayMs + drv_rxbr.o(i.drv_rxbr_sw_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_rxbr.o(i.drv_rxbr_sw_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + drv_vidc.o(i.VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_set_src_parameter) refers to drv_se.o(i.drv_se_set_vidc) for drv_se_set_vidc + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(i.drv_dma_get_int_source) for drv_dma_get_int_source + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(i.drv_dma_clear_status) for drv_dma_clear_status + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(.data) for .data + drv_dma.o(i.drv_dma_apply_handle) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dma.o(i.drv_dma_apply_handle) refers to drv_dma.o(.data) for .data + drv_dma.o(i.drv_dma_apply_handle) refers to drv_dma.o(.constdata) for .constdata + drv_dma.o(i.drv_dma_deinit) refers to drv_dma.o(i.drv_dma_disable_int) for drv_dma_disable_int + drv_dma.o(i.drv_dma_disable_int) refers to drv_dma.o(i.drv_dma_int_list_delete) for drv_dma_int_list_delete + drv_dma.o(i.drv_dma_disable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_int) refers to drv_dma.o(i.drv_dma_int_list_inset) for drv_dma_int_list_inset + drv_dma.o(i.drv_dma_enable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_init) refers to drv_per_common.o(i.drv_per_set_clock) for drv_per_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_update_handle_setting) for drv_dma_update_handle_setting + drv_dma.o(i.drv_dma_int_list_delete) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_int_list_inset) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_update_handle_setting) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_dma_req) for drv_sys_cfg_sel_dma_req + drv_dma.o(i.drv_dma_update_req_by_default) refers to drv_dma.o(i.drv_dma_update_handle_setting) for drv_dma_update_handle_setting + drv_dma.o(i.drv_dma_update_req_by_default) refers to drv_dma.o(.constdata) for .constdata + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_int_trans_handle) for drv_uart_int_trans_handle + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_abort_recv) for drv_uart_abort_recv + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_abort_send) for drv_uart_abort_send + drv_uart.o(i.UART_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(i.drv_uart_reset_rx_fifo) for drv_uart_reset_rx_fifo + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(i.drv_uart_reset_tx_fifo) for drv_uart_reset_tx_fifo + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_deinit) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_deinit) refers to drv_uart.o(i.drv_uart_enable_clk) for drv_uart_enable_clk + drv_uart.o(i.drv_uart_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.drv_uart_deinit) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_enable_clk) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + drv_uart.o(i.drv_uart_enable_int) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_enable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.drv_uart_get_def_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.drv_uart_get_def_cfg) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.drv_uart_get_instance) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_enable_clk) for drv_uart_enable_clk + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_set_baud_rate) for drv_uart_set_baud_rate + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_enable_int) for drv_uart_enable_int + drv_uart.o(i.drv_uart_int_trans_handle) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_recv_none_blocking) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_recv_none_blocking) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_recv_none_blocking) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_reset_rx_fifo) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_reset_tx_fifo) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_send_none_blocking) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_send_none_blocking) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_send_none_blocking) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_set_baud_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.drv_uart_trans_create_handle) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_trans_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.drv_uart_trans_create_handle) refers to drv_uart.o(.bss) for .bss + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_pwr.o(i.drv_pwr_efuse_pd) for drv_pwr_efuse_pd + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_pwr.o(i.drv_pwr_efuse_pd) for drv_pwr_efuse_pd + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_efuse.o(i.drv_efuse_write_read_req_clear) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_efuse.o(i.drv_efuse_write_read_req_clear) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_per_common.o(i.drv_per_get_system_clk) refers to drv_crgu.o(i.drv_crgu_get_system_clk) for drv_crgu_get_system_clk + drv_per_common.o(i.drv_per_reset_module) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + drv_per_common.o(i.drv_per_set_clock) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + d2f.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + d2f.o(.text) refers to fepilogue.o(.text) for _float_round + cfcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing rm_note11pro_demo.o(.rev16_text), (4 bytes). + Removing rm_note11pro_demo.o(.revsh_text), (4 bytes). + Removing rm_note11pro_demo.o(i.Gpio_swire_output), (78 bytes). + Removing rm_note11pro_demo.o(.data), (1 bytes). + Removing rm_note11pro_demo.o(.data), (2 bytes). + Removing rm_note11pro_demo.o(.data), (4 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (220 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line), (604 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (320 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (256 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_force_video_crtl), (12 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_cap_pixel_color), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback), (66 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_write_cmd_entry), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack), (176 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cap_pixel_pos), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (32 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_log_level), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (240 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex), (392 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (72 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.swap_uint16_t), (10 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode), (120 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick), (244 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_get_disp_line), (12 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_overwrite_enable), (22 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_partial_disp_enable), (70 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (128 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (32 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm), (8 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_sync_line), (36 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (12 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (52 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera), (68 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update), (16 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_input_data), (18 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (40 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (44 bytes). + Removing hal_gpio.o(i.hal_gpio_set_high_impedance), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_pull_state), (72 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (52 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (52 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (22 bytes). + Removing hal_swire.o(i.hal_swire_set_waveform), (92 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_enable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (10 bytes). + Removing hal_pwr.o(.rev16_text), (4 bytes). + Removing hal_pwr.o(.revsh_text), (4 bytes). + Removing hal_pwr.o(i.hal_pwr_elvcc_close), (10 bytes). + Removing hal_pwr.o(i.hal_pwr_elvcc_ldo_en), (46 bytes). + Removing hal_pwr.o(i.hal_pwr_elvcc_vol_set), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_get_reset_flag), (66 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo13s_en), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo13s_set), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo18s_en), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo18s_set), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_set_pvd), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_set_vcc_enable), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_sw_tp18_en), (8 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (72 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_start), (48 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (42 bytes). + Removing hal_timer.o(i.hal_timer_stop), (40 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart0_rx_dma_cb), (20 bytes). + Removing hal_uart.o(i.hal_uart0_tx_dma_cb), (36 bytes). + Removing hal_uart.o(i.hal_uart1_rx_dma_cb), (20 bytes). + Removing hal_uart.o(i.hal_uart1_tx_dma_cb), (36 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (48 bytes). + Removing hal_uart.o(i.hal_uart_dma_path_close), (92 bytes). + Removing hal_uart.o(i.hal_uart_dma_recv), (276 bytes). + Removing hal_uart.o(i.hal_uart_dma_send), (280 bytes). + Removing hal_uart.o(i.hal_uart_recv_blocking), (28 bytes). + Removing hal_uart.o(i.hal_uart_recv_none_blocking), (28 bytes). + Removing hal_uart.o(i.hal_uart_send_none_blocking), (28 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (2 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_register_rx_callback), (28 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (28 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line), (60 bytes). + Removing hal_internal_vsync.o(.data), (4 bytes). + Removing hal_internal_dcs.o(.rev16_text), (4 bytes). + Removing hal_internal_dcs.o(.revsh_text), (4 bytes). + Removing hal_internal_dcs.o(i.hal_intl_dcs_register_write_cmd_entry), (12 bytes). + Removing hal_internal_dcs.o(i.hal_intl_dcs_set_dcs_direct_mode), (44 bytes). + Removing hal_internal_fb.o(.rev16_text), (4 bytes). + Removing hal_internal_fb.o(.revsh_text), (4 bytes). + Removing hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual), (480 bytes). + Removing hal_internal_fb.o(.conststring), (152 bytes). + Removing hal_internal_svs.o(.rev16_text), (4 bytes). + Removing hal_internal_svs.o(.revsh_text), (4 bytes). + Removing hal_internal_svs.o(i.hal_intl_svs_set_sync_coef), (12 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_enable_systick), (88 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_get_all_reset_flag), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (104 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_clock_src), (16 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_attribute), (16 bytes). + Removing drv_gpio.o(i.drv_gpio_get_input_data), (24 bytes). + Removing drv_gpio.o(i.drv_gpio_set_attribute), (28 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_10bit_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_analog_pwm_en), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_charge_pump_en), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_close_iov18_tp18), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_dsc_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_elvcc_pwm_en), (124 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_sleep_mode), (152 bytes). + Removing drv_pwr.o(i.drv_pwr_exit_sleep_mode_ex), (40 bytes). + Removing drv_pwr.o(i.drv_pwr_fb_pd), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_get_wakeflag), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_get_write_lock_st), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_hf_frm_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_10M_clock), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_mode_clock_sel), (60 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_mode_sel), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_voltage_set), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo11d_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo13s_en), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo13s_set), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo15_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo18s_en), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo18s_set), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_ltpo_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_osc32k_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_osc80m_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_p3k_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_por_mode_flag), (32 bytes). + Removing drv_pwr.o(i.drv_pwr_power_in), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_power_ready_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_power_sel), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_pwm_output_pwm_led), (56 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_driver_current_Big_step), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_driver_current_small_step), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_electric_current), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_open_drain), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_ram_pd_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_read_boot_chipst), (12 bytes). + Removing drv_pwr.o(i.drv_pwr_read_chipcfg), (12 bytes). + Removing drv_pwr.o(i.drv_pwr_rgbr_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_set_ap_rst_mode), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_set_ldo11_mode), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_set_ldo15_mode), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_set_pvd), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_set_pvd_mode), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_set_system_clk), (32 bytes). + Removing drv_pwr.o(i.drv_pwr_sw_tp18_en), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_wakeflag_get), (16 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_sel_dma_req), (128 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing drv_timer.o(i.drv_timer_register_callback), (20 bytes). + Removing dcs_packet_fifo.o(.rev16_text), (4 bytes). + Removing dcs_packet_fifo.o(.revsh_text), (4 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_se.o(.rev16_text), (4 bytes). + Removing drv_se.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_force_video_crtl), (28 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_lpdt_fifo_status), (16 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (68 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (12 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (24 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_drv_log_level), (12 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (16 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (24 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (16 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (68 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (296 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (228 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (32 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (100 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (20 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_clear), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_lock), (32 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (16 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_clear_irq), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_dpisignal_output_ctrl), (44 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_dpbuf_num), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_dpi_status), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_frame_clk_count), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_int_en_status), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_int_status), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_line_status), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_rgb2pen_subpixel), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_part_display_config), (52 bytes). + Removing drv_lcdc.o(i.drv_lcdc_pixel_value_config), (32 bytes). + Removing drv_lcdc.o(i.drv_lcdc_rd_st_line_config), (28 bytes). + Removing drv_lcdc.o(i.drv_lcdc_software_reset), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_vid_sw_start), (56 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (36 bytes). + Removing drv_memc.o(i.drv_memc_set_double_buffer_reverse), (24 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_pri), (44 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_inten), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (24 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (24 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (24 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_clr_swp_cnt), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_col_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_frame_data_interval), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_hline_dcat), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_page_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_swpxl_cnt), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_register_irq0_callback), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_ack_pkt_md), (28 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_cmd_filter), (320 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_cmd_response), (324 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (32 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_data_catch_hline), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_swpxl_data), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_tmpdith_bp), (28 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (32 bytes). + Removing drv_rxbr.o(i.drv_rxbr_sw_reset), (164 bytes). + Removing drv_rxbr.o(i.drv_rxbr_swpxl_clr), (32 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (28 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (36 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (28 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_apply_handle), (304 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (52 bytes). + Removing drv_dma.o(i.drv_dma_disable), (20 bytes). + Removing drv_dma.o(i.drv_dma_disable_int), (40 bytes). + Removing drv_dma.o(i.drv_dma_enable), (36 bytes). + Removing drv_dma.o(i.drv_dma_enable_int), (68 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_trans_num), (20 bytes). + Removing drv_dma.o(i.drv_dma_get_status), (20 bytes). + Removing drv_dma.o(i.drv_dma_init), (22 bytes). + Removing drv_dma.o(i.drv_dma_int_list_delete), (88 bytes). + Removing drv_dma.o(i.drv_dma_int_list_inset), (48 bytes). + Removing drv_dma.o(i.drv_dma_register_callback), (4 bytes). + Removing drv_dma.o(i.drv_dma_reset), (36 bytes). + Removing drv_dma.o(i.drv_dma_set_bitwide), (56 bytes). + Removing drv_dma.o(i.drv_dma_set_burst), (20 bytes). + Removing drv_dma.o(i.drv_dma_set_circle_mode), (40 bytes). + Removing drv_dma.o(i.drv_dma_set_dir), (40 bytes). + Removing drv_dma.o(i.drv_dma_set_increment), (72 bytes). + Removing drv_dma.o(i.drv_dma_set_mem_trans_info), (40 bytes). + Removing drv_dma.o(i.drv_dma_set_mem_trans_offset), (24 bytes). + Removing drv_dma.o(i.drv_dma_set_per_address), (20 bytes). + Removing drv_dma.o(i.drv_dma_set_priority), (32 bytes). + Removing drv_dma.o(i.drv_dma_set_tran_int_cnt), (28 bytes). + Removing drv_dma.o(i.drv_dma_update_handle_setting), (148 bytes). + Removing drv_dma.o(i.drv_dma_update_req_by_default), (40 bytes). + Removing drv_dma.o(.constdata), (136 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.drv_uart_deinit), (60 bytes). + Removing drv_uart.o(i.drv_uart_get_def_cfg), (72 bytes). + Removing drv_uart.o(i.drv_uart_recv_blocking), (48 bytes). + Removing drv_uart.o(i.drv_uart_recv_none_blocking), (60 bytes). + Removing drv_uart.o(i.drv_uart_send_none_blocking), (60 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (56 bytes). + Removing drv_efuse.o(i.drv_efuse_write_read_req_clear), (22 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_per_common.o(.rev16_text), (4 bytes). + Removing drv_per_common.o(.revsh_text), (4 bytes). + Removing drv_per_common.o(i.drv_per_get_system_clk), (8 bytes). + Removing drv_per_common.o(i.drv_per_reset_module), (14 bytes). + Removing drv_per_common.o(i.drv_per_set_clock), (14 bytes). + Removing fflti.o(.text), (22 bytes). + +370 unused section(s) (total 17873 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcmp.c 0x00000000 Number 0 memcmp.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/string/strlen.c 0x00000000 Number 0 strlen.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/d2f.c 0x00000000 Number 0 d2f.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_per_common.c 0x00000000 Number 0 drv_per_common.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_pwr.c 0x00000000 Number 0 hal_pwr.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_dcs.c 0x00000000 Number 0 hal_internal_dcs.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_fb.c 0x00000000 Number 0 hal_internal_fb.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_svs.c 0x00000000 Number 0 hal_internal_svs.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\driver\cuckoo\src\drv_se.c 0x00000000 Number 0 drv_se.o ABSOLUTE + ..\..\src\app\RM_Note11Pro\RM_Note11Pro_demo.c 0x00000000 Number 0 rm_note11pro_demo.o ABSOLUTE + ..\..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_per_common.c 0x00000000 Number 0 drv_per_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_pwr.c 0x00000000 Number 0 hal_pwr.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_dcs.c 0x00000000 Number 0 hal_internal_dcs.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_fb.c 0x00000000 Number 0 hal_internal_fb.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_svs.c 0x00000000 Number 0 hal_internal_svs.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\src\\drv_se.c 0x00000000 Number 0 drv_se.o ABSOLUTE + ..\\..\\src\\app\\RM_Note11Pro\\RM_Note11Pro_demo.c 0x00000000 Number 0 rm_note11pro_demo.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfcmple.s 0x00000000 Number 0 cfcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 strlen.o(.text) + .text 0x000101f6 Section 0 memcmp.o(.text) + .text 0x00010210 Section 0 fadd.o(.text) + .text 0x000102c2 Section 0 fmul.o(.text) + .text 0x0001033c Section 0 fdiv.o(.text) + .text 0x000103b8 Section 0 fscalb.o(.text) + .text 0x000103d0 Section 0 dadd.o(.text) + .text 0x00010534 Section 0 dmul.o(.text) + .text 0x00010604 Section 0 ffltui.o(.text) + .text 0x00010614 Section 0 dfltui.o(.text) + .text 0x00010630 Section 0 ffixui.o(.text) + .text 0x00010658 Section 0 dfixui.o(.text) + .text 0x00010694 Section 0 f2d.o(.text) + .text 0x000106bc Section 0 d2f.o(.text) + .text 0x000106f4 Section 20 cfcmple.o(.text) + .text 0x00010708 Section 20 cfrcmple.o(.text) + .text 0x0001071c Section 0 uldiv.o(.text) + .text 0x0001077c Section 0 llshl.o(.text) + .text 0x0001079c Section 0 llushr.o(.text) + .text 0x000107be Section 0 llsshr.o(.text) + .text 0x000107e4 Section 0 iusefp.o(.text) + .text 0x000107e4 Section 0 fepilogue.o(.text) + .text 0x00010866 Section 0 depilogue.o(.text) + .text 0x00010924 Section 0 ddiv.o(.text) + .text 0x00010a14 Section 0 dfixul.o(.text) + .text 0x00010a54 Section 40 cdrcmple.o(.text) + .text 0x00010a7c Section 36 init.o(.text) + .text 0x00010aa0 Section 0 __dczerorl2.o(.text) + i.AP_NRESET_IRQn_Handler 0x00010af8 Section 0 drv_gpio.o(i.AP_NRESET_IRQn_Handler) + i.DMA_IRQn_Handler 0x00010b14 Section 0 drv_dma.o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010b70 Section 0 drv_gpio.o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010b7a Section 0 drv_gpio.o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010b84 Section 0 drv_gpio.o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010b8e Section 0 drv_gpio.o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010b98 Section 0 drv_gpio.o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010ba2 Section 0 drv_gpio.o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010bac Section 0 drv_gpio.o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010bb6 Section 0 drv_gpio.o(i.EXTI_INT7_IRQn_Handler) + i.HardFault_Handler 0x00010bc0 Section 0 drv_common.o(i.HardFault_Handler) + i.LCDC_IRQn_Handler 0x00010c08 Section 0 hal_internal_vsync.o(i.LCDC_IRQn_Handler) + i.MEMC_IRQn_Handler 0x00010d08 Section 0 drv_memc.o(i.MEMC_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010da4 Section 0 drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) + i.Note11Pro_demo 0x00010e5c Section 0 rm_note11pro_demo.o(i.Note11Pro_demo) + i.SWIRE_IRQn_Handler 0x00010ed4 Section 0 drv_swire.o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00010f04 Section 0 drv_common.o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00010f1c Section 0 drv_timer.o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x00010f26 Section 0 drv_timer.o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00010f30 Section 0 drv_timer.o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x00010f3a Section 0 drv_timer.o(i.TIMER3_IRQn_Handler) + i.VIDC_IRQn_Handler 0x00010f44 Section 0 drv_vidc.o(i.VIDC_IRQn_Handler) + i.VPRE1_IRQn_Handler 0x00010f60 Section 0 drv_rxbr.o(i.VPRE1_IRQn_Handler) + i.VPRE_IRQn_Handler 0x00010f7c Section 0 hal_internal_dcs.o(i.VPRE_IRQn_Handler) + i.__NVIC_EnableIRQ 0x00010fe8 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x00010fe9 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + .ARM.__at_0x11000 0x00011000 Section 28 drv_common.o(.ARM.__at_0x11000) + .ARM.__at_0x1101C 0x0001101c Section 16 tau_log.o(.ARM.__at_0x1101C) + .ARM.__at_0x1102C 0x0001102c Section 22 hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) + i.MIPI_RX_IRQn_Handler 0x00011044 Section 0 drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) + i.UART_IRQn_Handler 0x000113a8 Section 0 drv_uart.o(i.UART_IRQn_Handler) + i.__0printf 0x00011528 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x00011548 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x0001156c Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x0001159a Section 0 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + i.__NVIC_DisableIRQ 0x000115b4 Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x000115b5 Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__scatterload_copy 0x000115d4 Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_null 0x000115e2 Section 2 handlers.o(i.__scatterload_null) + i.__scatterload_zeroinit 0x000115e4 Section 14 handlers.o(i.__scatterload_zeroinit) + i._fp_digits 0x000115f4 Section 0 printfa.o(i._fp_digits) + _fp_digits 0x000115f5 Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x00011768 Section 0 printfa.o(i._printf_core) + _printf_core 0x00011769 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011e54 Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011e55 Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011e74 Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011e75 Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011ea0 Section 0 printfa.o(i._sputc) + _sputc 0x00011ea1 Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011eac Section 0 rm_note11pro_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011ead Thumb Code 142 rm_note11pro_demo.o(i.ap_dcs_read) + i.ap_dcs_set_display_off 0x00011f6c Section 0 rm_note11pro_demo.o(i.ap_dcs_set_display_off) + ap_dcs_set_display_off 0x00011f6d Thumb Code 44 rm_note11pro_demo.o(i.ap_dcs_set_display_off) + i.ap_dcs_set_display_on 0x00011fc8 Section 0 rm_note11pro_demo.o(i.ap_dcs_set_display_on) + ap_dcs_set_display_on 0x00011fc9 Thumb Code 28 rm_note11pro_demo.o(i.ap_dcs_set_display_on) + i.ap_dcs_set_enter_sleep_mode 0x00012010 Section 0 rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) + ap_dcs_set_enter_sleep_mode 0x00012011 Thumb Code 90 rm_note11pro_demo.o(i.ap_dcs_set_enter_sleep_mode) + i.ap_dcs_set_exit_sleep_mode 0x00012074 Section 0 rm_note11pro_demo.o(i.ap_dcs_set_exit_sleep_mode) + ap_dcs_set_exit_sleep_mode 0x00012075 Thumb Code 20 rm_note11pro_demo.o(i.ap_dcs_set_exit_sleep_mode) + i.ap_rstn_pull_down_cb 0x000120b8 Section 0 rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) + ap_rstn_pull_down_cb 0x000120b9 Thumb Code 32 rm_note11pro_demo.o(i.ap_rstn_pull_down_cb) + i.ap_rstn_pull_high_cb 0x00012114 Section 0 rm_note11pro_demo.o(i.ap_rstn_pull_high_cb) + ap_rstn_pull_high_cb 0x00012115 Thumb Code 20 rm_note11pro_demo.o(i.ap_rstn_pull_high_cb) + i.ap_set_backlight 0x0001212c Section 0 rm_note11pro_demo.o(i.ap_set_backlight) + ap_set_backlight 0x0001212d Thumb Code 54 rm_note11pro_demo.o(i.ap_set_backlight) + i.ap_update_frame_rate 0x0001218c Section 0 rm_note11pro_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x0001218d Thumb Code 54 rm_note11pro_demo.o(i.ap_update_frame_rate) + i.ap_update_pps_9E 0x00012218 Section 0 rm_note11pro_demo.o(i.ap_update_pps_9E) + ap_update_pps_9E 0x00012219 Thumb Code 98 rm_note11pro_demo.o(i.ap_update_pps_9E) + i.app_display_init 0x00012294 Section 0 rm_note11pro_demo.o(i.app_display_init) + i.app_gpio_init 0x000122c0 Section 0 rm_note11pro_demo.o(i.app_gpio_init) + i.app_init_panel 0x000122e0 Section 0 rm_note11pro_demo.o(i.app_init_panel) + app_init_panel 0x000122e1 Thumb Code 146 rm_note11pro_demo.o(i.app_init_panel) + i.app_mipi_rx_init 0x0001237c Section 0 rm_note11pro_demo.o(i.app_mipi_rx_init) + app_mipi_rx_init 0x0001237d Thumb Code 146 rm_note11pro_demo.o(i.app_mipi_rx_init) + i.app_mipi_tx_init 0x0001242c Section 0 rm_note11pro_demo.o(i.app_mipi_tx_init) + app_mipi_tx_init 0x0001242d Thumb Code 100 rm_note11pro_demo.o(i.app_mipi_tx_init) + i.app_mipi_tx_start 0x0001249c Section 0 rm_note11pro_demo.o(i.app_mipi_tx_start) + app_mipi_tx_start 0x0001249d Thumb Code 92 rm_note11pro_demo.o(i.app_mipi_tx_start) + i.app_system_suspend 0x00012520 Section 0 rm_note11pro_demo.o(i.app_system_suspend) + app_system_suspend 0x00012521 Thumb Code 134 rm_note11pro_demo.o(i.app_system_suspend) + i.app_tx_cmd_panel_te_cb 0x00012600 Section 0 rm_note11pro_demo.o(i.app_tx_cmd_panel_te_cb) + app_tx_cmd_panel_te_cb 0x00012601 Thumb Code 16 rm_note11pro_demo.o(i.app_tx_cmd_panel_te_cb) + i.board_Init 0x00012614 Section 0 board.o(i.board_Init) + i.ceil 0x0001262c Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x000126f4 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x000126f5 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x00012720 Section 0 hal_internal_dcs.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x00012721 Thumb Code 84 hal_internal_dcs.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x000127a8 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x00012800 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x00012818 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x0001285c Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.delayMs 0x00012880 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x00012898 Section 0 tau_delay.o(i.delayUs) + i.drv_common_system_init 0x000128c4 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_enable_clock 0x000128cc Section 0 drv_crgu.o(i.drv_crgu_enable_clock) + i.drv_crgu_get_rxbr_clk 0x00012908 Section 0 drv_crgu.o(i.drv_crgu_get_rxbr_clk) + i.drv_crgu_reset_modules 0x00012970 Section 0 drv_crgu.o(i.drv_crgu_reset_modules) + i.drv_crgu_set_ahb_clk 0x00012980 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_clk) + i.drv_crgu_set_clock_div 0x000129a8 Section 0 drv_crgu.o(i.drv_crgu_set_clock_div) + i.drv_crgu_set_dpi_clk 0x000129b8 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_clk) + i.drv_crgu_set_dsc_clk 0x000129f4 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_clk) + i.drv_crgu_set_fb_clk 0x00012a2c Section 0 drv_crgu.o(i.drv_crgu_set_fb_clk) + i.drv_crgu_set_lcdc_clk 0x00012a54 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_clk) + i.drv_crgu_set_reset 0x00012a7c Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_clk 0x00012a94 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_clk) + i.drv_crgu_set_vidc_clk 0x00012abc Section 0 drv_crgu.o(i.drv_crgu_set_vidc_clk) + i.drv_dma_clear_status 0x00012ae4 Section 0 drv_dma.o(i.drv_dma_clear_status) + i.drv_dma_get_int_source 0x00012afc Section 0 drv_dma.o(i.drv_dma_get_int_source) + drv_dma_get_int_source 0x00012afd Thumb Code 16 drv_dma.o(i.drv_dma_get_int_source) + i.drv_dsc_dec_disable 0x00012b10 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00012b2c Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00012b64 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_irqen 0x00012b84 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_irqen) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00012ba0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00012cac Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00012cec Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00012ced Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00012d3c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00012d3d Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00012d58 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_ddi_crc_en 0x00012d68 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en) + i.drv_dsi_rx_get_max_ret_size 0x00012d78 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00012d84 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_check_crc 0x00012d9c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) + i.drv_dsi_rx_set_ctrl_cfg 0x00012db8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00012ddc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_ddi_crc_en 0x00012dec Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en) + i.drv_dsi_rx_set_inten 0x00012e08 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00012e14 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_ipi_ycbcr_frmt 0x00012e24 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt) + i.drv_dsi_rx_set_lane_swap 0x00012e40 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00012e54 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_tear_resp_en 0x00012e78 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en) + i.drv_dsi_rx_set_up_phy 0x00012e94 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00012f94 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00012fac Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00012fc4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x0001301c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x00013028 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00013048 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00013054 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00013064 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00013074 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00013098 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x000130a4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x000130b0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x000130bc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x000130d8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x000130f8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00013108 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x00013170 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x000131b4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00013304 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x00013324 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00013330 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x00013354 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x00013370 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x00013384 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x000133c4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x000133dc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x000133f0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00013414 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x00013420 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x0001344c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_efuse_enter_inactive 0x00013534 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x0001356a Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x00013576 Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x000135b0 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_handle_int 0x000135c8 Section 0 drv_gpio.o(i.drv_gpio_handle_int) + drv_gpio_handle_int 0x000135c9 Thumb Code 30 drv_gpio.o(i.drv_gpio_handle_int) + i.drv_gpio_register_ap_reset_callback 0x000135ec Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x000135f8 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x0001360c Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x00013650 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode 0x00013670 Section 0 drv_gpio.o(i.drv_gpio_set_mode) + i.drv_gpio_set_output_data 0x00013684 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00013685 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_lcdc_bcsa_config 0x000136a4 Section 0 drv_lcdc.o(i.drv_lcdc_bcsa_config) + i.drv_lcdc_cfg_int_frame 0x000136cc Section 0 drv_lcdc.o(i.drv_lcdc_cfg_int_frame) + i.drv_lcdc_clear_int 0x000136f8 Section 0 drv_lcdc.o(i.drv_lcdc_clear_int) + drv_lcdc_clear_int 0x000136f9 Thumb Code 20 drv_lcdc.o(i.drv_lcdc_clear_int) + i.drv_lcdc_cmd_start 0x00013710 Section 0 drv_lcdc.o(i.drv_lcdc_cmd_start) + i.drv_lcdc_config_acc_command_mode 0x00013744 Section 0 drv_lcdc.o(i.drv_lcdc_config_acc_command_mode) + i.drv_lcdc_config_int 0x00013758 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00013790 Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite_rgb 0x000137b8 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_src_parameter 0x000137d0 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_crop_hact 0x00013820 Section 0 drv_lcdc.o(i.drv_lcdc_crop_hact) + i.drv_lcdc_ctrl_flow 0x00013830 Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_dith_config 0x00013868 Section 0 drv_lcdc.o(i.drv_lcdc_dith_config) + i.drv_lcdc_edge_dect_config 0x00013898 Section 0 drv_lcdc.o(i.drv_lcdc_edge_dect_config) + i.drv_lcdc_edge_enh_config 0x000138d4 Section 0 drv_lcdc.o(i.drv_lcdc_edge_enh_config) + i.drv_lcdc_enable_shadow_reg 0x00013938 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_endianness_config 0x0001395c Section 0 drv_lcdc.o(i.drv_lcdc_endianness_config) + i.drv_lcdc_fc_config 0x00013978 Section 0 drv_lcdc.o(i.drv_lcdc_fc_config) + i.drv_lcdc_fixed_frame_output 0x00013998 Section 0 drv_lcdc.o(i.drv_lcdc_fixed_frame_output) + i.drv_lcdc_fldc_config 0x000139d0 Section 0 drv_lcdc.o(i.drv_lcdc_fldc_config) + i.drv_lcdc_function_disable 0x000139f4 Section 0 drv_lcdc.o(i.drv_lcdc_function_disable) + i.drv_lcdc_function_enable 0x00013a18 Section 0 drv_lcdc.o(i.drv_lcdc_function_enable) + i.drv_lcdc_set_int 0x00013a3c Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_prefetch 0x00013a78 Section 0 drv_lcdc.o(i.drv_lcdc_set_prefetch) + i.drv_lcdc_set_tear_line 0x00013a94 Section 0 drv_lcdc.o(i.drv_lcdc_set_tear_line) + i.drv_lcdc_stop_display 0x00013ab0 Section 0 drv_lcdc.o(i.drv_lcdc_stop_display) + i.drv_lcdc_vid_hw_start 0x00013ac0 Section 0 drv_lcdc.o(i.drv_lcdc_vid_hw_start) + i.drv_lcdc_vintp_mode_config 0x00013afc Section 0 drv_lcdc.o(i.drv_lcdc_vintp_mode_config) + i.drv_memc_clear_status 0x00013b14 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00013b28 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00013b68 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00013b78 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_get_tear_mode 0x00013b90 Section 0 drv_memc.o(i.drv_memc_get_tear_mode) + i.drv_memc_rate_transfer_sel 0x00013ba0 Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00013bbc Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00013bd0 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_circ_mode_enable 0x00013be8 Section 0 drv_memc.o(i.drv_memc_set_circ_mode_enable) + i.drv_memc_set_data_mode 0x00013c04 Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00013c18 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_frame_drop_select 0x00013c30 Section 0 drv_memc.o(i.drv_memc_set_frame_drop_select) + i.drv_memc_set_fs_en_conditions 0x00013c4c Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_lcdc_st_conditions 0x00013c64 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00013c80 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_ltpo_pu_thres 0x00013ca0 Section 0 drv_memc.o(i.drv_memc_set_ltpo_pu_thres) + i.drv_memc_set_tear_mode 0x00013cb8 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00013ccc Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00013cf8 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_phy_test_clear 0x00013d0c Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00013d1c Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_pwr_efuse_pd 0x00013d34 Section 0 drv_pwr.o(i.drv_pwr_efuse_pd) + i.drv_pwr_enter_deep_sleep_mode 0x00013d64 Section 0 drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) + i.drv_pwr_enter_sleep_mode_ex 0x00013db0 Section 0 drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex) + i.drv_pwr_enter_stop_sleep_mode 0x00013de4 Section 0 drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) + i.drv_pwr_exit_sleep_mode 0x00013e7c Section 0 drv_pwr.o(i.drv_pwr_exit_sleep_mode) + i.drv_pwr_get_power_ready_st 0x00013ea4 Section 0 drv_pwr.o(i.drv_pwr_get_power_ready_st) + i.drv_pwr_set_breath_screen_power_sel 0x00013eb4 Section 0 drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) + i.drv_pwr_set_digit_power_sel 0x00013edc Section 0 drv_pwr.o(i.drv_pwr_set_digit_power_sel) + i.drv_pwr_set_pll_clk 0x00013f04 Section 0 drv_pwr.o(i.drv_pwr_set_pll_clk) + i.drv_pwr_set_wakeup_type 0x00013f38 Section 0 drv_pwr.o(i.drv_pwr_set_wakeup_type) + i.drv_pwr_write_lock 0x00013f64 Section 0 drv_pwr.o(i.drv_pwr_write_lock) + i.drv_rxbr_clear_pkt_buffer 0x00013f84 Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00013f94 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00013fa0 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x00013ffc Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_int_source 0x00014018 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00014019 Thumb Code 20 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_status0 0x00014030 Section 0 hal_internal_dcs.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x00014031 Thumb Code 20 hal_internal_dcs.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x00014048 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv1_cfg 0x0001405c Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00014070 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq1_callback 0x00014080 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x0001408c Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_color_format 0x000140a4 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_filter_regs 0x000140c0 Section 0 drv_rxbr.o(i.drv_rxbr_set_filter_regs) + i.drv_rxbr_set_inten 0x000140e4 Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x00014100 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x00014118 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x00014158 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x00014168 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_se_init 0x00014178 Section 0 drv_se.o(i.drv_se_init) + i.drv_se_set_dsc 0x000141f0 Section 0 drv_se.o(i.drv_se_set_dsc) + i.drv_se_set_lcdc 0x000142c4 Section 0 drv_se.o(i.drv_se_set_lcdc) + i.drv_se_set_memc 0x0001434c Section 0 drv_se.o(i.drv_se_set_memc) + i.drv_se_set_rxbr 0x000143b4 Section 0 drv_se.o(i.drv_se_set_rxbr) + i.drv_se_set_vidc 0x00014484 Section 0 drv_se.o(i.drv_se_set_vidc) + i.drv_se_start_rx 0x00014530 Section 0 drv_se.o(i.drv_se_start_rx) + i.drv_swire_enable 0x00014544 Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_get_pulse_count 0x00014560 Section 0 drv_swire.o(i.drv_swire_get_pulse_count) + i.drv_swire_register_callback 0x0001456c Section 0 drv_swire.o(i.drv_swire_register_callback) + i.drv_swire_set_bit_time 0x00014578 Section 0 drv_swire.o(i.drv_swire_set_bit_time) + i.drv_swire_set_int 0x00014590 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x000145d8 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_swire_set_pulse_count 0x000145f4 Section 0 drv_swire.o(i.drv_swire_set_pulse_count) + i.drv_swire_set_trig_mode 0x00014600 Section 0 drv_swire.o(i.drv_swire_set_trig_mode) + i.drv_sys_cfg_clear_all_int 0x0001461c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00014628 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_trig 0x00014650 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x00014674 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x00014698 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_sel_swire_timer 0x000146bc Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer) + i.drv_sys_cfg_set_int 0x000146d4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x000146f8 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x000146f9 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x00014712 Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x00014734 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_handle_interrupt 0x00014744 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x00014745 Thumb Code 54 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_set_compare_val 0x00014780 Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x000147c0 Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x00014808 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x00014830 Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_enter 0x00014840 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x00014860 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_code 0x00014880 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_uart_abort_recv 0x000148a8 Section 0 drv_uart.o(i.drv_uart_abort_recv) + i.drv_uart_abort_send 0x000148dc Section 0 drv_uart.o(i.drv_uart_abort_send) + i.drv_uart_config_int 0x00014910 Section 0 drv_uart.o(i.drv_uart_config_int) + i.drv_uart_enable_clk 0x00014924 Section 0 drv_uart.o(i.drv_uart_enable_clk) + drv_uart_enable_clk 0x00014925 Thumb Code 24 drv_uart.o(i.drv_uart_enable_clk) + i.drv_uart_enable_int 0x0001493c Section 0 drv_uart.o(i.drv_uart_enable_int) + i.drv_uart_get_instance 0x00014998 Section 0 drv_uart.o(i.drv_uart_get_instance) + i.drv_uart_init 0x000149c0 Section 0 drv_uart.o(i.drv_uart_init) + i.drv_uart_int_trans_handle 0x00014a90 Section 0 drv_uart.o(i.drv_uart_int_trans_handle) + drv_uart_int_trans_handle 0x00014a91 Thumb Code 54 drv_uart.o(i.drv_uart_int_trans_handle) + i.drv_uart_reset_rx_fifo 0x00014acc Section 0 drv_uart.o(i.drv_uart_reset_rx_fifo) + i.drv_uart_reset_tx_fifo 0x00014ae8 Section 0 drv_uart.o(i.drv_uart_reset_tx_fifo) + i.drv_uart_send_blocking 0x00014b04 Section 0 drv_uart.o(i.drv_uart_send_blocking) + i.drv_uart_set_baud_rate 0x00014b1e Section 0 drv_uart.o(i.drv_uart_set_baud_rate) + i.drv_uart_trans_create_handle 0x00014b74 Section 0 drv_uart.o(i.drv_uart_trans_create_handle) + i.drv_vidc_clear_irq 0x00014bc0 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00014bd0 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00014bf0 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_int_source 0x00014c30 Section 0 drv_vidc.o(i.drv_vidc_get_int_source) + i.drv_vidc_get_irq_status 0x00014c5c Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x00014c74 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x00014ca0 Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x00014cac Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_circ_mode_enable 0x00014cb8 Section 0 drv_vidc.o(i.drv_vidc_set_circ_mode_enable) + i.drv_vidc_set_dither_config 0x00014cd4 Section 0 drv_vidc.o(i.drv_vidc_set_dither_config) + i.drv_vidc_set_dst_parameter 0x00014d0c Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_honly_hcoef0 0x00014d68 Section 0 drv_vidc.o(i.drv_vidc_set_honly_hcoef0) + i.drv_vidc_set_honly_hinitb 0x00014d74 Section 0 drv_vidc.o(i.drv_vidc_set_honly_hinitb) + i.drv_vidc_set_honly_hinitr 0x00014da0 Section 0 drv_vidc.o(i.drv_vidc_set_honly_hinitr) + i.drv_vidc_set_irqen 0x00014dd0 Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00014dec Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_pentile_swap 0x00014e00 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x00014e1c Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x00014e28 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x00014e40 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00014e4c Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x00014e58 Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00014e6c Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00014e78 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00014e84 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_vidc_set_vintp_config 0x00014ea4 Section 0 drv_vidc.o(i.drv_vidc_set_vintp_config) + i.fputc 0x00014edc Section 0 tau_log.o(i.fputc) + i.ha_intl_fb_check_pu_size 0x00014f10 Section 0 hal_internal_fb.o(i.ha_intl_fb_check_pu_size) + ha_intl_fb_check_pu_size 0x00014f11 Thumb Code 58 hal_internal_fb.o(i.ha_intl_fb_check_pu_size) + i.hal_dsi_rx_ctrl_create_handle 0x00014f50 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_dcs_async_handler 0x00014f90 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) + i.hal_dsi_rx_ctrl_deinit 0x00014fd0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_get_compressen_en 0x00015064 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x0001506c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x0001508c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00015138 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00015139 Thumb Code 222 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00015238 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00015239 Thumb Code 232 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00015340 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00015341 Thumb Code 294 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x0001546c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x0001546d Thumb Code 314 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x000155b4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x000155b5 Thumb Code 624 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x00015834 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x0001586c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_check_crc 0x0001595c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00015974 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00015975 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_start 0x000159a4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x000159d4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_input_frame_rate 0x00015a04 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) + i.hal_dsi_rx_ctrl_toggle_resolution 0x00015a10 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_cmd_mode_cal_timing 0x00015a30 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) + hal_dsi_tx_cmd_mode_cal_timing 0x00015a31 Thumb Code 510 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) + i.hal_dsi_tx_ctrl_create_handle 0x00015cb0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00015ce8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_gen_a_frame 0x00015d5c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame) + i.hal_dsi_tx_ctrl_gen_a_tear_signal 0x00015d68 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) + i.hal_dsi_tx_ctrl_init 0x00015d8c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00015e08 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00015e09 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00015e18 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_tear_mode 0x00015e20 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) + i.hal_dsi_tx_ctrl_start 0x00015e2c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00015ebc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00015ef4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00015fe8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_cfg 0x000160b8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) + hal_dsi_tx_init_cfg 0x000160b9 Thumb Code 250 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) + i.hal_dsi_tx_init_dpi_timing 0x000161bc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) + hal_dsi_tx_init_dpi_timing 0x000161bd Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) + i.hal_dsi_tx_init_phy_cfg 0x00016200 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00016201 Thumb Code 22 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_timing 0x00016216 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) + hal_dsi_tx_init_timing 0x00016217 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) + i.hal_dsi_tx_init_vid_timing 0x00016268 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) + hal_dsi_tx_init_vid_timing 0x00016269 Thumb Code 70 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) + i.hal_dsi_tx_send_cmd 0x000162bc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x000162bd Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_dsi_tx_timing_info_update 0x000162fc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) + hal_dsi_tx_timing_info_update 0x000162fd Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) + i.hal_dsi_tx_vid_mode_cal_timing 0x00016390 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) + hal_dsi_tx_vid_mode_cal_timing 0x00016391 Thumb Code 766 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) + i.hal_gpio_config_pad 0x000166a0 Section 0 hal_gpio.o(i.hal_gpio_config_pad) + i.hal_gpio_ctrl_eint 0x000166dc Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_init_eint 0x000166f4 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x00016734 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x0001674a Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00016768 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x00016784 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x000167d4 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x00016834 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_internal_sync_get_hight_performan_mode 0x0001683c Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change 0x0001684c Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_sync_register_lcdc_cb 0x00016a00 Section 0 hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) + i.hal_internal_vsync_deinit 0x00016a0c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00016a2c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00016a38 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tx_state 0x00016a4c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00016a58 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00016b40 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_rx_state 0x00016c08 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_tear_mode 0x00016c28 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00016e14 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_internal_vsync_toggle_input_frame_rate 0x00016e6c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) + i.hal_intl_dcs_init_sw_fltr 0x00016ef4 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) + i.hal_intl_dcs_rx_get_dcs_packet_data 0x00016f60 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) + hal_intl_dcs_rx_get_dcs_packet_data 0x00016f61 Thumb Code 782 hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) + i.hal_intl_dcs_rx_receive_packet 0x00017390 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) + hal_intl_dcs_rx_receive_packet 0x00017391 Thumb Code 122 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) + i.hal_intl_dcs_rx_receive_pps 0x00017418 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) + hal_intl_dcs_rx_receive_pps 0x00017419 Thumb Code 266 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) + i.hal_intl_dcs_set_auto_hw_filter 0x0001758c Section 0 hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) + i.hal_intl_dcs_sw_filter_handle 0x00017618 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) + hal_intl_dcs_sw_filter_handle 0x00017619 Thumb Code 36 hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) + i.hal_intl_fb_cal_fb_info 0x00017644 Section 0 hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) + i.hal_intl_fb_check_bandwidth 0x0001795c Section 0 hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) + hal_intl_fb_check_bandwidth 0x0001795d Thumb Code 92 hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) + i.hal_intl_fb_edge_resize 0x000179c0 Section 0 hal_internal_fb.o(i.hal_intl_fb_edge_resize) + hal_intl_fb_edge_resize 0x000179c1 Thumb Code 214 hal_internal_fb.o(i.hal_intl_fb_edge_resize) + i.hal_intl_fb_flow_control_adapter 0x00017a9c Section 0 hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) + hal_intl_fb_flow_control_adapter 0x00017a9d Thumb Code 110 hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) + i.hal_intl_fb_get_memc_flow_mode 0x00017b10 Section 0 hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) + i.hal_intl_fb_get_rx_fb_info 0x00017b1c Section 0 hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) + i.hal_intl_fb_get_tx_fb_info 0x00017b2c Section 0 hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) + i.hal_intl_fb_get_user_flow 0x00017b3c Section 0 hal_internal_fb.o(i.hal_intl_fb_get_user_flow) + i.hal_intl_svs_deinit_rx 0x00017b48 Section 0 hal_internal_svs.o(i.hal_intl_svs_deinit_rx) + i.hal_intl_svs_deinit_tx 0x00017b70 Section 0 hal_internal_svs.o(i.hal_intl_svs_deinit_tx) + i.hal_intl_svs_handle 0x00017b80 Section 0 hal_internal_svs.o(i.hal_intl_svs_handle) + i.hal_intl_svs_init_rx 0x00017ba4 Section 0 hal_internal_svs.o(i.hal_intl_svs_init_rx) + i.hal_intl_svs_init_tx 0x00017c24 Section 0 hal_internal_svs.o(i.hal_intl_svs_init_tx) + i.hal_intl_svs_set_input_frate 0x00017c38 Section 0 hal_internal_svs.o(i.hal_intl_svs_set_input_frate) + i.hal_intl_svs_set_rx_vtt 0x00017ca8 Section 0 hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) + i.hal_intl_svs_update_rxbr_clk 0x00017cb4 Section 0 hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) + i.hal_lcdc_displayproc_config 0x00017cfc Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) + i.hal_lcdc_init_cfg 0x00017d6c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00017d6d Thumb Code 62 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x00017daa Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x00017dab Thumb Code 112 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_postproc_config 0x00017e1c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) + i.hal_lcdc_start 0x00017f44 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_start) + hal_lcdc_start 0x00017f45 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_lcdc_start) + i.hal_lcdc_timinggen_config 0x00017f68 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) + hal_lcdc_timinggen_config 0x00017f69 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) + i.hal_lcdc_upscaler_config 0x00017fa4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) + i.hal_nonshadow_func_update 0x00018084 Section 0 hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) + i.hal_pwr_enter_deep_sleep_mode 0x00018140 Section 0 hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) + i.hal_pwr_enter_normal_sleep_mode 0x0001816a Section 0 hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) + i.hal_pwr_enter_stop_sleep_mode 0x00018174 Section 0 hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) + i.hal_pwr_exit_sleep_mode 0x000181d8 Section 0 hal_pwr.o(i.hal_pwr_exit_sleep_mode) + i.hal_pwr_get_vcc_power_ready 0x000181e2 Section 0 hal_pwr.o(i.hal_pwr_get_vcc_power_ready) + i.hal_pwr_set_main_power 0x000181ea Section 0 hal_pwr.o(i.hal_pwr_set_main_power) + i.hal_pwr_set_sleep_mode_power 0x000181f2 Section 0 hal_pwr.o(i.hal_pwr_set_sleep_mode_power) + i.hal_pwr_set_stop_sleep_wakeup_pin 0x000181fc Section 0 hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) + i.hal_swire_deinit 0x00018260 Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_enable 0x000182a0 Section 0 hal_swire.o(i.hal_swire_enable) + i.hal_swire_init 0x000182fc Section 0 hal_swire.o(i.hal_swire_init) + i.hal_swire_set_pulse 0x00018354 Section 0 hal_swire.o(i.hal_swire_set_pulse) + i.hal_swire_set_timer 0x00018378 Section 0 hal_swire.o(i.hal_swire_set_timer) + i.hal_system_init 0x000183b8 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_updata_sysclk 0x0001849c Section 0 hal_system.o(i.hal_system_updata_sysclk) + i.hal_timer_deinit 0x000184ec Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x0001851c Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_set_repeat 0x00018538 Section 0 hal_timer.o(i.hal_timer_set_repeat) + i.hal_tx_frame_rate_adjust 0x00018540 Section 0 hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) + hal_tx_frame_rate_adjust 0x00018541 Thumb Code 44 hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) + i.hal_uart_init 0x00018570 Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_send_blocking 0x00018604 Section 0 hal_uart.o(i.hal_uart_send_blocking) + i.hal_vsync_func_update 0x00018620 Section 0 hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) + i.hal_vsync_reset_lcdc_scaler 0x00018638 Section 0 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + i.main 0x00018718 Section 0 main.o(i.main) + i.pps_update_handle 0x00018750 Section 0 rm_note11pro_demo.o(i.pps_update_handle) + pps_update_handle 0x00018751 Thumb Code 88 rm_note11pro_demo.o(i.pps_update_handle) + i.rxbr_irq1_callback 0x000187f4 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x000187f5 Thumb Code 496 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_double_buffer_update 0x00018ae8 Section 0 hal_internal_vsync.o(i.soft_double_buffer_update) + soft_double_buffer_update 0x00018ae9 Thumb Code 56 hal_internal_vsync.o(i.soft_double_buffer_update) + i.soft_gen_te 0x00018b2c Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x00018b2d Thumb Code 86 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x00018b98 Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x00018b99 Thumb Code 202 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_pro_motion_init 0x00018c78 Section 0 hal_internal_vsync.o(i.soft_pro_motion_init) + soft_pro_motion_init 0x00018c79 Thumb Code 46 hal_internal_vsync.o(i.soft_pro_motion_init) + i.soft_tear_adjust_line 0x00018cb0 Section 0 hal_internal_vsync.o(i.soft_tear_adjust_line) + soft_tear_adjust_line 0x00018cb1 Thumb Code 26 hal_internal_vsync.o(i.soft_tear_adjust_line) + i.stop_sleep_cb 0x00018cd4 Section 0 hal_pwr.o(i.stop_sleep_cb) + stop_sleep_cb 0x00018cd5 Thumb Code 18 hal_pwr.o(i.stop_sleep_cb) + i.svs_direct_mode_setting 0x00018cec Section 0 hal_internal_svs.o(i.svs_direct_mode_setting) + svs_direct_mode_setting 0x00018ced Thumb Code 154 hal_internal_svs.o(i.svs_direct_mode_setting) + i.svs_get_rel_intv 0x00018d98 Section 0 hal_internal_svs.o(i.svs_get_rel_intv) + svs_get_rel_intv 0x00018d99 Thumb Code 20 hal_internal_svs.o(i.svs_get_rel_intv) + i.svs_sync_handle 0x00018db4 Section 0 hal_internal_svs.o(i.svs_sync_handle) + svs_sync_handle 0x00018db5 Thumb Code 158 hal_internal_svs.o(i.svs_sync_handle) + i.svs_wait_fr_stab 0x00018e64 Section 0 hal_internal_svs.o(i.svs_wait_fr_stab) + svs_wait_fr_stab 0x00018e65 Thumb Code 148 hal_internal_svs.o(i.svs_wait_fr_stab) + i.svs_wait_start 0x00018f30 Section 0 hal_internal_svs.o(i.svs_wait_start) + svs_wait_start 0x00018f31 Thumb Code 250 hal_internal_svs.o(i.svs_wait_start) + i.tau_log_init 0x0001903c Section 0 tau_log.o(i.tau_log_init) + i.tau_log_printf 0x00019070 Section 0 tau_log.o(i.tau_log_printf) + i.tau_log_push_log 0x000190f4 Section 0 tau_log.o(i.tau_log_push_log) + i.vidc_callback 0x0001916c Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001916d Thumb Code 150 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x00019220 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x00019221 Thumb Code 254 hal_internal_vsync.o(i.vpre_err_reset) + .constdata 0x00019338 Section 4804 rm_note11pro_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x00019338 Data 96 rm_note11pro_demo.o(.constdata) + .constdata 0x0001a5fc Section 40 hal_dsi_rx_ctrl.o(.constdata) + .constdata 0x0001a624 Section 28 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001a640 Section 182 hal_gpio.o(.constdata) + s_gpio_map 0x0001a640 Data 104 hal_gpio.o(.constdata) + s_gpio_perf 0x0001a6a8 Data 78 hal_gpio.o(.constdata) + .constdata 0x0001a6f8 Section 48 hal_uart.o(.constdata) + .constdata 0x0001a728 Section 16 drv_uart.o(.constdata) + .conststring 0x0001a738 Section 67 rm_note11pro_demo.o(.conststring) + .conststring 0x0001a77c Section 66 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001a7c0 Section 144 hal_internal_vsync.o(.conststring) + .conststring 0x0001a850 Section 70 hal_internal_dcs.o(.conststring) + .data 0x00070000 Section 144 rm_note11pro_demo.o(.data) + panel_display_done 0x00070000 Data 1 rm_note11pro_demo.o(.data) + sg_system_resume 0x00070001 Data 1 rm_note11pro_demo.o(.data) + sg_system_suspend 0x00070002 Data 1 rm_note11pro_demo.o(.data) + AOD_ON 0x00070003 Data 1 rm_note11pro_demo.o(.data) + display_on_flag 0x00070005 Data 1 rm_note11pro_demo.o(.data) + g_rx_ctrl_handle 0x00070008 Data 4 rm_note11pro_demo.o(.data) + g_tx_ctrl_handle 0x0007000c Data 4 rm_note11pro_demo.o(.data) + .data 0x00070090 Section 48 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00070090 Data 1 hal_dsi_rx_ctrl.o(.data) + g_crc_check_enable 0x00070091 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00070094 Data 4 hal_dsi_rx_ctrl.o(.data) + g_before_draw_col 0x00070098 Data 4 hal_dsi_rx_ctrl.o(.data) + g_before_draw_page 0x0007009c Data 4 hal_dsi_rx_ctrl.o(.data) + pre_step 0x000700a0 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_cmd_filter 0x000700a4 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_x 0x000700a8 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_y 0x000700ac Data 4 hal_dsi_rx_ctrl.o(.data) + pre_value 0x000700b0 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_x 0x000700b4 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_y 0x000700b8 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_value 0x000700bc Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x000700c0 Section 92 hal_dsi_tx_ctrl.o(.data) + sg_bta_vsync_flag 0x000700c0 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_vsync_flag 0x000700c1 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_enter_sleep_cmd 0x000700c2 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_fldc_cg_mode 0x000700c3 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_scl_fir 0x000700c4 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_honly_bypass_fir 0x000700c5 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_bcs 0x000700c6 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_enhc 0x000700c7 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_edge_dect 0x000700c8 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_edge_enh 0x000700c9 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_dith 0x000700ca Data 1 hal_dsi_tx_ctrl.o(.data) + sg_dith_judge 0x000700cb Data 1 hal_dsi_tx_ctrl.o(.data) + sg_endianness 0x000700cc Data 1 hal_dsi_tx_ctrl.o(.data) + sg_test_pattern_en 0x000700cd Data 1 hal_dsi_tx_ctrl.o(.data) + sg_dith_judge_thr 0x000700d0 Data 4 hal_dsi_tx_ctrl.o(.data) + sg_ccm_para 0x000700d4 Data 36 hal_dsi_tx_ctrl.o(.data) + sg_honly_para 0x000700f8 Data 36 hal_dsi_tx_ctrl.o(.data) + .data 0x0007011c Section 2 hal_swire.o(.data) + sg_swire_timer 0x0007011c Data 1 hal_swire.o(.data) + sg_swire_repeat 0x0007011d Data 1 hal_swire.o(.data) + .data 0x00070120 Section 8 hal_pwr.o(.data) + sg_wake_up_io 0x00070120 Data 1 hal_pwr.o(.data) + sg_stop_sleep_wakeup_int 0x00070124 Data 4 hal_pwr.o(.data) + .data 0x00070128 Section 1 tau_log.o(.data) + g_log_port 0x00070128 Data 1 tau_log.o(.data) + .data 0x0007012c Section 24 hal_uart.o(.data) + sg_dma_callback 0x0007013c Data 4 hal_uart.o(.data) + sg_user_data 0x00070140 Data 4 hal_uart.o(.data) + .data 0x00070144 Section 16 hal_internal_vsync.o(.data) + s_te_refine_mode 0x00070144 Data 1 hal_internal_vsync.o(.data) + .data 0x00070154 Section 36 hal_internal_dcs.o(.data) + g_imm_packet 0x00070154 Data 24 hal_internal_dcs.o(.data) + g_cus_rx_write_cmd_handle 0x0007016c Data 12 hal_internal_dcs.o(.data) + .data 0x00070178 Section 12 drv_common.o(.data) + s_my_tick 0x00070178 Data 4 drv_common.o(.data) + .data 0x00070184 Section 1 drv_common.o(.data) + .data 0x00070188 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x00070188 Data 4 drv_gpio.o(.data) + .data 0x0007018c Section 4 drv_swire.o(.data) + sg_drv_swire_cb 0x0007018c Data 4 drv_swire.o(.data) + .data 0x00070190 Section 80 drv_timer.o(.data) + sg_timer_info 0x00070190 Data 80 drv_timer.o(.data) + .data 0x000701e0 Section 4 drv_se.o(.data) + chip_info 0x000701e0 Data 4 drv_se.o(.data) + .data 0x000701e4 Section 1 drv_dsi_rx.o(.data) + sg_rx_drv_level 0x000701e4 Data 1 drv_dsi_rx.o(.data) + .data 0x000701e8 Section 8 drv_rxbr.o(.data) + .data 0x000701f0 Section 4 drv_vidc.o(.data) + .data 0x000701f4 Section 400 drv_dma.o(.data) + sg_dma_handle 0x000701f4 Data 256 drv_dma.o(.data) + .data 0x00070384 Section 4 stdout.o(.data) + .bss 0x00070388 Section 208 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x00070388 Data 208 hal_dsi_rx_ctrl.o(.bss) + .bss 0x00070458 Section 184 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x00070458 Data 92 hal_dsi_tx_ctrl.o(.bss) + sg_dsi_tx_param 0x000704b4 Data 92 hal_dsi_tx_ctrl.o(.bss) + .bss 0x00070510 Section 256 tau_log.o(.bss) + g_log_buf 0x00070510 Data 256 tau_log.o(.bss) + .bss 0x00070610 Section 68 hal_internal_vsync.o(.bss) + .bss 0x00070654 Section 2048 hal_internal_dcs.o(.bss) + .bss 0x00070e54 Section 255 hal_internal_dcs.o(.bss) + g_imm_buffer 0x00070e54 Data 255 hal_internal_dcs.o(.bss) + .bss 0x00070f54 Section 68 hal_internal_fb.o(.bss) + .bss 0x00070f98 Section 68 hal_internal_svs.o(.bss) + sg_sys_handler 0x00070f98 Data 68 hal_internal_svs.o(.bss) + .bss 0x00070fdc Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00070fdc Data 64 drv_gpio.o(.bss) + .bss 0x0007101c Section 4204 dcs_packet_fifo.o(.bss) + .bss 0x00072088 Section 16 drv_dma.o(.bss) + sg_dma_int_list 0x00072088 Data 16 drv_dma.o(.bss) + .bss 0x00072098 Section 96 drv_uart.o(.bss) + sg_uart_userdata 0x00072098 Data 96 drv_uart.o(.bss) + STACK 0x000720f8 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + FLSCTRL_IRQn_Handler 0x00010107 Thumb Code 2 startup_armcm0.o(.text) + WDG_IRQn_Handler 0x00010113 Thumb Code 2 startup_armcm0.o(.text) + I2C0_IRQn_Handler 0x00010117 Thumb Code 2 startup_armcm0.o(.text) + I2C1_IRQn_Handler 0x00010119 Thumb Code 2 startup_armcm0.o(.text) + SPIS_IRQn_Handler 0x0001011b Thumb Code 2 startup_armcm0.o(.text) + SPIM_IRQn_Handler 0x0001011d Thumb Code 2 startup_armcm0.o(.text) + I2C2_IRQn_Handler 0x00010121 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + strlen 0x000101e9 Thumb Code 14 strlen.o(.text) + memcmp 0x000101f7 Thumb Code 26 memcmp.o(.text) + __aeabi_fadd 0x00010211 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x000102b3 Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x000102bb Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x000102c3 Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x0001033d Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x000103b9 Thumb Code 24 fscalb.o(.text) + scalbnf 0x000103b9 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103d1 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x00010519 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x00010525 Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x00010535 Thumb Code 202 dmul.o(.text) + __aeabi_ui2f 0x00010605 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x00010615 Thumb Code 24 dfltui.o(.text) + __aeabi_f2uiz 0x00010631 Thumb Code 40 ffixui.o(.text) + __aeabi_d2uiz 0x00010659 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x00010695 Thumb Code 40 f2d.o(.text) + __aeabi_d2f 0x000106bd Thumb Code 56 d2f.o(.text) + __aeabi_cfcmpeq 0x000106f5 Thumb Code 0 cfcmple.o(.text) + __aeabi_cfcmple 0x000106f5 Thumb Code 20 cfcmple.o(.text) + __aeabi_cfrcmple 0x00010709 Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x0001071d Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x0001077d Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x0001077d Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x0001079d Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x0001079d Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000107bf Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000107bf Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x000107e5 Thumb Code 0 iusefp.o(.text) + _float_round 0x000107e5 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x000107f5 Thumb Code 114 fepilogue.o(.text) + _double_round 0x00010867 Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x00010881 Thumb Code 164 depilogue.o(.text) + __aeabi_ddiv 0x00010925 Thumb Code 234 ddiv.o(.text) + __aeabi_d2ulz 0x00010a15 Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010a55 Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010a7d Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010a7d Thumb Code 0 init.o(.text) + __decompress 0x00010aa1 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010aa1 Thumb Code 86 __dczerorl2.o(.text) + AP_NRESET_IRQn_Handler 0x00010af9 Thumb Code 22 drv_gpio.o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010b15 Thumb Code 78 drv_dma.o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010b71 Thumb Code 10 drv_gpio.o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010b7b Thumb Code 10 drv_gpio.o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010b85 Thumb Code 10 drv_gpio.o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010b8f Thumb Code 10 drv_gpio.o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010b99 Thumb Code 10 drv_gpio.o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010ba3 Thumb Code 10 drv_gpio.o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010bad Thumb Code 10 drv_gpio.o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010bb7 Thumb Code 10 drv_gpio.o(i.EXTI_INT7_IRQn_Handler) + HardFault_Handler 0x00010bc1 Thumb Code 14 drv_common.o(i.HardFault_Handler) + LCDC_IRQn_Handler 0x00010c09 Thumb Code 118 hal_internal_vsync.o(i.LCDC_IRQn_Handler) + MEMC_IRQn_Handler 0x00010d09 Thumb Code 154 drv_memc.o(i.MEMC_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010da5 Thumb Code 70 drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) + Note11Pro_demo 0x00010e5d Thumb Code 72 rm_note11pro_demo.o(i.Note11Pro_demo) + SWIRE_IRQn_Handler 0x00010ed5 Thumb Code 38 drv_swire.o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00010f05 Thumb Code 20 drv_common.o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00010f1d Thumb Code 10 drv_timer.o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x00010f27 Thumb Code 10 drv_timer.o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00010f31 Thumb Code 10 drv_timer.o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x00010f3b Thumb Code 10 drv_timer.o(i.TIMER3_IRQn_Handler) + VIDC_IRQn_Handler 0x00010f45 Thumb Code 22 drv_vidc.o(i.VIDC_IRQn_Handler) + VPRE1_IRQn_Handler 0x00010f61 Thumb Code 22 drv_rxbr.o(i.VPRE1_IRQn_Handler) + VPRE_IRQn_Handler 0x00010f7d Thumb Code 104 hal_internal_dcs.o(i.VPRE_IRQn_Handler) + s_RAM_CK 0x00011000 Data 28 drv_common.o(.ARM.__at_0x11000) + g_tau_log 0x0001101c Data 16 tau_log.o(.ARM.__at_0x1101C) + sg_pq_para 0x0001102c Data 22 hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) + MIPI_RX_IRQn_Handler 0x00011045 Thumb Code 354 drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) + UART_IRQn_Handler 0x000113a9 Thumb Code 364 drv_uart.o(i.UART_IRQn_Handler) + __0printf 0x00011529 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + printf 0x00011529 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x00011549 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x00011549 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x0001156d Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x0001159b Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_copy 0x000115d5 Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_null 0x000115e3 Thumb Code 2 handlers.o(i.__scatterload_null) + __scatterload_zeroinit 0x000115e5 Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + app_display_init 0x00012295 Thumb Code 42 rm_note11pro_demo.o(i.app_display_init) + app_gpio_init 0x000122c1 Thumb Code 26 rm_note11pro_demo.o(i.app_gpio_init) + board_Init 0x00012615 Thumb Code 20 board.o(i.board_Init) + ceil 0x0001262d Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x000127a9 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x00012801 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x00012819 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x0001285d Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x00012881 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x00012899 Thumb Code 40 tau_delay.o(i.delayUs) + drv_common_system_init 0x000128c5 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_enable_clock 0x000128cd Thumb Code 54 drv_crgu.o(i.drv_crgu_enable_clock) + drv_crgu_get_rxbr_clk 0x00012909 Thumb Code 70 drv_crgu.o(i.drv_crgu_get_rxbr_clk) + drv_crgu_reset_modules 0x00012971 Thumb Code 10 drv_crgu.o(i.drv_crgu_reset_modules) + drv_crgu_set_ahb_clk 0x00012981 Thumb Code 34 drv_crgu.o(i.drv_crgu_set_ahb_clk) + drv_crgu_set_clock_div 0x000129a9 Thumb Code 12 drv_crgu.o(i.drv_crgu_set_clock_div) + drv_crgu_set_dpi_clk 0x000129b9 Thumb Code 54 drv_crgu.o(i.drv_crgu_set_dpi_clk) + drv_crgu_set_dsc_clk 0x000129f5 Thumb Code 52 drv_crgu.o(i.drv_crgu_set_dsc_clk) + drv_crgu_set_fb_clk 0x00012a2d Thumb Code 34 drv_crgu.o(i.drv_crgu_set_fb_clk) + drv_crgu_set_lcdc_clk 0x00012a55 Thumb Code 36 drv_crgu.o(i.drv_crgu_set_lcdc_clk) + drv_crgu_set_reset 0x00012a7d Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_clk 0x00012a95 Thumb Code 34 drv_crgu.o(i.drv_crgu_set_rxbr_clk) + drv_crgu_set_vidc_clk 0x00012abd Thumb Code 36 drv_crgu.o(i.drv_crgu_set_vidc_clk) + drv_dma_clear_status 0x00012ae5 Thumb Code 20 drv_dma.o(i.drv_dma_clear_status) + drv_dsc_dec_disable 0x00012b11 Thumb Code 20 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00012b2d Thumb Code 44 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00012b65 Thumb Code 22 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_irqen 0x00012b85 Thumb Code 24 drv_dsc_dec.o(i.drv_dsc_dec_set_irqen) + drv_dsi_rx_calc_ipi_tx_delay 0x00012ba1 Thumb Code 252 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00012cad Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00012d59 Thumb Code 10 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_ddi_crc_en 0x00012d69 Thumb Code 10 drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en) + drv_dsi_rx_get_max_ret_size 0x00012d79 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00012d85 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_check_crc 0x00012d9d Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) + drv_dsi_rx_set_ctrl_cfg 0x00012db9 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00012ddd Thumb Code 10 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_ddi_crc_en 0x00012ded Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en) + drv_dsi_rx_set_inten 0x00012e09 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00012e15 Thumb Code 12 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_ipi_ycbcr_frmt 0x00012e25 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt) + drv_dsi_rx_set_lane_swap 0x00012e41 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00012e55 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_tear_resp_en 0x00012e79 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en) + drv_dsi_rx_set_up_phy 0x00012e95 Thumb Code 224 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00012f95 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00012fad Thumb Code 18 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00012fc5 Thumb Code 82 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x0001301d Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x00013029 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00013049 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00013055 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00013065 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00013075 Thumb Code 32 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00013099 Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x000130a5 Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x000130b1 Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x000130bd Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x000130d9 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x000130f9 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00013109 Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x00013171 Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x000131b5 Thumb Code 314 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00013305 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x00013325 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00013331 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x00013355 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x00013371 Thumb Code 14 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x00013385 Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x000133c5 Thumb Code 18 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x000133dd Thumb Code 14 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x000133f1 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00013415 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x00013421 Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x0001344d Thumb Code 226 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_efuse_enter_inactive 0x00013535 Thumb Code 54 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x0001356b Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x00013577 Thumb Code 58 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x000135b1 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_register_ap_reset_callback 0x000135ed Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x000135f9 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x0001360d Thumb Code 62 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x00013651 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode 0x00013671 Thumb Code 16 drv_gpio.o(i.drv_gpio_set_mode) + drv_lcdc_bcsa_config 0x000136a5 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_bcsa_config) + drv_lcdc_cfg_int_frame 0x000136cd Thumb Code 34 drv_lcdc.o(i.drv_lcdc_cfg_int_frame) + drv_lcdc_cmd_start 0x00013711 Thumb Code 46 drv_lcdc.o(i.drv_lcdc_cmd_start) + drv_lcdc_config_acc_command_mode 0x00013745 Thumb Code 14 drv_lcdc.o(i.drv_lcdc_config_acc_command_mode) + drv_lcdc_config_int 0x00013759 Thumb Code 50 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00013791 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite_rgb 0x000137b9 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_src_parameter 0x000137d1 Thumb Code 72 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_crop_hact 0x00013821 Thumb Code 10 drv_lcdc.o(i.drv_lcdc_crop_hact) + drv_lcdc_ctrl_flow 0x00013831 Thumb Code 50 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_dith_config 0x00013869 Thumb Code 40 drv_lcdc.o(i.drv_lcdc_dith_config) + drv_lcdc_edge_dect_config 0x00013899 Thumb Code 50 drv_lcdc.o(i.drv_lcdc_edge_dect_config) + drv_lcdc_edge_enh_config 0x000138d5 Thumb Code 86 drv_lcdc.o(i.drv_lcdc_edge_enh_config) + drv_lcdc_enable_shadow_reg 0x00013939 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_endianness_config 0x0001395d Thumb Code 24 drv_lcdc.o(i.drv_lcdc_endianness_config) + drv_lcdc_fc_config 0x00013979 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_fc_config) + drv_lcdc_fixed_frame_output 0x00013999 Thumb Code 42 drv_lcdc.o(i.drv_lcdc_fixed_frame_output) + drv_lcdc_fldc_config 0x000139d1 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_fldc_config) + drv_lcdc_function_disable 0x000139f5 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_function_disable) + drv_lcdc_function_enable 0x00013a19 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_function_enable) + drv_lcdc_set_int 0x00013a3d Thumb Code 54 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_prefetch 0x00013a79 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_prefetch) + drv_lcdc_set_tear_line 0x00013a95 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_tear_line) + drv_lcdc_stop_display 0x00013ab1 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_stop_display) + drv_lcdc_vid_hw_start 0x00013ac1 Thumb Code 56 drv_lcdc.o(i.drv_lcdc_vid_hw_start) + drv_lcdc_vintp_mode_config 0x00013afd Thumb Code 18 drv_lcdc.o(i.drv_lcdc_vintp_mode_config) + drv_memc_clear_status 0x00013b15 Thumb Code 14 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00013b29 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00013b69 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00013b79 Thumb Code 20 drv_memc.o(i.drv_memc_get_status) + drv_memc_get_tear_mode 0x00013b91 Thumb Code 10 drv_memc.o(i.drv_memc_get_tear_mode) + drv_memc_rate_transfer_sel 0x00013ba1 Thumb Code 22 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00013bbd Thumb Code 16 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00013bd1 Thumb Code 16 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_circ_mode_enable 0x00013be9 Thumb Code 24 drv_memc.o(i.drv_memc_set_circ_mode_enable) + drv_memc_set_data_mode 0x00013c05 Thumb Code 14 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00013c19 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_frame_drop_select 0x00013c31 Thumb Code 24 drv_memc.o(i.drv_memc_set_frame_drop_select) + drv_memc_set_fs_en_conditions 0x00013c4d Thumb Code 18 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_lcdc_st_conditions 0x00013c65 Thumb Code 20 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00013c81 Thumb Code 28 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_ltpo_pu_thres 0x00013ca1 Thumb Code 18 drv_memc.o(i.drv_memc_set_ltpo_pu_thres) + drv_memc_set_tear_mode 0x00013cb9 Thumb Code 16 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00013ccd Thumb Code 36 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00013cf9 Thumb Code 16 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_phy_test_clear 0x00013d0d Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00013d1d Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_pwr_efuse_pd 0x00013d35 Thumb Code 36 drv_pwr.o(i.drv_pwr_efuse_pd) + drv_pwr_enter_deep_sleep_mode 0x00013d65 Thumb Code 60 drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) + drv_pwr_enter_sleep_mode_ex 0x00013db1 Thumb Code 34 drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex) + drv_pwr_enter_stop_sleep_mode 0x00013de5 Thumb Code 132 drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) + drv_pwr_exit_sleep_mode 0x00013e7d Thumb Code 32 drv_pwr.o(i.drv_pwr_exit_sleep_mode) + drv_pwr_get_power_ready_st 0x00013ea5 Thumb Code 10 drv_pwr.o(i.drv_pwr_get_power_ready_st) + drv_pwr_set_breath_screen_power_sel 0x00013eb5 Thumb Code 34 drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) + drv_pwr_set_digit_power_sel 0x00013edd Thumb Code 34 drv_pwr.o(i.drv_pwr_set_digit_power_sel) + drv_pwr_set_pll_clk 0x00013f05 Thumb Code 30 drv_pwr.o(i.drv_pwr_set_pll_clk) + drv_pwr_set_wakeup_type 0x00013f39 Thumb Code 40 drv_pwr.o(i.drv_pwr_set_wakeup_type) + drv_pwr_write_lock 0x00013f65 Thumb Code 18 drv_pwr.o(i.drv_pwr_write_lock) + drv_rxbr_clear_pkt_buffer 0x00013f85 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00013f95 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00013fa1 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x00013ffd Thumb Code 18 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_hline_rcv0_cfg 0x00014049 Thumb Code 14 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv1_cfg 0x0001405d Thumb Code 14 drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) + drv_rxbr_hline_rcv_cfg 0x00014071 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq1_callback 0x00014081 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x0001408d Thumb Code 18 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_color_format 0x000140a5 Thumb Code 24 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_filter_regs 0x000140c1 Thumb Code 32 drv_rxbr.o(i.drv_rxbr_set_filter_regs) + drv_rxbr_set_inten 0x000140e5 Thumb Code 22 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x00014101 Thumb Code 18 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x00014119 Thumb Code 56 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x00014159 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x00014169 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_se_init 0x00014179 Thumb Code 106 drv_se.o(i.drv_se_init) + drv_se_set_dsc 0x000141f1 Thumb Code 162 drv_se.o(i.drv_se_set_dsc) + drv_se_set_lcdc 0x000142c5 Thumb Code 88 drv_se.o(i.drv_se_set_lcdc) + drv_se_set_memc 0x0001434d Thumb Code 54 drv_se.o(i.drv_se_set_memc) + drv_se_set_rxbr 0x000143b5 Thumb Code 158 drv_se.o(i.drv_se_set_rxbr) + drv_se_set_vidc 0x00014485 Thumb Code 122 drv_se.o(i.drv_se_set_vidc) + drv_se_start_rx 0x00014531 Thumb Code 16 drv_se.o(i.drv_se_start_rx) + drv_swire_enable 0x00014545 Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_get_pulse_count 0x00014561 Thumb Code 6 drv_swire.o(i.drv_swire_get_pulse_count) + drv_swire_register_callback 0x0001456d Thumb Code 6 drv_swire.o(i.drv_swire_register_callback) + drv_swire_set_bit_time 0x00014579 Thumb Code 18 drv_swire.o(i.drv_swire_set_bit_time) + drv_swire_set_int 0x00014591 Thumb Code 64 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x000145d9 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_swire_set_pulse_count 0x000145f5 Thumb Code 6 drv_swire.o(i.drv_swire_set_pulse_count) + drv_swire_set_trig_mode 0x00014601 Thumb Code 24 drv_swire.o(i.drv_swire_set_trig_mode) + drv_sys_cfg_clear_all_int 0x0001461d Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00014629 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_trig 0x00014651 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x00014675 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x00014699 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_sel_swire_timer 0x000146bd Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer) + drv_sys_cfg_set_int 0x000146d5 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x00014713 Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x00014735 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_set_compare_val 0x00014781 Thumb Code 50 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x000147c1 Thumb Code 68 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x00014809 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x00014831 Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x00014841 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x00014861 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_tx_phy_test_write_code 0x00014881 Thumb Code 34 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_uart_abort_recv 0x000148a9 Thumb Code 46 drv_uart.o(i.drv_uart_abort_recv) + drv_uart_abort_send 0x000148dd Thumb Code 46 drv_uart.o(i.drv_uart_abort_send) + drv_uart_config_int 0x00014911 Thumb Code 20 drv_uart.o(i.drv_uart_config_int) + drv_uart_enable_int 0x0001493d Thumb Code 84 drv_uart.o(i.drv_uart_enable_int) + drv_uart_get_instance 0x00014999 Thumb Code 36 drv_uart.o(i.drv_uart_get_instance) + drv_uart_init 0x000149c1 Thumb Code 206 drv_uart.o(i.drv_uart_init) + drv_uart_reset_rx_fifo 0x00014acd Thumb Code 28 drv_uart.o(i.drv_uart_reset_rx_fifo) + drv_uart_reset_tx_fifo 0x00014ae9 Thumb Code 28 drv_uart.o(i.drv_uart_reset_tx_fifo) + drv_uart_send_blocking 0x00014b05 Thumb Code 26 drv_uart.o(i.drv_uart_send_blocking) + drv_uart_set_baud_rate 0x00014b1f Thumb Code 84 drv_uart.o(i.drv_uart_set_baud_rate) + drv_uart_trans_create_handle 0x00014b75 Thumb Code 72 drv_uart.o(i.drv_uart_trans_create_handle) + drv_vidc_clear_irq 0x00014bc1 Thumb Code 10 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00014bd1 Thumb Code 26 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00014bf1 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_int_source 0x00014c31 Thumb Code 40 drv_vidc.o(i.drv_vidc_get_int_source) + drv_vidc_get_irq_status 0x00014c5d Thumb Code 20 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x00014c75 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x00014ca1 Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x00014cad Thumb Code 8 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_circ_mode_enable 0x00014cb9 Thumb Code 24 drv_vidc.o(i.drv_vidc_set_circ_mode_enable) + drv_vidc_set_dither_config 0x00014cd5 Thumb Code 50 drv_vidc.o(i.drv_vidc_set_dither_config) + drv_vidc_set_dst_parameter 0x00014d0d Thumb Code 86 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_honly_hcoef0 0x00014d69 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_honly_hcoef0) + drv_vidc_set_honly_hinitb 0x00014d75 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_honly_hinitb) + drv_vidc_set_honly_hinitr 0x00014da1 Thumb Code 42 drv_vidc.o(i.drv_vidc_set_honly_hinitr) + drv_vidc_set_irqen 0x00014dd1 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00014ded Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_pentile_swap 0x00014e01 Thumb Code 20 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x00014e1d Thumb Code 6 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x00014e29 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x00014e41 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00014e4d Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x00014e59 Thumb Code 14 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00014e6d Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00014e79 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00014e85 Thumb Code 28 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_vidc_set_vintp_config 0x00014ea5 Thumb Code 52 drv_vidc.o(i.drv_vidc_set_vintp_config) + fputc 0x00014edd Thumb Code 42 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00014f51 Thumb Code 60 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_dcs_async_handler 0x00014f91 Thumb Code 60 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) + hal_dsi_rx_ctrl_deinit 0x00014fd1 Thumb Code 132 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_get_compressen_en 0x00015065 Thumb Code 8 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) + hal_dsi_rx_ctrl_get_max_ret_size 0x0001506d Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x0001508d Thumb Code 158 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x00015835 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_send_ack_cmd 0x0001586d Thumb Code 210 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_check_crc 0x0001595d Thumb Code 20 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) + hal_dsi_rx_ctrl_start 0x000159a5 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x000159d5 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_input_frame_rate 0x00015a05 Thumb Code 10 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) + hal_dsi_rx_ctrl_toggle_resolution 0x00015a11 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x00015cb1 Thumb Code 48 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00015ce9 Thumb Code 102 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_gen_a_frame 0x00015d5d Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame) + hal_dsi_tx_ctrl_gen_a_tear_signal 0x00015d69 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) + hal_dsi_tx_ctrl_init 0x00015d8d Thumb Code 110 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00015e19 Thumb Code 8 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_tear_mode 0x00015e21 Thumb Code 10 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) + hal_dsi_tx_ctrl_start 0x00015e2d Thumb Code 134 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00015ebd Thumb Code 52 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00015ef5 Thumb Code 238 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00015fe9 Thumb Code 202 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_config_pad 0x000166a1 Thumb Code 58 hal_gpio.o(i.hal_gpio_config_pad) + hal_gpio_ctrl_eint 0x000166dd Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_init_eint 0x000166f5 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x00016735 Thumb Code 22 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x0001674b Thumb Code 28 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00016769 Thumb Code 22 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x00016785 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x000167d5 Thumb Code 92 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x00016835 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_internal_sync_get_hight_performan_mode 0x0001683d Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change 0x0001684d Thumb Code 336 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_sync_register_lcdc_cb 0x00016a01 Thumb Code 8 hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) + hal_internal_vsync_deinit 0x00016a0d Thumb Code 22 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00016a2d Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00016a39 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tx_state 0x00016a4d Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00016a59 Thumb Code 206 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00016b41 Thumb Code 194 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_rx_state 0x00016c09 Thumb Code 28 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_tear_mode 0x00016c29 Thumb Code 424 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00016e15 Thumb Code 78 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_internal_vsync_toggle_input_frame_rate 0x00016e6d Thumb Code 134 hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) + hal_intl_dcs_init_sw_fltr 0x00016ef5 Thumb Code 90 hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) + hal_intl_dcs_set_auto_hw_filter 0x0001758d Thumb Code 130 hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) + hal_intl_fb_cal_fb_info 0x00017645 Thumb Code 780 hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) + hal_intl_fb_get_memc_flow_mode 0x00017b11 Thumb Code 6 hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) + hal_intl_fb_get_rx_fb_info 0x00017b1d Thumb Code 12 hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) + hal_intl_fb_get_tx_fb_info 0x00017b2d Thumb Code 12 hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) + hal_intl_fb_get_user_flow 0x00017b3d Thumb Code 6 hal_internal_fb.o(i.hal_intl_fb_get_user_flow) + hal_intl_svs_deinit_rx 0x00017b49 Thumb Code 32 hal_internal_svs.o(i.hal_intl_svs_deinit_rx) + hal_intl_svs_deinit_tx 0x00017b71 Thumb Code 10 hal_internal_svs.o(i.hal_intl_svs_deinit_tx) + hal_intl_svs_handle 0x00017b81 Thumb Code 24 hal_internal_svs.o(i.hal_intl_svs_handle) + hal_intl_svs_init_rx 0x00017ba5 Thumb Code 120 hal_internal_svs.o(i.hal_intl_svs_init_rx) + hal_intl_svs_init_tx 0x00017c25 Thumb Code 16 hal_internal_svs.o(i.hal_intl_svs_init_tx) + hal_intl_svs_set_input_frate 0x00017c39 Thumb Code 100 hal_internal_svs.o(i.hal_intl_svs_set_input_frate) + hal_intl_svs_set_rx_vtt 0x00017ca9 Thumb Code 6 hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) + hal_intl_svs_update_rxbr_clk 0x00017cb5 Thumb Code 52 hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) + hal_lcdc_displayproc_config 0x00017cfd Thumb Code 94 hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) + hal_lcdc_postproc_config 0x00017e1d Thumb Code 276 hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) + hal_lcdc_upscaler_config 0x00017fa5 Thumb Code 202 hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) + hal_nonshadow_func_update 0x00018085 Thumb Code 180 hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) + hal_pwr_enter_deep_sleep_mode 0x00018141 Thumb Code 42 hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) + hal_pwr_enter_normal_sleep_mode 0x0001816b Thumb Code 8 hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) + hal_pwr_enter_stop_sleep_mode 0x00018175 Thumb Code 88 hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) + hal_pwr_exit_sleep_mode 0x000181d9 Thumb Code 10 hal_pwr.o(i.hal_pwr_exit_sleep_mode) + hal_pwr_get_vcc_power_ready 0x000181e3 Thumb Code 8 hal_pwr.o(i.hal_pwr_get_vcc_power_ready) + hal_pwr_set_main_power 0x000181eb Thumb Code 8 hal_pwr.o(i.hal_pwr_set_main_power) + hal_pwr_set_sleep_mode_power 0x000181f3 Thumb Code 8 hal_pwr.o(i.hal_pwr_set_sleep_mode_power) + hal_pwr_set_stop_sleep_wakeup_pin 0x000181fd Thumb Code 86 hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) + hal_swire_deinit 0x00018261 Thumb Code 60 hal_swire.o(i.hal_swire_deinit) + hal_swire_enable 0x000182a1 Thumb Code 86 hal_swire.o(i.hal_swire_enable) + hal_swire_init 0x000182fd Thumb Code 74 hal_swire.o(i.hal_swire_init) + hal_swire_set_pulse 0x00018355 Thumb Code 32 hal_swire.o(i.hal_swire_set_pulse) + hal_swire_set_timer 0x00018379 Thumb Code 60 hal_swire.o(i.hal_swire_set_timer) + hal_system_init 0x000183b9 Thumb Code 192 hal_system.o(i.hal_system_init) + hal_system_updata_sysclk 0x0001849d Thumb Code 60 hal_system.o(i.hal_system_updata_sysclk) + hal_timer_deinit 0x000184ed Thumb Code 48 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x0001851d Thumb Code 28 hal_timer.o(i.hal_timer_init) + hal_timer_set_repeat 0x00018539 Thumb Code 8 hal_timer.o(i.hal_timer_set_repeat) + hal_uart_init 0x00018571 Thumb Code 134 hal_uart.o(i.hal_uart_init) + hal_uart_send_blocking 0x00018605 Thumb Code 24 hal_uart.o(i.hal_uart_send_blocking) + hal_vsync_func_update 0x00018621 Thumb Code 18 hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) + hal_vsync_reset_lcdc_scaler 0x00018639 Thumb Code 206 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + main 0x00018719 Thumb Code 22 main.o(i.main) + tau_log_init 0x0001903d Thumb Code 48 tau_log.o(i.tau_log_init) + tau_log_printf 0x00019071 Thumb Code 116 tau_log.o(i.tau_log_printf) + tau_log_push_log 0x000190f5 Thumb Code 118 tau_log.o(i.tau_log_push_log) + panel_init_code 0x00019398 Data 4559 rm_note11pro_demo.o(.constdata) + Region$$Table$$Base 0x0001a898 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001a8b8 Number 0 anon$$obj.o(Region$$Table) + note10_pro 0x00070004 Data 1 rm_note11pro_demo.o(.data) + s_pps 0x00070010 Data 128 rm_note11pro_demo.o(.data) + sg_uart0_tx_handle 0x0007012c Data 4 hal_uart.o(.data) + sg_uart0_rx_handle 0x00070130 Data 4 hal_uart.o(.data) + sg_uart1_tx_handle 0x00070134 Data 4 hal_uart.o(.data) + sg_uart1_rx_handle 0x00070138 Data 4 hal_uart.o(.data) + g_sof_gen_te_func 0x00070148 Data 4 hal_internal_vsync.o(.data) + hal_internal_vsync_handle_callback 0x0007014c Data 4 hal_internal_vsync.o(.data) + hal_internal_disp_end_handle_callback 0x00070150 Data 4 hal_internal_vsync.o(.data) + g_systick_cb_func 0x0007017c Data 4 drv_common.o(.data) + g_system_clock 0x00070180 Data 4 drv_common.o(.data) + g_system_delay_step 0x00070184 Data 1 drv_common.o(.data) + g_int_rxbr_irq0_cb_func 0x000701e8 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x000701ec Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x000701f0 Data 4 drv_vidc.o(.data) + dma_req_map 0x000702f4 Data 144 drv_dma.o(.data) + __stdout 0x00070384 Data 4 stdout.o(.data) + g_vsync_handle 0x00070610 Data 40 hal_internal_vsync.o(.bss) + sg_pro_motion_handle 0x00070638 Data 28 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00070654 Data 2048 hal_internal_dcs.o(.bss) + g_rx_fb_info 0x00070f54 Data 68 hal_internal_fb.o(.bss) + g_packet_fifo 0x0007101c Data 4204 dcs_packet_fifo.o(.bss) + __stack_limit 0x000720f8 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x000730f8 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000ac40, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000aa08]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000a8b8, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 279 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 1838 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2146 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2149 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2151 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2153 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2154 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2156 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2158 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2147 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 280 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 1841 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 1843 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 1845 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 1847 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x0000000e Code RO 1849 .text mc_p.l(strlen.o) + 0x000101f6 0x000101f6 0x0000001a Code RO 1851 .text mc_p.l(memcmp.o) + 0x00010210 0x00010210 0x000000b2 Code RO 2116 .text mf_p.l(fadd.o) + 0x000102c2 0x000102c2 0x0000007a Code RO 2118 .text mf_p.l(fmul.o) + 0x0001033c 0x0001033c 0x0000007c Code RO 2120 .text mf_p.l(fdiv.o) + 0x000103b8 0x000103b8 0x00000018 Code RO 2122 .text mf_p.l(fscalb.o) + 0x000103d0 0x000103d0 0x00000164 Code RO 2124 .text mf_p.l(dadd.o) + 0x00010534 0x00010534 0x000000d0 Code RO 2126 .text mf_p.l(dmul.o) + 0x00010604 0x00010604 0x0000000e Code RO 2130 .text mf_p.l(ffltui.o) + 0x00010612 0x00010612 0x00000002 PAD + 0x00010614 0x00010614 0x0000001c Code RO 2132 .text mf_p.l(dfltui.o) + 0x00010630 0x00010630 0x00000028 Code RO 2134 .text mf_p.l(ffixui.o) + 0x00010658 0x00010658 0x0000003c Code RO 2136 .text mf_p.l(dfixui.o) + 0x00010694 0x00010694 0x00000028 Code RO 2138 .text mf_p.l(f2d.o) + 0x000106bc 0x000106bc 0x00000038 Code RO 2140 .text mf_p.l(d2f.o) + 0x000106f4 0x000106f4 0x00000014 Code RO 2142 .text mf_p.l(cfcmple.o) + 0x00010708 0x00010708 0x00000014 Code RO 2144 .text mf_p.l(cfrcmple.o) + 0x0001071c 0x0001071c 0x00000060 Code RO 2161 .text mc_p.l(uldiv.o) + 0x0001077c 0x0001077c 0x00000020 Code RO 2163 .text mc_p.l(llshl.o) + 0x0001079c 0x0001079c 0x00000022 Code RO 2165 .text mc_p.l(llushr.o) + 0x000107be 0x000107be 0x00000026 Code RO 2167 .text mc_p.l(llsshr.o) + 0x000107e4 0x000107e4 0x00000000 Code RO 2169 .text mc_p.l(iusefp.o) + 0x000107e4 0x000107e4 0x00000082 Code RO 2170 .text mf_p.l(fepilogue.o) + 0x00010866 0x00010866 0x000000be Code RO 2172 .text mf_p.l(depilogue.o) + 0x00010924 0x00010924 0x000000f0 Code RO 2176 .text mf_p.l(ddiv.o) + 0x00010a14 0x00010a14 0x00000040 Code RO 2178 .text mf_p.l(dfixul.o) + 0x00010a54 0x00010a54 0x00000028 Code RO 2180 .text mf_p.l(cdrcmple.o) + 0x00010a7c 0x00010a7c 0x00000024 Code RO 2182 .text mc_p.l(init.o) + 0x00010aa0 0x00010aa0 0x00000056 Code RO 2192 .text mc_p.l(__dczerorl2.o) + 0x00010af6 0x00010af6 0x00000002 PAD + 0x00010af8 0x00010af8 0x0000001c Code RO 920 i.AP_NRESET_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b14 0x00010b14 0x0000005c Code RO 1687 i.DMA_IRQn_Handler CVWL668T.lib(drv_dma.o) + 0x00010b70 0x00010b70 0x0000000a Code RO 921 i.EXTI_INT0_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b7a 0x00010b7a 0x0000000a Code RO 922 i.EXTI_INT1_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b84 0x00010b84 0x0000000a Code RO 923 i.EXTI_INT2_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b8e 0x00010b8e 0x0000000a Code RO 924 i.EXTI_INT3_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b98 0x00010b98 0x0000000a Code RO 925 i.EXTI_INT4_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010ba2 0x00010ba2 0x0000000a Code RO 926 i.EXTI_INT5_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010bac 0x00010bac 0x0000000a Code RO 927 i.EXTI_INT6_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010bb6 0x00010bb6 0x0000000a Code RO 928 i.EXTI_INT7_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010bc0 0x00010bc0 0x00000048 Code RO 843 i.HardFault_Handler CVWL668T.lib(drv_common.o) + 0x00010c08 0x00010c08 0x00000100 Code RO 688 i.LCDC_IRQn_Handler CVWL668T.lib(hal_internal_vsync.o) + 0x00010d08 0x00010d08 0x0000009a Code RO 1447 i.MEMC_IRQn_Handler CVWL668T.lib(drv_memc.o) + 0x00010da2 0x00010da2 0x00000002 PAD + 0x00010da4 0x00010da4 0x000000b8 Code RO 1253 i.MIPI_TX_IRQn_Handler CVWL668T.lib(drv_dsi_tx.o) + 0x00010e5c 0x00010e5c 0x00000078 Code RO 90 i.Note11Pro_demo rm_note11pro_demo.o + 0x00010ed4 0x00010ed4 0x00000030 Code RO 1082 i.SWIRE_IRQn_Handler CVWL668T.lib(drv_swire.o) + 0x00010f04 0x00010f04 0x00000018 Code RO 844 i.SysTick_Handler CVWL668T.lib(drv_common.o) + 0x00010f1c 0x00010f1c 0x0000000a Code RO 1125 i.TIMER0_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f26 0x00010f26 0x0000000a Code RO 1126 i.TIMER1_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f30 0x00010f30 0x0000000a Code RO 1127 i.TIMER2_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f3a 0x00010f3a 0x0000000a Code RO 1128 i.TIMER3_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f44 0x00010f44 0x0000001c Code RO 1602 i.VIDC_IRQn_Handler CVWL668T.lib(drv_vidc.o) + 0x00010f60 0x00010f60 0x0000001c Code RO 1513 i.VPRE1_IRQn_Handler CVWL668T.lib(drv_rxbr.o) + 0x00010f7c 0x00010f7c 0x0000006c Code RO 754 i.VPRE_IRQn_Handler CVWL668T.lib(hal_internal_dcs.o) + 0x00010fe8 0x00010fe8 0x00000018 Code RO 1515 i.__NVIC_EnableIRQ CVWL668T.lib(drv_rxbr.o) + 0x00011000 0x00011000 0x0000001c Data RO 851 .ARM.__at_0x11000 CVWL668T.lib(drv_common.o) + 0x0001101c 0x0001101c 0x00000010 Data RO 626 .ARM.__at_0x1101C CVWL668T.lib(tau_log.o) + 0x0001102c 0x0001102c 0x00000016 Data RO 427 .ARM.__at_0x1102C CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00011042 0x00011042 0x00000002 PAD + 0x00011044 0x00011044 0x00000364 Code RO 1192 i.MIPI_RX_IRQn_Handler CVWL668T.lib(drv_dsi_rx.o) + 0x000113a8 0x000113a8 0x00000180 Code RO 1750 i.UART_IRQn_Handler CVWL668T.lib(drv_uart.o) + 0x00011528 0x00011528 0x00000020 Code RO 2088 i.__0printf mc_p.l(printfa.o) + 0x00011548 0x00011548 0x00000024 Code RO 2094 i.__0vsprintf mc_p.l(printfa.o) + 0x0001156c 0x0001156c 0x0000002e Code RO 2174 i.__ARM_clz mf_p.l(depilogue.o) + 0x0001159a 0x0001159a 0x0000001a Code RO 374 i.__ARM_common_switch8 CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000115b4 0x000115b4 0x00000020 Code RO 1514 i.__NVIC_DisableIRQ CVWL668T.lib(drv_rxbr.o) + 0x000115d4 0x000115d4 0x0000000e Code RO 2186 i.__scatterload_copy mc_p.l(handlers.o) + 0x000115e2 0x000115e2 0x00000002 Code RO 2187 i.__scatterload_null mc_p.l(handlers.o) + 0x000115e4 0x000115e4 0x0000000e Code RO 2188 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x000115f2 0x000115f2 0x00000002 PAD + 0x000115f4 0x000115f4 0x00000174 Code RO 2095 i._fp_digits mc_p.l(printfa.o) + 0x00011768 0x00011768 0x000006ec Code RO 2096 i._printf_core mc_p.l(printfa.o) + 0x00011e54 0x00011e54 0x00000020 Code RO 2097 i._printf_post_padding mc_p.l(printfa.o) + 0x00011e74 0x00011e74 0x0000002c Code RO 2098 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011ea0 0x00011ea0 0x0000000a Code RO 2100 i._sputc mc_p.l(printfa.o) + 0x00011eaa 0x00011eaa 0x00000002 PAD + 0x00011eac 0x00011eac 0x000000c0 Code RO 91 i.ap_dcs_read rm_note11pro_demo.o + 0x00011f6c 0x00011f6c 0x0000005c Code RO 92 i.ap_dcs_set_display_off rm_note11pro_demo.o + 0x00011fc8 0x00011fc8 0x00000048 Code RO 93 i.ap_dcs_set_display_on rm_note11pro_demo.o + 0x00012010 0x00012010 0x00000064 Code RO 94 i.ap_dcs_set_enter_sleep_mode rm_note11pro_demo.o + 0x00012074 0x00012074 0x00000044 Code RO 95 i.ap_dcs_set_exit_sleep_mode rm_note11pro_demo.o + 0x000120b8 0x000120b8 0x0000005c Code RO 96 i.ap_rstn_pull_down_cb rm_note11pro_demo.o + 0x00012114 0x00012114 0x00000018 Code RO 97 i.ap_rstn_pull_high_cb rm_note11pro_demo.o + 0x0001212c 0x0001212c 0x00000060 Code RO 98 i.ap_set_backlight rm_note11pro_demo.o + 0x0001218c 0x0001218c 0x0000008c Code RO 99 i.ap_update_frame_rate rm_note11pro_demo.o + 0x00012218 0x00012218 0x0000007c Code RO 100 i.ap_update_pps_9E rm_note11pro_demo.o + 0x00012294 0x00012294 0x0000002a Code RO 101 i.app_display_init rm_note11pro_demo.o + 0x000122be 0x000122be 0x00000002 PAD + 0x000122c0 0x000122c0 0x00000020 Code RO 102 i.app_gpio_init rm_note11pro_demo.o + 0x000122e0 0x000122e0 0x0000009c Code RO 103 i.app_init_panel rm_note11pro_demo.o + 0x0001237c 0x0001237c 0x000000b0 Code RO 104 i.app_mipi_rx_init rm_note11pro_demo.o + 0x0001242c 0x0001242c 0x00000070 Code RO 105 i.app_mipi_tx_init rm_note11pro_demo.o + 0x0001249c 0x0001249c 0x00000084 Code RO 106 i.app_mipi_tx_start rm_note11pro_demo.o + 0x00012520 0x00012520 0x000000e0 Code RO 107 i.app_system_suspend rm_note11pro_demo.o + 0x00012600 0x00012600 0x00000014 Code RO 108 i.app_tx_cmd_panel_te_cb rm_note11pro_demo.o + 0x00012614 0x00012614 0x00000018 Code RO 253 i.board_Init board.o + 0x0001262c 0x0001262c 0x000000c8 Code RO 1835 i.ceil m_ps.l(ceil.o) + 0x000126f4 0x000126f4 0x0000002c Code RO 689 i.check_mipi_rx_tx_video_info CVWL668T.lib(hal_internal_vsync.o) + 0x00012720 0x00012720 0x00000088 Code RO 755 i.check_pkt_buf_rev CVWL668T.lib(hal_internal_dcs.o) + 0x000127a8 0x000127a8 0x00000058 Code RO 1158 i.dcs_packet_fifo_alloc CVWL668T.lib(dcs_packet_fifo.o) + 0x00012800 0x00012800 0x00000018 Code RO 1159 i.dcs_packet_fifo_init CVWL668T.lib(dcs_packet_fifo.o) + 0x00012818 0x00012818 0x00000044 Code RO 1160 i.dcs_packet_free_fifo_header CVWL668T.lib(dcs_packet_fifo.o) + 0x0001285c 0x0001285c 0x00000024 Code RO 1161 i.dcs_packet_get_fifo_header CVWL668T.lib(dcs_packet_fifo.o) + 0x00012880 0x00012880 0x00000018 Code RO 613 i.delayMs CVWL668T.lib(tau_delay.o) + 0x00012898 0x00012898 0x0000002c Code RO 614 i.delayUs CVWL668T.lib(tau_delay.o) + 0x000128c4 0x000128c4 0x00000008 Code RO 849 i.drv_common_system_init CVWL668T.lib(drv_common.o) + 0x000128cc 0x000128cc 0x0000003c Code RO 868 i.drv_crgu_enable_clock CVWL668T.lib(drv_crgu.o) + 0x00012908 0x00012908 0x00000068 Code RO 871 i.drv_crgu_get_rxbr_clk CVWL668T.lib(drv_crgu.o) + 0x00012970 0x00012970 0x00000010 Code RO 874 i.drv_crgu_reset_modules CVWL668T.lib(drv_crgu.o) + 0x00012980 0x00012980 0x00000028 Code RO 875 i.drv_crgu_set_ahb_clk CVWL668T.lib(drv_crgu.o) + 0x000129a8 0x000129a8 0x00000010 Code RO 876 i.drv_crgu_set_clock_div CVWL668T.lib(drv_crgu.o) + 0x000129b8 0x000129b8 0x0000003c Code RO 878 i.drv_crgu_set_dpi_clk CVWL668T.lib(drv_crgu.o) + 0x000129f4 0x000129f4 0x00000038 Code RO 879 i.drv_crgu_set_dsc_clk CVWL668T.lib(drv_crgu.o) + 0x00012a2c 0x00012a2c 0x00000028 Code RO 880 i.drv_crgu_set_fb_clk CVWL668T.lib(drv_crgu.o) + 0x00012a54 0x00012a54 0x00000028 Code RO 881 i.drv_crgu_set_lcdc_clk CVWL668T.lib(drv_crgu.o) + 0x00012a7c 0x00012a7c 0x00000018 Code RO 882 i.drv_crgu_set_reset CVWL668T.lib(drv_crgu.o) + 0x00012a94 0x00012a94 0x00000028 Code RO 883 i.drv_crgu_set_rxbr_clk CVWL668T.lib(drv_crgu.o) + 0x00012abc 0x00012abc 0x00000028 Code RO 884 i.drv_crgu_set_vidc_clk CVWL668T.lib(drv_crgu.o) + 0x00012ae4 0x00012ae4 0x00000018 Code RO 1689 i.drv_dma_clear_status CVWL668T.lib(drv_dma.o) + 0x00012afc 0x00012afc 0x00000014 Code RO 1695 i.drv_dma_get_int_source CVWL668T.lib(drv_dma.o) + 0x00012b10 0x00012b10 0x0000001c Code RO 908 i.drv_dsc_dec_disable CVWL668T.lib(drv_dsc_dec.o) + 0x00012b2c 0x00012b2c 0x00000038 Code RO 909 i.drv_dsc_dec_enable CVWL668T.lib(drv_dsc_dec.o) + 0x00012b64 0x00012b64 0x00000020 Code RO 910 i.drv_dsc_dec_get_nslc CVWL668T.lib(drv_dsc_dec.o) + 0x00012b84 0x00012b84 0x0000001c Code RO 911 i.drv_dsc_dec_set_irqen CVWL668T.lib(drv_dsc_dec.o) + 0x00012ba0 0x00012ba0 0x0000010c Code RO 1193 i.drv_dsi_rx_calc_ipi_tx_delay CVWL668T.lib(drv_dsi_rx.o) + 0x00012cac 0x00012cac 0x00000040 Code RO 1194 i.drv_dsi_rx_enable_irq CVWL668T.lib(drv_dsi_rx.o) + 0x00012cec 0x00012cec 0x00000050 Code RO 1196 i.drv_dsi_rx_get_color_bpp CVWL668T.lib(drv_dsi_rx.o) + 0x00012d3c 0x00012d3c 0x0000001c Code RO 1197 i.drv_dsi_rx_get_color_pcc CVWL668T.lib(drv_dsi_rx.o) + 0x00012d58 0x00012d58 0x00000010 Code RO 1198 i.drv_dsi_rx_get_compression_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012d68 0x00012d68 0x00000010 Code RO 1199 i.drv_dsi_rx_get_ddi_crc_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012d78 0x00012d78 0x0000000c Code RO 1201 i.drv_dsi_rx_get_max_ret_size CVWL668T.lib(drv_dsi_rx.o) + 0x00012d84 0x00012d84 0x00000018 Code RO 1204 i.drv_dsi_rx_power_up CVWL668T.lib(drv_dsi_rx.o) + 0x00012d9c 0x00012d9c 0x0000001c Code RO 1205 i.drv_dsi_rx_set_check_crc CVWL668T.lib(drv_dsi_rx.o) + 0x00012db8 0x00012db8 0x00000024 Code RO 1206 i.drv_dsi_rx_set_ctrl_cfg CVWL668T.lib(drv_dsi_rx.o) + 0x00012ddc 0x00012ddc 0x00000010 Code RO 1207 i.drv_dsi_rx_set_ddi_cfg CVWL668T.lib(drv_dsi_rx.o) + 0x00012dec 0x00012dec 0x0000001c Code RO 1208 i.drv_dsi_rx_set_ddi_crc_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012e08 0x00012e08 0x0000000c Code RO 1211 i.drv_dsi_rx_set_inten CVWL668T.lib(drv_dsi_rx.o) + 0x00012e14 0x00012e14 0x00000010 Code RO 1212 i.drv_dsi_rx_set_ipi_cfg CVWL668T.lib(drv_dsi_rx.o) + 0x00012e24 0x00012e24 0x0000001c Code RO 1214 i.drv_dsi_rx_set_ipi_ycbcr_frmt CVWL668T.lib(drv_dsi_rx.o) + 0x00012e40 0x00012e40 0x00000014 Code RO 1215 i.drv_dsi_rx_set_lane_swap CVWL668T.lib(drv_dsi_rx.o) + 0x00012e54 0x00012e54 0x00000024 Code RO 1216 i.drv_dsi_rx_set_resp_cnt CVWL668T.lib(drv_dsi_rx.o) + 0x00012e78 0x00012e78 0x0000001c Code RO 1217 i.drv_dsi_rx_set_tear_resp_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012e94 0x00012e94 0x00000100 Code RO 1218 i.drv_dsi_rx_set_up_phy CVWL668T.lib(drv_dsi_rx.o) + 0x00012f94 0x00012f94 0x00000018 Code RO 1219 i.drv_dsi_rx_shut_down CVWL668T.lib(drv_dsi_rx.o) + 0x00012fac 0x00012fac 0x00000018 Code RO 1255 i.drv_dsi_tx_command_header CVWL668T.lib(drv_dsi_tx.o) + 0x00012fc4 0x00012fc4 0x00000058 Code RO 1256 i.drv_dsi_tx_command_mode_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x0001301c 0x0001301c 0x0000000c Code RO 1257 i.drv_dsi_tx_command_put_payload CVWL668T.lib(drv_dsi_tx.o) + 0x00013028 0x00013028 0x00000020 Code RO 1258 i.drv_dsi_tx_config_eotp CVWL668T.lib(drv_dsi_tx.o) + 0x00013048 0x00013048 0x0000000c Code RO 1259 i.drv_dsi_tx_config_int CVWL668T.lib(drv_dsi_tx.o) + 0x00013054 0x00013054 0x00000010 Code RO 1260 i.drv_dsi_tx_dpi_lpcmd_time CVWL668T.lib(drv_dsi_tx.o) + 0x00013064 0x00013064 0x00000010 Code RO 1261 i.drv_dsi_tx_dpi_mode CVWL668T.lib(drv_dsi_tx.o) + 0x00013074 0x00013074 0x00000024 Code RO 1262 i.drv_dsi_tx_dpi_polarity CVWL668T.lib(drv_dsi_tx.o) + 0x00013098 0x00013098 0x0000000c Code RO 1263 i.drv_dsi_tx_edpi_cmd_size CVWL668T.lib(drv_dsi_tx.o) + 0x000130a4 0x000130a4 0x0000000c Code RO 1265 i.drv_dsi_tx_get_cmd_status CVWL668T.lib(drv_dsi_tx.o) + 0x000130b0 0x000130b0 0x0000000c Code RO 1267 i.drv_dsi_tx_mode CVWL668T.lib(drv_dsi_tx.o) + 0x000130bc 0x000130bc 0x0000001c Code RO 1268 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL668T.lib(drv_dsi_tx.o) + 0x000130d8 0x000130d8 0x00000020 Code RO 1269 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL668T.lib(drv_dsi_tx.o) + 0x000130f8 0x000130f8 0x00000010 Code RO 1271 i.drv_dsi_tx_phy_lane_mode CVWL668T.lib(drv_dsi_tx.o) + 0x00013108 0x00013108 0x00000068 Code RO 1274 i.drv_dsi_tx_phy_status_ready CVWL668T.lib(drv_dsi_tx.o) + 0x00013170 0x00013170 0x00000044 Code RO 1275 i.drv_dsi_tx_phy_status_stopstate CVWL668T.lib(drv_dsi_tx.o) + 0x000131b4 0x000131b4 0x00000150 Code RO 1277 i.drv_dsi_tx_phy_test_setup CVWL668T.lib(drv_dsi_tx.o) + 0x00013304 0x00013304 0x00000020 Code RO 1278 i.drv_dsi_tx_phy_time_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x00013324 0x00013324 0x0000000c Code RO 1282 i.drv_dsi_tx_powerup CVWL668T.lib(drv_dsi_tx.o) + 0x00013330 0x00013330 0x00000024 Code RO 1283 i.drv_dsi_tx_response_mode CVWL668T.lib(drv_dsi_tx.o) + 0x00013354 0x00013354 0x0000001c Code RO 1286 i.drv_dsi_tx_set_bta_ack CVWL668T.lib(drv_dsi_tx.o) + 0x00013370 0x00013370 0x00000014 Code RO 1287 i.drv_dsi_tx_set_esc_div CVWL668T.lib(drv_dsi_tx.o) + 0x00013384 0x00013384 0x00000040 Code RO 1288 i.drv_dsi_tx_set_int CVWL668T.lib(drv_dsi_tx.o) + 0x000133c4 0x000133c4 0x00000018 Code RO 1289 i.drv_dsi_tx_set_time_out_div CVWL668T.lib(drv_dsi_tx.o) + 0x000133dc 0x000133dc 0x00000014 Code RO 1290 i.drv_dsi_tx_set_video_chunk CVWL668T.lib(drv_dsi_tx.o) + 0x000133f0 0x000133f0 0x00000024 Code RO 1291 i.drv_dsi_tx_set_video_timing CVWL668T.lib(drv_dsi_tx.o) + 0x00013414 0x00013414 0x0000000c Code RO 1293 i.drv_dsi_tx_shutdown CVWL668T.lib(drv_dsi_tx.o) + 0x00013420 0x00013420 0x0000002c Code RO 1294 i.drv_dsi_tx_timeout_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x0001344c 0x0001344c 0x000000e8 Code RO 1297 i.drv_dsi_tx_video_mode_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x00013534 0x00013534 0x00000036 Code RO 1795 i.drv_efuse_enter_inactive CVWL668T.lib(drv_efuse.o) + 0x0001356a 0x0001356a 0x0000000c Code RO 1798 i.drv_efuse_int_enable CVWL668T.lib(drv_efuse.o) + 0x00013576 0x00013576 0x0000003a Code RO 1799 i.drv_efuse_read CVWL668T.lib(drv_efuse.o) + 0x000135b0 0x000135b0 0x00000018 Code RO 1800 i.drv_efuse_read_req CVWL668T.lib(drv_efuse.o) + 0x000135c8 0x000135c8 0x00000024 Code RO 931 i.drv_gpio_handle_int CVWL668T.lib(drv_gpio.o) + 0x000135ec 0x000135ec 0x0000000c Code RO 932 i.drv_gpio_register_ap_reset_callback CVWL668T.lib(drv_gpio.o) + 0x000135f8 0x000135f8 0x00000014 Code RO 933 i.drv_gpio_register_callback CVWL668T.lib(drv_gpio.o) + 0x0001360c 0x0001360c 0x00000044 Code RO 935 i.drv_gpio_set_int CVWL668T.lib(drv_gpio.o) + 0x00013650 0x00013650 0x00000020 Code RO 936 i.drv_gpio_set_ioe CVWL668T.lib(drv_gpio.o) + 0x00013670 0x00013670 0x00000014 Code RO 937 i.drv_gpio_set_mode CVWL668T.lib(drv_gpio.o) + 0x00013684 0x00013684 0x00000020 Code RO 484 i.drv_gpio_set_output_data CVWL668T.lib(hal_gpio.o) + 0x000136a4 0x000136a4 0x00000028 Code RO 1359 i.drv_lcdc_bcsa_config CVWL668T.lib(drv_lcdc.o) + 0x000136cc 0x000136cc 0x0000002c Code RO 1360 i.drv_lcdc_cfg_int_frame CVWL668T.lib(drv_lcdc.o) + 0x000136f8 0x000136f8 0x00000018 Code RO 1361 i.drv_lcdc_clear_int CVWL668T.lib(drv_lcdc.o) + 0x00013710 0x00013710 0x00000034 Code RO 1363 i.drv_lcdc_cmd_start CVWL668T.lib(drv_lcdc.o) + 0x00013744 0x00013744 0x00000014 Code RO 1364 i.drv_lcdc_config_acc_command_mode CVWL668T.lib(drv_lcdc.o) + 0x00013758 0x00013758 0x00000038 Code RO 1365 i.drv_lcdc_config_int CVWL668T.lib(drv_lcdc.o) + 0x00013790 0x00013790 0x00000028 Code RO 1366 i.drv_lcdc_config_int_single CVWL668T.lib(drv_lcdc.o) + 0x000137b8 0x000137b8 0x00000018 Code RO 1367 i.drv_lcdc_config_overwrite_rgb CVWL668T.lib(drv_lcdc.o) + 0x000137d0 0x000137d0 0x00000050 Code RO 1368 i.drv_lcdc_config_src_parameter CVWL668T.lib(drv_lcdc.o) + 0x00013820 0x00013820 0x00000010 Code RO 1369 i.drv_lcdc_crop_hact CVWL668T.lib(drv_lcdc.o) + 0x00013830 0x00013830 0x00000038 Code RO 1370 i.drv_lcdc_ctrl_flow CVWL668T.lib(drv_lcdc.o) + 0x00013868 0x00013868 0x00000030 Code RO 1371 i.drv_lcdc_dith_config CVWL668T.lib(drv_lcdc.o) + 0x00013898 0x00013898 0x0000003c Code RO 1373 i.drv_lcdc_edge_dect_config CVWL668T.lib(drv_lcdc.o) + 0x000138d4 0x000138d4 0x00000064 Code RO 1374 i.drv_lcdc_edge_enh_config CVWL668T.lib(drv_lcdc.o) + 0x00013938 0x00013938 0x00000024 Code RO 1375 i.drv_lcdc_enable_shadow_reg CVWL668T.lib(drv_lcdc.o) + 0x0001395c 0x0001395c 0x0000001c Code RO 1376 i.drv_lcdc_endianness_config CVWL668T.lib(drv_lcdc.o) + 0x00013978 0x00013978 0x00000020 Code RO 1377 i.drv_lcdc_fc_config CVWL668T.lib(drv_lcdc.o) + 0x00013998 0x00013998 0x00000038 Code RO 1378 i.drv_lcdc_fixed_frame_output CVWL668T.lib(drv_lcdc.o) + 0x000139d0 0x000139d0 0x00000024 Code RO 1379 i.drv_lcdc_fldc_config CVWL668T.lib(drv_lcdc.o) + 0x000139f4 0x000139f4 0x00000024 Code RO 1380 i.drv_lcdc_function_disable CVWL668T.lib(drv_lcdc.o) + 0x00013a18 0x00013a18 0x00000024 Code RO 1381 i.drv_lcdc_function_enable CVWL668T.lib(drv_lcdc.o) + 0x00013a3c 0x00013a3c 0x0000003c Code RO 1392 i.drv_lcdc_set_int CVWL668T.lib(drv_lcdc.o) + 0x00013a78 0x00013a78 0x0000001c Code RO 1393 i.drv_lcdc_set_prefetch CVWL668T.lib(drv_lcdc.o) + 0x00013a94 0x00013a94 0x0000001c Code RO 1394 i.drv_lcdc_set_tear_line CVWL668T.lib(drv_lcdc.o) + 0x00013ab0 0x00013ab0 0x00000010 Code RO 1396 i.drv_lcdc_stop_display CVWL668T.lib(drv_lcdc.o) + 0x00013ac0 0x00013ac0 0x0000003c Code RO 1398 i.drv_lcdc_vid_hw_start CVWL668T.lib(drv_lcdc.o) + 0x00013afc 0x00013afc 0x00000018 Code RO 1400 i.drv_lcdc_vintp_mode_config CVWL668T.lib(drv_lcdc.o) + 0x00013b14 0x00013b14 0x00000014 Code RO 1448 i.drv_memc_clear_status CVWL668T.lib(drv_memc.o) + 0x00013b28 0x00013b28 0x00000040 Code RO 1449 i.drv_memc_enable_irq CVWL668T.lib(drv_memc.o) + 0x00013b68 0x00013b68 0x00000010 Code RO 1450 i.drv_memc_gen_a_tear_signal CVWL668T.lib(drv_memc.o) + 0x00013b78 0x00013b78 0x00000018 Code RO 1451 i.drv_memc_get_status CVWL668T.lib(drv_memc.o) + 0x00013b90 0x00013b90 0x00000010 Code RO 1452 i.drv_memc_get_tear_mode CVWL668T.lib(drv_memc.o) + 0x00013ba0 0x00013ba0 0x0000001c Code RO 1453 i.drv_memc_rate_transfer_sel CVWL668T.lib(drv_memc.o) + 0x00013bbc 0x00013bbc 0x00000014 Code RO 1454 i.drv_memc_sel_vsync CVWL668T.lib(drv_memc.o) + 0x00013bd0 0x00013bd0 0x00000018 Code RO 1455 i.drv_memc_set_active_height CVWL668T.lib(drv_memc.o) + 0x00013be8 0x00013be8 0x0000001c Code RO 1456 i.drv_memc_set_circ_mode_enable CVWL668T.lib(drv_memc.o) + 0x00013c04 0x00013c04 0x00000014 Code RO 1457 i.drv_memc_set_data_mode CVWL668T.lib(drv_memc.o) + 0x00013c18 0x00013c18 0x00000018 Code RO 1460 i.drv_memc_set_double_buffer CVWL668T.lib(drv_memc.o) + 0x00013c30 0x00013c30 0x0000001c Code RO 1464 i.drv_memc_set_frame_drop_select CVWL668T.lib(drv_memc.o) + 0x00013c4c 0x00013c4c 0x00000018 Code RO 1465 i.drv_memc_set_fs_en_conditions CVWL668T.lib(drv_memc.o) + 0x00013c64 0x00013c64 0x0000001c Code RO 1467 i.drv_memc_set_lcdc_st_conditions CVWL668T.lib(drv_memc.o) + 0x00013c80 0x00013c80 0x00000020 Code RO 1468 i.drv_memc_set_ltpo_mode CVWL668T.lib(drv_memc.o) + 0x00013ca0 0x00013ca0 0x00000018 Code RO 1469 i.drv_memc_set_ltpo_pu_thres CVWL668T.lib(drv_memc.o) + 0x00013cb8 0x00013cb8 0x00000014 Code RO 1473 i.drv_memc_set_tear_mode CVWL668T.lib(drv_memc.o) + 0x00013ccc 0x00013ccc 0x0000002c Code RO 1474 i.drv_memc_set_tear_waveform CVWL668T.lib(drv_memc.o) + 0x00013cf8 0x00013cf8 0x00000014 Code RO 1476 i.drv_memc_set_vidc_sync_cnt CVWL668T.lib(drv_memc.o) + 0x00013d0c 0x00013d0c 0x00000010 Code RO 1818 i.drv_phy_test_clear CVWL668T.lib(drv_phy_common.o) + 0x00013d1c 0x00013d1c 0x00000018 Code RO 1819 i.drv_phy_test_lock CVWL668T.lib(drv_phy_common.o) + 0x00013d34 0x00013d34 0x00000030 Code RO 967 i.drv_pwr_efuse_pd CVWL668T.lib(drv_pwr.o) + 0x00013d64 0x00013d64 0x0000004c Code RO 969 i.drv_pwr_enter_deep_sleep_mode CVWL668T.lib(drv_pwr.o) + 0x00013db0 0x00013db0 0x00000034 Code RO 971 i.drv_pwr_enter_sleep_mode_ex CVWL668T.lib(drv_pwr.o) + 0x00013de4 0x00013de4 0x00000098 Code RO 972 i.drv_pwr_enter_stop_sleep_mode CVWL668T.lib(drv_pwr.o) + 0x00013e7c 0x00013e7c 0x00000028 Code RO 973 i.drv_pwr_exit_sleep_mode CVWL668T.lib(drv_pwr.o) + 0x00013ea4 0x00013ea4 0x00000010 Code RO 976 i.drv_pwr_get_power_ready_st CVWL668T.lib(drv_pwr.o) + 0x00013eb4 0x00013eb4 0x00000028 Code RO 1008 i.drv_pwr_set_breath_screen_power_sel CVWL668T.lib(drv_pwr.o) + 0x00013edc 0x00013edc 0x00000028 Code RO 1009 i.drv_pwr_set_digit_power_sel CVWL668T.lib(drv_pwr.o) + 0x00013f04 0x00013f04 0x00000034 Code RO 1012 i.drv_pwr_set_pll_clk CVWL668T.lib(drv_pwr.o) + 0x00013f38 0x00013f38 0x0000002c Code RO 1016 i.drv_pwr_set_wakeup_type CVWL668T.lib(drv_pwr.o) + 0x00013f64 0x00013f64 0x00000020 Code RO 1019 i.drv_pwr_write_lock CVWL668T.lib(drv_pwr.o) + 0x00013f84 0x00013f84 0x00000010 Code RO 1516 i.drv_rxbr_clear_pkt_buffer CVWL668T.lib(drv_rxbr.o) + 0x00013f94 0x00013f94 0x0000000c Code RO 1517 i.drv_rxbr_clear_status0 CVWL668T.lib(drv_rxbr.o) + 0x00013fa0 0x00013fa0 0x0000005a Code RO 1520 i.drv_rxbr_enable_irq CVWL668T.lib(drv_rxbr.o) + 0x00013ffa 0x00013ffa 0x00000002 PAD + 0x00013ffc 0x00013ffc 0x0000001c Code RO 1521 i.drv_rxbr_frame_drop_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014018 0x00014018 0x00000018 Code RO 690 i.drv_rxbr_get_int_source CVWL668T.lib(hal_internal_vsync.o) + 0x00014030 0x00014030 0x00000018 Code RO 756 i.drv_rxbr_get_status0 CVWL668T.lib(hal_internal_dcs.o) + 0x00014048 0x00014048 0x00000014 Code RO 1530 i.drv_rxbr_hline_rcv0_cfg CVWL668T.lib(drv_rxbr.o) + 0x0001405c 0x0001405c 0x00000014 Code RO 1531 i.drv_rxbr_hline_rcv1_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014070 0x00014070 0x00000010 Code RO 1532 i.drv_rxbr_hline_rcv_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014080 0x00014080 0x0000000c Code RO 1534 i.drv_rxbr_register_irq1_callback CVWL668T.lib(drv_rxbr.o) + 0x0001408c 0x0001408c 0x00000018 Code RO 1535 i.drv_rxbr_set_ack_pkt_header CVWL668T.lib(drv_rxbr.o) + 0x000140a4 0x000140a4 0x0000001c Code RO 1540 i.drv_rxbr_set_color_format CVWL668T.lib(drv_rxbr.o) + 0x000140c0 0x000140c0 0x00000024 Code RO 1543 i.drv_rxbr_set_filter_regs CVWL668T.lib(drv_rxbr.o) + 0x000140e4 0x000140e4 0x0000001c Code RO 1544 i.drv_rxbr_set_inten CVWL668T.lib(drv_rxbr.o) + 0x00014100 0x00014100 0x00000018 Code RO 1545 i.drv_rxbr_set_ltpo_drop_th CVWL668T.lib(drv_rxbr.o) + 0x00014118 0x00014118 0x00000040 Code RO 1549 i.drv_rxbr_set_usr_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014158 0x00014158 0x00000010 Code RO 1550 i.drv_rxbr_set_usr_col CVWL668T.lib(drv_rxbr.o) + 0x00014168 0x00014168 0x00000010 Code RO 1551 i.drv_rxbr_set_usr_row CVWL668T.lib(drv_rxbr.o) + 0x00014178 0x00014178 0x00000078 Code RO 1173 i.drv_se_init CVWL668T.lib(drv_se.o) + 0x000141f0 0x000141f0 0x000000d4 Code RO 1174 i.drv_se_set_dsc CVWL668T.lib(drv_se.o) + 0x000142c4 0x000142c4 0x00000088 Code RO 1175 i.drv_se_set_lcdc CVWL668T.lib(drv_se.o) + 0x0001434c 0x0001434c 0x00000068 Code RO 1176 i.drv_se_set_memc CVWL668T.lib(drv_se.o) + 0x000143b4 0x000143b4 0x000000d0 Code RO 1177 i.drv_se_set_rxbr CVWL668T.lib(drv_se.o) + 0x00014484 0x00014484 0x000000ac Code RO 1178 i.drv_se_set_vidc CVWL668T.lib(drv_se.o) + 0x00014530 0x00014530 0x00000014 Code RO 1179 i.drv_se_start_rx CVWL668T.lib(drv_se.o) + 0x00014544 0x00014544 0x0000001c Code RO 1083 i.drv_swire_enable CVWL668T.lib(drv_swire.o) + 0x00014560 0x00014560 0x0000000c Code RO 1084 i.drv_swire_get_pulse_count CVWL668T.lib(drv_swire.o) + 0x0001456c 0x0001456c 0x0000000c Code RO 1085 i.drv_swire_register_callback CVWL668T.lib(drv_swire.o) + 0x00014578 0x00014578 0x00000018 Code RO 1086 i.drv_swire_set_bit_time CVWL668T.lib(drv_swire.o) + 0x00014590 0x00014590 0x00000048 Code RO 1087 i.drv_swire_set_int CVWL668T.lib(drv_swire.o) + 0x000145d8 0x000145d8 0x0000001c Code RO 1088 i.drv_swire_set_power_down CVWL668T.lib(drv_swire.o) + 0x000145f4 0x000145f4 0x0000000c Code RO 1089 i.drv_swire_set_pulse_count CVWL668T.lib(drv_swire.o) + 0x00014600 0x00014600 0x0000001c Code RO 1090 i.drv_swire_set_trig_mode CVWL668T.lib(drv_swire.o) + 0x0001461c 0x0001461c 0x0000000c Code RO 1105 i.drv_sys_cfg_clear_all_int CVWL668T.lib(drv_sys_cfg.o) + 0x00014628 0x00014628 0x00000028 Code RO 1106 i.drv_sys_cfg_clear_pending CVWL668T.lib(drv_sys_cfg.o) + 0x00014650 0x00014650 0x00000024 Code RO 1107 i.drv_sys_cfg_sel_ap_rst_trig CVWL668T.lib(drv_sys_cfg.o) + 0x00014674 0x00014674 0x00000024 Code RO 1109 i.drv_sys_cfg_sel_gpio_group CVWL668T.lib(drv_sys_cfg.o) + 0x00014698 0x00014698 0x00000024 Code RO 1110 i.drv_sys_cfg_sel_int_trig CVWL668T.lib(drv_sys_cfg.o) + 0x000146bc 0x000146bc 0x00000018 Code RO 1111 i.drv_sys_cfg_sel_swire_timer CVWL668T.lib(drv_sys_cfg.o) + 0x000146d4 0x000146d4 0x00000024 Code RO 1112 i.drv_sys_cfg_set_int CVWL668T.lib(drv_sys_cfg.o) + 0x000146f8 0x000146f8 0x0000001a Code RO 1129 i.drv_timer_clear_status_flags CVWL668T.lib(drv_timer.o) + 0x00014712 0x00014712 0x00000020 Code RO 1130 i.drv_timer_enable CVWL668T.lib(drv_timer.o) + 0x00014732 0x00014732 0x00000002 PAD + 0x00014734 0x00014734 0x00000010 Code RO 1131 i.drv_timer_get_instance CVWL668T.lib(drv_timer.o) + 0x00014744 0x00014744 0x0000003c Code RO 1133 i.drv_timer_handle_interrupt CVWL668T.lib(drv_timer.o) + 0x00014780 0x00014780 0x00000040 Code RO 1135 i.drv_timer_set_compare_val CVWL668T.lib(drv_timer.o) + 0x000147c0 0x000147c0 0x00000048 Code RO 1136 i.drv_timer_set_int CVWL668T.lib(drv_timer.o) + 0x00014808 0x00014808 0x00000028 Code RO 1137 i.drv_timer_set_prescaler CVWL668T.lib(drv_timer.o) + 0x00014830 0x00014830 0x00000010 Code RO 1138 i.drv_timer_set_repeat CVWL668T.lib(drv_timer.o) + 0x00014840 0x00014840 0x00000020 Code RO 1299 i.drv_tx_phy_test_enter CVWL668T.lib(drv_dsi_tx.o) + 0x00014860 0x00014860 0x00000020 Code RO 1300 i.drv_tx_phy_test_exit CVWL668T.lib(drv_dsi_tx.o) + 0x00014880 0x00014880 0x00000028 Code RO 1303 i.drv_tx_phy_test_write_code CVWL668T.lib(drv_dsi_tx.o) + 0x000148a8 0x000148a8 0x00000034 Code RO 1751 i.drv_uart_abort_recv CVWL668T.lib(drv_uart.o) + 0x000148dc 0x000148dc 0x00000034 Code RO 1752 i.drv_uart_abort_send CVWL668T.lib(drv_uart.o) + 0x00014910 0x00014910 0x00000014 Code RO 1753 i.drv_uart_config_int CVWL668T.lib(drv_uart.o) + 0x00014924 0x00014924 0x00000018 Code RO 1755 i.drv_uart_enable_clk CVWL668T.lib(drv_uart.o) + 0x0001493c 0x0001493c 0x0000005c Code RO 1756 i.drv_uart_enable_int CVWL668T.lib(drv_uart.o) + 0x00014998 0x00014998 0x00000028 Code RO 1758 i.drv_uart_get_instance CVWL668T.lib(drv_uart.o) + 0x000149c0 0x000149c0 0x000000ce Code RO 1759 i.drv_uart_init CVWL668T.lib(drv_uart.o) + 0x00014a8e 0x00014a8e 0x00000002 PAD + 0x00014a90 0x00014a90 0x0000003c Code RO 1760 i.drv_uart_int_trans_handle CVWL668T.lib(drv_uart.o) + 0x00014acc 0x00014acc 0x0000001c Code RO 1763 i.drv_uart_reset_rx_fifo CVWL668T.lib(drv_uart.o) + 0x00014ae8 0x00014ae8 0x0000001c Code RO 1764 i.drv_uart_reset_tx_fifo CVWL668T.lib(drv_uart.o) + 0x00014b04 0x00014b04 0x0000001a Code RO 1765 i.drv_uart_send_blocking CVWL668T.lib(drv_uart.o) + 0x00014b1e 0x00014b1e 0x00000054 Code RO 1767 i.drv_uart_set_baud_rate CVWL668T.lib(drv_uart.o) + 0x00014b72 0x00014b72 0x00000002 PAD + 0x00014b74 0x00014b74 0x0000004c Code RO 1768 i.drv_uart_trans_create_handle CVWL668T.lib(drv_uart.o) + 0x00014bc0 0x00014bc0 0x00000010 Code RO 1603 i.drv_vidc_clear_irq CVWL668T.lib(drv_vidc.o) + 0x00014bd0 0x00014bd0 0x00000020 Code RO 1607 i.drv_vidc_enable CVWL668T.lib(drv_vidc.o) + 0x00014bf0 0x00014bf0 0x00000040 Code RO 1608 i.drv_vidc_enable_irq CVWL668T.lib(drv_vidc.o) + 0x00014c30 0x00014c30 0x0000002c Code RO 1609 i.drv_vidc_get_int_source CVWL668T.lib(drv_vidc.o) + 0x00014c5c 0x00014c5c 0x00000018 Code RO 1610 i.drv_vidc_get_irq_status CVWL668T.lib(drv_vidc.o) + 0x00014c74 0x00014c74 0x0000002c Code RO 1614 i.drv_vidc_init_module_enable CVWL668T.lib(drv_vidc.o) + 0x00014ca0 0x00014ca0 0x0000000c Code RO 1615 i.drv_vidc_register_callback CVWL668T.lib(drv_vidc.o) + 0x00014cac 0x00014cac 0x0000000c Code RO 1616 i.drv_vidc_reset CVWL668T.lib(drv_vidc.o) + 0x00014cb8 0x00014cb8 0x0000001c Code RO 1617 i.drv_vidc_set_circ_mode_enable CVWL668T.lib(drv_vidc.o) + 0x00014cd4 0x00014cd4 0x00000038 Code RO 1618 i.drv_vidc_set_dither_config CVWL668T.lib(drv_vidc.o) + 0x00014d0c 0x00014d0c 0x0000005c Code RO 1620 i.drv_vidc_set_dst_parameter CVWL668T.lib(drv_vidc.o) + 0x00014d68 0x00014d68 0x0000000c Code RO 1622 i.drv_vidc_set_honly_hcoef0 CVWL668T.lib(drv_vidc.o) + 0x00014d74 0x00014d74 0x0000002c Code RO 1623 i.drv_vidc_set_honly_hinitb CVWL668T.lib(drv_vidc.o) + 0x00014da0 0x00014da0 0x00000030 Code RO 1624 i.drv_vidc_set_honly_hinitr CVWL668T.lib(drv_vidc.o) + 0x00014dd0 0x00014dd0 0x0000001c Code RO 1627 i.drv_vidc_set_irqen CVWL668T.lib(drv_vidc.o) + 0x00014dec 0x00014dec 0x00000014 Code RO 1628 i.drv_vidc_set_mirror CVWL668T.lib(drv_vidc.o) + 0x00014e00 0x00014e00 0x0000001c Code RO 1631 i.drv_vidc_set_pentile_swap CVWL668T.lib(drv_vidc.o) + 0x00014e1c 0x00014e1c 0x0000000c Code RO 1632 i.drv_vidc_set_pu_ctrl CVWL668T.lib(drv_vidc.o) + 0x00014e28 0x00014e28 0x00000018 Code RO 1633 i.drv_vidc_set_rotation CVWL668T.lib(drv_vidc.o) + 0x00014e40 0x00014e40 0x0000000c Code RO 1634 i.drv_vidc_set_scld_hcoef0 CVWL668T.lib(drv_vidc.o) + 0x00014e4c 0x00014e4c 0x0000000c Code RO 1635 i.drv_vidc_set_scld_hcoef1 CVWL668T.lib(drv_vidc.o) + 0x00014e58 0x00014e58 0x00000014 Code RO 1636 i.drv_vidc_set_scld_step CVWL668T.lib(drv_vidc.o) + 0x00014e6c 0x00014e6c 0x0000000c Code RO 1637 i.drv_vidc_set_scld_vcoef0 CVWL668T.lib(drv_vidc.o) + 0x00014e78 0x00014e78 0x0000000c Code RO 1638 i.drv_vidc_set_scld_vcoef1 CVWL668T.lib(drv_vidc.o) + 0x00014e84 0x00014e84 0x00000020 Code RO 1639 i.drv_vidc_set_src_parameter CVWL668T.lib(drv_vidc.o) + 0x00014ea4 0x00014ea4 0x00000038 Code RO 1640 i.drv_vidc_set_vintp_config CVWL668T.lib(drv_vidc.o) + 0x00014edc 0x00014edc 0x00000034 Code RO 622 i.fputc CVWL668T.lib(tau_log.o) + 0x00014f10 0x00014f10 0x00000040 Code RO 784 i.ha_intl_fb_check_pu_size CVWL668T.lib(hal_internal_fb.o) + 0x00014f50 0x00014f50 0x00000040 Code RO 288 i.hal_dsi_rx_ctrl_create_handle CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00014f90 0x00014f90 0x00000040 Code RO 289 i.hal_dsi_rx_ctrl_dcs_async_handler CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00014fd0 0x00014fd0 0x00000094 Code RO 290 i.hal_dsi_rx_ctrl_deinit CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015064 0x00015064 0x00000008 Code RO 296 i.hal_dsi_rx_ctrl_get_compressen_en CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001506c 0x0001506c 0x00000020 Code RO 297 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001508c 0x0001508c 0x000000ac Code RO 298 i.hal_dsi_rx_ctrl_init CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015138 0x00015138 0x00000100 Code RO 299 i.hal_dsi_rx_ctrl_init_clk CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015238 0x00015238 0x00000108 Code RO 300 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015340 0x00015340 0x0000012c Code RO 301 i.hal_dsi_rx_ctrl_init_memc CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001546c 0x0001546c 0x00000148 Code RO 302 i.hal_dsi_rx_ctrl_init_rxbr CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000155b4 0x000155b4 0x00000280 Code RO 303 i.hal_dsi_rx_ctrl_init_vidc CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015834 0x00015834 0x00000038 Code RO 304 i.hal_dsi_rx_ctrl_pre_init_pps CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001586c 0x0001586c 0x000000f0 Code RO 309 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001595c 0x0001595c 0x00000018 Code RO 313 i.hal_dsi_rx_ctrl_set_check_crc CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015974 0x00015974 0x00000030 Code RO 316 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000159a4 0x000159a4 0x00000030 Code RO 322 i.hal_dsi_rx_ctrl_start CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000159d4 0x000159d4 0x00000030 Code RO 323 i.hal_dsi_rx_ctrl_stop CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015a04 0x00015a04 0x0000000a Code RO 324 i.hal_dsi_rx_ctrl_toggle_input_frame_rate CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015a0e 0x00015a0e 0x00000002 PAD + 0x00015a10 0x00015a10 0x00000020 Code RO 325 i.hal_dsi_rx_ctrl_toggle_resolution CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015a30 0x00015a30 0x00000280 Code RO 378 i.hal_dsi_tx_cmd_mode_cal_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015cb0 0x00015cb0 0x00000038 Code RO 380 i.hal_dsi_tx_ctrl_create_handle CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015ce8 0x00015ce8 0x00000074 Code RO 381 i.hal_dsi_tx_ctrl_deinit CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015d5c 0x00015d5c 0x0000000c Code RO 383 i.hal_dsi_tx_ctrl_gen_a_frame CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015d68 0x00015d68 0x00000022 Code RO 384 i.hal_dsi_tx_ctrl_gen_a_tear_signal CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015d8a 0x00015d8a 0x00000002 PAD + 0x00015d8c 0x00015d8c 0x0000007c Code RO 386 i.hal_dsi_tx_ctrl_init CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015e08 0x00015e08 0x00000010 Code RO 387 i.hal_dsi_tx_ctrl_init_clk CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015e18 0x00015e18 0x00000008 Code RO 400 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015e20 0x00015e20 0x0000000a Code RO 401 i.hal_dsi_tx_ctrl_set_tear_mode CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015e2a 0x00015e2a 0x00000002 PAD + 0x00015e2c 0x00015e2c 0x00000090 Code RO 403 i.hal_dsi_tx_ctrl_start CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015ebc 0x00015ebc 0x00000038 Code RO 404 i.hal_dsi_tx_ctrl_stop CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015ef4 0x00015ef4 0x000000f4 Code RO 406 i.hal_dsi_tx_ctrl_write_array_cmd CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015fe8 0x00015fe8 0x000000d0 Code RO 407 i.hal_dsi_tx_ctrl_write_cmd CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000160b8 0x000160b8 0x00000104 Code RO 408 i.hal_dsi_tx_init_cfg CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000161bc 0x000161bc 0x00000044 Code RO 409 i.hal_dsi_tx_init_dpi_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016200 0x00016200 0x00000016 Code RO 410 i.hal_dsi_tx_init_phy_cfg CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016216 0x00016216 0x00000052 Code RO 411 i.hal_dsi_tx_init_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016268 0x00016268 0x00000054 Code RO 412 i.hal_dsi_tx_init_vid_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000162bc 0x000162bc 0x00000040 Code RO 413 i.hal_dsi_tx_send_cmd CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000162fc 0x000162fc 0x00000094 Code RO 414 i.hal_dsi_tx_timing_info_update CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016390 0x00016390 0x00000310 Code RO 415 i.hal_dsi_tx_vid_mode_cal_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000166a0 0x000166a0 0x0000003a Code RO 485 i.hal_gpio_config_pad CVWL668T.lib(hal_gpio.o) + 0x000166da 0x000166da 0x00000002 PAD + 0x000166dc 0x000166dc 0x00000018 Code RO 486 i.hal_gpio_ctrl_eint CVWL668T.lib(hal_gpio.o) + 0x000166f4 0x000166f4 0x00000040 Code RO 490 i.hal_gpio_init_eint CVWL668T.lib(hal_gpio.o) + 0x00016734 0x00016734 0x00000016 Code RO 491 i.hal_gpio_init_input CVWL668T.lib(hal_gpio.o) + 0x0001674a 0x0001674a 0x0000001c Code RO 492 i.hal_gpio_init_output CVWL668T.lib(hal_gpio.o) + 0x00016766 0x00016766 0x00000002 PAD + 0x00016768 0x00016768 0x0000001c Code RO 493 i.hal_gpio_reg_eint_cb CVWL668T.lib(hal_gpio.o) + 0x00016784 0x00016784 0x00000050 Code RO 494 i.hal_gpio_set_ap_reset_int CVWL668T.lib(hal_gpio.o) + 0x000167d4 0x000167d4 0x00000060 Code RO 497 i.hal_gpio_set_mode CVWL668T.lib(hal_gpio.o) + 0x00016834 0x00016834 0x00000008 Code RO 498 i.hal_gpio_set_output_data CVWL668T.lib(hal_gpio.o) + 0x0001683c 0x0001683c 0x00000010 Code RO 692 i.hal_internal_sync_get_hight_performan_mode CVWL668T.lib(hal_internal_vsync.o) + 0x0001684c 0x0001684c 0x000001b4 Code RO 693 i.hal_internal_sync_input_resolution_change CVWL668T.lib(hal_internal_vsync.o) + 0x00016a00 0x00016a00 0x0000000c Code RO 694 i.hal_internal_sync_register_lcdc_cb CVWL668T.lib(hal_internal_vsync.o) + 0x00016a0c 0x00016a0c 0x00000020 Code RO 697 i.hal_internal_vsync_deinit CVWL668T.lib(hal_internal_vsync.o) + 0x00016a2c 0x00016a2c 0x0000000c Code RO 698 i.hal_internal_vsync_get_rx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016a38 0x00016a38 0x00000014 Code RO 699 i.hal_internal_vsync_get_sync_line CVWL668T.lib(hal_internal_vsync.o) + 0x00016a4c 0x00016a4c 0x0000000c Code RO 700 i.hal_internal_vsync_get_tx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016a58 0x00016a58 0x000000e8 Code RO 701 i.hal_internal_vsync_init_rx CVWL668T.lib(hal_internal_vsync.o) + 0x00016b40 0x00016b40 0x000000c8 Code RO 702 i.hal_internal_vsync_init_tx CVWL668T.lib(hal_internal_vsync.o) + 0x00016c08 0x00016c08 0x00000020 Code RO 703 i.hal_internal_vsync_set_rx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016c28 0x00016c28 0x000001ec Code RO 705 i.hal_internal_vsync_set_tear_mode CVWL668T.lib(hal_internal_vsync.o) + 0x00016e14 0x00016e14 0x00000058 Code RO 706 i.hal_internal_vsync_set_tx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016e6c 0x00016e6c 0x00000086 Code RO 707 i.hal_internal_vsync_toggle_input_frame_rate CVWL668T.lib(hal_internal_vsync.o) + 0x00016ef2 0x00016ef2 0x00000002 PAD + 0x00016ef4 0x00016ef4 0x0000006c Code RO 757 i.hal_intl_dcs_init_sw_fltr CVWL668T.lib(hal_internal_dcs.o) + 0x00016f60 0x00016f60 0x00000430 Code RO 759 i.hal_intl_dcs_rx_get_dcs_packet_data CVWL668T.lib(hal_internal_dcs.o) + 0x00017390 0x00017390 0x00000088 Code RO 760 i.hal_intl_dcs_rx_receive_packet CVWL668T.lib(hal_internal_dcs.o) + 0x00017418 0x00017418 0x00000174 Code RO 761 i.hal_intl_dcs_rx_receive_pps CVWL668T.lib(hal_internal_dcs.o) + 0x0001758c 0x0001758c 0x0000008c Code RO 762 i.hal_intl_dcs_set_auto_hw_filter CVWL668T.lib(hal_internal_dcs.o) + 0x00017618 0x00017618 0x0000002c Code RO 764 i.hal_intl_dcs_sw_filter_handle CVWL668T.lib(hal_internal_dcs.o) + 0x00017644 0x00017644 0x00000318 Code RO 785 i.hal_intl_fb_cal_fb_info CVWL668T.lib(hal_internal_fb.o) + 0x0001795c 0x0001795c 0x00000064 Code RO 786 i.hal_intl_fb_check_bandwidth CVWL668T.lib(hal_internal_fb.o) + 0x000179c0 0x000179c0 0x000000dc Code RO 787 i.hal_intl_fb_edge_resize CVWL668T.lib(hal_internal_fb.o) + 0x00017a9c 0x00017a9c 0x00000074 Code RO 788 i.hal_intl_fb_flow_control_adapter CVWL668T.lib(hal_internal_fb.o) + 0x00017b10 0x00017b10 0x0000000c Code RO 789 i.hal_intl_fb_get_memc_flow_mode CVWL668T.lib(hal_internal_fb.o) + 0x00017b1c 0x00017b1c 0x00000010 Code RO 790 i.hal_intl_fb_get_rx_fb_info CVWL668T.lib(hal_internal_fb.o) + 0x00017b2c 0x00017b2c 0x00000010 Code RO 791 i.hal_intl_fb_get_tx_fb_info CVWL668T.lib(hal_internal_fb.o) + 0x00017b3c 0x00017b3c 0x0000000c Code RO 792 i.hal_intl_fb_get_user_flow CVWL668T.lib(hal_internal_fb.o) + 0x00017b48 0x00017b48 0x00000028 Code RO 810 i.hal_intl_svs_deinit_rx CVWL668T.lib(hal_internal_svs.o) + 0x00017b70 0x00017b70 0x00000010 Code RO 811 i.hal_intl_svs_deinit_tx CVWL668T.lib(hal_internal_svs.o) + 0x00017b80 0x00017b80 0x00000024 Code RO 812 i.hal_intl_svs_handle CVWL668T.lib(hal_internal_svs.o) + 0x00017ba4 0x00017ba4 0x00000080 Code RO 813 i.hal_intl_svs_init_rx CVWL668T.lib(hal_internal_svs.o) + 0x00017c24 0x00017c24 0x00000014 Code RO 814 i.hal_intl_svs_init_tx CVWL668T.lib(hal_internal_svs.o) + 0x00017c38 0x00017c38 0x00000070 Code RO 815 i.hal_intl_svs_set_input_frate CVWL668T.lib(hal_internal_svs.o) + 0x00017ca8 0x00017ca8 0x0000000c Code RO 816 i.hal_intl_svs_set_rx_vtt CVWL668T.lib(hal_internal_svs.o) + 0x00017cb4 0x00017cb4 0x00000048 Code RO 818 i.hal_intl_svs_update_rxbr_clk CVWL668T.lib(hal_internal_svs.o) + 0x00017cfc 0x00017cfc 0x00000070 Code RO 416 i.hal_lcdc_displayproc_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017d6c 0x00017d6c 0x0000003e Code RO 417 i.hal_lcdc_init_cfg CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017daa 0x00017daa 0x00000070 Code RO 418 i.hal_lcdc_init_clk CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017e1a 0x00017e1a 0x00000002 PAD + 0x00017e1c 0x00017e1c 0x00000128 Code RO 419 i.hal_lcdc_postproc_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017f44 0x00017f44 0x00000024 Code RO 420 i.hal_lcdc_start CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017f68 0x00017f68 0x0000003c Code RO 421 i.hal_lcdc_timinggen_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017fa4 0x00017fa4 0x000000e0 Code RO 422 i.hal_lcdc_upscaler_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018084 0x00018084 0x000000bc Code RO 424 i.hal_nonshadow_func_update CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018140 0x00018140 0x0000002a Code RO 571 i.hal_pwr_enter_deep_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x0001816a 0x0001816a 0x00000008 Code RO 572 i.hal_pwr_enter_normal_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x00018172 0x00018172 0x00000002 PAD + 0x00018174 0x00018174 0x00000064 Code RO 573 i.hal_pwr_enter_stop_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x000181d8 0x000181d8 0x0000000a Code RO 574 i.hal_pwr_exit_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x000181e2 0x000181e2 0x00000008 Code RO 576 i.hal_pwr_get_vcc_power_ready CVWL668T.lib(hal_pwr.o) + 0x000181ea 0x000181ea 0x00000008 Code RO 581 i.hal_pwr_set_main_power CVWL668T.lib(hal_pwr.o) + 0x000181f2 0x000181f2 0x00000008 Code RO 583 i.hal_pwr_set_sleep_mode_power CVWL668T.lib(hal_pwr.o) + 0x000181fa 0x000181fa 0x00000002 PAD + 0x000181fc 0x000181fc 0x00000064 Code RO 584 i.hal_pwr_set_stop_sleep_wakeup_pin CVWL668T.lib(hal_pwr.o) + 0x00018260 0x00018260 0x00000040 Code RO 525 i.hal_swire_deinit CVWL668T.lib(hal_swire.o) + 0x000182a0 0x000182a0 0x0000005c Code RO 526 i.hal_swire_enable CVWL668T.lib(hal_swire.o) + 0x000182fc 0x000182fc 0x00000058 Code RO 527 i.hal_swire_init CVWL668T.lib(hal_swire.o) + 0x00018354 0x00018354 0x00000024 Code RO 529 i.hal_swire_set_pulse CVWL668T.lib(hal_swire.o) + 0x00018378 0x00018378 0x00000040 Code RO 530 i.hal_swire_set_timer CVWL668T.lib(hal_swire.o) + 0x000183b8 0x000183b8 0x000000e4 Code RO 550 i.hal_system_init CVWL668T.lib(hal_system.o) + 0x0001849c 0x0001849c 0x00000050 Code RO 553 i.hal_system_updata_sysclk CVWL668T.lib(hal_system.o) + 0x000184ec 0x000184ec 0x00000030 Code RO 638 i.hal_timer_deinit CVWL668T.lib(hal_timer.o) + 0x0001851c 0x0001851c 0x0000001c Code RO 640 i.hal_timer_init CVWL668T.lib(hal_timer.o) + 0x00018538 0x00018538 0x00000008 Code RO 641 i.hal_timer_set_repeat CVWL668T.lib(hal_timer.o) + 0x00018540 0x00018540 0x00000030 Code RO 425 i.hal_tx_frame_rate_adjust CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018570 0x00018570 0x00000094 Code RO 664 i.hal_uart_init CVWL668T.lib(hal_uart.o) + 0x00018604 0x00018604 0x0000001c Code RO 667 i.hal_uart_send_blocking CVWL668T.lib(hal_uart.o) + 0x00018620 0x00018620 0x00000018 Code RO 426 i.hal_vsync_func_update CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018638 0x00018638 0x000000e0 Code RO 708 i.hal_vsync_reset_lcdc_scaler CVWL668T.lib(hal_internal_vsync.o) + 0x00018718 0x00018718 0x00000038 Code RO 3 i.main main.o + 0x00018750 0x00018750 0x000000a4 Code RO 109 i.pps_update_handle rm_note11pro_demo.o + 0x000187f4 0x000187f4 0x000002f4 Code RO 709 i.rxbr_irq1_callback CVWL668T.lib(hal_internal_vsync.o) + 0x00018ae8 0x00018ae8 0x00000044 Code RO 710 i.soft_double_buffer_update CVWL668T.lib(hal_internal_vsync.o) + 0x00018b2c 0x00018b2c 0x0000006c Code RO 711 i.soft_gen_te CVWL668T.lib(hal_internal_vsync.o) + 0x00018b98 0x00018b98 0x000000e0 Code RO 712 i.soft_gen_te_double_buffer CVWL668T.lib(hal_internal_vsync.o) + 0x00018c78 0x00018c78 0x00000038 Code RO 713 i.soft_pro_motion_init CVWL668T.lib(hal_internal_vsync.o) + 0x00018cb0 0x00018cb0 0x00000024 Code RO 714 i.soft_tear_adjust_line CVWL668T.lib(hal_internal_vsync.o) + 0x00018cd4 0x00018cd4 0x00000018 Code RO 587 i.stop_sleep_cb CVWL668T.lib(hal_pwr.o) + 0x00018cec 0x00018cec 0x000000ac Code RO 819 i.svs_direct_mode_setting CVWL668T.lib(hal_internal_svs.o) + 0x00018d98 0x00018d98 0x0000001c Code RO 820 i.svs_get_rel_intv CVWL668T.lib(hal_internal_svs.o) + 0x00018db4 0x00018db4 0x000000b0 Code RO 821 i.svs_sync_handle CVWL668T.lib(hal_internal_svs.o) + 0x00018e64 0x00018e64 0x000000cc Code RO 822 i.svs_wait_fr_stab CVWL668T.lib(hal_internal_svs.o) + 0x00018f30 0x00018f30 0x0000010c Code RO 823 i.svs_wait_start CVWL668T.lib(hal_internal_svs.o) + 0x0001903c 0x0001903c 0x00000034 Code RO 623 i.tau_log_init CVWL668T.lib(tau_log.o) + 0x00019070 0x00019070 0x00000084 Code RO 624 i.tau_log_printf CVWL668T.lib(tau_log.o) + 0x000190f4 0x000190f4 0x00000076 Code RO 625 i.tau_log_push_log CVWL668T.lib(tau_log.o) + 0x0001916a 0x0001916a 0x00000002 PAD + 0x0001916c 0x0001916c 0x000000b4 Code RO 715 i.vidc_callback CVWL668T.lib(hal_internal_vsync.o) + 0x00019220 0x00019220 0x00000118 Code RO 716 i.vpre_err_reset CVWL668T.lib(hal_internal_vsync.o) + 0x00019338 0x00019338 0x000012c4 Data RO 110 .constdata rm_note11pro_demo.o + 0x0001a5fc 0x0001a5fc 0x00000028 Data RO 328 .constdata CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001a624 0x0001a624 0x0000001c Data RO 429 .constdata CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0001a640 0x0001a640 0x000000b6 Data RO 502 .constdata CVWL668T.lib(hal_gpio.o) + 0x0001a6f6 0x0001a6f6 0x00000002 PAD + 0x0001a6f8 0x0001a6f8 0x00000030 Data RO 669 .constdata CVWL668T.lib(hal_uart.o) + 0x0001a728 0x0001a728 0x00000010 Data RO 1770 .constdata CVWL668T.lib(drv_uart.o) + 0x0001a738 0x0001a738 0x00000043 Data RO 111 .conststring rm_note11pro_demo.o + 0x0001a77b 0x0001a77b 0x00000001 PAD + 0x0001a77c 0x0001a77c 0x00000042 Data RO 329 .conststring CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001a7be 0x0001a7be 0x00000002 PAD + 0x0001a7c0 0x0001a7c0 0x00000090 Data RO 718 .conststring CVWL668T.lib(hal_internal_vsync.o) + 0x0001a850 0x0001a850 0x00000046 Data RO 767 .conststring CVWL668T.lib(hal_internal_dcs.o) + 0x0001a896 0x0001a896 0x00000002 PAD + 0x0001a898 0x0001a898 0x00000020 Data RO 2184 Region$$Table anon$$obj.o + + + Execution Region RW_IRAM1 (Exec base: 0x00070000, Load base: 0x0001a8b8, Size: 0x000030f8, Max: 0x00008000, ABSOLUTE, COMPRESSED[0x00000150]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070000 COMPRESSED 0x00000090 Data RW 112 .data rm_note11pro_demo.o + 0x00070090 COMPRESSED 0x00000030 Data RW 330 .data CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000700c0 COMPRESSED 0x0000005c Data RW 430 .data CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0007011c COMPRESSED 0x00000002 Data RW 532 .data CVWL668T.lib(hal_swire.o) + 0x0007011e COMPRESSED 0x00000002 PAD + 0x00070120 COMPRESSED 0x00000008 Data RW 588 .data CVWL668T.lib(hal_pwr.o) + 0x00070128 COMPRESSED 0x00000001 Data RW 628 .data CVWL668T.lib(tau_log.o) + 0x00070129 COMPRESSED 0x00000003 PAD + 0x0007012c COMPRESSED 0x00000018 Data RW 670 .data CVWL668T.lib(hal_uart.o) + 0x00070144 COMPRESSED 0x00000010 Data RW 719 .data CVWL668T.lib(hal_internal_vsync.o) + 0x00070154 COMPRESSED 0x00000024 Data RW 768 .data CVWL668T.lib(hal_internal_dcs.o) + 0x00070178 COMPRESSED 0x0000000c Data RW 852 .data CVWL668T.lib(drv_common.o) + 0x00070184 COMPRESSED 0x00000001 Data RW 853 .data CVWL668T.lib(drv_common.o) + 0x00070185 COMPRESSED 0x00000003 PAD + 0x00070188 COMPRESSED 0x00000004 Data RW 939 .data CVWL668T.lib(drv_gpio.o) + 0x0007018c COMPRESSED 0x00000004 Data RW 1091 .data CVWL668T.lib(drv_swire.o) + 0x00070190 COMPRESSED 0x00000050 Data RW 1139 .data CVWL668T.lib(drv_timer.o) + 0x000701e0 COMPRESSED 0x00000004 Data RW 1180 .data CVWL668T.lib(drv_se.o) + 0x000701e4 COMPRESSED 0x00000001 Data RW 1220 .data CVWL668T.lib(drv_dsi_rx.o) + 0x000701e5 COMPRESSED 0x00000003 PAD + 0x000701e8 COMPRESSED 0x00000008 Data RW 1555 .data CVWL668T.lib(drv_rxbr.o) + 0x000701f0 COMPRESSED 0x00000004 Data RW 1642 .data CVWL668T.lib(drv_vidc.o) + 0x000701f4 COMPRESSED 0x00000190 Data RW 1717 .data CVWL668T.lib(drv_dma.o) + 0x00070384 COMPRESSED 0x00000004 Data RW 2160 .data mc_p.l(stdout.o) + 0x00070388 - 0x000000d0 Zero RW 327 .bss CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00070458 - 0x000000b8 Zero RW 428 .bss CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00070510 - 0x00000100 Zero RW 627 .bss CVWL668T.lib(tau_log.o) + 0x00070610 - 0x00000044 Zero RW 717 .bss CVWL668T.lib(hal_internal_vsync.o) + 0x00070654 - 0x00000800 Zero RW 765 .bss CVWL668T.lib(hal_internal_dcs.o) + 0x00070e54 - 0x000000ff Zero RW 766 .bss CVWL668T.lib(hal_internal_dcs.o) + 0x00070f53 COMPRESSED 0x00000001 PAD + 0x00070f54 - 0x00000044 Zero RW 794 .bss CVWL668T.lib(hal_internal_fb.o) + 0x00070f98 - 0x00000044 Zero RW 824 .bss CVWL668T.lib(hal_internal_svs.o) + 0x00070fdc - 0x00000040 Zero RW 938 .bss CVWL668T.lib(drv_gpio.o) + 0x0007101c - 0x0000106c Zero RW 1163 .bss CVWL668T.lib(dcs_packet_fifo.o) + 0x00072088 - 0x00000010 Zero RW 1715 .bss CVWL668T.lib(drv_dma.o) + 0x00072098 - 0x00000060 Zero RW 1769 .bss CVWL668T.lib(drv_uart.o) + 0x000720f8 - 0x00001000 Zero RW 277 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 24 4 0 0 0 589 board.o + 56 34 0 0 0 13163 main.o + 2178 734 4871 144 0 31366 rm_note11pro_demo.o + 120 18 192 0 4096 2148 startup_armcm0.o + + ---------------------------------------------------------------------- + 2380 790 5096 144 4096 47266 Object Totals + 0 0 32 0 0 0 (incl. Generated) + 2 0 1 0 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4204 252 dcs_packet_fifo.o + 104 62 28 13 0 192 drv_common.o + 536 90 0 0 0 792 drv_crgu.o + 136 22 0 400 16 196 drv_dma.o + 144 34 0 0 0 248 drv_dsc_dec.o + 1904 682 0 1 0 1340 drv_dsi_rx.o + 1704 306 0 0 0 2036 drv_dsi_tx.o + 148 0 0 0 0 260 drv_efuse.o + 296 40 0 4 64 1000 drv_gpio.o + 1136 180 0 0 0 1680 drv_lcdc.o + 658 104 0 0 0 1240 drv_memc.o + 40 0 0 0 0 120 drv_phy_common.o + 592 132 0 0 0 716 drv_pwr.o + 534 108 0 8 0 1180 drv_rxbr.o + 972 266 0 4 0 488 drv_se.o + 264 54 0 4 0 560 drv_swire.o + 220 40 0 0 0 428 drv_sys_cfg.o + 366 38 0 80 0 816 drv_timer.o + 1172 54 16 0 96 980 drv_uart.o + 824 152 0 4 0 1700 drv_vidc.o + 2808 208 106 48 208 1460 hal_dsi_rx_ctrl.o + 4342 338 50 92 184 2280 hal_dsi_tx_ctrl.o + 440 32 182 0 0 688 hal_gpio.o + 2140 506 70 36 2303 652 hal_internal_dcs.o + 1348 58 0 0 68 700 hal_internal_fb.o + 1284 194 0 0 68 912 hal_internal_svs.o + 3974 810 144 16 68 1772 hal_internal_vsync.o + 308 32 0 8 0 616 hal_pwr.o + 344 32 0 2 0 348 hal_swire.o + 308 56 0 0 0 136 hal_system.o + 84 0 0 0 0 204 hal_timer.o + 176 18 48 24 0 144 hal_uart.o + 68 4 0 0 0 136 tau_delay.o + 354 30 16 1 256 320 tau_log.o + 200 20 0 0 0 76 ceil.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 26 0 0 0 0 72 memcmp.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 14 0 0 0 0 60 strlen.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfcmple.o + 20 0 0 0 0 68 cfrcmple.o + 56 0 0 0 0 68 d2f.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 40 0 0 0 0 60 ffixui.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 35048 4896 668 760 7536 29652 Library Totals + 38 0 8 11 1 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 29944 4714 660 745 7535 26592 CVWL668T.lib + 200 20 0 0 0 76 m_ps.l + 2866 120 0 4 0 1336 mc_p.l + 2000 42 0 0 0 1648 mf_p.l + + ---------------------------------------------------------------------- + 35048 4896 668 760 7536 29652 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 37428 5686 5764 904 11632 57230 Grand Totals + 37428 5686 5764 336 11632 57230 ELF Image Totals (compressed) + 37428 5686 5764 336 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 43192 ( 42.18kB) + Total RW Size (RW Data + ZI Data) 12536 ( 12.24kB) + Total ROM Size (Code + RO Data + RW Data) 43528 ( 42.51kB) + +============================================================================== + diff --git a/project/WL668T/Listings/WL668T_Note11Pro_3520_20240416.map b/project/WL668T/Listings/WL668T_Note11Pro_3520_20240416.map new file mode 100644 index 0000000..67ab3d9 --- /dev/null +++ b/project/WL668T/Listings/WL668T_Note11Pro_3520_20240416.map @@ -0,0 +1,3995 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to honor90pro_demo.o(i.Note11Pro_demo) for Note11Pro_demo + main.o(i.main) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + honor90pro_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + honor90pro_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + honor90pro_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + honor90pro_demo.o(i.Note11Pro_demo) refers to hal_pwr.o(i.hal_pwr_set_main_power) for hal_pwr_set_main_power + honor90pro_demo.o(i.Note11Pro_demo) refers to honor90pro_demo.o(i.app_display_init) for app_display_init + honor90pro_demo.o(i.Note11Pro_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) for hal_dsi_rx_ctrl_dcs_async_handler + honor90pro_demo.o(i.Note11Pro_demo) refers to honor90pro_demo.o(i.app_system_suspend) for app_system_suspend + honor90pro_demo.o(i.Note11Pro_demo) refers to hal_pwr.o(i.hal_pwr_exit_sleep_mode) for hal_pwr_exit_sleep_mode + honor90pro_demo.o(i.Note11Pro_demo) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.Note11Pro_demo) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + honor90pro_demo.o(i.ap_dcs_read) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + honor90pro_demo.o(i.ap_dcs_read) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.ap_dcs_set_display_off) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.ap_dcs_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + honor90pro_demo.o(i.ap_dcs_set_display_off) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.ap_dcs_set_display_on) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.ap_dcs_set_display_on) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) for hal_dsi_tx_ctrl_set_tear_mode + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_swire.o(i.hal_swire_enable) for hal_swire_enable + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) refers to honor90pro_demo.o(i.ap_rstn_pull_down_cb) for ap_rstn_pull_down_cb + honor90pro_demo.o(i.ap_dcs_set_exit_sleep_mode) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.ap_rstn_pull_down_cb) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + honor90pro_demo.o(i.ap_rstn_pull_down_cb) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.ap_rstn_pull_down_cb) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.ap_rstn_pull_high_cb) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + honor90pro_demo.o(i.ap_rstn_pull_high_cb) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.ap_set_backlight) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.ap_set_backlight) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + honor90pro_demo.o(i.ap_update_frame_rate) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) for hal_dsi_rx_ctrl_toggle_input_frame_rate + honor90pro_demo.o(i.ap_update_frame_rate) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.ap_update_frame_rate) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.app_display_init) refers to honor90pro_demo.o(i.app_mipi_rx_init) for app_mipi_rx_init + honor90pro_demo.o(i.app_display_init) refers to hal_pwr.o(i.hal_pwr_get_vcc_power_ready) for hal_pwr_get_vcc_power_ready + honor90pro_demo.o(i.app_display_init) refers to honor90pro_demo.o(i.app_gpio_init) for app_gpio_init + honor90pro_demo.o(i.app_display_init) refers to hal_swire.o(i.hal_swire_init) for hal_swire_init + honor90pro_demo.o(i.app_display_init) refers to hal_swire.o(i.hal_swire_set_timer) for hal_swire_set_timer + honor90pro_demo.o(i.app_display_init) refers to honor90pro_demo.o(i.app_mipi_tx_init) for app_mipi_tx_init + honor90pro_demo.o(i.app_display_init) refers to honor90pro_demo.o(i.app_init_panel) for app_init_panel + honor90pro_demo.o(i.app_display_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + honor90pro_demo.o(i.app_display_init) refers to tau_delay.o(i.delayMs) for delayMs + honor90pro_demo.o(i.app_display_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + honor90pro_demo.o(i.app_display_init) refers to hal_swire.o(i.hal_swire_set_pulse) for hal_swire_set_pulse + honor90pro_demo.o(i.app_display_init) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.app_display_init) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.app_gpio_init) refers to hal_gpio.o(i.hal_gpio_config_pad) for hal_gpio_config_pad + honor90pro_demo.o(i.app_gpio_init) refers to honor90pro_demo.o(.constdata) for .constdata + honor90pro_demo.o(i.app_init_panel) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + honor90pro_demo.o(i.app_init_panel) refers to tau_delay.o(i.delayMs) for delayMs + honor90pro_demo.o(i.app_init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + honor90pro_demo.o(i.app_init_panel) refers to tau_delay.o(i.delayUs) for delayUs + honor90pro_demo.o(i.app_init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + honor90pro_demo.o(i.app_init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + honor90pro_demo.o(i.app_init_panel) refers to hal_swire.o(i.hal_swire_enable) for hal_swire_enable + honor90pro_demo.o(i.app_init_panel) refers to hal_swire.o(i.hal_swire_set_pulse) for hal_swire_set_pulse + honor90pro_demo.o(i.app_init_panel) refers to honor90pro_demo.o(.constdata) for .constdata + honor90pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + honor90pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) for hal_dsi_rx_ctrl_set_check_crc + honor90pro_demo.o(i.app_mipi_rx_init) refers to memcpya.o(.text) for __aeabi_memcpy4 + honor90pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + honor90pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + honor90pro_demo.o(i.app_mipi_rx_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + honor90pro_demo.o(i.app_mipi_rx_init) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.app_mipi_rx_init) refers to honor90pro_demo.o(.constdata) for .constdata + honor90pro_demo.o(i.app_mipi_rx_init) refers to honor90pro_demo.o(i.ap_dcs_read) for ap_dcs_read + honor90pro_demo.o(i.app_mipi_rx_init) refers to honor90pro_demo.o(i.pps_update_handle) for pps_update_handle + honor90pro_demo.o(i.app_mipi_tx_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + honor90pro_demo.o(i.app_mipi_tx_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + honor90pro_demo.o(i.app_mipi_tx_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + honor90pro_demo.o(i.app_mipi_tx_init) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.app_system_suspend) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + honor90pro_demo.o(i.app_system_suspend) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + honor90pro_demo.o(i.app_system_suspend) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + honor90pro_demo.o(i.app_system_suspend) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + honor90pro_demo.o(i.app_system_suspend) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + honor90pro_demo.o(i.app_system_suspend) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + honor90pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_set_sleep_mode_power) for hal_pwr_set_sleep_mode_power + honor90pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) for hal_pwr_enter_deep_sleep_mode + honor90pro_demo.o(i.app_system_suspend) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + honor90pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) for hal_pwr_enter_normal_sleep_mode + honor90pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) for hal_pwr_set_stop_sleep_wakeup_pin + honor90pro_demo.o(i.app_system_suspend) refers to hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) for hal_pwr_enter_stop_sleep_mode + honor90pro_demo.o(i.app_system_suspend) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.app_system_suspend) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(i.app_system_suspend) refers to honor90pro_demo.o(i.ap_rstn_pull_high_cb) for ap_rstn_pull_high_cb + honor90pro_demo.o(i.pps_update_handle) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) for hal_dsi_tx_ctrl_set_tear_mode + honor90pro_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + honor90pro_demo.o(i.pps_update_handle) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + honor90pro_demo.o(i.pps_update_handle) refers to honor90pro_demo.o(.data) for .data + honor90pro_demo.o(.constdata) refers to honor90pro_demo.o(i.ap_dcs_set_display_on) for ap_dcs_set_display_on + honor90pro_demo.o(.constdata) refers to honor90pro_demo.o(i.ap_dcs_set_display_off) for ap_dcs_set_display_off + honor90pro_demo.o(.constdata) refers to honor90pro_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + honor90pro_demo.o(.constdata) refers to honor90pro_demo.o(i.ap_set_backlight) for ap_set_backlight + honor90pro_demo.o(.constdata) refers to honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) for ap_dcs_set_enter_sleep_mode + honor90pro_demo.o(.constdata) refers to honor90pro_demo.o(i.ap_dcs_set_exit_sleep_mode) for ap_dcs_set_exit_sleep_mode + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to tau_log.o(i.tau_log_init) for tau_log_init + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to drv_common.o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to drv_common.o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to drv_vidc.o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to hal_internal_vsync.o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_memc.o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to hal_internal_dcs.o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_dma.o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_timer.o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_uart.o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_rxbr.o(i.VPRE1_IRQn_Handler) for VPRE1_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_swire.o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to drv_gpio.o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_md) for drv_rxbr_set_ack_pkt_md + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_lpdt_fifo_status) for drv_dsi_rx_get_lpdt_fifo_status + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to hal_dsi_rx_ctrl.o(i.swap_uint16_t) for swap_uint16_t + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex) for hal_dsi_rx_ctrl_set_pixel_data_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_rxbr.o(i.drv_rxbr_swpxl_clr) for drv_rxbr_swpxl_clr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to drv_rxbr.o(i.drv_rxbr_set_swpxl_data) for drv_rxbr_set_swpxl_data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) for hal_dsi_rx_ctrl_set_rx_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.constdata) for .constdata + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_force_video_crtl) refers to drv_dsi_rx.o(i.drv_dsi_rx_force_video_crtl) for drv_dsi_rx_force_video_crtl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_cap_pixel_color) refers to drv_vidc.o(i.drv_vidc_get_status2) for drv_vidc_get_status2 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_irqen) for drv_dsc_dec_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_se.o(i.drv_se_start_rx) for drv_se_start_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_pwr.o(i.drv_pwr_set_pll_clk) for drv_pwr_set_pll_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_clk) for drv_crgu_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_clk) for drv_crgu_set_dsc_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_clk) for drv_crgu_set_vidc_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_clk) for drv_crgu_set_fb_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en) for drv_dsi_rx_set_ddi_crc_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt) for drv_dsi_rx_set_ipi_ycbcr_frmt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en) for drv_dsi_rx_set_tear_resp_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) for drv_dsi_rx_set_check_crc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_circ_mode_enable) for drv_memc_set_circ_mode_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_pu_thres) for drv_memc_set_ltpo_pu_thres + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) for hal_intl_dcs_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_circ_mode_enable) for drv_vidc_set_circ_mode_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dither_config) for drv_vidc_set_dither_config + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_vintp_config) for drv_vidc_set_vintp_config + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_honly_hinitr) for drv_vidc_set_honly_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_honly_hinitb) for drv_vidc_set_honly_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_honly_hcoef0) for drv_vidc_set_honly_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.constdata) for .constdata + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to hal_internal_vsync.o(i.hal_internal_sync_register_rx_callback) for hal_internal_sync_register_rx_callback + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to drv_vidc.o(i.drv_vidc_set_irq_line) for drv_vidc_set_irq_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_write_cmd_entry) refers to hal_internal_dcs.o(i.hal_intl_dcs_register_write_cmd_entry) for hal_intl_dcs_register_write_cmd_entry + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_response) for drv_rxbr_set_cmd_response + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) for hal_intl_dcs_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cap_pixel_pos) refers to drv_vidc.o(i.drv_vidc_debug_cap_pixel) for drv_vidc_debug_cap_pixel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) for drv_dsi_rx_set_check_crc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_log_level) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_drv_log_level) for drv_dsi_rx_set_drv_log_level + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to drv_rxbr.o(i.drv_rxbr_sw_reset) for drv_rxbr_sw_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex) refers to drv_rxbr.o(i.drv_rxbr_sw_reset) for drv_rxbr_sw_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) for hal_intl_svs_update_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_clk) for drv_crgu_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) for hal_internal_vsync_toggle_input_frame_rate + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) for hal_internal_sync_register_lcdc_cb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) for hal_internal_sync_set_fb_setting_manual + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame) refers to drv_lcdc.o(i.drv_lcdc_fixed_frame_output) for drv_lcdc_fixed_frame_output + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_get_tear_mode) for drv_memc_get_tear_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) for hal_internal_sync_register_lcdc_cb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) for hal_dsi_tx_init_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) for hal_dsi_tx_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) for hal_nonshadow_func_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) for hal_vsync_func_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_overwrite_enable) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_overwrite_enable) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_partial_disp_enable) refers to drv_lcdc.o(i.drv_lcdc_part_display_config) for drv_lcdc_part_display_config + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_partial_disp_enable) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_sync_line) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) for hal_nonshadow_func_req_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick) for hal_dsi_tx_ctrl_draw_flick + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_cfg_int_frame) for drv_lcdc_cfg_int_frame + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_start) for hal_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_stop_display) for drv_lcdc_stop_display + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) for hal_dsi_tx_ctrl_read_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to drv_crgu.o(i.drv_crgu_set_dpi_clk) for drv_crgu_set_dpi_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) for hal_dsi_tx_timing_info_update + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) for hal_dsi_tx_cmd_mode_cal_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) for hal_dsi_tx_init_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) for hal_dsi_tx_vid_mode_cal_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) for hal_dsi_tx_init_vid_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) refers to d2f.o(.text) for __aeabi_d2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_internal_svs.o(i.hal_intl_svs_init_tx) for hal_intl_svs_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) refers to hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) for hal_tx_frame_rate_adjust + hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) refers to drv_lcdc.o(i.drv_lcdc_endianness_config) for drv_lcdc_endianness_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) refers to drv_lcdc.o(i.drv_lcdc_crop_hact) for drv_lcdc_crop_hact + hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) for hal_lcdc_postproc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) for hal_lcdc_displayproc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) for hal_intl_fb_get_tx_fb_info + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) for hal_lcdc_timinggen_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_clk) for drv_crgu_set_lcdc_clk + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) for hal_intl_fb_get_tx_fb_info + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) for hal_lcdc_upscaler_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_fldc_config) for drv_lcdc_fldc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_bcsa_config) for drv_lcdc_bcsa_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_fc_config) for drv_lcdc_fc_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_edge_dect_config) for drv_lcdc_edge_dect_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_edge_enh_config) for drv_lcdc_edge_enh_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_vintp_mode_config) for drv_lcdc_vintp_mode_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to drv_lcdc.o(i.drv_lcdc_dith_config) for drv_lcdc_dith_config + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for .ARM.__at_0x1102C + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to drv_lcdc.o(i.drv_lcdc_vid_hw_start) for drv_lcdc_vid_hw_start + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_start) refers to drv_lcdc.o(i.drv_lcdc_cmd_start) for drv_lcdc_cmd_start + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) for hal_intl_fb_get_memc_flow_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) refers to drv_lcdc.o(i.drv_lcdc_set_prefetch) for drv_lcdc_set_prefetch + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for sg_pq_para + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_bcsa_config) for drv_lcdc_bcsa_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_fc_config) for drv_lcdc_fc_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_edge_dect_config) for drv_lcdc_edge_dect_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_edge_enh_config) for drv_lcdc_edge_enh_config + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) refers to hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) for sg_pq_para + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to cfcmple.o(.text) for __aeabi_cfcmple + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_gpio.o(i.hal_gpio_config_pad) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_config_pad) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_gpio.o(i.hal_gpio_config_pad) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_high_impedance) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode) for drv_gpio_set_mode + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_get_attribute) for drv_gpio_get_attribute + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_attribute) for drv_gpio_set_attribute + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_swire.o(i.hal_swire_deinit) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + hal_swire.o(i.hal_swire_deinit) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_get_pulse_count) for drv_swire_get_pulse_count + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_set_trig_mode) for drv_swire_set_trig_mode + hal_swire.o(i.hal_swire_enable) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_swire.o(i.hal_swire_enable) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_enable) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock_div) for drv_crgu_set_clock_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_init) refers to drv_common.o(.data) for g_system_clock + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_set_pulse) refers to drv_swire.o(i.drv_swire_set_trig_mode) for drv_swire_set_trig_mode + hal_swire.o(i.hal_swire_set_pulse) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_set_pulse) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_set_timer) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer) for drv_sys_cfg_sel_swire_timer + hal_swire.o(i.hal_swire_set_timer) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + hal_swire.o(i.hal_swire_set_timer) refers to hal_timer.o(i.hal_timer_set_repeat) for hal_timer_set_repeat + hal_swire.o(i.hal_swire_set_timer) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_swire.o(i.hal_swire_set_timer) refers to drv_swire.o(i.drv_swire_set_trig_mode) for drv_swire_set_trig_mode + hal_swire.o(i.hal_swire_set_timer) refers to hal_swire.o(.data) for .data + hal_swire.o(i.hal_swire_set_waveform) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_set_waveform) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_set_waveform) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pll_clk) for drv_pwr_set_pll_clk + hal_system.o(i.hal_system_init) refers to hal_system.o(i.hal_system_updata_sysclk) for hal_system_updata_sysclk + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_reset_chip) refers to drv_crgu.o(i.drv_crgu_reset_chip) for drv_crgu_reset_chip + hal_system.o(i.hal_system_updata_sysclk) refers to drv_crgu.o(i.drv_crgu_set_ahb_clk) for drv_crgu_set_ahb_clk + hal_system.o(i.hal_system_updata_sysclk) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_updata_sysclk) refers to drv_common.o(.data) for g_system_delay_step + hal_pwr.o(i.hal_pwr_elvcc_close) refers to drv_pwr.o(i.drv_pwr_pwmled_electric_current) for drv_pwr_pwmled_electric_current + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_pwmled_electric_current) for drv_pwr_pwmled_electric_current + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_hv_ldo_mode_sel) for drv_pwr_hv_ldo_mode_sel + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_hv_ldo_mode_clock_sel) for drv_pwr_hv_ldo_mode_clock_sel + hal_pwr.o(i.hal_pwr_elvcc_ldo_en) refers to drv_pwr.o(i.drv_pwr_pwmled_driver_current_Big_step) for drv_pwr_pwmled_driver_current_Big_step + hal_pwr.o(i.hal_pwr_elvcc_vol_set) refers to drv_pwr.o(i.drv_pwr_hv_ldo_voltage_set) for drv_pwr_hv_ldo_voltage_set + hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_set_wakeup_type) for drv_pwr_set_wakeup_type + hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex) for drv_pwr_enter_sleep_mode_ex + hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) for drv_pwr_enter_stop_sleep_mode + hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) refers to hal_pwr.o(.data) for .data + hal_pwr.o(i.hal_pwr_exit_sleep_mode) refers to drv_pwr.o(i.drv_pwr_exit_sleep_mode) for drv_pwr_exit_sleep_mode + hal_pwr.o(i.hal_pwr_get_reset_flag) refers to drv_crgu.o(i.drv_crgu_get_all_reset_flag) for drv_crgu_get_all_reset_flag + hal_pwr.o(i.hal_pwr_get_reset_flag) refers to drv_pwr.o(i.drv_pwr_get_wakeflag) for drv_pwr_get_wakeflag + hal_pwr.o(i.hal_pwr_get_reset_flag) refers to drv_crgu.o(i.drv_crgu_clear_all_reset_flags) for drv_crgu_clear_all_reset_flags + hal_pwr.o(i.hal_pwr_get_vcc_power_ready) refers to drv_pwr.o(i.drv_pwr_get_power_ready_st) for drv_pwr_get_power_ready_st + hal_pwr.o(i.hal_pwr_ldo13s_en) refers to drv_pwr.o(i.drv_pwr_ldo13s_en) for drv_pwr_ldo13s_en + hal_pwr.o(i.hal_pwr_ldo13s_set) refers to drv_pwr.o(i.drv_pwr_ldo13s_set) for drv_pwr_ldo13s_set + hal_pwr.o(i.hal_pwr_ldo18s_en) refers to drv_pwr.o(i.drv_pwr_ldo18s_en) for drv_pwr_ldo18s_en + hal_pwr.o(i.hal_pwr_ldo18s_set) refers to drv_pwr.o(i.drv_pwr_ldo18s_set) for drv_pwr_ldo18s_set + hal_pwr.o(i.hal_pwr_set_main_power) refers to drv_pwr.o(i.drv_pwr_set_digit_power_sel) for drv_pwr_set_digit_power_sel + hal_pwr.o(i.hal_pwr_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd) for drv_pwr_set_pvd + hal_pwr.o(i.hal_pwr_set_sleep_mode_power) refers to drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) for drv_pwr_set_breath_screen_power_sel + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_pwr.o(.data) for .data + hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) refers to hal_pwr.o(i.stop_sleep_cb) for stop_sleep_cb + hal_pwr.o(i.hal_pwr_set_vcc_enable) refers to drv_pwr.o(i.drv_pwr_charge_pump_en) for drv_pwr_charge_pump_en + hal_pwr.o(i.hal_pwr_sw_tp18_en) refers to drv_pwr.o(i.drv_pwr_sw_tp18_en) for drv_pwr_sw_tp18_en + hal_pwr.o(i.stop_sleep_cb) refers to hal_pwr.o(.data) for .data + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_delay.o(i.delayUs) refers to drv_common.o(.data) for g_system_delay_step + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_recv_blocking) for hal_uart_recv_blocking + tau_log.o(i.fgetc) refers to hal_system.o(i.hal_system_get_debug_state) for hal_system_get_debug_state + tau_log.o(i.fgetc) refers to hal_system.o(i.hal_system_clear_debug_state) for hal_system_clear_debug_state + tau_log.o(i.fgetc) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.fputc) refers to tau_log.o(i.tau_log_push_log) for tau_log_push_log + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_send_blocking) for hal_uart_send_blocking + tau_log.o(i.fputc) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.tau_log_init) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + tau_log.o(i.tau_log_init) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.tau_log_printf) refers to memseta.o(.text) for __aeabi_memclr4 + tau_log.o(i.tau_log_printf) refers to strlen.o(.text) for strlen + tau_log.o(i.tau_log_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.tau_log_printf) refers to tau_log.o(i.tau_log_push_log) for tau_log_push_log + tau_log.o(i.tau_log_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.tau_log_printf) refers to tau_log.o(.data) for g_log_port + tau_log.o(i.tau_log_printf) refers to tau_log.o(.bss) for g_log_buf + tau_log.o(i.tau_log_push_log) refers to memcpya.o(.text) for __aeabi_memcpy + tau_log.o(i.tau_log_push_log) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(.ARM.__at_0x1101C) refers to tau_log.o(.bss) for g_log_buf + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_uart.o(i.hal_uart0_rx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart0_tx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart1_rx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart1_tx_dma_cb) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.drv_uart_deinit) for drv_uart_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_uart.o(i.hal_uart_deinit) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_dma_path_close) refers to drv_dma.o(i.drv_dma_disable) for drv_dma_disable + hal_uart.o(i.hal_uart_dma_path_close) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_dma_path_close) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_apply_handle) for drv_dma_apply_handle + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_register_callback) for drv_dma_register_callback + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_enable_int) for drv_dma_enable_int + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_disable) for drv_dma_disable + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_set_mem_trans_info) for drv_dma_set_mem_trans_info + hal_uart.o(i.hal_uart_dma_recv) refers to drv_dma.o(i.drv_dma_enable) for drv_dma_enable + hal_uart.o(i.hal_uart_dma_recv) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_uart.o(i.hal_uart_dma_recv) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_dma_recv) refers to hal_uart.o(i.hal_uart0_rx_dma_cb) for hal_uart0_rx_dma_cb + hal_uart.o(i.hal_uart_dma_recv) refers to hal_uart.o(i.hal_uart1_rx_dma_cb) for hal_uart1_rx_dma_cb + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_apply_handle) for drv_dma_apply_handle + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_register_callback) for drv_dma_register_callback + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_enable_int) for drv_dma_enable_int + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_disable) for drv_dma_disable + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_set_mem_trans_info) for drv_dma_set_mem_trans_info + hal_uart.o(i.hal_uart_dma_send) refers to drv_dma.o(i.drv_dma_enable) for drv_dma_enable + hal_uart.o(i.hal_uart_dma_send) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_uart.o(i.hal_uart_dma_send) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_dma_send) refers to hal_uart.o(i.hal_uart0_tx_dma_cb) for hal_uart0_tx_dma_cb + hal_uart.o(i.hal_uart_dma_send) refers to hal_uart.o(i.hal_uart1_tx_dma_cb) for hal_uart1_tx_dma_cb + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.drv_uart_init) for drv_uart_init + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.drv_uart_trans_create_handle) for drv_uart_trans_create_handle + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.data) for .data + hal_uart.o(i.hal_uart_recv_blocking) refers to drv_uart.o(i.drv_uart_recv_blocking) for drv_uart_recv_blocking + hal_uart.o(i.hal_uart_recv_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_recv_none_blocking) refers to drv_uart.o(i.drv_uart_recv_none_blocking) for drv_uart_recv_none_blocking + hal_uart.o(i.hal_uart_recv_none_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_send_blocking) refers to drv_uart.o(i.drv_uart_send_blocking) for drv_uart_send_blocking + hal_uart.o(i.hal_uart_send_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_uart.o(i.hal_uart_send_none_blocking) refers to drv_uart.o(i.drv_uart_send_none_blocking) for drv_uart_send_none_blocking + hal_uart.o(i.hal_uart_send_none_blocking) refers to hal_uart.o(.constdata) for .constdata + hal_internal_vsync.o(i.LCDC_IRQn_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) for hal_intl_fb_cal_fb_info + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) for hal_dsi_tx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_register_rx_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) for hal_intl_fb_set_fb_info_manual + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) for hal_intl_fb_cal_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_svs.o(i.hal_intl_svs_init_rx) for hal_intl_svs_init_rx + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) for hal_intl_dcs_init_sw_fltr + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_pro_motion_init) for soft_pro_motion_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) for hal_intl_fb_cal_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_svs.o(i.hal_intl_svs_deinit_rx) for hal_intl_svs_deinit_rx + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_svs.o(i.hal_intl_svs_set_sync_coef) for hal_intl_svs_set_sync_coef + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_memc.o(i.drv_memc_set_frame_drop_select) for drv_memc_set_frame_drop_select + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_set_tear_line) for drv_lcdc_set_tear_line + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to idiv.o(.text) for __aeabi_idivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_lcdc.o(i.drv_lcdc_config_acc_command_mode) for drv_lcdc_config_acc_command_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_svs.o(i.hal_intl_svs_deinit_tx) for hal_intl_svs_deinit_tx + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.soft_pro_motion_init) for soft_pro_motion_init + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_svs.o(i.hal_intl_svs_set_input_frate) for hal_intl_svs_set_input_frate + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.soft_pro_motion_init) for soft_pro_motion_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.soft_double_buffer_update) for soft_double_buffer_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_svs.o(i.hal_intl_svs_handle) for hal_intl_svs_handle + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_lcdc.o(i.drv_lcdc_cmd_start) for drv_lcdc_cmd_start + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) for hal_intl_svs_set_rx_vtt + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_double_buffer_update) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(i.soft_tear_adjust_line) for soft_tear_adjust_line + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(i.soft_tear_adjust_line) for soft_tear_adjust_line + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_pro_motion_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.soft_pro_motion_init) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_pro_motion_init) refers to hal_internal_fb.o(.bss) for g_rx_fb_info + hal_internal_vsync.o(i.soft_tear_adjust_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_int_source) for drv_vidc_get_int_source + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_function_disable) for drv_lcdc_function_disable + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to hal_internal_dcs.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) for hal_intl_dcs_rx_receive_packet + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_crgu.o(i.drv_crgu_set_dsc_clk) for drv_crgu_set_dsc_clk + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_dcs.o(i.VPRE_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to hal_internal_dcs.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_dcs.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) refers to hal_internal_dcs.o(.bss) for .bss + hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_register_write_cmd_entry) refers to hal_internal_dcs.o(.data) for .data + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) for hal_intl_dcs_sw_filter_handle + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) for hal_dsi_rx_ctrl_dcs_async_handler + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en) for drv_dsi_rx_get_ddi_crc_en + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_dcs.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) refers to hal_internal_dcs.o(.data) for .data + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) for hal_intl_dcs_rx_get_dcs_packet_data + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) for hal_intl_dcs_rx_receive_pps + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to hal_internal_dcs.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to memcmp.o(.text) for memcmp + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to hal_internal_dcs.o(.conststring) for .conststring + hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) refers to memseta.o(.text) for __aeabi_memset + hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_filter_regs) for drv_rxbr_set_filter_regs + hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) refers to hal_internal_dcs.o(.bss) for .bss + hal_internal_dcs.o(i.hal_intl_dcs_set_dcs_direct_mode) refers to hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) for hal_intl_dcs_set_auto_hw_filter + hal_internal_dcs.o(i.hal_intl_dcs_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) refers to hal_internal_dcs.o(.data) for .data + hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) refers to hal_internal_dcs.o(.bss) for .bss + hal_internal_dcs.o(.data) refers to hal_internal_dcs.o(.bss) for g_imm_buffer + hal_internal_fb.o(i.ha_intl_fb_check_pu_size) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.ha_intl_fb_check_pu_size) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) for hal_intl_fb_flow_control_adapter + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) for hal_intl_fb_check_bandwidth + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.ha_intl_fb_check_pu_size) for ha_intl_fb_check_pu_size + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(i.hal_intl_fb_edge_resize) for hal_intl_fb_edge_resize + hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_fb.o(i.hal_intl_fb_edge_resize) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.hal_intl_fb_edge_resize) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_get_user_flow) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to hal_internal_fb.o(.bss) for .bss + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to hal_internal_vsync.o(.bss) for g_vsync_handle + hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual) refers to hal_internal_fb.o(.conststring) for .conststring + hal_internal_svs.o(i.hal_intl_svs_deinit_rx) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.hal_intl_svs_deinit_rx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_deinit_rx) refers to hal_internal_svs.o(i.svs_wait_start) for svs_wait_start + hal_internal_svs.o(i.hal_intl_svs_deinit_tx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_handle) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) for hal_intl_svs_update_rxbr_clk + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_fb.o(i.hal_intl_fb_get_user_flow) for hal_intl_fb_get_user_flow + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_init_rx) refers to hal_internal_svs.o(i.svs_wait_start) for svs_wait_start + hal_internal_svs.o(i.hal_intl_svs_init_tx) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_svs.o(i.svs_wait_start) for svs_wait_start + hal_internal_svs.o(i.hal_intl_svs_set_input_frate) refers to hal_internal_svs.o(i.svs_wait_fr_stab) for svs_wait_fr_stab + hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_set_sync_coef) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_direct_mode_setting) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_svs.o(i.svs_direct_mode_setting) refers to hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) for hal_intl_fb_get_rx_fb_info + hal_internal_svs.o(i.svs_direct_mode_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_svs.o(i.svs_direct_mode_setting) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) for drv_rxbr_hline_rcv1_cfg + hal_internal_svs.o(i.svs_direct_mode_setting) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_get_rel_intv) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_svs.o(i.svs_get_rel_intv) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_sync_handle) refers to hal_internal_svs.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_svs.o(i.svs_sync_handle) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_svs.o(i.svs_sync_handle) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_svs.o(i.svs_sync_handle) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_svs.o(i.svs_sync_handle) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_svs.o(i.svs_sync_handle) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_svs.o(i.svs_sync_handle) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_svs.o(i.svs_sync_handle) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_wait_fr_stab) refers to hal_internal_svs.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_svs.o(i.svs_wait_fr_stab) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_svs.o(i.svs_wait_fr_stab) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_svs.o(i.svs_wait_fr_stab) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + hal_internal_svs.o(i.svs_wait_fr_stab) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_svs.o(i.svs_wait_fr_stab) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_svs.o(i.svs_wait_fr_stab) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_internal_svs.o(i.svs_wait_fr_stab) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_wait_fr_stab) refers to hal_internal_svs.o(i.svs_sync_handle) for svs_sync_handle + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(i.svs_get_rel_intv) for svs_get_rel_intv + hal_internal_svs.o(i.svs_wait_start) refers to drv_crgu.o(i.drv_crgu_get_rxbr_clk) for drv_crgu_get_rxbr_clk + hal_internal_svs.o(i.svs_wait_start) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_svs.o(i.svs_wait_start) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_internal_svs.o(i.svs_wait_start) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_svs.o(i.svs_wait_start) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_svs.o(i.svs_wait_start) refers to ceil.o(i.ceil) for ceil + hal_internal_svs.o(i.svs_wait_start) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(i.svs_direct_mode_setting) for svs_direct_mode_setting + hal_internal_svs.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_svs.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_svs.o(i.svs_wait_start) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) for drv_rxbr_hline_rcv1_cfg + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(.bss) for .bss + hal_internal_svs.o(i.svs_wait_start) refers to hal_internal_svs.o(i.svs_wait_fr_stab) for svs_wait_fr_stab + drv_common.o(i.HardFault_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_common.o(i.SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_se.o(i.drv_se_init) for drv_se_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_crgu.o(i.drv_crgu_get_rxbr_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_crgu.o(i.drv_crgu_get_system_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_se.o(i.drv_se_set_dsc) for drv_se_set_dsc + drv_gpio.o(i.AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(i.drv_gpio_handle_int) for drv_gpio_handle_int + drv_gpio.o(i.drv_gpio_handle_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_handle_int) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_pwr.o(i.drv_pwr_analog_pwm_en) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_elvcc_pwm_en) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_elvcc_pwm_en) refers to tau_delay.o(i.delayMs) for delayMs + drv_pwr.o(i.drv_pwr_enter_sleep_mode) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_enter_sleep_mode) refers to drv_pwr.o(i.drv_pwr_por_mode_flag) for drv_pwr_por_mode_flag + drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_exit_sleep_mode) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_hv_ldo_mode_clock_sel) refers to drv_pwr.o(i.drv_pwr_hv_ldo_10M_clock) for drv_pwr_hv_ldo_10M_clock + drv_pwr.o(i.drv_pwr_pwm_output_pwm_led) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_digit_power_sel) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_system_clk) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_pwr.o(i.drv_pwr_set_wakeup_type) refers to drv_pwr.o(i.drv_pwr_write_lock) for drv_pwr_write_lock + drv_swire.o(i.SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_sys_cfg_sel_dma_req) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_timer.o(i.TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_compare_val) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_common.o(.data) for g_system_clock + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_se.o(i.drv_se_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_se.o(i.drv_se_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_se.o(i.drv_se_init) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_dsc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_dsc) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_lcdc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_lcdc) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_memc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_memc) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_rxbr) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_rxbr) refers to drv_se.o(.data) for .data + drv_se.o(i.drv_se_set_vidc) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_se.o(i.drv_se_set_vidc) refers to drv_se.o(.data) for .data + drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) refers to drv_dsi_rx.o(.data) for .data + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_set_drv_log_level) refers to drv_dsi_rx.o(.data) for .data + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_lcdc.o(i.drv_lcdc_clear_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_cmd_start) refers to drv_se.o(i.drv_se_set_lcdc) for drv_se_set_lcdc + drv_lcdc.o(i.drv_lcdc_ctrl_flow) refers to drv_lcdc.o(i.drv_lcdc_function_enable) for drv_lcdc_function_enable + drv_lcdc.o(i.drv_lcdc_part_display_config) refers to drv_lcdc.o(i.drv_lcdc_pixel_value_config) for drv_lcdc_pixel_value_config + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_lcdc.o(i.drv_lcdc_clear_int) for drv_lcdc_clear_int + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_lcdc.o(i.drv_lcdc_vid_hw_start) refers to drv_se.o(i.drv_se_set_lcdc) for drv_se_set_lcdc + drv_memc.o(i.MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.drv_memc_rate_transfer_sel) refers to drv_se.o(i.drv_se_set_memc) for drv_se_set_memc + drv_memc.o(i.drv_memc_set_ltpo_mode) refers to drv_se.o(i.drv_se_set_memc) for drv_se_set_memc + drv_rxbr.o(i.VPRE1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.VPRE1_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_set_cmd_response) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_set_color_format) refers to drv_se.o(i.drv_se_set_rxbr) for drv_se_set_rxbr + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to tau_delay.o(i.delayMs) for delayMs + drv_rxbr.o(i.drv_rxbr_sw_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_rxbr.o(i.drv_rxbr_sw_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + drv_vidc.o(i.VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_set_src_parameter) refers to drv_se.o(i.drv_se_set_vidc) for drv_se_set_vidc + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(i.drv_dma_get_int_source) for drv_dma_get_int_source + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(i.drv_dma_clear_status) for drv_dma_clear_status + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.DMA_IRQn_Handler) refers to drv_dma.o(.data) for .data + drv_dma.o(i.drv_dma_apply_handle) refers to tau_log.o(i.tau_log_printf) for tau_log_printf + drv_dma.o(i.drv_dma_apply_handle) refers to drv_dma.o(.data) for .data + drv_dma.o(i.drv_dma_apply_handle) refers to drv_dma.o(.constdata) for .constdata + drv_dma.o(i.drv_dma_deinit) refers to drv_dma.o(i.drv_dma_disable_int) for drv_dma_disable_int + drv_dma.o(i.drv_dma_disable_int) refers to drv_dma.o(i.drv_dma_int_list_delete) for drv_dma_int_list_delete + drv_dma.o(i.drv_dma_disable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_int) refers to drv_dma.o(i.drv_dma_int_list_inset) for drv_dma_int_list_inset + drv_dma.o(i.drv_dma_enable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_init) refers to drv_per_common.o(i.drv_per_set_clock) for drv_per_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_update_handle_setting) for drv_dma_update_handle_setting + drv_dma.o(i.drv_dma_int_list_delete) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_int_list_inset) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_update_handle_setting) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_dma_req) for drv_sys_cfg_sel_dma_req + drv_dma.o(i.drv_dma_update_req_by_default) refers to drv_dma.o(i.drv_dma_update_handle_setting) for drv_dma_update_handle_setting + drv_dma.o(i.drv_dma_update_req_by_default) refers to drv_dma.o(.constdata) for .constdata + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_int_trans_handle) for drv_uart_int_trans_handle + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_abort_recv) for drv_uart_abort_recv + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(i.drv_uart_abort_send) for drv_uart_abort_send + drv_uart.o(i.UART_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_IRQn_Handler) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(i.drv_uart_reset_rx_fifo) for drv_uart_reset_rx_fifo + drv_uart.o(i.drv_uart_abort_recv) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(i.drv_uart_reset_tx_fifo) for drv_uart_reset_tx_fifo + drv_uart.o(i.drv_uart_abort_send) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_deinit) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_deinit) refers to drv_uart.o(i.drv_uart_enable_clk) for drv_uart_enable_clk + drv_uart.o(i.drv_uart_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.drv_uart_deinit) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_enable_clk) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + drv_uart.o(i.drv_uart_enable_int) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_enable_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.drv_uart_get_def_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.drv_uart_get_def_cfg) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.drv_uart_get_instance) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_enable_clk) for drv_uart_enable_clk + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_set_baud_rate) for drv_uart_set_baud_rate + drv_uart.o(i.drv_uart_init) refers to drv_uart.o(i.drv_uart_enable_int) for drv_uart_enable_int + drv_uart.o(i.drv_uart_int_trans_handle) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_recv_none_blocking) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_recv_none_blocking) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_recv_none_blocking) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_reset_rx_fifo) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_reset_tx_fifo) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_send_none_blocking) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_send_none_blocking) refers to drv_uart.o(i.drv_uart_config_int) for drv_uart_config_int + drv_uart.o(i.drv_uart_send_none_blocking) refers to drv_uart.o(.bss) for .bss + drv_uart.o(i.drv_uart_set_baud_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.drv_uart_trans_create_handle) refers to drv_uart.o(i.drv_uart_get_instance) for drv_uart_get_instance + drv_uart.o(i.drv_uart_trans_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.drv_uart_trans_create_handle) refers to drv_uart.o(.bss) for .bss + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_pwr.o(i.drv_pwr_efuse_pd) for drv_pwr_efuse_pd + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_pwr.o(i.drv_pwr_efuse_pd) for drv_pwr_efuse_pd + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_efuse.o(i.drv_efuse_write_read_req_clear) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_efuse.o(i.drv_efuse_write_read_req_clear) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_per_common.o(i.drv_per_get_system_clk) refers to drv_crgu.o(i.drv_crgu_get_system_clk) for drv_crgu_get_system_clk + drv_per_common.o(i.drv_per_reset_module) refers to drv_crgu.o(i.drv_crgu_reset_modules) for drv_crgu_reset_modules + drv_per_common.o(i.drv_per_set_clock) refers to drv_crgu.o(i.drv_crgu_enable_clock) for drv_crgu_enable_clock + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + d2f.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + d2f.o(.text) refers to fepilogue.o(.text) for _float_round + cfcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing honor90pro_demo.o(.rev16_text), (4 bytes). + Removing honor90pro_demo.o(.revsh_text), (4 bytes). + Removing honor90pro_demo.o(i.Gpio_swire_output), (78 bytes). + Removing honor90pro_demo.o(.data), (1 bytes). + Removing honor90pro_demo.o(.data), (1 bytes). + Removing honor90pro_demo.o(.data), (2 bytes). + Removing honor90pro_demo.o(.data), (4 bytes). + Removing honor90pro_demo.o(.data), (128 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (220 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_line), (604 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (320 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (256 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_force_video_crtl), (12 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_cap_pixel_color), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_callback), (66 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_register_write_cmd_entry), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_ack), (176 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cap_pixel_pos), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (32 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_log_level), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (240 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data_ex), (392 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (72 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.swap_uint16_t), (10 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode), (120 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flick), (244 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_frame), (12 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_get_disp_line), (12 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_overwrite_enable), (22 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_partial_disp_enable), (70 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (128 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (32 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_bcs), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm), (8 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_sync_line), (36 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_dect), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_edge_enhance), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (12 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (52 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_fc), (60 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_vporch_bta_opera), (68 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_req_update), (16 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_input_data), (18 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (40 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (44 bytes). + Removing hal_gpio.o(i.hal_gpio_set_high_impedance), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_pull_state), (72 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (52 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (52 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (22 bytes). + Removing hal_swire.o(i.hal_swire_set_waveform), (92 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_enable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (10 bytes). + Removing hal_pwr.o(.rev16_text), (4 bytes). + Removing hal_pwr.o(.revsh_text), (4 bytes). + Removing hal_pwr.o(i.hal_pwr_elvcc_close), (10 bytes). + Removing hal_pwr.o(i.hal_pwr_elvcc_ldo_en), (46 bytes). + Removing hal_pwr.o(i.hal_pwr_elvcc_vol_set), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_get_reset_flag), (66 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo13s_en), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo13s_set), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo18s_en), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_ldo18s_set), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_set_pvd), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_set_vcc_enable), (8 bytes). + Removing hal_pwr.o(i.hal_pwr_sw_tp18_en), (8 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (72 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_start), (48 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (42 bytes). + Removing hal_timer.o(i.hal_timer_stop), (40 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart0_rx_dma_cb), (20 bytes). + Removing hal_uart.o(i.hal_uart0_tx_dma_cb), (36 bytes). + Removing hal_uart.o(i.hal_uart1_rx_dma_cb), (20 bytes). + Removing hal_uart.o(i.hal_uart1_tx_dma_cb), (36 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (48 bytes). + Removing hal_uart.o(i.hal_uart_dma_path_close), (92 bytes). + Removing hal_uart.o(i.hal_uart_dma_recv), (276 bytes). + Removing hal_uart.o(i.hal_uart_dma_send), (280 bytes). + Removing hal_uart.o(i.hal_uart_recv_blocking), (28 bytes). + Removing hal_uart.o(i.hal_uart_recv_none_blocking), (28 bytes). + Removing hal_uart.o(i.hal_uart_send_none_blocking), (28 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (2 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_register_rx_callback), (28 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (28 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line), (60 bytes). + Removing hal_internal_vsync.o(.data), (4 bytes). + Removing hal_internal_dcs.o(.rev16_text), (4 bytes). + Removing hal_internal_dcs.o(.revsh_text), (4 bytes). + Removing hal_internal_dcs.o(i.hal_intl_dcs_register_write_cmd_entry), (12 bytes). + Removing hal_internal_dcs.o(i.hal_intl_dcs_set_dcs_direct_mode), (44 bytes). + Removing hal_internal_fb.o(.rev16_text), (4 bytes). + Removing hal_internal_fb.o(.revsh_text), (4 bytes). + Removing hal_internal_fb.o(i.hal_intl_fb_set_fb_info_manual), (480 bytes). + Removing hal_internal_fb.o(.conststring), (152 bytes). + Removing hal_internal_svs.o(.rev16_text), (4 bytes). + Removing hal_internal_svs.o(.revsh_text), (4 bytes). + Removing hal_internal_svs.o(i.hal_intl_svs_set_sync_coef), (12 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_enable_systick), (88 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_get_all_reset_flag), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (104 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_clock_src), (16 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_attribute), (16 bytes). + Removing drv_gpio.o(i.drv_gpio_get_input_data), (24 bytes). + Removing drv_gpio.o(i.drv_gpio_set_attribute), (28 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_10bit_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_analog_pwm_en), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_charge_pump_en), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_close_iov18_tp18), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_dsc_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_elvcc_pwm_en), (124 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_sleep_mode), (152 bytes). + Removing drv_pwr.o(i.drv_pwr_exit_sleep_mode_ex), (40 bytes). + Removing drv_pwr.o(i.drv_pwr_fb_pd), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_get_wakeflag), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_get_write_lock_st), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_hf_frm_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_10M_clock), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_mode_clock_sel), (60 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_mode_sel), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_hv_ldo_voltage_set), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo11d_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo13s_en), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo13s_set), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo15_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo18s_en), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_ldo18s_set), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_ltpo_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_osc32k_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_osc80m_trim), (36 bytes). + Removing drv_pwr.o(i.drv_pwr_p3k_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_por_mode_flag), (32 bytes). + Removing drv_pwr.o(i.drv_pwr_power_in), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_power_ready_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_power_sel), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_pwm_output_pwm_led), (56 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_driver_current_Big_step), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_driver_current_small_step), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_electric_current), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_pwmled_open_drain), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_ram_pd_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_read_boot_chipst), (12 bytes). + Removing drv_pwr.o(i.drv_pwr_read_chipcfg), (12 bytes). + Removing drv_pwr.o(i.drv_pwr_rgbr_state_get), (16 bytes). + Removing drv_pwr.o(i.drv_pwr_set_ap_rst_mode), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_set_ldo11_mode), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_set_ldo15_mode), (48 bytes). + Removing drv_pwr.o(i.drv_pwr_set_pvd), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_set_pvd_mode), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_set_system_clk), (32 bytes). + Removing drv_pwr.o(i.drv_pwr_sw_tp18_en), (52 bytes). + Removing drv_pwr.o(i.drv_pwr_wakeflag_get), (16 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_sel_dma_req), (128 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing drv_timer.o(i.drv_timer_register_callback), (20 bytes). + Removing dcs_packet_fifo.o(.rev16_text), (4 bytes). + Removing dcs_packet_fifo.o(.revsh_text), (4 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_se.o(.rev16_text), (4 bytes). + Removing drv_se.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_force_video_crtl), (28 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_lpdt_fifo_status), (16 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (68 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (12 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (24 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_drv_log_level), (12 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (16 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (24 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (16 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (68 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (296 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (228 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (32 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (100 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (20 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_clear), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_lock), (32 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (16 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_clear_irq), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_dpisignal_output_ctrl), (44 bytes). + Removing drv_lcdc.o(i.drv_lcdc_fixed_frame_output), (56 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_dpbuf_num), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_dpi_status), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_frame_clk_count), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_int_en_status), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_int_status), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_line_status), (12 bytes). + Removing drv_lcdc.o(i.drv_lcdc_get_rgb2pen_subpixel), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_part_display_config), (52 bytes). + Removing drv_lcdc.o(i.drv_lcdc_pixel_value_config), (32 bytes). + Removing drv_lcdc.o(i.drv_lcdc_rd_st_line_config), (28 bytes). + Removing drv_lcdc.o(i.drv_lcdc_software_reset), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (16 bytes). + Removing drv_lcdc.o(i.drv_lcdc_vid_sw_start), (56 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (36 bytes). + Removing drv_memc.o(i.drv_memc_set_double_buffer_reverse), (24 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_pri), (44 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_inten), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (24 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (24 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (20 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (24 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_clr_swp_cnt), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_col_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_frame_data_interval), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_hline_dcat), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_page_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_swpxl_cnt), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_register_irq0_callback), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_ack_pkt_md), (28 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_cmd_filter), (320 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_cmd_response), (324 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (32 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_data_catch_hline), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_swpxl_data), (12 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_tmpdith_bp), (28 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (32 bytes). + Removing drv_rxbr.o(i.drv_rxbr_sw_reset), (164 bytes). + Removing drv_rxbr.o(i.drv_rxbr_swpxl_clr), (32 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (28 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (36 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (28 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_apply_handle), (304 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (52 bytes). + Removing drv_dma.o(i.drv_dma_disable), (20 bytes). + Removing drv_dma.o(i.drv_dma_disable_int), (40 bytes). + Removing drv_dma.o(i.drv_dma_enable), (36 bytes). + Removing drv_dma.o(i.drv_dma_enable_int), (68 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_trans_num), (20 bytes). + Removing drv_dma.o(i.drv_dma_get_status), (20 bytes). + Removing drv_dma.o(i.drv_dma_init), (22 bytes). + Removing drv_dma.o(i.drv_dma_int_list_delete), (88 bytes). + Removing drv_dma.o(i.drv_dma_int_list_inset), (48 bytes). + Removing drv_dma.o(i.drv_dma_register_callback), (4 bytes). + Removing drv_dma.o(i.drv_dma_reset), (36 bytes). + Removing drv_dma.o(i.drv_dma_set_bitwide), (56 bytes). + Removing drv_dma.o(i.drv_dma_set_burst), (20 bytes). + Removing drv_dma.o(i.drv_dma_set_circle_mode), (40 bytes). + Removing drv_dma.o(i.drv_dma_set_dir), (40 bytes). + Removing drv_dma.o(i.drv_dma_set_increment), (72 bytes). + Removing drv_dma.o(i.drv_dma_set_mem_trans_info), (40 bytes). + Removing drv_dma.o(i.drv_dma_set_mem_trans_offset), (24 bytes). + Removing drv_dma.o(i.drv_dma_set_per_address), (20 bytes). + Removing drv_dma.o(i.drv_dma_set_priority), (32 bytes). + Removing drv_dma.o(i.drv_dma_set_tran_int_cnt), (28 bytes). + Removing drv_dma.o(i.drv_dma_update_handle_setting), (148 bytes). + Removing drv_dma.o(i.drv_dma_update_req_by_default), (40 bytes). + Removing drv_dma.o(.constdata), (136 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.drv_uart_deinit), (60 bytes). + Removing drv_uart.o(i.drv_uart_get_def_cfg), (72 bytes). + Removing drv_uart.o(i.drv_uart_recv_blocking), (48 bytes). + Removing drv_uart.o(i.drv_uart_recv_none_blocking), (60 bytes). + Removing drv_uart.o(i.drv_uart_send_none_blocking), (60 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (56 bytes). + Removing drv_efuse.o(i.drv_efuse_write_read_req_clear), (22 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_per_common.o(.rev16_text), (4 bytes). + Removing drv_per_common.o(.revsh_text), (4 bytes). + Removing drv_per_common.o(i.drv_per_get_system_clk), (8 bytes). + Removing drv_per_common.o(i.drv_per_reset_module), (14 bytes). + Removing drv_per_common.o(i.drv_per_set_clock), (14 bytes). + Removing fflti.o(.text), (22 bytes). + +375 unused section(s) (total 18078 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcmp.c 0x00000000 Number 0 memcmp.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/string/strlen.c 0x00000000 Number 0 strlen.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/d2f.c 0x00000000 Number 0 d2f.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_per_common.c 0x00000000 Number 0 drv_per_common.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\driver\cuckoo\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_pwr.c 0x00000000 Number 0 hal_pwr.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_dcs.c 0x00000000 Number 0 hal_internal_dcs.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_fb.c 0x00000000 Number 0 hal_internal_fb.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_svs.c 0x00000000 Number 0 hal_internal_svs.o ABSOLUTE + ..\..\..\src\driver\cuckoo\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\driver\cuckoo\src\drv_se.c 0x00000000 Number 0 drv_se.o ABSOLUTE + ..\..\src\app\Honor 90Pro\Honor90Pro_demo.c 0x00000000 Number 0 honor90pro_demo.o ABSOLUTE + ..\..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_per_common.c 0x00000000 Number 0 drv_per_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_pwr.c 0x00000000 Number 0 hal_pwr.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_dcs.c 0x00000000 Number 0 hal_internal_dcs.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_fb.c 0x00000000 Number 0 hal_internal_fb.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_svs.c 0x00000000 Number 0 hal_internal_svs.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\driver\\cuckoo\\src\\drv_se.c 0x00000000 Number 0 drv_se.o ABSOLUTE + ..\\..\\src\\app\\Honor 90Pro\\Honor90Pro_demo.c 0x00000000 Number 0 honor90pro_demo.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfcmple.s 0x00000000 Number 0 cfcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 strlen.o(.text) + .text 0x000101f6 Section 0 memcmp.o(.text) + .text 0x00010210 Section 0 fadd.o(.text) + .text 0x000102c2 Section 0 fmul.o(.text) + .text 0x0001033c Section 0 fdiv.o(.text) + .text 0x000103b8 Section 0 fscalb.o(.text) + .text 0x000103d0 Section 0 dadd.o(.text) + .text 0x00010534 Section 0 dmul.o(.text) + .text 0x00010604 Section 0 ffltui.o(.text) + .text 0x00010614 Section 0 dfltui.o(.text) + .text 0x00010630 Section 0 ffixui.o(.text) + .text 0x00010658 Section 0 dfixui.o(.text) + .text 0x00010694 Section 0 f2d.o(.text) + .text 0x000106bc Section 0 d2f.o(.text) + .text 0x000106f4 Section 20 cfcmple.o(.text) + .text 0x00010708 Section 20 cfrcmple.o(.text) + .text 0x0001071c Section 0 uldiv.o(.text) + .text 0x0001077c Section 0 llshl.o(.text) + .text 0x0001079c Section 0 llushr.o(.text) + .text 0x000107be Section 0 llsshr.o(.text) + .text 0x000107e4 Section 0 fepilogue.o(.text) + .text 0x000107e4 Section 0 iusefp.o(.text) + .text 0x00010866 Section 0 depilogue.o(.text) + .text 0x00010924 Section 0 ddiv.o(.text) + .text 0x00010a14 Section 0 dfixul.o(.text) + .text 0x00010a54 Section 40 cdrcmple.o(.text) + .text 0x00010a7c Section 36 init.o(.text) + .text 0x00010aa0 Section 0 __dczerorl2.o(.text) + i.AP_NRESET_IRQn_Handler 0x00010af8 Section 0 drv_gpio.o(i.AP_NRESET_IRQn_Handler) + i.DMA_IRQn_Handler 0x00010b14 Section 0 drv_dma.o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010b70 Section 0 drv_gpio.o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010b7a Section 0 drv_gpio.o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010b84 Section 0 drv_gpio.o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010b8e Section 0 drv_gpio.o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010b98 Section 0 drv_gpio.o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010ba2 Section 0 drv_gpio.o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010bac Section 0 drv_gpio.o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010bb6 Section 0 drv_gpio.o(i.EXTI_INT7_IRQn_Handler) + i.HardFault_Handler 0x00010bc0 Section 0 drv_common.o(i.HardFault_Handler) + i.LCDC_IRQn_Handler 0x00010c08 Section 0 hal_internal_vsync.o(i.LCDC_IRQn_Handler) + i.MEMC_IRQn_Handler 0x00010d08 Section 0 drv_memc.o(i.MEMC_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010da4 Section 0 drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) + i.Note11Pro_demo 0x00010e5c Section 0 honor90pro_demo.o(i.Note11Pro_demo) + i.SWIRE_IRQn_Handler 0x00010ec8 Section 0 drv_swire.o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00010ef8 Section 0 drv_common.o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00010f10 Section 0 drv_timer.o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x00010f1a Section 0 drv_timer.o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00010f24 Section 0 drv_timer.o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x00010f2e Section 0 drv_timer.o(i.TIMER3_IRQn_Handler) + i.VIDC_IRQn_Handler 0x00010f38 Section 0 drv_vidc.o(i.VIDC_IRQn_Handler) + i.VPRE1_IRQn_Handler 0x00010f54 Section 0 drv_rxbr.o(i.VPRE1_IRQn_Handler) + i.VPRE_IRQn_Handler 0x00010f70 Section 0 hal_internal_dcs.o(i.VPRE_IRQn_Handler) + i.__0printf 0x00010fdc Section 0 printfa.o(i.__0printf) + i.__scatterload_null 0x00010ffc Section 2 handlers.o(i.__scatterload_null) + .ARM.__at_0x11000 0x00011000 Section 28 drv_common.o(.ARM.__at_0x11000) + .ARM.__at_0x1101C 0x0001101c Section 16 tau_log.o(.ARM.__at_0x1101C) + .ARM.__at_0x1102C 0x0001102c Section 22 hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) + i.MIPI_RX_IRQn_Handler 0x00011044 Section 0 drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) + i.UART_IRQn_Handler 0x000113a8 Section 0 drv_uart.o(i.UART_IRQn_Handler) + i.__0vsprintf 0x00011528 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x0001154c Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x0001157a Section 0 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + i.__NVIC_DisableIRQ 0x00011594 Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x00011595 Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x000115b4 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x000115b5 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__scatterload_copy 0x000115cc Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_zeroinit 0x000115da Section 14 handlers.o(i.__scatterload_zeroinit) + i._fp_digits 0x000115e8 Section 0 printfa.o(i._fp_digits) + _fp_digits 0x000115e9 Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x0001175c Section 0 printfa.o(i._printf_core) + _printf_core 0x0001175d Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011e48 Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011e49 Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011e68 Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011e69 Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011e94 Section 0 printfa.o(i._sputc) + _sputc 0x00011e95 Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011ea0 Section 0 honor90pro_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011ea1 Thumb Code 224 honor90pro_demo.o(i.ap_dcs_read) + i.ap_dcs_set_display_off 0x00011fac Section 0 honor90pro_demo.o(i.ap_dcs_set_display_off) + ap_dcs_set_display_off 0x00011fad Thumb Code 44 honor90pro_demo.o(i.ap_dcs_set_display_off) + i.ap_dcs_set_display_on 0x00012004 Section 0 honor90pro_demo.o(i.ap_dcs_set_display_on) + ap_dcs_set_display_on 0x00012005 Thumb Code 28 honor90pro_demo.o(i.ap_dcs_set_display_on) + i.ap_dcs_set_enter_sleep_mode 0x00012048 Section 0 honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) + ap_dcs_set_enter_sleep_mode 0x00012049 Thumb Code 90 honor90pro_demo.o(i.ap_dcs_set_enter_sleep_mode) + i.ap_dcs_set_exit_sleep_mode 0x000120ac Section 0 honor90pro_demo.o(i.ap_dcs_set_exit_sleep_mode) + ap_dcs_set_exit_sleep_mode 0x000120ad Thumb Code 20 honor90pro_demo.o(i.ap_dcs_set_exit_sleep_mode) + i.ap_rstn_pull_down_cb 0x000120ec Section 0 honor90pro_demo.o(i.ap_rstn_pull_down_cb) + ap_rstn_pull_down_cb 0x000120ed Thumb Code 32 honor90pro_demo.o(i.ap_rstn_pull_down_cb) + i.ap_rstn_pull_high_cb 0x00012144 Section 0 honor90pro_demo.o(i.ap_rstn_pull_high_cb) + ap_rstn_pull_high_cb 0x00012145 Thumb Code 20 honor90pro_demo.o(i.ap_rstn_pull_high_cb) + i.ap_set_backlight 0x0001215c Section 0 honor90pro_demo.o(i.ap_set_backlight) + ap_set_backlight 0x0001215d Thumb Code 52 honor90pro_demo.o(i.ap_set_backlight) + i.ap_update_frame_rate 0x000121b8 Section 0 honor90pro_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x000121b9 Thumb Code 52 honor90pro_demo.o(i.ap_update_frame_rate) + i.app_display_init 0x00012240 Section 0 honor90pro_demo.o(i.app_display_init) + i.app_gpio_init 0x000122c8 Section 0 honor90pro_demo.o(i.app_gpio_init) + i.app_init_panel 0x000122e0 Section 0 honor90pro_demo.o(i.app_init_panel) + app_init_panel 0x000122e1 Thumb Code 146 honor90pro_demo.o(i.app_init_panel) + i.app_mipi_rx_init 0x0001237c Section 0 honor90pro_demo.o(i.app_mipi_rx_init) + app_mipi_rx_init 0x0001237d Thumb Code 142 honor90pro_demo.o(i.app_mipi_rx_init) + i.app_mipi_tx_init 0x00012428 Section 0 honor90pro_demo.o(i.app_mipi_tx_init) + app_mipi_tx_init 0x00012429 Thumb Code 92 honor90pro_demo.o(i.app_mipi_tx_init) + i.app_system_suspend 0x0001248c Section 0 honor90pro_demo.o(i.app_system_suspend) + app_system_suspend 0x0001248d Thumb Code 134 honor90pro_demo.o(i.app_system_suspend) + i.board_Init 0x00012568 Section 0 board.o(i.board_Init) + i.ceil 0x00012580 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x00012648 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x00012649 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x00012674 Section 0 hal_internal_dcs.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x00012675 Thumb Code 84 hal_internal_dcs.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x000126fc Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x00012754 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x0001276c Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x000127b0 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.delayMs 0x000127d4 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x000127ec Section 0 tau_delay.o(i.delayUs) + i.drv_common_system_init 0x00012818 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_enable_clock 0x00012820 Section 0 drv_crgu.o(i.drv_crgu_enable_clock) + i.drv_crgu_get_rxbr_clk 0x0001285c Section 0 drv_crgu.o(i.drv_crgu_get_rxbr_clk) + i.drv_crgu_reset_modules 0x000128c4 Section 0 drv_crgu.o(i.drv_crgu_reset_modules) + i.drv_crgu_set_ahb_clk 0x000128d4 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_clk) + i.drv_crgu_set_clock_div 0x000128fc Section 0 drv_crgu.o(i.drv_crgu_set_clock_div) + i.drv_crgu_set_dpi_clk 0x0001290c Section 0 drv_crgu.o(i.drv_crgu_set_dpi_clk) + i.drv_crgu_set_dsc_clk 0x00012948 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_clk) + i.drv_crgu_set_fb_clk 0x00012980 Section 0 drv_crgu.o(i.drv_crgu_set_fb_clk) + i.drv_crgu_set_lcdc_clk 0x000129a8 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_clk) + i.drv_crgu_set_reset 0x000129d0 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_clk 0x000129e8 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_clk) + i.drv_crgu_set_vidc_clk 0x00012a10 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_clk) + i.drv_dma_clear_status 0x00012a38 Section 0 drv_dma.o(i.drv_dma_clear_status) + i.drv_dma_get_int_source 0x00012a50 Section 0 drv_dma.o(i.drv_dma_get_int_source) + drv_dma_get_int_source 0x00012a51 Thumb Code 16 drv_dma.o(i.drv_dma_get_int_source) + i.drv_dsc_dec_disable 0x00012a64 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00012a80 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00012ab8 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_irqen 0x00012ad8 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_irqen) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00012af4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00012c00 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00012c40 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00012c41 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00012c90 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00012c91 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00012cac Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_ddi_crc_en 0x00012cbc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en) + i.drv_dsi_rx_get_max_ret_size 0x00012ccc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00012cd8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_check_crc 0x00012cf0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) + i.drv_dsi_rx_set_ctrl_cfg 0x00012d0c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00012d30 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_ddi_crc_en 0x00012d40 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en) + i.drv_dsi_rx_set_inten 0x00012d5c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00012d68 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_ipi_ycbcr_frmt 0x00012d78 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt) + i.drv_dsi_rx_set_lane_swap 0x00012d94 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00012da8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_tear_resp_en 0x00012dcc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en) + i.drv_dsi_rx_set_up_phy 0x00012de8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00012ee8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00012f00 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00012f18 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00012f70 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x00012f7c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00012f9c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00012fa8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00012fb8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00012fc8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00012fec Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x00012ff8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00013004 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00013010 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x0001302c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x0001304c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x0001305c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x000130c4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x00013108 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00013258 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x00013278 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00013284 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x000132a8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x000132c4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x000132d8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x00013318 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x00013330 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x00013344 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00013368 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x00013374 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x000133a0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_efuse_enter_inactive 0x00013488 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x000134be Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x000134ca Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x00013504 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_handle_int 0x0001351c Section 0 drv_gpio.o(i.drv_gpio_handle_int) + drv_gpio_handle_int 0x0001351d Thumb Code 30 drv_gpio.o(i.drv_gpio_handle_int) + i.drv_gpio_register_ap_reset_callback 0x00013540 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x0001354c Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00013560 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x000135a4 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode 0x000135c4 Section 0 drv_gpio.o(i.drv_gpio_set_mode) + i.drv_gpio_set_output_data 0x000135d8 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x000135d9 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_lcdc_bcsa_config 0x000135f8 Section 0 drv_lcdc.o(i.drv_lcdc_bcsa_config) + i.drv_lcdc_cfg_int_frame 0x00013620 Section 0 drv_lcdc.o(i.drv_lcdc_cfg_int_frame) + i.drv_lcdc_clear_int 0x0001364c Section 0 drv_lcdc.o(i.drv_lcdc_clear_int) + drv_lcdc_clear_int 0x0001364d Thumb Code 20 drv_lcdc.o(i.drv_lcdc_clear_int) + i.drv_lcdc_cmd_start 0x00013664 Section 0 drv_lcdc.o(i.drv_lcdc_cmd_start) + i.drv_lcdc_config_acc_command_mode 0x00013698 Section 0 drv_lcdc.o(i.drv_lcdc_config_acc_command_mode) + i.drv_lcdc_config_int 0x000136ac Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x000136e4 Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite_rgb 0x0001370c Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_src_parameter 0x00013724 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_crop_hact 0x00013774 Section 0 drv_lcdc.o(i.drv_lcdc_crop_hact) + i.drv_lcdc_ctrl_flow 0x00013784 Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_dith_config 0x000137bc Section 0 drv_lcdc.o(i.drv_lcdc_dith_config) + i.drv_lcdc_edge_dect_config 0x000137ec Section 0 drv_lcdc.o(i.drv_lcdc_edge_dect_config) + i.drv_lcdc_edge_enh_config 0x00013828 Section 0 drv_lcdc.o(i.drv_lcdc_edge_enh_config) + i.drv_lcdc_enable_shadow_reg 0x0001388c Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_endianness_config 0x000138b0 Section 0 drv_lcdc.o(i.drv_lcdc_endianness_config) + i.drv_lcdc_fc_config 0x000138cc Section 0 drv_lcdc.o(i.drv_lcdc_fc_config) + i.drv_lcdc_fldc_config 0x000138ec Section 0 drv_lcdc.o(i.drv_lcdc_fldc_config) + i.drv_lcdc_function_disable 0x00013910 Section 0 drv_lcdc.o(i.drv_lcdc_function_disable) + i.drv_lcdc_function_enable 0x00013934 Section 0 drv_lcdc.o(i.drv_lcdc_function_enable) + i.drv_lcdc_set_int 0x00013958 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_prefetch 0x00013994 Section 0 drv_lcdc.o(i.drv_lcdc_set_prefetch) + i.drv_lcdc_set_tear_line 0x000139b0 Section 0 drv_lcdc.o(i.drv_lcdc_set_tear_line) + i.drv_lcdc_stop_display 0x000139cc Section 0 drv_lcdc.o(i.drv_lcdc_stop_display) + i.drv_lcdc_vid_hw_start 0x000139dc Section 0 drv_lcdc.o(i.drv_lcdc_vid_hw_start) + i.drv_lcdc_vintp_mode_config 0x00013a18 Section 0 drv_lcdc.o(i.drv_lcdc_vintp_mode_config) + i.drv_memc_clear_status 0x00013a30 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00013a44 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00013a84 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00013a94 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_get_tear_mode 0x00013aac Section 0 drv_memc.o(i.drv_memc_get_tear_mode) + i.drv_memc_rate_transfer_sel 0x00013abc Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00013ad8 Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00013aec Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_circ_mode_enable 0x00013b04 Section 0 drv_memc.o(i.drv_memc_set_circ_mode_enable) + i.drv_memc_set_data_mode 0x00013b20 Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00013b34 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_frame_drop_select 0x00013b4c Section 0 drv_memc.o(i.drv_memc_set_frame_drop_select) + i.drv_memc_set_fs_en_conditions 0x00013b68 Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_lcdc_st_conditions 0x00013b80 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00013b9c Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_ltpo_pu_thres 0x00013bbc Section 0 drv_memc.o(i.drv_memc_set_ltpo_pu_thres) + i.drv_memc_set_tear_mode 0x00013bd4 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00013be8 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00013c14 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_phy_test_clear 0x00013c28 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00013c38 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_pwr_efuse_pd 0x00013c50 Section 0 drv_pwr.o(i.drv_pwr_efuse_pd) + i.drv_pwr_enter_deep_sleep_mode 0x00013c80 Section 0 drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) + i.drv_pwr_enter_sleep_mode_ex 0x00013ccc Section 0 drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex) + i.drv_pwr_enter_stop_sleep_mode 0x00013d00 Section 0 drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) + i.drv_pwr_exit_sleep_mode 0x00013d98 Section 0 drv_pwr.o(i.drv_pwr_exit_sleep_mode) + i.drv_pwr_get_power_ready_st 0x00013dc0 Section 0 drv_pwr.o(i.drv_pwr_get_power_ready_st) + i.drv_pwr_set_breath_screen_power_sel 0x00013dd0 Section 0 drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) + i.drv_pwr_set_digit_power_sel 0x00013df8 Section 0 drv_pwr.o(i.drv_pwr_set_digit_power_sel) + i.drv_pwr_set_pll_clk 0x00013e20 Section 0 drv_pwr.o(i.drv_pwr_set_pll_clk) + i.drv_pwr_set_wakeup_type 0x00013e54 Section 0 drv_pwr.o(i.drv_pwr_set_wakeup_type) + i.drv_pwr_write_lock 0x00013e80 Section 0 drv_pwr.o(i.drv_pwr_write_lock) + i.drv_rxbr_clear_pkt_buffer 0x00013ea0 Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00013eb0 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00013ebc Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x00013f18 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_int_source 0x00013f34 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00013f35 Thumb Code 20 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_status0 0x00013f4c Section 0 hal_internal_dcs.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x00013f4d Thumb Code 20 hal_internal_dcs.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x00013f64 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv1_cfg 0x00013f78 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00013f8c Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq1_callback 0x00013f9c Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x00013fa8 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_color_format 0x00013fc0 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_filter_regs 0x00013fdc Section 0 drv_rxbr.o(i.drv_rxbr_set_filter_regs) + i.drv_rxbr_set_inten 0x00014000 Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x0001401c Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x00014034 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x00014074 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x00014084 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_se_init 0x00014094 Section 0 drv_se.o(i.drv_se_init) + i.drv_se_set_dsc 0x0001410c Section 0 drv_se.o(i.drv_se_set_dsc) + i.drv_se_set_lcdc 0x000141e0 Section 0 drv_se.o(i.drv_se_set_lcdc) + i.drv_se_set_memc 0x00014268 Section 0 drv_se.o(i.drv_se_set_memc) + i.drv_se_set_rxbr 0x000142d0 Section 0 drv_se.o(i.drv_se_set_rxbr) + i.drv_se_set_vidc 0x000143a0 Section 0 drv_se.o(i.drv_se_set_vidc) + i.drv_se_start_rx 0x0001444c Section 0 drv_se.o(i.drv_se_start_rx) + i.drv_swire_enable 0x00014460 Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_get_pulse_count 0x0001447c Section 0 drv_swire.o(i.drv_swire_get_pulse_count) + i.drv_swire_register_callback 0x00014488 Section 0 drv_swire.o(i.drv_swire_register_callback) + i.drv_swire_set_bit_time 0x00014494 Section 0 drv_swire.o(i.drv_swire_set_bit_time) + i.drv_swire_set_int 0x000144ac Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x000144f4 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_swire_set_pulse_count 0x00014510 Section 0 drv_swire.o(i.drv_swire_set_pulse_count) + i.drv_swire_set_trig_mode 0x0001451c Section 0 drv_swire.o(i.drv_swire_set_trig_mode) + i.drv_sys_cfg_clear_all_int 0x00014538 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00014544 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_trig 0x0001456c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x00014590 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x000145b4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_sel_swire_timer 0x000145d8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer) + i.drv_sys_cfg_set_int 0x000145f0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x00014614 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x00014615 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x0001462e Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x00014650 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_handle_interrupt 0x00014660 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x00014661 Thumb Code 54 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_set_compare_val 0x0001469c Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x000146dc Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x00014724 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x0001474c Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_enter 0x0001475c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x0001477c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_code 0x0001479c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_uart_abort_recv 0x000147c4 Section 0 drv_uart.o(i.drv_uart_abort_recv) + i.drv_uart_abort_send 0x000147f8 Section 0 drv_uart.o(i.drv_uart_abort_send) + i.drv_uart_config_int 0x0001482c Section 0 drv_uart.o(i.drv_uart_config_int) + i.drv_uart_enable_clk 0x00014840 Section 0 drv_uart.o(i.drv_uart_enable_clk) + drv_uart_enable_clk 0x00014841 Thumb Code 24 drv_uart.o(i.drv_uart_enable_clk) + i.drv_uart_enable_int 0x00014858 Section 0 drv_uart.o(i.drv_uart_enable_int) + i.drv_uart_get_instance 0x000148b4 Section 0 drv_uart.o(i.drv_uart_get_instance) + i.drv_uart_init 0x000148dc Section 0 drv_uart.o(i.drv_uart_init) + i.drv_uart_int_trans_handle 0x000149ac Section 0 drv_uart.o(i.drv_uart_int_trans_handle) + drv_uart_int_trans_handle 0x000149ad Thumb Code 54 drv_uart.o(i.drv_uart_int_trans_handle) + i.drv_uart_reset_rx_fifo 0x000149e8 Section 0 drv_uart.o(i.drv_uart_reset_rx_fifo) + i.drv_uart_reset_tx_fifo 0x00014a04 Section 0 drv_uart.o(i.drv_uart_reset_tx_fifo) + i.drv_uart_send_blocking 0x00014a20 Section 0 drv_uart.o(i.drv_uart_send_blocking) + i.drv_uart_set_baud_rate 0x00014a3a Section 0 drv_uart.o(i.drv_uart_set_baud_rate) + i.drv_uart_trans_create_handle 0x00014a90 Section 0 drv_uart.o(i.drv_uart_trans_create_handle) + i.drv_vidc_clear_irq 0x00014adc Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00014aec Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00014b0c Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_int_source 0x00014b4c Section 0 drv_vidc.o(i.drv_vidc_get_int_source) + i.drv_vidc_get_irq_status 0x00014b78 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x00014b90 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x00014bbc Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x00014bc8 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_circ_mode_enable 0x00014bd4 Section 0 drv_vidc.o(i.drv_vidc_set_circ_mode_enable) + i.drv_vidc_set_dither_config 0x00014bf0 Section 0 drv_vidc.o(i.drv_vidc_set_dither_config) + i.drv_vidc_set_dst_parameter 0x00014c28 Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_honly_hcoef0 0x00014c84 Section 0 drv_vidc.o(i.drv_vidc_set_honly_hcoef0) + i.drv_vidc_set_honly_hinitb 0x00014c90 Section 0 drv_vidc.o(i.drv_vidc_set_honly_hinitb) + i.drv_vidc_set_honly_hinitr 0x00014cbc Section 0 drv_vidc.o(i.drv_vidc_set_honly_hinitr) + i.drv_vidc_set_irqen 0x00014cec Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00014d08 Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_pentile_swap 0x00014d1c Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x00014d38 Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x00014d44 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x00014d5c Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00014d68 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x00014d74 Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00014d88 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00014d94 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00014da0 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_vidc_set_vintp_config 0x00014dc0 Section 0 drv_vidc.o(i.drv_vidc_set_vintp_config) + i.fputc 0x00014df8 Section 0 tau_log.o(i.fputc) + i.ha_intl_fb_check_pu_size 0x00014e2c Section 0 hal_internal_fb.o(i.ha_intl_fb_check_pu_size) + ha_intl_fb_check_pu_size 0x00014e2d Thumb Code 58 hal_internal_fb.o(i.ha_intl_fb_check_pu_size) + i.hal_dsi_rx_ctrl_create_handle 0x00014e6c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_dcs_async_handler 0x00014eac Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) + i.hal_dsi_rx_ctrl_deinit 0x00014eec Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00014f80 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00014fa0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x0001504c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x0001504d Thumb Code 222 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x0001514c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x0001514d Thumb Code 232 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00015254 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00015255 Thumb Code 294 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x00015380 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x00015381 Thumb Code 314 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x000154c8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x000154c9 Thumb Code 624 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x00015748 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00015780 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_check_crc 0x00015870 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00015888 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00015889 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_start 0x000158b8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x000158e8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_input_frame_rate 0x00015918 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) + i.hal_dsi_rx_ctrl_toggle_resolution 0x00015924 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_cmd_mode_cal_timing 0x00015944 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) + hal_dsi_tx_cmd_mode_cal_timing 0x00015945 Thumb Code 510 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_cmd_mode_cal_timing) + i.hal_dsi_tx_ctrl_create_handle 0x00015bc4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00015bfc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_gen_a_tear_signal 0x00015c70 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) + i.hal_dsi_tx_ctrl_init 0x00015c94 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00015d10 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00015d11 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00015d20 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_tear_mode 0x00015d28 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) + i.hal_dsi_tx_ctrl_start 0x00015d34 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00015dc4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00015dfc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00015ef0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_cfg 0x00015fc0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) + hal_dsi_tx_init_cfg 0x00015fc1 Thumb Code 250 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_cfg) + i.hal_dsi_tx_init_dpi_timing 0x000160c4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) + hal_dsi_tx_init_dpi_timing 0x000160c5 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_timing) + i.hal_dsi_tx_init_phy_cfg 0x00016108 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00016109 Thumb Code 22 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_timing 0x0001611e Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) + hal_dsi_tx_init_timing 0x0001611f Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_timing) + i.hal_dsi_tx_init_vid_timing 0x00016170 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) + hal_dsi_tx_init_vid_timing 0x00016171 Thumb Code 70 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_vid_timing) + i.hal_dsi_tx_send_cmd 0x000161c4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x000161c5 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_dsi_tx_timing_info_update 0x00016204 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) + hal_dsi_tx_timing_info_update 0x00016205 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_timing_info_update) + i.hal_dsi_tx_vid_mode_cal_timing 0x00016298 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) + hal_dsi_tx_vid_mode_cal_timing 0x00016299 Thumb Code 766 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_vid_mode_cal_timing) + i.hal_gpio_config_pad 0x000165a8 Section 0 hal_gpio.o(i.hal_gpio_config_pad) + i.hal_gpio_ctrl_eint 0x000165e4 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_init_eint 0x000165fc Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x0001663c Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x00016652 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00016670 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x0001668c Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x000166dc Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x0001673c Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_internal_sync_get_hight_performan_mode 0x00016744 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change 0x00016754 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_sync_register_lcdc_cb 0x00016908 Section 0 hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) + i.hal_internal_vsync_deinit 0x00016914 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00016934 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00016940 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tx_state 0x00016954 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00016960 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00016a48 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_rx_state 0x00016b10 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_tear_mode 0x00016b30 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00016d1c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_internal_vsync_toggle_input_frame_rate 0x00016d74 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) + i.hal_intl_dcs_init_sw_fltr 0x00016dfc Section 0 hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) + i.hal_intl_dcs_rx_get_dcs_packet_data 0x00016e68 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) + hal_intl_dcs_rx_get_dcs_packet_data 0x00016e69 Thumb Code 782 hal_internal_dcs.o(i.hal_intl_dcs_rx_get_dcs_packet_data) + i.hal_intl_dcs_rx_receive_packet 0x00017298 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) + hal_intl_dcs_rx_receive_packet 0x00017299 Thumb Code 122 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_packet) + i.hal_intl_dcs_rx_receive_pps 0x00017320 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) + hal_intl_dcs_rx_receive_pps 0x00017321 Thumb Code 266 hal_internal_dcs.o(i.hal_intl_dcs_rx_receive_pps) + i.hal_intl_dcs_set_auto_hw_filter 0x00017494 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) + i.hal_intl_dcs_sw_filter_handle 0x00017520 Section 0 hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) + hal_intl_dcs_sw_filter_handle 0x00017521 Thumb Code 36 hal_internal_dcs.o(i.hal_intl_dcs_sw_filter_handle) + i.hal_intl_fb_cal_fb_info 0x0001754c Section 0 hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) + i.hal_intl_fb_check_bandwidth 0x00017864 Section 0 hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) + hal_intl_fb_check_bandwidth 0x00017865 Thumb Code 92 hal_internal_fb.o(i.hal_intl_fb_check_bandwidth) + i.hal_intl_fb_edge_resize 0x000178c8 Section 0 hal_internal_fb.o(i.hal_intl_fb_edge_resize) + hal_intl_fb_edge_resize 0x000178c9 Thumb Code 214 hal_internal_fb.o(i.hal_intl_fb_edge_resize) + i.hal_intl_fb_flow_control_adapter 0x000179a4 Section 0 hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) + hal_intl_fb_flow_control_adapter 0x000179a5 Thumb Code 110 hal_internal_fb.o(i.hal_intl_fb_flow_control_adapter) + i.hal_intl_fb_get_memc_flow_mode 0x00017a18 Section 0 hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) + i.hal_intl_fb_get_rx_fb_info 0x00017a24 Section 0 hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) + i.hal_intl_fb_get_tx_fb_info 0x00017a34 Section 0 hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) + i.hal_intl_fb_get_user_flow 0x00017a44 Section 0 hal_internal_fb.o(i.hal_intl_fb_get_user_flow) + i.hal_intl_svs_deinit_rx 0x00017a50 Section 0 hal_internal_svs.o(i.hal_intl_svs_deinit_rx) + i.hal_intl_svs_deinit_tx 0x00017a78 Section 0 hal_internal_svs.o(i.hal_intl_svs_deinit_tx) + i.hal_intl_svs_handle 0x00017a88 Section 0 hal_internal_svs.o(i.hal_intl_svs_handle) + i.hal_intl_svs_init_rx 0x00017aac Section 0 hal_internal_svs.o(i.hal_intl_svs_init_rx) + i.hal_intl_svs_init_tx 0x00017b2c Section 0 hal_internal_svs.o(i.hal_intl_svs_init_tx) + i.hal_intl_svs_set_input_frate 0x00017b40 Section 0 hal_internal_svs.o(i.hal_intl_svs_set_input_frate) + i.hal_intl_svs_set_rx_vtt 0x00017bb0 Section 0 hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) + i.hal_intl_svs_update_rxbr_clk 0x00017bbc Section 0 hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) + i.hal_lcdc_displayproc_config 0x00017c04 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) + i.hal_lcdc_init_cfg 0x00017c74 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00017c75 Thumb Code 62 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x00017cb2 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x00017cb3 Thumb Code 112 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_postproc_config 0x00017d24 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) + i.hal_lcdc_start 0x00017e4c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_start) + hal_lcdc_start 0x00017e4d Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_lcdc_start) + i.hal_lcdc_timinggen_config 0x00017e70 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) + hal_lcdc_timinggen_config 0x00017e71 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_timinggen_config) + i.hal_lcdc_upscaler_config 0x00017eac Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) + i.hal_nonshadow_func_update 0x00017f8c Section 0 hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) + i.hal_pwr_enter_deep_sleep_mode 0x00018048 Section 0 hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) + i.hal_pwr_enter_normal_sleep_mode 0x00018072 Section 0 hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) + i.hal_pwr_enter_stop_sleep_mode 0x0001807c Section 0 hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) + i.hal_pwr_exit_sleep_mode 0x000180e0 Section 0 hal_pwr.o(i.hal_pwr_exit_sleep_mode) + i.hal_pwr_get_vcc_power_ready 0x000180ea Section 0 hal_pwr.o(i.hal_pwr_get_vcc_power_ready) + i.hal_pwr_set_main_power 0x000180f2 Section 0 hal_pwr.o(i.hal_pwr_set_main_power) + i.hal_pwr_set_sleep_mode_power 0x000180fa Section 0 hal_pwr.o(i.hal_pwr_set_sleep_mode_power) + i.hal_pwr_set_stop_sleep_wakeup_pin 0x00018104 Section 0 hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) + i.hal_swire_deinit 0x00018168 Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_enable 0x000181a8 Section 0 hal_swire.o(i.hal_swire_enable) + i.hal_swire_init 0x00018204 Section 0 hal_swire.o(i.hal_swire_init) + i.hal_swire_set_pulse 0x0001825c Section 0 hal_swire.o(i.hal_swire_set_pulse) + i.hal_swire_set_timer 0x00018280 Section 0 hal_swire.o(i.hal_swire_set_timer) + i.hal_system_init 0x000182c0 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_updata_sysclk 0x000183a4 Section 0 hal_system.o(i.hal_system_updata_sysclk) + i.hal_timer_deinit 0x000183f4 Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x00018424 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_set_repeat 0x00018440 Section 0 hal_timer.o(i.hal_timer_set_repeat) + i.hal_tx_frame_rate_adjust 0x00018448 Section 0 hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) + hal_tx_frame_rate_adjust 0x00018449 Thumb Code 44 hal_dsi_tx_ctrl.o(i.hal_tx_frame_rate_adjust) + i.hal_uart_init 0x00018478 Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_send_blocking 0x0001850c Section 0 hal_uart.o(i.hal_uart_send_blocking) + i.hal_vsync_func_update 0x00018528 Section 0 hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) + i.hal_vsync_reset_lcdc_scaler 0x00018540 Section 0 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + i.main 0x00018620 Section 0 main.o(i.main) + i.pps_update_handle 0x00018658 Section 0 honor90pro_demo.o(i.pps_update_handle) + pps_update_handle 0x00018659 Thumb Code 90 honor90pro_demo.o(i.pps_update_handle) + i.rxbr_irq1_callback 0x000186fc Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x000186fd Thumb Code 496 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_double_buffer_update 0x000189f0 Section 0 hal_internal_vsync.o(i.soft_double_buffer_update) + soft_double_buffer_update 0x000189f1 Thumb Code 56 hal_internal_vsync.o(i.soft_double_buffer_update) + i.soft_gen_te 0x00018a34 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x00018a35 Thumb Code 86 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x00018aa0 Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x00018aa1 Thumb Code 202 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_pro_motion_init 0x00018b80 Section 0 hal_internal_vsync.o(i.soft_pro_motion_init) + soft_pro_motion_init 0x00018b81 Thumb Code 46 hal_internal_vsync.o(i.soft_pro_motion_init) + i.soft_tear_adjust_line 0x00018bb8 Section 0 hal_internal_vsync.o(i.soft_tear_adjust_line) + soft_tear_adjust_line 0x00018bb9 Thumb Code 26 hal_internal_vsync.o(i.soft_tear_adjust_line) + i.stop_sleep_cb 0x00018bdc Section 0 hal_pwr.o(i.stop_sleep_cb) + stop_sleep_cb 0x00018bdd Thumb Code 18 hal_pwr.o(i.stop_sleep_cb) + i.svs_direct_mode_setting 0x00018bf4 Section 0 hal_internal_svs.o(i.svs_direct_mode_setting) + svs_direct_mode_setting 0x00018bf5 Thumb Code 154 hal_internal_svs.o(i.svs_direct_mode_setting) + i.svs_get_rel_intv 0x00018ca0 Section 0 hal_internal_svs.o(i.svs_get_rel_intv) + svs_get_rel_intv 0x00018ca1 Thumb Code 20 hal_internal_svs.o(i.svs_get_rel_intv) + i.svs_sync_handle 0x00018cbc Section 0 hal_internal_svs.o(i.svs_sync_handle) + svs_sync_handle 0x00018cbd Thumb Code 158 hal_internal_svs.o(i.svs_sync_handle) + i.svs_wait_fr_stab 0x00018d6c Section 0 hal_internal_svs.o(i.svs_wait_fr_stab) + svs_wait_fr_stab 0x00018d6d Thumb Code 148 hal_internal_svs.o(i.svs_wait_fr_stab) + i.svs_wait_start 0x00018e38 Section 0 hal_internal_svs.o(i.svs_wait_start) + svs_wait_start 0x00018e39 Thumb Code 250 hal_internal_svs.o(i.svs_wait_start) + i.tau_log_init 0x00018f44 Section 0 tau_log.o(i.tau_log_init) + i.tau_log_printf 0x00018f78 Section 0 tau_log.o(i.tau_log_printf) + i.tau_log_push_log 0x00018ffc Section 0 tau_log.o(i.tau_log_push_log) + i.vidc_callback 0x00019074 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x00019075 Thumb Code 150 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x00019128 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x00019129 Thumb Code 254 hal_internal_vsync.o(i.vpre_err_reset) + .constdata 0x00019240 Section 18876 honor90pro_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x00019240 Data 84 honor90pro_demo.o(.constdata) + .constdata 0x0001dbfc Section 40 hal_dsi_rx_ctrl.o(.constdata) + .constdata 0x0001dc24 Section 28 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001dc40 Section 182 hal_gpio.o(.constdata) + s_gpio_map 0x0001dc40 Data 104 hal_gpio.o(.constdata) + s_gpio_perf 0x0001dca8 Data 78 hal_gpio.o(.constdata) + .constdata 0x0001dcf8 Section 48 hal_uart.o(.constdata) + .constdata 0x0001dd28 Section 16 drv_uart.o(.constdata) + .conststring 0x0001dd38 Section 66 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001dd7c Section 144 hal_internal_vsync.o(.conststring) + .conststring 0x0001de0c Section 70 hal_internal_dcs.o(.conststring) + .data 0x00070000 Section 16 honor90pro_demo.o(.data) + panel_display_done 0x00070000 Data 1 honor90pro_demo.o(.data) + sg_system_resume 0x00070001 Data 1 honor90pro_demo.o(.data) + sg_system_suspend 0x00070002 Data 1 honor90pro_demo.o(.data) + AOD_ON 0x00070003 Data 1 honor90pro_demo.o(.data) + display_on_flag 0x00070004 Data 1 honor90pro_demo.o(.data) + g_rx_ctrl_handle 0x00070008 Data 4 honor90pro_demo.o(.data) + g_tx_ctrl_handle 0x0007000c Data 4 honor90pro_demo.o(.data) + .data 0x00070010 Section 48 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00070010 Data 1 hal_dsi_rx_ctrl.o(.data) + g_crc_check_enable 0x00070011 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00070014 Data 4 hal_dsi_rx_ctrl.o(.data) + g_before_draw_col 0x00070018 Data 4 hal_dsi_rx_ctrl.o(.data) + g_before_draw_page 0x0007001c Data 4 hal_dsi_rx_ctrl.o(.data) + pre_step 0x00070020 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_cmd_filter 0x00070024 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_x 0x00070028 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_y 0x0007002c Data 4 hal_dsi_rx_ctrl.o(.data) + pre_value 0x00070030 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_x 0x00070034 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_y 0x00070038 Data 4 hal_dsi_rx_ctrl.o(.data) + pre_value 0x0007003c Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00070040 Section 92 hal_dsi_tx_ctrl.o(.data) + sg_bta_vsync_flag 0x00070040 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_vsync_flag 0x00070041 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_enter_sleep_cmd 0x00070042 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_fldc_cg_mode 0x00070043 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_scl_fir 0x00070044 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_honly_bypass_fir 0x00070045 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_bcs 0x00070046 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_enhc 0x00070047 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_edge_dect 0x00070048 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_edge_enh 0x00070049 Data 1 hal_dsi_tx_ctrl.o(.data) + sg_bypass_dith 0x0007004a Data 1 hal_dsi_tx_ctrl.o(.data) + sg_dith_judge 0x0007004b Data 1 hal_dsi_tx_ctrl.o(.data) + sg_endianness 0x0007004c Data 1 hal_dsi_tx_ctrl.o(.data) + sg_test_pattern_en 0x0007004d Data 1 hal_dsi_tx_ctrl.o(.data) + sg_dith_judge_thr 0x00070050 Data 4 hal_dsi_tx_ctrl.o(.data) + sg_ccm_para 0x00070054 Data 36 hal_dsi_tx_ctrl.o(.data) + sg_honly_para 0x00070078 Data 36 hal_dsi_tx_ctrl.o(.data) + .data 0x0007009c Section 2 hal_swire.o(.data) + sg_swire_timer 0x0007009c Data 1 hal_swire.o(.data) + sg_swire_repeat 0x0007009d Data 1 hal_swire.o(.data) + .data 0x000700a0 Section 8 hal_pwr.o(.data) + sg_wake_up_io 0x000700a0 Data 1 hal_pwr.o(.data) + sg_stop_sleep_wakeup_int 0x000700a4 Data 4 hal_pwr.o(.data) + .data 0x000700a8 Section 1 tau_log.o(.data) + g_log_port 0x000700a8 Data 1 tau_log.o(.data) + .data 0x000700ac Section 24 hal_uart.o(.data) + sg_dma_callback 0x000700bc Data 4 hal_uart.o(.data) + sg_user_data 0x000700c0 Data 4 hal_uart.o(.data) + .data 0x000700c4 Section 16 hal_internal_vsync.o(.data) + s_te_refine_mode 0x000700c4 Data 1 hal_internal_vsync.o(.data) + .data 0x000700d4 Section 36 hal_internal_dcs.o(.data) + g_imm_packet 0x000700d4 Data 24 hal_internal_dcs.o(.data) + g_cus_rx_write_cmd_handle 0x000700ec Data 12 hal_internal_dcs.o(.data) + .data 0x000700f8 Section 12 drv_common.o(.data) + s_my_tick 0x000700f8 Data 4 drv_common.o(.data) + .data 0x00070104 Section 1 drv_common.o(.data) + .data 0x00070108 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x00070108 Data 4 drv_gpio.o(.data) + .data 0x0007010c Section 4 drv_swire.o(.data) + sg_drv_swire_cb 0x0007010c Data 4 drv_swire.o(.data) + .data 0x00070110 Section 80 drv_timer.o(.data) + sg_timer_info 0x00070110 Data 80 drv_timer.o(.data) + .data 0x00070160 Section 4 drv_se.o(.data) + chip_info 0x00070160 Data 4 drv_se.o(.data) + .data 0x00070164 Section 1 drv_dsi_rx.o(.data) + sg_rx_drv_level 0x00070164 Data 1 drv_dsi_rx.o(.data) + .data 0x00070168 Section 8 drv_rxbr.o(.data) + .data 0x00070170 Section 4 drv_vidc.o(.data) + .data 0x00070174 Section 400 drv_dma.o(.data) + sg_dma_handle 0x00070174 Data 256 drv_dma.o(.data) + .data 0x00070304 Section 4 stdout.o(.data) + .bss 0x00070308 Section 208 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x00070308 Data 208 hal_dsi_rx_ctrl.o(.bss) + .bss 0x000703d8 Section 184 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x000703d8 Data 92 hal_dsi_tx_ctrl.o(.bss) + sg_dsi_tx_param 0x00070434 Data 92 hal_dsi_tx_ctrl.o(.bss) + .bss 0x00070490 Section 256 tau_log.o(.bss) + g_log_buf 0x00070490 Data 256 tau_log.o(.bss) + .bss 0x00070590 Section 68 hal_internal_vsync.o(.bss) + .bss 0x000705d4 Section 2048 hal_internal_dcs.o(.bss) + .bss 0x00070dd4 Section 255 hal_internal_dcs.o(.bss) + g_imm_buffer 0x00070dd4 Data 255 hal_internal_dcs.o(.bss) + .bss 0x00070ed4 Section 68 hal_internal_fb.o(.bss) + .bss 0x00070f18 Section 68 hal_internal_svs.o(.bss) + sg_sys_handler 0x00070f18 Data 68 hal_internal_svs.o(.bss) + .bss 0x00070f5c Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00070f5c Data 64 drv_gpio.o(.bss) + .bss 0x00070f9c Section 4204 dcs_packet_fifo.o(.bss) + .bss 0x00072008 Section 16 drv_dma.o(.bss) + sg_dma_int_list 0x00072008 Data 16 drv_dma.o(.bss) + .bss 0x00072018 Section 96 drv_uart.o(.bss) + sg_uart_userdata 0x00072018 Data 96 drv_uart.o(.bss) + STACK 0x00072078 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + FLSCTRL_IRQn_Handler 0x00010107 Thumb Code 2 startup_armcm0.o(.text) + WDG_IRQn_Handler 0x00010113 Thumb Code 2 startup_armcm0.o(.text) + I2C0_IRQn_Handler 0x00010117 Thumb Code 2 startup_armcm0.o(.text) + I2C1_IRQn_Handler 0x00010119 Thumb Code 2 startup_armcm0.o(.text) + SPIS_IRQn_Handler 0x0001011b Thumb Code 2 startup_armcm0.o(.text) + SPIM_IRQn_Handler 0x0001011d Thumb Code 2 startup_armcm0.o(.text) + I2C2_IRQn_Handler 0x00010121 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + strlen 0x000101e9 Thumb Code 14 strlen.o(.text) + memcmp 0x000101f7 Thumb Code 26 memcmp.o(.text) + __aeabi_fadd 0x00010211 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x000102b3 Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x000102bb Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x000102c3 Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x0001033d Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x000103b9 Thumb Code 24 fscalb.o(.text) + scalbnf 0x000103b9 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103d1 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x00010519 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x00010525 Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x00010535 Thumb Code 202 dmul.o(.text) + __aeabi_ui2f 0x00010605 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x00010615 Thumb Code 24 dfltui.o(.text) + __aeabi_f2uiz 0x00010631 Thumb Code 40 ffixui.o(.text) + __aeabi_d2uiz 0x00010659 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x00010695 Thumb Code 40 f2d.o(.text) + __aeabi_d2f 0x000106bd Thumb Code 56 d2f.o(.text) + __aeabi_cfcmpeq 0x000106f5 Thumb Code 0 cfcmple.o(.text) + __aeabi_cfcmple 0x000106f5 Thumb Code 20 cfcmple.o(.text) + __aeabi_cfrcmple 0x00010709 Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x0001071d Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x0001077d Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x0001077d Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x0001079d Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x0001079d Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000107bf Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000107bf Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x000107e5 Thumb Code 0 iusefp.o(.text) + _float_round 0x000107e5 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x000107f5 Thumb Code 114 fepilogue.o(.text) + _double_round 0x00010867 Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x00010881 Thumb Code 164 depilogue.o(.text) + __aeabi_ddiv 0x00010925 Thumb Code 234 ddiv.o(.text) + __aeabi_d2ulz 0x00010a15 Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010a55 Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010a7d Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010a7d Thumb Code 0 init.o(.text) + __decompress 0x00010aa1 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010aa1 Thumb Code 86 __dczerorl2.o(.text) + AP_NRESET_IRQn_Handler 0x00010af9 Thumb Code 22 drv_gpio.o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010b15 Thumb Code 78 drv_dma.o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010b71 Thumb Code 10 drv_gpio.o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010b7b Thumb Code 10 drv_gpio.o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010b85 Thumb Code 10 drv_gpio.o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010b8f Thumb Code 10 drv_gpio.o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010b99 Thumb Code 10 drv_gpio.o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010ba3 Thumb Code 10 drv_gpio.o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010bad Thumb Code 10 drv_gpio.o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010bb7 Thumb Code 10 drv_gpio.o(i.EXTI_INT7_IRQn_Handler) + HardFault_Handler 0x00010bc1 Thumb Code 14 drv_common.o(i.HardFault_Handler) + LCDC_IRQn_Handler 0x00010c09 Thumb Code 118 hal_internal_vsync.o(i.LCDC_IRQn_Handler) + MEMC_IRQn_Handler 0x00010d09 Thumb Code 154 drv_memc.o(i.MEMC_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010da5 Thumb Code 70 drv_dsi_tx.o(i.MIPI_TX_IRQn_Handler) + Note11Pro_demo 0x00010e5d Thumb Code 72 honor90pro_demo.o(i.Note11Pro_demo) + SWIRE_IRQn_Handler 0x00010ec9 Thumb Code 38 drv_swire.o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00010ef9 Thumb Code 20 drv_common.o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00010f11 Thumb Code 10 drv_timer.o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x00010f1b Thumb Code 10 drv_timer.o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00010f25 Thumb Code 10 drv_timer.o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x00010f2f Thumb Code 10 drv_timer.o(i.TIMER3_IRQn_Handler) + VIDC_IRQn_Handler 0x00010f39 Thumb Code 22 drv_vidc.o(i.VIDC_IRQn_Handler) + VPRE1_IRQn_Handler 0x00010f55 Thumb Code 22 drv_rxbr.o(i.VPRE1_IRQn_Handler) + VPRE_IRQn_Handler 0x00010f71 Thumb Code 104 hal_internal_dcs.o(i.VPRE_IRQn_Handler) + __0printf 0x00010fdd Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x00010fdd Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x00010fdd Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x00010fdd Thumb Code 0 printfa.o(i.__0printf) + printf 0x00010fdd Thumb Code 0 printfa.o(i.__0printf) + __scatterload_null 0x00010ffd Thumb Code 2 handlers.o(i.__scatterload_null) + s_RAM_CK 0x00011000 Data 28 drv_common.o(.ARM.__at_0x11000) + g_tau_log 0x0001101c Data 16 tau_log.o(.ARM.__at_0x1101C) + sg_pq_para 0x0001102c Data 22 hal_dsi_tx_ctrl.o(.ARM.__at_0x1102C) + MIPI_RX_IRQn_Handler 0x00011045 Thumb Code 354 drv_dsi_rx.o(i.MIPI_RX_IRQn_Handler) + UART_IRQn_Handler 0x000113a9 Thumb Code 364 drv_uart.o(i.UART_IRQn_Handler) + __0vsprintf 0x00011529 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x00011529 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x00011529 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x00011529 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x00011529 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x0001154d Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x0001157b Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_copy 0x000115cd Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x000115db Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + app_display_init 0x00012241 Thumb Code 90 honor90pro_demo.o(i.app_display_init) + app_gpio_init 0x000122c9 Thumb Code 20 honor90pro_demo.o(i.app_gpio_init) + board_Init 0x00012569 Thumb Code 20 board.o(i.board_Init) + ceil 0x00012581 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x000126fd Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x00012755 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x0001276d Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x000127b1 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x000127d5 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x000127ed Thumb Code 40 tau_delay.o(i.delayUs) + drv_common_system_init 0x00012819 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_enable_clock 0x00012821 Thumb Code 54 drv_crgu.o(i.drv_crgu_enable_clock) + drv_crgu_get_rxbr_clk 0x0001285d Thumb Code 70 drv_crgu.o(i.drv_crgu_get_rxbr_clk) + drv_crgu_reset_modules 0x000128c5 Thumb Code 10 drv_crgu.o(i.drv_crgu_reset_modules) + drv_crgu_set_ahb_clk 0x000128d5 Thumb Code 34 drv_crgu.o(i.drv_crgu_set_ahb_clk) + drv_crgu_set_clock_div 0x000128fd Thumb Code 12 drv_crgu.o(i.drv_crgu_set_clock_div) + drv_crgu_set_dpi_clk 0x0001290d Thumb Code 54 drv_crgu.o(i.drv_crgu_set_dpi_clk) + drv_crgu_set_dsc_clk 0x00012949 Thumb Code 52 drv_crgu.o(i.drv_crgu_set_dsc_clk) + drv_crgu_set_fb_clk 0x00012981 Thumb Code 34 drv_crgu.o(i.drv_crgu_set_fb_clk) + drv_crgu_set_lcdc_clk 0x000129a9 Thumb Code 36 drv_crgu.o(i.drv_crgu_set_lcdc_clk) + drv_crgu_set_reset 0x000129d1 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_clk 0x000129e9 Thumb Code 34 drv_crgu.o(i.drv_crgu_set_rxbr_clk) + drv_crgu_set_vidc_clk 0x00012a11 Thumb Code 36 drv_crgu.o(i.drv_crgu_set_vidc_clk) + drv_dma_clear_status 0x00012a39 Thumb Code 20 drv_dma.o(i.drv_dma_clear_status) + drv_dsc_dec_disable 0x00012a65 Thumb Code 20 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00012a81 Thumb Code 44 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00012ab9 Thumb Code 22 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_irqen 0x00012ad9 Thumb Code 24 drv_dsc_dec.o(i.drv_dsc_dec_set_irqen) + drv_dsi_rx_calc_ipi_tx_delay 0x00012af5 Thumb Code 252 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00012c01 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00012cad Thumb Code 10 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_ddi_crc_en 0x00012cbd Thumb Code 10 drv_dsi_rx.o(i.drv_dsi_rx_get_ddi_crc_en) + drv_dsi_rx_get_max_ret_size 0x00012ccd Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00012cd9 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_check_crc 0x00012cf1 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_check_crc) + drv_dsi_rx_set_ctrl_cfg 0x00012d0d Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00012d31 Thumb Code 10 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_ddi_crc_en 0x00012d41 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_crc_en) + drv_dsi_rx_set_inten 0x00012d5d Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00012d69 Thumb Code 12 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_ipi_ycbcr_frmt 0x00012d79 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_ycbcr_frmt) + drv_dsi_rx_set_lane_swap 0x00012d95 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00012da9 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_tear_resp_en 0x00012dcd Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_set_tear_resp_en) + drv_dsi_rx_set_up_phy 0x00012de9 Thumb Code 224 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00012ee9 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00012f01 Thumb Code 18 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00012f19 Thumb Code 82 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00012f71 Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x00012f7d Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00012f9d Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00012fa9 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00012fb9 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00012fc9 Thumb Code 32 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00012fed Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x00012ff9 Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00013005 Thumb Code 6 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x00013011 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x0001302d Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x0001304d Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x0001305d Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x000130c5 Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x00013109 Thumb Code 314 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00013259 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x00013279 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00013285 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x000132a9 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x000132c5 Thumb Code 14 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x000132d9 Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x00013319 Thumb Code 18 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x00013331 Thumb Code 14 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x00013345 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00013369 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x00013375 Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x000133a1 Thumb Code 226 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_efuse_enter_inactive 0x00013489 Thumb Code 54 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x000134bf Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x000134cb Thumb Code 58 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x00013505 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_register_ap_reset_callback 0x00013541 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x0001354d Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00013561 Thumb Code 62 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x000135a5 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode 0x000135c5 Thumb Code 16 drv_gpio.o(i.drv_gpio_set_mode) + drv_lcdc_bcsa_config 0x000135f9 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_bcsa_config) + drv_lcdc_cfg_int_frame 0x00013621 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_cfg_int_frame) + drv_lcdc_cmd_start 0x00013665 Thumb Code 46 drv_lcdc.o(i.drv_lcdc_cmd_start) + drv_lcdc_config_acc_command_mode 0x00013699 Thumb Code 14 drv_lcdc.o(i.drv_lcdc_config_acc_command_mode) + drv_lcdc_config_int 0x000136ad Thumb Code 50 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x000136e5 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite_rgb 0x0001370d Thumb Code 18 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_src_parameter 0x00013725 Thumb Code 72 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_crop_hact 0x00013775 Thumb Code 10 drv_lcdc.o(i.drv_lcdc_crop_hact) + drv_lcdc_ctrl_flow 0x00013785 Thumb Code 50 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_dith_config 0x000137bd Thumb Code 40 drv_lcdc.o(i.drv_lcdc_dith_config) + drv_lcdc_edge_dect_config 0x000137ed Thumb Code 50 drv_lcdc.o(i.drv_lcdc_edge_dect_config) + drv_lcdc_edge_enh_config 0x00013829 Thumb Code 86 drv_lcdc.o(i.drv_lcdc_edge_enh_config) + drv_lcdc_enable_shadow_reg 0x0001388d Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_endianness_config 0x000138b1 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_endianness_config) + drv_lcdc_fc_config 0x000138cd Thumb Code 24 drv_lcdc.o(i.drv_lcdc_fc_config) + drv_lcdc_fldc_config 0x000138ed Thumb Code 32 drv_lcdc.o(i.drv_lcdc_fldc_config) + drv_lcdc_function_disable 0x00013911 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_function_disable) + drv_lcdc_function_enable 0x00013935 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_function_enable) + drv_lcdc_set_int 0x00013959 Thumb Code 54 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_prefetch 0x00013995 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_prefetch) + drv_lcdc_set_tear_line 0x000139b1 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_tear_line) + drv_lcdc_stop_display 0x000139cd Thumb Code 12 drv_lcdc.o(i.drv_lcdc_stop_display) + drv_lcdc_vid_hw_start 0x000139dd Thumb Code 56 drv_lcdc.o(i.drv_lcdc_vid_hw_start) + drv_lcdc_vintp_mode_config 0x00013a19 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_vintp_mode_config) + drv_memc_clear_status 0x00013a31 Thumb Code 14 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00013a45 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00013a85 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00013a95 Thumb Code 20 drv_memc.o(i.drv_memc_get_status) + drv_memc_get_tear_mode 0x00013aad Thumb Code 10 drv_memc.o(i.drv_memc_get_tear_mode) + drv_memc_rate_transfer_sel 0x00013abd Thumb Code 22 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00013ad9 Thumb Code 16 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00013aed Thumb Code 16 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_circ_mode_enable 0x00013b05 Thumb Code 24 drv_memc.o(i.drv_memc_set_circ_mode_enable) + drv_memc_set_data_mode 0x00013b21 Thumb Code 14 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00013b35 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_frame_drop_select 0x00013b4d Thumb Code 24 drv_memc.o(i.drv_memc_set_frame_drop_select) + drv_memc_set_fs_en_conditions 0x00013b69 Thumb Code 18 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_lcdc_st_conditions 0x00013b81 Thumb Code 20 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00013b9d Thumb Code 28 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_ltpo_pu_thres 0x00013bbd Thumb Code 18 drv_memc.o(i.drv_memc_set_ltpo_pu_thres) + drv_memc_set_tear_mode 0x00013bd5 Thumb Code 16 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00013be9 Thumb Code 36 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00013c15 Thumb Code 16 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_phy_test_clear 0x00013c29 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00013c39 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_pwr_efuse_pd 0x00013c51 Thumb Code 36 drv_pwr.o(i.drv_pwr_efuse_pd) + drv_pwr_enter_deep_sleep_mode 0x00013c81 Thumb Code 60 drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) + drv_pwr_enter_sleep_mode_ex 0x00013ccd Thumb Code 34 drv_pwr.o(i.drv_pwr_enter_sleep_mode_ex) + drv_pwr_enter_stop_sleep_mode 0x00013d01 Thumb Code 132 drv_pwr.o(i.drv_pwr_enter_stop_sleep_mode) + drv_pwr_exit_sleep_mode 0x00013d99 Thumb Code 32 drv_pwr.o(i.drv_pwr_exit_sleep_mode) + drv_pwr_get_power_ready_st 0x00013dc1 Thumb Code 10 drv_pwr.o(i.drv_pwr_get_power_ready_st) + drv_pwr_set_breath_screen_power_sel 0x00013dd1 Thumb Code 34 drv_pwr.o(i.drv_pwr_set_breath_screen_power_sel) + drv_pwr_set_digit_power_sel 0x00013df9 Thumb Code 34 drv_pwr.o(i.drv_pwr_set_digit_power_sel) + drv_pwr_set_pll_clk 0x00013e21 Thumb Code 30 drv_pwr.o(i.drv_pwr_set_pll_clk) + drv_pwr_set_wakeup_type 0x00013e55 Thumb Code 40 drv_pwr.o(i.drv_pwr_set_wakeup_type) + drv_pwr_write_lock 0x00013e81 Thumb Code 18 drv_pwr.o(i.drv_pwr_write_lock) + drv_rxbr_clear_pkt_buffer 0x00013ea1 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00013eb1 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00013ebd Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x00013f19 Thumb Code 18 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_hline_rcv0_cfg 0x00013f65 Thumb Code 14 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv1_cfg 0x00013f79 Thumb Code 14 drv_rxbr.o(i.drv_rxbr_hline_rcv1_cfg) + drv_rxbr_hline_rcv_cfg 0x00013f8d Thumb Code 10 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq1_callback 0x00013f9d Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x00013fa9 Thumb Code 18 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_color_format 0x00013fc1 Thumb Code 24 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_filter_regs 0x00013fdd Thumb Code 32 drv_rxbr.o(i.drv_rxbr_set_filter_regs) + drv_rxbr_set_inten 0x00014001 Thumb Code 22 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x0001401d Thumb Code 18 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x00014035 Thumb Code 56 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x00014075 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x00014085 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_se_init 0x00014095 Thumb Code 106 drv_se.o(i.drv_se_init) + drv_se_set_dsc 0x0001410d Thumb Code 162 drv_se.o(i.drv_se_set_dsc) + drv_se_set_lcdc 0x000141e1 Thumb Code 88 drv_se.o(i.drv_se_set_lcdc) + drv_se_set_memc 0x00014269 Thumb Code 54 drv_se.o(i.drv_se_set_memc) + drv_se_set_rxbr 0x000142d1 Thumb Code 158 drv_se.o(i.drv_se_set_rxbr) + drv_se_set_vidc 0x000143a1 Thumb Code 122 drv_se.o(i.drv_se_set_vidc) + drv_se_start_rx 0x0001444d Thumb Code 16 drv_se.o(i.drv_se_start_rx) + drv_swire_enable 0x00014461 Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_get_pulse_count 0x0001447d Thumb Code 6 drv_swire.o(i.drv_swire_get_pulse_count) + drv_swire_register_callback 0x00014489 Thumb Code 6 drv_swire.o(i.drv_swire_register_callback) + drv_swire_set_bit_time 0x00014495 Thumb Code 18 drv_swire.o(i.drv_swire_set_bit_time) + drv_swire_set_int 0x000144ad Thumb Code 64 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x000144f5 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_swire_set_pulse_count 0x00014511 Thumb Code 6 drv_swire.o(i.drv_swire_set_pulse_count) + drv_swire_set_trig_mode 0x0001451d Thumb Code 24 drv_swire.o(i.drv_swire_set_trig_mode) + drv_sys_cfg_clear_all_int 0x00014539 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00014545 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_trig 0x0001456d Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x00014591 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x000145b5 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_sel_swire_timer 0x000145d9 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_swire_timer) + drv_sys_cfg_set_int 0x000145f1 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x0001462f Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x00014651 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_set_compare_val 0x0001469d Thumb Code 50 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x000146dd Thumb Code 68 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x00014725 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x0001474d Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x0001475d Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x0001477d Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_tx_phy_test_write_code 0x0001479d Thumb Code 34 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_uart_abort_recv 0x000147c5 Thumb Code 46 drv_uart.o(i.drv_uart_abort_recv) + drv_uart_abort_send 0x000147f9 Thumb Code 46 drv_uart.o(i.drv_uart_abort_send) + drv_uart_config_int 0x0001482d Thumb Code 20 drv_uart.o(i.drv_uart_config_int) + drv_uart_enable_int 0x00014859 Thumb Code 84 drv_uart.o(i.drv_uart_enable_int) + drv_uart_get_instance 0x000148b5 Thumb Code 36 drv_uart.o(i.drv_uart_get_instance) + drv_uart_init 0x000148dd Thumb Code 206 drv_uart.o(i.drv_uart_init) + drv_uart_reset_rx_fifo 0x000149e9 Thumb Code 28 drv_uart.o(i.drv_uart_reset_rx_fifo) + drv_uart_reset_tx_fifo 0x00014a05 Thumb Code 28 drv_uart.o(i.drv_uart_reset_tx_fifo) + drv_uart_send_blocking 0x00014a21 Thumb Code 26 drv_uart.o(i.drv_uart_send_blocking) + drv_uart_set_baud_rate 0x00014a3b Thumb Code 84 drv_uart.o(i.drv_uart_set_baud_rate) + drv_uart_trans_create_handle 0x00014a91 Thumb Code 72 drv_uart.o(i.drv_uart_trans_create_handle) + drv_vidc_clear_irq 0x00014add Thumb Code 10 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00014aed Thumb Code 26 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00014b0d Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_int_source 0x00014b4d Thumb Code 40 drv_vidc.o(i.drv_vidc_get_int_source) + drv_vidc_get_irq_status 0x00014b79 Thumb Code 20 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x00014b91 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x00014bbd Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x00014bc9 Thumb Code 8 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_circ_mode_enable 0x00014bd5 Thumb Code 24 drv_vidc.o(i.drv_vidc_set_circ_mode_enable) + drv_vidc_set_dither_config 0x00014bf1 Thumb Code 50 drv_vidc.o(i.drv_vidc_set_dither_config) + drv_vidc_set_dst_parameter 0x00014c29 Thumb Code 86 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_honly_hcoef0 0x00014c85 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_honly_hcoef0) + drv_vidc_set_honly_hinitb 0x00014c91 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_honly_hinitb) + drv_vidc_set_honly_hinitr 0x00014cbd Thumb Code 42 drv_vidc.o(i.drv_vidc_set_honly_hinitr) + drv_vidc_set_irqen 0x00014ced Thumb Code 22 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00014d09 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_pentile_swap 0x00014d1d Thumb Code 20 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x00014d39 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x00014d45 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x00014d5d Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00014d69 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x00014d75 Thumb Code 14 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00014d89 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00014d95 Thumb Code 6 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00014da1 Thumb Code 28 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_vidc_set_vintp_config 0x00014dc1 Thumb Code 52 drv_vidc.o(i.drv_vidc_set_vintp_config) + fputc 0x00014df9 Thumb Code 42 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00014e6d Thumb Code 60 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_dcs_async_handler 0x00014ead Thumb Code 60 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dcs_async_handler) + hal_dsi_rx_ctrl_deinit 0x00014eed Thumb Code 132 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_get_max_ret_size 0x00014f81 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00014fa1 Thumb Code 158 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x00015749 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_send_ack_cmd 0x00015781 Thumb Code 210 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_check_crc 0x00015871 Thumb Code 20 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_check_crc) + hal_dsi_rx_ctrl_start 0x000158b9 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x000158e9 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_input_frame_rate 0x00015919 Thumb Code 10 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) + hal_dsi_rx_ctrl_toggle_resolution 0x00015925 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x00015bc5 Thumb Code 48 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00015bfd Thumb Code 102 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_gen_a_tear_signal 0x00015c71 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_gen_a_tear_signal) + hal_dsi_tx_ctrl_init 0x00015c95 Thumb Code 110 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00015d21 Thumb Code 8 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_tear_mode 0x00015d29 Thumb Code 10 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_tear_mode) + hal_dsi_tx_ctrl_start 0x00015d35 Thumb Code 134 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00015dc5 Thumb Code 52 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00015dfd Thumb Code 238 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00015ef1 Thumb Code 202 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_config_pad 0x000165a9 Thumb Code 58 hal_gpio.o(i.hal_gpio_config_pad) + hal_gpio_ctrl_eint 0x000165e5 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_init_eint 0x000165fd Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x0001663d Thumb Code 22 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x00016653 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00016671 Thumb Code 22 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x0001668d Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x000166dd Thumb Code 92 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x0001673d Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_internal_sync_get_hight_performan_mode 0x00016745 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change 0x00016755 Thumb Code 336 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_sync_register_lcdc_cb 0x00016909 Thumb Code 8 hal_internal_vsync.o(i.hal_internal_sync_register_lcdc_cb) + hal_internal_vsync_deinit 0x00016915 Thumb Code 22 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00016935 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00016941 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tx_state 0x00016955 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00016961 Thumb Code 206 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00016a49 Thumb Code 194 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_rx_state 0x00016b11 Thumb Code 28 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_tear_mode 0x00016b31 Thumb Code 424 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00016d1d Thumb Code 78 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_internal_vsync_toggle_input_frame_rate 0x00016d75 Thumb Code 134 hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) + hal_intl_dcs_init_sw_fltr 0x00016dfd Thumb Code 90 hal_internal_dcs.o(i.hal_intl_dcs_init_sw_fltr) + hal_intl_dcs_set_auto_hw_filter 0x00017495 Thumb Code 130 hal_internal_dcs.o(i.hal_intl_dcs_set_auto_hw_filter) + hal_intl_fb_cal_fb_info 0x0001754d Thumb Code 780 hal_internal_fb.o(i.hal_intl_fb_cal_fb_info) + hal_intl_fb_get_memc_flow_mode 0x00017a19 Thumb Code 6 hal_internal_fb.o(i.hal_intl_fb_get_memc_flow_mode) + hal_intl_fb_get_rx_fb_info 0x00017a25 Thumb Code 12 hal_internal_fb.o(i.hal_intl_fb_get_rx_fb_info) + hal_intl_fb_get_tx_fb_info 0x00017a35 Thumb Code 12 hal_internal_fb.o(i.hal_intl_fb_get_tx_fb_info) + hal_intl_fb_get_user_flow 0x00017a45 Thumb Code 6 hal_internal_fb.o(i.hal_intl_fb_get_user_flow) + hal_intl_svs_deinit_rx 0x00017a51 Thumb Code 32 hal_internal_svs.o(i.hal_intl_svs_deinit_rx) + hal_intl_svs_deinit_tx 0x00017a79 Thumb Code 10 hal_internal_svs.o(i.hal_intl_svs_deinit_tx) + hal_intl_svs_handle 0x00017a89 Thumb Code 24 hal_internal_svs.o(i.hal_intl_svs_handle) + hal_intl_svs_init_rx 0x00017aad Thumb Code 120 hal_internal_svs.o(i.hal_intl_svs_init_rx) + hal_intl_svs_init_tx 0x00017b2d Thumb Code 16 hal_internal_svs.o(i.hal_intl_svs_init_tx) + hal_intl_svs_set_input_frate 0x00017b41 Thumb Code 100 hal_internal_svs.o(i.hal_intl_svs_set_input_frate) + hal_intl_svs_set_rx_vtt 0x00017bb1 Thumb Code 6 hal_internal_svs.o(i.hal_intl_svs_set_rx_vtt) + hal_intl_svs_update_rxbr_clk 0x00017bbd Thumb Code 52 hal_internal_svs.o(i.hal_intl_svs_update_rxbr_clk) + hal_lcdc_displayproc_config 0x00017c05 Thumb Code 94 hal_dsi_tx_ctrl.o(i.hal_lcdc_displayproc_config) + hal_lcdc_postproc_config 0x00017d25 Thumb Code 276 hal_dsi_tx_ctrl.o(i.hal_lcdc_postproc_config) + hal_lcdc_upscaler_config 0x00017ead Thumb Code 202 hal_dsi_tx_ctrl.o(i.hal_lcdc_upscaler_config) + hal_nonshadow_func_update 0x00017f8d Thumb Code 180 hal_dsi_tx_ctrl.o(i.hal_nonshadow_func_update) + hal_pwr_enter_deep_sleep_mode 0x00018049 Thumb Code 42 hal_pwr.o(i.hal_pwr_enter_deep_sleep_mode) + hal_pwr_enter_normal_sleep_mode 0x00018073 Thumb Code 8 hal_pwr.o(i.hal_pwr_enter_normal_sleep_mode) + hal_pwr_enter_stop_sleep_mode 0x0001807d Thumb Code 88 hal_pwr.o(i.hal_pwr_enter_stop_sleep_mode) + hal_pwr_exit_sleep_mode 0x000180e1 Thumb Code 10 hal_pwr.o(i.hal_pwr_exit_sleep_mode) + hal_pwr_get_vcc_power_ready 0x000180eb Thumb Code 8 hal_pwr.o(i.hal_pwr_get_vcc_power_ready) + hal_pwr_set_main_power 0x000180f3 Thumb Code 8 hal_pwr.o(i.hal_pwr_set_main_power) + hal_pwr_set_sleep_mode_power 0x000180fb Thumb Code 8 hal_pwr.o(i.hal_pwr_set_sleep_mode_power) + hal_pwr_set_stop_sleep_wakeup_pin 0x00018105 Thumb Code 86 hal_pwr.o(i.hal_pwr_set_stop_sleep_wakeup_pin) + hal_swire_deinit 0x00018169 Thumb Code 60 hal_swire.o(i.hal_swire_deinit) + hal_swire_enable 0x000181a9 Thumb Code 86 hal_swire.o(i.hal_swire_enable) + hal_swire_init 0x00018205 Thumb Code 74 hal_swire.o(i.hal_swire_init) + hal_swire_set_pulse 0x0001825d Thumb Code 32 hal_swire.o(i.hal_swire_set_pulse) + hal_swire_set_timer 0x00018281 Thumb Code 60 hal_swire.o(i.hal_swire_set_timer) + hal_system_init 0x000182c1 Thumb Code 192 hal_system.o(i.hal_system_init) + hal_system_updata_sysclk 0x000183a5 Thumb Code 60 hal_system.o(i.hal_system_updata_sysclk) + hal_timer_deinit 0x000183f5 Thumb Code 48 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x00018425 Thumb Code 28 hal_timer.o(i.hal_timer_init) + hal_timer_set_repeat 0x00018441 Thumb Code 8 hal_timer.o(i.hal_timer_set_repeat) + hal_uart_init 0x00018479 Thumb Code 134 hal_uart.o(i.hal_uart_init) + hal_uart_send_blocking 0x0001850d Thumb Code 24 hal_uart.o(i.hal_uart_send_blocking) + hal_vsync_func_update 0x00018529 Thumb Code 18 hal_dsi_tx_ctrl.o(i.hal_vsync_func_update) + hal_vsync_reset_lcdc_scaler 0x00018541 Thumb Code 206 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + main 0x00018621 Thumb Code 22 main.o(i.main) + tau_log_init 0x00018f45 Thumb Code 48 tau_log.o(i.tau_log_init) + tau_log_printf 0x00018f79 Thumb Code 116 tau_log.o(i.tau_log_printf) + tau_log_push_log 0x00018ffd Thumb Code 118 tau_log.o(i.tau_log_push_log) + panel_init_code 0x00019294 Data 18646 honor90pro_demo.o(.constdata) + Region$$Table$$Base 0x0001de54 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001de74 Number 0 anon$$obj.o(Region$$Table) + sg_uart0_tx_handle 0x000700ac Data 4 hal_uart.o(.data) + sg_uart0_rx_handle 0x000700b0 Data 4 hal_uart.o(.data) + sg_uart1_tx_handle 0x000700b4 Data 4 hal_uart.o(.data) + sg_uart1_rx_handle 0x000700b8 Data 4 hal_uart.o(.data) + g_sof_gen_te_func 0x000700c8 Data 4 hal_internal_vsync.o(.data) + hal_internal_vsync_handle_callback 0x000700cc Data 4 hal_internal_vsync.o(.data) + hal_internal_disp_end_handle_callback 0x000700d0 Data 4 hal_internal_vsync.o(.data) + g_systick_cb_func 0x000700fc Data 4 drv_common.o(.data) + g_system_clock 0x00070100 Data 4 drv_common.o(.data) + g_system_delay_step 0x00070104 Data 1 drv_common.o(.data) + g_int_rxbr_irq0_cb_func 0x00070168 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x0007016c Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x00070170 Data 4 drv_vidc.o(.data) + dma_req_map 0x00070274 Data 144 drv_dma.o(.data) + __stdout 0x00070304 Data 4 stdout.o(.data) + g_vsync_handle 0x00070590 Data 40 hal_internal_vsync.o(.bss) + sg_pro_motion_handle 0x000705b8 Data 28 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x000705d4 Data 2048 hal_internal_dcs.o(.bss) + g_rx_fb_info 0x00070ed4 Data 68 hal_internal_fb.o(.bss) + g_packet_fifo 0x00070f9c Data 4204 dcs_packet_fifo.o(.bss) + __stack_limit 0x00072078 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00073078 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000e17c, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000df68]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000de74, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 265 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 1824 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2132 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2135 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2137 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2139 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2140 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2142 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2144 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2133 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 266 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 1827 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 1829 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 1831 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 1833 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x0000000e Code RO 1835 .text mc_p.l(strlen.o) + 0x000101f6 0x000101f6 0x0000001a Code RO 1837 .text mc_p.l(memcmp.o) + 0x00010210 0x00010210 0x000000b2 Code RO 2102 .text mf_p.l(fadd.o) + 0x000102c2 0x000102c2 0x0000007a Code RO 2104 .text mf_p.l(fmul.o) + 0x0001033c 0x0001033c 0x0000007c Code RO 2106 .text mf_p.l(fdiv.o) + 0x000103b8 0x000103b8 0x00000018 Code RO 2108 .text mf_p.l(fscalb.o) + 0x000103d0 0x000103d0 0x00000164 Code RO 2110 .text mf_p.l(dadd.o) + 0x00010534 0x00010534 0x000000d0 Code RO 2112 .text mf_p.l(dmul.o) + 0x00010604 0x00010604 0x0000000e Code RO 2116 .text mf_p.l(ffltui.o) + 0x00010612 0x00010612 0x00000002 PAD + 0x00010614 0x00010614 0x0000001c Code RO 2118 .text mf_p.l(dfltui.o) + 0x00010630 0x00010630 0x00000028 Code RO 2120 .text mf_p.l(ffixui.o) + 0x00010658 0x00010658 0x0000003c Code RO 2122 .text mf_p.l(dfixui.o) + 0x00010694 0x00010694 0x00000028 Code RO 2124 .text mf_p.l(f2d.o) + 0x000106bc 0x000106bc 0x00000038 Code RO 2126 .text mf_p.l(d2f.o) + 0x000106f4 0x000106f4 0x00000014 Code RO 2128 .text mf_p.l(cfcmple.o) + 0x00010708 0x00010708 0x00000014 Code RO 2130 .text mf_p.l(cfrcmple.o) + 0x0001071c 0x0001071c 0x00000060 Code RO 2147 .text mc_p.l(uldiv.o) + 0x0001077c 0x0001077c 0x00000020 Code RO 2149 .text mc_p.l(llshl.o) + 0x0001079c 0x0001079c 0x00000022 Code RO 2151 .text mc_p.l(llushr.o) + 0x000107be 0x000107be 0x00000026 Code RO 2153 .text mc_p.l(llsshr.o) + 0x000107e4 0x000107e4 0x00000000 Code RO 2155 .text mc_p.l(iusefp.o) + 0x000107e4 0x000107e4 0x00000082 Code RO 2156 .text mf_p.l(fepilogue.o) + 0x00010866 0x00010866 0x000000be Code RO 2158 .text mf_p.l(depilogue.o) + 0x00010924 0x00010924 0x000000f0 Code RO 2162 .text mf_p.l(ddiv.o) + 0x00010a14 0x00010a14 0x00000040 Code RO 2164 .text mf_p.l(dfixul.o) + 0x00010a54 0x00010a54 0x00000028 Code RO 2166 .text mf_p.l(cdrcmple.o) + 0x00010a7c 0x00010a7c 0x00000024 Code RO 2168 .text mc_p.l(init.o) + 0x00010aa0 0x00010aa0 0x00000056 Code RO 2178 .text mc_p.l(__dczerorl2.o) + 0x00010af6 0x00010af6 0x00000002 PAD + 0x00010af8 0x00010af8 0x0000001c Code RO 906 i.AP_NRESET_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b14 0x00010b14 0x0000005c Code RO 1673 i.DMA_IRQn_Handler CVWL668T.lib(drv_dma.o) + 0x00010b70 0x00010b70 0x0000000a Code RO 907 i.EXTI_INT0_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b7a 0x00010b7a 0x0000000a Code RO 908 i.EXTI_INT1_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b84 0x00010b84 0x0000000a Code RO 909 i.EXTI_INT2_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b8e 0x00010b8e 0x0000000a Code RO 910 i.EXTI_INT3_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010b98 0x00010b98 0x0000000a Code RO 911 i.EXTI_INT4_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010ba2 0x00010ba2 0x0000000a Code RO 912 i.EXTI_INT5_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010bac 0x00010bac 0x0000000a Code RO 913 i.EXTI_INT6_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010bb6 0x00010bb6 0x0000000a Code RO 914 i.EXTI_INT7_IRQn_Handler CVWL668T.lib(drv_gpio.o) + 0x00010bc0 0x00010bc0 0x00000048 Code RO 829 i.HardFault_Handler CVWL668T.lib(drv_common.o) + 0x00010c08 0x00010c08 0x00000100 Code RO 674 i.LCDC_IRQn_Handler CVWL668T.lib(hal_internal_vsync.o) + 0x00010d08 0x00010d08 0x0000009a Code RO 1433 i.MEMC_IRQn_Handler CVWL668T.lib(drv_memc.o) + 0x00010da2 0x00010da2 0x00000002 PAD + 0x00010da4 0x00010da4 0x000000b8 Code RO 1239 i.MIPI_TX_IRQn_Handler CVWL668T.lib(drv_dsi_tx.o) + 0x00010e5c 0x00010e5c 0x0000006c Code RO 90 i.Note11Pro_demo honor90pro_demo.o + 0x00010ec8 0x00010ec8 0x00000030 Code RO 1068 i.SWIRE_IRQn_Handler CVWL668T.lib(drv_swire.o) + 0x00010ef8 0x00010ef8 0x00000018 Code RO 830 i.SysTick_Handler CVWL668T.lib(drv_common.o) + 0x00010f10 0x00010f10 0x0000000a Code RO 1111 i.TIMER0_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f1a 0x00010f1a 0x0000000a Code RO 1112 i.TIMER1_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f24 0x00010f24 0x0000000a Code RO 1113 i.TIMER2_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f2e 0x00010f2e 0x0000000a Code RO 1114 i.TIMER3_IRQn_Handler CVWL668T.lib(drv_timer.o) + 0x00010f38 0x00010f38 0x0000001c Code RO 1588 i.VIDC_IRQn_Handler CVWL668T.lib(drv_vidc.o) + 0x00010f54 0x00010f54 0x0000001c Code RO 1499 i.VPRE1_IRQn_Handler CVWL668T.lib(drv_rxbr.o) + 0x00010f70 0x00010f70 0x0000006c Code RO 740 i.VPRE_IRQn_Handler CVWL668T.lib(hal_internal_dcs.o) + 0x00010fdc 0x00010fdc 0x00000020 Code RO 2074 i.__0printf mc_p.l(printfa.o) + 0x00010ffc 0x00010ffc 0x00000002 Code RO 2173 i.__scatterload_null mc_p.l(handlers.o) + 0x00010ffe 0x00010ffe 0x00000002 PAD + 0x00011000 0x00011000 0x0000001c Data RO 837 .ARM.__at_0x11000 CVWL668T.lib(drv_common.o) + 0x0001101c 0x0001101c 0x00000010 Data RO 612 .ARM.__at_0x1101C CVWL668T.lib(tau_log.o) + 0x0001102c 0x0001102c 0x00000016 Data RO 413 .ARM.__at_0x1102C CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00011042 0x00011042 0x00000002 PAD + 0x00011044 0x00011044 0x00000364 Code RO 1178 i.MIPI_RX_IRQn_Handler CVWL668T.lib(drv_dsi_rx.o) + 0x000113a8 0x000113a8 0x00000180 Code RO 1736 i.UART_IRQn_Handler CVWL668T.lib(drv_uart.o) + 0x00011528 0x00011528 0x00000024 Code RO 2080 i.__0vsprintf mc_p.l(printfa.o) + 0x0001154c 0x0001154c 0x0000002e Code RO 2160 i.__ARM_clz mf_p.l(depilogue.o) + 0x0001157a 0x0001157a 0x0000001a Code RO 360 i.__ARM_common_switch8 CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00011594 0x00011594 0x00000020 Code RO 1500 i.__NVIC_DisableIRQ CVWL668T.lib(drv_rxbr.o) + 0x000115b4 0x000115b4 0x00000018 Code RO 1501 i.__NVIC_EnableIRQ CVWL668T.lib(drv_rxbr.o) + 0x000115cc 0x000115cc 0x0000000e Code RO 2172 i.__scatterload_copy mc_p.l(handlers.o) + 0x000115da 0x000115da 0x0000000e Code RO 2174 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x000115e8 0x000115e8 0x00000174 Code RO 2081 i._fp_digits mc_p.l(printfa.o) + 0x0001175c 0x0001175c 0x000006ec Code RO 2082 i._printf_core mc_p.l(printfa.o) + 0x00011e48 0x00011e48 0x00000020 Code RO 2083 i._printf_post_padding mc_p.l(printfa.o) + 0x00011e68 0x00011e68 0x0000002c Code RO 2084 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011e94 0x00011e94 0x0000000a Code RO 2086 i._sputc mc_p.l(printfa.o) + 0x00011e9e 0x00011e9e 0x00000002 PAD + 0x00011ea0 0x00011ea0 0x0000010c Code RO 91 i.ap_dcs_read honor90pro_demo.o + 0x00011fac 0x00011fac 0x00000058 Code RO 92 i.ap_dcs_set_display_off honor90pro_demo.o + 0x00012004 0x00012004 0x00000044 Code RO 93 i.ap_dcs_set_display_on honor90pro_demo.o + 0x00012048 0x00012048 0x00000064 Code RO 94 i.ap_dcs_set_enter_sleep_mode honor90pro_demo.o + 0x000120ac 0x000120ac 0x00000040 Code RO 95 i.ap_dcs_set_exit_sleep_mode honor90pro_demo.o + 0x000120ec 0x000120ec 0x00000058 Code RO 96 i.ap_rstn_pull_down_cb honor90pro_demo.o + 0x00012144 0x00012144 0x00000018 Code RO 97 i.ap_rstn_pull_high_cb honor90pro_demo.o + 0x0001215c 0x0001215c 0x0000005c Code RO 98 i.ap_set_backlight honor90pro_demo.o + 0x000121b8 0x000121b8 0x00000088 Code RO 99 i.ap_update_frame_rate honor90pro_demo.o + 0x00012240 0x00012240 0x00000088 Code RO 100 i.app_display_init honor90pro_demo.o + 0x000122c8 0x000122c8 0x00000018 Code RO 101 i.app_gpio_init honor90pro_demo.o + 0x000122e0 0x000122e0 0x0000009c Code RO 102 i.app_init_panel honor90pro_demo.o + 0x0001237c 0x0001237c 0x000000ac Code RO 103 i.app_mipi_rx_init honor90pro_demo.o + 0x00012428 0x00012428 0x00000064 Code RO 104 i.app_mipi_tx_init honor90pro_demo.o + 0x0001248c 0x0001248c 0x000000dc Code RO 105 i.app_system_suspend honor90pro_demo.o + 0x00012568 0x00012568 0x00000018 Code RO 239 i.board_Init board.o + 0x00012580 0x00012580 0x000000c8 Code RO 1821 i.ceil m_ps.l(ceil.o) + 0x00012648 0x00012648 0x0000002c Code RO 675 i.check_mipi_rx_tx_video_info CVWL668T.lib(hal_internal_vsync.o) + 0x00012674 0x00012674 0x00000088 Code RO 741 i.check_pkt_buf_rev CVWL668T.lib(hal_internal_dcs.o) + 0x000126fc 0x000126fc 0x00000058 Code RO 1144 i.dcs_packet_fifo_alloc CVWL668T.lib(dcs_packet_fifo.o) + 0x00012754 0x00012754 0x00000018 Code RO 1145 i.dcs_packet_fifo_init CVWL668T.lib(dcs_packet_fifo.o) + 0x0001276c 0x0001276c 0x00000044 Code RO 1146 i.dcs_packet_free_fifo_header CVWL668T.lib(dcs_packet_fifo.o) + 0x000127b0 0x000127b0 0x00000024 Code RO 1147 i.dcs_packet_get_fifo_header CVWL668T.lib(dcs_packet_fifo.o) + 0x000127d4 0x000127d4 0x00000018 Code RO 599 i.delayMs CVWL668T.lib(tau_delay.o) + 0x000127ec 0x000127ec 0x0000002c Code RO 600 i.delayUs CVWL668T.lib(tau_delay.o) + 0x00012818 0x00012818 0x00000008 Code RO 835 i.drv_common_system_init CVWL668T.lib(drv_common.o) + 0x00012820 0x00012820 0x0000003c Code RO 854 i.drv_crgu_enable_clock CVWL668T.lib(drv_crgu.o) + 0x0001285c 0x0001285c 0x00000068 Code RO 857 i.drv_crgu_get_rxbr_clk CVWL668T.lib(drv_crgu.o) + 0x000128c4 0x000128c4 0x00000010 Code RO 860 i.drv_crgu_reset_modules CVWL668T.lib(drv_crgu.o) + 0x000128d4 0x000128d4 0x00000028 Code RO 861 i.drv_crgu_set_ahb_clk CVWL668T.lib(drv_crgu.o) + 0x000128fc 0x000128fc 0x00000010 Code RO 862 i.drv_crgu_set_clock_div CVWL668T.lib(drv_crgu.o) + 0x0001290c 0x0001290c 0x0000003c Code RO 864 i.drv_crgu_set_dpi_clk CVWL668T.lib(drv_crgu.o) + 0x00012948 0x00012948 0x00000038 Code RO 865 i.drv_crgu_set_dsc_clk CVWL668T.lib(drv_crgu.o) + 0x00012980 0x00012980 0x00000028 Code RO 866 i.drv_crgu_set_fb_clk CVWL668T.lib(drv_crgu.o) + 0x000129a8 0x000129a8 0x00000028 Code RO 867 i.drv_crgu_set_lcdc_clk CVWL668T.lib(drv_crgu.o) + 0x000129d0 0x000129d0 0x00000018 Code RO 868 i.drv_crgu_set_reset CVWL668T.lib(drv_crgu.o) + 0x000129e8 0x000129e8 0x00000028 Code RO 869 i.drv_crgu_set_rxbr_clk CVWL668T.lib(drv_crgu.o) + 0x00012a10 0x00012a10 0x00000028 Code RO 870 i.drv_crgu_set_vidc_clk CVWL668T.lib(drv_crgu.o) + 0x00012a38 0x00012a38 0x00000018 Code RO 1675 i.drv_dma_clear_status CVWL668T.lib(drv_dma.o) + 0x00012a50 0x00012a50 0x00000014 Code RO 1681 i.drv_dma_get_int_source CVWL668T.lib(drv_dma.o) + 0x00012a64 0x00012a64 0x0000001c Code RO 894 i.drv_dsc_dec_disable CVWL668T.lib(drv_dsc_dec.o) + 0x00012a80 0x00012a80 0x00000038 Code RO 895 i.drv_dsc_dec_enable CVWL668T.lib(drv_dsc_dec.o) + 0x00012ab8 0x00012ab8 0x00000020 Code RO 896 i.drv_dsc_dec_get_nslc CVWL668T.lib(drv_dsc_dec.o) + 0x00012ad8 0x00012ad8 0x0000001c Code RO 897 i.drv_dsc_dec_set_irqen CVWL668T.lib(drv_dsc_dec.o) + 0x00012af4 0x00012af4 0x0000010c Code RO 1179 i.drv_dsi_rx_calc_ipi_tx_delay CVWL668T.lib(drv_dsi_rx.o) + 0x00012c00 0x00012c00 0x00000040 Code RO 1180 i.drv_dsi_rx_enable_irq CVWL668T.lib(drv_dsi_rx.o) + 0x00012c40 0x00012c40 0x00000050 Code RO 1182 i.drv_dsi_rx_get_color_bpp CVWL668T.lib(drv_dsi_rx.o) + 0x00012c90 0x00012c90 0x0000001c Code RO 1183 i.drv_dsi_rx_get_color_pcc CVWL668T.lib(drv_dsi_rx.o) + 0x00012cac 0x00012cac 0x00000010 Code RO 1184 i.drv_dsi_rx_get_compression_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012cbc 0x00012cbc 0x00000010 Code RO 1185 i.drv_dsi_rx_get_ddi_crc_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012ccc 0x00012ccc 0x0000000c Code RO 1187 i.drv_dsi_rx_get_max_ret_size CVWL668T.lib(drv_dsi_rx.o) + 0x00012cd8 0x00012cd8 0x00000018 Code RO 1190 i.drv_dsi_rx_power_up CVWL668T.lib(drv_dsi_rx.o) + 0x00012cf0 0x00012cf0 0x0000001c Code RO 1191 i.drv_dsi_rx_set_check_crc CVWL668T.lib(drv_dsi_rx.o) + 0x00012d0c 0x00012d0c 0x00000024 Code RO 1192 i.drv_dsi_rx_set_ctrl_cfg CVWL668T.lib(drv_dsi_rx.o) + 0x00012d30 0x00012d30 0x00000010 Code RO 1193 i.drv_dsi_rx_set_ddi_cfg CVWL668T.lib(drv_dsi_rx.o) + 0x00012d40 0x00012d40 0x0000001c Code RO 1194 i.drv_dsi_rx_set_ddi_crc_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012d5c 0x00012d5c 0x0000000c Code RO 1197 i.drv_dsi_rx_set_inten CVWL668T.lib(drv_dsi_rx.o) + 0x00012d68 0x00012d68 0x00000010 Code RO 1198 i.drv_dsi_rx_set_ipi_cfg CVWL668T.lib(drv_dsi_rx.o) + 0x00012d78 0x00012d78 0x0000001c Code RO 1200 i.drv_dsi_rx_set_ipi_ycbcr_frmt CVWL668T.lib(drv_dsi_rx.o) + 0x00012d94 0x00012d94 0x00000014 Code RO 1201 i.drv_dsi_rx_set_lane_swap CVWL668T.lib(drv_dsi_rx.o) + 0x00012da8 0x00012da8 0x00000024 Code RO 1202 i.drv_dsi_rx_set_resp_cnt CVWL668T.lib(drv_dsi_rx.o) + 0x00012dcc 0x00012dcc 0x0000001c Code RO 1203 i.drv_dsi_rx_set_tear_resp_en CVWL668T.lib(drv_dsi_rx.o) + 0x00012de8 0x00012de8 0x00000100 Code RO 1204 i.drv_dsi_rx_set_up_phy CVWL668T.lib(drv_dsi_rx.o) + 0x00012ee8 0x00012ee8 0x00000018 Code RO 1205 i.drv_dsi_rx_shut_down CVWL668T.lib(drv_dsi_rx.o) + 0x00012f00 0x00012f00 0x00000018 Code RO 1241 i.drv_dsi_tx_command_header CVWL668T.lib(drv_dsi_tx.o) + 0x00012f18 0x00012f18 0x00000058 Code RO 1242 i.drv_dsi_tx_command_mode_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x00012f70 0x00012f70 0x0000000c Code RO 1243 i.drv_dsi_tx_command_put_payload CVWL668T.lib(drv_dsi_tx.o) + 0x00012f7c 0x00012f7c 0x00000020 Code RO 1244 i.drv_dsi_tx_config_eotp CVWL668T.lib(drv_dsi_tx.o) + 0x00012f9c 0x00012f9c 0x0000000c Code RO 1245 i.drv_dsi_tx_config_int CVWL668T.lib(drv_dsi_tx.o) + 0x00012fa8 0x00012fa8 0x00000010 Code RO 1246 i.drv_dsi_tx_dpi_lpcmd_time CVWL668T.lib(drv_dsi_tx.o) + 0x00012fb8 0x00012fb8 0x00000010 Code RO 1247 i.drv_dsi_tx_dpi_mode CVWL668T.lib(drv_dsi_tx.o) + 0x00012fc8 0x00012fc8 0x00000024 Code RO 1248 i.drv_dsi_tx_dpi_polarity CVWL668T.lib(drv_dsi_tx.o) + 0x00012fec 0x00012fec 0x0000000c Code RO 1249 i.drv_dsi_tx_edpi_cmd_size CVWL668T.lib(drv_dsi_tx.o) + 0x00012ff8 0x00012ff8 0x0000000c Code RO 1251 i.drv_dsi_tx_get_cmd_status CVWL668T.lib(drv_dsi_tx.o) + 0x00013004 0x00013004 0x0000000c Code RO 1253 i.drv_dsi_tx_mode CVWL668T.lib(drv_dsi_tx.o) + 0x00013010 0x00013010 0x0000001c Code RO 1254 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL668T.lib(drv_dsi_tx.o) + 0x0001302c 0x0001302c 0x00000020 Code RO 1255 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL668T.lib(drv_dsi_tx.o) + 0x0001304c 0x0001304c 0x00000010 Code RO 1257 i.drv_dsi_tx_phy_lane_mode CVWL668T.lib(drv_dsi_tx.o) + 0x0001305c 0x0001305c 0x00000068 Code RO 1260 i.drv_dsi_tx_phy_status_ready CVWL668T.lib(drv_dsi_tx.o) + 0x000130c4 0x000130c4 0x00000044 Code RO 1261 i.drv_dsi_tx_phy_status_stopstate CVWL668T.lib(drv_dsi_tx.o) + 0x00013108 0x00013108 0x00000150 Code RO 1263 i.drv_dsi_tx_phy_test_setup CVWL668T.lib(drv_dsi_tx.o) + 0x00013258 0x00013258 0x00000020 Code RO 1264 i.drv_dsi_tx_phy_time_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x00013278 0x00013278 0x0000000c Code RO 1268 i.drv_dsi_tx_powerup CVWL668T.lib(drv_dsi_tx.o) + 0x00013284 0x00013284 0x00000024 Code RO 1269 i.drv_dsi_tx_response_mode CVWL668T.lib(drv_dsi_tx.o) + 0x000132a8 0x000132a8 0x0000001c Code RO 1272 i.drv_dsi_tx_set_bta_ack CVWL668T.lib(drv_dsi_tx.o) + 0x000132c4 0x000132c4 0x00000014 Code RO 1273 i.drv_dsi_tx_set_esc_div CVWL668T.lib(drv_dsi_tx.o) + 0x000132d8 0x000132d8 0x00000040 Code RO 1274 i.drv_dsi_tx_set_int CVWL668T.lib(drv_dsi_tx.o) + 0x00013318 0x00013318 0x00000018 Code RO 1275 i.drv_dsi_tx_set_time_out_div CVWL668T.lib(drv_dsi_tx.o) + 0x00013330 0x00013330 0x00000014 Code RO 1276 i.drv_dsi_tx_set_video_chunk CVWL668T.lib(drv_dsi_tx.o) + 0x00013344 0x00013344 0x00000024 Code RO 1277 i.drv_dsi_tx_set_video_timing CVWL668T.lib(drv_dsi_tx.o) + 0x00013368 0x00013368 0x0000000c Code RO 1279 i.drv_dsi_tx_shutdown CVWL668T.lib(drv_dsi_tx.o) + 0x00013374 0x00013374 0x0000002c Code RO 1280 i.drv_dsi_tx_timeout_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x000133a0 0x000133a0 0x000000e8 Code RO 1283 i.drv_dsi_tx_video_mode_cfg CVWL668T.lib(drv_dsi_tx.o) + 0x00013488 0x00013488 0x00000036 Code RO 1781 i.drv_efuse_enter_inactive CVWL668T.lib(drv_efuse.o) + 0x000134be 0x000134be 0x0000000c Code RO 1784 i.drv_efuse_int_enable CVWL668T.lib(drv_efuse.o) + 0x000134ca 0x000134ca 0x0000003a Code RO 1785 i.drv_efuse_read CVWL668T.lib(drv_efuse.o) + 0x00013504 0x00013504 0x00000018 Code RO 1786 i.drv_efuse_read_req CVWL668T.lib(drv_efuse.o) + 0x0001351c 0x0001351c 0x00000024 Code RO 917 i.drv_gpio_handle_int CVWL668T.lib(drv_gpio.o) + 0x00013540 0x00013540 0x0000000c Code RO 918 i.drv_gpio_register_ap_reset_callback CVWL668T.lib(drv_gpio.o) + 0x0001354c 0x0001354c 0x00000014 Code RO 919 i.drv_gpio_register_callback CVWL668T.lib(drv_gpio.o) + 0x00013560 0x00013560 0x00000044 Code RO 921 i.drv_gpio_set_int CVWL668T.lib(drv_gpio.o) + 0x000135a4 0x000135a4 0x00000020 Code RO 922 i.drv_gpio_set_ioe CVWL668T.lib(drv_gpio.o) + 0x000135c4 0x000135c4 0x00000014 Code RO 923 i.drv_gpio_set_mode CVWL668T.lib(drv_gpio.o) + 0x000135d8 0x000135d8 0x00000020 Code RO 470 i.drv_gpio_set_output_data CVWL668T.lib(hal_gpio.o) + 0x000135f8 0x000135f8 0x00000028 Code RO 1345 i.drv_lcdc_bcsa_config CVWL668T.lib(drv_lcdc.o) + 0x00013620 0x00013620 0x0000002c Code RO 1346 i.drv_lcdc_cfg_int_frame CVWL668T.lib(drv_lcdc.o) + 0x0001364c 0x0001364c 0x00000018 Code RO 1347 i.drv_lcdc_clear_int CVWL668T.lib(drv_lcdc.o) + 0x00013664 0x00013664 0x00000034 Code RO 1349 i.drv_lcdc_cmd_start CVWL668T.lib(drv_lcdc.o) + 0x00013698 0x00013698 0x00000014 Code RO 1350 i.drv_lcdc_config_acc_command_mode CVWL668T.lib(drv_lcdc.o) + 0x000136ac 0x000136ac 0x00000038 Code RO 1351 i.drv_lcdc_config_int CVWL668T.lib(drv_lcdc.o) + 0x000136e4 0x000136e4 0x00000028 Code RO 1352 i.drv_lcdc_config_int_single CVWL668T.lib(drv_lcdc.o) + 0x0001370c 0x0001370c 0x00000018 Code RO 1353 i.drv_lcdc_config_overwrite_rgb CVWL668T.lib(drv_lcdc.o) + 0x00013724 0x00013724 0x00000050 Code RO 1354 i.drv_lcdc_config_src_parameter CVWL668T.lib(drv_lcdc.o) + 0x00013774 0x00013774 0x00000010 Code RO 1355 i.drv_lcdc_crop_hact CVWL668T.lib(drv_lcdc.o) + 0x00013784 0x00013784 0x00000038 Code RO 1356 i.drv_lcdc_ctrl_flow CVWL668T.lib(drv_lcdc.o) + 0x000137bc 0x000137bc 0x00000030 Code RO 1357 i.drv_lcdc_dith_config CVWL668T.lib(drv_lcdc.o) + 0x000137ec 0x000137ec 0x0000003c Code RO 1359 i.drv_lcdc_edge_dect_config CVWL668T.lib(drv_lcdc.o) + 0x00013828 0x00013828 0x00000064 Code RO 1360 i.drv_lcdc_edge_enh_config CVWL668T.lib(drv_lcdc.o) + 0x0001388c 0x0001388c 0x00000024 Code RO 1361 i.drv_lcdc_enable_shadow_reg CVWL668T.lib(drv_lcdc.o) + 0x000138b0 0x000138b0 0x0000001c Code RO 1362 i.drv_lcdc_endianness_config CVWL668T.lib(drv_lcdc.o) + 0x000138cc 0x000138cc 0x00000020 Code RO 1363 i.drv_lcdc_fc_config CVWL668T.lib(drv_lcdc.o) + 0x000138ec 0x000138ec 0x00000024 Code RO 1365 i.drv_lcdc_fldc_config CVWL668T.lib(drv_lcdc.o) + 0x00013910 0x00013910 0x00000024 Code RO 1366 i.drv_lcdc_function_disable CVWL668T.lib(drv_lcdc.o) + 0x00013934 0x00013934 0x00000024 Code RO 1367 i.drv_lcdc_function_enable CVWL668T.lib(drv_lcdc.o) + 0x00013958 0x00013958 0x0000003c Code RO 1378 i.drv_lcdc_set_int CVWL668T.lib(drv_lcdc.o) + 0x00013994 0x00013994 0x0000001c Code RO 1379 i.drv_lcdc_set_prefetch CVWL668T.lib(drv_lcdc.o) + 0x000139b0 0x000139b0 0x0000001c Code RO 1380 i.drv_lcdc_set_tear_line CVWL668T.lib(drv_lcdc.o) + 0x000139cc 0x000139cc 0x00000010 Code RO 1382 i.drv_lcdc_stop_display CVWL668T.lib(drv_lcdc.o) + 0x000139dc 0x000139dc 0x0000003c Code RO 1384 i.drv_lcdc_vid_hw_start CVWL668T.lib(drv_lcdc.o) + 0x00013a18 0x00013a18 0x00000018 Code RO 1386 i.drv_lcdc_vintp_mode_config CVWL668T.lib(drv_lcdc.o) + 0x00013a30 0x00013a30 0x00000014 Code RO 1434 i.drv_memc_clear_status CVWL668T.lib(drv_memc.o) + 0x00013a44 0x00013a44 0x00000040 Code RO 1435 i.drv_memc_enable_irq CVWL668T.lib(drv_memc.o) + 0x00013a84 0x00013a84 0x00000010 Code RO 1436 i.drv_memc_gen_a_tear_signal CVWL668T.lib(drv_memc.o) + 0x00013a94 0x00013a94 0x00000018 Code RO 1437 i.drv_memc_get_status CVWL668T.lib(drv_memc.o) + 0x00013aac 0x00013aac 0x00000010 Code RO 1438 i.drv_memc_get_tear_mode CVWL668T.lib(drv_memc.o) + 0x00013abc 0x00013abc 0x0000001c Code RO 1439 i.drv_memc_rate_transfer_sel CVWL668T.lib(drv_memc.o) + 0x00013ad8 0x00013ad8 0x00000014 Code RO 1440 i.drv_memc_sel_vsync CVWL668T.lib(drv_memc.o) + 0x00013aec 0x00013aec 0x00000018 Code RO 1441 i.drv_memc_set_active_height CVWL668T.lib(drv_memc.o) + 0x00013b04 0x00013b04 0x0000001c Code RO 1442 i.drv_memc_set_circ_mode_enable CVWL668T.lib(drv_memc.o) + 0x00013b20 0x00013b20 0x00000014 Code RO 1443 i.drv_memc_set_data_mode CVWL668T.lib(drv_memc.o) + 0x00013b34 0x00013b34 0x00000018 Code RO 1446 i.drv_memc_set_double_buffer CVWL668T.lib(drv_memc.o) + 0x00013b4c 0x00013b4c 0x0000001c Code RO 1450 i.drv_memc_set_frame_drop_select CVWL668T.lib(drv_memc.o) + 0x00013b68 0x00013b68 0x00000018 Code RO 1451 i.drv_memc_set_fs_en_conditions CVWL668T.lib(drv_memc.o) + 0x00013b80 0x00013b80 0x0000001c Code RO 1453 i.drv_memc_set_lcdc_st_conditions CVWL668T.lib(drv_memc.o) + 0x00013b9c 0x00013b9c 0x00000020 Code RO 1454 i.drv_memc_set_ltpo_mode CVWL668T.lib(drv_memc.o) + 0x00013bbc 0x00013bbc 0x00000018 Code RO 1455 i.drv_memc_set_ltpo_pu_thres CVWL668T.lib(drv_memc.o) + 0x00013bd4 0x00013bd4 0x00000014 Code RO 1459 i.drv_memc_set_tear_mode CVWL668T.lib(drv_memc.o) + 0x00013be8 0x00013be8 0x0000002c Code RO 1460 i.drv_memc_set_tear_waveform CVWL668T.lib(drv_memc.o) + 0x00013c14 0x00013c14 0x00000014 Code RO 1462 i.drv_memc_set_vidc_sync_cnt CVWL668T.lib(drv_memc.o) + 0x00013c28 0x00013c28 0x00000010 Code RO 1804 i.drv_phy_test_clear CVWL668T.lib(drv_phy_common.o) + 0x00013c38 0x00013c38 0x00000018 Code RO 1805 i.drv_phy_test_lock CVWL668T.lib(drv_phy_common.o) + 0x00013c50 0x00013c50 0x00000030 Code RO 953 i.drv_pwr_efuse_pd CVWL668T.lib(drv_pwr.o) + 0x00013c80 0x00013c80 0x0000004c Code RO 955 i.drv_pwr_enter_deep_sleep_mode CVWL668T.lib(drv_pwr.o) + 0x00013ccc 0x00013ccc 0x00000034 Code RO 957 i.drv_pwr_enter_sleep_mode_ex CVWL668T.lib(drv_pwr.o) + 0x00013d00 0x00013d00 0x00000098 Code RO 958 i.drv_pwr_enter_stop_sleep_mode CVWL668T.lib(drv_pwr.o) + 0x00013d98 0x00013d98 0x00000028 Code RO 959 i.drv_pwr_exit_sleep_mode CVWL668T.lib(drv_pwr.o) + 0x00013dc0 0x00013dc0 0x00000010 Code RO 962 i.drv_pwr_get_power_ready_st CVWL668T.lib(drv_pwr.o) + 0x00013dd0 0x00013dd0 0x00000028 Code RO 994 i.drv_pwr_set_breath_screen_power_sel CVWL668T.lib(drv_pwr.o) + 0x00013df8 0x00013df8 0x00000028 Code RO 995 i.drv_pwr_set_digit_power_sel CVWL668T.lib(drv_pwr.o) + 0x00013e20 0x00013e20 0x00000034 Code RO 998 i.drv_pwr_set_pll_clk CVWL668T.lib(drv_pwr.o) + 0x00013e54 0x00013e54 0x0000002c Code RO 1002 i.drv_pwr_set_wakeup_type CVWL668T.lib(drv_pwr.o) + 0x00013e80 0x00013e80 0x00000020 Code RO 1005 i.drv_pwr_write_lock CVWL668T.lib(drv_pwr.o) + 0x00013ea0 0x00013ea0 0x00000010 Code RO 1502 i.drv_rxbr_clear_pkt_buffer CVWL668T.lib(drv_rxbr.o) + 0x00013eb0 0x00013eb0 0x0000000c Code RO 1503 i.drv_rxbr_clear_status0 CVWL668T.lib(drv_rxbr.o) + 0x00013ebc 0x00013ebc 0x0000005a Code RO 1506 i.drv_rxbr_enable_irq CVWL668T.lib(drv_rxbr.o) + 0x00013f16 0x00013f16 0x00000002 PAD + 0x00013f18 0x00013f18 0x0000001c Code RO 1507 i.drv_rxbr_frame_drop_cfg CVWL668T.lib(drv_rxbr.o) + 0x00013f34 0x00013f34 0x00000018 Code RO 676 i.drv_rxbr_get_int_source CVWL668T.lib(hal_internal_vsync.o) + 0x00013f4c 0x00013f4c 0x00000018 Code RO 742 i.drv_rxbr_get_status0 CVWL668T.lib(hal_internal_dcs.o) + 0x00013f64 0x00013f64 0x00000014 Code RO 1516 i.drv_rxbr_hline_rcv0_cfg CVWL668T.lib(drv_rxbr.o) + 0x00013f78 0x00013f78 0x00000014 Code RO 1517 i.drv_rxbr_hline_rcv1_cfg CVWL668T.lib(drv_rxbr.o) + 0x00013f8c 0x00013f8c 0x00000010 Code RO 1518 i.drv_rxbr_hline_rcv_cfg CVWL668T.lib(drv_rxbr.o) + 0x00013f9c 0x00013f9c 0x0000000c Code RO 1520 i.drv_rxbr_register_irq1_callback CVWL668T.lib(drv_rxbr.o) + 0x00013fa8 0x00013fa8 0x00000018 Code RO 1521 i.drv_rxbr_set_ack_pkt_header CVWL668T.lib(drv_rxbr.o) + 0x00013fc0 0x00013fc0 0x0000001c Code RO 1526 i.drv_rxbr_set_color_format CVWL668T.lib(drv_rxbr.o) + 0x00013fdc 0x00013fdc 0x00000024 Code RO 1529 i.drv_rxbr_set_filter_regs CVWL668T.lib(drv_rxbr.o) + 0x00014000 0x00014000 0x0000001c Code RO 1530 i.drv_rxbr_set_inten CVWL668T.lib(drv_rxbr.o) + 0x0001401c 0x0001401c 0x00000018 Code RO 1531 i.drv_rxbr_set_ltpo_drop_th CVWL668T.lib(drv_rxbr.o) + 0x00014034 0x00014034 0x00000040 Code RO 1535 i.drv_rxbr_set_usr_cfg CVWL668T.lib(drv_rxbr.o) + 0x00014074 0x00014074 0x00000010 Code RO 1536 i.drv_rxbr_set_usr_col CVWL668T.lib(drv_rxbr.o) + 0x00014084 0x00014084 0x00000010 Code RO 1537 i.drv_rxbr_set_usr_row CVWL668T.lib(drv_rxbr.o) + 0x00014094 0x00014094 0x00000078 Code RO 1159 i.drv_se_init CVWL668T.lib(drv_se.o) + 0x0001410c 0x0001410c 0x000000d4 Code RO 1160 i.drv_se_set_dsc CVWL668T.lib(drv_se.o) + 0x000141e0 0x000141e0 0x00000088 Code RO 1161 i.drv_se_set_lcdc CVWL668T.lib(drv_se.o) + 0x00014268 0x00014268 0x00000068 Code RO 1162 i.drv_se_set_memc CVWL668T.lib(drv_se.o) + 0x000142d0 0x000142d0 0x000000d0 Code RO 1163 i.drv_se_set_rxbr CVWL668T.lib(drv_se.o) + 0x000143a0 0x000143a0 0x000000ac Code RO 1164 i.drv_se_set_vidc CVWL668T.lib(drv_se.o) + 0x0001444c 0x0001444c 0x00000014 Code RO 1165 i.drv_se_start_rx CVWL668T.lib(drv_se.o) + 0x00014460 0x00014460 0x0000001c Code RO 1069 i.drv_swire_enable CVWL668T.lib(drv_swire.o) + 0x0001447c 0x0001447c 0x0000000c Code RO 1070 i.drv_swire_get_pulse_count CVWL668T.lib(drv_swire.o) + 0x00014488 0x00014488 0x0000000c Code RO 1071 i.drv_swire_register_callback CVWL668T.lib(drv_swire.o) + 0x00014494 0x00014494 0x00000018 Code RO 1072 i.drv_swire_set_bit_time CVWL668T.lib(drv_swire.o) + 0x000144ac 0x000144ac 0x00000048 Code RO 1073 i.drv_swire_set_int CVWL668T.lib(drv_swire.o) + 0x000144f4 0x000144f4 0x0000001c Code RO 1074 i.drv_swire_set_power_down CVWL668T.lib(drv_swire.o) + 0x00014510 0x00014510 0x0000000c Code RO 1075 i.drv_swire_set_pulse_count CVWL668T.lib(drv_swire.o) + 0x0001451c 0x0001451c 0x0000001c Code RO 1076 i.drv_swire_set_trig_mode CVWL668T.lib(drv_swire.o) + 0x00014538 0x00014538 0x0000000c Code RO 1091 i.drv_sys_cfg_clear_all_int CVWL668T.lib(drv_sys_cfg.o) + 0x00014544 0x00014544 0x00000028 Code RO 1092 i.drv_sys_cfg_clear_pending CVWL668T.lib(drv_sys_cfg.o) + 0x0001456c 0x0001456c 0x00000024 Code RO 1093 i.drv_sys_cfg_sel_ap_rst_trig CVWL668T.lib(drv_sys_cfg.o) + 0x00014590 0x00014590 0x00000024 Code RO 1095 i.drv_sys_cfg_sel_gpio_group CVWL668T.lib(drv_sys_cfg.o) + 0x000145b4 0x000145b4 0x00000024 Code RO 1096 i.drv_sys_cfg_sel_int_trig CVWL668T.lib(drv_sys_cfg.o) + 0x000145d8 0x000145d8 0x00000018 Code RO 1097 i.drv_sys_cfg_sel_swire_timer CVWL668T.lib(drv_sys_cfg.o) + 0x000145f0 0x000145f0 0x00000024 Code RO 1098 i.drv_sys_cfg_set_int CVWL668T.lib(drv_sys_cfg.o) + 0x00014614 0x00014614 0x0000001a Code RO 1115 i.drv_timer_clear_status_flags CVWL668T.lib(drv_timer.o) + 0x0001462e 0x0001462e 0x00000020 Code RO 1116 i.drv_timer_enable CVWL668T.lib(drv_timer.o) + 0x0001464e 0x0001464e 0x00000002 PAD + 0x00014650 0x00014650 0x00000010 Code RO 1117 i.drv_timer_get_instance CVWL668T.lib(drv_timer.o) + 0x00014660 0x00014660 0x0000003c Code RO 1119 i.drv_timer_handle_interrupt CVWL668T.lib(drv_timer.o) + 0x0001469c 0x0001469c 0x00000040 Code RO 1121 i.drv_timer_set_compare_val CVWL668T.lib(drv_timer.o) + 0x000146dc 0x000146dc 0x00000048 Code RO 1122 i.drv_timer_set_int CVWL668T.lib(drv_timer.o) + 0x00014724 0x00014724 0x00000028 Code RO 1123 i.drv_timer_set_prescaler CVWL668T.lib(drv_timer.o) + 0x0001474c 0x0001474c 0x00000010 Code RO 1124 i.drv_timer_set_repeat CVWL668T.lib(drv_timer.o) + 0x0001475c 0x0001475c 0x00000020 Code RO 1285 i.drv_tx_phy_test_enter CVWL668T.lib(drv_dsi_tx.o) + 0x0001477c 0x0001477c 0x00000020 Code RO 1286 i.drv_tx_phy_test_exit CVWL668T.lib(drv_dsi_tx.o) + 0x0001479c 0x0001479c 0x00000028 Code RO 1289 i.drv_tx_phy_test_write_code CVWL668T.lib(drv_dsi_tx.o) + 0x000147c4 0x000147c4 0x00000034 Code RO 1737 i.drv_uart_abort_recv CVWL668T.lib(drv_uart.o) + 0x000147f8 0x000147f8 0x00000034 Code RO 1738 i.drv_uart_abort_send CVWL668T.lib(drv_uart.o) + 0x0001482c 0x0001482c 0x00000014 Code RO 1739 i.drv_uart_config_int CVWL668T.lib(drv_uart.o) + 0x00014840 0x00014840 0x00000018 Code RO 1741 i.drv_uart_enable_clk CVWL668T.lib(drv_uart.o) + 0x00014858 0x00014858 0x0000005c Code RO 1742 i.drv_uart_enable_int CVWL668T.lib(drv_uart.o) + 0x000148b4 0x000148b4 0x00000028 Code RO 1744 i.drv_uart_get_instance CVWL668T.lib(drv_uart.o) + 0x000148dc 0x000148dc 0x000000ce Code RO 1745 i.drv_uart_init CVWL668T.lib(drv_uart.o) + 0x000149aa 0x000149aa 0x00000002 PAD + 0x000149ac 0x000149ac 0x0000003c Code RO 1746 i.drv_uart_int_trans_handle CVWL668T.lib(drv_uart.o) + 0x000149e8 0x000149e8 0x0000001c Code RO 1749 i.drv_uart_reset_rx_fifo CVWL668T.lib(drv_uart.o) + 0x00014a04 0x00014a04 0x0000001c Code RO 1750 i.drv_uart_reset_tx_fifo CVWL668T.lib(drv_uart.o) + 0x00014a20 0x00014a20 0x0000001a Code RO 1751 i.drv_uart_send_blocking CVWL668T.lib(drv_uart.o) + 0x00014a3a 0x00014a3a 0x00000054 Code RO 1753 i.drv_uart_set_baud_rate CVWL668T.lib(drv_uart.o) + 0x00014a8e 0x00014a8e 0x00000002 PAD + 0x00014a90 0x00014a90 0x0000004c Code RO 1754 i.drv_uart_trans_create_handle CVWL668T.lib(drv_uart.o) + 0x00014adc 0x00014adc 0x00000010 Code RO 1589 i.drv_vidc_clear_irq CVWL668T.lib(drv_vidc.o) + 0x00014aec 0x00014aec 0x00000020 Code RO 1593 i.drv_vidc_enable CVWL668T.lib(drv_vidc.o) + 0x00014b0c 0x00014b0c 0x00000040 Code RO 1594 i.drv_vidc_enable_irq CVWL668T.lib(drv_vidc.o) + 0x00014b4c 0x00014b4c 0x0000002c Code RO 1595 i.drv_vidc_get_int_source CVWL668T.lib(drv_vidc.o) + 0x00014b78 0x00014b78 0x00000018 Code RO 1596 i.drv_vidc_get_irq_status CVWL668T.lib(drv_vidc.o) + 0x00014b90 0x00014b90 0x0000002c Code RO 1600 i.drv_vidc_init_module_enable CVWL668T.lib(drv_vidc.o) + 0x00014bbc 0x00014bbc 0x0000000c Code RO 1601 i.drv_vidc_register_callback CVWL668T.lib(drv_vidc.o) + 0x00014bc8 0x00014bc8 0x0000000c Code RO 1602 i.drv_vidc_reset CVWL668T.lib(drv_vidc.o) + 0x00014bd4 0x00014bd4 0x0000001c Code RO 1603 i.drv_vidc_set_circ_mode_enable CVWL668T.lib(drv_vidc.o) + 0x00014bf0 0x00014bf0 0x00000038 Code RO 1604 i.drv_vidc_set_dither_config CVWL668T.lib(drv_vidc.o) + 0x00014c28 0x00014c28 0x0000005c Code RO 1606 i.drv_vidc_set_dst_parameter CVWL668T.lib(drv_vidc.o) + 0x00014c84 0x00014c84 0x0000000c Code RO 1608 i.drv_vidc_set_honly_hcoef0 CVWL668T.lib(drv_vidc.o) + 0x00014c90 0x00014c90 0x0000002c Code RO 1609 i.drv_vidc_set_honly_hinitb CVWL668T.lib(drv_vidc.o) + 0x00014cbc 0x00014cbc 0x00000030 Code RO 1610 i.drv_vidc_set_honly_hinitr CVWL668T.lib(drv_vidc.o) + 0x00014cec 0x00014cec 0x0000001c Code RO 1613 i.drv_vidc_set_irqen CVWL668T.lib(drv_vidc.o) + 0x00014d08 0x00014d08 0x00000014 Code RO 1614 i.drv_vidc_set_mirror CVWL668T.lib(drv_vidc.o) + 0x00014d1c 0x00014d1c 0x0000001c Code RO 1617 i.drv_vidc_set_pentile_swap CVWL668T.lib(drv_vidc.o) + 0x00014d38 0x00014d38 0x0000000c Code RO 1618 i.drv_vidc_set_pu_ctrl CVWL668T.lib(drv_vidc.o) + 0x00014d44 0x00014d44 0x00000018 Code RO 1619 i.drv_vidc_set_rotation CVWL668T.lib(drv_vidc.o) + 0x00014d5c 0x00014d5c 0x0000000c Code RO 1620 i.drv_vidc_set_scld_hcoef0 CVWL668T.lib(drv_vidc.o) + 0x00014d68 0x00014d68 0x0000000c Code RO 1621 i.drv_vidc_set_scld_hcoef1 CVWL668T.lib(drv_vidc.o) + 0x00014d74 0x00014d74 0x00000014 Code RO 1622 i.drv_vidc_set_scld_step CVWL668T.lib(drv_vidc.o) + 0x00014d88 0x00014d88 0x0000000c Code RO 1623 i.drv_vidc_set_scld_vcoef0 CVWL668T.lib(drv_vidc.o) + 0x00014d94 0x00014d94 0x0000000c Code RO 1624 i.drv_vidc_set_scld_vcoef1 CVWL668T.lib(drv_vidc.o) + 0x00014da0 0x00014da0 0x00000020 Code RO 1625 i.drv_vidc_set_src_parameter CVWL668T.lib(drv_vidc.o) + 0x00014dc0 0x00014dc0 0x00000038 Code RO 1626 i.drv_vidc_set_vintp_config CVWL668T.lib(drv_vidc.o) + 0x00014df8 0x00014df8 0x00000034 Code RO 608 i.fputc CVWL668T.lib(tau_log.o) + 0x00014e2c 0x00014e2c 0x00000040 Code RO 770 i.ha_intl_fb_check_pu_size CVWL668T.lib(hal_internal_fb.o) + 0x00014e6c 0x00014e6c 0x00000040 Code RO 274 i.hal_dsi_rx_ctrl_create_handle CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00014eac 0x00014eac 0x00000040 Code RO 275 i.hal_dsi_rx_ctrl_dcs_async_handler CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00014eec 0x00014eec 0x00000094 Code RO 276 i.hal_dsi_rx_ctrl_deinit CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00014f80 0x00014f80 0x00000020 Code RO 283 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00014fa0 0x00014fa0 0x000000ac Code RO 284 i.hal_dsi_rx_ctrl_init CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001504c 0x0001504c 0x00000100 Code RO 285 i.hal_dsi_rx_ctrl_init_clk CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001514c 0x0001514c 0x00000108 Code RO 286 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015254 0x00015254 0x0000012c Code RO 287 i.hal_dsi_rx_ctrl_init_memc CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015380 0x00015380 0x00000148 Code RO 288 i.hal_dsi_rx_ctrl_init_rxbr CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000154c8 0x000154c8 0x00000280 Code RO 289 i.hal_dsi_rx_ctrl_init_vidc CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015748 0x00015748 0x00000038 Code RO 290 i.hal_dsi_rx_ctrl_pre_init_pps CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015780 0x00015780 0x000000f0 Code RO 295 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015870 0x00015870 0x00000018 Code RO 299 i.hal_dsi_rx_ctrl_set_check_crc CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015888 0x00015888 0x00000030 Code RO 302 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000158b8 0x000158b8 0x00000030 Code RO 308 i.hal_dsi_rx_ctrl_start CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000158e8 0x000158e8 0x00000030 Code RO 309 i.hal_dsi_rx_ctrl_stop CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015918 0x00015918 0x0000000a Code RO 310 i.hal_dsi_rx_ctrl_toggle_input_frame_rate CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015922 0x00015922 0x00000002 PAD + 0x00015924 0x00015924 0x00000020 Code RO 311 i.hal_dsi_rx_ctrl_toggle_resolution CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00015944 0x00015944 0x00000280 Code RO 364 i.hal_dsi_tx_cmd_mode_cal_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015bc4 0x00015bc4 0x00000038 Code RO 366 i.hal_dsi_tx_ctrl_create_handle CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015bfc 0x00015bfc 0x00000074 Code RO 367 i.hal_dsi_tx_ctrl_deinit CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015c70 0x00015c70 0x00000022 Code RO 370 i.hal_dsi_tx_ctrl_gen_a_tear_signal CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015c92 0x00015c92 0x00000002 PAD + 0x00015c94 0x00015c94 0x0000007c Code RO 372 i.hal_dsi_tx_ctrl_init CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015d10 0x00015d10 0x00000010 Code RO 373 i.hal_dsi_tx_ctrl_init_clk CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015d20 0x00015d20 0x00000008 Code RO 386 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015d28 0x00015d28 0x0000000a Code RO 387 i.hal_dsi_tx_ctrl_set_tear_mode CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015d32 0x00015d32 0x00000002 PAD + 0x00015d34 0x00015d34 0x00000090 Code RO 389 i.hal_dsi_tx_ctrl_start CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015dc4 0x00015dc4 0x00000038 Code RO 390 i.hal_dsi_tx_ctrl_stop CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015dfc 0x00015dfc 0x000000f4 Code RO 392 i.hal_dsi_tx_ctrl_write_array_cmd CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015ef0 0x00015ef0 0x000000d0 Code RO 393 i.hal_dsi_tx_ctrl_write_cmd CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00015fc0 0x00015fc0 0x00000104 Code RO 394 i.hal_dsi_tx_init_cfg CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000160c4 0x000160c4 0x00000044 Code RO 395 i.hal_dsi_tx_init_dpi_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016108 0x00016108 0x00000016 Code RO 396 i.hal_dsi_tx_init_phy_cfg CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0001611e 0x0001611e 0x00000052 Code RO 397 i.hal_dsi_tx_init_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016170 0x00016170 0x00000054 Code RO 398 i.hal_dsi_tx_init_vid_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000161c4 0x000161c4 0x00000040 Code RO 399 i.hal_dsi_tx_send_cmd CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016204 0x00016204 0x00000094 Code RO 400 i.hal_dsi_tx_timing_info_update CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00016298 0x00016298 0x00000310 Code RO 401 i.hal_dsi_tx_vid_mode_cal_timing CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x000165a8 0x000165a8 0x0000003a Code RO 471 i.hal_gpio_config_pad CVWL668T.lib(hal_gpio.o) + 0x000165e2 0x000165e2 0x00000002 PAD + 0x000165e4 0x000165e4 0x00000018 Code RO 472 i.hal_gpio_ctrl_eint CVWL668T.lib(hal_gpio.o) + 0x000165fc 0x000165fc 0x00000040 Code RO 476 i.hal_gpio_init_eint CVWL668T.lib(hal_gpio.o) + 0x0001663c 0x0001663c 0x00000016 Code RO 477 i.hal_gpio_init_input CVWL668T.lib(hal_gpio.o) + 0x00016652 0x00016652 0x0000001c Code RO 478 i.hal_gpio_init_output CVWL668T.lib(hal_gpio.o) + 0x0001666e 0x0001666e 0x00000002 PAD + 0x00016670 0x00016670 0x0000001c Code RO 479 i.hal_gpio_reg_eint_cb CVWL668T.lib(hal_gpio.o) + 0x0001668c 0x0001668c 0x00000050 Code RO 480 i.hal_gpio_set_ap_reset_int CVWL668T.lib(hal_gpio.o) + 0x000166dc 0x000166dc 0x00000060 Code RO 483 i.hal_gpio_set_mode CVWL668T.lib(hal_gpio.o) + 0x0001673c 0x0001673c 0x00000008 Code RO 484 i.hal_gpio_set_output_data CVWL668T.lib(hal_gpio.o) + 0x00016744 0x00016744 0x00000010 Code RO 678 i.hal_internal_sync_get_hight_performan_mode CVWL668T.lib(hal_internal_vsync.o) + 0x00016754 0x00016754 0x000001b4 Code RO 679 i.hal_internal_sync_input_resolution_change CVWL668T.lib(hal_internal_vsync.o) + 0x00016908 0x00016908 0x0000000c Code RO 680 i.hal_internal_sync_register_lcdc_cb CVWL668T.lib(hal_internal_vsync.o) + 0x00016914 0x00016914 0x00000020 Code RO 683 i.hal_internal_vsync_deinit CVWL668T.lib(hal_internal_vsync.o) + 0x00016934 0x00016934 0x0000000c Code RO 684 i.hal_internal_vsync_get_rx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016940 0x00016940 0x00000014 Code RO 685 i.hal_internal_vsync_get_sync_line CVWL668T.lib(hal_internal_vsync.o) + 0x00016954 0x00016954 0x0000000c Code RO 686 i.hal_internal_vsync_get_tx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016960 0x00016960 0x000000e8 Code RO 687 i.hal_internal_vsync_init_rx CVWL668T.lib(hal_internal_vsync.o) + 0x00016a48 0x00016a48 0x000000c8 Code RO 688 i.hal_internal_vsync_init_tx CVWL668T.lib(hal_internal_vsync.o) + 0x00016b10 0x00016b10 0x00000020 Code RO 689 i.hal_internal_vsync_set_rx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016b30 0x00016b30 0x000001ec Code RO 691 i.hal_internal_vsync_set_tear_mode CVWL668T.lib(hal_internal_vsync.o) + 0x00016d1c 0x00016d1c 0x00000058 Code RO 692 i.hal_internal_vsync_set_tx_state CVWL668T.lib(hal_internal_vsync.o) + 0x00016d74 0x00016d74 0x00000086 Code RO 693 i.hal_internal_vsync_toggle_input_frame_rate CVWL668T.lib(hal_internal_vsync.o) + 0x00016dfa 0x00016dfa 0x00000002 PAD + 0x00016dfc 0x00016dfc 0x0000006c Code RO 743 i.hal_intl_dcs_init_sw_fltr CVWL668T.lib(hal_internal_dcs.o) + 0x00016e68 0x00016e68 0x00000430 Code RO 745 i.hal_intl_dcs_rx_get_dcs_packet_data CVWL668T.lib(hal_internal_dcs.o) + 0x00017298 0x00017298 0x00000088 Code RO 746 i.hal_intl_dcs_rx_receive_packet CVWL668T.lib(hal_internal_dcs.o) + 0x00017320 0x00017320 0x00000174 Code RO 747 i.hal_intl_dcs_rx_receive_pps CVWL668T.lib(hal_internal_dcs.o) + 0x00017494 0x00017494 0x0000008c Code RO 748 i.hal_intl_dcs_set_auto_hw_filter CVWL668T.lib(hal_internal_dcs.o) + 0x00017520 0x00017520 0x0000002c Code RO 750 i.hal_intl_dcs_sw_filter_handle CVWL668T.lib(hal_internal_dcs.o) + 0x0001754c 0x0001754c 0x00000318 Code RO 771 i.hal_intl_fb_cal_fb_info CVWL668T.lib(hal_internal_fb.o) + 0x00017864 0x00017864 0x00000064 Code RO 772 i.hal_intl_fb_check_bandwidth CVWL668T.lib(hal_internal_fb.o) + 0x000178c8 0x000178c8 0x000000dc Code RO 773 i.hal_intl_fb_edge_resize CVWL668T.lib(hal_internal_fb.o) + 0x000179a4 0x000179a4 0x00000074 Code RO 774 i.hal_intl_fb_flow_control_adapter CVWL668T.lib(hal_internal_fb.o) + 0x00017a18 0x00017a18 0x0000000c Code RO 775 i.hal_intl_fb_get_memc_flow_mode CVWL668T.lib(hal_internal_fb.o) + 0x00017a24 0x00017a24 0x00000010 Code RO 776 i.hal_intl_fb_get_rx_fb_info CVWL668T.lib(hal_internal_fb.o) + 0x00017a34 0x00017a34 0x00000010 Code RO 777 i.hal_intl_fb_get_tx_fb_info CVWL668T.lib(hal_internal_fb.o) + 0x00017a44 0x00017a44 0x0000000c Code RO 778 i.hal_intl_fb_get_user_flow CVWL668T.lib(hal_internal_fb.o) + 0x00017a50 0x00017a50 0x00000028 Code RO 796 i.hal_intl_svs_deinit_rx CVWL668T.lib(hal_internal_svs.o) + 0x00017a78 0x00017a78 0x00000010 Code RO 797 i.hal_intl_svs_deinit_tx CVWL668T.lib(hal_internal_svs.o) + 0x00017a88 0x00017a88 0x00000024 Code RO 798 i.hal_intl_svs_handle CVWL668T.lib(hal_internal_svs.o) + 0x00017aac 0x00017aac 0x00000080 Code RO 799 i.hal_intl_svs_init_rx CVWL668T.lib(hal_internal_svs.o) + 0x00017b2c 0x00017b2c 0x00000014 Code RO 800 i.hal_intl_svs_init_tx CVWL668T.lib(hal_internal_svs.o) + 0x00017b40 0x00017b40 0x00000070 Code RO 801 i.hal_intl_svs_set_input_frate CVWL668T.lib(hal_internal_svs.o) + 0x00017bb0 0x00017bb0 0x0000000c Code RO 802 i.hal_intl_svs_set_rx_vtt CVWL668T.lib(hal_internal_svs.o) + 0x00017bbc 0x00017bbc 0x00000048 Code RO 804 i.hal_intl_svs_update_rxbr_clk CVWL668T.lib(hal_internal_svs.o) + 0x00017c04 0x00017c04 0x00000070 Code RO 402 i.hal_lcdc_displayproc_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017c74 0x00017c74 0x0000003e Code RO 403 i.hal_lcdc_init_cfg CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017cb2 0x00017cb2 0x00000070 Code RO 404 i.hal_lcdc_init_clk CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017d22 0x00017d22 0x00000002 PAD + 0x00017d24 0x00017d24 0x00000128 Code RO 405 i.hal_lcdc_postproc_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017e4c 0x00017e4c 0x00000024 Code RO 406 i.hal_lcdc_start CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017e70 0x00017e70 0x0000003c Code RO 407 i.hal_lcdc_timinggen_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017eac 0x00017eac 0x000000e0 Code RO 408 i.hal_lcdc_upscaler_config CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00017f8c 0x00017f8c 0x000000bc Code RO 410 i.hal_nonshadow_func_update CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018048 0x00018048 0x0000002a Code RO 557 i.hal_pwr_enter_deep_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x00018072 0x00018072 0x00000008 Code RO 558 i.hal_pwr_enter_normal_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x0001807a 0x0001807a 0x00000002 PAD + 0x0001807c 0x0001807c 0x00000064 Code RO 559 i.hal_pwr_enter_stop_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x000180e0 0x000180e0 0x0000000a Code RO 560 i.hal_pwr_exit_sleep_mode CVWL668T.lib(hal_pwr.o) + 0x000180ea 0x000180ea 0x00000008 Code RO 562 i.hal_pwr_get_vcc_power_ready CVWL668T.lib(hal_pwr.o) + 0x000180f2 0x000180f2 0x00000008 Code RO 567 i.hal_pwr_set_main_power CVWL668T.lib(hal_pwr.o) + 0x000180fa 0x000180fa 0x00000008 Code RO 569 i.hal_pwr_set_sleep_mode_power CVWL668T.lib(hal_pwr.o) + 0x00018102 0x00018102 0x00000002 PAD + 0x00018104 0x00018104 0x00000064 Code RO 570 i.hal_pwr_set_stop_sleep_wakeup_pin CVWL668T.lib(hal_pwr.o) + 0x00018168 0x00018168 0x00000040 Code RO 511 i.hal_swire_deinit CVWL668T.lib(hal_swire.o) + 0x000181a8 0x000181a8 0x0000005c Code RO 512 i.hal_swire_enable CVWL668T.lib(hal_swire.o) + 0x00018204 0x00018204 0x00000058 Code RO 513 i.hal_swire_init CVWL668T.lib(hal_swire.o) + 0x0001825c 0x0001825c 0x00000024 Code RO 515 i.hal_swire_set_pulse CVWL668T.lib(hal_swire.o) + 0x00018280 0x00018280 0x00000040 Code RO 516 i.hal_swire_set_timer CVWL668T.lib(hal_swire.o) + 0x000182c0 0x000182c0 0x000000e4 Code RO 536 i.hal_system_init CVWL668T.lib(hal_system.o) + 0x000183a4 0x000183a4 0x00000050 Code RO 539 i.hal_system_updata_sysclk CVWL668T.lib(hal_system.o) + 0x000183f4 0x000183f4 0x00000030 Code RO 624 i.hal_timer_deinit CVWL668T.lib(hal_timer.o) + 0x00018424 0x00018424 0x0000001c Code RO 626 i.hal_timer_init CVWL668T.lib(hal_timer.o) + 0x00018440 0x00018440 0x00000008 Code RO 627 i.hal_timer_set_repeat CVWL668T.lib(hal_timer.o) + 0x00018448 0x00018448 0x00000030 Code RO 411 i.hal_tx_frame_rate_adjust CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018478 0x00018478 0x00000094 Code RO 650 i.hal_uart_init CVWL668T.lib(hal_uart.o) + 0x0001850c 0x0001850c 0x0000001c Code RO 653 i.hal_uart_send_blocking CVWL668T.lib(hal_uart.o) + 0x00018528 0x00018528 0x00000018 Code RO 412 i.hal_vsync_func_update CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00018540 0x00018540 0x000000e0 Code RO 694 i.hal_vsync_reset_lcdc_scaler CVWL668T.lib(hal_internal_vsync.o) + 0x00018620 0x00018620 0x00000038 Code RO 3 i.main main.o + 0x00018658 0x00018658 0x000000a4 Code RO 106 i.pps_update_handle honor90pro_demo.o + 0x000186fc 0x000186fc 0x000002f4 Code RO 695 i.rxbr_irq1_callback CVWL668T.lib(hal_internal_vsync.o) + 0x000189f0 0x000189f0 0x00000044 Code RO 696 i.soft_double_buffer_update CVWL668T.lib(hal_internal_vsync.o) + 0x00018a34 0x00018a34 0x0000006c Code RO 697 i.soft_gen_te CVWL668T.lib(hal_internal_vsync.o) + 0x00018aa0 0x00018aa0 0x000000e0 Code RO 698 i.soft_gen_te_double_buffer CVWL668T.lib(hal_internal_vsync.o) + 0x00018b80 0x00018b80 0x00000038 Code RO 699 i.soft_pro_motion_init CVWL668T.lib(hal_internal_vsync.o) + 0x00018bb8 0x00018bb8 0x00000024 Code RO 700 i.soft_tear_adjust_line CVWL668T.lib(hal_internal_vsync.o) + 0x00018bdc 0x00018bdc 0x00000018 Code RO 573 i.stop_sleep_cb CVWL668T.lib(hal_pwr.o) + 0x00018bf4 0x00018bf4 0x000000ac Code RO 805 i.svs_direct_mode_setting CVWL668T.lib(hal_internal_svs.o) + 0x00018ca0 0x00018ca0 0x0000001c Code RO 806 i.svs_get_rel_intv CVWL668T.lib(hal_internal_svs.o) + 0x00018cbc 0x00018cbc 0x000000b0 Code RO 807 i.svs_sync_handle CVWL668T.lib(hal_internal_svs.o) + 0x00018d6c 0x00018d6c 0x000000cc Code RO 808 i.svs_wait_fr_stab CVWL668T.lib(hal_internal_svs.o) + 0x00018e38 0x00018e38 0x0000010c Code RO 809 i.svs_wait_start CVWL668T.lib(hal_internal_svs.o) + 0x00018f44 0x00018f44 0x00000034 Code RO 609 i.tau_log_init CVWL668T.lib(tau_log.o) + 0x00018f78 0x00018f78 0x00000084 Code RO 610 i.tau_log_printf CVWL668T.lib(tau_log.o) + 0x00018ffc 0x00018ffc 0x00000076 Code RO 611 i.tau_log_push_log CVWL668T.lib(tau_log.o) + 0x00019072 0x00019072 0x00000002 PAD + 0x00019074 0x00019074 0x000000b4 Code RO 701 i.vidc_callback CVWL668T.lib(hal_internal_vsync.o) + 0x00019128 0x00019128 0x00000118 Code RO 702 i.vpre_err_reset CVWL668T.lib(hal_internal_vsync.o) + 0x00019240 0x00019240 0x000049bc Data RO 107 .constdata honor90pro_demo.o + 0x0001dbfc 0x0001dbfc 0x00000028 Data RO 314 .constdata CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001dc24 0x0001dc24 0x0000001c Data RO 415 .constdata CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0001dc40 0x0001dc40 0x000000b6 Data RO 488 .constdata CVWL668T.lib(hal_gpio.o) + 0x0001dcf6 0x0001dcf6 0x00000002 PAD + 0x0001dcf8 0x0001dcf8 0x00000030 Data RO 655 .constdata CVWL668T.lib(hal_uart.o) + 0x0001dd28 0x0001dd28 0x00000010 Data RO 1756 .constdata CVWL668T.lib(drv_uart.o) + 0x0001dd38 0x0001dd38 0x00000042 Data RO 315 .conststring CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x0001dd7a 0x0001dd7a 0x00000002 PAD + 0x0001dd7c 0x0001dd7c 0x00000090 Data RO 704 .conststring CVWL668T.lib(hal_internal_vsync.o) + 0x0001de0c 0x0001de0c 0x00000046 Data RO 753 .conststring CVWL668T.lib(hal_internal_dcs.o) + 0x0001de52 0x0001de52 0x00000002 PAD + 0x0001de54 0x0001de54 0x00000020 Data RO 2170 Region$$Table anon$$obj.o + + + Execution Region RW_IRAM1 (Exec base: 0x00070000, Load base: 0x0001de74, Size: 0x00003078, Max: 0x00008000, ABSOLUTE, COMPRESSED[0x000000f4]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070000 COMPRESSED 0x00000010 Data RW 108 .data honor90pro_demo.o + 0x00070010 COMPRESSED 0x00000030 Data RW 316 .data CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x00070040 COMPRESSED 0x0000005c Data RW 416 .data CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x0007009c COMPRESSED 0x00000002 Data RW 518 .data CVWL668T.lib(hal_swire.o) + 0x0007009e COMPRESSED 0x00000002 PAD + 0x000700a0 COMPRESSED 0x00000008 Data RW 574 .data CVWL668T.lib(hal_pwr.o) + 0x000700a8 COMPRESSED 0x00000001 Data RW 614 .data CVWL668T.lib(tau_log.o) + 0x000700a9 COMPRESSED 0x00000003 PAD + 0x000700ac COMPRESSED 0x00000018 Data RW 656 .data CVWL668T.lib(hal_uart.o) + 0x000700c4 COMPRESSED 0x00000010 Data RW 705 .data CVWL668T.lib(hal_internal_vsync.o) + 0x000700d4 COMPRESSED 0x00000024 Data RW 754 .data CVWL668T.lib(hal_internal_dcs.o) + 0x000700f8 COMPRESSED 0x0000000c Data RW 838 .data CVWL668T.lib(drv_common.o) + 0x00070104 COMPRESSED 0x00000001 Data RW 839 .data CVWL668T.lib(drv_common.o) + 0x00070105 COMPRESSED 0x00000003 PAD + 0x00070108 COMPRESSED 0x00000004 Data RW 925 .data CVWL668T.lib(drv_gpio.o) + 0x0007010c COMPRESSED 0x00000004 Data RW 1077 .data CVWL668T.lib(drv_swire.o) + 0x00070110 COMPRESSED 0x00000050 Data RW 1125 .data CVWL668T.lib(drv_timer.o) + 0x00070160 COMPRESSED 0x00000004 Data RW 1166 .data CVWL668T.lib(drv_se.o) + 0x00070164 COMPRESSED 0x00000001 Data RW 1206 .data CVWL668T.lib(drv_dsi_rx.o) + 0x00070165 COMPRESSED 0x00000003 PAD + 0x00070168 COMPRESSED 0x00000008 Data RW 1541 .data CVWL668T.lib(drv_rxbr.o) + 0x00070170 COMPRESSED 0x00000004 Data RW 1628 .data CVWL668T.lib(drv_vidc.o) + 0x00070174 COMPRESSED 0x00000190 Data RW 1703 .data CVWL668T.lib(drv_dma.o) + 0x00070304 COMPRESSED 0x00000004 Data RW 2146 .data mc_p.l(stdout.o) + 0x00070308 - 0x000000d0 Zero RW 313 .bss CVWL668T.lib(hal_dsi_rx_ctrl.o) + 0x000703d8 - 0x000000b8 Zero RW 414 .bss CVWL668T.lib(hal_dsi_tx_ctrl.o) + 0x00070490 - 0x00000100 Zero RW 613 .bss CVWL668T.lib(tau_log.o) + 0x00070590 - 0x00000044 Zero RW 703 .bss CVWL668T.lib(hal_internal_vsync.o) + 0x000705d4 - 0x00000800 Zero RW 751 .bss CVWL668T.lib(hal_internal_dcs.o) + 0x00070dd4 - 0x000000ff Zero RW 752 .bss CVWL668T.lib(hal_internal_dcs.o) + 0x00070ed3 COMPRESSED 0x00000001 PAD + 0x00070ed4 - 0x00000044 Zero RW 780 .bss CVWL668T.lib(hal_internal_fb.o) + 0x00070f18 - 0x00000044 Zero RW 810 .bss CVWL668T.lib(hal_internal_svs.o) + 0x00070f5c - 0x00000040 Zero RW 924 .bss CVWL668T.lib(drv_gpio.o) + 0x00070f9c - 0x0000106c Zero RW 1149 .bss CVWL668T.lib(dcs_packet_fifo.o) + 0x00072008 - 0x00000010 Zero RW 1701 .bss CVWL668T.lib(drv_dma.o) + 0x00072018 - 0x00000060 Zero RW 1755 .bss CVWL668T.lib(drv_uart.o) + 0x00072078 - 0x00001000 Zero RW 263 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 24 4 0 0 0 577 board.o + 2008 660 18876 16 0 28970 honor90pro_demo.o + 56 34 0 0 0 10455 main.o + 120 18 192 0 4096 2140 startup_armcm0.o + + ---------------------------------------------------------------------- + 2208 716 19100 16 4096 42142 Object Totals + 0 0 32 0 0 0 (incl. Generated) + 0 0 0 0 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4204 252 dcs_packet_fifo.o + 104 62 28 13 0 192 drv_common.o + 536 90 0 0 0 792 drv_crgu.o + 136 22 0 400 16 196 drv_dma.o + 144 34 0 0 0 248 drv_dsc_dec.o + 1904 682 0 1 0 1340 drv_dsi_rx.o + 1704 306 0 0 0 2036 drv_dsi_tx.o + 148 0 0 0 0 260 drv_efuse.o + 296 40 0 4 64 1000 drv_gpio.o + 1080 166 0 0 0 1620 drv_lcdc.o + 658 104 0 0 0 1240 drv_memc.o + 40 0 0 0 0 120 drv_phy_common.o + 592 132 0 0 0 716 drv_pwr.o + 534 108 0 8 0 1180 drv_rxbr.o + 972 266 0 4 0 488 drv_se.o + 264 54 0 4 0 560 drv_swire.o + 220 40 0 0 0 428 drv_sys_cfg.o + 366 38 0 80 0 816 drv_timer.o + 1172 54 16 0 96 980 drv_uart.o + 824 152 0 4 0 1700 drv_vidc.o + 2800 208 106 48 208 1392 hal_dsi_rx_ctrl.o + 4330 338 50 92 184 2212 hal_dsi_tx_ctrl.o + 440 32 182 0 0 688 hal_gpio.o + 2140 506 70 36 2303 652 hal_internal_dcs.o + 1348 58 0 0 68 700 hal_internal_fb.o + 1284 194 0 0 68 912 hal_internal_svs.o + 3974 810 144 16 68 1772 hal_internal_vsync.o + 308 32 0 8 0 616 hal_pwr.o + 344 32 0 2 0 348 hal_swire.o + 308 56 0 0 0 136 hal_system.o + 84 0 0 0 0 204 hal_timer.o + 176 18 48 24 0 144 hal_uart.o + 68 4 0 0 0 136 tau_delay.o + 354 30 16 1 256 320 tau_log.o + 200 20 0 0 0 76 ceil.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 26 0 0 0 0 72 memcmp.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 14 0 0 0 0 60 strlen.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfcmple.o + 20 0 0 0 0 68 cfrcmple.o + 56 0 0 0 0 68 d2f.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 40 0 0 0 0 60 ffixui.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 34972 4882 668 760 7536 29456 Library Totals + 38 0 8 11 1 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 29868 4700 660 745 7535 26396 CVWL668T.lib + 200 20 0 0 0 76 m_ps.l + 2866 120 0 4 0 1336 mc_p.l + 2000 42 0 0 0 1648 mf_p.l + + ---------------------------------------------------------------------- + 34972 4882 668 760 7536 29456 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 37180 5598 19768 776 11632 52174 Grand Totals + 37180 5598 19768 244 11632 52174 ELF Image Totals (compressed) + 37180 5598 19768 244 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 56948 ( 55.61kB) + Total RW Size (RW Data + ZI Data) 12408 ( 12.12kB) + Total ROM Size (Code + RO Data + RW Data) 57192 ( 55.85kB) + +============================================================================== + diff --git a/project/WL668T/Listings/board.txt b/project/WL668T/Listings/board.txt new file mode 100644 index 0000000..ce38f93 --- /dev/null +++ b/project/WL668T/Listings/board.txt @@ -0,0 +1,57 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\board.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\board.d --cpu=Cortex-M0 --apcs=interwork --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\sdk\include\M0 -I..\..\src\app -I"..\..\src\app\Honor 90Pro" -I..\..\src\aod\aod -I..\..\src\aod\aod_draw_mode -I..\..\src\aod\draw_mode -I.\RTE\_WL668T -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 --omf_browse=.\objects\board.crf ..\..\src\board\board.c] + THUMB + + AREA ||i.board_Init||, CODE, READONLY, ALIGN=2 + + board_Init PROC +;;;20 */ +;;;21 void board_Init(void) +000000 b510 PUSH {r4,lr} +;;;22 { +;;;23 /* system init ,配置MCU时钟 */ +;;;24 hal_system_init(HAL_SYSCLK_80M); +000002 4804 LDR r0,|L1.20| +000004 f7fffffe BL hal_system_init +;;;25 +;;;26 /* 使用SWD口作为Debug Log输出,可配置成Uart方式 */ +;;;27 tau_log_init(115200, LOG_PORT_UART0); +000008 20e1 MOVS r0,#0xe1 +00000a 2100 MOVS r1,#0 +00000c 0240 LSLS r0,r0,#9 +00000e f7fffffe BL tau_log_init +;;;28 +;;;29 /* systick init,根据需要配置 */ +;;;30 //hal_system_enable_systick(1); +;;;31 } +000012 bd10 POP {r4,pc} + ENDP + + |L1.20| + DCD 0x04c4b400 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\board\\board.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___7_board_c_bcd01269____REV16| +#line 467 "C:\\Keil_v5\\ARM\\PACK\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___7_board_c_bcd01269____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___7_board_c_bcd01269____REVSH| +#line 482 +|__asm___7_board_c_bcd01269____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/WL668T/Listings/honor90pro_demo.txt b/project/WL668T/Listings/honor90pro_demo.txt new file mode 100644 index 0000000..568ff52 --- /dev/null +++ b/project/WL668T/Listings/honor90pro_demo.txt @@ -0,0 +1,6629 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\honor90pro_demo.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\honor90pro_demo.d --cpu=Cortex-M0 --apcs=interwork --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\sdk\include\M0 -I..\..\src\app -I"..\..\src\app\Honor 90Pro" -I..\..\src\aod\aod -I..\..\src\aod\aod_draw_mode -I..\..\src\aod\draw_mode -I.\RTE\_WL668T -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 --omf_browse=.\objects\honor90pro_demo.crf "..\..\src\app\Honor 90Pro\Honor90Pro_demo.c"] + THUMB + + AREA ||i.Gpio_swire_output||, CODE, READONLY, ALIGN=1 + + Gpio_swire_output PROC +;;;2019 *****************************************************************************/ +;;;2020 void Gpio_swire_output(uint8_t flag, uint8_t num) +000000 b570 PUSH {r4-r6,lr} +;;;2021 { +000002 460d MOV r5,r1 +;;;2022 uint8_t ii; +;;;2023 +;;;2024 if (flag) +000004 2800 CMP r0,#0 +000006 d01d BEQ |L1.68| +;;;2025 { +;;;2026 if (flag ==2) +000008 2802 CMP r0,#2 +00000a d106 BNE |L1.26| +;;;2027 { +;;;2028 hal_gpio_init_output(IO_PAD_AP_SWIRE, IO_LVL_HIGH); +00000c 2101 MOVS r1,#1 +00000e 2004 MOVS r0,#4 +000010 f7fffffe BL hal_gpio_init_output +;;;2029 delayMs(2); +000014 2002 MOVS r0,#2 +000016 f7fffffe BL delayMs + |L1.26| +;;;2030 } +;;;2031 for (ii =0; ii< num; ii++) +00001a 2400 MOVS r4,#0 +00001c e00f B |L1.62| + |L1.30| +;;;2032 { +;;;2033 hal_gpio_set_output_data(IO_PAD_AP_SWIRE, IO_LVL_LOW); +00001e 2100 MOVS r1,#0 +000020 2004 MOVS r0,#4 +000022 f7fffffe BL hal_gpio_set_output_data +;;;2034 delayUs(10); +000026 200a MOVS r0,#0xa +000028 f7fffffe BL delayUs +;;;2035 hal_gpio_set_output_data(IO_PAD_AP_SWIRE, IO_LVL_HIGH); +00002c 2101 MOVS r1,#1 +00002e 2004 MOVS r0,#4 +000030 f7fffffe BL hal_gpio_set_output_data +;;;2036 delayUs(9); +000034 2009 MOVS r0,#9 +000036 f7fffffe BL delayUs +00003a 1c64 ADDS r4,r4,#1 +00003c b2e4 UXTB r4,r4 ;2031 + |L1.62| +00003e 42ac CMP r4,r5 ;2031 +000040 d3ed BCC |L1.30| +;;;2037 } +;;;2038 } +;;;2039 else +;;;2040 { +;;;2041 hal_gpio_init_output(IO_PAD_AP_SWIRE, IO_LVL_LOW); +;;;2042 } +;;;2043 } +000042 bd70 POP {r4-r6,pc} + |L1.68| +000044 2100 MOVS r1,#0 ;2041 +000046 2004 MOVS r0,#4 ;2041 +000048 f7fffffe BL hal_gpio_init_output +00004c bd70 POP {r4-r6,pc} +;;;2044 + ENDP + + + AREA ||i.Note11Pro_demo||, CODE, READONLY, ALIGN=2 + + Note11Pro_demo PROC +;;;2573 */ +;;;2574 void Note11Pro_demo(void) +000000 2002 MOVS r0,#2 +;;;2575 { +;;;2576 /* 电源选择,上电只需要选择一次 */ +;;;2577 hal_pwr_set_main_power(MAIN_POWER_SELECT); /* 切换供电*/ +000002 f7fffffe BL hal_pwr_set_main_power +;;;2578 +;;;2579 /* 显示模块初始 */ +;;;2580 app_display_init(); +000006 f7fffffe BL app_display_init +;;;2581 +;;;2582 hal_pwr_ldo18s_en(true); +00000a 2001 MOVS r0,#1 +00000c f7fffffe BL hal_pwr_ldo18s_en +;;;2583 hal_pwr_ldo18s_set(LDO_18S_5); +000010 2005 MOVS r0,#5 +000012 f7fffffe BL hal_pwr_ldo18s_set +;;;2584 // +;;;2585 // hal_pwr_ldo13s_en(true); +;;;2586 // hal_pwr_ldo13s_set(LDO_13S_6); +;;;2587 +;;;2588 /* touch 相关模块初始化 */ +;;;2589 #if TOUCH_ENABLE +;;;2590 /* TP 初始化 */ +;;;2591 app_tp_init(); +;;;2592 app_tp_phone_clear_reset_on(); +;;;2593 /* 与屏的TP 模块通讯并初始化 */ +;;;2594 app_tp_transfer_screen_start(); +;;;2595 #endif +;;;2596 +;;;2597 #if AOD_CLOCK_ENABLE +;;;2598 aod_init(g_rx_ctrl_handle, TIMER_NUM1, 95, 150, 180, &AOD_LowPower_Update, app_rx_event_cb); +;;;2599 //TAU_LOGD("aod_init\n"); +;;;2600 #endif +;;;2601 //TAU_LOGD("s20p demo init done \n"); +;;;2602 +;;;2603 while (1) +;;;2604 { +;;;2605 /* DCS 命令异步处理 */ +;;;2606 while (hal_dsi_rx_ctrl_dcs_async_handler(g_rx_ctrl_handle)); +000016 4c0f LDR r4,|L2.84| +000018 4e0f LDR r6,|L2.88| +00001a 2500 MOVS r5,#0 ;2583 + |L2.28| +00001c 68a0 LDR r0,[r4,#8] ; g_rx_ctrl_handle +00001e f7fffffe BL hal_dsi_rx_ctrl_dcs_async_handler +000022 2800 CMP r0,#0 +000024 d1fa BNE |L2.28| +000026 78a0 LDRB r0,[r4,#2] ; sg_system_suspend +000028 2800 CMP r0,#0 +00002a d003 BEQ |L2.52| +00002c 2002 MOVS r0,#2 +00002e f7fffffe BL app_system_suspend +000032 70a5 STRB r5,[r4,#2] + |L2.52| +000034 7860 LDRB r0,[r4,#1] ; sg_system_resume +000036 2800 CMP r0,#0 +000038 d0f0 BEQ |L2.28| +00003a f7fffffe BL hal_pwr_exit_sleep_mode +00003e f7fffffe BL app_display_init +000042 4633 MOV r3,r6 +000044 a205 ADR r2,|L2.92| +000046 a108 ADR r1,|L2.104| +000048 2000 MOVS r0,#0 +00004a f7fffffe BL tau_log_printf +00004e 7065 STRB r5,[r4,#1] +000050 e7e4 B |L2.28| +;;;2607 +;;;2608 +;;;2609 // CallingDisplayOffHandle(); +;;;2610 +;;;2611 /* 系统事件处理(sleep mode) */ +;;;2612 app_system_process(); +;;;2613 } +;;;2614 } +;;;2615 #endif + ENDP + +000052 0000 DCW 0x0000 + |L2.84| + DCD ||.data|| + |L2.88| + DCD 0x0000095d + |L2.92| +00005c 486f6e6f DCB "Honor90Pro",0 +000060 72393050 +000064 726f00 +000067 00 DCB 0 + |L2.104| +000068 5b25735d DCB "[%s] (%04d) system resume\n",0 +00006c 20282530 +000070 34642920 +000074 73797374 +000078 656d2072 +00007c 6573756d +000080 650a00 +000083 00 DCB 0 + + AREA ||i.ap_dcs_read||, CODE, READONLY, ALIGN=2 + + ap_dcs_read PROC +;;;185 +;;;186 static bool ap_dcs_read(uint8_t data_type, uint8_t dcs_cmd, uint8_t param) +000000 b5fe PUSH {r1-r7,lr} +;;;187 { +;;;188 uint32_t data_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); +000002 4d37 LDR r5,|L3.224| +000004 460c MOV r4,r1 ;187 +000006 68a8 LDR r0,[r5,#8] ; g_rx_ctrl_handle +000008 f7fffffe BL hal_dsi_rx_ctrl_get_max_ret_size +00000c 4606 MOV r6,r0 +;;;189 if(dcs_cmd == 0xBE) +00000e 2cbe CMP r4,#0xbe +000010 d032 BEQ |L3.120| +;;;190 { +;;;191 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;192 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;193 DSI_VC_0, +;;;194 1, +;;;195 0x00); +;;;196 } +;;;197 else if (dcs_cmd == 0x00) +;;;198 { +;;;199 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000012 2132 MOVS r1,#0x32 +000014 2c00 CMP r4,#0 ;197 +000016 d049 BEQ |L3.172| +;;;200 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;201 DSI_VC_0, +;;;202 1, 0x32); +;;;203 } +;;;204 else if(dcs_cmd == 0x01) +;;;205 { +;;;206 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000018 2033 MOVS r0,#0x33 +00001a 2c01 CMP r4,#1 ;204 +00001c d032 BEQ |L3.132| +;;;207 DSI_ACK_DT_GEN_SHORT_RESPONSE_1B, +;;;208 DSI_VC_0, +;;;209 1, +;;;210 0x33); +;;;211 } +;;;212 else if(dcs_cmd == 0x02) +;;;213 { +;;;214 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +00001e 2230 MOVS r2,#0x30 +000020 2c02 CMP r4,#2 ;212 +000022 d031 BEQ |L3.136| +;;;215 DSI_ACK_DT_GEN_SHORT_RESPONSE_1B, +;;;216 DSI_VC_0, +;;;217 1, +;;;218 0x30); +;;;219 } +;;;220 else if(dcs_cmd == 0x03) +000024 2c03 CMP r4,#3 +000026 d041 BEQ |L3.172| +;;;221 { +;;;222 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;223 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;224 DSI_VC_0, +;;;225 1, +;;;226 0x32); +;;;227 } +;;;228 else if(dcs_cmd == 0x04 || dcs_cmd == 0x05) +000028 2c04 CMP r4,#4 +00002a d041 BEQ |L3.176| +00002c 2c05 CMP r4,#5 +00002e d03f BEQ |L3.176| +;;;229 { +;;;230 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;231 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;232 DSI_VC_0, +;;;233 1, +;;;234 0x41); +;;;235 } +;;;236 else if(dcs_cmd == 0x06) +;;;237 { +;;;238 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000030 2344 MOVS r3,#0x44 +000032 2c06 CMP r4,#6 ;236 +000034 d03e BEQ |L3.180| +;;;239 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;240 DSI_VC_0, +;;;241 1, +;;;242 0x44); +;;;243 } +;;;244 else if(dcs_cmd == 0x07) +;;;245 { +;;;246 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000036 2743 MOVS r7,#0x43 +000038 2c07 CMP r4,#7 ;244 +00003a d03d BEQ |L3.184| +;;;247 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;248 DSI_VC_0, +;;;249 1, +;;;250 0x43); +;;;251 } +;;;252 else if(dcs_cmd == 0x08) +00003c 2c08 CMP r4,#8 +00003e d03d BEQ |L3.188| +;;;253 { +;;;254 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;255 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;256 DSI_VC_0, +;;;257 1, +;;;258 0x56); +;;;259 } +;;;260 else if(dcs_cmd == 0x09) +000040 2c09 CMP r4,#9 +000042 d03e BEQ |L3.194| +;;;261 { +;;;262 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;263 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;264 DSI_VC_0, +;;;265 1, +;;;266 0x30); +;;;267 } +;;;268 else if(dcs_cmd == 0x0A) +000044 2c0a CMP r4,#0xa +000046 d03e BEQ |L3.198| +;;;269 { +;;;270 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;271 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;272 DSI_VC_0, +;;;273 1, +;;;274 0x9C); +;;;275 } +;;;276 else if(dcs_cmd == 0x0B) +;;;277 { +;;;278 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000048 2234 MOVS r2,#0x34 +00004a 2c0b CMP r4,#0xb ;276 +00004c d039 BEQ |L3.194| +;;;279 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;280 DSI_VC_0, +;;;281 1, +;;;282 0x34); +;;;283 } +;;;284 else if(dcs_cmd == 0x0C) +00004e 2c0c CMP r4,#0xc +000050 d035 BEQ |L3.190| +;;;285 { +;;;286 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;287 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;288 DSI_VC_0, +;;;289 1, +;;;290 0x33); +;;;291 } +;;;292 else if(dcs_cmd == 0x0D) +000052 2c0d CMP r4,#0xd +000054 d035 BEQ |L3.194| +;;;293 { +;;;294 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;295 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;296 DSI_VC_0, +;;;297 1, +;;;298 0x34); +;;;299 } +;;;300 else if(dcs_cmd == 0x0E) +000056 2c0e CMP r4,#0xe +000058 d037 BEQ |L3.202| +;;;301 { +;;;302 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;303 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;304 DSI_VC_0, +;;;305 1, +;;;306 0x42); +;;;307 } +;;;308 else if(dcs_cmd == 0x0F) +00005a 2c0f CMP r4,#0xf +00005c d026 BEQ |L3.172| +;;;309 { +;;;310 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;311 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;312 DSI_VC_0, +;;;313 1, +;;;314 0x32); +;;;315 } +;;;316 else if(dcs_cmd == 0x10) +00005e 2c10 CMP r4,#0x10 +000060 d035 BEQ |L3.206| +;;;317 { +;;;318 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;319 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;320 DSI_VC_0, +;;;321 1, +;;;322 0x37); +;;;323 } +;;;324 else if(dcs_cmd == 0x11) +000062 2c11 CMP r4,#0x11 +000064 d028 BEQ |L3.184| +;;;325 { +;;;326 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;327 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;328 DSI_VC_0, +;;;329 1, +;;;330 0x43); +;;;331 } +;;;332 else if(dcs_cmd == 0x12) +000066 2c12 CMP r4,#0x12 +000068 d033 BEQ |L3.210| +;;;333 { +;;;334 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;335 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;336 DSI_VC_0, +;;;337 1, +;;;338 0x45); +;;;339 } +;;;340 else if(dcs_cmd == 0x13) +00006a 2c13 CMP r4,#0x13 +00006c d033 BEQ |L3.214| +;;;341 { +;;;342 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;343 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;344 DSI_VC_0, +;;;345 1, +;;;346 0x31); +;;;347 } +;;;348 else if(dcs_cmd == 0x14) +00006e 2c14 CMP r4,#0x14 +000070 d020 BEQ |L3.180| +;;;349 { +;;;350 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;351 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;352 DSI_VC_0, +;;;353 1, +;;;354 0x44); +;;;355 } +;;;356 +;;;357 else if(dcs_cmd == 0xFA) +000072 2cfa CMP r4,#0xfa +000074 d031 BEQ |L3.218| +000076 e00e B |L3.150| + |L3.120| +000078 2000 MOVS r0,#0 ;191 +00007a e020 B |L3.190| + |L3.124| +00007c 2301 MOVS r3,#1 ;191 +00007e 2200 MOVS r2,#0 ;191 +000080 2121 MOVS r1,#0x21 ;191 +000082 e005 B |L3.144| + |L3.132| +000084 9000 STR r0,[sp,#0] ;206 +000086 e000 B |L3.138| + |L3.136| +000088 9200 STR r2,[sp,#0] ;214 + |L3.138| +00008a 2301 MOVS r3,#1 ;206 +00008c 2200 MOVS r2,#0 ;206 +00008e 2111 MOVS r1,#0x11 ;206 + |L3.144| +;;;358 { +;;;359 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000090 68a8 LDR r0,[r5,#8] ; g_rx_ctrl_handle +000092 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd + |L3.150| +;;;360 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;361 DSI_VC_0, +;;;362 1, +;;;363 0x01); +;;;364 } +;;;365 // else +;;;366 { +;;;367 TAU_LOGD("dcs_cmd %X %d\n",dcs_cmd , data_size); +000096 23ff MOVS r3,#0xff +000098 3370 ADDS r3,r3,#0x70 +00009a a212 ADR r2,|L3.228| +00009c a114 ADR r1,|L3.240| +00009e 2000 MOVS r0,#0 +0000a0 9601 STR r6,[sp,#4] +0000a2 9400 STR r4,[sp,#0] +0000a4 f7fffffe BL tau_log_printf +;;;368 } +;;;369 +;;;370 +;;;371 +;;;372 +;;;373 return true; +0000a8 2001 MOVS r0,#1 +;;;374 } +0000aa bdfe POP {r1-r7,pc} + |L3.172| +0000ac 9100 STR r1,[sp,#0] ;222 +0000ae e7e5 B |L3.124| + |L3.176| +0000b0 2041 MOVS r0,#0x41 ;230 +0000b2 e004 B |L3.190| + |L3.180| +0000b4 9300 STR r3,[sp,#0] ;238 +0000b6 e7e1 B |L3.124| + |L3.184| +0000b8 9700 STR r7,[sp,#0] ;246 +0000ba e7df B |L3.124| + |L3.188| +0000bc 2056 MOVS r0,#0x56 ;254 + |L3.190| +0000be 9000 STR r0,[sp,#0] ;230 +0000c0 e7dc B |L3.124| + |L3.194| +0000c2 9200 STR r2,[sp,#0] ;262 +0000c4 e7da B |L3.124| + |L3.198| +0000c6 209c MOVS r0,#0x9c ;270 +0000c8 e7f9 B |L3.190| + |L3.202| +0000ca 2042 MOVS r0,#0x42 ;302 +0000cc e7f7 B |L3.190| + |L3.206| +0000ce 2037 MOVS r0,#0x37 ;318 +0000d0 e7f5 B |L3.190| + |L3.210| +0000d2 2045 MOVS r0,#0x45 ;334 +0000d4 e7f3 B |L3.190| + |L3.214| +0000d6 2031 MOVS r0,#0x31 ;342 +0000d8 e7f1 B |L3.190| + |L3.218| +0000da 2001 MOVS r0,#1 ;359 +0000dc e7ef B |L3.190| +;;;375 + ENDP + +0000de 0000 DCW 0x0000 + |L3.224| + DCD ||.data|| + |L3.228| +0000e4 486f6e6f DCB "Honor90Pro",0 +0000e8 72393050 +0000ec 726f00 +0000ef 00 DCB 0 + |L3.240| +0000f0 5b25735d DCB "[%s] (%04d) dcs_cmd %X %d\n",0 +0000f4 20282530 +0000f8 34642920 +0000fc 6463735f +000100 636d6420 +000104 25582025 +000108 640a00 +00010b 00 DCB 0 + + AREA ||i.ap_dcs_set_display_off||, CODE, READONLY, ALIGN=2 + + ap_dcs_set_display_off PROC +;;;423 */ +;;;424 static bool ap_dcs_set_display_off(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b508 PUSH {r3,lr} +;;;425 { +;;;426 TAU_LOGD("disp off %d\n", panel_display_done); +000002 4806 LDR r0,|L4.28| +000004 23ff MOVS r3,#0xff +000006 7800 LDRB r0,[r0,#0] ; panel_display_done +000008 9000 STR r0,[sp,#0] +00000a 33ab ADDS r3,r3,#0xab +00000c a204 ADR r2,|L4.32| +00000e a107 ADR r1,|L4.44| +000010 2000 MOVS r0,#0 +000012 f7fffffe BL tau_log_printf +;;;427 // if (panel_display_done) +;;;428 // { +;;;429 // hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x28); +;;;430 +;;;431 // } +;;;432 #if ANALOG_PWM_OUTPUT +;;;433 hal_pwm_enable(false); +;;;434 #endif +;;;435 return true; +000016 2001 MOVS r0,#1 +;;;436 } +000018 bd08 POP {r3,pc} +;;;437 + ENDP + +00001a 0000 DCW 0x0000 + |L4.28| + DCD ||.data|| + |L4.32| +000020 486f6e6f DCB "Honor90Pro",0 +000024 72393050 +000028 726f00 +00002b 00 DCB 0 + |L4.44| +00002c 5b25735d DCB "[%s] (%04d) disp off %d\n",0 +000030 20282530 +000034 34642920 +000038 64697370 +00003c 206f6666 +000040 2025640a +000044 00 +000045 00 DCB 0 +000046 00 DCB 0 +000047 00 DCB 0 + + AREA ||i.ap_dcs_set_display_on||, CODE, READONLY, ALIGN=2 + + ap_dcs_set_display_on PROC +;;;409 */ +;;;410 static bool ap_dcs_set_display_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;411 { +;;;412 AOD_ON = true; +000002 4806 LDR r0,|L5.28| +000004 2101 MOVS r1,#1 +000006 70c1 STRB r1,[r0,#3] +;;;413 display_on_flag =1; +000008 7101 STRB r1,[r0,#4] +;;;414 TAU_LOGD("disp on \n"); +00000a 23ff MOVS r3,#0xff +00000c 339f ADDS r3,r3,#0x9f +00000e a204 ADR r2,|L5.32| +000010 a106 ADR r1,|L5.44| +000012 2000 MOVS r0,#0 +000014 f7fffffe BL tau_log_printf +;;;415 return true; +000018 2001 MOVS r0,#1 +;;;416 } +00001a bd10 POP {r4,pc} +;;;417 + ENDP + + |L5.28| + DCD ||.data|| + |L5.32| +000020 486f6e6f DCB "Honor90Pro",0 +000024 72393050 +000028 726f00 +00002b 00 DCB 0 + |L5.44| +00002c 5b25735d DCB "[%s] (%04d) disp on \n",0 +000030 20282530 +000034 34642920 +000038 64697370 +00003c 206f6e20 +000040 0a00 +000042 00 DCB 0 +000043 00 DCB 0 + + AREA ||i.ap_dcs_set_enter_sleep_mode||, CODE, READONLY, ALIGN=2 + + ap_dcs_set_enter_sleep_mode PROC +;;;443 */ +;;;444 static bool ap_dcs_set_enter_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;445 { +;;;446 // TAU_LOGD("enter sleep mode \n", panel_display_done); +;;;447 if (panel_display_done) +000002 4816 LDR r0,|L6.92| +000004 7801 LDRB r1,[r0,#0] ; panel_display_done +000006 2900 CMP r1,#0 +000008 d006 BEQ |L6.24| +;;;448 { +;;;449 hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_STOP_MODE); +00000a 2101 MOVS r1,#1 +00000c 68c0 LDR r0,[r0,#0xc] ; g_tx_ctrl_handle +00000e f7fffffe BL hal_dsi_tx_ctrl_set_tear_mode +;;;450 // hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x10); +;;;451 delayMs(10); +000012 200a MOVS r0,#0xa +000014 f7fffffe BL delayMs + |L6.24| +;;;452 } +;;;453 +;;;454 #if AP_SWIRE_OUTPUT +;;;455 /* Swire close */ +;;;456 hal_swire_enable(false); +000018 2000 MOVS r0,#0 +00001a f7fffffe BL hal_swire_enable +;;;457 delayMs(10); +00001e 200a MOVS r0,#0xa +000020 f7fffffe BL delayMs +;;;458 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x10); +000024 2310 MOVS r3,#0x10 +000026 2201 MOVS r2,#1 +000028 2100 MOVS r1,#0 +00002a 2005 MOVS r0,#5 +00002c f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;459 delayMs(20); //20 +000030 2014 MOVS r0,#0x14 +000032 f7fffffe BL delayMs +;;;460 /* AVDD_EN close*/ +;;;461 hal_gpio_set_output_data(IO_PAD_AP_PWMEN, IO_LVL_LOW); +000036 2100 MOVS r1,#0 +000038 2008 MOVS r0,#8 +00003a f7fffffe BL hal_gpio_set_output_data +;;;462 #endif +;;;463 delayMs(20); //20 +00003e 2014 MOVS r0,#0x14 +000040 f7fffffe BL delayMs +;;;464 hal_gpio_set_output_data(IO_PAD_TD_RSTN, IO_LVL_LOW); +000044 2100 MOVS r1,#0 +000046 2007 MOVS r0,#7 +000048 f7fffffe BL hal_gpio_set_output_data +;;;465 +;;;466 /* Wait AP reset down*/ +;;;467 hal_gpio_set_ap_reset_int(ENABLE, ap_rstn_pull_down_cb, DETECT_LOW_LVL); +00004c 2201 MOVS r2,#1 +00004e 4904 LDR r1,|L6.96| +000050 4610 MOV r0,r2 +000052 f7fffffe BL hal_gpio_set_ap_reset_int +;;;468 return true; +000056 2001 MOVS r0,#1 +;;;469 } +000058 bd10 POP {r4,pc} +;;;470 + ENDP + +00005a 0000 DCW 0x0000 + |L6.92| + DCD ||.data|| + |L6.96| + DCD ap_rstn_pull_down_cb + + AREA ||i.ap_dcs_set_exit_sleep_mode||, CODE, READONLY, ALIGN=2 + + ap_dcs_set_exit_sleep_mode PROC +;;;476 */ +;;;477 static bool ap_dcs_set_exit_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;478 { +;;;479 #if AP_SWIRE_OUTPUT +;;;480 /* AVDD 上电, 用于解决息屏开屏PPS不更新问题 */ +;;;481 // hal_gpio_set_output_data(IO_PAD_AP_PWMEN, IO_LVL_HIGH); +;;;482 #endif +;;;483 +;;;484 #if TX_START_AFTER_APRST +;;;485 if (panel_display_done == false) +;;;486 { +;;;487 sg_tx_start_in_process = true; +;;;488 } +;;;489 #endif +;;;490 +;;;491 TAU_LOGD("exit sleep mode \n"); +000002 23ff MOVS r3,#0xff +000004 33ec ADDS r3,r3,#0xec +000006 a203 ADR r2,|L7.20| +000008 a105 ADR r1,|L7.32| +00000a 2000 MOVS r0,#0 +00000c f7fffffe BL tau_log_printf +;;;492 +;;;493 return true; +000010 2001 MOVS r0,#1 +;;;494 } +000012 bd10 POP {r4,pc} +;;;495 + ENDP + + |L7.20| +000014 486f6e6f DCB "Honor90Pro",0 +000018 72393050 +00001c 726f00 +00001f 00 DCB 0 + |L7.32| +000020 5b25735d DCB "[%s] (%04d) exit sleep mode \n",0 +000024 20282530 +000028 34642920 +00002c 65786974 +000030 20736c65 +000034 6570206d +000038 6f646520 +00003c 0a00 +00003e 00 DCB 0 +00003f 00 DCB 0 + + AREA ||i.ap_rstn_pull_down_cb||, CODE, READONLY, ALIGN=2 + + ap_rstn_pull_down_cb PROC +;;;2320 */ +;;;2321 static void ap_rstn_pull_down_cb(void *data) +000000 b510 PUSH {r4,lr} +;;;2322 { +;;;2323 sg_system_suspend = true; +000002 4907 LDR r1,|L8.32| +000004 2001 MOVS r0,#1 +000006 7088 STRB r0,[r1,#2] +;;;2324 /* 关闭AP reset检查 */ +;;;2325 hal_gpio_set_ap_reset_int(DISABLE, NULL, DETECT_HIGH_LVL); +000008 2200 MOVS r2,#0 +00000a 4611 MOV r1,r2 +00000c 4610 MOV r0,r2 +00000e f7fffffe BL hal_gpio_set_ap_reset_int +;;;2326 TAU_LOGD("ap_rstn_pull_down_cb\n"); +000012 4b04 LDR r3,|L8.36| +000014 a204 ADR r2,|L8.40| +000016 a107 ADR r1,|L8.52| +000018 2000 MOVS r0,#0 +00001a f7fffffe BL tau_log_printf +;;;2327 } +00001e bd10 POP {r4,pc} +;;;2328 + ENDP + + |L8.32| + DCD ||.data|| + |L8.36| + DCD 0x00000916 + |L8.40| +000028 486f6e6f DCB "Honor90Pro",0 +00002c 72393050 +000030 726f00 +000033 00 DCB 0 + |L8.52| +000034 5b25735d DCB "[%s] (%04d) ap_rstn_pull_down_cb\n",0 +000038 20282530 +00003c 34642920 +000040 61705f72 +000044 73746e5f +000048 70756c6c +00004c 5f646f77 +000050 6e5f6362 +000054 0a00 +000056 00 DCB 0 +000057 00 DCB 0 + + AREA ||i.ap_rstn_pull_high_cb||, CODE, READONLY, ALIGN=2 + + ap_rstn_pull_high_cb PROC +;;;2307 */ +;;;2308 static void ap_rstn_pull_high_cb(void *data) +000000 b510 PUSH {r4,lr} +;;;2309 { +;;;2310 /* system resume begin */ +;;;2311 sg_system_resume = true; +000002 4904 LDR r1,|L9.20| +000004 2001 MOVS r0,#1 +000006 7048 STRB r0,[r1,#1] +;;;2312 /* 关闭AP reset检查 */ +;;;2313 hal_gpio_set_ap_reset_int(DISABLE, NULL, DETECT_HIGH_LVL); +000008 2200 MOVS r2,#0 +00000a 4611 MOV r1,r2 +00000c 4610 MOV r0,r2 +00000e f7fffffe BL hal_gpio_set_ap_reset_int +;;;2314 } +000012 bd10 POP {r4,pc} +;;;2315 + ENDP + + |L9.20| + DCD ||.data|| + + AREA ||i.ap_set_backlight||, CODE, READONLY, ALIGN=1 + + ap_set_backlight PROC +;;;607 */ +;;;608 static bool ap_set_backlight(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b51c PUSH {r2-r4,lr} +;;;609 { +;;;610 uint16_t ap_backlight = dcs_packet->packet_param[1] + (dcs_packet->packet_param[0] << 8); +000002 68c8 LDR r0,[r1,#0xc] +000004 7841 LDRB r1,[r0,#1] +000006 7800 LDRB r0,[r0,#0] +000008 0200 LSLS r0,r0,#8 +00000a 1808 ADDS r0,r1,r0 +;;;611 // TAU_LOGD("51: %04x\n", ap_backlight); +;;;612 +;;;613 if(ap_backlight < 0x500) ap_backlight = 0x600; +00000c 2105 MOVS r1,#5 +00000e b280 UXTH r0,r0 ;610 +000010 0209 LSLS r1,r1,#8 +000012 4288 CMP r0,r1 +000014 d201 BCS |L10.26| +000016 2003 MOVS r0,#3 +000018 0240 LSLS r0,r0,#9 + |L10.26| +;;;614 +;;;615 hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, ap_backlight >> 8, ap_backlight & 0xFF); +00001a b2c1 UXTB r1,r0 +00001c 0a00 LSRS r0,r0,#8 +00001e 9101 STR r1,[sp,#4] +000020 9000 STR r0,[sp,#0] +000022 2351 MOVS r3,#0x51 +000024 2203 MOVS r2,#3 +000026 2100 MOVS r1,#0 +000028 2029 MOVS r0,#0x29 +00002a f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;616 +;;;617 return true; +00002e 2001 MOVS r0,#1 +;;;618 } +000030 bd1c POP {r2-r4,pc} +;;;619 + ENDP + + + AREA ||i.ap_update_frame_rate||, CODE, READONLY, ALIGN=2 + + ap_update_frame_rate PROC +;;;532 +;;;533 static bool ap_update_frame_rate(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b51c PUSH {r2-r4,lr} +;;;534 { +000002 460c MOV r4,r1 +;;;535 TAU_LOGD("60: %04x %d\n", dcs_packet->packet_param[0],dcs_packet->param_length); +000004 68e0 LDR r0,[r4,#0xc] +000006 6889 LDR r1,[r1,#8] +000008 7800 LDRB r0,[r0,#0] +00000a 9101 STR r1,[sp,#4] +00000c 9000 STR r0,[sp,#0] +00000e 4b12 LDR r3,|L11.88| +000010 a212 ADR r2,|L11.92| +000012 a115 ADR r1,|L11.104| +000014 2000 MOVS r0,#0 +000016 f7fffffe BL tau_log_printf +;;;536 +;;;537 if (dcs_packet->param_length == 1) +00001a 68a0 LDR r0,[r4,#8] +00001c 2801 CMP r0,#1 +00001e d10f BNE |L11.64| +;;;538 { +;;;539 if (dcs_packet->packet_param[0] == 0x01) +000020 68e0 LDR r0,[r4,#0xc] +000022 7801 LDRB r1,[r0,#0] +;;;540 { +;;;541 // hal_dsi_rx_ctrl_toggle_input_frame_rate(g_rx_ctrl_handle, DSI_FRAME_RATE_120HZ); +;;;542 hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_60HZ_MODE); +000024 4817 LDR r0,|L11.132| +000026 2901 CMP r1,#1 ;539 +000028 d00c BEQ |L11.68| +;;;543 TAU_LOGD("updata frame 120Hz\n"); +;;;544 } +;;;545 else //if (dcs_packet->packet_param[0] == 0x21) +;;;546 { +;;;547 // hal_dsi_rx_ctrl_toggle_input_frame_rate(g_rx_ctrl_handle, DSI_FRAME_RATE_60HZ); +;;;548 hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_60HZ_MODE); +00002a 2100 MOVS r1,#0 +00002c 68c0 LDR r0,[r0,#0xc] ; g_tx_ctrl_handle +00002e f7fffffe BL hal_dsi_tx_ctrl_set_tear_mode +;;;549 TAU_LOGD("updata frame 60Hz\n"); +000032 4b09 LDR r3,|L11.88| +000034 a209 ADR r2,|L11.92| +000036 330e ADDS r3,r3,#0xe +000038 a113 ADR r1,|L11.136| + |L11.58| +00003a 2000 MOVS r0,#0 ;543 +00003c f7fffffe BL tau_log_printf + |L11.64| +;;;550 } +;;;551 +;;;552 } +;;;553 return true; +000040 2001 MOVS r0,#1 +;;;554 } +000042 bd1c POP {r2-r4,pc} + |L11.68| +000044 2100 MOVS r1,#0 ;542 +000046 68c0 LDR r0,[r0,#0xc] ;542 ; g_tx_ctrl_handle +000048 f7fffffe BL hal_dsi_tx_ctrl_set_tear_mode +00004c 4b02 LDR r3,|L11.88| +00004e a203 ADR r2,|L11.92| +000050 3308 ADDS r3,r3,#8 ;543 +000052 a115 ADR r1,|L11.168| +000054 e7f1 B |L11.58| +;;;555 + ENDP + +000056 0000 DCW 0x0000 + |L11.88| + DCD 0x00000217 + |L11.92| +00005c 486f6e6f DCB "Honor90Pro",0 +000060 72393050 +000064 726f00 +000067 00 DCB 0 + |L11.104| +000068 5b25735d DCB "[%s] (%04d) 60: %04x %d\n",0 +00006c 20282530 +000070 34642920 +000074 36303a20 +000078 25303478 +00007c 2025640a +000080 00 +000081 00 DCB 0 +000082 00 DCB 0 +000083 00 DCB 0 + |L11.132| + DCD ||.data|| + |L11.136| +000088 5b25735d DCB "[%s] (%04d) updata frame 60Hz\n",0 +00008c 20282530 +000090 34642920 +000094 75706461 +000098 74612066 +00009c 72616d65 +0000a0 20363048 +0000a4 7a0a00 +0000a7 00 DCB 0 + |L11.168| +0000a8 5b25735d DCB "[%s] (%04d) updata frame 120Hz\n",0 +0000ac 20282530 +0000b0 34642920 +0000b4 75706461 +0000b8 74612066 +0000bc 72616d65 +0000c0 20313230 +0000c4 487a0a00 + + AREA ||i.app_display_init||, CODE, READONLY, ALIGN=1 + + app_display_init PROC +;;;2356 */ +;;;2357 void app_display_init(void) +000000 b510 PUSH {r4,lr} +;;;2358 { +;;;2359 /* mipi rx初始化 */ +;;;2360 app_mipi_rx_init(); +000002 f7fffffe BL app_mipi_rx_init + |L12.6| +;;;2361 +;;;2362 /* VCC 主供电,等待VCC Power Ready,此时RX初始化完成可以响应MIPI命令 */ +;;;2363 if (MAIN_POWER_SELECT == PWR_SEL_VCC) +;;;2364 { +;;;2365 while (hal_pwr_get_vcc_power_ready() == false); +000006 f7fffffe BL hal_pwr_get_vcc_power_ready +00000a 2800 CMP r0,#0 +00000c d0fb BEQ |L12.6| +;;;2366 } +;;;2367 +;;;2368 /* GPIO 初始化 */ +;;;2369 app_gpio_init(); +00000e f7fffffe BL app_gpio_init +;;;2370 /* 背光初始化 */ +;;;2371 #if AP_SWIRE_OUTPUT +;;;2372 hal_swire_init(); /* swire init */ +000012 f7fffffe BL hal_swire_init +;;;2373 hal_swire_set_timer(TIMER_NUM0, 8, true); /* swire连续发送,绑定timer进行发送 */ +000016 2201 MOVS r2,#1 +000018 2108 MOVS r1,#8 +00001a 2000 MOVS r0,#0 +00001c f7fffffe BL hal_swire_set_timer +;;;2374 #endif +;;;2375 /* mipi tx 初始化*/ +;;;2376 app_mipi_tx_init(); +000020 f7fffffe BL app_mipi_tx_init +;;;2377 app_mipi_tx_start(); +000024 f7fffffe BL app_mipi_tx_start +;;;2378 } +000028 bd10 POP {r4,pc} +;;;2379 + ENDP + + + AREA ||i.app_gpio_init||, CODE, READONLY, ALIGN=2 + + app_gpio_init PROC +;;;2334 */ +;;;2335 void app_gpio_init(void) +000000 b51f PUSH {r0-r4,lr} +;;;2336 { +;;;2337 io_pad_attr_t attrs[] = +000002 4804 LDR r0,|L13.20| +000004 466c MOV r4,sp +000006 c80f LDM r0,{r0-r3} +000008 c40f STM r4!,{r0-r3} +;;;2338 { +;;;2339 {IO_PIN_8, PIN8_MODE_GPIO7, IO_IOE_OUTPUT, IO_LVL_LOW},/* PIN_8(TD_RSTN), GPIO,输出,低电平 */ +;;;2340 {IO_PIN_17, PIN17_MODE_GPIO8, IO_IOE_OUTPUT, IO_LVL_LOW}, /* PIN_17(PWMEN), GPIO,输出,低电平 */ +;;;2341 {IO_PIN_16, PIN16_MODE_GPIO2, IO_IOE_OUTPUT, IO_LVL_LOW}, /* PIN_16(AP_INT),GPIO,输出,低电平 */ +;;;2342 #if (TX_USE_CMD_MODE & (!TX_CMD_MODE_WITHOUT_TE)) +;;;2343 {IO_PIN_14, PIN14_MODE_GPIO24, IO_IOE_INPUT, IO_LVL_NONE}, /* PIN_29(AP_TE), cmd mode输出, 并且看屏TE,配置AP TE为GPIO输入 */ +;;;2344 #endif +;;;2345 {IO_PIN_29, PIN29_MODE_TEAR, IO_IOE_NONE, IO_LVL_NONE}, /* PIN_29(AP_TE), 硬件TEAR输出模式 */ +;;;2346 +;;;2347 }; +;;;2348 uint8_t size = sizeof(attrs) / sizeof(io_pad_attr_t); +00000a 2104 MOVS r1,#4 +;;;2349 hal_gpio_config_pad(attrs, size); +00000c 4668 MOV r0,sp +00000e f7fffffe BL hal_gpio_config_pad +;;;2350 } +000012 bd1f POP {r0-r4,pc} +;;;2351 + ENDP + + |L13.20| + DCD ||.constdata||+0x492c + + AREA ||i.app_init_panel||, CODE, READONLY, ALIGN=2 + + app_init_panel PROC +;;;2049 */ +;;;2050 static void app_init_panel(void) +000000 b5fe PUSH {r1-r7,lr} +000002 2101 MOVS r1,#1 +000004 2007 MOVS r0,#7 +000006 f7fffffe BL hal_gpio_set_output_data +00000a 200a MOVS r0,#0xa +00000c f7fffffe BL delayMs +000010 2100 MOVS r1,#0 +000012 2007 MOVS r0,#7 +000014 f7fffffe BL hal_gpio_set_output_data +000018 200a MOVS r0,#0xa +00001a f7fffffe BL delayMs +00001e 2101 MOVS r1,#1 +000020 2007 MOVS r0,#7 +000022 f7fffffe BL hal_gpio_set_output_data +000026 2028 MOVS r0,#0x28 +000028 f7fffffe BL delayMs +;;;2051 { +;;;2052 /* reset panel*/ +;;;2053 app_tx_panel_reset(); +;;;2054 send_panel_init_code(sizeof(panel_init_code), (uint8_t *) panel_init_code); +00002c 4f19 LDR r7,|L14.148| +00002e 4d1a LDR r5,|L14.152| +000030 2400 MOVS r4,#0 + |L14.50| +000032 192b ADDS r3,r5,r4 +000034 789e LDRB r6,[r3,#2] +000036 7859 LDRB r1,[r3,#1] +000038 5d28 LDRB r0,[r5,r4] +00003a 4632 MOV r2,r6 +00003c 1cdb ADDS r3,r3,#3 +00003e f7fffffe BL hal_dsi_tx_ctrl_write_array_cmd +000042 19a4 ADDS r4,r4,r6 +000044 2064 MOVS r0,#0x64 +000046 1ce4 ADDS r4,r4,#3 +000048 f7fffffe BL delayUs +00004c 42bc CMP r4,r7 +00004e d3f0 BCC |L14.50| +;;;2055 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); +000050 2311 MOVS r3,#0x11 +000052 2201 MOVS r2,#1 +000054 2100 MOVS r1,#0 +000056 2005 MOVS r0,#5 +000058 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;2056 delayMs(10); +00005c 200a MOVS r0,#0xa +00005e f7fffffe BL delayMs +;;;2057 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x05, 0x0F); //最大0FFF +000062 210f MOVS r1,#0xf +000064 2005 MOVS r0,#5 +000066 9101 STR r1,[sp,#4] +000068 9000 STR r0,[sp,#0] +00006a 2351 MOVS r3,#0x51 +00006c 2203 MOVS r2,#3 +00006e 2100 MOVS r1,#0 +000070 2039 MOVS r0,#0x39 +000072 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;2058 hal_gpio_init_output(IO_PAD_AP_PWMEN, IO_LVL_HIGH); +000076 2101 MOVS r1,#1 +000078 2008 MOVS r0,#8 +00007a f7fffffe BL hal_gpio_init_output +;;;2059 delayMs(60); //90 +00007e 203c MOVS r0,#0x3c +000080 f7fffffe BL delayMs +;;;2060 #if AP_SWIRE_OUTPUT +;;;2061 hal_swire_enable(true); +000084 2001 MOVS r0,#1 +000086 f7fffffe BL hal_swire_enable +;;;2062 hal_swire_set_pulse(SWIRE_DEFAULT_PULSE); +00008a 2025 MOVS r0,#0x25 +00008c f7fffffe BL hal_swire_set_pulse +;;;2063 #endif +;;;2064 // Gpio_swire_output(2, 40); +;;;2065 // delayMs(40); +;;;2066 +;;;2067 } +000090 bdfe POP {r1-r7,pc} +;;;2068 + ENDP + +000092 0000 DCW 0x0000 + |L14.148| + DCD 0x000048d6 + |L14.152| + DCD ||.constdata||+0x54 + + AREA ||i.app_mipi_rx_init||, CODE, READONLY, ALIGN=2 + + app_mipi_rx_init PROC +;;;2126 */ +;;;2127 static void app_mipi_rx_init(void) +000000 b5f0 PUSH {r4-r7,lr} +;;;2128 { +;;;2129 if (g_rx_ctrl_handle == NULL) +000002 4c31 LDR r4,|L15.200| +000004 b0a1 SUB sp,sp,#0x84 ;2128 +000006 68a0 LDR r0,[r4,#8] ; g_rx_ctrl_handle +000008 2800 CMP r0,#0 +00000a d102 BNE |L15.18| +;;;2130 { +;;;2131 /* 创建rx ctrl handle */ +;;;2132 g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); +00000c f7fffffe BL hal_dsi_rx_ctrl_create_handle +000010 60a0 STR r0,[r4,#8] ; g_rx_ctrl_handle + |L15.18| +;;;2133 } +;;;2134 /* 配置参数 */ +;;;2135 g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; +000012 2199 MOVS r1,#0x99 +000014 00c9 LSLS r1,r1,#3 +;;;2136 g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; +000016 4a2d LDR r2,|L15.204| +;;;2137 g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; +000018 6001 STR r1,[r0,#0] +;;;2138 g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; +00001a 6042 STR r2,[r0,#4] +;;;2139 g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; +00001c 60c2 STR r2,[r0,#0xc] +00001e 6081 STR r1,[r0,#8] +000020 2600 MOVS r6,#0 +000022 7406 STRB r6,[r0,#0x10] +;;;2140 g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; +000024 2501 MOVS r5,#1 +000026 7445 STRB r5,[r0,#0x11] +;;;2141 g_rx_ctrl_handle->base_info.dst_mode = OUTPUT_DATA_MODE; +;;;2142 g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; +000028 4601 MOV r1,r0 +00002a 7486 STRB r6,[r0,#0x12] ;2141 +00002c 2205 MOVS r2,#5 +00002e 3120 ADDS r1,r1,#0x20 +000030 748a STRB r2,[r1,#0x12] +;;;2143 g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; +000032 2204 MOVS r2,#4 +000034 74ca STRB r2,[r1,#0x13] +;;;2144 g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; /* 可不配置 */ +000036 750d STRB r5,[r1,#0x14] +;;;2145 g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; +000038 754d STRB r5,[r1,#0x15] +;;;2146 g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; +00003a 4925 LDR r1,|L15.208| +;;;2147 g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; /* 注册 DCS处理列表 */ +00003c 6381 STR r1,[r0,#0x38] +00003e 4601 MOV r1,r0 +000040 4a24 LDR r2,|L15.212| +000042 3180 ADDS r1,r1,#0x80 +;;;2148 g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; /* 注册dsc read 回调函数,可选,此函数为空时由cus_dcs_entry_table执行 */ +000044 63ca STR r2,[r1,#0x3c] +000046 4a24 LDR r2,|L15.216| +;;;2149 +;;;2150 g_rx_ctrl_handle->extra_info.flow_control_mode = FC_C2V_NORMAL_MODE; +000048 640a STR r2,[r1,#0x40] +00004a 2103 MOVS r1,#3 +00004c 76c1 STRB r1,[r0,#0x1b] +;;;2151 +;;;2152 g_rx_ctrl_handle->rx_lane_swap = RX_LANE_SWAP_3012; +00004e 22cc MOVS r2,#0xcc +000050 5411 STRB r1,[r2,r0] +;;;2153 g_rx_ctrl_handle->base_info.pn_swap = RX_LANE_0_PN_SWAP|RX_LANE_1_PN_SWAP|RX_LANE_2_PN_SWAP|RX_LANE_3_PN_SWAP|RX_LANE_CLK_PN_SWAP; +000052 211f MOVS r1,#0x1f +000054 8281 STRH r1,[r0,#0x14] +;;;2154 // g_rx_ctrl_handle->rx_strength=7; +;;;2155 // g_rx_ctrl_handle->hight_performan_mode = HIGHT_PERFORMAN_L2; +;;;2156 // g_rx_ctrl_handle->err_handler_level = ERR_HANDLE_L2; +;;;2157 +;;;2158 hal_dsi_rx_ctrl_set_check_crc(g_rx_ctrl_handle, false); +000056 2100 MOVS r1,#0 +000058 f7fffffe BL hal_dsi_rx_ctrl_set_check_crc +;;;2159 +;;;2160 #if RX_RESOLUTION_CHANGE_ENABLE +;;;2161 g_rx_ctrl_handle->pps_update_entry = pps_update_handle; +00005c 68a7 LDR r7,[r4,#8] ; g_rx_ctrl_handle +00005e 481f LDR r0,|L15.220| +000060 21c4 MOVS r1,#0xc4 +000062 51c8 STR r0,[r1,r7] +;;;2162 #endif +;;;2163 /* 提前预置PPS, AP 有PPS cmd也会更新 */ +;;;2164 if (g_rx_ctrl_handle->compress_en == true) +000064 2035 MOVS r0,#0x35 +000066 5dc0 LDRB r0,[r0,r7] +000068 2801 CMP r0,#1 +00006a d109 BNE |L15.128| +;;;2165 { +;;;2166 uint8_t pps[128] = { +00006c 2280 MOVS r2,#0x80 +00006e 491c LDR r1,|L15.224| +000070 4668 MOV r0,sp +000072 f7fffffe BL __aeabi_memcpy4 +;;;2167 0x12,0x00,0x00,0xAB,0x30,0x80,0x0A,0x8C, +;;;2168 0x04,0xC8,0x00,0x14,0x02,0x64,0x02,0x64, +;;;2169 0x02,0x00,0x02,0x4C,0x00,0x20,0x01,0xF1, +;;;2170 0x00,0x08,0x00,0x0D,0x05,0x7A,0x04,0x7D, +;;;2171 0x18,0x00,0x10,0xF0,0x07,0x10,0x20,0x00, +;;;2172 0x06,0x0F,0x0F,0x33,0x0E,0x1C,0x2A,0x38, +;;;2173 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B, +;;;2174 0x7D,0x7E,0x02,0x02,0x22,0x00,0x2A,0x40, +;;;2175 0x2A,0xBE,0x3A,0xFC,0x3A,0xFA,0x3A,0xF8, +;;;2176 0x3B,0x38,0x3B,0x78,0x3B,0xB6,0x4B,0xB6, +;;;2177 0x4B,0xF4,0x4B,0xF4,0x6C,0x34,0x84,0x74, +;;;2178 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;2179 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;2180 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;2181 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;2182 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 +;;;2183 }; +;;;2184 hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 128); +000076 2280 MOVS r2,#0x80 +000078 4669 MOV r1,sp +00007a 4638 MOV r0,r7 +00007c f7fffffe BL hal_dsi_rx_ctrl_pre_init_pps + |L15.128| +;;;2185 } +;;;2186 +;;;2187 // g_rx_ctrl_handle->extra_info.blank_info.top = 20; +;;;2188 // g_rx_ctrl_handle->extra_info.blank_info.enable = true; +;;;2189 +;;;2190 /* 初始化rx ctrl */ +;;;2191 hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); +000080 68a0 LDR r0,[r4,#8] ; g_rx_ctrl_handle +000082 f7fffffe BL hal_dsi_rx_ctrl_init +000086 9601 STR r6,[sp,#4] +000088 9500 STR r5,[sp,#0] +00008a 23be MOVS r3,#0xbe +00008c 2221 MOVS r2,#0x21 +00008e 2100 MOVS r1,#0 +000090 68a0 LDR r0,[r4,#8] ; g_rx_ctrl_handle +000092 f7fffffe BL hal_dsi_rx_ctrl_set_auto_ack +000096 9500 STR r5,[sp,#0] +000098 9501 STR r5,[sp,#4] +00009a 23fa MOVS r3,#0xfa +00009c 2221 MOVS r2,#0x21 +00009e 2101 MOVS r1,#1 +0000a0 68a0 LDR r0,[r4,#8] ; g_rx_ctrl_handle +0000a2 f7fffffe BL hal_dsi_rx_ctrl_set_auto_ack +0000a6 209c MOVS r0,#0x9c +0000a8 9500 STR r5,[sp,#0] +0000aa 9001 STR r0,[sp,#4] +0000ac 230a MOVS r3,#0xa +0000ae 2221 MOVS r2,#0x21 +0000b0 2102 MOVS r1,#2 +0000b2 68a0 LDR r0,[r4,#8] ; g_rx_ctrl_handle +0000b4 f7fffffe BL hal_dsi_rx_ctrl_set_auto_ack +;;;2192 // hal_dsi_rx_ctrl_set_log_level(kLOG_LEVEL_NONE); +;;;2193 +;;;2194 #if RX_READ_HW_ACK +;;;2195 /* 配置硬件回复 */ +;;;2196 app_set_dcs_hw_ack(); +;;;2197 #endif +;;;2198 +;;;2199 #if TX_CMD_MODE_WITHOUT_TE +;;;2200 /* 注册接收一帧帧头事件回调,每接收一帧数据TX再往外发一帧 */ +;;;2201 //hal_dsi_rx_ctrl_register_callback(g_rx_ctrl_handle, app_rx_event_cb, HAL_RX_FS_EVENT, true, NULL); +;;;2202 /* 注册接收第0行数据事件,接收到数据后再往外发送数据,确保不撕裂 */ +;;;2203 uint32_t line = 0; +;;;2204 hal_dsi_rx_ctrl_register_callback(g_rx_ctrl_handle, app_rx_event_cb, HAL_RX_LINE_EVENT, true, &line); +;;;2205 #endif +;;;2206 +;;;2207 #if RX_START_WITHOUT_RST +;;;2208 /* 等待ap reset置位再启动rx,否则容易收到错误数据 */ +;;;2209 hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +;;;2210 #else +;;;2211 /* 注册RX start callback,确认RX LP11时再启动RX,防止接收错误数据 */ +;;;2212 hal_gpio_set_ap_reset_int(ENABLE, app_mipi_rx_start_cb, DETECT_HIGH_LVL); +0000b8 2200 MOVS r2,#0 +0000ba 490a LDR r1,|L15.228| +0000bc 2001 MOVS r0,#1 +0000be f7fffffe BL hal_gpio_set_ap_reset_int +;;;2213 #endif +;;;2214 } +0000c2 b021 ADD sp,sp,#0x84 +0000c4 bdf0 POP {r4-r7,pc} +;;;2215 + ENDP + +0000c6 0000 DCW 0x0000 + |L15.200| + DCD ||.data|| + |L15.204| + DCD 0x00000a8c + |L15.208| + DCD 0x47868c00 + |L15.212| + DCD ||.constdata|| + |L15.216| + DCD ap_dcs_read + |L15.220| + DCD pps_update_handle + |L15.224| + DCD ||.constdata||+0x493c + |L15.228| + DCD app_mipi_rx_start_cb + + AREA ||i.app_mipi_rx_start_cb||, CODE, READONLY, ALIGN=2 + + app_mipi_rx_start_cb PROC +;;;2263 */ +;;;2264 static void app_mipi_rx_start_cb(void *data) +000000 b510 PUSH {r4,lr} +;;;2265 { +;;;2266 /* RX start */ +;;;2267 hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +000002 4808 LDR r0,|L16.36| +000004 6880 LDR r0,[r0,#8] ; g_rx_ctrl_handle +000006 f7fffffe BL hal_dsi_rx_ctrl_start +;;;2268 /* close cb */ +;;;2269 hal_gpio_set_ap_reset_int(DISABLE, NULL, DETECT_HIGH_LVL); +00000a 2200 MOVS r2,#0 +00000c 4611 MOV r1,r2 +00000e 4610 MOV r0,r2 +000010 f7fffffe BL hal_gpio_set_ap_reset_int +;;;2270 TAU_LOGD("rx start\n"); +000014 4b04 LDR r3,|L16.40| +000016 a205 ADR r2,|L16.44| +000018 a107 ADR r1,|L16.56| +00001a 2000 MOVS r0,#0 +00001c f7fffffe BL tau_log_printf +;;;2271 } +000020 bd10 POP {r4,pc} +;;;2272 #endif + ENDP + +000022 0000 DCW 0x0000 + |L16.36| + DCD ||.data|| + |L16.40| + DCD 0x000008de + |L16.44| +00002c 486f6e6f DCB "Honor90Pro",0 +000030 72393050 +000034 726f00 +000037 00 DCB 0 + |L16.56| +000038 5b25735d DCB "[%s] (%04d) rx start\n",0 +00003c 20282530 +000040 34642920 +000044 72782073 +000048 74617274 +00004c 0a00 +00004e 00 DCB 0 +00004f 00 DCB 0 + + AREA ||i.app_mipi_tx_init||, CODE, READONLY, ALIGN=2 + + app_mipi_tx_init PROC +;;;2220 */ +;;;2221 static void app_mipi_tx_init(void) +000000 b510 PUSH {r4,lr} +;;;2222 { +;;;2223 if (g_tx_ctrl_handle == NULL) +000002 4c16 LDR r4,|L17.92| +000004 68e0 LDR r0,[r4,#0xc] ; g_tx_ctrl_handle +000006 2800 CMP r0,#0 +000008 d102 BNE |L17.16| +;;;2224 { +;;;2225 g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); +00000a f7fffffe BL hal_dsi_tx_ctrl_create_handle +00000e 60e0 STR r0,[r4,#0xc] ; g_tx_ctrl_handle + |L17.16| +;;;2226 } +;;;2227 g_tx_ctrl_handle->channel_id = OUTPUT_VC; +000010 4601 MOV r1,r0 +000012 2200 MOVS r2,#0 +000014 3120 ADDS r1,r1,#0x20 +000016 760a STRB r2,[r1,#0x18] +;;;2228 g_tx_ctrl_handle->lane_num = OUTPUT_LANE_NUMBER; +000018 2304 MOVS r3,#4 +00001a 750b STRB r3,[r1,#0x14] +;;;2229 g_tx_ctrl_handle->vid_mode = OUTPUT_VIDEO_MODEL; +00001c 2402 MOVS r4,#2 +00001e 764c STRB r4,[r1,#0x19] +;;;2230 g_tx_ctrl_handle->cmd_tx_type = TX_INIT_TYPE; +000020 2301 MOVS r3,#1 +000022 768b STRB r3,[r1,#0x1a] +;;;2231 g_tx_ctrl_handle->dpi_vsa = OUTPUT_VSA; +;;;2232 g_tx_ctrl_handle->dpi_vbp = OUTPUT_VBP; +000024 2108 MOVS r1,#8 +;;;2233 g_tx_ctrl_handle->dpi_vfp = OUTPUT_VFP; +000026 6183 STR r3,[r0,#0x18] +000028 61c1 STR r1,[r0,#0x1c] +;;;2234 g_tx_ctrl_handle->dpi_hsa = OUTPUT_HSA; +;;;2235 g_tx_ctrl_handle->dpi_hbp = OUTPUT_HBP; +00002a 6244 STR r4,[r0,#0x24] +00002c 2118 MOVS r1,#0x18 ;2233 +00002e 6201 STR r1,[r0,#0x20] +000030 2114 MOVS r1,#0x14 +;;;2236 g_tx_ctrl_handle->dpi_hfp = OUTPUT_HFP; +000032 6281 STR r1,[r0,#0x28] +;;;2237 g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; +000034 2499 MOVS r4,#0x99 +000036 00e4 LSLS r4,r4,#3 +000038 211e MOVS r1,#0x1e ;2236 +;;;2238 g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; +00003a 6004 STR r4,[r0,#0] +00003c 62c1 STR r1,[r0,#0x2c] +00003e 4908 LDR r1,|L17.96| +;;;2239 g_tx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; +;;;2240 g_tx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; +000040 6041 STR r1,[r0,#4] +;;;2241 g_tx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; +000042 6084 STR r4,[r0,#8] +000044 60c1 STR r1,[r0,#0xc] +000046 7402 STRB r2,[r0,#0x10] +;;;2242 g_tx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; +000048 7443 STRB r3,[r0,#0x11] +;;;2243 g_tx_ctrl_handle->base_info.dst_mode = OUTPUT_DATA_MODE; +00004a 7482 STRB r2,[r0,#0x12] +;;;2244 // g_tx_ctrl_handle->tx_frame_rate = 62; +;;;2245 /* 初始化屏时每一条LP CMD都退出LPDT 再进入发送下一条 */ +;;;2246 /* 解决FT8720 TDDI 显示翻转问题 */ +;;;2247 // g_tx_ctrl_handle->tx_lane_lp = ALWAYS_HS; +;;;2248 +;;;2249 hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); +00004c f7fffffe BL hal_dsi_tx_ctrl_init +;;;2250 +;;;2251 /* FIXME set tear on*/ +;;;2252 // hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_60HZ_MODE); +;;;2253 +;;;2254 /* AP 没有发送数据时默认的显示颜色, 量产为0 0 0(黑色), 配置其他颜色仅为debug使用 */ +;;;2255 hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); +000050 2200 MOVS r2,#0 +000052 4611 MOV r1,r2 +000054 4610 MOV r0,r2 +000056 f7fffffe BL hal_dsi_tx_ctrl_set_overwrite_rgb +;;;2256 } +00005a bd10 POP {r4,pc} +;;;2257 + ENDP + + |L17.92| + DCD ||.data|| + |L17.96| + DCD 0x00000a8c + + AREA ||i.app_mipi_tx_start||, CODE, READONLY, ALIGN=2 + + app_mipi_tx_start PROC +;;;2278 */ +;;;2279 static void app_mipi_tx_start(void) +000000 b510 PUSH {r4,lr} +;;;2280 { +;;;2281 /* Init panel */ +;;;2282 app_init_panel(); +000002 f7fffffe BL app_init_panel +;;;2283 /* TX start */ +;;;2284 hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); +000006 4c0e LDR r4,|L18.64| +000008 68e0 LDR r0,[r4,#0xc] ; g_tx_ctrl_handle +00000a f7fffffe BL hal_dsi_tx_ctrl_start +;;;2285 hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_60HZ_MODE); +00000e 2100 MOVS r1,#0 +000010 68e0 LDR r0,[r4,#0xc] ; g_tx_ctrl_handle +000012 f7fffffe BL hal_dsi_tx_ctrl_set_tear_mode +;;;2286 +;;;2287 panel_display_done = true; +000016 2001 MOVS r0,#1 +000018 7020 STRB r0,[r4,#0] +;;;2288 +;;;2289 delayMs(120); +00001a 2078 MOVS r0,#0x78 +00001c f7fffffe BL delayMs +;;;2290 /* Display on */ +;;;2291 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x29); +000020 2329 MOVS r3,#0x29 +000022 2202 MOVS r2,#2 +000024 2100 MOVS r1,#0 +000026 2005 MOVS r0,#5 +000028 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;2292 +;;;2293 #if (TX_USE_CMD_MODE & (!TX_CMD_MODE_WITHOUT_TE)) /* cmd mode输出,并且需要屏的TE输入 */ +;;;2294 // hal_dsi_tx_ctrl_gen_a_frame(); /* FIXME */ +;;;2295 app_tx_cmd_app_init_panel_te_int(IO_PIN_14, DETECT_RISING_EDGE); /* 注册屏端TE中断 */ +;;;2296 #endif +;;;2297 #if AP_SWIRE_OUTPUT +;;;2298 hal_swire_set_pulse(SWIRE_DEFAULT_PULSE); +00002c 2025 MOVS r0,#0x25 +00002e f7fffffe BL hal_swire_set_pulse +;;;2299 #endif +;;;2300 TAU_LOGD("tx_start \n"); +000032 4b04 LDR r3,|L18.68| +000034 4a04 LDR r2,|L18.72| +000036 a105 ADR r1,|L18.76| +000038 2000 MOVS r0,#0 +00003a f7fffffe BL tau_log_printf +;;;2301 } +00003e bd10 POP {r4,pc} +;;;2302 + ENDP + + |L18.64| + DCD ||.data|| + |L18.68| + DCD 0x000008fc + |L18.72| + DCD ||i.Note11Pro_demo||+0x5c + |L18.76| +00004c 5b25735d DCB "[%s] (%04d) tx_start \n",0 +000050 20282530 +000054 34642920 +000058 74785f73 +00005c 74617274 +000060 200a00 +000063 00 DCB 0 + + AREA ||i.app_system_suspend||, CODE, READONLY, ALIGN=2 + + app_system_suspend PROC +;;;2404 */ +;;;2405 static void app_system_suspend(pwr_sleep_mode_e sleep_mode) +000000 b538 PUSH {r3-r5,lr} +;;;2406 { +;;;2407 /* 关闭图像通路 */ +;;;2408 hal_dsi_tx_ctrl_stop(g_tx_ctrl_handle); +000002 4c21 LDR r4,|L19.136| +000004 4605 MOV r5,r0 ;2406 +000006 68e0 LDR r0,[r4,#0xc] ; g_tx_ctrl_handle +000008 f7fffffe BL hal_dsi_tx_ctrl_stop +;;;2409 hal_dsi_tx_ctrl_deinit(g_tx_ctrl_handle); +00000c 68e0 LDR r0,[r4,#0xc] ; g_tx_ctrl_handle +00000e f7fffffe BL hal_dsi_tx_ctrl_deinit +;;;2410 hal_dsi_rx_ctrl_stop(g_rx_ctrl_handle); +000012 68a0 LDR r0,[r4,#8] ; g_rx_ctrl_handle +000014 f7fffffe BL hal_dsi_rx_ctrl_stop +;;;2411 hal_dsi_rx_ctrl_deinit(g_rx_ctrl_handle); +000018 68a0 LDR r0,[r4,#8] ; g_rx_ctrl_handle +00001a f7fffffe BL hal_dsi_rx_ctrl_deinit +;;;2412 +;;;2413 /* Tear拉低 */ +;;;2414 hal_gpio_init_output(IO_PAD_AP_TE, IO_LVL_LOW); +00001e 2100 MOVS r1,#0 +000020 2003 MOVS r0,#3 +000022 f7fffffe BL hal_gpio_init_output +;;;2415 panel_display_done = false; +000026 2000 MOVS r0,#0 +000028 7020 STRB r0,[r4,#0] +;;;2416 #if RX_WAIT_TEAR_ON +;;;2417 sg_ap_set_tear_on = false; +;;;2418 #endif +;;;2419 +;;;2420 /* 关闭外设 比如Swire/I2C/Flash 等 */ +;;;2421 #if AP_SWIRE_OUTPUT +;;;2422 hal_swire_deinit(); +00002a f7fffffe BL hal_swire_deinit +;;;2423 #endif +;;;2424 #if ANALOG_PWM_OUTPUT +;;;2425 hal_pwm_deinit(); +;;;2426 #endif +;;;2427 +;;;2428 #if SHARE_FLASH_ENABLE +;;;2429 hal_flash_share_mode(false); +;;;2430 #endif +;;;2431 +;;;2432 /* 切换TP18 供电 */ +;;;2433 hal_pwr_set_sleep_mode_power(SLEEP_MODE_POWER); +00002e 2001 MOVS r0,#1 +000030 f7fffffe BL hal_pwr_set_sleep_mode_power +;;;2434 +;;;2435 if (sleep_mode == PWR_NORMAL_SLEEP_MODE) +000034 2d00 CMP r5,#0 +000036 d006 BEQ |L19.70| +;;;2436 { +;;;2437 /* normal sleep mode, MCU可以正常工作 */ +;;;2438 hal_gpio_set_ap_reset_int(ENABLE, ap_rstn_pull_high_cb, DETECT_HIGH_LVL); +;;;2439 hal_pwr_enter_normal_sleep_mode(); +;;;2440 } +;;;2441 else if (sleep_mode == PWR_STOP_SLEEP_MODE) +000038 2d01 CMP r5,#1 +00003a d00c BEQ |L19.86| +;;;2442 { +;;;2443 /* 注册对应 wakeup IO */ +;;;2444 hal_pwr_set_stop_sleep_wakeup_pin(IO_PAD_AP_RSTN, WUP_RISING_EDGE); +;;;2445 //hal_pwr_set_stop_sleep_wakeup_pin(IO_PAD_AP_SPIS_CSN, WUP_FALLING_EDGE); +;;;2446 //hal_pwr_set_stop_sleep_wakeup_pin(IO_PAD_TD_INT, WUP_FALLING_EDGE); +;;;2447 io_pad_e wakeup_io = hal_pwr_enter_stop_sleep_mode(); +;;;2448 if (wakeup_io == IO_PAD_AP_RSTN) +;;;2449 { +;;;2450 sg_system_resume = true; +;;;2451 } +;;;2452 else +;;;2453 { +;;;2454 /* Not impletmented */ +;;;2455 TAU_LOGD("wakeup_io %d FIXME touch wakeup convert to AP\n", wakeup_io); +;;;2456 hal_gpio_set_ap_reset_int(ENABLE, ap_rstn_pull_high_cb, DETECT_HIGH_LVL); +;;;2457 } +;;;2458 } +;;;2459 else +;;;2460 { +;;;2461 /* deep sleep mode,配置AP RSTN 上升沿,TD INT 下降沿唤醒 */ +;;;2462 hal_pwr_enter_deep_sleep_mode(WUP_RISING_EDGE, WUP_FALLING_EDGE); +00003c 2103 MOVS r1,#3 +00003e 2002 MOVS r0,#2 +000040 f7fffffe BL hal_pwr_enter_deep_sleep_mode +;;;2463 } +;;;2464 +;;;2465 } +000044 bd38 POP {r3-r5,pc} + |L19.70| +000046 2200 MOVS r2,#0 ;2438 +000048 4910 LDR r1,|L19.140| +00004a 2001 MOVS r0,#1 ;2438 +00004c f7fffffe BL hal_gpio_set_ap_reset_int +000050 f7fffffe BL hal_pwr_enter_normal_sleep_mode +000054 bd38 POP {r3-r5,pc} + |L19.86| +000056 2102 MOVS r1,#2 ;2444 +000058 2011 MOVS r0,#0x11 ;2444 +00005a f7fffffe BL hal_pwr_set_stop_sleep_wakeup_pin +00005e f7fffffe BL hal_pwr_enter_stop_sleep_mode +000062 2811 CMP r0,#0x11 ;2448 +000064 d00c BEQ |L19.128| +000066 9000 STR r0,[sp,#0] ;2455 +000068 4b09 LDR r3,|L19.144| +00006a a20a ADR r2,|L19.148| +00006c a10c ADR r1,|L19.160| +00006e 2000 MOVS r0,#0 ;2455 +000070 f7fffffe BL tau_log_printf +000074 2200 MOVS r2,#0 ;2456 +000076 4905 LDR r1,|L19.140| +000078 2001 MOVS r0,#1 ;2456 +00007a f7fffffe BL hal_gpio_set_ap_reset_int +00007e bd38 POP {r3-r5,pc} + |L19.128| +000080 2001 MOVS r0,#1 ;2450 +000082 7060 STRB r0,[r4,#1] ;2450 +000084 bd38 POP {r3-r5,pc} +;;;2466 + ENDP + +000086 0000 DCW 0x0000 + |L19.136| + DCD ||.data|| + |L19.140| + DCD ap_rstn_pull_high_cb + |L19.144| + DCD 0x00000997 + |L19.148| +000094 486f6e6f DCB "Honor90Pro",0 +000098 72393050 +00009c 726f00 +00009f 00 DCB 0 + |L19.160| +0000a0 5b25735d DCB "[%s] (%04d) wakeup_io %d FIXME touch wakeup convert to " +0000a4 20282530 +0000a8 34642920 +0000ac 77616b65 +0000b0 75705f69 +0000b4 6f202564 +0000b8 20464958 +0000bc 4d452074 +0000c0 6f756368 +0000c4 2077616b +0000c8 65757020 +0000cc 636f6e76 +0000d0 65727420 +0000d4 746f20 +0000d7 41500a00 DCB "AP\n",0 +0000db 00 DCB 0 + + AREA ||i.pps_update_handle||, CODE, READONLY, ALIGN=2 + + pps_update_handle PROC +;;;377 /* PPS update callback 用于分辨率切换case */ +;;;378 static bool pps_update_handle(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height) +000000 b5fe PUSH {r1-r7,lr} +;;;379 { +000002 461c MOV r4,r3 +000004 4615 MOV r5,r2 +;;;380 /* AVDD 上电, 用于解决息屏开屏PPS不更新问题 */ +;;;381 hal_gpio_set_output_data(IO_PAD_AP_PWMEN, IO_LVL_HIGH); +000006 2101 MOVS r1,#1 +000008 2008 MOVS r0,#8 +00000a f7fffffe BL hal_gpio_set_output_data +;;;382 if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) +00000e 4e10 LDR r6,|L20.80| +000010 68b0 LDR r0,[r6,#8] ; g_rx_ctrl_handle +000012 6801 LDR r1,[r0,#0] +000014 42a9 CMP r1,r5 +000016 d102 BNE |L20.30| +000018 6841 LDR r1,[r0,#4] +00001a 42a1 CMP r1,r4 +00001c d016 BEQ |L20.76| + |L20.30| +;;;383 { +;;;384 // hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_USER_MODE); +;;;385 /* PPS Update 且分辨率发生变化 */ +;;;386 g_rx_ctrl_handle->base_info.src_w = pic_width; +;;;387 g_rx_ctrl_handle->base_info.src_h = pic_height; +;;;388 /* 注意部分基板更新PPS前不发 Compression Mode Command的情况 */ +;;;389 g_rx_ctrl_handle->compress_en = true; //hal_dsi_rx_ctrl_get_compressen_en(g_rx_ctrl_handle); +00001e 6005 STR r5,[r0,#0] +000020 2201 MOVS r2,#1 +000022 2135 MOVS r1,#0x35 +000024 6044 STR r4,[r0,#4] +000026 540a STRB r2,[r1,r0] +;;;390 g_tx_ctrl_handle->base_info.src_w = pic_width; +000028 68f1 LDR r1,[r6,#0xc] ; g_tx_ctrl_handle +;;;391 g_tx_ctrl_handle->base_info.src_h = pic_height; +;;;392 +;;;393 hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); +00002a 600d STR r5,[r1,#0] +00002c 604c STR r4,[r1,#4] +00002e f7fffffe BL hal_dsi_rx_ctrl_toggle_resolution +;;;394 TAU_LOGD("resolution update w[%d] h[%d] compress[%d]\n", pic_width, pic_height, g_rx_ctrl_handle->compress_en); +000032 68b0 LDR r0,[r6,#8] ; g_rx_ctrl_handle +000034 23ff MOVS r3,#0xff +000036 3020 ADDS r0,r0,#0x20 +000038 7d40 LDRB r0,[r0,#0x15] +00003a 9002 STR r0,[sp,#8] +00003c 338b ADDS r3,r3,#0x8b +00003e a205 ADR r2,|L20.84| +000040 a107 ADR r1,|L20.96| +000042 9500 STR r5,[sp,#0] +000044 9401 STR r4,[sp,#4] +000046 2000 MOVS r0,#0 +000048 f7fffffe BL tau_log_printf + |L20.76| +;;;395 // hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_60HZ_MODE); +;;;396 } +;;;397 // TAU_LOGD("PPS Update[%d][%d] [%d][%d]\n", pic_width, pic_height, g_rx_ctrl_handle->base_info.src_w, g_rx_ctrl_handle->base_info.src_h); +;;;398 return true; +00004c 2001 MOVS r0,#1 +;;;399 } +00004e bdfe POP {r1-r7,pc} +;;;400 #endif + ENDP + + |L20.80| + DCD ||.data|| + |L20.84| +000054 486f6e6f DCB "Honor90Pro",0 +000058 72393050 +00005c 726f00 +00005f 00 DCB 0 + |L20.96| +000060 5b25735d DCB "[%s] (%04d) resolution update w[%d] h[%d] compress[%d]\n" +000064 20282530 +000068 34642920 +00006c 7265736f +000070 6c757469 +000074 6f6e2075 +000078 70646174 +00007c 6520775b +000080 25645d20 +000084 685b2564 +000088 5d20636f +00008c 6d707265 +000090 73735b25 +000094 645d0a +000097 00 DCB 0 + + AREA ||.constdata||, DATA, READONLY, ALIGN=2 + + g_cus_rx_dcs_execute_table + DCD 0x00000029 + DCD ap_dcs_set_display_on +000008 00000000 DCB 0x00,0x00,0x00,0x00 + DCD 0x00000028 + DCD ap_dcs_set_display_off +000014 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000060 + DCD ap_update_frame_rate +000020 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000051 + DCD ap_set_backlight +00002c 00000000 DCB 0x00,0x00,0x00,0x00 + DCD 0x00000010 + DCD ap_dcs_set_enter_sleep_mode +000038 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000011 + DCD ap_dcs_set_exit_sleep_mode +000044 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000000 + DCD 0x00000000 +000050 00000000 DCB 0x00,0x00,0x00,0x00 + panel_init_code +000054 390006f0 DCB 0x39,0x00,0x06,0xf0 +000058 55aa5208 DCB 0x55,0xaa,0x52,0x08 +00005c 00390002 DCB 0x00,0x39,0x00,0x02 +000060 6f013900 DCB 0x6f,0x01,0x39,0x00 +000064 03b904c8 DCB 0x03,0xb9,0x04,0xc8 +000068 390003bd DCB 0x39,0x00,0x03,0xbd +00006c 0a8c3900 DCB 0x0a,0x8c,0x39,0x00 +000070 08ba005e DCB 0x08,0xba,0x00,0x5e +000074 00100ad4 DCB 0x00,0x10,0x0a,0xd4 +000078 10390002 DCB 0x10,0x39,0x00,0x02 +00007c 6f073900 DCB 0x6f,0x07,0x39,0x00 +000080 08ba005e DCB 0x08,0xba,0x00,0x5e +000084 00100024 DCB 0x00,0x10,0x00,0x24 +000088 10390002 DCB 0x10,0x39,0x00,0x02 +00008c 6f0e3900 DCB 0x6f,0x0e,0x39,0x00 +000090 08ba005e DCB 0x08,0xba,0x00,0x5e +000094 001003bc DCB 0x00,0x10,0x03,0xbc +000098 10390008 DCB 0x10,0x39,0x00,0x08 +00009c bb005e00 DCB 0xbb,0x00,0x5e,0x00 +0000a0 10002470 DCB 0x10,0x00,0x24,0x70 +0000a4 390004be DCB 0x39,0x00,0x04,0xbe +0000a8 474a4639 DCB 0x47,0x4a,0x46,0x39 +0000ac 000bc100 DCB 0x00,0x0b,0xc1,0x00 +0000b0 5e005e00 DCB 0x5e,0x00,0x5e,0x00 +0000b4 5e005e00 DCB 0x5e,0x00,0x5e,0x00 +0000b8 5e390011 DCB 0x5e,0x39,0x00,0x11 +0000bc c6444444 DCB 0xc6,0x44,0x44,0x44 +0000c0 44777777 DCB 0x44,0x77,0x77,0x77 +0000c4 77777777 DCB 0x77,0x77,0x77,0x77 +0000c8 77777777 DCB 0x77,0x77,0x77,0x77 +0000cc 77390002 DCB 0x77,0x39,0x00,0x02 +0000d0 c86e3900 DCB 0xc8,0x6e,0x39,0x00 +0000d4 026f2c39 DCB 0x02,0x6f,0x2c,0x39 +0000d8 0002cb43 DCB 0x00,0x02,0xcb,0x43 +0000dc 390003b2 DCB 0x39,0x00,0x03,0xb2 +0000e0 01403900 DCB 0x01,0x40,0x39,0x00 +0000e4 026f0439 DCB 0x02,0x6f,0x04,0x39 +0000e8 0002b222 DCB 0x00,0x02,0xb2,0x22 +0000ec 3900026f DCB 0x39,0x00,0x02,0x6f +0000f0 05390003 DCB 0x05,0x39,0x00,0x03 +0000f4 b2404039 DCB 0xb2,0x40,0x40,0x39 +0000f8 00026f11 DCB 0x00,0x02,0x6f,0x11 +0000fc 390004b2 DCB 0x39,0x00,0x04,0xb2 +000100 1f0f1739 DCB 0x1f,0x0f,0x17,0x39 +000104 00026f15 DCB 0x00,0x02,0x6f,0x15 +000108 390002b2 DCB 0x39,0x00,0x02,0xb2 +00010c 03390002 DCB 0x03,0x39,0x00,0x02 +000110 6f183900 DCB 0x6f,0x18,0x39,0x00 +000114 05b21420 DCB 0x05,0xb2,0x14,0x20 +000118 0fff3900 DCB 0x0f,0xff,0x39,0x00 +00011c 1fb30001 DCB 0x1f,0xb3,0x00,0x01 +000120 00da00da DCB 0x00,0xda,0x00,0xda +000124 016c016c DCB 0x01,0x6c,0x01,0x6c +000128 022d022d DCB 0x02,0x2d,0x02,0x2d +00012c 03700370 DCB 0x03,0x70,0x03,0x70 +000130 05080508 DCB 0x05,0x08,0x05,0x08 +000134 05090509 DCB 0x05,0x09,0x05,0x09 +000138 050a050a DCB 0x05,0x0a,0x05,0x0a +00013c 3900026f DCB 0x39,0x00,0x02,0x6f +000140 1e39000f DCB 0x1e,0x39,0x00,0x0f +000144 b3069606 DCB 0xb3,0x06,0x96,0x06 +000148 960ac90a DCB 0x96,0x0a,0xc9,0x0a +00014c c90dbb0d DCB 0xc9,0x0d,0xbb,0x0d +000150 bb0fff39 DCB 0xbb,0x0f,0xff,0x39 +000154 00026f2c DCB 0x00,0x02,0x6f,0x2c +000158 390009b3 DCB 0x39,0x00,0x09,0xb3 +00015c 015507ff DCB 0x01,0x55,0x07,0xff +000160 07ff0fff DCB 0x07,0xff,0x0f,0xff +000164 39001fb4 DCB 0x39,0x00,0x1f,0xb4 +000168 15701420 DCB 0x15,0x70,0x14,0x20 +00016c 13801380 DCB 0x13,0x80,0x13,0x80 +000170 12801280 DCB 0x12,0x80,0x12,0x80 +000174 10801080 DCB 0x10,0x80,0x10,0x80 +000178 0b600b60 DCB 0x0b,0x60,0x0b,0x60 +00017c 02400240 DCB 0x02,0x40,0x02,0x40 +000180 00200020 DCB 0x00,0x20,0x00,0x20 +000184 00203900 DCB 0x00,0x20,0x39,0x00 +000188 026f1e39 DCB 0x02,0x6f,0x1e,0x39 +00018c 0011b400 DCB 0x00,0x11,0xb4,0x00 +000190 20002000 DCB 0x20,0x00,0x20,0x00 +000194 20002000 DCB 0x20,0x00,0x20,0x00 +000198 20002000 DCB 0x20,0x00,0x20,0x00 +00019c 20002039 DCB 0x20,0x00,0x20,0x39 +0001a0 00026f2e DCB 0x00,0x02,0x6f,0x2e +0001a4 39001fb4 DCB 0x39,0x00,0x1f,0xb4 +0001a8 0ac00a10 DCB 0x0a,0xc0,0x0a,0x10 +0001ac 09c009c0 DCB 0x09,0xc0,0x09,0xc0 +0001b0 09400940 DCB 0x09,0x40,0x09,0x40 +0001b4 08300830 DCB 0x08,0x30,0x08,0x30 +0001b8 05a005a0 DCB 0x05,0xa0,0x05,0xa0 +0001bc 01000100 DCB 0x01,0x00,0x01,0x00 +0001c0 00100010 DCB 0x00,0x10,0x00,0x10 +0001c4 00103900 DCB 0x00,0x10,0x39,0x00 +0001c8 026f4c39 DCB 0x02,0x6f,0x4c,0x39 +0001cc 0011b400 DCB 0x00,0x11,0xb4,0x00 +0001d0 10001000 DCB 0x10,0x00,0x10,0x00 +0001d4 10001000 DCB 0x10,0x00,0x10,0x00 +0001d8 10001000 DCB 0x10,0x00,0x10,0x00 +0001dc 10001039 DCB 0x10,0x00,0x10,0x39 +0001e0 00026f5c DCB 0x00,0x02,0x6f,0x5c +0001e4 39001fb4 DCB 0x39,0x00,0x1f,0xb4 +0001e8 0e580d68 DCB 0x0e,0x58,0x0d,0x68 +0001ec 0d080d08 DCB 0x0d,0x08,0x0d,0x08 +0001f0 0c600c60 DCB 0x0c,0x60,0x0c,0x60 +0001f4 0af80af8 DCB 0x0a,0xf8,0x0a,0xf8 +0001f8 07980798 DCB 0x07,0x98,0x07,0x98 +0001fc 01800180 DCB 0x01,0x80,0x01,0x80 +000200 00180018 DCB 0x00,0x18,0x00,0x18 +000204 00183900 DCB 0x00,0x18,0x39,0x00 +000208 026f4c39 DCB 0x02,0x6f,0x4c,0x39 +00020c 0011b400 DCB 0x00,0x11,0xb4,0x00 +000210 18001800 DCB 0x18,0x00,0x18,0x00 +000214 18001800 DCB 0x18,0x00,0x18,0x00 +000218 18001800 DCB 0x18,0x00,0x18,0x00 +00021c 18001839 DCB 0x18,0x00,0x18,0x39 +000220 00026fb8 DCB 0x00,0x02,0x6f,0xb8 +000224 39000bb4 DCB 0x39,0x00,0x0b,0xb4 +000228 0ac00040 DCB 0x0a,0xc0,0x00,0x40 +00022c 00400040 DCB 0x00,0x40,0x00,0x40 +000230 00403900 DCB 0x00,0x40,0x39,0x00 +000234 02c00439 DCB 0x02,0xc0,0x04,0x39 +000238 00026f02 DCB 0x00,0x02,0x6f,0x02 +00023c 390002c0 DCB 0x39,0x00,0x02,0xc0 +000240 08390002 DCB 0x08,0x39,0x00,0x02 +000244 6f033900 DCB 0x6f,0x03,0x39,0x00 +000248 03c02122 DCB 0x03,0xc0,0x21,0x22 +00024c 3900026f DCB 0x39,0x00,0x02,0x6f +000250 05390003 DCB 0x05,0x39,0x00,0x03 +000254 c0333339 DCB 0xc0,0x33,0x33,0x39 +000258 00026f0b DCB 0x00,0x02,0x6f,0x0b +00025c 39000bc0 DCB 0x39,0x00,0x0b,0xc0 +000260 e4000000 DCB 0xe4,0x00,0x00,0x00 +000264 00000000 DCB 0x00,0x00,0x00,0x00 +000268 00003900 DCB 0x00,0x00,0x39,0x00 +00026c 02b58639 DCB 0x02,0xb5,0x86,0x39 +000270 00026f06 DCB 0x00,0x02,0x6f,0x06 +000274 390002b5 DCB 0x39,0x00,0x02,0xb5 +000278 7f390002 DCB 0x7f,0x39,0x00,0x02 +00027c 6f073900 DCB 0x6f,0x07,0x39,0x00 +000280 04b54b21 DCB 0x04,0xb5,0x4b,0x21 +000284 4f390002 DCB 0x4f,0x39,0x00,0x02 +000288 6f0c3900 DCB 0x6f,0x0c,0x39,0x00 +00028c 04b54b29 DCB 0x04,0xb5,0x4b,0x29 +000290 00390002 DCB 0x00,0x39,0x00,0x02 +000294 6f113900 DCB 0x6f,0x11,0x39,0x00 +000298 06b52121 DCB 0x06,0xb5,0x21,0x21 +00029c 21212139 DCB 0x21,0x21,0x21,0x39 +0002a0 00026f02 DCB 0x00,0x02,0x6f,0x02 +0002a4 39000eb6 DCB 0x39,0x00,0x0e,0xb6 +0002a8 2e2e2e2e DCB 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0x00,0x00,0x00,0x00 +000c0c 00000000 DCB 0x00,0x00,0x00,0x00 +000c10 00003900 DCB 0x00,0x00,0x39,0x00 +000c14 026f9039 DCB 0x02,0x6f,0x90,0x39 +000c18 0019c500 DCB 0x00,0x19,0xc5,0x00 +000c1c 00000000 DCB 0x00,0x00,0x00,0x00 +000c20 00000000 DCB 0x00,0x00,0x00,0x00 +000c24 00000000 DCB 0x00,0x00,0x00,0x00 +000c28 00000000 DCB 0x00,0x00,0x00,0x00 +000c2c 00000000 DCB 0x00,0x00,0x00,0x00 +000c30 00000039 DCB 0x00,0x00,0x00,0x39 +000c34 00026fa8 DCB 0x00,0x02,0x6f,0xa8 +000c38 390019c5 DCB 0x39,0x00,0x19,0xc5 +000c3c 00000000 DCB 0x00,0x00,0x00,0x00 +000c40 00040000 DCB 0x00,0x04,0x00,0x00 +000c44 00000000 DCB 0x00,0x00,0x00,0x00 +000c48 00000000 DCB 0x00,0x00,0x00,0x00 +000c4c 00000000 DCB 0x00,0x00,0x00,0x00 +000c50 00000000 DCB 0x00,0x00,0x00,0x00 +000c54 3900026f DCB 0x39,0x00,0x02,0x6f +000c58 c0390019 DCB 0xc0,0x39,0x00,0x19 +000c5c c5000000 DCB 0xc5,0x00,0x00,0x00 +000c60 00000000 DCB 0x00,0x00,0x00,0x00 +000c64 00000000 DCB 0x00,0x00,0x00,0x00 +000c68 00000000 DCB 0x00,0x00,0x00,0x00 +000c6c 00000400 DCB 0x00,0x00,0x04,0x00 +000c70 00000000 DCB 0x00,0x00,0x00,0x00 +000c74 00390002 DCB 0x00,0x39,0x00,0x02 +000c78 6fd83900 DCB 0x6f,0xd8,0x39,0x00 +000c7c 19c50000 DCB 0x19,0xc5,0x00,0x00 +000c80 00000000 DCB 0x00,0x00,0x00,0x00 +000c84 00000000 DCB 0x00,0x00,0x00,0x00 +000c88 00000000 DCB 0x00,0x00,0x00,0x00 +000c8c 00000004 DCB 0x00,0x00,0x00,0x04 +000c90 00000000 DCB 0x00,0x00,0x00,0x00 +000c94 00003900 DCB 0x00,0x00,0x39,0x00 +000c98 026ff039 DCB 0x02,0x6f,0xf0,0x39 +000c9c 000dc500 DCB 0x00,0x0d,0xc5,0x00 +000ca0 00000000 DCB 0x00,0x00,0x00,0x00 +000ca4 00000000 DCB 0x00,0x00,0x00,0x00 +000ca8 00000439 DCB 0x00,0x00,0x04,0x39 +000cac 0019c600 DCB 0x00,0x19,0xc6,0x00 +000cb0 00000000 DCB 0x00,0x00,0x00,0x00 +000cb4 00000000 DCB 0x00,0x00,0x00,0x00 +000cb8 00000000 DCB 0x00,0x00,0x00,0x00 +000cbc 00000000 DCB 0x00,0x00,0x00,0x00 +000cc0 04000000 DCB 0x04,0x00,0x00,0x00 +000cc4 00000039 DCB 0x00,0x00,0x00,0x39 +000cc8 00026f18 DCB 0x00,0x02,0x6f,0x18 +000ccc 390019c6 DCB 0x39,0x00,0x19,0xc6 +000cd0 00000000 DCB 0x00,0x00,0x00,0x00 +000cd4 00000000 DCB 0x00,0x00,0x00,0x00 +000cd8 00000004 DCB 0x00,0x00,0x00,0x04 +000cdc 00000000 DCB 0x00,0x00,0x00,0x00 +000ce0 00000000 DCB 0x00,0x00,0x00,0x00 +000ce4 00000000 DCB 0x00,0x00,0x00,0x00 +000ce8 3900026f DCB 0x39,0x00,0x02,0x6f +000cec 30390019 DCB 0x30,0x39,0x00,0x19 +000cf0 c6000000 DCB 0xc6,0x00,0x00,0x00 +000cf4 00000400 DCB 0x00,0x00,0x04,0x00 +000cf8 00000000 DCB 0x00,0x00,0x00,0x00 +000cfc 00000000 DCB 0x00,0x00,0x00,0x00 +000d00 00000400 DCB 0x00,0x00,0x04,0x00 +000d04 00000000 DCB 0x00,0x00,0x00,0x00 +000d08 00390002 DCB 0x00,0x39,0x00,0x02 +000d0c 6f483900 DCB 0x6f,0x48,0x39,0x00 +000d10 19c60000 DCB 0x19,0xc6,0x00,0x00 +000d14 00000004 DCB 0x00,0x00,0x00,0x04 +000d18 00000000 DCB 0x00,0x00,0x00,0x00 +000d1c 00000000 DCB 0x00,0x00,0x00,0x00 +000d20 00000004 DCB 0x00,0x00,0x00,0x04 +000d24 00000000 DCB 0x00,0x00,0x00,0x00 +000d28 00003900 DCB 0x00,0x00,0x39,0x00 +000d2c 026f6039 DCB 0x02,0x6f,0x60,0x39 +000d30 0019c600 DCB 0x00,0x19,0xc6,0x00 +000d34 00000000 DCB 0x00,0x00,0x00,0x00 +000d38 04000000 DCB 0x04,0x00,0x00,0x00 +000d3c 00000000 DCB 0x00,0x00,0x00,0x00 +000d40 00000000 DCB 0x00,0x00,0x00,0x00 +000d44 04000000 DCB 0x04,0x00,0x00,0x00 +000d48 00000039 DCB 0x00,0x00,0x00,0x39 +000d4c 00026f78 DCB 0x00,0x02,0x6f,0x78 +000d50 390019c6 DCB 0x39,0x00,0x19,0xc6 +000d54 00000000 DCB 0x00,0x00,0x00,0x00 +000d58 00040000 DCB 0x00,0x04,0x00,0x00 +000d5c 00000000 DCB 0x00,0x00,0x00,0x00 +000d60 00000000 DCB 0x00,0x00,0x00,0x00 +000d64 00040000 DCB 0x00,0x04,0x00,0x00 +000d68 00000004 DCB 0x00,0x00,0x00,0x04 +000d6c 3900026f DCB 0x39,0x00,0x02,0x6f +000d70 90390019 DCB 0x90,0x39,0x00,0x19 +000d74 c6000000 DCB 0xc6,0x00,0x00,0x00 +000d78 00000000 DCB 0x00,0x00,0x00,0x00 +000d7c 00000000 DCB 0x00,0x00,0x00,0x00 +000d80 04000000 DCB 0x04,0x00,0x00,0x00 +000d84 00000400 DCB 0x00,0x00,0x04,0x00 +000d88 00000000 DCB 0x00,0x00,0x00,0x00 +000d8c 04390002 DCB 0x04,0x39,0x00,0x02 +000d90 6fa83900 DCB 0x6f,0xa8,0x39,0x00 +000d94 19c60000 DCB 0x19,0xc6,0x00,0x00 +000d98 00000000 DCB 0x00,0x00,0x00,0x00 +000d9c 00000000 DCB 0x00,0x00,0x00,0x00 +000da0 00040000 DCB 0x00,0x04,0x00,0x00 +000da4 00000004 DCB 0x00,0x00,0x00,0x04 +000da8 00000000 DCB 0x00,0x00,0x00,0x00 +000dac 00043900 DCB 0x00,0x04,0x39,0x00 +000db0 026fc039 DCB 0x02,0x6f,0xc0,0x39 +000db4 0019c600 DCB 0x00,0x19,0xc6,0x00 +000db8 00000000 DCB 0x00,0x00,0x00,0x00 +000dbc 00000000 DCB 0x00,0x00,0x00,0x00 +000dc0 00000400 DCB 0x00,0x00,0x04,0x00 +000dc4 00000000 DCB 0x00,0x00,0x00,0x00 +000dc8 04000000 DCB 0x04,0x00,0x00,0x00 +000dcc 00000439 DCB 0x00,0x00,0x04,0x39 +000dd0 00026fd8 DCB 0x00,0x02,0x6f,0xd8 +000dd4 390019c6 DCB 0x39,0x00,0x19,0xc6 +000dd8 00000000 DCB 0x00,0x00,0x00,0x00 +000ddc 00040000 DCB 0x00,0x04,0x00,0x00 +000de0 00000004 DCB 0x00,0x00,0x00,0x04 +000de4 00000000 DCB 0x00,0x00,0x00,0x00 +000de8 00040000 DCB 0x00,0x04,0x00,0x00 +000dec 00000004 DCB 0x00,0x00,0x00,0x04 +000df0 3900026f DCB 0x39,0x00,0x02,0x6f +000df4 f039000d DCB 0xf0,0x39,0x00,0x0d +000df8 c6000000 DCB 0xc6,0x00,0x00,0x00 +000dfc 00000400 DCB 0x00,0x00,0x04,0x00 +000e00 00000000 DCB 0x00,0x00,0x00,0x00 +000e04 04390019 DCB 0x04,0x39,0x00,0x19 +000e08 c7000000 DCB 0xc7,0x00,0x00,0x00 +000e0c 00000400 DCB 0x00,0x00,0x04,0x00 +000e10 00000000 DCB 0x00,0x00,0x00,0x00 +000e14 04000000 DCB 0x04,0x00,0x00,0x00 +000e18 00000400 DCB 0x00,0x00,0x04,0x00 +000e1c 00000000 DCB 0x00,0x00,0x00,0x00 +000e20 04390002 DCB 0x04,0x39,0x00,0x02 +000e24 6f183900 DCB 0x6f,0x18,0x39,0x00 +000e28 19c70000 DCB 0x19,0xc7,0x00,0x00 +000e2c 00000008 DCB 0x00,0x00,0x00,0x08 +000e30 00000000 DCB 0x00,0x00,0x00,0x00 +000e34 00040000 DCB 0x00,0x04,0x00,0x00 +000e38 00000004 DCB 0x00,0x00,0x00,0x04 +000e3c 00000000 DCB 0x00,0x00,0x00,0x00 +000e40 00083900 DCB 0x00,0x08,0x39,0x00 +000e44 026f3039 DCB 0x02,0x6f,0x30,0x39 +000e48 0019c700 DCB 0x00,0x19,0xc7,0x00 +000e4c 00000000 DCB 0x00,0x00,0x00,0x00 +000e50 04000000 DCB 0x04,0x00,0x00,0x00 +000e54 00000400 DCB 0x00,0x00,0x04,0x00 +000e58 00000000 DCB 0x00,0x00,0x00,0x00 +000e5c 08000000 DCB 0x08,0x00,0x00,0x00 +000e60 00000439 DCB 0x00,0x00,0x04,0x39 +000e64 00026f48 DCB 0x00,0x02,0x6f,0x48 +000e68 390019c7 DCB 0x39,0x00,0x19,0xc7 +000e6c 00000000 DCB 0x00,0x00,0x00,0x00 +000e70 00080000 DCB 0x00,0x08,0x00,0x00 +000e74 00000008 DCB 0x00,0x00,0x00,0x08 +000e78 00000000 DCB 0x00,0x00,0x00,0x00 +000e7c 00080000 DCB 0x00,0x08,0x00,0x00 +000e80 00000008 DCB 0x00,0x00,0x00,0x08 +000e84 3900026f DCB 0x39,0x00,0x02,0x6f +000e88 60390019 DCB 0x60,0x39,0x00,0x19 +000e8c c7000000 DCB 0xc7,0x00,0x00,0x00 +000e90 00000800 DCB 0x00,0x00,0x08,0x00 +000e94 00000000 DCB 0x00,0x00,0x00,0x00 +000e98 08000000 DCB 0x08,0x00,0x00,0x00 +000e9c 00000800 DCB 0x00,0x00,0x08,0x00 +000ea0 00000000 DCB 0x00,0x00,0x00,0x00 +000ea4 0c390002 DCB 0x0c,0x39,0x00,0x02 +000ea8 6f783900 DCB 0x6f,0x78,0x39,0x00 +000eac 19c70000 DCB 0x19,0xc7,0x00,0x00 +000eb0 0000000c DCB 0x00,0x00,0x00,0x0c +000eb4 00000000 DCB 0x00,0x00,0x00,0x00 +000eb8 000c0000 DCB 0x00,0x0c,0x00,0x00 +000ebc 0000000c DCB 0x00,0x00,0x00,0x0c +000ec0 00000000 DCB 0x00,0x00,0x00,0x00 +000ec4 00103900 DCB 0x00,0x10,0x39,0x00 +000ec8 026f9039 DCB 0x02,0x6f,0x90,0x39 +000ecc 0007c700 DCB 0x00,0x07,0xc7,0x00 +000ed0 00000000 DCB 0x00,0x00,0x00,0x00 +000ed4 18390019 DCB 0x18,0x39,0x00,0x19 +000ed8 cc000000 DCB 0xcc,0x00,0x00,0x00 +000edc cba99000 DCB 0xcb,0xa9,0x90,0x00 +000ee0 00000050 DCB 0x00,0x00,0x00,0x50 +000ee4 2c000000 DCB 0x2c,0x00,0x00,0x00 +000ee8 00202700 DCB 0x00,0x20,0x27,0x00 +000eec 00000000 DCB 0x00,0x00,0x00,0x00 +000ef0 00390002 DCB 0x00,0x39,0x00,0x02 +000ef4 6f183900 DCB 0x6f,0x18,0x39,0x00 +000ef8 19cc0000 DCB 0x19,0xcc,0x00,0x00 +000efc 00000018 DCB 0x00,0x00,0x00,0x18 +000f00 00000000 DCB 0x00,0x00,0x00,0x00 +000f04 00100000 DCB 0x00,0x10,0x00,0x00 +000f08 0000000c DCB 0x00,0x00,0x00,0x0c +000f0c 00000000 DCB 0x00,0x00,0x00,0x00 +000f10 000c3900 DCB 0x00,0x0c,0x39,0x00 +000f14 026f3039 DCB 0x02,0x6f,0x30,0x39 +000f18 0019cc00 DCB 0x00,0x19,0xcc,0x00 +000f1c 00000000 DCB 0x00,0x00,0x00,0x00 +000f20 0c000000 DCB 0x0c,0x00,0x00,0x00 +000f24 00000c00 DCB 0x00,0x00,0x0c,0x00 +000f28 00000000 DCB 0x00,0x00,0x00,0x00 +000f2c 08000000 DCB 0x08,0x00,0x00,0x00 +000f30 00000839 DCB 0x00,0x00,0x08,0x39 +000f34 00026f48 DCB 0x00,0x02,0x6f,0x48 +000f38 390019cc DCB 0x39,0x00,0x19,0xcc +000f3c 00000000 DCB 0x00,0x00,0x00,0x00 +000f40 00080000 DCB 0x00,0x08,0x00,0x00 +000f44 00000008 DCB 0x00,0x00,0x00,0x08 +000f48 00000000 DCB 0x00,0x00,0x00,0x00 +000f4c 00080000 DCB 0x00,0x08,0x00,0x00 +000f50 00000008 DCB 0x00,0x00,0x00,0x08 +000f54 3900026f DCB 0x39,0x00,0x02,0x6f +000f58 60390019 DCB 0x60,0x39,0x00,0x19 +000f5c cc000000 DCB 0xcc,0x00,0x00,0x00 +000f60 00000800 DCB 0x00,0x00,0x08,0x00 +000f64 00000000 DCB 0x00,0x00,0x00,0x00 +000f68 04000000 DCB 0x04,0x00,0x00,0x00 +000f6c 00000800 DCB 0x00,0x00,0x08,0x00 +000f70 00000000 DCB 0x00,0x00,0x00,0x00 +000f74 04390002 DCB 0x04,0x39,0x00,0x02 +000f78 6f783900 DCB 0x6f,0x78,0x39,0x00 +000f7c 19cc0000 DCB 0x19,0xcc,0x00,0x00 +000f80 00000004 DCB 0x00,0x00,0x00,0x04 +000f84 00000000 DCB 0x00,0x00,0x00,0x00 +000f88 00080000 DCB 0x00,0x08,0x00,0x00 +000f8c 00000004 DCB 0x00,0x00,0x00,0x04 +000f90 00000000 DCB 0x00,0x00,0x00,0x00 +000f94 00043900 DCB 0x00,0x04,0x39,0x00 +000f98 026f9039 DCB 0x02,0x6f,0x90,0x39 +000f9c 0019cc00 DCB 0x00,0x19,0xcc,0x00 +000fa0 00000000 DCB 0x00,0x00,0x00,0x00 +000fa4 08000000 DCB 0x08,0x00,0x00,0x00 +000fa8 00000400 DCB 0x00,0x00,0x04,0x00 +000fac 00000000 DCB 0x00,0x00,0x00,0x00 +000fb0 04000000 DCB 0x04,0x00,0x00,0x00 +000fb4 00000439 DCB 0x00,0x00,0x04,0x39 +000fb8 00026fa8 DCB 0x00,0x02,0x6f,0xa8 +000fbc 390019cc DCB 0x39,0x00,0x19,0xcc +000fc0 00000000 DCB 0x00,0x00,0x00,0x00 +000fc4 00040000 DCB 0x00,0x04,0x00,0x00 +000fc8 00000004 DCB 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0x11,0xc7,0x00,0x00 +001aac 00000000 DCB 0x00,0x00,0x00,0x00 +001ab0 00000079 DCB 0x00,0x00,0x00,0x79 +001ab4 40404040 DCB 0x40,0x40,0x40,0x40 +001ab8 40403900 DCB 0x40,0x40,0x39,0x00 +001abc 026f0039 DCB 0x02,0x6f,0x00,0x39 +001ac0 0016c82c DCB 0x00,0x16,0xc8,0x2c +001ac4 0004c90d DCB 0x00,0x04,0xc9,0x0d +001ac8 9910223f DCB 0x99,0x10,0x22,0x3f +001acc f96ba000 DCB 0xf9,0x6b,0xa0,0x00 +001ad0 0573a080 DCB 0x05,0x73,0xa0,0x80 +001ad4 00000000 DCB 0x00,0x00,0x00,0x00 +001ad8 3900026f DCB 0x39,0x00,0x02,0x6f +001adc 15390011 DCB 0x15,0x39,0x00,0x11 +001ae0 c8040022 DCB 0xc8,0x04,0x00,0x22 +001ae4 97aa688b DCB 0x97,0xaa,0x68,0x8b +001ae8 33c0dd75 DCB 0x33,0xc0,0xdd,0x75 +001aec 00000000 DCB 0x00,0x00,0x00,0x00 +001af0 00390002 DCB 0x00,0x39,0x00,0x02 +001af4 6f253900 DCB 0x6f,0x25,0x39,0x00 +001af8 11c80000 DCB 0x11,0xc8,0x00,0x00 +001afc 00000000 DCB 0x00,0x00,0x00,0x00 +001b00 00000004 DCB 0x00,0x00,0x00,0x04 +001b04 40404040 DCB 0x40,0x40,0x40,0x40 +001b08 40403900 DCB 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0x39,0x00,0x02,0x6f +001bcc 15390011 DCB 0x15,0x39,0x00,0x11 +001bd0 cb7944a6 DCB 0xcb,0x79,0x44,0xa6 +001bd4 c79aee67 DCB 0xc7,0x9a,0xee,0x67 +001bd8 330f7921 DCB 0x33,0x0f,0x79,0x21 +001bdc f0670000 DCB 0xf0,0x67,0x00,0x00 +001be0 00390002 DCB 0x00,0x39,0x00,0x02 +001be4 6f253900 DCB 0x6f,0x25,0x39,0x00 +001be8 11cb0000 DCB 0x11,0xcb,0x00,0x00 +001bec 00000000 DCB 0x00,0x00,0x00,0x00 +001bf0 00000079 DCB 0x00,0x00,0x00,0x79 +001bf4 40404040 DCB 0x40,0x40,0x40,0x40 +001bf8 40403900 DCB 0x40,0x40,0x39,0x00 +001bfc 026f0039 DCB 0x02,0x6f,0x00,0x39 +001c00 0016cc2a DCB 0x00,0x16,0xcc,0x2a +001c04 0f04c90d DCB 0x0f,0x04,0xc9,0x0d +001c08 99efde00 DCB 0x99,0xef,0xde,0x00 +001c0c 0234a600 DCB 0x02,0x34,0xa6,0x00 +001c10 0cd32a7f DCB 0x0c,0xd3,0x2a,0x7f +001c14 fdfe1021 DCB 0xfd,0xfe,0x10,0x21 +001c18 3900026f DCB 0x39,0x00,0x02,0x6f +001c1c 15390011 DCB 0x15,0x39,0x00,0x11 +001c20 cc044430 DCB 0xcc,0x04,0x44,0x30 +001c24 a5aa688b DCB 0xa5,0xaa,0x68,0x8b +001c28 330f2375 DCB 0x33,0x0f,0x23,0x75 +001c2c f0010000 DCB 0xf0,0x01,0x00,0x00 +001c30 00390002 DCB 0x00,0x39,0x00,0x02 +001c34 6f253900 DCB 0x6f,0x25,0x39,0x00 +001c38 11cc0000 DCB 0x11,0xcc,0x00,0x00 +001c3c 00000000 DCB 0x00,0x00,0x00,0x00 +001c40 00000004 DCB 0x00,0x00,0x00,0x04 +001c44 40404040 DCB 0x40,0x40,0x40,0x40 +001c48 40403900 DCB 0x40,0x40,0x39,0x00 +001c4c 026f0039 DCB 0x02,0x6f,0x00,0x39 +001c50 0016cd21 DCB 0x00,0x16,0xcd,0x21 +001c54 0021c921 DCB 0x00,0x21,0xc9,0x21 +001c58 c900003f DCB 0xc9,0x00,0x00,0x3f +001c5c e773f63f DCB 0xe7,0x73,0xf6,0x3f +001c60 e773f680 DCB 0xe7,0x73,0xf6,0x80 +001c64 04a6cb77 DCB 0x04,0xa6,0xcb,0x77 +001c68 3900026f DCB 0x39,0x00,0x02,0x6f +001c6c 15390011 DCB 0x15,0x39,0x00,0x11 +001c70 cd1b2205 DCB 0xcd,0x1b,0x22,0x05 +001c74 63990b69 DCB 0x63,0x99,0x0b,0x69 +001c78 77f0a3a3 DCB 0x77,0xf0,0xa3,0xa3 +001c7c 21c9f0ff DCB 0x21,0xc9,0xf0,0xff +001c80 ff390002 DCB 0xff,0x39,0x00,0x02 +001c84 6f253900 DCB 0x6f,0x25,0x39,0x00 +001c88 11cd0000 DCB 0x11,0xcd,0x00,0x00 +001c8c 00000000 DCB 0x00,0x00,0x00,0x00 +001c90 0000001b DCB 0x00,0x00,0x00,0x1b +001c94 40404040 DCB 0x40,0x40,0x40,0x40 +001c98 40403900 DCB 0x40,0x40,0x39,0x00 +001c9c 026f0039 DCB 0x02,0x6f,0x00,0x39 +001ca0 0016ce27 DCB 0x00,0x16,0xce,0x27 +001ca4 0021c921 DCB 0x00,0x21,0xc9,0x21 +001ca8 c9000000 DCB 0xc9,0x00,0x00,0x00 +001cac 0000003f DCB 0x00,0x00,0x00,0x3f +001cb0 e773f680 DCB 0xe7,0x73,0xf6,0x80 +001cb4 0018add3 DCB 0x00,0x18,0xad,0xd3 +001cb8 3900026f DCB 0x39,0x00,0x02,0x6f +001cbc 15390011 DCB 0x15,0x39,0x00,0x11 +001cc0 ce1b2264 DCB 0xce,0x1b,0x22,0x64 +001cc4 c2990b69 DCB 0xc2,0x99,0x0b,0x69 +001cc8 77305da3 DCB 0x77,0x30,0x5d,0xa3 +001ccc 0000c000 DCB 0x00,0x00,0xc0,0x00 +001cd0 ff390002 DCB 0xff,0x39,0x00,0x02 +001cd4 6f253900 DCB 0x6f,0x25,0x39,0x00 +001cd8 11ce0000 DCB 0x11,0xce,0x00,0x00 +001cdc 00000000 DCB 0x00,0x00,0x00,0x00 +001ce0 0000001b DCB 0x00,0x00,0x00,0x1b +001ce4 40404040 DCB 0x40,0x40,0x40,0x40 +001ce8 40403900 DCB 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0x39,0x00,0x02,0x6f +0048cc 07390003 DCB 0x07,0x39,0x00,0x03 +0048d0 518fff39 DCB 0x51,0x8f,0xff,0x39 +0048d4 00026f01 DCB 0x00,0x02,0x6f,0x01 +0048d8 39000387 DCB 0x39,0x00,0x03,0x87 +0048dc 0dbb3900 DCB 0x0d,0xbb,0x39,0x00 +0048e0 0a880302 DCB 0x0a,0x88,0x03,0x02 +0048e4 63096a00 DCB 0x63,0x09,0x6a,0x00 +0048e8 00000039 DCB 0x00,0x00,0x00,0x39 +0048ec 00025320 DCB 0x00,0x02,0x53,0x20 +0048f0 39000390 DCB 0x39,0x00,0x03,0x90 +0048f4 00003900 DCB 0x00,0x00,0x39,0x00 +0048f8 1391aba8 DCB 0x13,0x91,0xab,0xa8 +0048fc 000cd200 DCB 0x00,0x0c,0xd2,0x00 +004900 024c0124 DCB 0x02,0x4c,0x01,0x24 +004904 00080975 DCB 0x00,0x08,0x09,0x75 +004908 077b10f0 DCB 0x07,0x7b,0x10,0xf0 +00490c 390006f0 DCB 0x39,0x00,0x06,0xf0 +004910 55aa5208 DCB 0x55,0xaa,0x52,0x08 +004914 01390002 DCB 0x01,0x39,0x00,0x02 +004918 6f023900 DCB 0x6f,0x02,0x39,0x00 +00491c 03c70000 DCB 0x03,0xc7,0x00,0x00 +004920 39000226 DCB 0x39,0x00,0x02,0x26 +004924 00390002 DCB 0x00,0x39,0x00,0x02 +004928 2f010000 DCB 0x2f,0x01,0x00,0x00 +00492c 07020100 DCB 0x07,0x02,0x01,0x00 +004930 08020100 DCB 0x08,0x02,0x01,0x00 +004934 02020100 DCB 0x02,0x02,0x01,0x00 +004938 03010202 DCB 0x03,0x01,0x02,0x02 +00493c 120000ab DCB 0x12,0x00,0x00,0xab +004940 30800a8c DCB 0x30,0x80,0x0a,0x8c +004944 04c80014 DCB 0x04,0xc8,0x00,0x14 +004948 02640264 DCB 0x02,0x64,0x02,0x64 +00494c 0200024c DCB 0x02,0x00,0x02,0x4c +004950 002001f1 DCB 0x00,0x20,0x01,0xf1 +004954 0008000d DCB 0x00,0x08,0x00,0x0d +004958 057a047d DCB 0x05,0x7a,0x04,0x7d +00495c 180010f0 DCB 0x18,0x00,0x10,0xf0 +004960 07102000 DCB 0x07,0x10,0x20,0x00 +004964 060f0f33 DCB 0x06,0x0f,0x0f,0x33 +004968 0e1c2a38 DCB 0x0e,0x1c,0x2a,0x38 +00496c 46546269 DCB 0x46,0x54,0x62,0x69 +004970 7077797b DCB 0x70,0x77,0x79,0x7b +004974 7d7e0202 DCB 0x7d,0x7e,0x02,0x02 +004978 22002a40 DCB 0x22,0x00,0x2a,0x40 +00497c 2abe3afc DCB 0x2a,0xbe,0x3a,0xfc +004980 3afa3af8 DCB 0x3a,0xfa,0x3a,0xf8 +004984 3b383b78 DCB 0x3b,0x38,0x3b,0x78 +004988 3bb64bb6 DCB 0x3b,0xb6,0x4b,0xb6 +00498c 4bf44bf4 DCB 0x4b,0xf4,0x4b,0xf4 +004990 6c348474 DCB 0x6c,0x34,0x84,0x74 +004994 00000000 DCB 0x00,0x00,0x00,0x00 +004998 00000000 DCB 0x00,0x00,0x00,0x00 +00499c 00000000 DCB 0x00,0x00,0x00,0x00 +0049a0 00000000 DCB 0x00,0x00,0x00,0x00 +0049a4 00000000 DCB 0x00,0x00,0x00,0x00 +0049a8 00000000 DCB 0x00,0x00,0x00,0x00 +0049ac 00000000 DCB 0x00,0x00,0x00,0x00 +0049b0 00000000 DCB 0x00,0x00,0x00,0x00 +0049b4 00000000 DCB 0x00,0x00,0x00,0x00 +0049b8 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||.data||, DATA, ALIGN=2 + + panel_display_done +000000 00 DCB 0x00 + sg_system_resume +000001 00 DCB 0x00 + sg_system_suspend +000002 00 DCB 0x00 + AOD_ON +000003 00 DCB 0x00 + display_on_flag +000004 00000000 DCB 0x00,0x00,0x00,0x00 + g_rx_ctrl_handle + DCD 0x00000000 + g_tx_ctrl_handle + DCD 0x00000000 + + AREA ||area_number.25||, DATA, ALIGN=0 + + EXPORTAS ||area_number.25||, ||.data|| + phone_start_flag +000000 00 DCB 0x00 + + AREA ||area_number.26||, DATA, ALIGN=0 + + EXPORTAS ||area_number.26||, ||.data|| + note10_pro +000000 00 DCB 0x00 + + AREA ||area_number.27||, DATA, ALIGN=1 + + EXPORTAS ||area_number.27||, ||.data|| + value_reg_b1 +000000 0000 DCW 0x0000 + + AREA ||area_number.28||, DATA, ALIGN=2 + + EXPORTAS ||area_number.28||, ||.data|| + value_reg_ca + DCD 0x00000000 + + AREA ||area_number.29||, DATA, ALIGN=0 + + EXPORTAS ||area_number.29||, ||.data|| + s_pps +000000 11000089 DCB 0x11,0x00,0x00,0x89 +000004 30800960 DCB 0x30,0x80,0x09,0x60 +000008 04380014 DCB 0x04,0x38,0x00,0x14 +00000c 021c021c DCB 0x02,0x1c,0x02,0x1c +000010 0200020e DCB 0x02,0x00,0x02,0x0e +000014 002001e8 DCB 0x00,0x20,0x01,0xe8 +000018 0007000c DCB 0x00,0x07,0x00,0x0c +00001c 050e0516 DCB 0x05,0x0e,0x05,0x16 +000020 180010f0 DCB 0x18,0x00,0x10,0xf0 +000024 030c2000 DCB 0x03,0x0c,0x20,0x00 +000028 060b0b33 DCB 0x06,0x0b,0x0b,0x33 +00002c 0e1c2a38 DCB 0x0e,0x1c,0x2a,0x38 +000030 46546269 DCB 0x46,0x54,0x62,0x69 +000034 7077797b DCB 0x70,0x77,0x79,0x7b +000038 7d7e0102 DCB 0x7d,0x7e,0x01,0x02 +00003c 01000940 DCB 0x01,0x00,0x09,0x40 +000040 09be19fc DCB 0x09,0xbe,0x19,0xfc +000044 19fa19f8 DCB 0x19,0xfa,0x19,0xf8 +000048 1a381a78 DCB 0x1a,0x38,0x1a,0x78 +00004c 1ab62af6 DCB 0x1a,0xb6,0x2a,0xf6 +000050 2b342b74 DCB 0x2b,0x34,0x2b,0x74 +000054 3b746bf4 DCB 0x3b,0x74,0x6b,0xf4 +000058 00000000 DCB 0x00,0x00,0x00,0x00 +00005c 00000000 DCB 0x00,0x00,0x00,0x00 +000060 00000000 DCB 0x00,0x00,0x00,0x00 +000064 00000000 DCB 0x00,0x00,0x00,0x00 +000068 00000000 DCB 0x00,0x00,0x00,0x00 +00006c 00000000 DCB 0x00,0x00,0x00,0x00 +000070 00000000 DCB 0x00,0x00,0x00,0x00 +000074 00000000 DCB 0x00,0x00,0x00,0x00 +000078 00000000 DCB 0x00,0x00,0x00,0x00 +00007c 00000000 DCB 0x00,0x00,0x00,0x00 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\Honor 90Pro\\Honor90Pro_demo.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___17_Honor90Pro_demo_c_c64640cd____REV16| +#line 467 "C:\\Keil_v5\\ARM\\PACK\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___17_Honor90Pro_demo_c_c64640cd____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___17_Honor90Pro_demo_c_c64640cd____REVSH| +#line 482 +|__asm___17_Honor90Pro_demo_c_c64640cd____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/WL668T/Listings/main.txt b/project/WL668T/Listings/main.txt new file mode 100644 index 0000000..aacd806 --- /dev/null +++ b/project/WL668T/Listings/main.txt @@ -0,0 +1,89 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\main.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\main.d --cpu=Cortex-M0 --apcs=interwork --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\sdk\include\M0 -I..\..\src\app -I"..\..\src\app\Honor 90Pro" -I..\..\src\aod\aod -I..\..\src\aod\aod_draw_mode -I..\..\src\aod\draw_mode -I.\RTE\_WL668T -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 --omf_browse=.\objects\main.crf ..\..\src\app\main.c] + THUMB + + AREA ||i.main||, CODE, READONLY, ALIGN=2 + + main PROC +;;;8 +;;;9 int main() +000000 f7fffffe BL board_Init +;;;10 { +;;;11 board_Init(); +;;;12 +;;;13 while (1) +;;;14 { +;;;15 #if _MODULE_DEMO_ENABLE +;;;16 module_demo_main(); +;;;17 #endif +;;;18 +;;;19 #if _DEMO_S8_EN +;;;20 s8_demo(); +;;;21 #endif +;;;22 +;;;23 #if _DEMO_S8P_EN +;;;24 s8p_demo(); +;;;25 #endif +;;;26 +;;;27 #if _DEMO_S9_EN +;;;28 s9_demo(); +;;;29 #endif +;;;30 +;;;31 #if _DEMO_HONOR_90Pro_EN +;;;32 Note11Pro_demo(); +000004 f7fffffe BL Note11Pro_demo +;;;33 #endif +;;;34 TAU_LOGD("668 Demo\n"); +000008 2322 MOVS r3,#0x22 +00000a a203 ADR r2,|L1.24| +00000c a104 ADR r1,|L1.32| +00000e 2000 MOVS r0,#0 +000010 f7fffffe BL tau_log_printf + |L1.20| +;;;35 while (1); +000014 e7fe B |L1.20| +;;;36 } +;;;37 } + ENDP + +000016 0000 DCW 0x0000 + |L1.24| +000018 7461755f DCB "tau_log",0 +00001c 6c6f6700 + |L1.32| +000020 5b25735d DCB "[%s] (%04d) 668 Demo\n",0 +000024 20282530 +000028 34642920 +00002c 36363820 +000030 44656d6f +000034 0a00 +000036 00 DCB 0 +000037 00 DCB 0 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\main.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___6_main_c_main____REV16| +#line 467 "C:\\Keil_v5\\ARM\\PACK\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___6_main_c_main____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___6_main_c_main____REVSH| +#line 482 +|__asm___6_main_c_main____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** + + __ARM_use_no_argv EQU 0 diff --git a/project/WL668T/Listings/rm_note11pro_demo.txt b/project/WL668T/Listings/rm_note11pro_demo.txt new file mode 100644 index 0000000..28f3946 --- /dev/null +++ b/project/WL668T/Listings/rm_note11pro_demo.txt @@ -0,0 +1,2916 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\rm_note11pro_demo.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\rm_note11pro_demo.d --cpu=Cortex-M0 --apcs=interwork --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\RM_Note11Pro -I..\..\src\aod\aod -I..\..\src\aod\aod_draw_mode -I..\..\src\aod\draw_mode -I.\RTE\_WL668T -IC:\Users\suppo\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Users\suppo\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 --omf_browse=.\objects\rm_note11pro_demo.crf ..\..\src\app\RM_Note11Pro\RM_Note11Pro_demo.c] + THUMB + + AREA ||i.Gpio_swire_output||, CODE, READONLY, ALIGN=1 + + Gpio_swire_output PROC +;;;814 *****************************************************************************/ +;;;815 void Gpio_swire_output(uint8_t flag, uint8_t num) +000000 b570 PUSH {r4-r6,lr} +;;;816 { +000002 460d MOV r5,r1 +;;;817 uint8_t ii; +;;;818 +;;;819 if (flag) +000004 2800 CMP r0,#0 +000006 d01d BEQ |L1.68| +;;;820 { +;;;821 if (flag ==2) +000008 2802 CMP r0,#2 +00000a d106 BNE |L1.26| +;;;822 { +;;;823 hal_gpio_init_output(IO_PAD_AP_SWIRE, IO_LVL_HIGH); +00000c 2101 MOVS r1,#1 +00000e 2004 MOVS r0,#4 +000010 f7fffffe BL hal_gpio_init_output +;;;824 delayMs(2); +000014 2002 MOVS r0,#2 +000016 f7fffffe BL delayMs + |L1.26| +;;;825 } +;;;826 for (ii =0; ii< num; ii++) +00001a 2400 MOVS r4,#0 +00001c e00f B |L1.62| + |L1.30| +;;;827 { +;;;828 hal_gpio_set_output_data(IO_PAD_AP_SWIRE, IO_LVL_LOW); +00001e 2100 MOVS r1,#0 +000020 2004 MOVS r0,#4 +000022 f7fffffe BL hal_gpio_set_output_data +;;;829 delayUs(10); +000026 200a MOVS r0,#0xa +000028 f7fffffe BL delayUs +;;;830 hal_gpio_set_output_data(IO_PAD_AP_SWIRE, IO_LVL_HIGH); +00002c 2101 MOVS r1,#1 +00002e 2004 MOVS r0,#4 +000030 f7fffffe BL hal_gpio_set_output_data +;;;831 delayUs(9); +000034 2009 MOVS r0,#9 +000036 f7fffffe BL delayUs +00003a 1c64 ADDS r4,r4,#1 +00003c b2e4 UXTB r4,r4 ;826 + |L1.62| +00003e 42ac CMP r4,r5 ;826 +000040 d3ed BCC |L1.30| +;;;832 } +;;;833 } +;;;834 else +;;;835 { +;;;836 hal_gpio_init_output(IO_PAD_AP_SWIRE, IO_LVL_LOW); +;;;837 } +;;;838 } +000042 bd70 POP {r4-r6,pc} + |L1.68| +000044 2100 MOVS r1,#0 ;836 +000046 2004 MOVS r0,#4 ;836 +000048 f7fffffe BL hal_gpio_init_output +00004c bd70 POP {r4-r6,pc} +;;;839 + ENDP + + + AREA ||i.Note11Pro_demo||, CODE, READONLY, ALIGN=2 + + Note11Pro_demo PROC +;;;1368 */ +;;;1369 void Note11Pro_demo(void) +000000 2002 MOVS r0,#2 +;;;1370 { +;;;1371 /* 电源选择,上电只需要选择一次 */ +;;;1372 hal_pwr_set_main_power(MAIN_POWER_SELECT); /* 切换供电*/ +000002 f7fffffe BL hal_pwr_set_main_power +;;;1373 +;;;1374 /* 显示模块初始 */ +;;;1375 app_display_init(); +000006 f7fffffe BL app_display_init +00000a 2500 MOVS r5,#0 +;;;1376 +;;;1377 // hal_pwr_ldo18s_en(true); +;;;1378 // hal_pwr_ldo18s_set(LDO_18S_5); +;;;1379 // +;;;1380 // hal_pwr_ldo13s_en(true); +;;;1381 // hal_pwr_ldo13s_set(LDO_13S_6); +;;;1382 +;;;1383 /* touch 相关模块初始化 */ +;;;1384 #if TOUCH_ENABLE +;;;1385 /* TP 初始化 */ +;;;1386 app_tp_init(); +;;;1387 app_tp_phone_clear_reset_on(); +;;;1388 /* 与屏的TP 模块通讯并初始化 */ +;;;1389 app_tp_transfer_screen_start(); +;;;1390 #endif +;;;1391 +;;;1392 #if AOD_CLOCK_ENABLE +;;;1393 aod_init(g_rx_ctrl_handle, TIMER_NUM1, 95, 150, 180, &AOD_LowPower_Update, app_rx_event_cb); +;;;1394 //TAU_LOGD("aod_init\n"); +;;;1395 #endif +;;;1396 //TAU_LOGD("s20p demo init done \n"); +;;;1397 +;;;1398 while (1) +;;;1399 { +;;;1400 /* DCS 命令异步处理 */ +;;;1401 while (hal_dsi_rx_ctrl_dcs_async_handler(g_rx_ctrl_handle)); +00000c 4c0e LDR r4,|L2.72| +00000e 2695 MOVS r6,#0x95 +000010 00f6 LSLS r6,r6,#3 + |L2.18| +000012 68a0 LDR r0,[r4,#8] ; g_rx_ctrl_handle +000014 f7fffffe BL hal_dsi_rx_ctrl_dcs_async_handler +000018 2800 CMP r0,#0 +00001a d1fa BNE |L2.18| +00001c 78a0 LDRB r0,[r4,#2] ; sg_system_suspend +00001e 2800 CMP r0,#0 +000020 d003 BEQ |L2.42| +000022 2002 MOVS r0,#2 +000024 f7fffffe BL app_system_suspend +000028 70a5 STRB r5,[r4,#2] + |L2.42| +00002a 7860 LDRB r0,[r4,#1] ; sg_system_resume +00002c 2800 CMP r0,#0 +00002e d0f0 BEQ |L2.18| +000030 f7fffffe BL hal_pwr_exit_sleep_mode +000034 f7fffffe BL app_display_init +000038 4633 MOV r3,r6 +00003a a204 ADR r2,|L2.76| +00003c a107 ADR r1,|L2.92| +00003e 2000 MOVS r0,#0 +000040 f7fffffe BL tau_log_printf +000044 7065 STRB r5,[r4,#1] +000046 e7e4 B |L2.18| +;;;1402 +;;;1403 +;;;1404 // CallingDisplayOffHandle(); +;;;1405 +;;;1406 /* 系统事件处理(sleep mode) */ +;;;1407 app_system_process(); +;;;1408 } +;;;1409 } +;;;1410 #endif + ENDP + + |L2.72| + DCD ||.data|| + |L2.76| +00004c 524d204e DCB "RM Note11Pro",0 +000050 6f746531 +000054 3150726f +000058 00 +000059 00 DCB 0 +00005a 00 DCB 0 +00005b 00 DCB 0 + |L2.92| +00005c 5b25735d DCB "[%s] (%04d) system resume\n",0 +000060 20282530 +000064 34642920 +000068 73797374 +00006c 656d2072 +000070 6573756d +000074 650a00 +000077 00 DCB 0 + + AREA ||i.ap_dcs_read||, CODE, READONLY, ALIGN=2 + + ap_dcs_read PROC +;;;183 +;;;184 static bool ap_dcs_read(uint8_t data_type, uint8_t dcs_cmd, uint8_t param) +000000 b5fe PUSH {r1-r7,lr} +;;;185 { +;;;186 uint32_t data_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); +000002 4d23 LDR r5,|L3.144| +000004 460c MOV r4,r1 ;185 +000006 68a8 LDR r0,[r5,#8] ; g_rx_ctrl_handle +000008 f7fffffe BL hal_dsi_rx_ctrl_get_max_ret_size +00000c 2601 MOVS r6,#1 +;;;187 if(dcs_cmd == 0xDA && data_size == 1) +;;;188 { +;;;189 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +00000e 2105 MOVS r1,#5 +000010 2cda CMP r4,#0xda ;187 +000012 d008 BEQ |L3.38| +;;;190 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;191 DSI_VC_0, +;;;192 1, +;;;193 0x05); +;;;194 } +;;;195 else if (dcs_cmd == 0xDB) +000014 2cdb CMP r4,#0xdb +000016 d00a BEQ |L3.46| +;;;196 { +;;;197 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;198 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;199 DSI_VC_0, +;;;200 1, 0x01); +;;;201 } +;;;202 else if(dcs_cmd == 0x0A) +000018 2c0a CMP r4,#0xa +00001a d00d BEQ |L3.56| +;;;203 { +;;;204 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;205 DSI_ACK_DT_GEN_SHORT_RESPONSE_1B, +;;;206 DSI_VC_0, +;;;207 1, +;;;208 0x9D); +;;;209 } +;;;210 else if(dcs_cmd == 0xF2 && data_size == 3) +00001c 2cf2 CMP r4,#0xf2 +00001e d014 BEQ |L3.74| +;;;211 { +;;;212 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;213 DSI_ACK_DT_DCS_LONG_RESPONSE, +;;;214 DSI_VC_0, +;;;215 3, +;;;216 0x00, 0x00, 0x00); +;;;217 } +;;;218 else if(dcs_cmd == 0xDA && data_size != 1) +000020 2cda CMP r4,#0xda +000022 d01f BEQ |L3.100| +000024 e029 B |L3.122| + |L3.38| +000026 2801 CMP r0,#1 ;187 +000028 d11e BNE |L3.104| +00002a 9100 STR r1,[sp,#0] ;189 +00002c e000 B |L3.48| + |L3.46| +00002e 9600 STR r6,[sp,#0] ;197 + |L3.48| +000030 2301 MOVS r3,#1 ;189 +000032 2200 MOVS r2,#0 ;189 +000034 2121 MOVS r1,#0x21 ;189 +000036 e004 B |L3.66| + |L3.56| +000038 209d MOVS r0,#0x9d ;204 +00003a 2301 MOVS r3,#1 ;204 +00003c 2200 MOVS r2,#0 ;204 +00003e 2111 MOVS r1,#0x11 ;204 +000040 9000 STR r0,[sp,#0] ;204 + |L3.66| +000042 68a8 LDR r0,[r5,#8] ;204 ; g_rx_ctrl_handle +000044 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000048 e01f B |L3.138| + |L3.74| +00004a 2803 CMP r0,#3 ;210 +00004c d115 BNE |L3.122| +00004e 2000 MOVS r0,#0 ;212 +000050 9000 STR r0,[sp,#0] ;212 +000052 9001 STR r0,[sp,#4] ;212 +000054 4602 MOV r2,r0 ;212 +000056 9002 STR r0,[sp,#8] ;212 +000058 2303 MOVS r3,#3 ;212 +00005a 211c MOVS r1,#0x1c ;212 +00005c 68a8 LDR r0,[r5,#8] ;212 ; g_rx_ctrl_handle +00005e f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000062 e012 B |L3.138| + |L3.100| +000064 2801 CMP r0,#1 +000066 d008 BEQ |L3.122| + |L3.104| +;;;219 { +;;;220 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000068 9100 STR r1,[sp,#0] +00006a 2301 MOVS r3,#1 +00006c 2200 MOVS r2,#0 +00006e 2121 MOVS r1,#0x21 +000070 68a8 LDR r0,[r5,#8] ; g_rx_ctrl_handle +000072 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +;;;221 DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, +;;;222 DSI_VC_0, +;;;223 1, +;;;224 0x05); +;;;225 +;;;226 note10_pro = true; +000076 712e STRB r6,[r5,#4] +000078 e007 B |L3.138| + |L3.122| +;;;227 +;;;228 // note11_pro = 0; +;;;229 } +;;;230 else +;;;231 { +;;;232 TAU_LOGD("dcs_cmd %X %d\n",dcs_cmd , data_size); +00007a 9001 STR r0,[sp,#4] +00007c 23e8 MOVS r3,#0xe8 +00007e a205 ADR r2,|L3.148| +000080 a108 ADR r1,|L3.164| +000082 9400 STR r4,[sp,#0] +000084 2000 MOVS r0,#0 +000086 f7fffffe BL tau_log_printf + |L3.138| +;;;233 } +;;;234 +;;;235 +;;;236 +;;;237 +;;;238 return true; +00008a 2001 MOVS r0,#1 +;;;239 } +00008c bdfe POP {r1-r7,pc} +;;;240 + ENDP + +00008e 0000 DCW 0x0000 + |L3.144| + DCD ||.data|| + |L3.148| +000094 524d204e DCB "RM Note11Pro",0 +000098 6f746531 +00009c 3150726f +0000a0 00 +0000a1 00 DCB 0 +0000a2 00 DCB 0 +0000a3 00 DCB 0 + |L3.164| +0000a4 5b25735d DCB "[%s] (%04d) dcs_cmd %X %d\n",0 +0000a8 20282530 +0000ac 34642920 +0000b0 6463735f +0000b4 636d6420 +0000b8 25582025 +0000bc 640a00 +0000bf 00 DCB 0 + + AREA ||i.ap_dcs_set_display_off||, CODE, READONLY, ALIGN=2 + + ap_dcs_set_display_off PROC +;;;288 */ +;;;289 static bool ap_dcs_set_display_off(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b538 PUSH {r3-r5,lr} +;;;290 { +;;;291 TAU_LOGD("disp off %d\n", panel_display_done); +000002 4c0a LDR r4,|L4.44| +000004 23ff MOVS r3,#0xff +000006 7820 LDRB r0,[r4,#0] ; panel_display_done +000008 9000 STR r0,[sp,#0] +00000a 3324 ADDS r3,r3,#0x24 +00000c a208 ADR r2,|L4.48| +00000e a10c ADR r1,|L4.64| +000010 2000 MOVS r0,#0 +000012 f7fffffe BL tau_log_printf +;;;292 if (panel_display_done) +000016 7820 LDRB r0,[r4,#0] ; panel_display_done +000018 2800 CMP r0,#0 +00001a d005 BEQ |L4.40| +;;;293 { +;;;294 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x28); +00001c 2328 MOVS r3,#0x28 +00001e 2202 MOVS r2,#2 +000020 2100 MOVS r1,#0 +000022 2005 MOVS r0,#5 +000024 f7fffffe BL hal_dsi_tx_ctrl_write_cmd + |L4.40| +;;;295 +;;;296 } +;;;297 #if ANALOG_PWM_OUTPUT +;;;298 hal_pwm_enable(false); +;;;299 #endif +;;;300 return true; +000028 2001 MOVS r0,#1 +;;;301 } +00002a bd38 POP {r3-r5,pc} +;;;302 + ENDP + + |L4.44| + DCD ||.data|| + |L4.48| +000030 524d204e DCB "RM Note11Pro",0 +000034 6f746531 +000038 3150726f +00003c 00 +00003d 00 DCB 0 +00003e 00 DCB 0 +00003f 00 DCB 0 + |L4.64| +000040 5b25735d DCB "[%s] (%04d) disp off %d\n",0 +000044 20282530 +000048 34642920 +00004c 64697370 +000050 206f6666 +000054 2025640a +000058 00 +000059 00 DCB 0 +00005a 00 DCB 0 +00005b 00 DCB 0 + + AREA ||i.ap_dcs_set_display_on||, CODE, READONLY, ALIGN=2 + + ap_dcs_set_display_on PROC +;;;274 */ +;;;275 static bool ap_dcs_set_display_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;276 { +;;;277 AOD_ON = true; +000002 4806 LDR r0,|L5.28| +000004 2101 MOVS r1,#1 +000006 70c1 STRB r1,[r0,#3] +;;;278 display_on_flag =1; +000008 7141 STRB r1,[r0,#5] +;;;279 TAU_LOGD("disp on \n"); +00000a 23ff MOVS r3,#0xff +00000c 3318 ADDS r3,r3,#0x18 +00000e a204 ADR r2,|L5.32| +000010 a107 ADR r1,|L5.48| +000012 2000 MOVS r0,#0 +000014 f7fffffe BL tau_log_printf +;;;280 return true; +000018 2001 MOVS r0,#1 +;;;281 } +00001a bd10 POP {r4,pc} +;;;282 + ENDP + + |L5.28| + DCD ||.data|| + |L5.32| +000020 524d204e DCB "RM Note11Pro",0 +000024 6f746531 +000028 3150726f +00002c 00 +00002d 00 DCB 0 +00002e 00 DCB 0 +00002f 00 DCB 0 + |L5.48| +000030 5b25735d DCB "[%s] (%04d) disp on \n",0 +000034 20282530 +000038 34642920 +00003c 64697370 +000040 206f6e20 +000044 0a00 +000046 00 DCB 0 +000047 00 DCB 0 + + AREA ||i.ap_dcs_set_enter_sleep_mode||, CODE, READONLY, ALIGN=2 + + ap_dcs_set_enter_sleep_mode PROC +;;;308 */ +;;;309 static bool ap_dcs_set_enter_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;310 { +;;;311 // TAU_LOGD("enter sleep mode \n", panel_display_done); +;;;312 if (panel_display_done) +000002 4816 LDR r0,|L6.92| +000004 7801 LDRB r1,[r0,#0] ; panel_display_done +000006 2900 CMP r1,#0 +000008 d006 BEQ |L6.24| +;;;313 { +;;;314 hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_STOP_MODE); +00000a 2101 MOVS r1,#1 +00000c 68c0 LDR r0,[r0,#0xc] ; g_tx_ctrl_handle +00000e f7fffffe BL hal_dsi_tx_ctrl_set_tear_mode +;;;315 // hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x10); +;;;316 delayMs(10); +000012 200a MOVS r0,#0xa +000014 f7fffffe BL delayMs + |L6.24| +;;;317 } +;;;318 +;;;319 #if AP_SWIRE_OUTPUT +;;;320 /* Swire close */ +;;;321 hal_swire_enable(false); +000018 2000 MOVS r0,#0 +00001a f7fffffe BL hal_swire_enable +;;;322 delayMs(10); +00001e 200a MOVS r0,#0xa +000020 f7fffffe BL delayMs +;;;323 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x10); +000024 2310 MOVS r3,#0x10 +000026 2201 MOVS r2,#1 +000028 2100 MOVS r1,#0 +00002a 2005 MOVS r0,#5 +00002c f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;324 delayMs(20); //20 +000030 2014 MOVS r0,#0x14 +000032 f7fffffe BL delayMs +;;;325 /* AVDD_EN close*/ +;;;326 hal_gpio_set_output_data(IO_PAD_AP_PWMEN, IO_LVL_LOW); +000036 2100 MOVS r1,#0 +000038 2008 MOVS r0,#8 +00003a f7fffffe BL hal_gpio_set_output_data +;;;327 #endif +;;;328 delayMs(20); //20 +00003e 2014 MOVS r0,#0x14 +000040 f7fffffe BL delayMs +;;;329 hal_gpio_set_output_data(IO_PAD_TD_RSTN, IO_LVL_LOW); +000044 2100 MOVS r1,#0 +000046 2007 MOVS r0,#7 +000048 f7fffffe BL hal_gpio_set_output_data +;;;330 +;;;331 /* Wait AP reset down*/ +;;;332 hal_gpio_set_ap_reset_int(ENABLE, ap_rstn_pull_down_cb, DETECT_LOW_LVL); +00004c 2201 MOVS r2,#1 +00004e 4904 LDR r1,|L6.96| +000050 4610 MOV r0,r2 +000052 f7fffffe BL hal_gpio_set_ap_reset_int +;;;333 return true; +000056 2001 MOVS r0,#1 +;;;334 } +000058 bd10 POP {r4,pc} +;;;335 + ENDP + +00005a 0000 DCW 0x0000 + |L6.92| + DCD ||.data|| + |L6.96| + DCD ap_rstn_pull_down_cb + + AREA ||i.ap_dcs_set_exit_sleep_mode||, CODE, READONLY, ALIGN=2 + + ap_dcs_set_exit_sleep_mode PROC +;;;341 */ +;;;342 static bool ap_dcs_set_exit_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;343 { +;;;344 #if AP_SWIRE_OUTPUT +;;;345 /* AVDD 上电, 用于解决息屏开屏PPS不更新问题 */ +;;;346 // hal_gpio_set_output_data(IO_PAD_AP_PWMEN, IO_LVL_HIGH); +;;;347 #endif +;;;348 +;;;349 #if TX_START_AFTER_APRST +;;;350 if (panel_display_done == false) +;;;351 { +;;;352 sg_tx_start_in_process = true; +;;;353 } +;;;354 #endif +;;;355 +;;;356 TAU_LOGD("exit sleep mode \n"); +000002 23ff MOVS r3,#0xff +000004 3365 ADDS r3,r3,#0x65 +000006 a203 ADR r2,|L7.20| +000008 a106 ADR r1,|L7.36| +00000a 2000 MOVS r0,#0 +00000c f7fffffe BL tau_log_printf +;;;357 +;;;358 return true; +000010 2001 MOVS r0,#1 +;;;359 } +000012 bd10 POP {r4,pc} +;;;360 + ENDP + + |L7.20| +000014 524d204e DCB "RM Note11Pro",0 +000018 6f746531 +00001c 3150726f +000020 00 +000021 00 DCB 0 +000022 00 DCB 0 +000023 00 DCB 0 + |L7.36| +000024 5b25735d DCB "[%s] (%04d) exit sleep mode \n",0 +000028 20282530 +00002c 34642920 +000030 65786974 +000034 20736c65 +000038 6570206d +00003c 6f646520 +000040 0a00 +000042 00 DCB 0 +000043 00 DCB 0 + + AREA ||i.ap_rstn_pull_down_cb||, CODE, READONLY, ALIGN=2 + + ap_rstn_pull_down_cb PROC +;;;1115 */ +;;;1116 static void ap_rstn_pull_down_cb(void *data) +000000 b510 PUSH {r4,lr} +;;;1117 { +;;;1118 sg_system_suspend = true; +000002 4907 LDR r1,|L8.32| +000004 2001 MOVS r0,#1 +000006 7088 STRB r0,[r1,#2] +;;;1119 /* 关闭AP reset检查 */ +;;;1120 hal_gpio_set_ap_reset_int(DISABLE, NULL, DETECT_HIGH_LVL); +000008 2200 MOVS r2,#0 +00000a 4611 MOV r1,r2 +00000c 4610 MOV r0,r2 +00000e f7fffffe BL hal_gpio_set_ap_reset_int +;;;1121 TAU_LOGD("ap_rstn_pull_down_cb\n"); +000012 4b04 LDR r3,|L8.36| +000014 a204 ADR r2,|L8.40| +000016 a108 ADR r1,|L8.56| +000018 2000 MOVS r0,#0 +00001a f7fffffe BL tau_log_printf +;;;1122 } +00001e bd10 POP {r4,pc} +;;;1123 + ENDP + + |L8.32| + DCD ||.data|| + |L8.36| + DCD 0x00000461 + |L8.40| +000028 524d204e DCB "RM Note11Pro",0 +00002c 6f746531 +000030 3150726f +000034 00 +000035 00 DCB 0 +000036 00 DCB 0 +000037 00 DCB 0 + |L8.56| +000038 5b25735d DCB "[%s] (%04d) ap_rstn_pull_down_cb\n",0 +00003c 20282530 +000040 34642920 +000044 61705f72 +000048 73746e5f +00004c 70756c6c +000050 5f646f77 +000054 6e5f6362 +000058 0a00 +00005a 00 DCB 0 +00005b 00 DCB 0 + + AREA ||i.ap_rstn_pull_high_cb||, CODE, READONLY, ALIGN=2 + + ap_rstn_pull_high_cb PROC +;;;1102 */ +;;;1103 static void ap_rstn_pull_high_cb(void *data) +000000 b510 PUSH {r4,lr} +;;;1104 { +;;;1105 /* system resume begin */ +;;;1106 sg_system_resume = true; +000002 4904 LDR r1,|L9.20| +000004 2001 MOVS r0,#1 +000006 7048 STRB r0,[r1,#1] +;;;1107 /* 关闭AP reset检查 */ +;;;1108 hal_gpio_set_ap_reset_int(DISABLE, NULL, DETECT_HIGH_LVL); +000008 2200 MOVS r2,#0 +00000a 4611 MOV r1,r2 +00000c 4610 MOV r0,r2 +00000e f7fffffe BL hal_gpio_set_ap_reset_int +;;;1109 } +000012 bd10 POP {r4,pc} +;;;1110 + ENDP + + |L9.20| + DCD ||.data|| + + AREA ||i.ap_set_backlight||, CODE, READONLY, ALIGN=2 + + ap_set_backlight PROC +;;;470 */ +;;;471 static bool ap_set_backlight(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b51c PUSH {r2-r4,lr} +;;;472 { +;;;473 uint16_t ap_backlight = dcs_packet->packet_param[1] + (dcs_packet->packet_param[0] << 8); +000002 68c8 LDR r0,[r1,#0xc] +;;;474 TAU_LOGD("51: %04x\n", ap_backlight); +000004 23ff MOVS r3,#0xff +000006 7841 LDRB r1,[r0,#1] ;473 +000008 7800 LDRB r0,[r0,#0] ;473 +00000a 33db ADDS r3,r3,#0xdb +00000c 0200 LSLS r0,r0,#8 ;473 +00000e 1808 ADDS r0,r1,r0 ;473 +000010 b284 UXTH r4,r0 ;473 +000012 a209 ADR r2,|L10.56| +000014 a10c ADR r1,|L10.72| +000016 2000 MOVS r0,#0 +000018 9400 STR r4,[sp,#0] +00001a f7fffffe BL tau_log_printf +;;;475 +;;;476 // if(ap_backlight < 0x100) ap_backlight = 0x100; +;;;477 +;;;478 hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, ap_backlight >> 8, ap_backlight & 0xFF); +00001e b2e1 UXTB r1,r4 +000020 0a20 LSRS r0,r4,#8 +000022 9101 STR r1,[sp,#4] +000024 9000 STR r0,[sp,#0] +000026 2351 MOVS r3,#0x51 +000028 2203 MOVS r2,#3 +00002a 2100 MOVS r1,#0 +00002c 2029 MOVS r0,#0x29 +00002e f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;479 +;;;480 return true; +000032 2001 MOVS r0,#1 +;;;481 } +000034 bd1c POP {r2-r4,pc} +;;;482 + ENDP + +000036 0000 DCW 0x0000 + |L10.56| +000038 524d204e DCB "RM Note11Pro",0 +00003c 6f746531 +000040 3150726f +000044 00 +000045 00 DCB 0 +000046 00 DCB 0 +000047 00 DCB 0 + |L10.72| +000048 5b25735d DCB "[%s] (%04d) 51: %04x\n",0 +00004c 20282530 +000050 34642920 +000054 35313a20 +000058 25303478 +00005c 0a00 +00005e 00 DCB 0 +00005f 00 DCB 0 + + AREA ||i.ap_update_frame_rate||, CODE, READONLY, ALIGN=2 + + ap_update_frame_rate PROC +;;;397 +;;;398 static bool ap_update_frame_rate(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;399 { +;;;400 if (dcs_packet->param_length == 1) +000002 6888 LDR r0,[r1,#8] +000004 2801 CMP r0,#1 +000006 d10f BNE |L11.40| +;;;401 { +;;;402 if (dcs_packet->packet_param[0] == 0x01) +000008 68c8 LDR r0,[r1,#0xc] +00000a 7800 LDRB r0,[r0,#0] +00000c 2801 CMP r0,#1 +00000e d00d BEQ |L11.44| +;;;403 { +;;;404 // hal_dsi_rx_ctrl_toggle_input_frame_rate(g_rx_ctrl_handle, DSI_FRAME_RATE_120HZ); +;;;405 // hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_120HZ_MODE); +;;;406 TAU_LOGD("updata frame 120Hz\n"); +;;;407 } +;;;408 else //if (dcs_packet->packet_param[0] == 0x21) +;;;409 { +;;;410 hal_dsi_rx_ctrl_toggle_input_frame_rate(g_rx_ctrl_handle, DSI_FRAME_RATE_60HZ); +000010 4809 LDR r0,|L11.56| +000012 2100 MOVS r1,#0 +000014 6880 LDR r0,[r0,#8] ; g_rx_ctrl_handle +000016 f7fffffe BL hal_dsi_rx_ctrl_toggle_input_frame_rate +;;;411 // hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_60HZ_MODE); +;;;412 TAU_LOGD("updata frame 60Hz\n"); +00001a 23ff MOVS r3,#0xff +00001c 339d ADDS r3,r3,#0x9d +00001e a207 ADR r2,|L11.60| +000020 a10a ADR r1,|L11.76| + |L11.34| +000022 2000 MOVS r0,#0 ;406 +000024 f7fffffe BL tau_log_printf + |L11.40| +;;;413 } +;;;414 +;;;415 } +;;;416 return true; +000028 2001 MOVS r0,#1 +;;;417 } +00002a bd10 POP {r4,pc} + |L11.44| +00002c 23ff MOVS r3,#0xff ;406 +00002e 3397 ADDS r3,r3,#0x97 ;406 +000030 a202 ADR r2,|L11.60| +000032 a10e ADR r1,|L11.108| +000034 e7f5 B |L11.34| +;;;418 + ENDP + +000036 0000 DCW 0x0000 + |L11.56| + DCD ||.data|| + |L11.60| +00003c 524d204e DCB "RM Note11Pro",0 +000040 6f746531 +000044 3150726f +000048 00 +000049 00 DCB 0 +00004a 00 DCB 0 +00004b 00 DCB 0 + |L11.76| +00004c 5b25735d DCB "[%s] (%04d) updata frame 60Hz\n",0 +000050 20282530 +000054 34642920 +000058 75706461 +00005c 74612066 +000060 72616d65 +000064 20363048 +000068 7a0a00 +00006b 00 DCB 0 + |L11.108| +00006c 5b25735d DCB "[%s] (%04d) updata frame 120Hz\n",0 +000070 20282530 +000074 34642920 +000078 75706461 +00007c 74612066 +000080 72616d65 +000084 20313230 +000088 487a0a00 + + AREA ||i.app_display_init||, CODE, READONLY, ALIGN=1 + + app_display_init PROC +;;;1151 */ +;;;1152 void app_display_init(void) +000000 b510 PUSH {r4,lr} +;;;1153 { +;;;1154 /* mipi rx初始化 */ +;;;1155 app_mipi_rx_init(); +000002 f7fffffe BL app_mipi_rx_init + |L12.6| +;;;1156 +;;;1157 /* VCC 主供电,等待VCC Power Ready,此时RX初始化完成可以响应MIPI命令 */ +;;;1158 if (MAIN_POWER_SELECT == PWR_SEL_VCC) +;;;1159 { +;;;1160 while (hal_pwr_get_vcc_power_ready() == false); +000006 f7fffffe BL hal_pwr_get_vcc_power_ready +00000a 2800 CMP r0,#0 +00000c d0fb BEQ |L12.6| +;;;1161 } +;;;1162 +;;;1163 /* GPIO 初始化 */ +;;;1164 app_gpio_init(); +00000e f7fffffe BL app_gpio_init +;;;1165 /* 背光初始化 */ +;;;1166 #if AP_SWIRE_OUTPUT +;;;1167 hal_swire_init(); /* swire init */ +000012 f7fffffe BL hal_swire_init +;;;1168 hal_swire_set_timer(TIMER_NUM0, 8, true); /* swire连续发送,绑定timer进行发送 */ +000016 2201 MOVS r2,#1 +000018 2108 MOVS r1,#8 +00001a 2000 MOVS r0,#0 +00001c f7fffffe BL hal_swire_set_timer +;;;1169 #endif +;;;1170 /* mipi tx 初始化*/ +;;;1171 app_mipi_tx_init(); +000020 f7fffffe BL app_mipi_tx_init +;;;1172 app_mipi_tx_start(); +000024 f7fffffe BL app_mipi_tx_start +;;;1173 } +000028 bd10 POP {r4,pc} +;;;1174 + ENDP + + + AREA ||i.app_gpio_init||, CODE, READONLY, ALIGN=2 + + app_gpio_init PROC +;;;1129 */ +;;;1130 void app_gpio_init(void) +000000 b500 PUSH {lr} +;;;1131 { +000002 b085 SUB sp,sp,#0x14 +;;;1132 io_pad_attr_t attrs[] = +000004 2214 MOVS r2,#0x14 +000006 4905 LDR r1,|L13.28| +000008 4668 MOV r0,sp +00000a f7fffffe BL __aeabi_memcpy4 +;;;1133 { +;;;1134 {IO_PIN_8, PIN8_MODE_GPIO7, IO_IOE_OUTPUT, IO_LVL_LOW},/* PIN_8(TD_RSTN), GPIO,输出,低电平 */ +;;;1135 {IO_PIN_17, PIN17_MODE_GPIO8, IO_IOE_OUTPUT, IO_LVL_LOW}, /* PIN_17(PWMEN), GPIO,输出,低电平 */ +;;;1136 {IO_PIN_16, PIN16_MODE_GPIO2, IO_IOE_OUTPUT, IO_LVL_LOW}, /* PIN_16(AP_INT),GPIO,输出,低电平 */ +;;;1137 #if (TX_USE_CMD_MODE & (!TX_CMD_MODE_WITHOUT_TE)) +;;;1138 {IO_PIN_14, PIN14_MODE_GPIO24, IO_IOE_INPUT, IO_LVL_NONE}, /* PIN_29(AP_TE), cmd mode输出, 并且看屏TE,配置AP TE为GPIO输入 */ +;;;1139 #endif +;;;1140 {IO_PIN_29, PIN29_MODE_TEAR, IO_IOE_NONE, IO_LVL_NONE}, /* PIN_29(AP_TE), 硬件TEAR输出模式 */ +;;;1141 +;;;1142 }; +;;;1143 uint8_t size = sizeof(attrs) / sizeof(io_pad_attr_t); +00000e 2105 MOVS r1,#5 +;;;1144 hal_gpio_config_pad(attrs, size); +000010 4668 MOV r0,sp +000012 f7fffffe BL hal_gpio_config_pad +;;;1145 } +000016 b005 ADD sp,sp,#0x14 +000018 bd00 POP {pc} +;;;1146 + ENDP + +00001a 0000 DCW 0x0000 + |L13.28| + DCD ||.constdata||+0x1224 + + AREA ||i.app_init_panel||, CODE, READONLY, ALIGN=2 + + app_init_panel PROC +;;;844 */ +;;;845 static void app_init_panel(void) +000000 b5fe PUSH {r1-r7,lr} +000002 2101 MOVS r1,#1 +000004 2007 MOVS r0,#7 +000006 f7fffffe BL hal_gpio_set_output_data +00000a 200a MOVS r0,#0xa +00000c f7fffffe BL delayMs +000010 2100 MOVS r1,#0 +000012 2007 MOVS r0,#7 +000014 f7fffffe BL hal_gpio_set_output_data +000018 200a MOVS r0,#0xa +00001a f7fffffe BL delayMs +00001e 2101 MOVS r1,#1 +000020 2007 MOVS r0,#7 +000022 f7fffffe BL hal_gpio_set_output_data +000026 2028 MOVS r0,#0x28 +000028 f7fffffe BL delayMs +;;;846 { +;;;847 /* reset panel*/ +;;;848 app_tx_panel_reset(); +;;;849 send_panel_init_code(sizeof(panel_init_code), (uint8_t *) panel_init_code); +00002c 4f19 LDR r7,|L14.148| +00002e 4d1a LDR r5,|L14.152| +000030 2400 MOVS r4,#0 + |L14.50| +000032 192b ADDS r3,r5,r4 +000034 789e LDRB r6,[r3,#2] +000036 7859 LDRB r1,[r3,#1] +000038 5d28 LDRB r0,[r5,r4] +00003a 4632 MOV r2,r6 +00003c 1cdb ADDS r3,r3,#3 +00003e f7fffffe BL hal_dsi_tx_ctrl_write_array_cmd +000042 19a4 ADDS r4,r4,r6 +000044 2064 MOVS r0,#0x64 +000046 1ce4 ADDS r4,r4,#3 +000048 f7fffffe BL delayUs +00004c 42bc CMP r4,r7 +00004e d3f0 BCC |L14.50| +;;;850 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); +000050 2311 MOVS r3,#0x11 +000052 2201 MOVS r2,#1 +000054 2100 MOVS r1,#0 +000056 2005 MOVS r0,#5 +000058 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;851 delayMs(10); +00005c 200a MOVS r0,#0xa +00005e f7fffffe BL delayMs +;;;852 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x05, 0x0F); //最大0FFF +000062 210f MOVS r1,#0xf +000064 2005 MOVS r0,#5 +000066 9101 STR r1,[sp,#4] +000068 9000 STR r0,[sp,#0] +00006a 2351 MOVS r3,#0x51 +00006c 2203 MOVS r2,#3 +00006e 2100 MOVS r1,#0 +000070 2039 MOVS r0,#0x39 +000072 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;853 hal_gpio_init_output(IO_PAD_AP_PWMEN, IO_LVL_HIGH); +000076 2101 MOVS r1,#1 +000078 2008 MOVS r0,#8 +00007a f7fffffe BL hal_gpio_init_output +;;;854 delayMs(60); //90 +00007e 203c MOVS r0,#0x3c +000080 f7fffffe BL delayMs +;;;855 #if AP_SWIRE_OUTPUT +;;;856 hal_swire_enable(true); +000084 2001 MOVS r0,#1 +000086 f7fffffe BL hal_swire_enable +;;;857 hal_swire_set_pulse(SWIRE_DEFAULT_PULSE); +00008a 2025 MOVS r0,#0x25 +00008c f7fffffe BL hal_swire_set_pulse +;;;858 #endif +;;;859 // Gpio_swire_output(2, 40); +;;;860 // delayMs(40); +;;;861 +;;;862 } +000090 bdfe POP {r1-r7,pc} +;;;863 + ENDP + +000092 0000 DCW 0x0000 + |L14.148| + DCD 0x000011cf + |L14.152| + DCD ||.constdata||+0x54 + + AREA ||i.app_mipi_rx_init||, CODE, READONLY, ALIGN=2 + + app_mipi_rx_init PROC +;;;921 */ +;;;922 static void app_mipi_rx_init(void) +000000 b530 PUSH {r4,r5,lr} +;;;923 { +;;;924 if (g_rx_ctrl_handle == NULL) +000002 4d24 LDR r5,|L15.148| +000004 b0a1 SUB sp,sp,#0x84 ;923 +000006 68a8 LDR r0,[r5,#8] ; g_rx_ctrl_handle +000008 2800 CMP r0,#0 +00000a d102 BNE |L15.18| +;;;925 { +;;;926 /* 创建rx ctrl handle */ +;;;927 g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); +00000c f7fffffe BL hal_dsi_rx_ctrl_create_handle +000010 60a8 STR r0,[r5,#8] ; g_rx_ctrl_handle + |L15.18| +;;;928 } +;;;929 /* 配置参数 */ +;;;930 g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; +000012 2187 MOVS r1,#0x87 +;;;931 g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; +000014 224b MOVS r2,#0x4b +000016 00c9 LSLS r1,r1,#3 ;930 +000018 0152 LSLS r2,r2,#5 +00001a c006 STM r0!,{r1,r2} +;;;932 g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; +;;;933 g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; +00001c 6001 STR r1,[r0,#0] +00001e 491e LDR r1,|L15.152| +;;;934 g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; +000020 6041 STR r1,[r0,#4] +000022 2100 MOVS r1,#0 +000024 7201 STRB r1,[r0,#8] +;;;935 g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; +000026 7241 STRB r1,[r0,#9] +;;;936 g_rx_ctrl_handle->base_info.dst_mode = OUTPUT_DATA_MODE; +000028 2201 MOVS r2,#1 +;;;937 g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; +00002a 4601 MOV r1,r0 +00002c 7282 STRB r2,[r0,#0xa] ;936 +00002e 2304 MOVS r3,#4 +000030 3118 ADDS r1,r1,#0x18 +000032 748b STRB r3,[r1,#0x12] +;;;938 g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; +000034 74cb STRB r3,[r1,#0x13] +;;;939 g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; /* 可不配置 */ +000036 750a STRB r2,[r1,#0x14] +;;;940 g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; +000038 754a STRB r2,[r1,#0x15] +;;;941 g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; +00003a 4918 LDR r1,|L15.156| +;;;942 g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; /* 注册 DCS处理列表 */ +00003c 6301 STR r1,[r0,#0x30] +00003e 4601 MOV r1,r0 +000040 4b17 LDR r3,|L15.160| +000042 3178 ADDS r1,r1,#0x78 +;;;943 g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; /* 注册dsc read 回调函数,可选,此函数为空时由cus_dcs_entry_table执行 */ +000044 63cb STR r3,[r1,#0x3c] +000046 4b17 LDR r3,|L15.164| +;;;944 +;;;945 g_rx_ctrl_handle->extra_info.flow_control_mode = FC_V2C_NORMAL_MODE; +000048 640b STR r3,[r1,#0x40] +00004a 2102 MOVS r1,#2 +00004c 74c1 STRB r1,[r0,#0x13] +;;;946 +;;;947 g_rx_ctrl_handle->rx_lane_swap = RX_LANE_SWAP_3210; +00004e 21c4 MOVS r1,#0xc4 +000050 540a STRB r2,[r1,r0] +;;;948 g_rx_ctrl_handle->base_info.pn_swap = RX_LANE_0_PN_SWAP|RX_LANE_1_PN_SWAP|RX_LANE_2_PN_SWAP|RX_LANE_3_PN_SWAP|RX_LANE_CLK_PN_SWAP; +000052 211f MOVS r1,#0x1f +000054 8181 STRH r1,[r0,#0xc] +;;;949 // g_rx_ctrl_handle->rx_strength=7; +;;;950 // g_rx_ctrl_handle->hight_performan_mode = HIGHT_PERFORMAN_L2; +;;;951 // g_rx_ctrl_handle->err_handler_level = ERR_HANDLE_L2; +;;;952 +;;;953 hal_dsi_rx_ctrl_set_check_crc(g_rx_ctrl_handle, false); +000056 2100 MOVS r1,#0 +000058 3808 SUBS r0,r0,#8 +00005a f7fffffe BL hal_dsi_rx_ctrl_set_check_crc +;;;954 +;;;955 #if RX_RESOLUTION_CHANGE_ENABLE +;;;956 g_rx_ctrl_handle->pps_update_entry = pps_update_handle; +00005e 68ac LDR r4,[r5,#8] ; g_rx_ctrl_handle +000060 4911 LDR r1,|L15.168| +000062 20c4 MOVS r0,#0xc4 +000064 5101 STR r1,[r0,r4] +;;;957 #endif +;;;958 /* 提前预置PPS, AP 有PPS cmd也会更新 */ +;;;959 if (g_rx_ctrl_handle->compress_en == true) +000066 2035 MOVS r0,#0x35 +000068 5d00 LDRB r0,[r0,r4] +00006a 2801 CMP r0,#1 +00006c d109 BNE |L15.130| +;;;960 { +;;;961 uint8_t pps[128] = { +00006e 2280 MOVS r2,#0x80 +000070 490e LDR r1,|L15.172| +000072 4668 MOV r0,sp +000074 f7fffffe BL __aeabi_memcpy4 +;;;962 0x11,0x00,0x00,0x89,0x30,0x80,0x09,0x60, +;;;963 0x04,0x38,0x00,0x14,0x02,0x1C,0x02,0x1C, +;;;964 0x02,0x00,0x02,0x0E,0x00,0x20,0x01,0xE8, +;;;965 0x00,0x07,0x00,0x0C,0x05,0x0E,0x05,0x16, +;;;966 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00, +;;;967 0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, +;;;968 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B, +;;;969 0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, +;;;970 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8, +;;;971 0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, +;;;972 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x6B,0xF4, +;;;973 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;974 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;975 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;976 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;977 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 +;;;978 }; +;;;979 hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 128); +000078 2280 MOVS r2,#0x80 +00007a 4669 MOV r1,sp +00007c 4620 MOV r0,r4 +00007e f7fffffe BL hal_dsi_rx_ctrl_pre_init_pps + |L15.130| +;;;980 } +;;;981 +;;;982 // g_rx_ctrl_handle->extra_info.blank_info.top = 20; +;;;983 // g_rx_ctrl_handle->extra_info.blank_info.enable = true; +;;;984 +;;;985 /* 初始化rx ctrl */ +;;;986 hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); +000082 68a8 LDR r0,[r5,#8] ; g_rx_ctrl_handle +000084 f7fffffe BL hal_dsi_rx_ctrl_init +;;;987 // hal_dsi_rx_ctrl_set_log_level(kLOG_LEVEL_NONE); +;;;988 +;;;989 #if RX_READ_HW_ACK +;;;990 /* 配置硬件回复 */ +;;;991 app_set_dcs_hw_ack(); +;;;992 #endif +;;;993 +;;;994 #if TX_CMD_MODE_WITHOUT_TE +;;;995 /* 注册接收一帧帧头事件回调,每接收一帧数据TX再往外发一帧 */ +;;;996 //hal_dsi_rx_ctrl_register_callback(g_rx_ctrl_handle, app_rx_event_cb, HAL_RX_FS_EVENT, true, NULL); +;;;997 /* 注册接收第0行数据事件,接收到数据后再往外发送数据,确保不撕裂 */ +;;;998 uint32_t line = 0; +;;;999 hal_dsi_rx_ctrl_register_callback(g_rx_ctrl_handle, app_rx_event_cb, HAL_RX_LINE_EVENT, true, &line); +;;;1000 #endif +;;;1001 +;;;1002 #if RX_START_WITHOUT_RST +;;;1003 /* 等待ap reset置位再启动rx,否则容易收到错误数据 */ +;;;1004 hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +000088 68a8 LDR r0,[r5,#8] ; g_rx_ctrl_handle +00008a f7fffffe BL hal_dsi_rx_ctrl_start +;;;1005 #else +;;;1006 /* 注册RX start callback,确认RX LP11时再启动RX,防止接收错误数据 */ +;;;1007 hal_gpio_set_ap_reset_int(ENABLE, app_mipi_rx_start_cb, DETECT_HIGH_LVL); +;;;1008 #endif +;;;1009 } +00008e b021 ADD sp,sp,#0x84 +000090 bd30 POP {r4,r5,pc} +;;;1010 + ENDP + +000092 0000 DCW 0x0000 + |L15.148| + DCD ||.data|| + |L15.152| + DCD 0x0000096c + |L15.156| + DCD 0x3b9aca00 + |L15.160| + DCD ||.constdata|| + |L15.164| + DCD ap_dcs_read + |L15.168| + DCD pps_update_handle + |L15.172| + DCD ||.constdata||+0x1238 + + AREA ||i.app_mipi_tx_init||, CODE, READONLY, ALIGN=2 + + app_mipi_tx_init PROC +;;;1015 */ +;;;1016 static void app_mipi_tx_init(void) +000000 b510 PUSH {r4,lr} +;;;1017 { +;;;1018 if (g_tx_ctrl_handle == NULL) +000002 4c18 LDR r4,|L16.100| +000004 68e0 LDR r0,[r4,#0xc] ; g_tx_ctrl_handle +000006 2800 CMP r0,#0 +000008 d102 BNE |L16.16| +;;;1019 { +;;;1020 g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); +00000a f7fffffe BL hal_dsi_tx_ctrl_create_handle +00000e 60e0 STR r0,[r4,#0xc] ; g_tx_ctrl_handle + |L16.16| +;;;1021 } +;;;1022 g_tx_ctrl_handle->channel_id = OUTPUT_VC; +000010 4601 MOV r1,r0 +000012 2200 MOVS r2,#0 +000014 3120 ADDS r1,r1,#0x20 +000016 760a STRB r2,[r1,#0x18] +;;;1023 g_tx_ctrl_handle->lane_num = OUTPUT_LANE_NUMBER; +000018 2304 MOVS r3,#4 +00001a 750b STRB r3,[r1,#0x14] +;;;1024 g_tx_ctrl_handle->vid_mode = OUTPUT_VIDEO_MODEL; +00001c 2402 MOVS r4,#2 +00001e 764c STRB r4,[r1,#0x19] +;;;1025 g_tx_ctrl_handle->cmd_tx_type = TX_INIT_TYPE; +000020 2301 MOVS r3,#1 +000022 768b STRB r3,[r1,#0x1a] +;;;1026 g_tx_ctrl_handle->dpi_vsa = OUTPUT_VSA; +;;;1027 g_tx_ctrl_handle->dpi_vbp = OUTPUT_VBP; +000024 2117 MOVS r1,#0x17 +;;;1028 g_tx_ctrl_handle->dpi_vfp = OUTPUT_VFP; +000026 6183 STR r3,[r0,#0x18] +000028 61c1 STR r1,[r0,#0x1c] +;;;1029 g_tx_ctrl_handle->dpi_hsa = OUTPUT_HSA; +;;;1030 g_tx_ctrl_handle->dpi_hbp = OUTPUT_HBP; +00002a 6244 STR r4,[r0,#0x24] +00002c 2118 MOVS r1,#0x18 ;1028 +00002e 6201 STR r1,[r0,#0x20] +000030 2114 MOVS r1,#0x14 +;;;1031 g_tx_ctrl_handle->dpi_hfp = OUTPUT_HFP; +000032 6281 STR r1,[r0,#0x28] +000034 21c8 MOVS r1,#0xc8 +;;;1032 g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; +000036 62c1 STR r1,[r0,#0x2c] +000038 2187 MOVS r1,#0x87 +;;;1033 g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; +00003a 244b MOVS r4,#0x4b +00003c 00c9 LSLS r1,r1,#3 ;1032 +00003e 0164 LSLS r4,r4,#5 +000040 c012 STM r0!,{r1,r4} +;;;1034 g_tx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; +;;;1035 g_tx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; +000042 6001 STR r1,[r0,#0] +000044 4908 LDR r1,|L16.104| +;;;1036 g_tx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; +000046 6041 STR r1,[r0,#4] +000048 7202 STRB r2,[r0,#8] +;;;1037 g_tx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; +00004a 7242 STRB r2,[r0,#9] +;;;1038 g_tx_ctrl_handle->base_info.dst_mode = OUTPUT_DATA_MODE; +00004c 7283 STRB r3,[r0,#0xa] +;;;1039 g_tx_ctrl_handle->tx_frame_rate = 62; +00004e 4907 LDR r1,|L16.108| +000050 6281 STR r1,[r0,#0x28] +000052 3808 SUBS r0,r0,#8 +;;;1040 /* 初始化屏时每一条LP CMD都退出LPDT 再进入发送下一条 */ +;;;1041 /* 解决FT8720 TDDI 显示翻转问题 */ +;;;1042 // g_tx_ctrl_handle->tx_lane_lp = ONLY_DATA_LANE_AUTO_LP; +;;;1043 +;;;1044 hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); +000054 f7fffffe BL hal_dsi_tx_ctrl_init +;;;1045 +;;;1046 /* FIXME set tear on*/ +;;;1047 // hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_60HZ_MODE); +;;;1048 +;;;1049 /* AP 没有发送数据时默认的显示颜色, 量产为0 0 0(黑色), 配置其他颜色仅为debug使用 */ +;;;1050 hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); +000058 2200 MOVS r2,#0 +00005a 4611 MOV r1,r2 +00005c 4610 MOV r0,r2 +00005e f7fffffe BL hal_dsi_tx_ctrl_set_overwrite_rgb +;;;1051 } +000062 bd10 POP {r4,pc} +;;;1052 + ENDP + + |L16.100| + DCD ||.data|| + |L16.104| + DCD 0x0000096c + |L16.108| + DCD 0x42780000 + + AREA ||i.app_mipi_tx_start||, CODE, READONLY, ALIGN=2 + + app_mipi_tx_start PROC +;;;1073 */ +;;;1074 static void app_mipi_tx_start(void) +000000 b570 PUSH {r4-r6,lr} +;;;1075 { +;;;1076 /* Init panel */ +;;;1077 app_init_panel(); +000002 f7fffffe BL app_init_panel +;;;1078 /* TX start */ +;;;1079 hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); +000006 4c15 LDR r4,|L17.92| +000008 68e0 LDR r0,[r4,#0xc] ; g_tx_ctrl_handle +00000a f7fffffe BL hal_dsi_tx_ctrl_start +;;;1080 // hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_60HZ_MODE); +;;;1081 +;;;1082 panel_display_done = true; +00000e 2001 MOVS r0,#1 +000010 7020 STRB r0,[r4,#0] +;;;1083 +;;;1084 delayMs(120); +000012 2078 MOVS r0,#0x78 +000014 f7fffffe BL delayMs +;;;1085 /* Display on */ +;;;1086 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x29); +000018 2329 MOVS r3,#0x29 +00001a 2202 MOVS r2,#2 +00001c 2100 MOVS r1,#0 +00001e 2005 MOVS r0,#5 +000020 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;1087 +;;;1088 #if (TX_USE_CMD_MODE & (!TX_CMD_MODE_WITHOUT_TE)) /* cmd mode输出,并且需要屏的TE输入 */ +;;;1089 // hal_dsi_tx_ctrl_gen_a_frame(); /* FIXME */ +;;;1090 app_tx_cmd_app_init_panel_te_int(IO_PIN_14, DETECT_RISING_EDGE); /* 注册屏端TE中断 */ +000024 2518 MOVS r5,#0x18 +000026 2402 MOVS r4,#2 +000028 2100 MOVS r1,#0 +00002a 4628 MOV r0,r5 +00002c f7fffffe BL hal_gpio_ctrl_eint +000030 4621 MOV r1,r4 +000032 4628 MOV r0,r5 +000034 f7fffffe BL hal_gpio_init_eint +000038 4909 LDR r1,|L17.96| +00003a 4628 MOV r0,r5 +00003c f7fffffe BL hal_gpio_reg_eint_cb +000040 2101 MOVS r1,#1 +000042 4628 MOV r0,r5 +000044 f7fffffe BL hal_gpio_ctrl_eint +;;;1091 #endif +;;;1092 #if AP_SWIRE_OUTPUT +;;;1093 hal_swire_set_pulse(SWIRE_DEFAULT_PULSE); +000048 2025 MOVS r0,#0x25 +00004a f7fffffe BL hal_swire_set_pulse +;;;1094 #endif +;;;1095 TAU_LOGD("tx_start \n"); +00004e 4b05 LDR r3,|L17.100| +000050 4a05 LDR r2,|L17.104| +000052 a106 ADR r1,|L17.108| +000054 2000 MOVS r0,#0 +000056 f7fffffe BL tau_log_printf +;;;1096 } +00005a bd70 POP {r4-r6,pc} +;;;1097 + ENDP + + |L17.92| + DCD ||.data|| + |L17.96| + DCD app_tx_cmd_panel_te_cb + |L17.100| + DCD 0x00000447 + |L17.104| + DCD ||i.Note11Pro_demo||+0x4c + |L17.108| +00006c 5b25735d DCB "[%s] (%04d) tx_start \n",0 +000070 20282530 +000074 34642920 +000078 74785f73 +00007c 74617274 +000080 200a00 +000083 00 DCB 0 + + AREA ||i.app_system_suspend||, CODE, READONLY, ALIGN=2 + + app_system_suspend PROC +;;;1199 */ +;;;1200 static void app_system_suspend(pwr_sleep_mode_e sleep_mode) +000000 b538 PUSH {r3-r5,lr} +;;;1201 { +;;;1202 /* 关闭图像通路 */ +;;;1203 hal_dsi_tx_ctrl_stop(g_tx_ctrl_handle); +000002 4c21 LDR r4,|L18.136| +000004 4605 MOV r5,r0 ;1201 +000006 68e0 LDR r0,[r4,#0xc] ; g_tx_ctrl_handle +000008 f7fffffe BL hal_dsi_tx_ctrl_stop +;;;1204 hal_dsi_tx_ctrl_deinit(g_tx_ctrl_handle); +00000c 68e0 LDR r0,[r4,#0xc] ; g_tx_ctrl_handle +00000e f7fffffe BL hal_dsi_tx_ctrl_deinit +;;;1205 hal_dsi_rx_ctrl_stop(g_rx_ctrl_handle); +000012 68a0 LDR r0,[r4,#8] ; g_rx_ctrl_handle +000014 f7fffffe BL hal_dsi_rx_ctrl_stop +;;;1206 hal_dsi_rx_ctrl_deinit(g_rx_ctrl_handle); +000018 68a0 LDR r0,[r4,#8] ; g_rx_ctrl_handle +00001a f7fffffe BL hal_dsi_rx_ctrl_deinit +;;;1207 +;;;1208 /* Tear拉低 */ +;;;1209 hal_gpio_init_output(IO_PAD_AP_TE, IO_LVL_LOW); +00001e 2100 MOVS r1,#0 +000020 2003 MOVS r0,#3 +000022 f7fffffe BL hal_gpio_init_output +;;;1210 panel_display_done = false; +000026 2000 MOVS r0,#0 +000028 7020 STRB r0,[r4,#0] +;;;1211 #if RX_WAIT_TEAR_ON +;;;1212 sg_ap_set_tear_on = false; +;;;1213 #endif +;;;1214 +;;;1215 /* 关闭外设 比如Swire/I2C/Flash 等 */ +;;;1216 #if AP_SWIRE_OUTPUT +;;;1217 hal_swire_deinit(); +00002a f7fffffe BL hal_swire_deinit +;;;1218 #endif +;;;1219 #if ANALOG_PWM_OUTPUT +;;;1220 hal_pwm_deinit(); +;;;1221 #endif +;;;1222 +;;;1223 #if SHARE_FLASH_ENABLE +;;;1224 hal_flash_share_mode(false); +;;;1225 #endif +;;;1226 +;;;1227 /* 切换TP18 供电 */ +;;;1228 hal_pwr_set_sleep_mode_power(SLEEP_MODE_POWER); +00002e 2001 MOVS r0,#1 +000030 f7fffffe BL hal_pwr_set_sleep_mode_power +;;;1229 +;;;1230 if (sleep_mode == PWR_NORMAL_SLEEP_MODE) +000034 2d00 CMP r5,#0 +000036 d006 BEQ |L18.70| +;;;1231 { +;;;1232 /* normal sleep mode, MCU可以正常工作 */ +;;;1233 hal_gpio_set_ap_reset_int(ENABLE, ap_rstn_pull_high_cb, DETECT_HIGH_LVL); +;;;1234 hal_pwr_enter_normal_sleep_mode(); +;;;1235 } +;;;1236 else if (sleep_mode == PWR_STOP_SLEEP_MODE) +000038 2d01 CMP r5,#1 +00003a d00c BEQ |L18.86| +;;;1237 { +;;;1238 /* 注册对应 wakeup IO */ +;;;1239 hal_pwr_set_stop_sleep_wakeup_pin(IO_PAD_AP_RSTN, WUP_RISING_EDGE); +;;;1240 //hal_pwr_set_stop_sleep_wakeup_pin(IO_PAD_AP_SPIS_CSN, WUP_FALLING_EDGE); +;;;1241 //hal_pwr_set_stop_sleep_wakeup_pin(IO_PAD_TD_INT, WUP_FALLING_EDGE); +;;;1242 io_pad_e wakeup_io = hal_pwr_enter_stop_sleep_mode(); +;;;1243 if (wakeup_io == IO_PAD_AP_RSTN) +;;;1244 { +;;;1245 sg_system_resume = true; +;;;1246 } +;;;1247 else +;;;1248 { +;;;1249 /* Not impletmented */ +;;;1250 TAU_LOGD("wakeup_io %d FIXME touch wakeup convert to AP\n", wakeup_io); +;;;1251 hal_gpio_set_ap_reset_int(ENABLE, ap_rstn_pull_high_cb, DETECT_HIGH_LVL); +;;;1252 } +;;;1253 } +;;;1254 else +;;;1255 { +;;;1256 /* deep sleep mode,配置AP RSTN 上升沿,TD INT 下降沿唤醒 */ +;;;1257 hal_pwr_enter_deep_sleep_mode(WUP_RISING_EDGE, WUP_FALLING_EDGE); +00003c 2103 MOVS r1,#3 +00003e 2002 MOVS r0,#2 +000040 f7fffffe BL hal_pwr_enter_deep_sleep_mode +;;;1258 } +;;;1259 +;;;1260 } +000044 bd38 POP {r3-r5,pc} + |L18.70| +000046 2200 MOVS r2,#0 ;1233 +000048 4910 LDR r1,|L18.140| +00004a 2001 MOVS r0,#1 ;1233 +00004c f7fffffe BL hal_gpio_set_ap_reset_int +000050 f7fffffe BL hal_pwr_enter_normal_sleep_mode +000054 bd38 POP {r3-r5,pc} + |L18.86| +000056 2102 MOVS r1,#2 ;1239 +000058 2011 MOVS r0,#0x11 ;1239 +00005a f7fffffe BL hal_pwr_set_stop_sleep_wakeup_pin +00005e f7fffffe BL hal_pwr_enter_stop_sleep_mode +000062 2811 CMP r0,#0x11 ;1243 +000064 d00c BEQ |L18.128| +000066 9000 STR r0,[sp,#0] ;1250 +000068 4b09 LDR r3,|L18.144| +00006a a20a ADR r2,|L18.148| +00006c a10d ADR r1,|L18.164| +00006e 2000 MOVS r0,#0 ;1250 +000070 f7fffffe BL tau_log_printf +000074 2200 MOVS r2,#0 ;1251 +000076 4905 LDR r1,|L18.140| +000078 2001 MOVS r0,#1 ;1251 +00007a f7fffffe BL hal_gpio_set_ap_reset_int +00007e bd38 POP {r3-r5,pc} + |L18.128| +000080 2001 MOVS r0,#1 ;1245 +000082 7060 STRB r0,[r4,#1] ;1245 +000084 bd38 POP {r3-r5,pc} +;;;1261 + ENDP + +000086 0000 DCW 0x0000 + |L18.136| + DCD ||.data|| + |L18.140| + DCD ap_rstn_pull_high_cb + |L18.144| + DCD 0x000004e2 + |L18.148| +000094 524d204e DCB "RM Note11Pro",0 +000098 6f746531 +00009c 3150726f +0000a0 00 +0000a1 00 DCB 0 +0000a2 00 DCB 0 +0000a3 00 DCB 0 + |L18.164| +0000a4 5b25735d DCB "[%s] (%04d) wakeup_io %d FIXME touch wakeup convert to " +0000a8 20282530 +0000ac 34642920 +0000b0 77616b65 +0000b4 75705f69 +0000b8 6f202564 +0000bc 20464958 +0000c0 4d452074 +0000c4 6f756368 +0000c8 2077616b +0000cc 65757020 +0000d0 636f6e76 +0000d4 65727420 +0000d8 746f20 +0000db 41500a00 DCB "AP\n",0 +0000df 00 DCB 0 + + AREA ||i.app_tx_cmd_panel_te_cb||, CODE, READONLY, ALIGN=2 + + app_tx_cmd_panel_te_cb PROC +;;;885 */ +;;;886 static void app_tx_cmd_panel_te_cb(void *data) +000000 b510 PUSH {r4,lr} +;;;887 { +;;;888 if (panel_display_done) +000002 4803 LDR r0,|L19.16| +000004 7800 LDRB r0,[r0,#0] ; panel_display_done +000006 2800 CMP r0,#0 +000008 d001 BEQ |L19.14| +;;;889 { +;;;890 //delayUs(25); /* 撕裂调试 */ +;;;891 hal_dsi_tx_ctrl_gen_a_frame(); +00000a f7fffffe BL hal_dsi_tx_ctrl_gen_a_frame + |L19.14| +;;;892 } +;;;893 } +00000e bd10 POP {r4,pc} +;;;894 + ENDP + + |L19.16| + DCD ||.data|| + + AREA ||i.pps_update_handle||, CODE, READONLY, ALIGN=2 + + pps_update_handle PROC +;;;242 /* PPS update callback 用于分辨率切换case */ +;;;243 static bool pps_update_handle(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height) +000000 b5fe PUSH {r1-r7,lr} +;;;244 { +;;;245 /* AVDD 上电, 用于解决息屏开屏PPS不更新问题 */ +;;;246 // hal_gpio_set_output_data(IO_PAD_AP_PWMEN, IO_LVL_HIGH); +;;;247 if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) +000002 4e16 LDR r6,|L20.92| +000004 4615 MOV r5,r2 ;244 +000006 68b0 LDR r0,[r6,#8] ; g_rx_ctrl_handle +000008 461c MOV r4,r3 ;244 +00000a 6801 LDR r1,[r0,#0] +00000c 42a9 CMP r1,r5 +00000e d102 BNE |L20.22| +000010 6840 LDR r0,[r0,#4] +000012 42a0 CMP r0,r4 +000014 d01f BEQ |L20.86| + |L20.22| +;;;248 { +;;;249 hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_USER_MODE); +000016 2101 MOVS r1,#1 +000018 68f0 LDR r0,[r6,#0xc] ; g_tx_ctrl_handle +00001a f7fffffe BL hal_dsi_tx_ctrl_set_tear_mode +;;;250 /* PPS Update 且分辨率发生变化 */ +;;;251 g_rx_ctrl_handle->base_info.src_w = pic_width; +00001e 68b0 LDR r0,[r6,#8] ; g_rx_ctrl_handle +;;;252 g_rx_ctrl_handle->base_info.src_h = pic_height; +;;;253 /* 注意部分基板更新PPS前不发 Compression Mode Command的情况 */ +;;;254 g_rx_ctrl_handle->compress_en = true; //hal_dsi_rx_ctrl_get_compressen_en(g_rx_ctrl_handle); +000020 2201 MOVS r2,#1 +000022 6005 STR r5,[r0,#0] +000024 2135 MOVS r1,#0x35 +000026 6044 STR r4,[r0,#4] +000028 540a STRB r2,[r1,r0] +;;;255 g_tx_ctrl_handle->base_info.src_w = pic_width; +00002a 68f1 LDR r1,[r6,#0xc] ; g_tx_ctrl_handle +;;;256 g_tx_ctrl_handle->base_info.src_h = pic_height; +;;;257 +;;;258 hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); +00002c 600d STR r5,[r1,#0] +00002e 604c STR r4,[r1,#4] +000030 f7fffffe BL hal_dsi_rx_ctrl_toggle_resolution +;;;259 TAU_LOGD("resolution update w[%d] h[%d] compress[%d]\n", pic_width, pic_height, g_rx_ctrl_handle->compress_en); +000034 68b0 LDR r0,[r6,#8] ; g_rx_ctrl_handle +000036 23ff MOVS r3,#0xff +000038 3020 ADDS r0,r0,#0x20 +00003a 7d40 LDRB r0,[r0,#0x15] +00003c 9002 STR r0,[sp,#8] +00003e 3304 ADDS r3,#4 +000040 a207 ADR r2,|L20.96| +000042 a10b ADR r1,|L20.112| +000044 9500 STR r5,[sp,#0] +000046 9401 STR r4,[sp,#4] +000048 2000 MOVS r0,#0 +00004a f7fffffe BL tau_log_printf +;;;260 hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_60HZ_MODE); +00004e 2100 MOVS r1,#0 +000050 68f0 LDR r0,[r6,#0xc] ; g_tx_ctrl_handle +000052 f7fffffe BL hal_dsi_tx_ctrl_set_tear_mode + |L20.86| +;;;261 } +;;;262 // TAU_LOGD("PPS Update[%d][%d] [%d][%d]\n", pic_width, pic_height, g_rx_ctrl_handle->base_info.src_w, g_rx_ctrl_handle->base_info.src_h); +;;;263 return true; +000056 2001 MOVS r0,#1 +;;;264 } +000058 bdfe POP {r1-r7,pc} +;;;265 #endif + ENDP + +00005a 0000 DCW 0x0000 + |L20.92| + DCD ||.data|| + |L20.96| +000060 524d204e DCB "RM Note11Pro",0 +000064 6f746531 +000068 3150726f +00006c 00 +00006d 00 DCB 0 +00006e 00 DCB 0 +00006f 00 DCB 0 + |L20.112| +000070 5b25735d DCB "[%s] (%04d) resolution update w[%d] h[%d] compress[%d]\n" +000074 20282530 +000078 34642920 +00007c 7265736f +000080 6c757469 +000084 6f6e2075 +000088 70646174 +00008c 6520775b +000090 25645d20 +000094 685b2564 +000098 5d20636f +00009c 6d707265 +0000a0 73735b25 +0000a4 645d0a +0000a7 00 DCB 0 + + AREA ||.constdata||, DATA, READONLY, ALIGN=2 + + g_cus_rx_dcs_execute_table + DCD 0x00000029 + DCD ap_dcs_set_display_on +000008 00000000 DCB 0x00,0x00,0x00,0x00 + DCD 0x00000028 + DCD ap_dcs_set_display_off +000014 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000060 + DCD ap_update_frame_rate +000020 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000051 + DCD ap_set_backlight +00002c 00000000 DCB 0x00,0x00,0x00,0x00 + DCD 0x00000010 + DCD ap_dcs_set_enter_sleep_mode +000038 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000011 + DCD ap_dcs_set_exit_sleep_mode +000044 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000000 + DCD 0x00000000 +000050 00000000 DCB 0x00,0x00,0x00,0x00 + panel_init_code +000054 3900039c DCB 0x39,0x00,0x03,0x9c +000058 a5a53900 DCB 0xa5,0xa5,0x39,0x00 +00005c 03fd5a5a DCB 0x03,0xfd,0x5a,0x5a +000060 3900029f DCB 0x39,0x00,0x02,0x9f +000064 1039000e DCB 0x10,0x39,0x00,0x0e +000068 bb000000 DCB 0xbb,0x00,0x00,0x00 +00006c 00000000 DCB 0x00,0x00,0x00,0x00 +000070 00000000 DCB 0x00,0x00,0x00,0x00 +000074 00003900 DCB 0x00,0x00,0x39,0x00 +000078 02b30039 DCB 0x02,0xb3,0x00,0x39 +00007c 00029f00 DCB 0x00,0x02,0x9f,0x00 +000080 390004b2 DCB 0x39,0x00,0x04,0xb2 +000084 5a04b539 DCB 0x5a,0x04,0xb5,0x39 +000088 0029b301 DCB 0x00,0x29,0xb3,0x01 +00008c 5c001800 DCB 0x5c,0x00,0x18,0x00 +000090 1800015c DCB 0x18,0x00,0x01,0x5c +000094 00180018 DCB 0x00,0x18,0x00,0x18 +000098 0000ae00 DCB 0x00,0x00,0xae,0x00 +00009c 1609b400 DCB 0x16,0x09,0xb4,0x00 +0000a0 00ae0016 DCB 0x00,0xae,0x00,0x16 +0000a4 09b40000 DCB 0x09,0xb4,0x00,0x00 +0000a8 ae001800 DCB 0xae,0x00,0x18,0x00 +0000ac b4422020 DCB 0xb4,0x42,0x20,0x20 +0000b0 20202039 DCB 0x20,0x20,0x20,0x39 +0000b4 0027b400 DCB 0x00,0x27,0xb4,0x00 +0000b8 c0323211 DCB 0xc0,0x32,0x32,0x11 +0000bc 11111212 DCB 0x11,0x11,0x12,0x12 +0000c0 12121212 DCB 0x12,0x12,0x12,0x12 +0000c4 10109151 DCB 0x10,0x10,0x91,0x51 +0000c8 91519151 DCB 0x91,0x51,0x91,0x51 +0000cc 10131313 DCB 0x10,0x13,0x13,0x13 +0000d0 13333310 DCB 0x13,0x33,0x33,0x10 +0000d4 10101010 DCB 0x10,0x10,0x10,0x10 +0000d8 10101012 DCB 0x10,0x10,0x10,0x12 +0000dc 2639000e DCB 0x26,0x39,0x00,0x0e +0000e0 b610100f DCB 0xb6,0x10,0x10,0x0f +0000e4 00000000 DCB 0x00,0x00,0x00,0x00 +0000e8 00000000 DCB 0x00,0x00,0x00,0x00 +0000ec 00003900 DCB 0x00,0x00,0x39,0x00 +0000f0 13b70011 DCB 0x13,0xb7,0x00,0x11 +0000f4 33005555 DCB 0x33,0x00,0x55,0x55 +0000f8 55555555 DCB 0x55,0x55,0x55,0x55 +0000fc 55555540 DCB 0x55,0x55,0x55,0x40 +000100 40401500 DCB 0x40,0x40,0x15,0x00 +000104 39000ab8 DCB 0x39,0x00,0x0a,0xb8 +000108 00000328 DCB 0x00,0x00,0x03,0x28 +00010c 0f03280f DCB 0x0f,0x03,0x28,0x0f +000110 00390013 DCB 0x00,0x39,0x00,0x13 +000114 b9010132 DCB 0xb9,0x01,0x01,0x32 +000118 32323232 DCB 0x32,0x32,0x32,0x32 +00011c 32323232 DCB 0x32,0x32,0x32,0x32 +000120 32012d2d DCB 0x32,0x01,0x2d,0x2d +000124 2d2d2d39 DCB 0x2d,0x2d,0x2d,0x39 +000128 001dba00 DCB 0x00,0x1d,0xba,0x00 +00012c ff340334 DCB 0xff,0x34,0x03,0x34 +000130 031441a0 DCB 0x03,0x14,0x41,0xa0 +000134 40aa78a0 DCB 0x40,0xaa,0x78,0xa0 +000138 40aa78a0 DCB 0x40,0xaa,0x78,0xa0 +00013c 40aa78a0 DCB 0x40,0xaa,0x78,0xa0 +000140 40aa78a0 DCB 0x40,0xaa,0x78,0xa0 +000144 40aa7839 DCB 0x40,0xaa,0x78,0x39 +000148 001abb22 DCB 0x00,0x1a,0xbb,0x22 +00014c 19020015 DCB 0x19,0x02,0x00,0x15 +000150 11313131 DCB 0x11,0x31,0x31,0x31 +000154 31310000 DCB 0x31,0x31,0x00,0x00 +000158 0001805a DCB 0x00,0x01,0x80,0x5a +00015c 0194028e DCB 0x01,0x94,0x02,0x8e +000160 5a115454 DCB 0x5a,0x11,0x54,0x54 +000164 3900029f DCB 0x39,0x00,0x02,0x9f +000168 01390003 DCB 0x01,0x39,0x00,0x03 +00016c c01a7139 DCB 0xc0,0x1a,0x71,0x39 +000170 0021c111 DCB 0x00,0x21,0xc1,0x11 +000174 00008930 DCB 0x00,0x00,0x89,0x30 +000178 80096c04 DCB 0x80,0x09,0x6c,0x04 +00017c 38000c02 DCB 0x38,0x00,0x0c,0x02 +000180 1c021c02 DCB 0x1c,0x02,0x1c,0x02 +000184 00020e00 DCB 0x00,0x02,0x0e,0x00 +000188 20011f00 DCB 0x20,0x01,0x1f,0x00 +00018c 07000c08 DCB 0x07,0x00,0x0c,0x08 +000190 bb087a39 DCB 0xbb,0x08,0x7a,0x39 +000194 0021c218 DCB 0x00,0x21,0xc2,0x18 +000198 0010f003 DCB 0x00,0x10,0xf0,0x03 +00019c 0c200006 DCB 0x0c,0x20,0x00,0x06 +0001a0 0b0b330e DCB 0x0b,0x0b,0x33,0x0e +0001a4 1c2a3846 DCB 0x1c,0x2a,0x38,0x46 +0001a8 54626970 DCB 0x54,0x62,0x69,0x70 +0001ac 77797b7d DCB 0x77,0x79,0x7b,0x7d +0001b0 7e010201 DCB 0x7e,0x01,0x02,0x01 +0001b4 00094039 DCB 0x00,0x09,0x40,0x39 +0001b8 0019c309 DCB 0x00,0x19,0xc3,0x09 +0001bc be19fc19 DCB 0xbe,0x19,0xfc,0x19 +0001c0 fa19f81a DCB 0xfa,0x19,0xf8,0x1a +0001c4 381a781a DCB 0x38,0x1a,0x78,0x1a +0001c8 b62af62b DCB 0xb6,0x2a,0xf6,0x2b +0001cc 342b743b DCB 0x34,0x2b,0x74,0x3b +0001d0 746bf439 DCB 0x74,0x6b,0xf4,0x39 +0001d4 000fca21 DCB 0x00,0x0f,0xca,0x21 +0001d8 40000000 DCB 0x40,0x00,0x00,0x00 +0001dc 00000000 DCB 0x00,0x00,0x00,0x00 +0001e0 000002f0 DCB 0x00,0x00,0x02,0xf0 +0001e4 a039000b DCB 0xa0,0x39,0x00,0x0b +0001e8 cb330f04 DCB 0xcb,0x33,0x0f,0x04 +0001ec 03070a0a DCB 0x03,0x07,0x0a,0x0a +0001f0 01060a39 DCB 0x01,0x06,0x0a,0x39 +0001f4 0002d777 DCB 0x00,0x02,0xd7,0x77 +0001f8 390002b2 DCB 0x39,0x00,0x02,0xb2 +0001fc 85390002 DCB 0x85,0x39,0x00,0x02 +000200 9f023900 DCB 0x9f,0x02,0x39,0x00 +000204 19b90050 DCB 0x19,0xb9,0x00,0x50 +000208 40000001 DCB 0x40,0x00,0x00,0x01 +00020c 1f000000 DCB 0x1f,0x00,0x00,0x00 +000210 003000ff DCB 0x00,0x30,0x00,0xff +000214 3008ff30 DCB 0x30,0x08,0xff,0x30 +000218 08ff3000 DCB 0x08,0xff,0x30,0x00 +00021c 00003900 DCB 0x00,0x00,0x39,0x00 +000220 1aba0af5 DCB 0x1a,0xba,0x0a,0xf5 +000224 f5f5f5f1 DCB 0xf5,0xf5,0xf5,0xf1 +000228 0f003333 DCB 0x0f,0x00,0x33,0x33 +00022c 00324000 DCB 0x00,0x32,0x40,0x00 +000230 32400032 DCB 0x32,0x40,0x00,0x32 +000234 40003240 DCB 0x40,0x00,0x32,0x40 +000238 00324039 DCB 0x00,0x32,0x40,0x39 +00023c 000dbb01 DCB 0x00,0x0d,0xbb,0x01 +000240 000d0d0d DCB 0x00,0x0d,0x0d,0x0d +000244 0d010000 DCB 0x0d,0x01,0x00,0x00 +000248 00000039 DCB 0x00,0x00,0x00,0x39 +00024c 0015be01 DCB 0x00,0x15,0xbe,0x01 +000250 10101111 DCB 0x10,0x10,0x11,0x11 +000254 03151514 DCB 0x03,0x15,0x15,0x14 +000258 14301819 DCB 0x14,0x30,0x18,0x19 +00025c 0f0f0000 DCB 0x0f,0x0f,0x00,0x00 +000260 00000039 DCB 0x00,0x00,0x00,0x39 +000264 0015bf01 DCB 0x00,0x15,0xbf,0x01 +000268 10101111 DCB 0x10,0x10,0x11,0x11 +00026c 03151514 DCB 0x03,0x15,0x15,0x14 +000270 14301819 DCB 0x14,0x30,0x18,0x19 +000274 0f0f0000 DCB 0x0f,0x0f,0x00,0x00 +000278 00000039 DCB 0x00,0x00,0x00,0x39 +00027c 0033c001 DCB 0x00,0x33,0xc0,0x01 +000280 00000201 DCB 0x00,0x00,0x02,0x01 +000284 00020100 DCB 0x00,0x02,0x01,0x00 +000288 02010002 DCB 0x02,0x01,0x00,0x02 +00028c 01000201 DCB 0x01,0x00,0x02,0x01 +000290 00000000 DCB 0x00,0x00,0x00,0x00 +000294 00000000 DCB 0x00,0x00,0x00,0x00 +000298 00000000 DCB 0x00,0x00,0x00,0x00 +00029c 00000000 DCB 0x00,0x00,0x00,0x00 +0002a0 00001000 DCB 0x00,0x00,0x10,0x00 +0002a4 5c10005c DCB 0x5c,0x10,0x00,0x5c +0002a8 0000af00 DCB 0x00,0x00,0xaf,0x00 +0002ac 00af0000 DCB 0x00,0xaf,0x00,0x00 +0002b0 af390033 DCB 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0x00,0x2d,0xc2,0x00 +0010f4 00000000 DCB 0x00,0x00,0x00,0x00 +0010f8 00000000 DCB 0x00,0x00,0x00,0x00 +0010fc 00000000 DCB 0x00,0x00,0x00,0x00 +001100 00000000 DCB 0x00,0x00,0x00,0x00 +001104 00000000 DCB 0x00,0x00,0x00,0x00 +001108 00000000 DCB 0x00,0x00,0x00,0x00 +00110c 00000000 DCB 0x00,0x00,0x00,0x00 +001110 00000000 DCB 0x00,0x00,0x00,0x00 +001114 00000000 DCB 0x00,0x00,0x00,0x00 +001118 00000000 DCB 0x00,0x00,0x00,0x00 +00111c 00000039 DCB 0x00,0x00,0x00,0x39 +001120 0019d30f DCB 0x00,0x19,0xd3,0x0f +001124 ff0edd0d DCB 0xff,0x0e,0xdd,0x0d +001128 bb08f305 DCB 0xbb,0x08,0xf3,0x05 +00112c 51038803 DCB 0x51,0x03,0x88,0x03 +001130 87023701 DCB 0x87,0x02,0x37,0x01 +001134 2600b000 DCB 0x26,0x00,0xb0,0x00 +001138 01000039 DCB 0x01,0x00,0x00,0x39 +00113c 0015d40f DCB 0x00,0x15,0xd4,0x0f +001140 ff0aaa02 DCB 0xff,0x0a,0xaa,0x02 +001144 2200000f DCB 0x22,0x00,0x00,0x0f +001148 ff0aaa02 DCB 0xff,0x0a,0xaa,0x02 +00114c 2200000f DCB 0x22,0x00,0x00,0x0f +001150 ff0aaa39 DCB 0xff,0x0a,0xaa,0x39 +001154 0013d580 DCB 0x00,0x13,0xd5,0x80 +001158 93800ad2 DCB 0x93,0x80,0x0a,0xd2 +00115c 800ad280 DCB 0x80,0x0a,0xd2,0x80 +001160 0ad2800a DCB 0x0a,0xd2,0x80,0x0a +001164 d2800ad2 DCB 0xd2,0x80,0x0a,0xd2 +001168 cf390002 DCB 0xcf,0x39,0x00,0x02 +00116c 9f0b3900 DCB 0x9f,0x0b,0x39,0x00 +001170 0cb2011f DCB 0x0c,0xb2,0x01,0x1f +001174 0f2f0f0f DCB 0x0f,0x2f,0x0f,0x0f +001178 0f0f0f0f DCB 0x0f,0x0f,0x0f,0x0f +00117c 0f39001a DCB 0x0f,0x39,0x00,0x1a +001180 b3720075 DCB 0xb3,0x72,0x00,0x75 +001184 75241cb6 DCB 0x75,0x24,0x1c,0xb6 +001188 14a74100 DCB 0x14,0xa7,0x41,0x00 +00118c 808000ff DCB 0x80,0x80,0x00,0xff +001190 ffffffff DCB 0xff,0xff,0xff,0xff +001194 ff080000 DCB 0xff,0x08,0x00,0x00 +001198 00003900 DCB 0x00,0x00,0x39,0x00 +00119c 20b400bf DCB 0x20,0xb4,0x00,0xbf +0011a0 ffffffff DCB 0xff,0xff,0xff,0xff +0011a4 aababa00 DCB 0xaa,0xba,0xba,0x00 +0011a8 cfcfa5a5 DCB 0xcf,0xcf,0xa5,0xa5 +0011ac bfd5ffff DCB 0xbf,0xd5,0xff,0xff +0011b0 00e5ffff DCB 0x00,0xe5,0xff,0xff +0011b4 ffffffe5 DCB 0xff,0xff,0xff,0xe5 +0011b8 e5008888 DCB 0xe5,0x00,0x88,0x88 +0011bc 8839001a DCB 0x88,0x39,0x00,0x1a +0011c0 b7720020 DCB 0xb7,0x72,0x00,0x20 +0011c4 20201c3e DCB 0x20,0x20,0x1c,0x3e +0011c8 00000000 DCB 0x00,0x00,0x00,0x00 +0011cc 2a2a0000 DCB 0x2a,0x2a,0x00,0x00 +0011d0 00ffffff DCB 0x00,0xff,0xff,0xff +0011d4 ff080000 DCB 0xff,0x08,0x00,0x00 +0011d8 00003900 DCB 0x00,0x00,0x39,0x00 +0011dc 20b88f8f DCB 0x20,0xb8,0x8f,0x8f +0011e0 df9fbf3f DCB 0xdf,0x9f,0xbf,0x3f +0011e4 ffffffff DCB 0xff,0xff,0xff,0xff +0011e8 6f7fffff DCB 0x6f,0x7f,0xff,0xff +0011ec ff7f2f1f DCB 0xff,0x7f,0x2f,0x1f +0011f0 ffffcfef DCB 0xff,0xff,0xcf,0xef +0011f4 dfbfcfef DCB 0xdf,0xbf,0xcf,0xef +0011f8 ef008888 DCB 0xef,0x00,0x88,0x88 +0011fc 8839000f DCB 0x88,0x39,0x00,0x0f +001200 c70000c0 DCB 0xc7,0x00,0x00,0xc0 +001204 00ef00f5 DCB 0x00,0xef,0x00,0xf5 +001208 f500f5f5 DCB 0xf5,0x00,0xf5,0xf5 +00120c c000ef39 DCB 0xc0,0x00,0xef,0x39 +001210 00024800 DCB 0x00,0x02,0x48,0x00 +001214 39000253 DCB 0x39,0x00,0x02,0x53 +001218 e0390001 DCB 0xe0,0x39,0x00,0x01 +00121c 35390003 DCB 0x35,0x39,0x00,0x03 +001220 510fff00 DCB 0x51,0x0f,0xff,0x00 +001224 07020100 DCB 0x07,0x02,0x01,0x00 +001228 08020100 DCB 0x08,0x02,0x01,0x00 +00122c 02020100 DCB 0x02,0x02,0x01,0x00 +001230 18020002 DCB 0x18,0x02,0x00,0x02 +001234 03010202 DCB 0x03,0x01,0x02,0x02 +001238 11000089 DCB 0x11,0x00,0x00,0x89 +00123c 30800960 DCB 0x30,0x80,0x09,0x60 +001240 04380014 DCB 0x04,0x38,0x00,0x14 +001244 021c021c DCB 0x02,0x1c,0x02,0x1c +001248 0200020e DCB 0x02,0x00,0x02,0x0e +00124c 002001e8 DCB 0x00,0x20,0x01,0xe8 +001250 0007000c DCB 0x00,0x07,0x00,0x0c +001254 050e0516 DCB 0x05,0x0e,0x05,0x16 +001258 180010f0 DCB 0x18,0x00,0x10,0xf0 +00125c 030c2000 DCB 0x03,0x0c,0x20,0x00 +001260 060b0b33 DCB 0x06,0x0b,0x0b,0x33 +001264 0e1c2a38 DCB 0x0e,0x1c,0x2a,0x38 +001268 46546269 DCB 0x46,0x54,0x62,0x69 +00126c 7077797b DCB 0x70,0x77,0x79,0x7b +001270 7d7e0102 DCB 0x7d,0x7e,0x01,0x02 +001274 01000940 DCB 0x01,0x00,0x09,0x40 +001278 09be19fc DCB 0x09,0xbe,0x19,0xfc +00127c 19fa19f8 DCB 0x19,0xfa,0x19,0xf8 +001280 1a381a78 DCB 0x1a,0x38,0x1a,0x78 +001284 1ab62af6 DCB 0x1a,0xb6,0x2a,0xf6 +001288 2b342b74 DCB 0x2b,0x34,0x2b,0x74 +00128c 3b746bf4 DCB 0x3b,0x74,0x6b,0xf4 +001290 00000000 DCB 0x00,0x00,0x00,0x00 +001294 00000000 DCB 0x00,0x00,0x00,0x00 +001298 00000000 DCB 0x00,0x00,0x00,0x00 +00129c 00000000 DCB 0x00,0x00,0x00,0x00 +0012a0 00000000 DCB 0x00,0x00,0x00,0x00 +0012a4 00000000 DCB 0x00,0x00,0x00,0x00 +0012a8 00000000 DCB 0x00,0x00,0x00,0x00 +0012ac 00000000 DCB 0x00,0x00,0x00,0x00 +0012b0 00000000 DCB 0x00,0x00,0x00,0x00 +0012b4 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||.data||, DATA, ALIGN=2 + + panel_display_done +000000 00 DCB 0x00 + sg_system_resume +000001 00 DCB 0x00 + sg_system_suspend +000002 00 DCB 0x00 + AOD_ON +000003 00 DCB 0x00 + note10_pro +000004 00 DCB 0x00 + display_on_flag +000005 000000 DCB 0x00,0x00,0x00 + g_rx_ctrl_handle + DCD 0x00000000 + g_tx_ctrl_handle + DCD 0x00000000 + + AREA ||area_number.25||, DATA, ALIGN=0 + + EXPORTAS ||area_number.25||, ||.data|| + phone_start_flag +000000 00 DCB 0x00 + + AREA ||area_number.26||, DATA, ALIGN=1 + + EXPORTAS ||area_number.26||, ||.data|| + value_reg_b1 +000000 0000 DCW 0x0000 + + AREA ||area_number.27||, DATA, ALIGN=2 + + EXPORTAS ||area_number.27||, ||.data|| + value_reg_ca + DCD 0x00000000 + + AREA ||area_number.28||, DATA, ALIGN=0 + + EXPORTAS ||area_number.28||, ||.data|| + s_pps +000000 11000089 DCB 0x11,0x00,0x00,0x89 +000004 30800960 DCB 0x30,0x80,0x09,0x60 +000008 04380014 DCB 0x04,0x38,0x00,0x14 +00000c 021c021c DCB 0x02,0x1c,0x02,0x1c +000010 0200020e DCB 0x02,0x00,0x02,0x0e +000014 002001e8 DCB 0x00,0x20,0x01,0xe8 +000018 0007000c DCB 0x00,0x07,0x00,0x0c +00001c 050e0516 DCB 0x05,0x0e,0x05,0x16 +000020 180010f0 DCB 0x18,0x00,0x10,0xf0 +000024 030c2000 DCB 0x03,0x0c,0x20,0x00 +000028 060b0b33 DCB 0x06,0x0b,0x0b,0x33 +00002c 0e1c2a38 DCB 0x0e,0x1c,0x2a,0x38 +000030 46546269 DCB 0x46,0x54,0x62,0x69 +000034 7077797b DCB 0x70,0x77,0x79,0x7b +000038 7d7e0102 DCB 0x7d,0x7e,0x01,0x02 +00003c 01000940 DCB 0x01,0x00,0x09,0x40 +000040 09be19fc DCB 0x09,0xbe,0x19,0xfc +000044 19fa19f8 DCB 0x19,0xfa,0x19,0xf8 +000048 1a381a78 DCB 0x1a,0x38,0x1a,0x78 +00004c 1ab62af6 DCB 0x1a,0xb6,0x2a,0xf6 +000050 2b342b74 DCB 0x2b,0x34,0x2b,0x74 +000054 3b746bf4 DCB 0x3b,0x74,0x6b,0xf4 +000058 00000000 DCB 0x00,0x00,0x00,0x00 +00005c 00000000 DCB 0x00,0x00,0x00,0x00 +000060 00000000 DCB 0x00,0x00,0x00,0x00 +000064 00000000 DCB 0x00,0x00,0x00,0x00 +000068 00000000 DCB 0x00,0x00,0x00,0x00 +00006c 00000000 DCB 0x00,0x00,0x00,0x00 +000070 00000000 DCB 0x00,0x00,0x00,0x00 +000074 00000000 DCB 0x00,0x00,0x00,0x00 +000078 00000000 DCB 0x00,0x00,0x00,0x00 +00007c 00000000 DCB 0x00,0x00,0x00,0x00 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\RM_Note11Pro\\RM_Note11Pro_demo.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___19_RM_Note11Pro_demo_c_c64640cd____REV16| +#line 467 "C:\\Users\\suppo\\AppData\\Local\\Arm\\Packs\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___19_RM_Note11Pro_demo_c_c64640cd____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___19_RM_Note11Pro_demo_c_c64640cd____REVSH| +#line 482 +|__asm___19_RM_Note11Pro_demo_c_c64640cd____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/WL668T/Objects/WL668T_Honor90Pro_20240424.bin b/project/WL668T/Objects/WL668T_Honor90Pro_20240424.bin new file mode 100644 index 0000000..e40639c Binary files /dev/null and b/project/WL668T/Objects/WL668T_Honor90Pro_20240424.bin differ diff --git a/project/WL668T/Objects/WL668T_Note11Pro_3520_20240416.bin b/project/WL668T/Objects/WL668T_Note11Pro_3520_20240416.bin new file mode 100644 index 0000000..080ffad Binary files /dev/null and b/project/WL668T/Objects/WL668T_Note11Pro_3520_20240416.bin differ diff --git a/project/WL668T/RTE/_WL668/RTE_Components.h b/project/WL668T/RTE/_WL668/RTE_Components.h new file mode 100644 index 0000000..dc14542 --- /dev/null +++ b/project/WL668T/RTE/_WL668/RTE_Components.h @@ -0,0 +1,21 @@ + +/* + * Auto generated Run-Time-Environment Configuration File + * *** Do not modify ! *** + * + * Project: 'WL668T' + * Target: 'WL668' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "ARMCM0.h" + + + +#endif /* RTE_COMPONENTS_H */ diff --git a/project/WL668T/RTE/_WL668T/RTE_Components.h b/project/WL668T/RTE/_WL668T/RTE_Components.h new file mode 100644 index 0000000..4cd3582 --- /dev/null +++ b/project/WL668T/RTE/_WL668T/RTE_Components.h @@ -0,0 +1,21 @@ + +/* + * Auto generated Run-Time-Environment Configuration File + * *** Do not modify ! *** + * + * Project: 'WL668T' + * Target: 'WL668T' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "ARMCM0.h" + + + +#endif /* RTE_COMPONENTS_H */ diff --git a/project/WL668T/WL668T.uvprojx b/project/WL668T/WL668T.uvprojx new file mode 100644 index 0000000..0f000d3 --- /dev/null +++ b/project/WL668T/WL668T.uvprojx @@ -0,0 +1,461 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + WL668T + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM0 + ARM + ARM.CMSIS.5.5.1 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + 0 + $$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h + + + + + + + + + + + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Objects\ + WL668T_Honor90Pro_20240424 + 1 + 0 + 1 + 1 + 1 + .\Listings\ + 1 + 0 + 1 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin -o .\Objects\@L.bin .\Objects\@L.axf + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 16 + 1 + 1 + 0 + 0 + 4 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x2000 + + + 1 + 0x10000 + 0x10000 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x70000 + 0x8000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 3 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + + + ..\..\src;..\..\src\board;..\..\src\common;..\..\src\sdk\include;..\..\src\sdk\include\M0;..\..\src\app;..\..\src\app\Honor 90Pro;..\..\src\aod\aod;..\..\src\aod\aod_draw_mode;..\..\src\aod\draw_mode + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + app + + + main.c + 1 + ..\..\src\app\main.c + + + Honor90Pro_demo.c + 1 + ..\..\src\app\Honor 90Pro\Honor90Pro_demo.c + + + + + driver + + + CVWL668T.lib + 4 + ..\..\src\sdk\CVWL668T\lib\CVWL668T.lib + + + + + board + + + board.c + 1 + ..\..\src\board\board.c + + + + + startup + + + startup_ARMCM0.s + 2 + ..\..\src\board\startup\startup_ARMCM0.s + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + RTE\Device\ARMCM0\startup_ARMCM0.s + + + + + + RTE\Device\ARMCM0\system_ARMCM0.c + + + + + + + + diff --git a/project/请先读我（已更新20230915）.txt b/project/请先读我（已更新20230915）.txt new file mode 100644 index 0000000..9bb028c --- /dev/null +++ b/project/请先读我（已更新20230915）.txt @@ -0,0 +1,11 @@ +1. 此目录下所有project文件仅为链接文件（使用宏定义和库文件区分） + +2. 强烈建议将不使用的芯片型号文件夹删除，仅保留使用的芯片型号文件夹，以免串烧导致芯片烧坏 + +3. 如若更换芯片，仅需将提供的原工程下特定型号文件夹拷贝到模板工程，删除原芯片project下原型号文件夹，重新编译即可 + 如原来使用668芯片，后面更换为668T芯片，仅需把客户工程project下668文件夹删除，重新从提供的源工程下的668T文件夹拷贝到客户工程project下，打开重新编译即可 + +注：SDK每次更新会在demo.c中增加代码或注释，请自行阅读。 + + +第三代产品包括：WL668,668T,468 \ No newline at end of file diff --git a/src/app/Honor 90Pro/Honor90Pro_demo.c b/src/app/Honor 90Pro/Honor90Pro_demo.c new file mode 100644 index 0000000..92ff950 --- /dev/null +++ b/src/app/Honor 90Pro/Honor90Pro_demo.c @@ -0,0 +1,2615 @@ +/******************************************************************************* +* +* File: Mi12Lite.c +* Description: 系统测试文件 +* Version: V0.1 +* Date: 2020-02-22 +* Author: Tempest + *******************************************************************************/ +#include "Honor90Pro_demo.h" +#include "ArmCM0.h" +#include "tau_device_datatype.h" +#include "tau_log.h" +#include "tau_operations.h" +#include "tau_common.h" +#include "tau_delay.h" +#include "hal_dsi_rx_ctrl.h" +#include "hal_dsi_tx_ctrl.h" +#include "hal_swire.h" +#include "hal_timer.h" +#include "hal_system.h" +#include "hal_gpio.h" +#include "test_cfg_global.h" +#include "hal_pwr.h" +#include "hal_pwm.h" + + +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "Honor90Pro" + +#if _DEMO_HONOR_90Pro_EN + +/******************** FEATURE开关 ********************/ +#define TOUCH_ENABLE false /* Touch转换开关 */ +#define RX_START_WITHOUT_RST false /* 不等待AP RESET直接启动RX,仅作为调试使用 */ +#define RX_WAIT_TEAR_ON false /* 等待AP_TEAR_ON */ +#define RX_RESOLUTION_CHANGE_ENABLE true /* 支持分辨率切换开关, AP存在分辨率切换时需要打开 */ +#define RX_READ_HW_ACK true /* AP DCS读命令使用硬件回复 */ +#define TX_START_AFTER_APRST false /* 等待AP_reset 后做Panel初始化, 用于热拔插电源不稳定导致初始化失败 */ +#define TX_USE_CMD_MODE false /* command mode输出开关 配置为True时需要把TD TE与 AP TE 接一起*/ +#define TX_CMD_MODE_WITHOUT_TE false /* 屏端TE直接输出给AP,Scaler不看TE信号,AP每输入一帧输出一帧(C2C 60Hz->60Hz) */ +#define AP_SWIRE_OUTPUT true /* swire信号输出,OLED项目配置 */ +#define ANALOG_PWM_OUTPUT false /* 模拟PWM 调光开关 */ +#define SHARE_FLASH_ENABLE false /* 共享flash开关 */ + +/*****************************************************/ + +/******************** 输出屏幕选择 ********************/ +#define AMOLED_ICNA3520 1 /* 4lane FHD Panel */ +/*****************************************************/ + +#define TOUCH_PHONE_DIS_OFF_PIN IO_PIN_6 // 通话熄屏响应管脚 + +/****************** 系统相关参数配置 ******************/ +#define MAIN_POWER_SELECT PWR_SEL_VCC /* 主供电电源选择 */ +#define SLEEP_MODE_POWER PWR_SLEEP_IN_TP18 /* 息屏电源选择 */ +#define SLEEP_MODE_SELECT PWR_DEEP_SLEEP_MODE /* sleep mode 配置 */ +#define SWIRE_DEFAULT_PULSE 37 /* SWIRE 波形配置 */ +#define PWM_FREQUENCY 30000 /* PWM输出频率30Khz */ +#define PWM_DUTY_STEP 255 /* PWM调光阶数255阶 */ +/*****************************************************/ + +/********************RX 基本参数配置*******************/ +//AP MIPI数据信息 +/* 输入分辨率 */ +#define INPUT_WIDTH 1224 +#define INPUT_HEIGHT 2700 +/* 输入 MIPI lane rate,需要正确配置,可50M step调整 */ +#define INPUT_MIPI_LANE_RATE 1200000000 +/* 输入图像格式 */ +#define INPUT_COLOR_MODE DSI_RGB10_10_10 +/* 输出数据格式(DSI_DATA_CMD_MODE , DSI_DATA_VIDEO_MODE) */ +#define INPUT_DATA_MODE DSI_DATA_CMD_MODE +/* 输入mipi lane数量(DSI_RX_LANE_x x为1-4) */ +#define INPUT_MIPI_LANE_NUM DSI_LANE_4 +/* 输入为video mode 时数据格式 */ +#define INPUT_VIDEO_MODEL DSI_NONBURST_EVENT +/* 输入虚拟通道(0-3) */ +#define INPUT_VC DSI_VC_0 +/* 输入的帧率(60/90/120/144Hz) */ +#define INPUT_FRAME_RATE DSI_FRAME_RATE_60HZ +/* 输入数据是否DSC压缩 */ +#define INPUT_COMPRESS true +/*****************************************************/ + +/********************TX 基本参数配置*******************/ +#if AMOLED_ICNA3520 +/* 输出分辨率配置 */ +#define OUTPUT_WIDTH 1224 +#define OUTPUT_HEIGHT 2700 +/* 输出虚拟通道(0-3) */ +#define OUTPUT_VC DSI_VC_0 +/* 输出mipi lane数量(DSI_RX_LANE_x x为1-4) */ +#define OUTPUT_LANE_NUMBER DSI_LANE_4 +/* 输出数据格式(DSI_DATA_CMD_MODE , DSI_DATA_VIDEO_MODE) */ +#if TX_USE_CMD_MODE +#define OUTPUT_DATA_MODE DSI_DATA_CMD_MODE +#else +#define OUTPUT_DATA_MODE DSI_DATA_VIDEO_MODE +#endif +/* 输出为video mode时的数据格式 */ +#define OUTPUT_VIDEO_MODEL DSI_BURST_MODE +/* 输出 VSA */ +#define OUTPUT_VSA 1//2 +/* 输出 VBP */ +#define OUTPUT_VBP 8//24 //20 +/* 输出 VBP */ +#define OUTPUT_VFP 24 // 14 +/* 输出 VSA */ +#define OUTPUT_HSA 2 //8 +/* 输出 HBP */ +#define OUTPUT_HBP 20 //31 +/* 输出 HFP */ +#define OUTPUT_HFP 30 //200 +/* 初始化模式命令传输类型 LP/HS */ +#define TX_INIT_TYPE DSI_CMD_TX_LP +#endif +/******************************************************/ + +#if TOUCH_ENABLE +#include "app_tp_transfer.h" +#endif + +/* 全局handle */ +static hal_dsi_rx_ctrl_handle_t *g_rx_ctrl_handle = NULL; +static hal_dsi_tx_ctrl_handle_t *g_tx_ctrl_handle = NULL; + +/* 屏初始化完成标志位 */ +static bool panel_display_done = false; +static bool sg_system_resume = false; +static bool sg_system_suspend = false; +static bool sg_exit_idle_mode_flag = false; +static bool AOD_ON = false; +static bool rame_update_120HZ = false; + +uint8_t phone_start_flag = 0; + + +static uint32_t src_bl; + + +static bool AOD_51_ON=false; +static bool panel_init_ready = true; + +#if RX_WAIT_TEAR_ON +static bool sg_ap_set_tear_on = false; +#endif +#if TX_START_AFTER_APRST +static bool sg_tx_start_in_process = false; +#endif + +void Gpio_swire_output(uint8_t flag, uint8_t num); + +/* AP reset 回调函数声明 */ +static void ap_rstn_pull_high_cb(void *data); +static void ap_rstn_pull_down_cb(void *data); +static void app_mipi_rx_start_cb(void *data); + +bool note10_pro = false; + +/*************************DCS 命令处理函数 BEGIN*************************/ +#if RX_READ_HW_ACK +/** +* @brief 配置AP硬件回读 +* @param none +* @retval none +*/ +static void app_set_dcs_hw_ack() +{ + hal_dsi_rx_ctrl_set_auto_ack(g_rx_ctrl_handle, HAL_RX_QRESP_CODE0, DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, 0xBE, 1, 0x00); + hal_dsi_rx_ctrl_set_auto_ack(g_rx_ctrl_handle, HAL_RX_QRESP_CODE1, DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, 0xFA, 1, 0x01); + hal_dsi_rx_ctrl_set_auto_ack(g_rx_ctrl_handle, HAL_RX_QRESP_CODE2, DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, 0x0A, 1, 0x9C); +} +#endif +/** +* @brief ap 读回调函数 +* @param handler：rx_ctrl_handle +* dcs_packet: dcs 命令 +* @retval true/false +*/ +static uint8_t b3_read_flag = 0; +static uint8_t c8_read_flag = 0; +static uint8_t c9_read_flag = 0; + +static bool ap_dcs_read(uint8_t data_type, uint8_t dcs_cmd, uint8_t param) +{ + uint32_t data_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + if(dcs_cmd == 0xBE) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x00); + } + else if (dcs_cmd == 0x00) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x32); + } + else if(dcs_cmd == 0x01) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_GEN_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x33); + } + else if(dcs_cmd == 0x02) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_GEN_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x30); + } + else if(dcs_cmd == 0x03) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x32); + } + else if(dcs_cmd == 0x04 || dcs_cmd == 0x05) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x41); + } + else if(dcs_cmd == 0x06) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x44); + } + else if(dcs_cmd == 0x07) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x43); + } + else if(dcs_cmd == 0x08) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x56); + } + else if(dcs_cmd == 0x09) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x30); + } + else if(dcs_cmd == 0x0A) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x9C); + } + else if(dcs_cmd == 0x0B) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x34); + } + else if(dcs_cmd == 0x0C) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x33); + } + else if(dcs_cmd == 0x0D) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x34); + } + else if(dcs_cmd == 0x0E) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x42); + } + else if(dcs_cmd == 0x0F) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x32); + } + else if(dcs_cmd == 0x10) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x37); + } + else if(dcs_cmd == 0x11) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x43); + } + else if(dcs_cmd == 0x12) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x45); + } + else if(dcs_cmd == 0x13) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x31); + } + else if(dcs_cmd == 0x14) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x44); + } + + else if(dcs_cmd == 0xFA) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0x01); + } +// else + { + TAU_LOGD("dcs_cmd %X %d\n",dcs_cmd , data_size); + } + + + + + return true; +} + +#if RX_RESOLUTION_CHANGE_ENABLE +/* PPS update callback 用于分辨率切换case */ +static bool pps_update_handle(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height) +{ + /* AVDD 上电, 用于解决息屏开屏PPS不更新问题 */ + hal_gpio_set_output_data(IO_PAD_AP_PWMEN, IO_LVL_HIGH); + if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) + { + // hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_USER_MODE); + /* PPS Update 且分辨率发生变化 */ + g_rx_ctrl_handle->base_info.src_w = pic_width; + g_rx_ctrl_handle->base_info.src_h = pic_height; + /* 注意部分基板更新PPS前不发 Compression Mode Command的情况 */ + g_rx_ctrl_handle->compress_en = true; //hal_dsi_rx_ctrl_get_compressen_en(g_rx_ctrl_handle); + g_tx_ctrl_handle->base_info.src_w = pic_width; + g_tx_ctrl_handle->base_info.src_h = pic_height; + + hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); + TAU_LOGD("resolution update w[%d] h[%d] compress[%d]\n", pic_width, pic_height, g_rx_ctrl_handle->compress_en); + // hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_60HZ_MODE); + } + // TAU_LOGD("PPS Update[%d][%d] [%d][%d]\n", pic_width, pic_height, g_rx_ctrl_handle->base_info.src_w, g_rx_ctrl_handle->base_info.src_h); + return true; +} +#endif + + +static uint8_t display_on_flag =0; +/** +* @brief ap display on处理函数 +* @param handler：rx_ctrl_handle +* dcs_packet: dcs 命令 +* @retval true/false +*/ +static bool ap_dcs_set_display_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + AOD_ON = true; + display_on_flag =1; + TAU_LOGD("disp on \n"); + return true; +} + +/** +* @brief ap display off处理函数 +* @param handler：rx_ctrl_handle +* dcs_packet: dcs 命令 +* @retval true/false +*/ +static bool ap_dcs_set_display_off(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + TAU_LOGD("disp off %d\n", panel_display_done); +// if (panel_display_done) +// { +// hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x28); + +// } +#if ANALOG_PWM_OUTPUT + hal_pwm_enable(false); +#endif + return true; +} + +/** +* @brief ap enter sleep mode处理函数 +* @param handler：rx_ctrl_handle +* dcs_packet: dcs 命令 +* @retval true/false +*/ +static bool ap_dcs_set_enter_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + // TAU_LOGD("enter sleep mode \n", panel_display_done); + if (panel_display_done) + { + hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_STOP_MODE); + // hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x10); + delayMs(10); + } + +#if AP_SWIRE_OUTPUT + /* Swire close */ + hal_swire_enable(false); + delayMs(10); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x10); + delayMs(20); //20 + /* AVDD_EN close*/ + hal_gpio_set_output_data(IO_PAD_AP_PWMEN, IO_LVL_LOW); +#endif + delayMs(20); //20 + hal_gpio_set_output_data(IO_PAD_TD_RSTN, IO_LVL_LOW); + + /* Wait AP reset down*/ + hal_gpio_set_ap_reset_int(ENABLE, ap_rstn_pull_down_cb, DETECT_LOW_LVL); + return true; +} + +/** +* @brief ap exit sleep mode处理函数 +* @param handler：rx_ctrl_handle +* dcs_packet: dcs 命令 +* @retval true/false +*/ +static bool ap_dcs_set_exit_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ +#if AP_SWIRE_OUTPUT + /* AVDD 上电, 用于解决息屏开屏PPS不更新问题 */ + // hal_gpio_set_output_data(IO_PAD_AP_PWMEN, IO_LVL_HIGH); +#endif + +#if TX_START_AFTER_APRST + if (panel_display_done == false) + { + sg_tx_start_in_process = true; + } +#endif + + TAU_LOGD("exit sleep mode \n"); + + return true; +} + +/* 调整背光B1回调 g_cus_rx_dcs_execute_table 里配置为异步执行，CA同理*/ + +static uint8_t bl_adj_flag =0; +uint16_t value_reg_b1 =0; +uint32_t value_reg_ca =0; +//static uint32_t value_reg_b5 =0; +static uint32_t value_reg_df =0; +static uint8_t value_blue =0; +static uint8_t blue_flag =0; +#if 1 //护眼设置 +#define BLUE_MAX 0xF0 //蓝光最大值 +#define BLUE_MIN 0x86 //蓝光最小值 +#define BLUE_STEP 10 //蓝光等级数-1 +#endif + +/** +* @brief 护眼模式回调函数 +* @param rx_ctrl_handle: dsi rx handle; +* dcs packet: dcs_packet +* @retval true/false +*/ +static bool ap_dcs_set_exit_idle_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + sg_exit_idle_mode_flag = true; + hal_dsi_rx_ctrl_set_hw_cmd_filter(g_rx_ctrl_handle, HAL_RX_DCS_FILTER_B, 0x2C, 0x2C); + TAU_LOGD("exit idle mode,skip 0x2C\n"); + return true; +} + +/** +* @brief 帧率切换处理函数 +* @param handler：rx_ctrl_handle +* dcs_packet: dcs 命令 +* @retval true/false +*/ + + + static bool ap_update_frame_rate(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + TAU_LOGD("60: %04x %d\n", dcs_packet->packet_param[0],dcs_packet->param_length); + + if (dcs_packet->param_length == 1) + { + if (dcs_packet->packet_param[0] == 0x01) + { + // hal_dsi_rx_ctrl_toggle_input_frame_rate(g_rx_ctrl_handle, DSI_FRAME_RATE_120HZ); + hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_60HZ_MODE); + TAU_LOGD("updata frame 120Hz\n"); + } + else //if (dcs_packet->packet_param[0] == 0x21) + { + // hal_dsi_rx_ctrl_toggle_input_frame_rate(g_rx_ctrl_handle, DSI_FRAME_RATE_60HZ); + hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_60HZ_MODE); + TAU_LOGD("updata frame 60Hz\n"); + } + + } + return true; +} + +#if 1 +uint8_t s_pps[128] = { + + 0x11,0x00,0x00,0x89,0x30,0x80,0x09,0x60, + 0x04,0x38,0x00,0x14,0x02,0x1C,0x02,0x1C, + 0x02,0x00,0x02,0x0E,0x00,0x20,0x01,0xE8, + 0x00,0x07,0x00,0x0C,0x05,0x0E,0x05,0x16, + 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00, + 0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, + 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B, + 0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, + 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8, + 0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, + 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x6B,0xF4, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + }; + +static bool ap_update_pps_9E(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + uint32_t pic_width, pic_height; +#if 1 + + pic_height = (dcs_packet->packet_param[6]<<8) + dcs_packet->packet_param[7]; + pic_width = (dcs_packet->packet_param[8]<<8) + dcs_packet->packet_param[9]; +// + TAU_LOGD("resolution update w[%d] h[%d] compress[%d], len[%d]!!\n", pic_width, pic_height, g_rx_ctrl_handle->compress_en ,dcs_packet->param_length); +// if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) + { + for (int i = 0; i < dcs_packet->param_length; i++) + { + s_pps[i] = dcs_packet->packet_param[i]; +// TAU_LOGD("%x",s_pps[i]); + } + hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, s_pps, 128); + hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); + } + return true; +#endif +} + +#endif + +/** +* @brief ap_set_backlight on处理函数 +* @param handler：rx_ctrl_handle +* dcs_packet: dcs 命令 +* @retval true/false +*/ +static bool ap_set_backlight(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + uint16_t ap_backlight = dcs_packet->packet_param[1] + (dcs_packet->packet_param[0] << 8); +// TAU_LOGD("51: %04x\n", ap_backlight); + + if(ap_backlight < 0x500) ap_backlight = 0x600; + + hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, ap_backlight >> 8, ap_backlight & 0xFF); + + return true; +} + +#if RX_WAIT_TEAR_ON +/** +* @brief ap set tear on 处理函数 +* @param handler：rx_ctrl_handle +* dcs_packet: dcs 命令 +* @retval true/false +*/ +static bool ap_dcs_set_tear_on(hal_dsi_rx_ctrl_handle_t* handler, hal_dcs_packet_t* dcs_packet) +{ + TAU_LOGD("ap_set_tear_on\n"); + sg_ap_set_tear_on = true; + if(panel_display_done == false) + { + TAU_LOGD("gen a tear\n"); + hal_dsi_tx_ctrl_gen_a_tear_signal(); + } + else + { + hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_60HZ_MODE); + } + return true; +} + +/** +* @brief ap set tear off 处理函数 +* @param handler：rx_ctrl_handle +* dcs_packet: dcs 命令 +* @retval true/false +*/ +static bool ap_dcs_set_tear_off(hal_dsi_rx_ctrl_handle_t* handler, hal_dcs_packet_t* dcs_packet) +{ + TAU_LOGD("ap_set_tear_off \n"); + sg_ap_set_tear_on = false; + hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_USER_MODE); + return true; +} +#endif + +/*************************DCS 命令处理函数 END*************************/ + +/* 客制化DCS command 处理函数表格 */ +static const hal_dcs_execute_entry_t g_cus_rx_dcs_execute_table[] = +{ + {DCS_SET_DISPLAY_ON, ap_dcs_set_display_on, false}, + {DCS_SET_DISPLAY_OFF, ap_dcs_set_display_off, true}, +// {0xDF, ap_get_reg_df, false}, //蓝光 +// {0xCA, ap_get_reg_ca, false}, // 背光。要加上B1才能调流畅 +// {0xB1, ap_set_backlight, false}, +// {0x53, ap_set_aod, false}, +// {0x9E, ap_update_pps_9E, true}, + {0x60, ap_update_frame_rate, true}, + {0x51, ap_set_backlight, false }, + {DCS_ENTER_SLEEP_MODE, ap_dcs_set_enter_sleep_mode, true}, + {DCS_EXIT_SLEEP_MODE, ap_dcs_set_exit_sleep_mode, true}, + //{0x2F, ap_dcs_set_frame_change, true}, + +#if RX_WAIT_TEAR_ON + {DCS_SET_TEAR_ON, ap_dcs_set_tear_on, true}, + {DCS_SET_TEAR_OFF, ap_dcs_set_tear_off, true}, +#endif + // {0x38, ap_dcs_set_exit_idle_mode, true}, + {0, NULL, false} //{0,NULL,false} 数组最后一个固定成员，作为table结尾的判断标准 +}; + +/** +* @brief panel reset +* @param none +* @retval none +*/ +static void app_tx_panel_reset(void) +{ +#if SHARE_FLASH_ENABLE + hal_flash_share_mode(true); +#endif + hal_gpio_set_output_data(IO_PAD_TD_RSTN, IO_LVL_HIGH); + delayMs(10); + hal_gpio_set_output_data(IO_PAD_TD_RSTN, IO_LVL_LOW); + delayMs(10); + hal_gpio_set_output_data(IO_PAD_TD_RSTN, IO_LVL_HIGH); + delayMs(40); +} + +#define PANEL_INIT_CODE_ARRAY 1 +#if PANEL_INIT_CODE_ARRAY +static void send_panel_init_code(uint32_t size, uint8_t * data) +{ + uint32_t data_offeset = 0; + uint8_t data_type; + uint8_t vc; + uint8_t data_size; + uint8_t * p_data; + + while(data_offeset < size) + { + data_type = data[data_offeset]; + vc = data[data_offeset + 1]; + data_size = data[data_offeset + 2]; + p_data = &data[data_offeset + 3]; + hal_dsi_tx_ctrl_write_array_cmd(data_type, vc, data_size, p_data); + data_offeset = data_offeset + data_size + 3; + delayUs(100); + } +} + +const uint8_t panel_init_code[] = { + +#if AMOLED_ICNA3520 +0x39,0,6,0xF0,0x55,0xAA,0x52,0x08,0x00, +0x39,0,2,0x6F,0x01, +0x39,0,3,0xB9,0x04,0xC8, +0x39,0,3,0xBD,0x0A,0x8C, +0x39,0,8,0xBA,0x00,0x5E,0x00,0x10,0x0A,0xD4,0x10, +0x39,0,2,0x6F,0x07, +0x39,0,8,0xBA,0x00,0x5E,0x00,0x10,0x00,0x24,0x10, +0x39,0,2,0x6F,0x0E, +0x39,0,8,0xBA,0x00,0x5E,0x00,0x10,0x03,0xBC,0x10, +0x39,0,8,0xBB,0x00,0x5E,0x00,0x10,0x00,0x24,0x70, +0x39,0,4,0xBE,0x47,0x4A,0x46, +0x39,0,11,0xC1,0x00,0x5E,0x00,0x5E,0x00,0x5E,0x00,0x5E,0x00,0x5E, +0x39,0,17,0xC6,0x44,0x44,0x44,0x44,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77, +0x39,0,2,0xC8,0x6E, +0x39,0,2,0x6F,0x2C, +0x39,0,2,0xCB,0x43, +0x39,0,3,0xB2,0x01,0x40, +0x39,0,2,0x6F,0x04, +0x39,0,2,0xB2,0x22, +0x39,0,2,0x6F,0x05, +0x39,0,3,0xB2,0x40,0x40, +0x39,0,2,0x6F,0x11, +0x39,0,4,0xB2,0x1F,0x0F,0x17, +0x39,0,2,0x6F,0x15, +0x39,0,2,0xB2,0x03, +0x39,0,2,0x6F,0x18, +0x39,0,5,0xB2,0x14,0x20,0x0F,0xFF, +0x39,0,31,0xB3,0x00,0x01,0x00,0xDA,0x00,0xDA,0x01,0x6C,0x01,0x6C,0x02,0x2D,0x02,0x2D,0x03,0x70,0x03,0x70,0x05,0x08,0x05,0x08,0x05,0x09,0x05,0x09,0x05,0x0A,0x05,0x0A, +0x39,0,2,0x6F,0x1E, +0x39,0,15,0xB3,0x06,0x96,0x06,0x96,0x0A,0xC9,0x0A,0xC9,0x0D,0xBB,0x0D,0xBB,0x0F,0xFF, +0x39,0,2,0x6F,0x2C, +0x39,0,9,0xB3,0x01,0x55,0x07,0xFF,0x07,0xFF,0x0F,0xFF, +0x39,0,31,0xB4,0x15,0x70,0x14,0x20,0x13,0x80,0x13,0x80,0x12,0x80,0x12,0x80,0x10,0x80,0x10,0x80,0x0B,0x60,0x0B,0x60,0x02,0x40,0x02,0x40,0x00,0x20,0x00,0x20,0x00,0x20, +0x39,0,2,0x6F,0x1E, +0x39,0,17,0xB4,0x00,0x20,0x00,0x20,0x00,0x20,0x00,0x20,0x00,0x20,0x00,0x20,0x00,0x20,0x00,0x20, +0x39,0,2,0x6F,0x2E, +0x39,0,31,0xB4,0x0A,0xC0,0x0A,0x10,0x09,0xC0,0x09,0xC0,0x09,0x40,0x09,0x40,0x08,0x30,0x08,0x30,0x05,0xA0,0x05,0xA0,0x01,0x00,0x01,0x00,0x00,0x10,0x00,0x10,0x00,0x10, +0x39,0,2,0x6F,0x4C, +0x39,0,17,0xB4,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10, +0x39,0,2,0x6F,0x5C, +0x39,0,31,0xB4,0x0E,0x58,0x0D,0x68,0x0D,0x08,0x0D,0x08,0x0C,0x60,0x0C,0x60,0x0A,0xF8,0x0A,0xF8,0x07,0x98,0x07,0x98,0x01,0x80,0x01,0x80,0x00,0x18,0x00,0x18,0x00,0x18, +0x39,0,2,0x6F,0x4C, +0x39,0,17,0xB4,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18, +0x39,0,2,0x6F,0xB8, +0x39,0,11,0xB4,0x0A,0xC0,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x40, +0x39,0,2,0xC0,0x04, +0x39,0,2,0x6F,0x02, +0x39,0,2,0xC0,0x08, +0x39,0,2,0x6F,0x03, +0x39,0,3,0xC0,0x21,0x22, +0x39,0,2,0x6F,0x05, +0x39,0,3,0xC0,0x33,0x33, +0x39,0,2,0x6F,0x0B, +0x39,0,11,0xC0,0xE4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0xB5,0x86, +0x39,0,2,0x6F,0x06, +0x39,0,2,0xB5,0x7F, +0x39,0,2,0x6F,0x07, +0x39,0,4,0xB5,0x4B,0x21,0x4F, +0x39,0,2,0x6F,0x0C, +0x39,0,4,0xB5,0x4B,0x29,0x00, +0x39,0,2,0x6F,0x11, +0x39,0,6,0xB5,0x21,0x21,0x21,0x21,0x21, +0x39,0,2,0x6F,0x02, +0x39,0,14,0xB6,0x2E,0x2E,0x2E,0x2E,0x2E,0x2E,0x2E,0x2E,0x2E,0x2E,0x2E,0x2E,0x2E, +0x39,0,27,0xB7,0x13,0x12,0x11,0x10,0x0F,0x0E,0x0D,0x0C,0x0B,0x0A,0x09,0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +0x39,0,2,0x6F,0x19, +0x39,0,13,0xB7,0xAB,0xBC,0xDD,0xEE,0xEE,0xEE,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF, +0x39,0,2,0x6F,0x25, +0x39,0,25,0xB7,0xC9,0x60,0xF6,0x8D,0x24,0xBB,0xE4,0x0D,0x37,0x60,0x8A,0xB3,0xDC,0x06,0x2F,0x59,0x82,0xAC,0xD5,0xFF,0xFF,0xFF,0xFF,0xFF, +0x39,0,2,0x6F,0x0C, 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+0x39,0,19,0xB3,0x00,0x00,0x02,0x33,0x02,0xF5,0x03,0x0A,0x03,0x20,0x03,0x43,0x03,0x61,0x03,0x8B,0x03,0xB3, +0x39,0,19,0xB4,0x03,0xFA,0x04,0x3A,0x04,0x6A,0x04,0x95,0x04,0xC0,0x05,0x13,0x05,0x5B,0x05,0x9B,0x05,0xD1, +0x39,0,15,0xB5,0x06,0x37,0x06,0x6E,0x06,0xB1,0x06,0xE3,0x06,0xFC,0x07,0x10,0x07,0x11, +0x39,0,19,0xB6,0x00,0x00,0x02,0x26,0x02,0xF3,0x03,0x1B,0x03,0x43,0x03,0x8C,0x03,0xCE,0x04,0x03,0x04,0x37, +0x39,0,19,0xB7,0x04,0x95,0x04,0xED,0x05,0x2E,0x05,0x67,0x05,0xA0,0x06,0x07,0x06,0x61,0x06,0xB1,0x06,0xF5, +0x39,0,15,0xB8,0x07,0x6F,0x07,0xB6,0x08,0x09,0x08,0x44,0x08,0x62,0x08,0x7A,0x08,0x7C, +0x39,0,2,0xBF,0x80, +0x39,0,19,0xB0,0x00,0x00,0x00,0xFD,0x02,0xF6,0x03,0x19,0x03,0x25,0x03,0x3C,0x03,0x53,0x03,0x6B,0x03,0x82, +0x39,0,19,0xB1,0x03,0xB0,0x03,0xD4,0x03,0xF1,0x04,0x0E,0x04,0x2A,0x04,0x64,0x04,0x9C,0x04,0xC7,0x04,0xF0, +0x39,0,15,0xB2,0x05,0x41,0x05,0x89,0x05,0xCA,0x05,0xEB,0x05,0xFA,0x06,0x06,0x06,0x07, +0x39,0,19,0xB3,0x00,0x00,0x00,0xEF,0x02,0xCD,0x02,0xEC,0x02,0xF5,0x03,0x07,0x03,0x19,0x03,0x2B,0x03,0x3B, +0x39,0,19,0xB4,0x03,0x52,0x03,0x71,0x03,0x95,0x03,0xB7,0x03,0xD6,0x04,0x0E,0x04,0x44,0x04,0x6A,0x04,0x8F, +0x39,0,15,0xB5,0x04,0xD9,0x05,0x1C,0x05,0x59,0x05,0x78,0x05,0x86,0x05,0x91,0x05,0x92, +0x39,0,19,0xB6,0x00,0x00,0x00,0xE9,0x02,0xBC,0x02,0xE2,0x02,0xF3,0x03,0x14,0x03,0x36,0x03,0x58,0x03,0x78, +0x39,0,19,0xB7,0x03,0xB0,0x03,0xE2,0x04,0x0F,0x04,0x3B,0x04,0x64,0x04,0xB1,0x04,0xFC,0x05,0x2E,0x05,0x5F, +0x39,0,15,0xB8,0x05,0xBF,0x06,0x12,0x06,0x5F,0x06,0x85,0x06,0x97,0x06,0xA5,0x06,0xA7, +0x39,0,2,0xCE,0x01, +0x39,0,2,0xCC,0x00, +0x39,0,6,0xF0,0x55,0xAA,0x52,0x08,0x02, +0x39,0,25,0xB9,0x00,0x04,0x00,0x0C,0x00,0x14,0x00,0x1C,0x00,0x2C,0x00,0x3C,0x00,0x4C,0x00,0x5C,0x00,0x7C,0x00,0x9C,0x00,0xBC,0x00,0xDC, +0x39,0,25,0xBA,0x00,0xFC,0x01,0x3C,0x01,0x7C,0x01,0xBC,0x01,0xFC,0x02,0x7C,0x02,0xFC,0x03,0x7C,0x03,0xBC,0x03,0xDC,0x03,0xFC,0x03,0xFF, +#if TX_USE_CMD_MODE +0x39,0,2,0x17,0x10, +#else +0x39,0,2,0x17,0x01, +#endif +0x39,0,5,0x2A,0x00,0x00,0x04,0xC7, +0x39,0,5,0x2B,0x00,0x00,0x0A,0x8B, +0x39,0,2,0x2F,0x01, +0x39,0,2,0x35,0x00, +0x39,0,3,0x51,0x0D,0xBB, +0x39,0,2,0x6F,0x04, +0x39,0,3,0x51,0x0F,0xFF, +0x39,0,2,0x6F,0x07, +0x39,0,3,0x51,0x8F,0xFF, +0x39,0,2,0x6F,0x01, +0x39,0,3,0x87,0x0D,0xBB, +0x39,0,10,0x88,0x03,0x02,0x63,0x09,0x6A,0x00,0x00,0x00,0x00, +0x39,0,2,0x53,0x20, +0x39,0,3,0x90,0x00,0x00, +0x39,0,19,0x91,0xAB,0xA8,0x00,0x0C,0xD2,0x00,0x02,0x4C,0x01,0x24,0x00,0x08,0x09,0x75,0x07,0x7B,0x10,0xF0, +0x39,0,6,0xF0,0x55,0xAA,0x52,0x08,0x01, +0x39,0,2,0x6F,0x02, +0x39,0,3,0xC7,0x00,0x00, +0x39,0,2,0x26,0x00, +0x39,0,2,0x2F,0x01, +//0x39,0,1,0x11, +//0x39,0,1,0x29, +// +#endif + + +}; +#endif + +/***************************************************************************** +*GPIO发送swire波形 +*flag: =0, SWIRE=0; =1,仅发送SWIRE信号; =2, 先置高再发SWIRE信号 +*num: 发几个脉冲 +*注意FLAG=1时无GPIO初始化!!!!!! +*****************************************************************************/ +void Gpio_swire_output(uint8_t flag, uint8_t num) +{ + uint8_t ii; + + if (flag) + { + if (flag ==2) + { + hal_gpio_init_output(IO_PAD_AP_SWIRE, IO_LVL_HIGH); + delayMs(2); + } + for (ii =0; ii< num; ii++) + { + hal_gpio_set_output_data(IO_PAD_AP_SWIRE, IO_LVL_LOW); + delayUs(10); + hal_gpio_set_output_data(IO_PAD_AP_SWIRE, IO_LVL_HIGH); + delayUs(9); + } + } + else + { + hal_gpio_init_output(IO_PAD_AP_SWIRE, IO_LVL_LOW); + } +} + +/** +* @brief panel init +* @param none +* @retval none +*/ +static void app_init_panel(void) +{ + /* reset panel*/ + app_tx_panel_reset(); + send_panel_init_code(sizeof(panel_init_code), (uint8_t *) panel_init_code); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); + delayMs(10); + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x05, 0x0F); //最大0FFF + hal_gpio_init_output(IO_PAD_AP_PWMEN, IO_LVL_HIGH); + delayMs(60); //90 +#if AP_SWIRE_OUTPUT + hal_swire_enable(true); + hal_swire_set_pulse(SWIRE_DEFAULT_PULSE); +#endif +// Gpio_swire_output(2, 40); +// delayMs(40); + +} + +#if TX_CMD_MODE_WITHOUT_TE +/** +* @brief MIPI RX事件处理函数,demo code 用于command mode 输出发送数据（模式1） +* @param event:RX事件 +* @param data: user data +* @retval none +*/ +static void app_rx_event_cb(hal_rx_event_e event, void *data) +{ + if (panel_display_done && event == HAL_RX_LINE_EVENT) + { + hal_dsi_tx_ctrl_gen_a_frame(); + } +} +#endif + +#if TX_USE_CMD_MODE +/** +* @brief TE引脚作为GPIO 输入回调函数,demo code 用于command mode 输出发送数据（模式2） +* @param none +* @retval none +*/ +static void app_tx_cmd_panel_te_cb(void *data) +{ + if (panel_display_done) + { + //delayUs(25); /* 撕裂调试 */ + hal_dsi_tx_ctrl_gen_a_frame(); + } +} + +/** +* @brief 注册屏端TE信号输入引脚回调函数 +* @param pad :TE输入pad +* @param trig:触发中断沿配置 +* @retval none +*/ +static void app_tx_cmd_app_init_panel_te_int(io_pad_e pad, sys_cfg_trigger_e trig) +{ + /*1.关闭中断*/ + hal_gpio_ctrl_eint(pad, DISABLE); + + /*2.中断初始化*/ + hal_gpio_init_eint(pad, trig); + + /*3.注册回调*/ + hal_gpio_reg_eint_cb(pad, app_tx_cmd_panel_te_cb); + + /*4.使能中断*/ + hal_gpio_ctrl_eint(pad, ENABLE); +} +#endif + +/** +* @brief mipi rx 初始化 +* @param none +* @retval none +*/ +static void app_mipi_rx_init(void) +{ + if (g_rx_ctrl_handle == NULL) + { + /* 创建rx ctrl handle */ + g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); + } + /* 配置参数 */ + g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; + g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; + g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; + g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; + g_rx_ctrl_handle->base_info.dst_mode = OUTPUT_DATA_MODE; + g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; + g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; + g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; /* 可不配置 */ + g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; + g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; + g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; /* 注册 DCS处理列表 */ + g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; /* 注册dsc read 回调函数,可选,此函数为空时由cus_dcs_entry_table执行 */ + + g_rx_ctrl_handle->extra_info.flow_control_mode = FC_C2V_NORMAL_MODE; + + g_rx_ctrl_handle->rx_lane_swap = RX_LANE_SWAP_3012; + g_rx_ctrl_handle->base_info.pn_swap = RX_LANE_0_PN_SWAP|RX_LANE_1_PN_SWAP|RX_LANE_2_PN_SWAP|RX_LANE_3_PN_SWAP|RX_LANE_CLK_PN_SWAP; + // g_rx_ctrl_handle->rx_strength=7; +// g_rx_ctrl_handle->hight_performan_mode = HIGHT_PERFORMAN_L2; +// g_rx_ctrl_handle->err_handler_level = ERR_HANDLE_L2; + + hal_dsi_rx_ctrl_set_check_crc(g_rx_ctrl_handle, false); + +#if RX_RESOLUTION_CHANGE_ENABLE + g_rx_ctrl_handle->pps_update_entry = pps_update_handle; +#endif + /* 提前预置PPS, AP 有PPS cmd也会更新 */ + if (g_rx_ctrl_handle->compress_en == true) + { + uint8_t pps[128] = { + 0x12,0x00,0x00,0xAB,0x30,0x80,0x0A,0x8C, + 0x04,0xC8,0x00,0x14,0x02,0x64,0x02,0x64, + 0x02,0x00,0x02,0x4C,0x00,0x20,0x01,0xF1, + 0x00,0x08,0x00,0x0D,0x05,0x7A,0x04,0x7D, + 0x18,0x00,0x10,0xF0,0x07,0x10,0x20,0x00, + 0x06,0x0F,0x0F,0x33,0x0E,0x1C,0x2A,0x38, + 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B, + 0x7D,0x7E,0x02,0x02,0x22,0x00,0x2A,0x40, + 0x2A,0xBE,0x3A,0xFC,0x3A,0xFA,0x3A,0xF8, + 0x3B,0x38,0x3B,0x78,0x3B,0xB6,0x4B,0xB6, + 0x4B,0xF4,0x4B,0xF4,0x6C,0x34,0x84,0x74, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + }; + hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 128); + } + +// g_rx_ctrl_handle->extra_info.blank_info.top = 20; +// g_rx_ctrl_handle->extra_info.blank_info.enable = true; + + /* 初始化rx ctrl */ + hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); +// hal_dsi_rx_ctrl_set_log_level(kLOG_LEVEL_NONE); + +#if RX_READ_HW_ACK + /* 配置硬件回复 */ + app_set_dcs_hw_ack(); +#endif + +#if TX_CMD_MODE_WITHOUT_TE + /* 注册接收一帧帧头事件回调,每接收一帧数据TX再往外发一帧 */ + //hal_dsi_rx_ctrl_register_callback(g_rx_ctrl_handle, app_rx_event_cb, HAL_RX_FS_EVENT, true, NULL); + /* 注册接收第0行数据事件,接收到数据后再往外发送数据,确保不撕裂 */ + uint32_t line = 0; + hal_dsi_rx_ctrl_register_callback(g_rx_ctrl_handle, app_rx_event_cb, HAL_RX_LINE_EVENT, true, &line); +#endif + +#if RX_START_WITHOUT_RST + /* 等待ap reset置位再启动rx,否则容易收到错误数据 */ + hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +#else + /* 注册RX start callback,确认RX LP11时再启动RX,防止接收错误数据 */ + hal_gpio_set_ap_reset_int(ENABLE, app_mipi_rx_start_cb, DETECT_HIGH_LVL); +#endif +} + +/** +* @brief mipi tx 初始化 +* @param none +* @retval none +*/ +static void app_mipi_tx_init(void) +{ + if (g_tx_ctrl_handle == NULL) + { + g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); + } + g_tx_ctrl_handle->channel_id = OUTPUT_VC; + g_tx_ctrl_handle->lane_num = OUTPUT_LANE_NUMBER; + g_tx_ctrl_handle->vid_mode = OUTPUT_VIDEO_MODEL; + g_tx_ctrl_handle->cmd_tx_type = TX_INIT_TYPE; + g_tx_ctrl_handle->dpi_vsa = OUTPUT_VSA; + g_tx_ctrl_handle->dpi_vbp = OUTPUT_VBP; + g_tx_ctrl_handle->dpi_vfp = OUTPUT_VFP; + g_tx_ctrl_handle->dpi_hsa = OUTPUT_HSA; + g_tx_ctrl_handle->dpi_hbp = OUTPUT_HBP; + g_tx_ctrl_handle->dpi_hfp = OUTPUT_HFP; + g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_tx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; + g_tx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; + g_tx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; + g_tx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; + g_tx_ctrl_handle->base_info.dst_mode = OUTPUT_DATA_MODE; +// g_tx_ctrl_handle->tx_frame_rate = 62; + /* 初始化屏时每一条LP CMD都退出LPDT 再进入发送下一条 */ + /* 解决FT8720 TDDI 显示翻转问题 */ +// g_tx_ctrl_handle->tx_lane_lp = ALWAYS_HS; + + hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); + + /* FIXME set tear on*/ + // hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_60HZ_MODE); + + /* AP 没有发送数据时默认的显示颜色, 量产为0 0 0(黑色), 配置其他颜色仅为debug使用 */ + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); +} + +#if !RX_START_WITHOUT_RST +/** +* @brief mipi rx start函数,开启AP RSTN等待启动配置后使用 +* @param none +* @retval none +*/ +static void app_mipi_rx_start_cb(void *data) +{ + /* RX start */ + hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); + /* close cb */ + hal_gpio_set_ap_reset_int(DISABLE, NULL, DETECT_HIGH_LVL); + TAU_LOGD("rx start\n"); +} +#endif + +/** +* @brief mipi tx 启动 +* @param none +* @retval none +*/ +static void app_mipi_tx_start(void) +{ + /* Init panel */ + app_init_panel(); + /* TX start */ + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_set_tear_mode(g_tx_ctrl_handle, TE_60HZ_MODE); + + panel_display_done = true; + + delayMs(120); + /* Display on */ + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x29); + +#if (TX_USE_CMD_MODE & (!TX_CMD_MODE_WITHOUT_TE)) /* cmd mode输出,并且需要屏的TE输入 */ + // hal_dsi_tx_ctrl_gen_a_frame(); /* FIXME */ + app_tx_cmd_app_init_panel_te_int(IO_PIN_14, DETECT_RISING_EDGE); /* 注册屏端TE中断 */ +#endif +#if AP_SWIRE_OUTPUT + hal_swire_set_pulse(SWIRE_DEFAULT_PULSE); +#endif + TAU_LOGD("tx_start \n"); +} + +/** +* @brief ap rstn 拉高中断回调,用于息屏唤醒 +* @param none +* @retval none +*/ +static void ap_rstn_pull_high_cb(void *data) +{ + /* system resume begin */ + sg_system_resume = true; + /* 关闭AP reset检查 */ + hal_gpio_set_ap_reset_int(DISABLE, NULL, DETECT_HIGH_LVL); +} + +/** +* @brief ap rstn 拉高中断回调,用于息屏待机 +* @param none +* @retval none +*/ +static void ap_rstn_pull_down_cb(void *data) +{ + sg_system_suspend = true; + /* 关闭AP reset检查 */ + hal_gpio_set_ap_reset_int(DISABLE, NULL, DETECT_HIGH_LVL); + TAU_LOGD("ap_rstn_pull_down_cb\n"); +} + +/** +* @brief GPIO初始化配置,根据实际原理图提前配置IO功能以及状态,默认功能可不配置 +* TP相关I2C/SPI 在tp_transfer.c,也可以挪到此函数初始化 +* @param none +* @retval none +*/ +void app_gpio_init(void) +{ + io_pad_attr_t attrs[] = + { + {IO_PIN_8, PIN8_MODE_GPIO7, IO_IOE_OUTPUT, IO_LVL_LOW},/* PIN_8(TD_RSTN), GPIO,输出,低电平 */ + {IO_PIN_17, PIN17_MODE_GPIO8, IO_IOE_OUTPUT, IO_LVL_LOW}, /* PIN_17(PWMEN), GPIO,输出,低电平 */ + {IO_PIN_16, PIN16_MODE_GPIO2, IO_IOE_OUTPUT, IO_LVL_LOW}, /* PIN_16(AP_INT),GPIO,输出,低电平 */ +#if (TX_USE_CMD_MODE & (!TX_CMD_MODE_WITHOUT_TE)) + {IO_PIN_14, PIN14_MODE_GPIO24, IO_IOE_INPUT, IO_LVL_NONE}, /* PIN_29(AP_TE), cmd mode输出, 并且看屏TE,配置AP TE为GPIO输入 */ +#endif + {IO_PIN_29, PIN29_MODE_TEAR, IO_IOE_NONE, IO_LVL_NONE}, /* PIN_29(AP_TE), 硬件TEAR输出模式 */ + + }; + uint8_t size = sizeof(attrs) / sizeof(io_pad_attr_t); + hal_gpio_config_pad(attrs, size); +} + +/** +* @brief 显示相关模块初始化,包括MIPI RX/TX/PWM/SWIRE/GPIO等 +* @param none +* @retval none +*/ +void app_display_init(void) +{ + /* mipi rx初始化 */ + app_mipi_rx_init(); + + /* VCC 主供电,等待VCC Power Ready,此时RX初始化完成可以响应MIPI命令 */ + if (MAIN_POWER_SELECT == PWR_SEL_VCC) + { + while (hal_pwr_get_vcc_power_ready() == false); + } + + /* GPIO 初始化 */ + app_gpio_init(); + /* 背光初始化 */ +#if AP_SWIRE_OUTPUT + hal_swire_init(); /* swire init */ + hal_swire_set_timer(TIMER_NUM0, 8, true); /* swire连续发送,绑定timer进行发送 */ +#endif + /* mipi tx 初始化*/ + app_mipi_tx_init(); + app_mipi_tx_start(); +} + +/** +* @brief 系统resume +* @param sleep_mode: sleep 模式 +* @retval none +*/ +static void app_system_resume(pwr_sleep_mode_e sleep_mode) +{ + /* 退出sleep mode, 电源切换 */ + hal_pwr_exit_sleep_mode(); + + /* display resume */ + app_display_init(); + +#if TOUCH_ENABLE + /* touch resume */ + app_tp_write_other_operations(NULL, 0); +#endif + TAU_LOGD("system resume\n"); +} + +/** +* @brief 系统suspend,进入sleep mode +* @param sleep_mode: sleep 模式 +* @retval none +*/ +static void app_system_suspend(pwr_sleep_mode_e sleep_mode) +{ + /* 关闭图像通路 */ + hal_dsi_tx_ctrl_stop(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_deinit(g_tx_ctrl_handle); + hal_dsi_rx_ctrl_stop(g_rx_ctrl_handle); + hal_dsi_rx_ctrl_deinit(g_rx_ctrl_handle); + + /* Tear拉低 */ + hal_gpio_init_output(IO_PAD_AP_TE, IO_LVL_LOW); + panel_display_done = false; +#if RX_WAIT_TEAR_ON + sg_ap_set_tear_on = false; +#endif + + /* 关闭外设 比如Swire/I2C/Flash 等 */ +#if AP_SWIRE_OUTPUT + hal_swire_deinit(); +#endif +#if ANALOG_PWM_OUTPUT + hal_pwm_deinit(); +#endif + +#if SHARE_FLASH_ENABLE + hal_flash_share_mode(false); +#endif + + /* 切换TP18 供电 */ + hal_pwr_set_sleep_mode_power(SLEEP_MODE_POWER); + + if (sleep_mode == PWR_NORMAL_SLEEP_MODE) + { + /* normal sleep mode, MCU可以正常工作 */ + hal_gpio_set_ap_reset_int(ENABLE, ap_rstn_pull_high_cb, DETECT_HIGH_LVL); + hal_pwr_enter_normal_sleep_mode(); + } + else if (sleep_mode == PWR_STOP_SLEEP_MODE) + { + /* 注册对应 wakeup IO */ + hal_pwr_set_stop_sleep_wakeup_pin(IO_PAD_AP_RSTN, WUP_RISING_EDGE); + //hal_pwr_set_stop_sleep_wakeup_pin(IO_PAD_AP_SPIS_CSN, WUP_FALLING_EDGE); + //hal_pwr_set_stop_sleep_wakeup_pin(IO_PAD_TD_INT, WUP_FALLING_EDGE); + io_pad_e wakeup_io = hal_pwr_enter_stop_sleep_mode(); + if (wakeup_io == IO_PAD_AP_RSTN) + { + sg_system_resume = true; + } + else + { + /* Not impletmented */ + TAU_LOGD("wakeup_io %d FIXME touch wakeup convert to AP\n", wakeup_io); + hal_gpio_set_ap_reset_int(ENABLE, ap_rstn_pull_high_cb, DETECT_HIGH_LVL); + } + } + else + { + /* deep sleep mode,配置AP RSTN 上升沿,TD INT 下降沿唤醒 */ + hal_pwr_enter_deep_sleep_mode(WUP_RISING_EDGE, WUP_FALLING_EDGE); + } + +} + +/** +* @brief 系统process处理函数,处理待机唤醒等 +* @param none +* @retval none +*/ +static void app_system_process(void) +{ + if (sg_system_suspend) + { + /* 系统进入sleep mode */ + app_system_suspend(SLEEP_MODE_SELECT); + sg_system_suspend = false; + } + + if (sg_system_resume) + { + /* 系统退出sleep mode */ + app_system_resume(SLEEP_MODE_SELECT); + sg_system_resume = false; + } + +#if TX_START_AFTER_APRST + if (sg_tx_start_in_process) + { + app_mipi_tx_start(); + sg_tx_start_in_process = false; + } +#endif +} + +static void CallingDisplayOffHandle( void ) +{ + static unsigned char Flag = 0; // 状态标志，防止反复执行函数状态 + static unsigned int ExitDelay = 0; + + if(( 0 == Flag )&&(panel_display_done == true)) + { + /* 引脚初始化 */ + hal_gpio_set_pull_state( TOUCH_PHONE_DIS_OFF_PIN, DISABLE, ENABLE ); // 设定初始上拉状态 + hal_gpio_init_input( TOUCH_PHONE_DIS_OFF_PIN ); + + Flag = 0xF0; // 更新标志，防止反复执行, 并进入到下个状态 + } + else if(Flag == 0xF0) + { + if(phone_start_flag == 1) // 开机,需要等待6秒后触摸TP3V3电源稳定后再检测息屏IO状态 + { + ExitDelay = hal_system_get_tick(); // 更新计时时间 + phone_start_flag = 2; // 更新标志，防止反复执行, 并进入到下个状态 + } + else if(phone_start_flag == 2) + { + if( hal_system_get_tick() - ExitDelay > 10000 ) // 延时 10S 进入息屏IO检测状态 + { + Flag = 1; // 更新标志，防止反复执行 + phone_start_flag = 0; + } + } + else + { + Flag = 1; // 更新标志，并进入到下个状态 + } + } + else if( ( IO_LVL_HIGH == hal_gpio_get_input_data( TOUCH_PHONE_DIS_OFF_PIN ) ) && ( 1 == Flag ) ) + { + /* 高电平，刷黑操作 */ + hal_dsi_tx_ctrl_write_cmd( 0x05, 0, 1, 0x22 ); + Flag = 2; // 更新标志，防止反复执行 + TAU_LOGD("all pixel off\n"); + } + else if( ( IO_LVL_LOW == hal_gpio_get_input_data( TOUCH_PHONE_DIS_OFF_PIN ) ) && ( 2 == Flag ) ) + { + /* 低电平, 退出操作 */ + ExitDelay = hal_system_get_tick(); // 更新计时时间 + //hal_dsi_tx_ctrl_write_cmd( 0x05, 0, 1, 0x13 ); + //Flag = 1; // 更新标志，防止反复执行 + TAU_LOGD("calling IO down\n"); + Flag = 3; + } + else if( 3 == Flag ) + { + + if( hal_system_get_tick() - ExitDelay > 1000 ) // 延时 1S 退出黑屏状态 + { + hal_dsi_tx_ctrl_write_cmd( 0x05, 0, 1, 0x13 ); + Flag = 1; // 更新标志，防止反复执行 + TAU_LOGD("all pixel on"); + } + else if( IO_LVL_HIGH == hal_gpio_get_input_data( TOUCH_PHONE_DIS_OFF_PIN ) ) // 倒计时阶段又挡住了屏幕，继续更新时间 + { + ExitDelay = hal_system_get_tick(); // 更新计时时间 + TAU_LOGD("TOUCH DOWN AGAIN\n"); + }else{ + hal_dsi_tx_ctrl_write_cmd( 0x05, 0, 1, 0x13 ); + TAU_LOGD("Nothing\n"); + } + + } +// TAU_LOGD("PHONE CALIING STATE [%d]\n",hal_gpio_get_input_data( TOUCH_PHONE_DIS_OFF_PIN )); + +} + +/** +* @brief mi12 lite demo 主函数 +* @param none +* @retval none +*/ +void Note11Pro_demo(void) +{ + /* 电源选择,上电只需要选择一次 */ + hal_pwr_set_main_power(MAIN_POWER_SELECT); /* 切换供电*/ + + /* 显示模块初始 */ + app_display_init(); + + hal_pwr_ldo18s_en(true); + hal_pwr_ldo18s_set(LDO_18S_5); +// +// hal_pwr_ldo13s_en(true); +// hal_pwr_ldo13s_set(LDO_13S_6); + + /* touch 相关模块初始化 */ +#if TOUCH_ENABLE + /* TP 初始化 */ + app_tp_init(); + app_tp_phone_clear_reset_on(); + /* 与屏的TP 模块通讯并初始化 */ + app_tp_transfer_screen_start(); +#endif + +#if AOD_CLOCK_ENABLE + aod_init(g_rx_ctrl_handle, TIMER_NUM1, 95, 150, 180, &AOD_LowPower_Update, app_rx_event_cb); + //TAU_LOGD("aod_init\n"); +#endif + //TAU_LOGD("s20p demo init done \n"); + + while (1) + { + /* DCS 命令异步处理 */ + while (hal_dsi_rx_ctrl_dcs_async_handler(g_rx_ctrl_handle)); + + + // CallingDisplayOffHandle(); + + /* 系统事件处理(sleep mode) */ + app_system_process(); + } +} +#endif diff --git a/src/app/Honor 90Pro/Honor90Pro_demo.h b/src/app/Honor 90Pro/Honor90Pro_demo.h new file mode 100644 index 0000000..e519bbf --- /dev/null +++ b/src/app/Honor 90Pro/Honor90Pro_demo.h @@ -0,0 +1,15 @@ +/******************************************************************************* +* Copyright (C) 2019-2022, TAU Systems (R),All Rights Reserved. +* +* File: Mi12Lite.h +* Description XiaoMi 12 Lite file +* Version V0.1 +* Date 2023-06-25 +* Author Jaya +*******************************************************************************/ +#ifndef __MI12_S20P_H__ +#define __MI12_S20P_H__ + +void s20p_demo(void); + +#endif /* __MI12_LITE_DEMO_H__ */ diff --git a/src/app/main.c b/src/app/main.c new file mode 100644 index 0000000..dc89506 --- /dev/null +++ b/src/app/main.c @@ -0,0 +1,37 @@ +#include +#include +#include +#include "test_cfg_global.h" +#include "tau_log.h" +#include "hal_system.h" +#include "board.h" + +int main() +{ + board_Init(); + + while (1) + { +#if _MODULE_DEMO_ENABLE + module_demo_main(); +#endif + +#if _DEMO_S8_EN + s8_demo(); +#endif + +#if _DEMO_S8P_EN + s8p_demo(); +#endif + +#if _DEMO_S9_EN + s9_demo(); +#endif + +#if _DEMO_HONOR_90Pro_EN + Note11Pro_demo(); +#endif + TAU_LOGD("668 Demo\n"); + while (1); + } +} diff --git a/src/app/module_demo/README.txt b/src/app/module_demo/README.txt new file mode 100644 index 0000000..ed6980f --- /dev/null +++ b/src/app/module_demo/README.txt @@ -0,0 +1 @@ +module_demo:存放hal层给客户的demo code,每个客户都需要release \ No newline at end of file diff --git a/src/app/module_demo/demo_hal_crc.c b/src/app/module_demo/demo_hal_crc.c new file mode 100644 index 0000000..e675e8c --- /dev/null +++ b/src/app/module_demo/demo_hal_crc.c @@ -0,0 +1,137 @@ +/******************************************************************************* +* +* +* File: demo_hal_crc.c +* Description： crc demo源文件 +* Version： V0.1 +* Date: 2023-07-27 +* Author： zzf + *******************************************************************************/ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "demo_hal_crc.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "crc-log" + +/* CRC计算方式，0-CPU方式； 1-DMA方式 */ +#define CRC_DMA_CAL_EN (1) + +/* for max total of test elements */ +#define CRC_ELEMENT_MAX_TATOL (32u) +/* for crc initial POL regs value */ +#define CRC_32_POL_VALUE0 (0x04C11DB7u) +#define CRC_16_POL_VALUE0 (0x8005u) +/* for crc calculate in crc software calculate */ +#define CRC_SEED_VALUE_0 (0u) +#define CRC_SEED_VALUE_F (0xFFFFu) + +/******************************************************************************* +* 3.Global function and Global variable declarations +*******************************************************************************/ +#if CRC_DMA_CAL_EN +/* all the one element value crc calculate for software crc */ +static uint32_t sg_crc32_arry[CRC_ELEMENT_MAX_TATOL] = +{ + 0x00000000, 0xFFFFFFFF, 0xAAAAAAAA, 0xEEEEEEEE, 0x55555555, 0x66666666, 0x11111111, 0x77777777, + 0x12345678, 0x456789AB, 0x89ABCDEF, 0x3456789A, 0x6789ABCD, 0x9ABCDEF0, 0xBCDEF012, 0xFEDCAB98, + 0x5a5aa5a5, 0x37377373, 0x98988989, 0x76767676, 0x41233214, 0x67433467, 0x91DF91DF, 0x76347634, + 0x46378912, 0x57351059, 0xABFC9483, 0x837204AF, 0x41057DBA, 0x893CD024, 0x56378105, 0xFA34610B, +}; +#else +/* all the one element value crc calculate for software crc */ +static uint16_t sg_crc16_element_arry[CRC_ELEMENT_MAX_TATOL] = +{ + 0x0000, 0xFFFF, 0xAAAA, 0x2222, 0x3333, 0xDDDD, 0x9999, 0x8888, + 0x1234, 0x5678, 0x9ABC, 0x2345, 0x4567, 0xABCD, 0xCDEF, 0x789A, + 0x5a5a, 0x2323, 0x6868, 0x5aa5, 0x7887, 0x8558, 0x6336, 0xAFAF, + 0x3194, 0x7853, 0x7733, 0x76DE, 0x89CA, 0x7401, 0x7392, 0xD2A8, +}; +#endif +/******************************************************************************* +* 4.Global function prototypes +*******************************************************************************/ +#if CRC_DMA_CAL_EN +/** +* @brief DMA计算CRC值回调函数 +* @param calculate_result: CRC计算结果 +* @retval None +*/ +void demo_crc_dma_callback(uint32_t calculate_result) +{ + TAU_LOGD("dma demo[0x%x]\n", calculate_result); +} + +/** +* @brief DMA计算CRC值 +* @param None +* @retval true or false +*/ +bool demo_crc_array_dma_cal(void) +{ + crc_ctrl_handle_t crc_cfg_para = + { + CRC_32_POL_VALUE0, + CRC_SEED_VALUE_0, + CRC_32_BIT_PROTOCOL, + CRC_FXOR_ENABLE, + CRC_REV_ONLY_BITS_TRANSPOSE, + CRC_REV_ONLY_BITS_TRANSPOSE + }; + + hal_crc_dma_init(&crc_cfg_para, demo_crc_dma_callback, sg_crc32_arry, CRC_ELEMENT_MAX_TATOL); + + hal_crc_dma_start(); + + return true; +} +#else +/** +* @brief CPU阻塞式计算CRC值 +* @param None +* @retval true or false +*/ +bool demo_crc_array_cal(void) +{ + crc_ctrl_handle_t crc_cfg_para = + { + CRC_16_POL_VALUE0, + CRC_SEED_VALUE_F, + CRC_16_BIT_PROTOCOL, + CRC_FXOR_ENABLE, + CRC_REV_BOTH_TRANSPOSE, + CRC_REV_BOTH_TRANSPOSE + }; + + hal_crc_init(&crc_cfg_para); + uint32_t output_crc = hal_crc_cal(sg_crc16_element_arry, CRC_ELEMENT_MAX_TATOL); + TAU_LOGD("cpu demo[0x%x]\n", output_crc); + + return true; +} +#endif + +/** +* @brief demo测试接口函数 +* @param None +* @retval None +*/ +void demo_hal_crc_case(void) +{ + TAU_LOGD("HAL CRC DEMO.\n"); + +#if CRC_DMA_CAL_EN + demo_crc_array_dma_cal(); // DMA方式计算 +#else + demo_crc_array_cal(); // CPU方式计算 +#endif + +} + diff --git a/src/app/module_demo/demo_hal_crc.h b/src/app/module_demo/demo_hal_crc.h new file mode 100644 index 0000000..3fd8652 --- /dev/null +++ b/src/app/module_demo/demo_hal_crc.h @@ -0,0 +1,41 @@ +/******************************************************************************* +* +* +* File: demo_hal_crc.h +* Description: crc demo头文件 +* Version: V0.1 +* Date: 2023-07-27 +* Author: zzf + *******************************************************************************/ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "hal_crc.h" +#include "tau_delay.h" +#include "tau_log.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#ifndef _DEMO_HAL_CRC_H_ +#define _DEMO_HAL_CRC_H_ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief demo测试接口函数 +* @param None +* @retval None +*/ +void demo_hal_crc_case(void); + +#endif //_DEMO_HAL_CRC_H_ diff --git a/src/app/module_demo/demo_hal_dsi_rx.c b/src/app/module_demo/demo_hal_dsi_rx.c new file mode 100644 index 0000000..925de61 --- /dev/null +++ b/src/app/module_demo/demo_hal_dsi_rx.c @@ -0,0 +1,212 @@ +/******************************************************************************* +* +* +* File: demo_hal_dsi_rx.c +* Description: dsi rx 测试文件 +* Version: V0.1 +* Date: 2020-06-12 +* Author: lzy + *******************************************************************************/ + +#include "tau_device_datatype.h" +#include "tau_log.h" +#include "tau_operations.h" +#include "tau_common.h" +#include "hal_dsi_rx_ctrl.h" + +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "demo_hal_dsi_rx" + +//客户可配参数 +//输入配置 +#define INPUT_WIDTH 720 +#define INPUT_HEIGHT 1280 +//输入 MIPI lane rate,video mode 下需要计算delay, command mode可以不设置或者随便设置 +#define INPUT_MIPI_LANE_RATE 481000000 +//输入图像格式 +#define INPUT_COLOR_MODE DSI_RGB888 +//输出数据格式(DSI_DATA_CMD_MODE , DSI_DATA_VIDEO_MODE) +#define INPUT_DATA_MODE DSI_DATA_VIDEO_MODE +//输入mipi lane数量(DSI_RX_LANE_x x为1-4) +#define INPUT_MIPI_LANE_NUM DSI_LANE_4 +//输入为video mode 时数据格式 +#define INPUT_VIDEO_MODEL DSI_NONBURST_EVENT +//输入虚拟通道(0-3) +#define INPUT_VC DSI_VC_0 +//输入的帧率(60/90/120/144Hz) +#define INPUT_FRAME_RATE DSI_FRAME_RATE_60HZ +//输入数据是否DSC压缩 +#define INPUT_COMPRESS false + +//输出配置 +#define OUTPUT_WIDTH 720 +#define OUTPUT_HEIGHT 1280 + +static hal_dsi_rx_ctrl_handle_t *g_rx_ctrl_handle = NULL; + +//客制化DCS处理函数 +static bool cus_dsc_execute(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + TAU_LOGD("cus_dsc_execute DCS[0x%x]\n", dcs_packet->dcs_command); + for (int i = 0; i < dcs_packet->param_length; i ++) + { + TAU_LOGD("cus_dsc_execute param[%d]:0x%x\n", i, dcs_packet->packet_param[i]); + } + +#if 0 + /* ack long cmd */ + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_GEN_LONG_RESPONSE, + DSI_VC_0, + 5, + 0x1, + 0x2, + 0x3, + 0x4, + 0x5); +#else + /* ack short cmd */ + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, + 0xC1); +#endif + return true; +} + +static bool ap_dcs_read(uint8_t data_type, uint8_t dcs_cmd, uint8_t param) +{ + if (dcs_cmd == 0xaa) + { + uint8_t cmd[] = {DSI_ACK_DT_DCS_LONG_RESPONSE, + 212, 0, 1, + 0x21, 0x07, 0x2C, 0x27, 0x2B, 0x7A, 0x78, 0x7A, + 0x7D, 0x7D, 0x7E, 0x7F, 0x7E, 0x7E, 0x7F, 0x7F, + 0x71, 0xE8, 0x36, 0x2A, 0x2E, 0x07, 0x89, 0x17, + 0x8B, 0x84, 0x28, 0x26, 0x6D, 0xEB, 0x12, 0x34, + 0x79, 0x78, 0x79, 0x7C, 0x7C, 0x7C, 0x7C, 0x7C, + 0x7D, 0x7D, 0x7E, 0x7F, 0x7E, 0x7E, 0x7F, 0x7F, + 0x7C, 0x67, 0x6E, 0x6c, 0x8A, 0x5B, 0x71, 0x00, + 0x7D, 0x7D, 0x7E, 0x7F, 0x7E, 0x7E, 0x7F, 0x7F, + 0x7d, 0x68, 0x61, 0xd9, 0x1A, 0x5B, 0xa7, 0x00, + 0x7D, 0x7D, 0x7E, 0x7F, 0x7E, 0x7E, 0x7F, 0x7F, + 0x7e, 0x69, 0x63, 0xe9, 0x3c, 0x5B, 0xfE, 0x00, + 0x7D, 0x7D, 0x7E, 0x7F, 0x7E, 0x7E, 0x7F, 0x7F, + 0x7f, 0x60, 0x3E, 0x6f, 0x9b, 0x5B, 0x45, 0x00, + 0x7D, 0x7D, 0x7E, 0x7F, 0x7E, 0x7E, 0x7F, 0x7F, + 0x70, 0x61, 0x4E, 0xc9, 0xdA, 0x5B, 0x69, 0x00, + 0x7D, 0x7D, 0x7E, 0x7F, 0x7E, 0x7E, 0x7F, 0x7F, + 0x71, 0x63, 0xaE, 0x88, 0x0A, 0x5B, 0x30, 0x00, + 0x12, 0x34, 0x56, 0x78, 0x9a, 0xab, 0xcd, 0xef, + 0x11, 0x22, 0x33, 0x44, 0x0A, 0x5B, 0x30, 0x00, + 0x12, 0x34, 0x56, 0x78, 0x9a, 0xab, 0xcd, 0xef, + 0x7f, 0x60, 0x3E, 0x6f, 0x9b, 0x5B, 0x45, 0x00, + 0x7D, 0x7D, 0x7E, 0x7F, 0x7E, 0x7E, 0x7F, 0x7F, + 0x7f, 0x60, 0x3E, 0x6f, 0x9b, 0x5B, 0x45, 0x00, + 0x7D, 0x7D, 0x7E, 0x7F, 0x7E, 0x7E, 0x7F, 0x7F, + 0x71, 0xE8, 0x36, 0x2A, 0x2E, 0x07, 0x89, 0x17, + 0x8B, 0x84, 0x28, 0x26, 0x6D, 0xEB, 0x12, 0x34, + 0x11, 0x22, 0x33, 0x44 + }; + /*长包超128字节发送*/ + hal_dsi_rx_ctrl_ack_long_cmd(g_rx_ctrl_handle, sizeof(cmd) / sizeof(uint8_t), cmd); + } + else if (dcs_cmd == 0xFE) + { + uint16_t return_size; + return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + if (return_size == 3) + { + uint8_t cmd[] = {DSI_ACK_DT_DCS_LONG_RESPONSE, 3, 0, 1, 0x40, 0x00, 0x03}; + + hal_dsi_rx_ctrl_ack_long_cmd(g_rx_ctrl_handle, sizeof(cmd) / sizeof(uint8_t), cmd); + } + else if (return_size == 32) + { + + uint8_t cmd[] = {DSI_ACK_DT_DCS_LONG_RESPONSE, + 32, 0, 1, 0x01, 0xc4, 0x01, 0xcd, 0x01, 0xfb, 0x55, 0x55, + 0x55, 0x4e, 0x4c, 0x4e, 0x2e, 0x2d, 0x31, 0x30, + 0x30, 0x38, 0x49, 0x42, 0x49, 0x3c, 0x39, 0x47, + 0x01, 0x07, 0x2b, 0xfa, 0x22, 0x19, 0x32, 0x02 + }; + + hal_dsi_rx_ctrl_ack_long_cmd(g_rx_ctrl_handle, sizeof(cmd) / sizeof(uint8_t), cmd); + } + } + + TAU_LOGD("r %x\n", dcs_cmd); + return true; +} + + +static const hal_dcs_execute_entry_t g_cus_rx_dcs_execute_table[] = +{ + {0x83, cus_dsc_execute, false}, //cus dcs 0x83, 处理函数为cus_dsc_execute，不需要立即运行，在while里异步即可 + {0, NULL, false} //{0,NULL,false} 数组最后一个固定成员，作为table结尾的判断标准 +}; + +static void open_mipi_rx() +{ + if (g_rx_ctrl_handle == NULL) + { + g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); + } + + g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; + g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; + g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; + g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; + g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; + g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; + g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; + g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; + g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; + g_rx_ctrl_handle->extra_info.flow_control_mode = FC_AUTO_MODE; + g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; + g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; + + /*PIN28~PIN19依次为21c03*/ + g_rx_ctrl_handle->rx_lane_swap = RX_LANE_SWAP_2103; + + /* 对 lane0~lane3 以及clk lane 进行PN交换*/ + g_rx_ctrl_handle->base_info.pn_swap = RX_LANE_0_PN_SWAP | RX_LANE_1_PN_SWAP | RX_LANE_2_PN_SWAP | RX_LANE_3_PN_SWAP | RX_LANE_CLK_PN_SWAP; + + if (g_rx_ctrl_handle->compress_en == true) + { + //hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 128); + } + hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); +#if 0 + //使用盒子发送读命令 0xA,0xB,0xC,0xD,0xE,0xF,0x1E,0x1D + hal_dsi_rx_ctrl_set_auto_ack(g_rx_ctrl_handle, HAL_RX_QRESP_CODE0, DSI_ACK_DT_DCS_SHORT_RESPONSE_1B, 0x0F, 1, 0xab); + hal_dsi_rx_ctrl_set_auto_ack(g_rx_ctrl_handle, HAL_RX_QRESP_CODE1, DSI_ACK_DT_DCS_SHORT_RESPONSE_2B, 0x0e, 2, 0xef, 0xcd); + hal_dsi_rx_ctrl_set_auto_ack(g_rx_ctrl_handle, HAL_RX_QRESP_CODE2, DSI_ACK_DT_GEN_SHORT_RESPONSE_1B, 0x0a, 1, 0x12); + hal_dsi_rx_ctrl_set_auto_ack(g_rx_ctrl_handle, HAL_RX_QRESP_CODE3, DSI_ACK_DT_GEN_SHORT_RESPONSE_2B, 0x0b, 2, 0x34, 0x56); + hal_dsi_rx_ctrl_set_auto_ack(g_rx_ctrl_handle, HAL_RX_QRESP_CODE4, DSI_ACK_DT_DCS_LONG_RESPONSE, 0x0c, 4, 0x12, 0x34, 0x56, 0x78); + hal_dsi_rx_ctrl_set_auto_ack(g_rx_ctrl_handle, HAL_RX_QRESP_CODE5, DSI_ACK_DT_GEN_LONG_RESPONSE, 0x0d, 4, 0xab, 0xcd, 0xef, 0x9a); + hal_dsi_rx_ctrl_set_auto_ack(g_rx_ctrl_handle, HAL_RX_QRESP_CODE6, DSI_ACK_DT_GEN_LONG_RESPONSE, 0x1e, 8, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8); + hal_dsi_rx_ctrl_set_auto_ack(g_rx_ctrl_handle, HAL_RX_QRESP_CODE7, DSI_ACK_DT_DCS_LONG_RESPONSE, 0x1d, 8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x10); +#endif + hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +} + +/** +* @brief test system 主函数 +* @param none +* @retval none +*/ +void demo_hal_dsi_rx_case() +{ + open_mipi_rx(); + TAU_LOGD("open_mipi_rx done !\n"); + while (1) + { + hal_dsi_rx_ctrl_dcs_async_handler(g_rx_ctrl_handle); + } +} diff --git a/src/app/module_demo/demo_hal_dsi_rx.h b/src/app/module_demo/demo_hal_dsi_rx.h new file mode 100644 index 0000000..18d9ad1 --- /dev/null +++ b/src/app/module_demo/demo_hal_dsi_rx.h @@ -0,0 +1,22 @@ +/******************************************************************************* +* +* +* File: demo_hal_dsi_rx.h +* Description: dsi rx 测试头文件 +* Version: V0.1 +* Date: 2020-06-12 +* Author: lzy + *******************************************************************************/ + +#ifndef __DEMO_HAL_DSI_RX_H__ +#define __DEMO_HAL_DSI_RX_H__ + +/** +* @brief test system 主函数 +* @param none +* @retval none +*/ +void demo_hal_dsi_rx_case(void); + +#endif + diff --git a/src/app/module_demo/demo_hal_dsi_tx.c b/src/app/module_demo/demo_hal_dsi_tx.c new file mode 100644 index 0000000..8a597fc --- /dev/null +++ b/src/app/module_demo/demo_hal_dsi_tx.c @@ -0,0 +1,389 @@ +/******************************************************************************* +* +* +* File: demo_hal_dsi_tx.c +* Description： dsi_tx demo源文件 +* Version： V0.1 +* Date: 2023-07-27 +* Author： zzf + *******************************************************************************/ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "demo_hal_dsi_tx.h" +#if AMOLED_NT37280 +#include "hal_swire.h" +#endif + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "tx-log" + +#define DEMO_TX_VPG_EN (0) // 只适用于video模式输入video模式输出 +#define DEMO_RX_GEN_PATTERN (0) // TX VPG和RX pattern不建议同时打开 +#define DEMO_CCM_EN (0) // 基于RX pattern数据通路进行CCM调整 +#define DEMO_ENDIAN_EN (0) // RGB大小端配置 +#define DEMO_OVERWRITE_EN (0) // Overwrite功能配置 +#define DEMO_EDGE_DECT_EN (0) // 边缘检测功能配置 +#define DEMO_EDGE_ENHANCE_EN (0) // 边缘增强功能配置 +#define DEMO_FC_EN (0) // false color功能配置 +#define DEMO_BCS_EN (0) // BCS调整功能配置 +#define DEMO_BTA_LP_EN (0) // LP模式下BTA使用 +#define DEMO_BTA_HS_EN (0) // HS传输过程中BTA使用 + + +/* base_info输入端信息 */ +#define INPUT_WIDTH (1440) +#define INPUT_HEIGHT (2960) +#define INPUT_SRC_FRATE DSI_FRAME_RATE_60HZ +/* 输出数据格式(DSI_DATA_CMD_MODE , DSI_DATA_VIDEO_MODE) */ +#define DSI_INPUT_DATA_MODE DSI_DATA_VIDEO_MODE +#define DSI_OUTPUT_DATA_MODE DSI_DATA_VIDEO_MODE +/* vid模式选择 */ +#define OUTPUT_VID_SEL_MODE DSI_BURST_MODE +/* 虚拟通道(0-3) */ +#define VIRTUAL_CHANNEL DSI_VC_0 +/* TD_RSTN pin脚使用定义宏 */ +#define PIN_TD_RSTN IO_PAD_TD_RSTN + +#if DEMO_RX_GEN_PATTERN +/*输入mipi lane数量(DSI_RX_LANE_x x为1-4)*/ +#define INPUT_MIPI_LANE_NUM DSI_LANE_4 +/*输入图像格式*/ +#define INPUT_COLOR_MODE DSI_RGB888 +/*video mode输入时数据格式*/ +#define INPUT_VIDEO_MODEL DSI_NONBURST_EVENT +/*输入MIPI lane rate,video mode下需要计算delay,command mode可以不设置或者随便设置*/ +#define INPUT_MIPI_LANE_RATE (1200000000) +/*IPI pattern fps*/ +#define PATTERN_FPS (60) +#endif + +/******************************************************************************* +* 3.Global function and Global variable declarations +*******************************************************************************/ +static hal_dsi_tx_ctrl_handle_t *g_tx_ctrl_handle = NULL; +#if DEMO_RX_GEN_PATTERN +static hal_dsi_rx_ctrl_handle_t *g_rx_ctrl_handle = NULL; +static uint8_t g_rx_pattern_sel = 0; // 0:Vertical mode ; 1:Horizontal mode +#endif +static bool panel_init = false; + +#if DEMO_BTA_LP_EN +static uint8_t bta_ack_data = 0; +#endif + +#if DEMO_BTA_HS_EN +static bool sg_bta_need_flag = true; +#endif +/******************************************************************************* +* 4.Global function prototypes +*******************************************************************************/ +#if AMOLED_NT37280 +/** +* @brief timer回调函数用于swire输出 +* @param data: 回调参数 +* @retval 无 +*/ +static void demo_tx_timer_callback(void *data) +{ + hal_swire_set_waveform(12, 12, 12, 12); + hal_swire_set_pulse(32); +} + +/** +* @brief 打开屏背光 +* @param 无 +* @retval 无 +*/ +static void demo_tx_panel_backlight_on(void) +{ + hal_gpio_init_output(IO_PAD_AP_PWMEN, IO_LVL_HIGH); + hal_swire_init(); + hal_swire_enable(true); + + hal_swire_set_waveform(12, 12, 12, 12); + hal_swire_set_pulse(36); + + hal_timer_init(TIMER_NUM1); + hal_timer_start(TIMER_NUM1, 16, demo_tx_timer_callback, NULL); + +} +#endif + +/** +* @brief PANEL初始化 +* @param None +* @retval None +**/ +void demo_panel_init(void) +{ +#if AMOLED_NT37280 + demo_tx_panel_backlight_on(); +#endif + + /*初始化TD_RSTN并产生屏端复位信号*/ + hal_gpio_init_output(PIN_TD_RSTN, IO_LVL_HIGH); + hal_gpio_set_output_data(PIN_TD_RSTN, IO_LVL_HIGH); + delayMs(10); + hal_gpio_set_output_data(PIN_TD_RSTN, IO_LVL_LOW); + delayMs(10); + hal_gpio_set_output_data(PIN_TD_RSTN, IO_LVL_HIGH); + delayMs(10); + + /*bta read register*/ +#if DEMO_BTA_LP_EN + hal_dsi_tx_ctrl_read_cmd(0x06, 0, 0xDA, 1, &bta_ack_data); + TAU_LOGD("DA[0x%x]\n", bta_ack_data); +#endif + + /*initial code*/ +#if LCD_PT628_CSOT + TAU_LOGD("LCD_PT628_CSOT pannel init\n"); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0xBF, 0x00); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0xC0, 0x00); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x00, 0x00); + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0xFF, 0x87, 0x56, 0x01); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x00, 0x80); + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0xFF, 0x87, 0x56); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x00, 0xE8); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0xC0, 0x20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x00, 0x00); + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0xFF, 0x87, 0x56, 0x01); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x00, 0x80); + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0xFF, 0x87, 0x56); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); + delayMs(120); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x35, 0x00); + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x0F, 0xFF); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); + +#elif AMOLED_NT37280 + TAU_LOGD("AMOLED_NT37280 pannel init\n"); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0xFF, 0xE0); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0xFB, 0x01); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x18, 0x80); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x1A, 0x15); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x73, 0x01); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x89, 0x7F); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x0D, 0x9B); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x46, 0x17); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0xFF, 0xF0); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0xFB, 0x01); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x54, 0x03); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x9C, 0x00); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0xFF, 0x20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0xFB, 0x01); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x34, 0x00); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x35, 0x66); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x36, 0x66); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0xFF, 0x10); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0xFB, 0x01); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x88, 0x07); + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 5, 0x2A, 0x00, 0x00, 0x04, 0x37); + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 5, 0x2B, 0x00, 0x00, 0x08, 0xE7); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x7F, 0x07); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0xE9, 0x00); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0xBF, 0x00); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0xC0, 0x00); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x35, 0x00); //TE 35=00是标准60Hz; 35=01是有很多小信号 + hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x0F, 0xFF); //CABC + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); + delayMs(120); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); + delayMs(10); +#endif + +} + +/** +* @brief RX初始化和开启 +* @param None +* @retval None +**/ +static void demo_open_mipi_rx(void) +{ + /*RX demo详细请参考demo_hal_dsi_rx*/ +#if DEMO_RX_GEN_PATTERN + /* 创建rx ctrl handle */ + if (g_rx_ctrl_handle == NULL) + { + g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); + } + g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_rx_ctrl_handle->base_info.dst_w = __DPI_HACT; + g_rx_ctrl_handle->base_info.dst_h = __DPI_VACT; + g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; + g_rx_ctrl_handle->base_info.src_frate = INPUT_SRC_FRATE; + g_rx_ctrl_handle->base_info.src_mode = DSI_INPUT_DATA_MODE; + g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; + g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; + g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; + + /* 初始化rx ctrl */ + hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); + + /* 配置RX video pattern */ + hal_dsi_rx_ctrl_enable_test_pattern(g_rx_ctrl_handle, g_rx_pattern_sel, true, PATTERN_FPS); + + /* 启动rx ctrl */ + hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +#endif + +} + +/** +* @brief TX初始化和开启 +* @param None +* @retval None +**/ +static void demo_open_mipi_tx(void) +{ + /*创建TX实例*/ + if (g_tx_ctrl_handle == NULL) + { + g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); + } + g_tx_ctrl_handle->lane_num = _LANE_NUMBER; + g_tx_ctrl_handle->channel_id = VIRTUAL_CHANNEL; + g_tx_ctrl_handle->vid_mode = OUTPUT_VID_SEL_MODE; + g_tx_ctrl_handle->cmd_tx_type = _CMD_TYPE; + g_tx_ctrl_handle->dpi_vsa = __DPI_VSA; + g_tx_ctrl_handle->dpi_vbp = __DPI_VBP; + g_tx_ctrl_handle->dpi_vfp = __DPI_VFP; + g_tx_ctrl_handle->dpi_hsa = __DPI_HSA; + g_tx_ctrl_handle->dpi_hbp = __DPI_HBP; + g_tx_ctrl_handle->dpi_hfp = __DPI_HFP; + g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_tx_ctrl_handle->base_info.dst_w = __DPI_HACT; + g_tx_ctrl_handle->base_info.dst_h = __DPI_VACT; + g_tx_ctrl_handle->base_info.src_frate = INPUT_SRC_FRATE; + g_tx_ctrl_handle->base_info.src_mode = DSI_INPUT_DATA_MODE; + g_tx_ctrl_handle->base_info.dst_mode = DSI_OUTPUT_DATA_MODE; + +#if LCD_PT628_CSOT //RGBG玻璃匹配RGB Driver IC + //remap规则参数， 此款玻璃remapl_rule/remapr_rule使用同一规则； 如果玻璃存在两个规则需要支持，请定义两个数组分别配置remapl_rule/remapr_rule + remap_rule_t remap_rule = + { + 9, 11, 12, 8, 7, 10, 4, 5, 6, 2, 1, 3, + 20, 19, 22, 21, 23, 24, 14, 13, 15, 16, 17, 18 + }; + g_tx_ctrl_handle->pentile_info.pentile_24b = true; // 是否RGB驱动IC搭配RGBG玻璃使用 + g_tx_ctrl_handle->pentile_info.pentile_reverse_en = true; // 是否需要使用芯片本身行反转功能 + g_tx_ctrl_handle->pentile_info.pentile_enable = true; // 是否RGBG格式的数据传输 + g_tx_ctrl_handle->pentile_info.remapl_rule = &remap_rule; // reamp规则1 + g_tx_ctrl_handle->pentile_info.remapr_rule = &remap_rule; // reamp规则2 + g_tx_ctrl_handle->pentile_info.rgb_hact = 900; // 如果是RGB驱动IC搭配RGBG玻璃使用，此处配置RGB驱动IC的分辨率；dst_w按玻璃分辨率进行配置 + /* RGBG 屏幕补黑配置，此款玻璃两块补黑区域均参与子像素重排*/ + g_tx_ctrl_handle->pentile_info.blank_info0.blank_en = 1; // 是否使用补黑区域0 + g_tx_ctrl_handle->pentile_info.blank_info0.remap_en = 1; // 补黑区域0是否参与remap重排 + g_tx_ctrl_handle->pentile_info.blank_info0.st_col = 0; // 补黑区域0起始位置，按有效子像素序号进行计算 + g_tx_ctrl_handle->pentile_info.blank_info0.width = 12; // 补黑区域0补黑宽度，按子像素级计算 + g_tx_ctrl_handle->pentile_info.blank_info1.blank_en = 1; // 是否使用补黑区域1 + g_tx_ctrl_handle->pentile_info.blank_info1.remap_en = 1; // 补黑区域1是否参与remap重排 + g_tx_ctrl_handle->pentile_info.blank_info1.st_col = 1248; // 补黑区域1起始位置，按有效子像素序号进行计算，必须大于补黑区域0的起始位置 + g_tx_ctrl_handle->pentile_info.blank_info1.width = 216; // 补黑区域1补黑宽度，按子像素级计算 +#endif + +#if DEMO_ENDIAN_EN + hal_dsi_tx_ctrl_set_endianness(DPI_ENDIAN_BGR);// 默认RGB输出，可以更改为BGR 需要在初始化之前调用 +#endif + + /*调用初始化接口进行TX初始化*/ + hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); + + /*屏幕初始化，复位时序和发送initial code*/ + if (!panel_init) + { + demo_panel_init(); + panel_init = true; + } + +#if DEMO_TX_VPG_EN /*使用TX VPG测试TX是否正常工作*/ + hal_dsi_tx_ctrl_set_vpg(true, TX_VPG_V_COLOR, false); +#endif + + /*tx start开始传输高速数据*/ + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + + /*可选功能配置，在任意时刻均可调用 start*/ +#if DEMO_CCM_EN + ccm_coef_t coef; + coef.coef_c00 = 0x1f3; + coef.coef_c01 = 0xf3a; + coef.coef_c02 = 0xfd3; + coef.coef_c10 = 0xf9c; + coef.coef_c11 = 0x19c; + coef.coef_c12 = 0xfca; + coef.coef_c20 = 0x27; + coef.coef_c21 = 0xf46; + coef.coef_c22 = 0x193; + hal_dsi_tx_ctrl_set_ccm(&coef); +#endif + +#if DEMO_OVERWRITE_EN + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0xFF); //蓝色图形数据输出 参数为R/G/B灰度值 + hal_dsi_tx_ctrl_overwrite_enable(true); //开启overwrite功能 + /*........*/ + //hal_dsi_tx_ctrl_overwrite_enable(false); //需要关闭overwrite功能时调用 +#endif + +#if DEMO_EDGE_DECT_EN + dsi_tx_edge_dect_t edge_dect_para = {0x10, true}; + hal_dsi_tx_ctrl_set_edge_dect(&edge_dect_para); +#endif + +#if DEMO_EDGE_ENHANCE_EN + dsi_tx_edge_enh_t edge_enh_para = {true, 64, 4, 64, 0}; + hal_dsi_tx_ctrl_set_edge_enhance(&edge_enh_para); +#endif + +#if DEMO_FC_EN + dsi_tx_fc_t fc_para = {64, 64}; + hal_dsi_tx_ctrl_set_fc(&fc_para); +#endif + +#if DEMO_BCS_EN + dsi_tx_bcs_t bcs_cfg = {0x00, 0x10, 0x10}; // 参数含义：{明亮度，对比度，饱和度} + hal_dsi_tx_ctrl_set_bcs(&bcs_cfg); +#endif + /*可选功能配置，在任意时刻均可调用 end*/ + +} + +/** +* @brief demo测试接口函数 +* @param None +* @retval None +*/ +void demo_dsi_tx_case(void) +{ + TAU_LOGD("DSI TX DEMO.\n"); + demo_open_mipi_rx(); + demo_open_mipi_tx(); + + while (1) + { +#if DEMO_BTA_HS_EN + if (sg_bta_need_flag) //当需要进行BTA回读的时候置标志位，等待Vporch阶段进行BTA回读获取有效数据 + { + uint8_t bta_data = 0; + if (hal_dsi_tx_ctrl_vporch_bta_opera(0x06, 0xDA, 1, &bta_data)) + { + //Vporch阶段进行BTA回读获取到有效数据，关闭本次回读流程 + sg_bta_need_flag = false; + TAU_LOGD("hs bta[0x%x]\n", bta_data); + } + } +#endif + } + +} + diff --git a/src/app/module_demo/demo_hal_dsi_tx.h b/src/app/module_demo/demo_hal_dsi_tx.h new file mode 100644 index 0000000..3d93371 --- /dev/null +++ b/src/app/module_demo/demo_hal_dsi_tx.h @@ -0,0 +1,77 @@ +/******************************************************************************* +* +* +* File: demo_hal_dsi_tx.h +* Description: dsi-tx demo头文件 +* Version: V0.1 +* Date: 2023-07-27 +* Author: zzf + *******************************************************************************/ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "hal_dsi_tx_ctrl.h" +#include "hal_dsi_rx_ctrl.h" +#include "tau_delay.h" +#include "tau_log.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#ifndef _DEMO_HAL_DSI_TX_H_ +#define _DEMO_HAL_DSI_TX_H_ + +#define LCD_PT628_CSOT (1) //4lane RGBG-1242x2699 RGB-900X2688 +#define AMOLED_NT37280 (0) //4lane 1080X2280 + +#if LCD_PT628_CSOT + +#define _LANE_NUMBER (4) //数据lane的个数 +#define _CMD_TYPE (DSI_CMD_TX_LP) //0-HS,1-LP; + +#define __DPI_VSA (16) //VSYNC宽度 +#define __DPI_VBP (16) //VSYNC后的无效像素 +#define __DPI_VACT (2688) //玻璃V分辨率定义 +#define __DPI_VFP (123 ) //VSYNC前的无效像素 + +#define __DPI_HSA (6) //HSYNC宽度 +#define __DPI_HBP (18) //HSYNC后的无效像素 +#define __DPI_HACT (1242) //玻璃H分辨率定义 +#define __DPI_HFP (32) //HSYNC前的无效像素 + +#elif AMOLED_NT37280 + +#define _LANE_NUMBER (4) //数据lane的个数 +#define _CMD_TYPE (DSI_CMD_TX_LP) //0-HS,1-LP; + +#define __DPI_VSA (4) //VSYNC宽度 +#define __DPI_VBP (28) //VSYNC后的无效像素 +#define __DPI_VACT (2280) //V分辨率定义 +#define __DPI_VFP (10) //VSYNC前的无效像素 + +#define __DPI_HSA (8) //HSYNC宽度 +#define __DPI_HBP (16) //HSYNC后的无效像素 +#define __DPI_HACT (1080) //H分辨率定义 +#define __DPI_HFP (36) //HSYNC前的无效像素 + +#endif + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief demo测试接口函数 +* @param None +* @retval None +*/ +void demo_dsi_tx_case(void); + +#endif diff --git a/src/app/module_demo/demo_hal_flash.c b/src/app/module_demo/demo_hal_flash.c new file mode 100644 index 0000000..4843e0e --- /dev/null +++ b/src/app/module_demo/demo_hal_flash.c @@ -0,0 +1,218 @@ +/******************************************************************************* +* Copyright (C) 2021-2022, All Rights Reserved. +* +* File: test_hal_flash.c +* Description： hal_flash 测试用例源文件 +* Version： V0.1 +* Date： 2022-04-21 +* Author： RANDY + *******************************************************************************/ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "demo_hal_flash.h" +#include "hal_flash.h" +#include "tau_delay.h" +#include "tau_log.h" +#include "tau_common.h" +#include "test_cfg_global.h" + +#if _MODULE_DEMO_FLASH_EN +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "demo_flash" + +#define TEST_DATA_SIZE 32 + +#define DATA_BLOCK_SIZE (64*1024) +#define DATA_PAGE_SIZE 1024 + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +static fls_ops_cfg_t *fls_ops_cfg; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/************************************************************************** +* @name : +* @brief +* @param +* @retval +**************************************************************************/ + +void test_hal_flash_get_public_region_test(void) +{ + uint8_t test_data[TEST_DATA_SIZE] = 0; + TAU_LOGD("test get data public\n"); + + fls_ops_cfg->flash_block = 7;//固定值 + fls_ops_cfg->flash_page = 0;//0-32 + fls_ops_cfg->page_offset_addr = 0; + fls_ops_cfg->data_size = TEST_DATA_SIZE; + fls_ops_cfg->user_data = test_data; + + hal_flash_init(); + + //1 读数据 + hal_flash_public_region_ops(FLASH_PUBLIC_READ, fls_ops_cfg); + + for (uint8_t i = 0; i < TEST_DATA_SIZE; i++) + { + TAU_LOGD("read data[%d]=0x%x ", i, test_data[i]); + } + + //2 写数据 + for (uint32_t i = 0; i < TEST_DATA_SIZE; i++) + { + test_data[i] = i; + } + + hal_flash_public_region_ops(FLASH_PUBLIC_WRITE, fls_ops_cfg); + + //3 回读 + for (uint32_t i = 0; i < TEST_DATA_SIZE; i++) + { + test_data[i] = 0; + } + + hal_flash_public_region_ops(FLASH_PUBLIC_READ, fls_ops_cfg); + + //4 对比 + for (uint8_t i = 0; i < TEST_DATA_SIZE; i++) + { + TAU_LOGD("read data[%d]=0x%x ", i, test_data[i]); + } + +} + + + +// 验证flash UID的读取，16byte的UID +void test_flash_uid_read(void) +{ + uint8_t get_id[16] = {0}; + + TAU_LOGD("test_flash_uid_read begin \n"); + + hal_flash_init(); + + hal_flash_read_uid(get_id, 16); + //不同的IC，ID不一样，存在0x00或者0xFF的情况 + for (uint8_t i = 0; i < 16; i++) + { + TAU_LOGD("read ID [%d]=0x%X \n", i, get_id[i]); + } +} + + +/** +* @brief 获取user_data的数据个数 +* @param 无 +* @retval bool 无 +*/ +void get_user_data_size(void) +{ + uint32_t user_data_size = 0; + + TAU_LOGD("test get data addr\n"); + + user_data_size = hal_flash_get_user_data_size(); + + TAU_LOGD("user_data size 0x%x \n", user_data_size); +} + + +void test_hal_flash_get_user_region_test(void) +{ + uint8_t user_data[32]; + uint32_t user_address = 0; //需要读取数据的位置 + uint32_t user_data_size = 0; + + TAU_LOGD("test get data addr\n"); + //读取user data 0地址 + user_address = 0; + + fls_ops_cfg->flash_block = user_address / DATA_BLOCK_SIZE; + fls_ops_cfg->flash_page = (user_address % DATA_BLOCK_SIZE) / DATA_PAGE_SIZE; + fls_ops_cfg->page_offset_addr = user_address % DATA_PAGE_SIZE; + fls_ops_cfg->data_size = 16; + fls_ops_cfg->user_data = user_data; + hal_flash_user_region_ops(FLASH_USERDATA_READ, fls_ops_cfg); + for (uint8_t i = 0; i < 2; i++) + { + TAU_LOGD("user_data[%d]=0x%x ", i, user_data[i]); + } + + //读取user data 0x6000地址 + user_address = 0x6000; + + fls_ops_cfg->flash_block = user_address / DATA_BLOCK_SIZE; + fls_ops_cfg->flash_page = (user_address % DATA_BLOCK_SIZE) / DATA_PAGE_SIZE; + fls_ops_cfg->page_offset_addr = user_address % DATA_PAGE_SIZE; + fls_ops_cfg->data_size = 16; + fls_ops_cfg->user_data = user_data; + hal_flash_user_region_ops(FLASH_USERDATA_READ, fls_ops_cfg); + for (uint8_t i = 0; i < 2; i++) + { + TAU_LOGD("user_data[%d]=0x%x ", i, user_data[i]); + } +} + + +/** +* @brief 获取user_data的绝对起始地址 的接口测试 +* @param 无 +* @retval bool 无 +*/ + +void demo_hal_flash(void) +{ + uint8_t case_sel = 2; + + switch (case_sel) + { + case 1: + test_hal_flash_get_public_region_test(); + break; + + case 2: + test_hal_flash_get_user_region_test(); + break; + + case 3: + test_flash_uid_read(); + break; + + case 4: + get_user_data_size(); + break; + + case 5: + //测试共享flash接口,需要外接SPI主机测试 + TAU_LOGI("test TMON \n"); + hal_flash_share_mode(true); + break; + + default: + break; + } + + +} + + + +#endif + diff --git a/src/app/module_demo/demo_hal_flash.h b/src/app/module_demo/demo_hal_flash.h new file mode 100644 index 0000000..849440b --- /dev/null +++ b/src/app/module_demo/demo_hal_flash.h @@ -0,0 +1,35 @@ +/******************************************************************************* +* Copyright (C) 2021-2022, All Rights Reserved. +* +* File: test_hal_flash.h +* Description: hal_flash测试用例头文件 +* Version: V0.1 +* Date: 2023-07-17 +* Author: Kevin + *******************************************************************************/ +#ifndef __DEMO_HAL_FLASH_H__ +#define __DEMO_HAL_FLASH_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +void demo_hal_flash(void); + +#endif /* __TEST_HAL_FLASH_H__ */ + diff --git a/src/app/module_demo/demo_hal_gpio.c b/src/app/module_demo/demo_hal_gpio.c new file mode 100644 index 0000000..208b4d2 --- /dev/null +++ b/src/app/module_demo/demo_hal_gpio.c @@ -0,0 +1,268 @@ +/******************************************************************************* +* +* +* File: demo_gpio.c +* Description： GPIO测试用例源文件 +* Version： V0.1 +* Date： 2023-07-27 +* Author： kevin + *******************************************************************************/ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "hal_gpio.h" +#include "tau_delay.h" +#include "tau_log.h" +#include "test_cfg_global.h" + +#if _DEMO_GPIO_EN +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "gpio-log" + +//output +#define GPIO_OUT_TEST 1 +#define GPIO_OUT_IN_CONNECT 0 + +//input +#define GPIO_IN_INT_SINGLE 0 +//IO mode init +#define GPIO_MODE_INIT 0 + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ +static bool s_gpio_callback_flag = false; +static sys_cfg_trigger_e s_gpio_trig = DETECT_HIGH_LVL; +static io_pad_e s_gpio_demo_pad1 = IO_PAD_AP_TPRSTN; +static io_pad_e s_gpio_demo_pad2 = IO_PAD_AP_PWMEN; + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/************************************************************************** +* @name : demo_gpio_callback +* @brief : 测试回调函数 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void demo_gpio_callback(void *data) +{ + gpio_int_e type = *(gpio_int_e *)data; + gpio_int_e int_type = hal_gpio_get_int_type(s_gpio_demo_pad1); + + TAU_LOGI("demo_gpio_callback type:%d, int_type:%d, s_gpio_trig:%d\r\n", type, int_type, s_gpio_trig); + + hal_gpio_ctrl_eint(s_gpio_demo_pad1, DISABLE); + + if (DETECT_HIGH_LVL == s_gpio_trig) + { + hal_gpio_set_output_data(s_gpio_demo_pad2, IO_LVL_LOW); + } + else if (DETECT_LOW_LVL == s_gpio_trig) + { + hal_gpio_set_output_data(s_gpio_demo_pad2, IO_LVL_HIGH); + } + + switch (s_gpio_trig) + { + case DETECT_HIGH_LVL: + s_gpio_trig = DETECT_LOW_LVL; + break; + + case DETECT_LOW_LVL: + s_gpio_trig = DETECT_RISING_EDGE; + break; + + case DETECT_RISING_EDGE: + s_gpio_trig = DETECT_FALLING_EDGE; + break; + + default: + return; + } + + s_gpio_callback_flag = true; +} + +/************************************************************************** +* @name : demo_gpio_int +* @brief : gpio测试中断通用配置 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void demo_gpio_int(io_pad_e pad, sys_cfg_trigger_e trig) +{ + /*1.关闭中断*/ + hal_gpio_ctrl_eint(pad, DISABLE); + + /*2.中断初始化*/ + hal_gpio_init_eint(pad, trig); + + /*3.注册回调*/ + hal_gpio_reg_eint_cb(pad, demo_gpio_callback); + + /*4.使能中断*/ + hal_gpio_ctrl_eint(pad, ENABLE); +} + +/************************************************************************** +* @name : demo_gpio_out_case +* @brief : gpio output功能测试 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void demo_gpio_out_case(void) +{ + gpio_level_e flag = IO_LVL_LOW; + + TAU_LOGI("demo_gpio_out_case\r\n"); + + hal_gpio_init_output(s_gpio_demo_pad1, flag); + while (1) + { + delayMs(10); + flag = (flag == IO_LVL_LOW) ? IO_LVL_HIGH : IO_LVL_LOW; + hal_gpio_set_output_data(s_gpio_demo_pad1, flag); + } +} + +/************************************************************************** +* @name : demo_gpio_in_case +* @brief : gpio input功能测试 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void demo_gpio_in_case(void) +{ + gpio_level_e flag = IO_LVL_LOW; + + TAU_LOGI("demo_gpio_in_case\r\n"); + + hal_gpio_init_input(s_gpio_demo_pad1); + hal_gpio_init_output(s_gpio_demo_pad2, flag); + while (1) + { + delayMs(10); + flag = (flag == IO_LVL_LOW) ? IO_LVL_HIGH : IO_LVL_LOW; + hal_gpio_set_output_data(s_gpio_demo_pad2, flag); + } +} + +/************************************************************************** +* @name : demo_gpio_int_single +* @brief : gpio input配置单个中断 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void demo_gpio_int_single(void) +{ + sys_cfg_trigger_e trig = s_gpio_trig; + + TAU_LOGI("demo_gpio_int_single trig:%d\r\n", trig); + + if (DETECT_HIGH_LVL == s_gpio_trig || DETECT_RISING_EDGE == s_gpio_trig) + { + hal_gpio_init_output(s_gpio_demo_pad2, IO_LVL_LOW); + } + else if (DETECT_LOW_LVL == s_gpio_trig || DETECT_FALLING_EDGE == s_gpio_trig) + { + hal_gpio_init_output(s_gpio_demo_pad2, IO_LVL_HIGH); + } + + demo_gpio_int(s_gpio_demo_pad1, trig); + + if (DETECT_HIGH_LVL == s_gpio_trig || DETECT_RISING_EDGE == s_gpio_trig) + { + delayMs(100); + hal_gpio_set_output_data(s_gpio_demo_pad2, IO_LVL_HIGH); + } + else if (DETECT_LOW_LVL == s_gpio_trig || DETECT_FALLING_EDGE == s_gpio_trig) + { + delayMs(100); + hal_gpio_set_output_data(s_gpio_demo_pad2, IO_LVL_LOW); + } +} + +/** +* @brief GPIO初始化配置,根据实际原理图提前配置IO功能以及状态,默认功能可不配置 +* TP相关I2C/SPI 在tp_transfer.c +* @param none +* @retval none +*/ +static void demo_gpio_init(void) +{ + io_pad_attr_t attrs[] = + { + //1.配置成GPIO 输出 + {IO_PIN_8, PIN8_MODE_GPIO7, IO_IOE_OUTPUT, IO_LVL_LOW}, /* PIN_8(TD_RSTN), GPIO,输出,低电平 */ + {IO_PIN_17, PIN17_MODE_GPIO8, IO_IOE_OUTPUT, IO_LVL_LOW}, /* PIN_17(PWMEN), GPIO,输出,低电平 */ + {IO_PIN_16, PIN16_MODE_GPIO2, IO_IOE_OUTPUT, IO_LVL_LOW}, /* PIN_16(AP_INT),GPIO,输出,低电平 */ + + //2.配置成GPIO 输入 + {IO_PIN_29, PIN29_MODE_GPIO3, IO_IOE_INPUT, IO_LVL_NONE}, /* PIN_29(AP_TE), GPIO,输入 */ + + //3.配置UART TX + {IO_PIN_2, PIN2_MODE_UART0_TX, IO_IOE_NONE, IO_LVL_NONE}, /* PIN_2(UART0_TX), UART,TX */ + + //4.配置I2C + {IO_PIN_5, PIN5_MODE_I2C1_SCL, IO_IOE_NONE, IO_LVL_NONE}, /* PIN_5(TD_SPIM_CLK), I2C,SCL */ + {IO_PIN_6, PIN6_MODE_I2C1_SDA, IO_IOE_NONE, IO_LVL_NONE}, /* PIN_6(TD_SPIM_CSN), I2C,SDA */ + + //5.配置SPIS + {IO_PIN_30, PIN30_MODE_SPIS_MISO, IO_IOE_NONE, IO_LVL_NONE}, /* PIN_30(AP_SPIS_MISO), SPIS,MISO */ + {IO_PIN_31, PIN31_MODE_SPIS_CSN, IO_IOE_NONE, IO_LVL_NONE}, /* PIN_31(AP_SPIS_CSN), SPIS,CSN */ + {IO_PIN_32, PIN32_MODE_SPIS_SCLK, IO_IOE_NONE, IO_LVL_NONE}, /* PIN_32(AP_SPIS_CLK), SPIS,CLK */ + {IO_PIN_33, PIN33_MODE_SPIS_MOSI, IO_IOE_NONE, IO_LVL_NONE} /* PIN_33(AP_SPIS_MOSI), SPIS,MOSI */ + }; + uint8_t size = sizeof(attrs) / sizeof(io_pad_attr_t); + hal_gpio_config_pad(attrs, size); +} + + +/************************************************************************** +* @name : demo_gpio_case +* @brief : 测试用例 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void demo_gpio_case(void) +{ + s_gpio_callback_flag = true; + +#if GPIO_IN_INT_SINGLE + while (1) + { + if (s_gpio_callback_flag) + { + s_gpio_callback_flag = false; + demo_gpio_int_single(); + } + } +#elif GPIO_OUT_TEST + demo_gpio_out_case(); +#elif GPIO_OUT_IN_CONNECT + demo_gpio_in_case(); +#elif GPIO_MODE_INIT + demo_gpio_init(); +#endif +} + +#endif + diff --git a/src/app/module_demo/demo_hal_gpio.h b/src/app/module_demo/demo_hal_gpio.h new file mode 100644 index 0000000..c961cd8 --- /dev/null +++ b/src/app/module_demo/demo_hal_gpio.h @@ -0,0 +1,35 @@ +/******************************************************************************* +* +* +* File: demo_gpio.h +* Description: GPIO测试用例头文件 +* Version: V0.1 +* Date: 2023-07-27 +* Author: kevin + *******************************************************************************/ +#ifndef __DEMO_GPIO_H__ +#define __DEMO_GPIO_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +void demo_gpio_case(void); + +#endif /* __DEMO_GPIO_H__ */ + diff --git a/src/app/module_demo/demo_hal_i2c.c b/src/app/module_demo/demo_hal_i2c.c new file mode 100644 index 0000000..356b484 --- /dev/null +++ b/src/app/module_demo/demo_hal_i2c.c @@ -0,0 +1,412 @@ +/******************************************************************************* +* Copyright (C) 2020-2023, tau Systems (R),All Rights Reserved. +* +* File: demo_hal_i2ci.c +* Description： i2c demo code +* Version： V0.1 +* Date： 2023-07-27 +* Author： swx + *******************************************************************************/ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "hal_i2c_master.h" +#include "hal_i2c_slave.h" +#include "demo_hal_i2c.h" +#include "hal_gpio.h" +#include "tau_log.h" +#include "tau_delay.h" + +#if _MODULE_DEMO_I2C_EN +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "demo_hal_i2c" +#define BUFFER_SIZE 10 // 以10个数据为例 + +#define CHECK_TRANS_RESULT(src, dst, size) \ + for(uint32_t check_num = 0; check_num < size; check_num ++) \ + {\ + if(src[check_num] != dst[check_num])\ + {\ + TAU_LOGD("src[%d] = %x, dst[%d] = %x , error!!\n",check_num,src[check_num],check_num,dst[check_num]);\ + return false;\ + }\ + }\ + +/******************************************************************************* +* 3.Global function and Global variable declarations +*******************************************************************************/ +static uint8_t i2cm_read_buffer[BUFFER_SIZE]; +static uint8_t i2cs_read_buffer[BUFFER_SIZE]; +static uint8_t i2cs_write_buffer[BUFFER_SIZE]; + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief i2c master的IO初始化 +* @param none +* @retval none +*/ +static void i2cm_io_init(void) +{ + io_pad_attr_t attrs[] = + { + {IO_PAD_TD_SPIM_CLK, PIN5_MODE_I2C1_SCL, IO_IOE_NONE, IO_LVL_HIGH}, + {IO_PAD_TD_SPIM_CSN, PIN6_MODE_I2C1_SDA, IO_IOE_NONE, IO_LVL_HIGH} + }; + uint8_t size = sizeof(attrs) / sizeof(io_pad_attr_t); + hal_gpio_config_pad(attrs, size); +} + +/** +* @brief i2c slave的IO初始化 +* @param none +* @retval none +*/ +static void i2cs_io_init(void) +{ + io_pad_attr_t attrs[] = + { + {IO_PAD_AP_SPIS_CLK, PIN32_MODE_I2C02_SCL, IO_IOE_NONE, IO_LVL_HIGH}, + {IO_PAD_AP_SPIS_CSN, PIN31_MODE_I2C02_SDA, IO_IOE_NONE, IO_LVL_HIGH} + }; + uint8_t size = sizeof(attrs) / sizeof(io_pad_attr_t); + hal_gpio_config_pad(attrs, size); +} + +/** +* @brief i2c slave的中断回调服务函数 +* @param index: I2Cx index +* @param int_status: 中断事件 +* @param recieve_num： 接收到的packet数 +* @retval none +*/ +static void i2cs_callback(i2c_index_e index, hal_i2cs_event_e int_status, size_t recieve_num) +{ + /* 收到READ_REQ中断 */ + if (int_status == I2CS_EVENT_READ) + { + /* 更新I2CS的txbuffer，将i2cs_write_buffer的数据发送给主机 */ + hal_i2cs_update_tx_buffer(index, i2cs_write_buffer, BUFFER_SIZE, false); + } + /* 收到stop中断 */ + else if (int_status == I2CS_EVENT_STOP) + { + if (recieve_num > 0) + { + /* 将读到的值写到i2cs_write_buffer中 */ + for (int i = 0; i < recieve_num; i++) + i2cs_write_buffer[i] = i2cs_read_buffer[i]; + } + /* 更新I2CS的rxbuffer */ + hal_i2cs_update_rx_buffer(index, i2cs_read_buffer, BUFFER_SIZE); + } +} + +/** +* @brief i2c master初始化 +* @param index: I2Cx index +* @param addr: 从机地址 +* @param addr_bits: 从机地址位数 +* @param speed: 主机速率设置 +* @retval none +*/ +void i2cm_init(i2c_index_e index, uint16_t addr, uint8_t addr_bits, uint32_t speed) +{ + /* I2CS的IO初始化 */ + i2cm_io_init(); + + /* I2CM初始化 */ + hal_i2cm_init(index, addr, addr_bits, speed); +} + +/** +* @brief i2c slave初始化 +* @param index: I2Cx index +* @param addr: 从机自身地址 +* @param addr_bits: 从机地址位数 +* @retval none +*/ +void i2cs_init(i2c_index_e index, uint16_t addr, uint8_t addr_bits) +{ + /* I2CS的IO初始化 */ + i2cs_io_init(); + + /* I2CS的初始化 */ + hal_i2cs_init(index, addr, addr_bits); + + /* I2CS注册回调函函数 */ + hal_i2cs_register_callback(index, i2cs_callback); + + /* I2CS设置初始读写buffer */ + hal_i2cs_update_rx_buffer(index, i2cs_read_buffer, BUFFER_SIZE); + hal_i2cs_update_tx_buffer(index, i2cs_write_buffer, BUFFER_SIZE, false); + + /* I2CS启动 */ + hal_i2cs_start(index); +} + +/** +* @brief i2c master去初始化 +* @param index: I2Cx index +* @retval none +*/ +void i2cm_deinit(i2c_index_e index) +{ + hal_i2cm_deinit(index); +} + +/** +* @brief i2c slave去初始化 +* @param index: I2Cx index +* @retval none +*/ +void i2cs_deinit(i2c_index_e index) +{ + hal_i2cs_stop(index); + hal_i2cs_deinit(index); +} + +/** +* @brief i2c case buffer初始化 +* @param none +* @retval none +*/ +static void i2c_case_buffer_init(void) +{ + TAU_LOGD("i2c_case_buffer_init\n"); + /* init buffer */ + uint8_t i = 0 ; + for (i = 0; i < BUFFER_SIZE; i ++) + { + i2cm_read_buffer[i] = 0; + i2cs_read_buffer[i] = 0; + i2cs_write_buffer[i] = 0; + } +} + +/** +* @brief 芯片I2CM与I2CS对接,验证I2CM用CPU方式传输数据的正确性 +* @param +* @retval bool true/false +*/ +static bool hal_i2c_cpu_transfer_case(void) +{ + uint8_t write_buffer[10] = {0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; + uint8_t addr_bit = 7; + uint32_t speed = 400000; + uint16_t addr = 0x50; + + /* I2CM初始化，I2C1+目标地址0x50+7位地址+400k传输速率 */ + i2cm_init(I2C_INDEX_1, addr, addr_bit, speed); + + /* I2CS初始化，I2C0+本机地址0x50+7位地址 */ + i2cs_init(I2C_INDEX_0, addr, addr_bit); + + /* buffer初始化 */ + i2c_case_buffer_init(); + + /* I2CM写write_buffer数据到0x50地址的从机 */ + if (hal_i2cm_write(I2C_INDEX_1, write_buffer, BUFFER_SIZE) != true) + { + TAU_LOGD("I2CM CPU write data fail!\n"); + return false; + } + TAU_LOGD("tx: %x %x %x %x %x %x %x %x %x %x\n", write_buffer[0], write_buffer[1], write_buffer[2], \ + write_buffer[3], write_buffer[4], write_buffer[5], write_buffer[6], write_buffer[7], write_buffer[8], \ + write_buffer[9]); + + /* I2CM向地址为0x50的从机读取BUFFER_SIZE个数据，此case中，寄存器addr和size为0，可自行添加 */ + if (hal_i2cm_read(I2C_INDEX_1, 0, 0, i2cm_read_buffer, BUFFER_SIZE) != true) + { + TAU_LOGD("I2CM CPU read data fail!\n"); + return false; + } + TAU_LOGD("rx: %x %x %x %x %x %x %x %x %x %x\n", i2cm_read_buffer[0], i2cm_read_buffer[1], \ + i2cm_read_buffer[2], i2cm_read_buffer[3], i2cm_read_buffer[4], i2cm_read_buffer[5], \ + i2cm_read_buffer[6], i2cm_read_buffer[7], i2cm_read_buffer[8], i2cm_read_buffer[9]); + + /* 检查传输结果，I2CM发出去的数据是否与接收到的数据一致 */ + CHECK_TRANS_RESULT(write_buffer, i2cm_read_buffer, BUFFER_SIZE); + + /* I2CM && I2CS去初始化 */ + i2cs_deinit(I2C_INDEX_0); + i2cm_deinit(I2C_INDEX_1); + TAU_LOGD("hal_i2c_cpu_transfer_case done!\n"); + return true; +} + + +/** +* @brief 芯片I2CM与I2CS对接,验证I2CM用DMA方式传输数据的正确性 +* @param +* @retval bool true/false +*/ +static bool hal_i2c_dma_transfer_case(void) +{ + uint8_t write_buffer[10] = {0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29}; + uint8_t addr_bit = 7; + uint32_t speed = 400000; + uint16_t addr = 0x50; + + /* I2CM初始化，I2C1+目标地址0x50+7位地址+400k传输速率 */ + i2cm_init(I2C_INDEX_1, addr, addr_bit, speed); + + /* I2CS初始化，I2C0+本机地址0x50+7位地址 */ + i2cs_init(I2C_INDEX_0, addr, addr_bit); + + /* buffer初始化 */ + i2c_case_buffer_init(); + + /* I2CM写write_buffer数据到0x50地址的从机 */ + hal_i2cm_dma_write(I2C_INDEX_1, write_buffer, BUFFER_SIZE); + + /* 等待I2CM传输完成 */ + while (!hal_i2cm_get_transfer_complete(I2C_INDEX_1)); + TAU_LOGD("tx: %x %x %x %x %x %x %x %x %x %x\n", write_buffer[0], write_buffer[1], write_buffer[2], \ + write_buffer[3], write_buffer[4], write_buffer[5], write_buffer[6], write_buffer[7], write_buffer[8], \ + write_buffer[9]); + + /* I2CM向地址为0x50的从机读取BUFFER_SIZE个数据，此case中，寄存器addr和size为0，可自行添加 */ + hal_i2cm_dma_read(I2C_INDEX_1, 0, 0, i2cm_read_buffer, BUFFER_SIZE); + + /* 等待I2CM传输完成 */ + while (!hal_i2cm_get_transfer_complete(I2C_INDEX_1)); + TAU_LOGD("rx: %x %x %x %x %x %x %x %x %x %x\n", i2cm_read_buffer[0], i2cm_read_buffer[1], \ + i2cm_read_buffer[2], i2cm_read_buffer[3], i2cm_read_buffer[4], i2cm_read_buffer[5], \ + i2cm_read_buffer[6], i2cm_read_buffer[7], i2cm_read_buffer[8], i2cm_read_buffer[9]); + + /* 检查传输结果，I2CM发出去的数据是否与接收到的数据一致 */ + CHECK_TRANS_RESULT(write_buffer, i2cm_read_buffer, BUFFER_SIZE); + + /* I2CM && I2CS去初始化 */ + i2cs_deinit(I2C_INDEX_0); + i2cm_deinit(I2C_INDEX_1); + TAU_LOGD("hal_i2c_dma_transfer_case done!\n"); + return true; +} + +/** +* @brief 芯片I2CM与I2CS对接,验证双slave通信的正确性 +* @param +* @retval bool true/false +*/ +static bool hal_i2c_double_slave_case(void) +{ + uint16_t i2cs1_addr = 0x50; + uint8_t i2cs1_addrbit = 7; + uint16_t i2cs2_addr = 0x120; + uint8_t i2cs2_addrbit = 10; + uint32_t speed = 400000; + uint8_t write_buffer1[10] = {0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; + uint8_t write_buffer2[10] = {0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29}; + + /* I2CM初始化，I2C1+目标地址0x50+7位地址+400k传输速率 */ + i2cm_init(I2C_INDEX_1, i2cs1_addr, i2cs1_addrbit, speed); + + /* I2CS初始化，I2C0+本机地址0x50+7位地址 */ + i2cs_init(I2C_INDEX_0, i2cs1_addr, i2cs1_addrbit); + + /* I2CS初始化，I2C2+本机地址0x120+10位地址 */ + i2cs_init(I2C_INDEX_2, i2cs2_addr, i2cs2_addrbit); + + /* I2CM写write_buffer1数据到0x50地址的从机 */ + hal_i2cm_dma_write(I2C_INDEX_1, write_buffer1, BUFFER_SIZE); + + /* 等待I2CM传输完成 */ + while (!hal_i2cm_get_transfer_complete(I2C_INDEX_1)); + TAU_LOGD("tx: %x %x %x %x %x %x %x %x %x %x\n", write_buffer1[0], write_buffer1[1], write_buffer1[2], \ + write_buffer1[3], write_buffer1[4], write_buffer1[5], write_buffer1[6], write_buffer1[7], write_buffer1[8], \ + write_buffer1[9]); + + /* I2CM向地址为0x50的从机读取BUFFER_SIZE个数据，此case中，寄存器addr和size为0，可自行添加 */ + hal_i2cm_dma_read(I2C_INDEX_1, 0, 0, i2cm_read_buffer, BUFFER_SIZE); + + /* 等待I2CM传输完成 */ + while (!hal_i2cm_get_transfer_complete(I2C_INDEX_1)); + TAU_LOGD("rx: %x %x %x %x %x %x %x %x %x %x\n", i2cm_read_buffer[0], i2cm_read_buffer[1], \ + i2cm_read_buffer[2], i2cm_read_buffer[3], i2cm_read_buffer[4], i2cm_read_buffer[5], \ + i2cm_read_buffer[6], i2cm_read_buffer[7], i2cm_read_buffer[8], i2cm_read_buffer[9]); + + /* 检查传输结果，I2CM发出去的数据是否与接收到的数据一致 */ + CHECK_TRANS_RESULT(write_buffer1, i2cm_read_buffer, BUFFER_SIZE); + + /* 修改I2CM的目标从机地址为10位地址的0x120 */ + hal_i2cm_set_slave_addr(I2C_INDEX_1, i2cs2_addr, i2cs2_addrbit); + + /* I2CM写write_buffer2数据到0x120地址的从机 */ + hal_i2cm_dma_write(I2C_INDEX_1, write_buffer2, BUFFER_SIZE); + + /* 等待I2CM传输完成 */ + while (!hal_i2cm_get_transfer_complete(I2C_INDEX_1)); + TAU_LOGD("tx: %x %x %x %x %x %x %x %x %x %x\n", write_buffer2[0], write_buffer2[1], write_buffer2[2], \ + write_buffer2[3], write_buffer2[4], write_buffer2[5], write_buffer2[6], write_buffer2[7], write_buffer2[8], \ + write_buffer2[9]); + + /* I2CM向地址为0x120的从机读取BUFFER_SIZE个数据，此case中，寄存器addr和size为0，可自行添加 */ + hal_i2cm_dma_read(I2C_INDEX_1, 0, 0, i2cm_read_buffer, BUFFER_SIZE); + + /* 等待I2CM传输完成 */ + while (!hal_i2cm_get_transfer_complete(I2C_INDEX_1)); + TAU_LOGD("rx: %x %x %x %x %x %x %x %x %x %x\n", i2cm_read_buffer[0], i2cm_read_buffer[1], \ + i2cm_read_buffer[2], i2cm_read_buffer[3], i2cm_read_buffer[4], i2cm_read_buffer[5], \ + i2cm_read_buffer[6], i2cm_read_buffer[7], i2cm_read_buffer[8], i2cm_read_buffer[9]); + + /* 检查传输结果，I2CM发出去的数据是否与接收到的数据一致 */ + CHECK_TRANS_RESULT(write_buffer2, i2cm_read_buffer, BUFFER_SIZE); + + /* I2CM && I2CS去初始化 */ + i2cm_deinit(I2C_INDEX_1); + i2cs_deinit(I2C_INDEX_0); + i2cs_deinit(I2C_INDEX_2); + TAU_LOGD("hal_i2c_double_slave_case done!\n"); + return true; +} + +/** +* @brief i2c demo case +* @param none +* @retval none +*/ +void demo_hal_i2c(void) +{ + /* I2C DMA传输case */ + if (!hal_i2c_dma_transfer_case()) + { + i2cs_deinit(I2C_INDEX_0); + i2cm_deinit(I2C_INDEX_1); + TAU_LOGD("hal_i2c_dma_transfer_case fail!\n"); + } + + /* 双slave传输case */ + if (!hal_i2c_double_slave_case()) + { + i2cm_deinit(I2C_INDEX_1); + i2cs_deinit(I2C_INDEX_0); + i2cs_deinit(I2C_INDEX_2); + TAU_LOGD("hal_i2c_double_slave_case fail!\n"); + } + + /* I2C CPU传输case */ + if (!hal_i2c_cpu_transfer_case()) + { + i2cs_deinit(I2C_INDEX_0); + i2cm_deinit(I2C_INDEX_1); + TAU_LOGD("hal_i2c_cpu_transfer_case fail!\n"); + } + + TAU_LOGD("i2c case done\n"); +} +#endif + diff --git a/src/app/module_demo/demo_hal_i2c.h b/src/app/module_demo/demo_hal_i2c.h new file mode 100644 index 0000000..4ecb600 --- /dev/null +++ b/src/app/module_demo/demo_hal_i2c.h @@ -0,0 +1,35 @@ +/******************************************************************************* +* Copyright (C) 2020-2023, tau Systems (R),All Rights Reserved. +* +* File: demo_hal_i2c.h +* Description: demo i2c 头文件 +* Version: V0.1 +* Date： 2023-07-27 +* Author: swx +*******************************************************************************/ +#ifndef __DEMO_HAL_I2C_H__ +#define __DEMO_HAL_I2C_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "test_cfg_global.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +void demo_hal_i2c(void); + +#endif /* __DEMO_HAL_I2C_H__ */ diff --git a/src/app/module_demo/demo_hal_pwm.c b/src/app/module_demo/demo_hal_pwm.c new file mode 100644 index 0000000..617a92e --- /dev/null +++ b/src/app/module_demo/demo_hal_pwm.c @@ -0,0 +1,125 @@ +/******************************************************************************* +* +* +* File: demo_hal_pwm.c +* Description： pwm demo code +* Version： V0.1 +* Date： 2023-07-27 +* Author： jaya + *******************************************************************************/ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "stdarg.h" +#include "stdlib.h" +#include "stdio.h" +#include "test_cfg_global.h" +#include "hal_pwm.h" +#include "hal_gpio.h" +#include "tau_log.h" +#include "tau_delay.h" +#include "demo_hal_pwm.h" + +#if _MODULE_DEMO_PWM_EN +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "demo_hal_pwm" + +/******************************************************************************* +* 3.Global function and Global variable declarations +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 数字PWM输出demo +* @param +* @retval bool true/false +*/ +bool demo_digital_pwm_output(void) +{ + /* GPIO 初始化,配置PIN15输出PWM, PWM可配置从PIN2/PIN13/PIN15/PIN17/PIN36输出 */ + hal_gpio_set_mode(IO_PIN_15, PIN15_MODE_PWMO); + //hal_gpio_set_mode(IO_PIN_17, PIN17_MODE_PWMO); + + /* PWM 初始化 ，配置为30K 255阶 */ + if (hal_pwm_init(30000, 255)) + { + /* PWM enable */ + hal_pwm_enable(true); + uint8_t i = 0; + while (i != 255) + { + /* PWM 配置占空比, 从1/255开始到100%*/ + hal_pwm_set_duty(i); + delayMs(20); + i++; + } + } + + /* PWM disable */ + hal_pwm_enable(false); + /* PWM deinit */ + hal_pwm_deinit(); + TAU_LOGD("demo_digital_pwm_output done\n"); + return true; +} + +/** +* @brief 模拟PWM输出demo +* @param +* @retval bool true/false +*/ +bool demo_analog_pwm_output_with_vcc(void) +{ + /* 模拟PWM,可选择不从数字IO输出PWM,也可以选择从数字IO输出 */ + hal_gpio_set_mode(IO_PIN_15, PIN15_MODE_PWMO); + //hal_gpio_set_mode(IO_PIN_17, PIN17_MODE_PWMO); + + /* PWM 初始化 ，配置为30K 255阶 */ + if (hal_pwm_init(30000, 255)) + { + /* PWM enable */ + hal_pwm_enable(true); + /* ELVCC 接入3-6V的电源,PWM 配置从ELVCC调试后的电源 */ + hal_pwm_set_elvcc_output(true); + + uint8_t i = 0; + while (i != 255) + { + hal_pwm_set_duty(i); + delayMs(20); + i++; + } + } + + /* PWM disable */ + hal_pwm_enable(false); + /* PWM deinit */ + hal_pwm_deinit(); + TAU_LOGD("demo_digital_pwm_output done\n"); + return true; +} + +/** +* @brief pwm demo case +* @param none +* @retval none +*/ +void demo_hal_pwm(void) +{ + TAU_LOGD("pwm dmeo \n"); + //demo_digital_pwm_output(); + demo_analog_pwm_output_with_vcc(); +} +#endif diff --git a/src/app/module_demo/demo_hal_pwm.h b/src/app/module_demo/demo_hal_pwm.h new file mode 100644 index 0000000..c9e9770 --- /dev/null +++ b/src/app/module_demo/demo_hal_pwm.h @@ -0,0 +1,36 @@ +/******************************************************************************* +* Copyright (C) 2020-2023, tau Systems (R),All Rights Reserved. +* +* File: demo_hal_pwm.h +* Description: demo pwm 头文件 +* Version: V0.1 +* Date： 2023-07-27 +* Author: jaya + *******************************************************************************/ +#ifndef __DEMO_HAL_PWM_H__ +#define __DEMO_HAL_PWM_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "test_cfg_global.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +void demo_hal_pwm(void); + +#endif /* __DEMO_HAL_PWM_H__ */ + diff --git a/src/app/module_demo/demo_hal_pwr.c b/src/app/module_demo/demo_hal_pwr.c new file mode 100644 index 0000000..1042343 --- /dev/null +++ b/src/app/module_demo/demo_hal_pwr.c @@ -0,0 +1,218 @@ +/******************************************************************************* +* +* +* File: demo_hal_pwr.c +* Description： pwr demo code +* Version： V0.1 +* Date： 2023-07-27 +* Author： jaya + *******************************************************************************/ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "stdarg.h" +#include "stdlib.h" +#include "stdio.h" +#include "test_cfg_global.h" +#include "hal_pwr.h" +#include "hal_gpio.h" +#include "tau_log.h" +#include "tau_delay.h" +#include "demo_hal_pwr.h" + +#if _MODULE_DEMO_PWR_EN +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "demo_hal_pwr" + +#define MAIN_POWER_SELECT PWR_SEL_VCC /* 主供电电源选择 */ +#define SLEEP_MODE_POWER PWR_SLEEP_IN_TP18 /* 息屏电源选择 */ + +/******************************************************************************* +* 3.Global function and Global variable declarations +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +static bool sg_system_resume = false; + +static void ap_rstn_pull_high_cb(void *data) +{ + TAU_LOGD("AP RSTN !\n"); + /* system resume begin */ + sg_system_resume = true; + /* 关闭AP reset检查 */ + hal_gpio_set_ap_reset_int(DISABLE, NULL, DETECT_HIGH_LVL); +} + +/** +* @brief normal sleep mode demo +* @param +* @retval bool true/false +*/ +static bool demo_normal_sleep_mode() +{ + /* 主电源供电选择 */ + hal_pwr_set_main_power(MAIN_POWER_SELECT); + + if (MAIN_POWER_SELECT == PWR_SEL_VCC) + { + while (hal_pwr_get_vcc_power_ready() == false); + } + + /* system 正常启动 */ + + /* sustem suspend */ + /* 关闭外设/图像通路 */ + + /* 息屏电源供电选择 */ + hal_pwr_set_sleep_mode_power(SLEEP_MODE_POWER); + + /* enter deep sleep mode */ + TAU_LOGD("enter stop mode now\n"); + + /* normal sleep mode, MCU可以正常工作 */ + hal_gpio_set_ap_reset_int(ENABLE, ap_rstn_pull_high_cb, DETECT_RISING_EDGE); + + hal_pwr_enter_normal_sleep_mode(); + while (1) + { + /* normal sleep mode 下外设模块正常,打印正常,SWD通讯正常 */ + TAU_LOGD("wait ap rstn\n"); + if (sg_system_resume) + { + break; + } + delayMs(1000); + } + + /* 退出sleep mode */ + hal_pwr_exit_sleep_mode(); + /* system resume */ + TAU_LOGD("system resum\n"); + return true; +} + +/** +* @brief stop sleep mode demo +* @param +* @retval bool true/false +*/ +static bool demo_stop_sleep_mode() +{ + /* 主电源供电选择 */ + hal_pwr_set_main_power(MAIN_POWER_SELECT); + + if (MAIN_POWER_SELECT == PWR_SEL_VCC) + { + while (hal_pwr_get_vcc_power_ready() == false); + } + + /* system 正常启动 */ + + /* sustem suspend */ + /* 关闭外设/图像通路 */ + + /* 息屏电源供电选择 */ + hal_pwr_set_sleep_mode_power(SLEEP_MODE_POWER); + + /* enter deep sleep mode */ + while (1) + { + + TAU_LOGD("enter stop mode now\n"); + + /* 等待打印完成 */ + delayMs(200); /* 实际使用不需要延时 */ + + /* 配置唤醒AP RSTN 、SPIS CS、TD INT 唤醒*/ + hal_pwr_set_stop_sleep_wakeup_pin(IO_PAD_AP_RSTN, WUP_RISING_EDGE); + hal_pwr_set_stop_sleep_wakeup_pin(IO_PAD_AP_SPIS_CSN, WUP_FALLING_EDGE); + hal_pwr_set_stop_sleep_wakeup_pin(IO_PAD_TD_INT, WUP_FALLING_EDGE); + delayMs(1000); /* 实际使用不需要延时 */ + /* 进入stop sleep mode, MCU停止运行,SWD无法通讯 */ + io_pad_e wakeup_io = hal_pwr_enter_stop_sleep_mode(); + + TAU_LOGD("stop sleep mode wake up by io %d\n", wakeup_io); + + if (wakeup_io == IO_PAD_AP_RSTN) + { + TAU_LOGD("AP RSTN reset, system resume\n"); + break; + } + else + { + TAU_LOGD("Touch process\n"); + /* 处理touchu 事件 处理完成后继续进入sleep mode*/ + } + } + + /* 退出sleep mode */ + hal_pwr_exit_sleep_mode(); + /* system resume */ + TAU_LOGD("system resum\n"); + return true; +} + +/** +* @brief deep sleep mode demo +* @param +* @retval bool true/false +*/ +static bool demo_deep_sleep_mode() +{ + pwr_reset_flag_e reset_flag = hal_pwr_get_reset_flag(); + TAU_LOGD("wakeup flag %d\n", reset_flag); + if (reset_flag == RF_TDINT_WAKEUP) + { + /* TD_INT reset, 处理触摸事件, 唤醒AP 等待AP RSTN*/ + TAU_LOGD("TD_INT reset\n"); + } + /* 主电源供电选择 */ + hal_pwr_set_main_power(MAIN_POWER_SELECT); + + if (MAIN_POWER_SELECT == PWR_SEL_VCC) + { + while (hal_pwr_get_vcc_power_ready() == false); + } + + /* system 正常启动 */ + + /* enter deep sleep mode */ + TAU_LOGD("enter deep mode now\n"); + + /* 息屏电源供电选择 */ + hal_pwr_set_sleep_mode_power(SLEEP_MODE_POWER); + + /* deep sleep mode,配置AP RSTN 上升沿,TD INT 下降沿唤醒 */ + hal_pwr_enter_deep_sleep_mode(WUP_RISING_EDGE, WUP_FALLING_EDGE); + /* 数字完全掉电,SWD无法通讯,唤醒后芯片重启 */ + return true; +} + +/** +* @brief pwr demo case +* @param none +* @retval none +*/ +void demo_hal_pwr(void) +{ + TAU_LOGD("pwr dmeo \n"); + /* normal sleep mode demo */ + demo_normal_sleep_mode(); + /* stop sleep mode demo */ + demo_stop_sleep_mode(); + /* deep sleep mode demo */ + demo_deep_sleep_mode(); +} +#endif diff --git a/src/app/module_demo/demo_hal_pwr.h b/src/app/module_demo/demo_hal_pwr.h new file mode 100644 index 0000000..c1edefb --- /dev/null +++ b/src/app/module_demo/demo_hal_pwr.h @@ -0,0 +1,36 @@ +/******************************************************************************* +* Copyright (C) 2020-2023, tau Systems (R),All Rights Reserved. +* +* File: demo_hal_pwr.h +* Description: demo pwr 头文件 +* Version: V0.1 +* Date： 2023-07-27 +* Author: jaya + *******************************************************************************/ +#ifndef __DEMO_HAL_PWR_H__ +#define __DEMO_HAL_PWR_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "test_cfg_global.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +void demo_hal_pwr(void); + +#endif /* __DEMO_HAL_PWR_H__ */ + diff --git a/src/app/module_demo/demo_hal_spi.c b/src/app/module_demo/demo_hal_spi.c new file mode 100644 index 0000000..ec5c2aa --- /dev/null +++ b/src/app/module_demo/demo_hal_spi.c @@ -0,0 +1,485 @@ +/******************************************************************************* +* Copyright (C) 2020-2023, tau Systems (R),All Rights Reserved. +* +* File: demo_hal_spi.c +* Description： spi demo code +* Version： V0.1 +* Date： 2023-07-27 +* Author： swx +*******************************************************************************/ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "hal_spi_master.h" +#include "hal_spi_slave.h" +#include "demo_hal_spi.h" +#include "hal_gpio.h" +#include "tau_log.h" +#include "tau_delay.h" + +#if _MODULE_DEMO_SPI_EN +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "demo_hal_spi" + +#define BUFFER_SIZE 255 + +#define CHECK_TRANS_RESULT(src, dst, size) \ + for(uint32_t check_num = 0; check_num < size; check_num ++) \ + {\ + if(src[check_num] != dst[check_num])\ + {\ + TAU_LOGD("src[%d] = %x, dst[%d] = %x , error!!\n",check_num,src[check_num],check_num,dst[check_num]);\ + return false;\ + }\ + }\ + +/******************************************************************************* +* 3.Global function and Global variable declarations +*******************************************************************************/ +bool spis_hw_miss_flag = false; + +/*SPIS硬件回复功能32组回复数据*/ +uint8_t spis_hw_header_data0[] = {0xf0, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d}; +uint8_t spis_hw_header_data1[] = {0xf1, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; +uint8_t spis_hw_header_data2[] = {0xf2, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29}; +uint8_t spis_hw_header_data3[] = {0xf3, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39}; +uint8_t spis_hw_header_data4[] = {0xf4, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49}; +uint8_t spis_hw_header_data5[] = {0xf5, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59}; +uint8_t spis_hw_header_data6[] = {0xf6, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69}; +uint8_t spis_hw_header_data7[] = {0xf7, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79}; +uint8_t spis_hw_header_data8[] = {0xf8, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89}; +uint8_t spis_hw_header_data9[] = {0xf9, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99}; +uint8_t spis_hw_header_data10[] = {0xfa, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9}; +uint8_t spis_hw_header_data11[] = {0xfb, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB8, 0xB9}; +uint8_t spis_hw_header_data12[] = {0xfc, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9}; +uint8_t spis_hw_header_data13[] = {0xfd, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9}; +uint8_t spis_hw_header_data14[] = {0xfe, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9}; +uint8_t spis_hw_header_data15[] = {0xff, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9}; +uint8_t spis_hw_header_data16[] = {0xf0, 0x21, 0x31, 0x41, 0x51, 0x61, 0x71, 0x81, 0x91}; +uint8_t spis_hw_header_data17[] = {0xf1, 0x22, 0x31, 0x42, 0x52, 0x62, 0x72, 0x82, 0x92}; +uint8_t spis_hw_header_data18[] = {0xf2, 0x23, 0x33, 0x43, 0x53, 0x63, 0x73, 0x83, 0x93}; +uint8_t spis_hw_header_data19[] = {0xf3, 0x24, 0x34, 0x44, 0x54, 0x64, 0x74, 0x84, 0x94}; +uint8_t spis_hw_header_data20[] = {0xf4, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09}; +uint8_t spis_hw_header_data21[] = {0xf5, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; +uint8_t spis_hw_header_data22[] = {0xf6, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29}; +uint8_t spis_hw_header_data23[] = {0xf7, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39}; +uint8_t spis_hw_header_data24[] = {0xf8, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49}; +uint8_t spis_hw_header_data25[] = {0xf9, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59}; +uint8_t spis_hw_header_data26[] = {0xfa, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69}; +uint8_t spis_hw_header_data27[] = {0xfb, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79}; +uint8_t spis_hw_header_data28[] = {0xfc, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89}; +uint8_t spis_hw_header_data29[] = {0xfd, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99}; +uint8_t spis_hw_header_data30[] = {0xfe, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89}; +uint8_t spis_hw_header_data31[] = {0xff, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xf0, 0x13, 0xff}; + +static hal_spis_hw_ack_info_t spis_hw_test_header[32] = +{ + /*序号_匹配值_匹配长度_使能_回复延时_回复数据的地址_回复数据长度 */ + {0, {0x01, 0x02, 0x03, 0x04}, 0, 1, 0, spis_hw_header_data0, sizeof(spis_hw_header_data0) / sizeof(uint8_t) - 1}, + {1, {0x05, 0x06, 0x07, 0x08}, 1, 1, 1, spis_hw_header_data1, sizeof(spis_hw_header_data1) / sizeof(uint8_t) - 1}, + {2, {0x09, 0x0a, 0x0b, 0x0c}, 2, 1, 2, spis_hw_header_data2, sizeof(spis_hw_header_data2) / sizeof(uint8_t) - 1}, + {3, {0x0d, 0x0e, 0x0f, 0x10}, 3, 1, 3, spis_hw_header_data3, sizeof(spis_hw_header_data3) / sizeof(uint8_t) - 1}, + {4, {0x11, 0x12, 0x13, 0x14}, 0, 1, 4, spis_hw_header_data4, sizeof(spis_hw_header_data4) / sizeof(uint8_t) - 1}, + {5, {0x15, 0x16, 0x17, 0x18}, 1, 1, 5, spis_hw_header_data5, sizeof(spis_hw_header_data5) / sizeof(uint8_t) - 1}, + {6, {0x19, 0x1a, 0x1b, 0x1c}, 2, 1, 6, spis_hw_header_data6, sizeof(spis_hw_header_data6) / sizeof(uint8_t) - 1}, + {7, {0x1d, 0x1e, 0x1f, 0x20}, 3, 1, 7, spis_hw_header_data7, sizeof(spis_hw_header_data7) / sizeof(uint8_t) - 1}, + {8, {0x21, 0x22, 0x23, 0x24}, 0, 1, 8, spis_hw_header_data8, sizeof(spis_hw_header_data8) / sizeof(uint8_t) - 1}, + {9, {0x25, 0x26, 0x27, 0x28}, 1, 1, 9, spis_hw_header_data9, sizeof(spis_hw_header_data9) / sizeof(uint8_t) - 1}, + {10, {0x29, 0x2a, 0x2b, 0x2c}, 2, 1, 10, spis_hw_header_data10, sizeof(spis_hw_header_data10) / sizeof(uint8_t) - 1}, + {11, {0x2d, 0x2e, 0x2f, 0x30}, 3, 1, 0, spis_hw_header_data11, sizeof(spis_hw_header_data11) / sizeof(uint8_t) - 1}, + {12, {0x31, 0x32, 0x33, 0x34}, 0, 1, 1, spis_hw_header_data12, sizeof(spis_hw_header_data12) / sizeof(uint8_t) - 1}, + {13, {0x35, 0x36, 0x37, 0x38}, 1, 1, 2, spis_hw_header_data13, sizeof(spis_hw_header_data13) / sizeof(uint8_t) - 1}, + {14, {0x39, 0x3a, 0x3b, 0x3c}, 2, 1, 3, spis_hw_header_data14, sizeof(spis_hw_header_data14) / sizeof(uint8_t) - 1}, + {15, {0x3d, 0x3e, 0x3f, 0x40}, 3, 1, 4, spis_hw_header_data15, sizeof(spis_hw_header_data15) / sizeof(uint8_t) - 1}, + {16, {0x41, 0x42, 0x43, 0x44}, 0, 1, 5, spis_hw_header_data16, sizeof(spis_hw_header_data16) / sizeof(uint8_t) - 1}, + {17, {0x45, 0x46, 0x47, 0x48}, 1, 1, 6, spis_hw_header_data17, sizeof(spis_hw_header_data17) / sizeof(uint8_t) - 1}, + {18, {0x49, 0x4a, 0x4b, 0x4c}, 2, 1, 7, spis_hw_header_data18, sizeof(spis_hw_header_data18) / sizeof(uint8_t) - 1}, + {19, {0x4d, 0x4e, 0x4f, 0x50}, 3, 1, 8, spis_hw_header_data19, sizeof(spis_hw_header_data19) / sizeof(uint8_t) - 1}, + {20, {0x51, 0x52, 0x53, 0x54}, 0, 1, 9, spis_hw_header_data20, sizeof(spis_hw_header_data20) / sizeof(uint8_t) - 1}, + {21, {0x55, 0x56, 0x57, 0x58}, 1, 1, 10, spis_hw_header_data21, sizeof(spis_hw_header_data21) / sizeof(uint8_t) - 1}, + {22, {0x59, 0x5a, 0x5b, 0x5c}, 2, 1, 11, spis_hw_header_data22, sizeof(spis_hw_header_data22) / sizeof(uint8_t) - 1}, + {23, {0x5d, 0x5e, 0x5f, 0x60}, 3, 1, 12, spis_hw_header_data23, sizeof(spis_hw_header_data23) / sizeof(uint8_t) - 1}, + {24, {0x61, 0x62, 0x63, 0x64}, 0, 1, 13, spis_hw_header_data24, sizeof(spis_hw_header_data24) / sizeof(uint8_t) - 1}, + {25, {0x65, 0x66, 0x67, 0x68}, 1, 1, 14, spis_hw_header_data25, sizeof(spis_hw_header_data25) / sizeof(uint8_t) - 1}, + {26, {0x69, 0x6a, 0x6b, 0x6c}, 2, 1, 15, spis_hw_header_data26, sizeof(spis_hw_header_data26) / sizeof(uint8_t) - 1}, + {27, {0x6d, 0x6e, 0x6f, 0x70}, 3, 1, 11, spis_hw_header_data27, sizeof(spis_hw_header_data27) / sizeof(uint8_t) - 1}, + {28, {0x71, 0x72, 0x73, 0x74}, 0, 1, 12, spis_hw_header_data28, sizeof(spis_hw_header_data28) / sizeof(uint8_t) - 1}, + {29, {0x75, 0x76, 0x77, 0x78}, 1, 1, 13, spis_hw_header_data29, sizeof(spis_hw_header_data29) / sizeof(uint8_t) - 1}, + {30, {0x79, 0x7a, 0x7b, 0x7c}, 2, 1, 12, spis_hw_header_data30, sizeof(spis_hw_header_data30) / sizeof(uint8_t) - 1}, + {31, {0x7d, 0x7e, 0x7f, 0x80}, 3, 1, 14, spis_hw_header_data31, sizeof(spis_hw_header_data31) / sizeof(uint8_t) - 1}, +}; + +static uint8_t spim_write_buffer[BUFFER_SIZE] = {0}; +static uint8_t spim_read_buffer[BUFFER_SIZE] = {0}; +static uint8_t spis_read_buffer[BUFFER_SIZE] = {0}; +static uint8_t spis_write_buffer[BUFFER_SIZE] = {0}; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief spi master IO初始化 +* @param none +* @retval +*/ +static void spim_io_init(void) +{ + io_pad_attr_t attrs[] = + { + {IO_PAD_TD_SPIM_CLK, PIN5_MODE_SPIM_SCLK, IO_IOE_NONE, IO_LVL_HIGH}, + {IO_PAD_TD_SPIM_CSN, PIN6_MODE_SPIM_CSN, IO_IOE_NONE, IO_LVL_HIGH}, + {IO_PAD_TD_SPIM_MISO, PIN7_MODE_SPIM_MISO, IO_IOE_NONE, IO_LVL_HIGH}, + {IO_PAD_TD_SPIM_MOSI, PIN4_MODE_SPIM_MOSI, IO_IOE_NONE, IO_LVL_HIGH} + }; + uint8_t size = sizeof(attrs) / sizeof(io_pad_attr_t); + hal_gpio_config_pad(attrs, size); +} + +/** +* @brief spi slave IO初始化 +* @param none +* @retval +*/ +static void spis_io_init(void) +{ + io_pad_attr_t attrs[] = + { + {IO_PAD_AP_SPIS_CLK, PIN32_MODE_SPIS_SCLK, IO_IOE_NONE, IO_LVL_HIGH}, + {IO_PAD_AP_SPIS_CSN, PIN31_MODE_SPIS_CSN, IO_IOE_NONE, IO_LVL_HIGH}, + {IO_PAD_AP_SPIS_MISO, PIN30_MODE_SPIS_MISO, IO_IOE_NONE, IO_LVL_HIGH}, + {IO_PAD_AP_SPIS_MOSI, PIN33_MODE_SPIS_MOSI, IO_IOE_NONE, IO_LVL_HIGH} + }; + uint8_t size = sizeof(attrs) / sizeof(io_pad_attr_t); + hal_gpio_config_pad(attrs, size); +} + +/** +* @brief spi slave中断回调函数 +* @param event：SPIS收到的中断事件 +* @param packet_info： SPIS收到的数据packet +* @retval +*/ +void spis_callback(hal_spis_event_e event, hal_spis_packet_info_t *packet_info) +{ + /* 收到CS_RISE中断 */ + if (event == SPIS_EVENT_RCV_CS_RISE) + { + /* 更新SPIS的txbuffer和rxbuffer */ + hal_spis_update_rx_buffer(spis_read_buffer, BUFFER_SIZE); + hal_spis_update_tx_buffer(spis_write_buffer, BUFFER_SIZE, true); + } + /* 收到CS_FALL中断 */ + else if (event == SPIS_EVENT_RCV_CS_FALL) + { + //TAU_LOGD("spis_test SPIS_EVENT_RCV_CS_FALL\n"); + } + /* 收到数据接收指定阈值中断 */ + else if (event == SPIS_EVENT_RCV_CNT) + { + //TAU_LOGD("spis_test SPIS_EVENT_RCV_CNT\n"); + } + /* 收到数据接收完全中断 */ + else if (event == SPIS_EVENT_RCV_FULL) + { + //TAU_LOGD("spis_test SPIS_EVENT_RCV_CNT\n"); + } +} + +/** +* @brief spi slave硬件快速回复功能中断回调函数 +* @param event：SPIS收到的中断事件 +* @param packet_info： SPIS收到的数据packet +* @retval +*/ +void spis_hw_callback(hal_spis_event_e event, hal_spis_packet_info_t *packet_info) +{ + /* 收到CS_RISE中断 */ + if (event == SPIS_EVENT_RCV_CS_RISE) + { + /* 产生了ALL_MISS中断的标记 */ + if (spis_hw_miss_flag) + { + /* 使能SPIS硬件快速回复功能，默认回复值为0xE0 */ + hal_spis_set_hw_ack_enable(ENABLE, 0xE0); + spis_hw_miss_flag = false; + } + /* SPIS更新读写buffer */ + hal_spis_update_tx_buffer(spis_hw_header_data31, sizeof(spis_hw_header_data31) / sizeof(uint8_t), true); + hal_spis_update_rx_buffer(spis_read_buffer, BUFFER_SIZE); + } + + /* 收到ALL_MISS中断 */ + if (event == SPIS_EVENT_ALL_MISS) + { + /* 关闭SPIS硬件快速回复功能，默认回复值为0xF0 */ + hal_spis_set_hw_ack_enable(DISABLE, 0xf0); + spis_hw_miss_flag = true; + TAU_LOGE("All miss intr test\n"); + } +} + +/** +* @brief 获取随机值函数 +* @param range_begin: 随机值范围起始 +* @param renge_end: 随机值范围结束 +* @retval uint32_t : 范围内随机值 +*/ +uint32_t unit_case_get_rand(uint32_t range_begin, uint32_t renge_end) +{ + uint32_t range = 1; + if (renge_end > range_begin) + { + range = renge_end - range_begin + 1; + } + else + { + TAU_LOGE("rand range[%d ~ %d] error! default set to 1\n"); + } + return (uint32_t)((rand() % range) + range_begin); +} + +/** +* @brief spi master和slave的发送/接收buffer初始化 +* @param none +* @retval +*/ +static bool spi_case_rand_buffer(bool spim_en, bool spis_en) +{ + TAU_LOGD("spi_case_rand_buffer\n"); + /* read buffer默认初始化为0, tx buffer 初始为随机数 */ + uint8_t i = 0 ; + uint32_t count = BUFFER_SIZE; + for (i = 0; i < count; i ++) + { + spis_read_buffer[i] = 0; + spim_read_buffer[i] = 0; + if (spim_en) + { + spim_write_buffer[i] = unit_case_get_rand(0, 255); + } + if (spis_en) + { + spis_write_buffer[i] = unit_case_get_rand(0, 255); + } + } + return true; +} + + +/** +* @brief 芯片SPIM与SPIS对接,验证基础传输数据的正确性 +* @param +* @retval bool true/false +*/ +static bool hal_spi_base_case(void) +{ + uint32_t speed = 400000; + uint8_t cpha = 0; + uint8_t cpol = 0; + + /* 随机buffer值 */ + spi_case_rand_buffer(true, true); + + /* SPIS IO初始化 */ + spis_io_init(); + /* SPIS初始化，相位0+极性0 */ + hal_spis_init(cpha, cpol); + /* SPIS设置初始读写buffer */ + hal_spis_update_rx_buffer(spis_read_buffer, BUFFER_SIZE); + hal_spis_update_tx_buffer(spis_write_buffer, BUFFER_SIZE, true); + /* SPIS注册回调函函数，这里开启了CS_RISE、CS_FALL、RX_CNT、RX_FULL中断，RX_CNT阈值设置为100 */ + hal_spis_register_callback(spis_callback, SPIS_EVENT_RCV_CS_RISE | SPIS_EVENT_RCV_CS_FALL | SPIS_EVENT_RCV_CNT | SPIS_EVENT_RCV_FULL, 100); + /* SPIS启动 */ + hal_spis_start(); + + /* SPIM IOc初始化 */ + spim_io_init(); + /* SPIM初始化，400k传输速率+相位0+极性0 */ + hal_spim_init(speed, cpha, cpol); + + TAU_LOGD("base trans para cpha[%d] cpol[%d] speed[%d] \n", cpha, cpol, speed); + + /* 测试 SPIM CPU读写 */ + hal_spim_read(spim_write_buffer, BUFFER_SIZE, spim_read_buffer, BUFFER_SIZE); + /* SPIM 写完，检查 SPIS RX buffer 是否等于 SPIM TX buffer*/ + CHECK_TRANS_RESULT(spim_write_buffer, spis_read_buffer, BUFFER_SIZE); + /* SPIM 读完，检查 SPIS TX buffer 是否等于 SPIM RX buffer*/ + CHECK_TRANS_RESULT(spis_write_buffer, spim_read_buffer, BUFFER_SIZE); + + /* 随机buffer值 */ + spi_case_rand_buffer(true, false); + + /* 测试 SPIM CPU写 */ + hal_spim_write(spim_write_buffer, BUFFER_SIZE); + /* SPIM 写完，检查 SPIS RX buffer 是否等于 SPIM TX buffer*/ + CHECK_TRANS_RESULT(spim_write_buffer, spis_read_buffer, BUFFER_SIZE); + + /* 传输完成,关闭SPI */ + hal_spis_stop(); + hal_spis_deinit(); + hal_spim_deinit(); + + TAU_LOGD("hal_spi_base_case done!\n"); + return true; +} + + +/** +* @brief 芯片SPIM与SPIS对接, 验证SPIS 硬件快速回复传输功能 +* @param +* @retval bool true/false +*/ +static bool hal_spis_hw_case(void) +{ + uint32_t speed = 400000; + uint8_t cpha = 0; + uint8_t cpol = 0; + uint8_t write_buffer[30] = {0x9e, 0xa0, 0x00, 0x01, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, + 0x8a, 0x1b, 0x1c, 0x5d, 0x7e, 0x4f, 0x20, 0x21, 0x22, 0x23, + 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x30, 0x31, 0x32, 0x33 + }; + /* SPIS IO初始化 */ + spis_io_init(); + /* SPIS初始化，相位0+极性0 */ + hal_spis_init(cpha, cpol); + + /* SPIS设置初始读buffer */ + hal_spis_update_rx_buffer(spis_read_buffer, BUFFER_SIZE); + /* SPIS设置初始写buffer */ + hal_spis_update_tx_buffer(spis_hw_header_data31, sizeof(spis_hw_header_data31) / sizeof(uint8_t), true); + /* SPIS注册回调函函数，这里开启了CS_RISE和ALL_MISS中断 */ + hal_spis_register_callback(spis_hw_callback, SPIS_EVENT_RCV_CS_RISE | SPIS_EVENT_ALL_MISS, 0); + + /* 设置SPIS硬件快速回复参数 */ + hal_spis_set_hw_ack_info(spis_hw_test_header, (sizeof(spis_hw_test_header) / sizeof(hal_spis_hw_ack_info_t))); + /* 使能SPIS硬件快速回复功能，默认回复值为0xE0 */ + hal_spis_set_hw_ack_enable(ENABLE, 0xE0); + /* SPIS启动 */ + hal_spis_start(); + + /* SPIM IO初始化 */ + spim_io_init(); + /* SPIM初始化，400k传输速率+相位0+极性0 */ + hal_spim_init(speed, cpha, cpol); + + /* 32组硬件快速回复功能参数demo */ + for (int k = 0; k < 32; k++) + { + /* write_buffer前4个字节设置为每组参数的匹配值 */ + for (int j = 0; j < 4; j++) + { + write_buffer[j] = spis_hw_test_header[k].cmp_data[j]; + } + + /* 将第11组和第14组的write_buffer[0]自加，这样匹配不到后就会产生ALL_MISS中断 */ + if ((k == 10) || (k == 13)) + { + write_buffer[0]++; + } + + /* FLUSH SPIM FIFO */ + hal_spim_flush(); + /* SPIM发送30个write_buffer数据给SPIS，并读取SPIS的30个数据到spim_read_buffer */ + hal_spim_read(write_buffer, 30, spim_read_buffer, 30); + + /* 等待SPIM传输完成 */ + while (!hal_spim_get_transfer_complete()); + + printf("SPIM_TX:"); + for (int i = 0; i < 30; i++) + { + printf("%02x ", spis_read_buffer[i]); + } + printf("\n"); + printf("SPIM_RX:"); + for (int i = 0; i < 30; i++) + { + printf("%02x ", spim_read_buffer[i]); + } + printf("\n"); + + /* 以下是校验SPIS的硬件快速回复数据是否正确 */ + int index = spis_hw_test_header[k].delay_clk + 1 + spis_hw_test_header[k].cmp_len + 1; + printf("CMP_LEN:%d, DELAY_CLK:%d\n", spis_hw_test_header[k].cmp_len, spis_hw_test_header[k].delay_clk); + bool flag = true; + for (int i = 0; i < spis_hw_test_header[k].ack_length; i++) + { + if (spis_hw_test_header[k].ack_address[i] == spim_read_buffer[index + i]) + { + if (flag) + { + printf("Group[%d] OK\n", k); + flag = false; + } + + continue; + } + else + { + if ((k == 10) || (k == 13)) + { + if (flag) + { + printf("Group[%d] All_miss init test\n", k); + flag = false; + } + continue; + } + else + { + printf("Header_addr[%d]:%02x Header_addr[%d]:%02x ", i, spis_hw_test_header[k].ack_address[i], index + i, spim_read_buffer[index + i]); + printf("Group[%d] error\n", k); + return false; + } + } + } + printf("\n"); + } + + /* 传输完成,关闭SPI */ + hal_spis_stop(); + hal_spis_deinit(); + hal_spim_deinit(); + TAU_LOGD("hal_spis_hw_case done!\n"); + return true; +} + +/** +* @brief spi demo case +* @param none +* @retval none +*/ +void demo_hal_spi(void) +{ + /* 基础传输case */ + if (!hal_spi_base_case()) + { + hal_spis_stop(); + hal_spis_deinit(); + hal_spim_deinit(); + TAU_LOGD("hal_spi_base_case fail!\n"); + } + + /* SPIS硬件快速回复功能case */ + if (!hal_spis_hw_case()) + { + hal_spis_stop(); + hal_spis_deinit(); + hal_spim_deinit(); + TAU_LOGD("hal_spis_hw_case fail!\n"); + } + + TAU_LOGD("spi case done\n"); +} +#endif diff --git a/src/app/module_demo/demo_hal_spi.h b/src/app/module_demo/demo_hal_spi.h new file mode 100644 index 0000000..cd1db2b --- /dev/null +++ b/src/app/module_demo/demo_hal_spi.h @@ -0,0 +1,37 @@ +/******************************************************************************* +* Copyright (C) 2020-2023, tau Systems (R),All Rights Reserved. +* +* File: demo_hal_spi.h +* Description: demo spi 头文件 +* Version: V0.1 +* Date： 2023-07-27 +* Author: swx +*******************************************************************************/ +#ifndef __DEMO_HAL_SPI_H__ +#define __DEMO_HAL_SPI_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "test_cfg_global.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +void demo_hal_spi(void); + +#endif /* __DEMO_HAL_SPI_H__ */ + + diff --git a/src/app/module_demo/demo_hal_swire.c b/src/app/module_demo/demo_hal_swire.c new file mode 100644 index 0000000..b8c45be --- /dev/null +++ b/src/app/module_demo/demo_hal_swire.c @@ -0,0 +1,140 @@ +/******************************************************************************* +* +* +* File: demo_hal_swire.c +* Description： swire demo code +* Version： V0.1 +* Date： 2023-07-27 +* Author： jaya + *******************************************************************************/ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "stdarg.h" +#include "stdlib.h" +#include "stdio.h" +#include "test_cfg_global.h" +#include "hal_swire.h" +#include "hal_gpio.h" +#include "tau_log.h" +#include "tau_delay.h" +#include "demo_hal_swire.h" + +#if _MODULE_DEMO_SWIRE_EN +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "demo_hal_swire" + +/******************************************************************************* +* 3.Global function and Global variable declarations +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief swire 手动产生波形 demo +* @param +* @retval bool true/false +*/ +static bool demo_hal_swire_gen_swire_manual(void) +{ + /* 配置PIN15为SWIRE 输出*/ + hal_gpio_set_mode(IO_PAD_AP_SWIRE, PIN15_MODE_SWIRE); + /* swire 初始化 */ + hal_swire_init(); + /* 启动swire, Swire引脚信号拉高 */ + hal_swire_enable(true); + delayMs(100); + /* 配置pulse 为36,产生36个脉冲波形后保持拉高 */ + hal_swire_set_pulse(36); + delayMs(100); + /* 配置pulse 为25,产生25个脉冲波形后保持拉高 */ + hal_swire_set_pulse(25); + delayMs(100); + /* 关闭swire, Swire引脚信号拉低 */ + hal_swire_enable(false); + /* swire去初始化 */ + hal_swire_deinit(); + return true; +} + +/** +* @brief swire 自动产生波形 demo +* @param +* @retval bool true/false +*/ +static bool demo_hal_swire_gen_swire_auto(void) +{ + /* 配置PIN15为SWIRE 输出*/ + hal_gpio_set_mode(IO_PAD_AP_SWIRE, PIN15_MODE_SWIRE); + /* swire 初始化 */ + hal_swire_init(); + hal_swire_set_timer(TIMER_NUM0, 16, true); + + /* 启动swire, Swire引脚信号拉高,每个16ms发送一次swire信号 */ + hal_swire_enable(true); + + /*保持每16ms输出36个脉冲，持续100ms*/ + hal_swire_set_pulse(36); /* 使用timer情况下pulse配置为0时实际输出255个脉冲, 可以在enable之前或者enable前后配置发送正确波形,消除255脉冲问题 */ + delayMs(100); + + /* 配置pulse 为25,保持每16ms输出36个脉冲，持续100ms */ + hal_swire_set_pulse(25); + + /* 关闭swire, Swire引脚信号拉低 */ + hal_swire_enable(false); + /* swire去初始化 */ + hal_swire_deinit(); + return true; +} + +/** +* @brief swire 配置波形形状demo +* @param +* @retval bool true/false +*/ +static bool demo_hal_swire_set_swire_waveform(void) +{ + /* 配置PIN15为SWIRE 输出*/ + hal_gpio_set_mode(IO_PAD_AP_SWIRE, PIN15_MODE_SWIRE); + /* swire 初始化 */ + hal_swire_init(); + /* 配置波形,持续时间50us */ + hal_swire_set_waveform(50, 50, 50, 50); + /* 启动swire, Swire引脚信号拉高 */ + hal_swire_enable(true); + delayMs(100); + /* 配置pulse 为36,产生36个脉冲波形后保持拉高 */ + hal_swire_set_pulse(36); + delayMs(100); + /* 关闭swire, Swire引脚信号拉低 */ + hal_swire_enable(false); + /* swire去初始化 */ + hal_swire_deinit(); + return true; +} + + +/** +* @brief swire demo case +* @param none +* @retval none +*/ +void demo_hal_swire(void) +{ + TAU_LOGD("swire dmeo \n"); + demo_hal_swire_gen_swire_manual(); + //demo_hal_swire_gen_swire_auto(); + //demo_hal_swire_set_swire_waveform(); +} +#endif diff --git a/src/app/module_demo/demo_hal_swire.h b/src/app/module_demo/demo_hal_swire.h new file mode 100644 index 0000000..c39f949 --- /dev/null +++ b/src/app/module_demo/demo_hal_swire.h @@ -0,0 +1,36 @@ +/******************************************************************************* +* Copyright (C) 2020-2023, tau Systems (R),All Rights Reserved. +* +* File: demo_hal_swire.h +* Description: demo swire 头文件 +* Version: V0.1 +* Date： 2023-07-27 +* Author: jaya + *******************************************************************************/ +#ifndef __DEMO_HAL_SWIRE_H__ +#define __DEMO_HAL_SWIRE_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "test_cfg_global.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +void demo_hal_swire(void); + +#endif /* __DEMO_HAL_SWIRE_H__ */ + diff --git a/src/app/module_demo/demo_hal_timer.c b/src/app/module_demo/demo_hal_timer.c new file mode 100644 index 0000000..7abe963 --- /dev/null +++ b/src/app/module_demo/demo_hal_timer.c @@ -0,0 +1,136 @@ +/******************************************************************************* +* +* +* File: demo_hal_timer.c +* Description： timer demo源文件 +* Version： V0.1 +* Date： 2023-07-27 +* Author： zzf + *******************************************************************************/ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "hal_timer.h" +#include "hal_gpio.h" +#include "tau_log.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "timer-log" + +#define TIMER_DEMO_NORMAL 0 //定时器常规使用，循环超时 +#define TIMER_DEMO_RESTART 1 //中断重启定时器 + +#define TIMER_SEL TIMER_NUM0 //timer0-3 都ok + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ +static io_pad_e sg_timer_io_pad = IO_PAD_GPIO1; +static gpio_level_e sg_timer_io_lvl = IO_LVL_LOW; +#if TIMER_DEMO_RESTART +static uint16_t sg_timer_count = 1; +#endif + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +#if TIMER_DEMO_RESTART +/** +* @brief 重新循环中断回调函数 +* @param None +* @retval None +*/ +static void demo_timer_restart_callback(void *data) +{ + /* 翻转GPIO */ + sg_timer_io_lvl = (sg_timer_io_lvl ? IO_LVL_LOW : IO_LVL_HIGH); + hal_gpio_set_output_data(sg_timer_io_pad, sg_timer_io_lvl); + + /* 重新启动定时器 */ + sg_timer_count = sg_timer_count * 10; + if (sg_timer_count > 100) + { + sg_timer_count = 1; + } + hal_timer_start(TIMER_SEL, sg_timer_count * 10, demo_timer_restart_callback, NULL); +} + +/** +* @brief 重新中断例程初始化 +* @param None +* @retval None +*/ +static void demo_timer_case_restart(void) +{ + /*重新初始化定时器*/ + hal_timer_init(TIMER_SEL); + hal_timer_set_repeat(TIMER_SEL, false); + + /*初始化GPIO低电平*/ + hal_gpio_init_output(sg_timer_io_pad, sg_timer_io_lvl); + + /*更新当前timer测试参数*/ + hal_timer_start(TIMER_SEL, sg_timer_count * 10, demo_timer_restart_callback, NULL); +} +#endif + +#if TIMER_DEMO_NORMAL +/** +* @brief 多次循环中断回调函数 +* @param None +* @retval None +*/ +static void demo_timer_normal_callback(void *data) +{ + /* 翻转GPIO */ + sg_timer_io_lvl = (sg_timer_io_lvl ? IO_LVL_LOW : IO_LVL_HIGH); + hal_gpio_set_output_data(sg_timer_io_pad, sg_timer_io_lvl); +} + +/** +* @brief 重新中断例程初始化 +* @param None +* @retval None +*/ +static void demo_timer_case_normal(void) +{ + /*重新初始化定时器*/ + hal_timer_init(TIMER_SEL); + hal_timer_set_repeat(TIMER_SEL, true); + + /*初始化GPIO低电平*/ + hal_gpio_init_output(sg_timer_io_pad, sg_timer_io_lvl); + + /*更新当前timer测试参数*/ + hal_timer_start(TIMER_SEL, 10, demo_timer_normal_callback, NULL); +} +#endif + +/** +* @brief demo测试接口函数 +* @param None +* @retval None +*/ +void demo_timer_case(void) +{ + TAU_LOGI("start test\r\n"); + +#if TIMER_DEMO_NORMAL + demo_timer_case_normal(); // 10ms定时进行IO电平翻转 +#elif TIMER_DEMO_RESTART + demo_timer_case_restart(); +#endif + + TAU_LOGI("end test\r\n"); +} + diff --git a/src/app/module_demo/demo_hal_timer.h b/src/app/module_demo/demo_hal_timer.h new file mode 100644 index 0000000..0de0f1d --- /dev/null +++ b/src/app/module_demo/demo_hal_timer.h @@ -0,0 +1,39 @@ +/******************************************************************************* +* +* +* File: demo_hal_timer.h +* Description: timer demo头文件 +* Version: V0.1 +* Date: 2023-07-27 +* Author: zzf + *******************************************************************************/ +#ifndef __DEMO_TIMER_H__ +#define __DEMO_TIMER_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief demo测试接口函数 +* @param None +* @retval None +*/ +void demo_timer_case(void); + +#endif /* __DEMO_TIMER_H__ */ diff --git a/src/app/module_demo/demo_hal_uart.c b/src/app/module_demo/demo_hal_uart.c new file mode 100644 index 0000000..c4cf64e --- /dev/null +++ b/src/app/module_demo/demo_hal_uart.c @@ -0,0 +1,648 @@ +/******************************************************************************* +* +* +* File: demo_hal_uart.c +* Description： 测试说明：将电脑端USB转串口分别连接UART0，1测试 +* Version： V0.1 +* Date： 2023-07-09 +* Author： kc + *******************************************************************************/ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "stdarg.h" +#include "stdlib.h" +#include "stdio.h" +#include "test_cfg_global.h" +#include "hal_uart.h" +#include "hal_gpio.h" +#include "tau_log.h" +#include "tau_delay.h" +#include "demo_hal_uart.h" + +#if _MODULE_DEMO_UART_EN +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "uart-log" + +#define UART_TEST_AUTO 1 + +#define TEST_UART_BAUDRATE 115200 + +/******************************************************************************* +* 3.Global function and Global variable declarations +*******************************************************************************/ + +/** + * @brief 测试case + */ +typedef enum +{ + UART_CASE_BLOCKING = 0, + UART_CASE_NONE_BLOCKING, + UART_CASE_DMA, + UART_CASE_MAX, + UART_CASE_LOOP_BACK, + UART_CASE_DEINIT, +} uart_case_e; + +typedef void (*unit_test_func)(); +typedef struct unit_test_entry_t +{ + char case_name[128]; /* Case名称 */ + unit_test_func case_func; /* Case处理函数 */ +} unit_test_entry_t; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ +static char sg_uart_log[256] = {0}; +static char sg_uart_send_buff[1024] = {0}; +static char sg_uart_recv_buff[1024] = {0}; +static uart_case_e sg_uart_case = UART_CASE_BLOCKING; +static hal_uart_num_e sg_uart_cur_num = HAL_UART_0; +volatile static bool sg_uart_case_done = true; +static hal_uart_config_t s_huart; + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +void STRFMT(const char *fmt, ...) +{ + va_list ap;//初始化指向可变参数列表的指针 + //将第一个可变参数的地址付给ap，即ap指向可变参数列表的开始 + va_start(ap, fmt); + //将参数fmt、ap指向的可变参数一起转换成格式化字符串，放string数组中，其作用同sprintf（），只是参数类型不同 + vsprintf(sg_uart_log, fmt, ap); + va_end(ap); //ap付值为0，没什么实际用处，主要是为程序健壮性 +} + +#define TEST_LOG(num,format,...) \ + do { \ + STRFMT(format, ##__VA_ARGS__); \ + hal_uart_send_blocking(num, (uint8_t *)sg_uart_log, strlen(sg_uart_log)); \ + } while (0) +/************************************************************************** +* @name : TEST_UART_PinMux_Init +* @brief : UART 脚位功能初始化 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void test_uart_mode_init(void) +{ + //UART 0 + hal_gpio_set_mode(IO_PAD_UART0_TX, PIN2_MODE_UART0_TX); + hal_gpio_set_mode(IO_PAD_UART0_RX, PIN36_MODE_UART0_RX); + //UART 1 只有唯一一组 + //hal_gpio_set_mode(IO_PAD_UART1_TX, PIN14_MODE_UART1_TX); + //hal_gpio_set_mode(IO_PAD_TD_TP_RESX, PIN13_MODE_UART1_RX); +} + +/************************************************************************** +* @name : test_uart_deinit +* @brief : uart注销 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void test_uart_common_deinit(hal_uart_num_e num) +{ + delayMs(500); + hal_uart_deinit(num); +} + +/************************************************************************** +* @name : test_uart_normal_init +* @brief : uart 普通模式初始化 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void test_uart_common_init(hal_uart_num_e num) +{ + hal_uart_config_t huart = {0}; + huart.baudrate = TEST_UART_BAUDRATE; + huart.data_width = HAL_UART_DATAWIDTH_8; + huart.parity = HAL_UART_PARITY_NO; + huart.stopbits = HAL_UART_STOPBIT_1; + hal_uart_init(num, &huart); +} + +/** +* @brief 获取端口号 +* @param 无 +* @retval 无 +*/ +static char test_uart_get_input_str(hal_uart_num_e num) +{ + char str = 0; + hal_uart_recv_blocking(num, (uint8_t *)&str, 1); + return str; +} + +/** +* @brief 获取输入字符串个数 +* @param 无 +* @retval 无 +*/ +static uint32_t test_uart_get_input_num(hal_uart_num_e num) +{ + uint32_t recv = 0; + char str[10] = {0}; + uint8_t i = 0; + + TEST_LOG(num, "input recv num and space to exit:"); + + while (1) + { + hal_uart_recv_blocking(num, (uint8_t *)&str[i], 1); + if (str[i] >= '0' && str[i] <= '9') + { + TEST_LOG(num, "%c", (char)str[i]); + i++; + } + else if (str[i] == 32) + { + str[i] = 0; + TEST_LOG(num, "\n"); + break; + } + } + + recv = atol(str); + return recv; +} + +/** +* @brief 复位uart所在PAD为GPIO mode +* @param 无 +* @retval 无 +*/ +static void test_uart_reset_uart_mode(void) +{ + hal_gpio_init_input(IO_PAD_AP_SPIS_MOSI); + hal_gpio_init_input(IO_PAD_UART0_TX); + hal_gpio_init_input(IO_PAD_AP_SPIS_MISO); + hal_gpio_init_input(IO_PAD_UART0_RX); + hal_gpio_init_input(IO_PAD_AP_TPRSTN); + hal_gpio_init_input(IO_PAD_AP_PWMEN); + hal_gpio_init_input(IO_PAD_TD_SPIM_MOSI); + hal_gpio_init_input(IO_PAD_UART1_TX); + hal_gpio_init_input(IO_PAD_TD_TP_RESX); +} + +/** +* @brief 在UART2上设置UART1的TX和RX PAD +* @param 无 +* @retval 无 +*/ +static void test_uart_set_uart_mode(void) +{ + char str = 0; + hal_uart_num_e uart_org_num = sg_uart_cur_num; + + TEST_LOG(uart_org_num, "select UART(0/1):\n"); + TEST_LOG(uart_org_num, "Enter:"); + str = test_uart_get_input_str(uart_org_num); + TEST_LOG(uart_org_num, "%c\n\n", str); + sg_uart_cur_num = (hal_uart_num_e)(str - '0'); + + if (HAL_UART_1 == sg_uart_cur_num) /* 测试UART1 */ + { + //sel tx + TEST_LOG(uart_org_num, "select UART1 TX:\n"); + TEST_LOG(uart_org_num, "0:IO_PAD_UART1_TX->PIN14_MODE_UART1_TX\n"); + //sel rx + TEST_LOG(uart_org_num, "select UART1 RX:\n"); + TEST_LOG(uart_org_num, "0:IO_PAD_TD_TP_RESX->PIN13_MODE_UART1_RX\n"); + TEST_LOG(uart_org_num, "change the connect pin and press space to continue \n"); + delayMs(200); + + test_uart_reset_uart_mode(); + hal_gpio_set_mode(IO_PAD_UART1_TX, PIN14_MODE_UART1_TX); + hal_gpio_set_mode(IO_PAD_TD_TP_RESX, PIN13_MODE_UART1_RX); + hal_uart_deinit(HAL_UART_0); + test_uart_common_init(HAL_UART_1); + } + else + { + uint8_t sel_tx, sel_rx; + //sel tx + TEST_LOG(uart_org_num, "select UART0 TX:\n"); + TEST_LOG(uart_org_num, "0:IO_PAD_UART0_TX->PIN2_MODE_UART0_TX\n"); + TEST_LOG(uart_org_num, "1:IO_PAD_AP_SPIS_MOSI->PIN33_MODE_UART0_TX \n"); + TEST_LOG(uart_org_num, "2:IO_PAD_TD_SPIM_MOSI->PIN4_MODE_UART0_TX\n"); + TEST_LOG(uart_org_num, "Enter:"); + str = test_uart_get_input_str(uart_org_num); + TEST_LOG(uart_org_num, "%c\n\n", str); + sel_tx = str - '0'; + + //sel rx + TEST_LOG(uart_org_num, "select UART0 RX:\n"); + TEST_LOG(uart_org_num, "0:IO_PAD_UART0_RX->PIN36_MODE_UART0_RX\n"); + TEST_LOG(uart_org_num, "1:IO_PAD_AP_SPIS_MISO->PIN30_MODE_UART0_RX\n"); + TEST_LOG(uart_org_num, "2:IO_PAD_AP_TPRSTN->PIN18_MODE_UART0_RX\n"); + TEST_LOG(uart_org_num, "3:IO_PAD_AP_PWMEN->PIN17_MODE_UART0_RX\n"); + TEST_LOG(uart_org_num, "4:IO_PAD_UART1_TX->PIN14_MODE_UART0_RX\n"); + TEST_LOG(uart_org_num, "Enter:"); + str = test_uart_get_input_str(uart_org_num); + TEST_LOG(uart_org_num, "%c\n\n", str); + sel_rx = str - '0'; + + TEST_LOG(uart_org_num, "change the connect pin and press space to continue \n"); + delayMs(500); + test_uart_reset_uart_mode(); + + switch (sel_tx) + { + case 0: + hal_gpio_set_mode(IO_PAD_UART0_TX, PIN2_MODE_UART0_TX); + break; + + case 1: + hal_gpio_set_mode(IO_PAD_AP_SPIS_MOSI, PIN33_MODE_UART0_TX); + break; + + case 2: + hal_gpio_set_mode(IO_PAD_TD_SPIM_MOSI, PIN4_MODE_UART0_TX); + break; + + default: + break; + } + + switch (sel_rx) + { + case 0: + hal_gpio_set_mode(IO_PAD_UART0_RX, PIN36_MODE_UART0_RX); + break; + + case 1: + hal_gpio_set_mode(IO_PAD_AP_SPIS_MISO, PIN30_MODE_UART0_RX); + break; + + case 2: + hal_gpio_set_mode(IO_PAD_AP_TPRSTN, PIN18_MODE_UART0_RX); + break; + + case 3: + hal_gpio_set_mode(IO_PAD_AP_PWMEN, PIN17_MODE_UART0_RX); + break; + + case 4: + hal_gpio_set_mode(IO_PAD_UART1_TX, PIN14_MODE_UART0_RX); + break; + + default: + break; + } + hal_uart_deinit(HAL_UART_1); + test_uart_common_init(HAL_UART_0); + } + while (1) + { + str = test_uart_get_input_str(sg_uart_cur_num); + if (str == 32) + { + break; + } + } +} + +/** +* @brief 是否重复 +* @param 无 +* @retval 无 +*/ +static bool test_uart_sel_continue() +{ + uint8_t str = 0; + delayMs(500); + test_uart_common_deinit(sg_uart_cur_num); + test_uart_common_init(sg_uart_cur_num); + TEST_LOG(sg_uart_cur_num, " y repeat \n"); + TEST_LOG(sg_uart_cur_num, " n exit \n"); + while (1) + { + str = test_uart_get_input_str(sg_uart_cur_num); + switch (str) + { + case 'y': + TEST_LOG(sg_uart_cur_num, "y\n"); + return true; + + case 'n': + TEST_LOG(sg_uart_cur_num, "n\n"); + return false; + + default: + continue; + } + } +} + +/************************************************************************** +* @name : test_uart_blocking +* @brief : UART TX，RX阻塞读写。 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void test_uart_blocking(void) +{ + uint32_t recv = 0; + delayMs(500); + test_uart_common_deinit(sg_uart_cur_num); + test_uart_common_init(sg_uart_cur_num); + delayMs(500); + TEST_LOG(sg_uart_cur_num, "test uart%d start.\n", sg_uart_cur_num); + + //test recv + recv = test_uart_get_input_num(sg_uart_cur_num); + TEST_LOG(sg_uart_cur_num, "input %d char one time:\n", recv); + memset(sg_uart_recv_buff, 0, recv + 1); + if (!hal_uart_recv_blocking(sg_uart_cur_num, (uint8_t *)sg_uart_recv_buff, recv)) + { + TEST_LOG(sg_uart_cur_num, "an error has occurred!\n"); + } + TEST_LOG(sg_uart_cur_num, "%s\n", sg_uart_recv_buff); + + //test send + TEST_LOG(sg_uart_cur_num, "send:\n"); + strcpy(sg_uart_send_buff, sg_uart_recv_buff); + if (!hal_uart_send_blocking(sg_uart_cur_num, (uint8_t *)sg_uart_send_buff, strlen(sg_uart_send_buff))) + { + TEST_LOG(sg_uart_cur_num, "an error has occurred!\n"); + } + + TEST_LOG(sg_uart_cur_num, "\n"); + + sg_uart_case_done = true; +} + +/************************************************************************** +* @name : test_uart_trans_cb +* @brief : 用户回调函数 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void test_uart_trans_cb(status_t status, void *user_data) +{ + switch (status) + { + case STATUS_UART_RX_IDLE: + case STATUS_UART_TX_IDLE: + *(bool *)user_data = true; + break; + + default: + break; + } +} + +/************************************************************************** +* @name : test_uart_none_blocking +* @brief : UART TX，RX非阻塞读写。 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void test_uart_none_blocking(void) +{ + uint32_t recv = 0; + volatile bool int_done = false; + delayMs(500); + test_uart_common_deinit(sg_uart_cur_num); + s_huart.baudrate = TEST_UART_BAUDRATE; + s_huart.data_width = HAL_UART_DATAWIDTH_8; + s_huart.parity = HAL_UART_PARITY_NO; + s_huart.stopbits = HAL_UART_STOPBIT_1; + s_huart.callback = test_uart_trans_cb; + s_huart.user_data = &int_done; + hal_uart_init(sg_uart_cur_num, &s_huart); + delayMs(500); + TEST_LOG(sg_uart_cur_num, "test uart%d start...\n", sg_uart_cur_num); + TEST_LOG(sg_uart_cur_num, "input and output 10 char:\n"); + int_done = false; + memset(sg_uart_recv_buff, 0, recv + 1); + while (!hal_uart_recv_none_blocking(sg_uart_cur_num, (uint8_t *)sg_uart_recv_buff, 10)) + { + //TEST_LOG(sg_uart_cur_num, "device busy!\n"); + } + while (!int_done); + + //test send + int_done = false; + strcpy(sg_uart_send_buff, sg_uart_recv_buff); + while (!hal_uart_send_none_blocking(sg_uart_cur_num, (uint8_t *)sg_uart_send_buff, strlen(sg_uart_send_buff))) + { + //TEST_LOG(sg_uart_cur_num, "device busy!\n"); + } + while (!int_done); + + TEST_LOG(sg_uart_cur_num, "\n"); + + sg_uart_case_done = true; +} + + +/************************************************************************** +* @name : test_uart_dma_transmit +* @brief : UART DMA读写测试 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void test_uart_dma_transmit(void) +{ + uint32_t recv = 0; + char str = 0; + bool int_done = false; + + while (1) + { + TEST_LOG(sg_uart_cur_num, "test uart%d start...\n", sg_uart_cur_num); + recv = test_uart_get_input_num(sg_uart_cur_num); + TEST_LOG(sg_uart_cur_num, "please input %d char once:\n", recv); + + test_uart_common_deinit(sg_uart_cur_num); + s_huart.baudrate = TEST_UART_BAUDRATE; + s_huart.data_width = HAL_UART_DATAWIDTH_8; + s_huart.parity = HAL_UART_PARITY_NO; + s_huart.stopbits = HAL_UART_STOPBIT_1; + s_huart.callback = test_uart_trans_cb; + s_huart.user_data = &int_done; + hal_uart_init(sg_uart_cur_num, &s_huart); + + int_done = false; + memset(sg_uart_recv_buff, 0, recv + 1); + while (!hal_uart_dma_recv(sg_uart_cur_num, (uint8_t *)sg_uart_recv_buff, recv)) + { + //TEST_LOG(sg_uart_cur_num, "device busy!\n"); + } + while (!int_done) + { + delayMs(500); + }; + + TEST_LOG(sg_uart_cur_num, "%s\n", sg_uart_recv_buff); + TEST_LOG(sg_uart_cur_num, "please input %d char twice:\n", recv); + + int_done = false; + memset(sg_uart_recv_buff, 0, recv + 1); + while (!hal_uart_dma_recv(sg_uart_cur_num, (uint8_t *)sg_uart_recv_buff, recv)) + { + //TEST_LOG(sg_uart_cur_num, "device busy!\n"); + } + while (!int_done) + { + delayMs(100); + //TEST_LOG("recv dma not done!!!\n"); + }; + TEST_LOG(sg_uart_cur_num, "%s\n", sg_uart_recv_buff); + + int_done = false; + strcpy(sg_uart_send_buff, "uart dma tx test comp once!\n"); + while (!hal_uart_dma_send(sg_uart_cur_num, (uint8_t *)sg_uart_send_buff, strlen(sg_uart_send_buff))) + { + //TEST_LOG(sg_uart_cur_num, "device busy!\n"); + } + while (!int_done); + + int_done = false; + strcpy(sg_uart_send_buff, "uart dma tx test comp twice!\n"); + while (!hal_uart_dma_send(sg_uart_cur_num, (uint8_t *)sg_uart_send_buff, strlen(sg_uart_send_buff))) + { + //TEST_LOG(sg_uart_cur_num, "device busy!\n"); + } + while (!int_done); + + if (sg_uart_cur_num == HAL_UART_0) + { + hal_uart_dma_path_close(HAL_UART0_DMA_PATH_TX); + hal_uart_dma_path_close(HAL_UART0_DMA_PATH_RX); + //TEST_LOG(sg_uart_cur_num, "close uart0 dma channel\n"); + } + else + { + hal_uart_dma_path_close(HAL_UART1_DMA_PATH_TX); + hal_uart_dma_path_close(HAL_UART1_DMA_PATH_RX); + //TEST_LOG(sg_uart_cur_num, "close uart1 dma channel\n"); + } + delayMs(500); + /* 用普通方式初始化uart */ + test_uart_common_deinit(sg_uart_cur_num); + test_uart_common_init(sg_uart_cur_num); + + TEST_LOG(sg_uart_cur_num, "0:continue\n"); + TEST_LOG(sg_uart_cur_num, "1:exit\n"); + TEST_LOG(sg_uart_cur_num, "Enter:"); + while (1) + { + str = test_uart_get_input_str(sg_uart_cur_num); + if ('0' == str) + { + TEST_LOG(sg_uart_cur_num, "%c\n", str); + break; + } + else if ('1' == str) + { + TEST_LOG(sg_uart_cur_num, "%c\n", str); + sg_uart_case_done = true; + return; + } + } + } +} + + +static const unit_test_entry_t sg_uart_unit_test_table[] = +{ + {"blocking case ...", test_uart_blocking}, + {"none blocking case ...", test_uart_none_blocking}, + {"dma trans case ...", test_uart_dma_transmit}, + {"end", NULL}, +}; + +#if UART_TEST_AUTO +/** +* @brief uart测试用例切换 +* @param 无 +* @retval 无 +*/ +static void test_uart_auto_case(void) +{ + for (sg_uart_case = UART_CASE_BLOCKING; sg_uart_case < UART_CASE_MAX; sg_uart_case++) + { + TEST_LOG(sg_uart_cur_num, "%s\n", sg_uart_unit_test_table[sg_uart_case].case_name); + + sg_uart_case_done = false; + + /*配置并启动定时器*/ + sg_uart_unit_test_table[sg_uart_case].case_func(); + + /*等待超时中断*/ + while (!sg_uart_case_done); + + TEST_LOG(sg_uart_cur_num, "test case pass \n"); + TEST_LOG(sg_uart_cur_num, "\n"); + } +} +#else +/** +* @brief uart测试用例切换 +* @param 无 +* @retval 无 +*/ +static void test_uart_unit_case(uint8_t case_num) +{ + TEST_LOG(sg_uart_cur_num, "%s\n", sg_uart_unit_test_table[case_num].case_name); + + sg_uart_case_done = false; + + /*配置并启动定时器*/ + sg_uart_unit_test_table[case_num].case_func(); + + /*等待超时中断*/ + while (!sg_uart_case_done); + + TEST_LOG(sg_uart_cur_num, "test case pass!!\n"); +} +#endif + +/************************************************************************** +* @name : demo_hal_uart_case +* @brief : +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void demo_hal_uart_case(void) +{ + test_uart_common_init(sg_uart_cur_num); + test_uart_mode_init(); + while (1) + { + test_uart_set_uart_mode(); + +#if UART_TEST_AUTO + test_uart_auto_case(); +#else + test_uart_unit_case(sg_uart_case); +#endif + + if (!test_uart_sel_continue()) + { + break; + } + } + TEST_LOG(sg_uart_cur_num, "uart test done!\n"); +} +#endif diff --git a/src/app/module_demo/demo_hal_uart.h b/src/app/module_demo/demo_hal_uart.h new file mode 100644 index 0000000..30dd036 --- /dev/null +++ b/src/app/module_demo/demo_hal_uart.h @@ -0,0 +1,36 @@ +/******************************************************************************* +* Copyright (C) 2020-2023, tau Systems (R),All Rights Reserved. +* +* File: demo_hal_uart.h +* Description: hal uart测试用例头文件 +* Version: V0.1 +* Date： 2023-07-09 +* Author: kc + *******************************************************************************/ +#ifndef __DEMO_HAL_UART_H__ +#define __DEMO_HAL_UART_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "test_cfg_global.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +void demo_hal_uart_case(void); + +#endif /* __DEMO_HAL_UART_H__ */ + diff --git a/src/app/module_demo/demo_hal_wdg.c b/src/app/module_demo/demo_hal_wdg.c new file mode 100644 index 0000000..aeaa1c7 --- /dev/null +++ b/src/app/module_demo/demo_hal_wdg.c @@ -0,0 +1,135 @@ +/******************************************************************************* +* +* +* File: demo_hal_wdg.c +* Description： watch dog demo源文件 +* Version： V0.1 +* Date： 2023-07-27 +* Author： zzf + *******************************************************************************/ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "hal_wdg.h" +#include "hal_gpio.h" +#include "tau_delay.h" +#include "tau_log.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "wdg-log" + +#define WDG_CASE_RST 0 //复位模式 +#define WDG_CASE_INTR 1 //中断模式 + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ +#if WDG_CASE_INTR +static io_pad_e sg_wdg_io_pad = IO_PAD_GPIO1; +static gpio_level_e sg_wdg_io_lvl = IO_LVL_LOW; +/* 循环喂狗 */ +static uint8_t sg_feed_cnt = 0; +#endif + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +#if WDG_CASE_RST +/** +* @brief 复位模式测试 +* @param 无 +* @retval 无 +*/ +static void demo_wdg_case_rst_mode(void) +{ + TAU_LOGI("reset start...\n"); + + /* WDG初始化复位模式 */ + hal_wdg_init(); + + /* 启动 */ + hal_wdg_start(WDG_MODE_RESET, 5000); +} +#endif + +#if WDG_CASE_INTR +/** +* @brief 测试回调函数 +* @param 无 +* @retval 无 +*/ +static void demo_wdg_callback(void *data) +{ + /* 翻转GPIO */ + sg_wdg_io_lvl = (sg_wdg_io_lvl ? IO_LVL_LOW : IO_LVL_HIGH); + hal_gpio_set_output_data(sg_wdg_io_pad, sg_wdg_io_lvl); + sg_feed_cnt++; + + if (sg_feed_cnt > 10) + { + hal_wdg_stop(); + } +} + +/** +* @brief 中断模式测试 +* @param 无 +* @retval 无 +*/ +static void demo_wdg_case_int_mode(void) +{ + TAU_LOGI("int start...\n"); + + /* WDG初始化 */ + hal_wdg_init(); + + /* 设置循环超时 */ + hal_wdg_set_repeat(true); + + /* 设置回调函数 */ + hal_wdg_register_callback(demo_wdg_callback, NULL); + + /*初始化GPIO低状态*/ + hal_gpio_init_output(sg_wdg_io_pad, sg_wdg_io_lvl); + + /* 设置中断模式 */ + hal_wdg_start(WDG_MODE_INTERRUPT, 200); + + + while (sg_feed_cnt < 6) + { + sg_feed_cnt++; + hal_wdg_kick_dog(); + delayMs(150); + TAU_LOGI("feed [%d]th done\n", sg_feed_cnt); + } + +} +#endif + +/** +* @brief demo测试接口函数 +* @param None +* @retval None +*/ +void demo_wdg_case(void) +{ + TAU_LOGI("demo_wdg_case\r\n"); + +#if WDG_CASE_RST + demo_wdg_case_rst_mode(); +#elif WDG_CASE_INTR + demo_wdg_case_int_mode(); +#endif +} + diff --git a/src/app/module_demo/demo_hal_wdg.h b/src/app/module_demo/demo_hal_wdg.h new file mode 100644 index 0000000..64dd430 --- /dev/null +++ b/src/app/module_demo/demo_hal_wdg.h @@ -0,0 +1,40 @@ +/******************************************************************************* +* +* +* File: demo_hal_wdg.h +* Description: watch dog demo头文件 +* Version: V0.1 +* Date: 2023-07-27 +* Author: zzf + *******************************************************************************/ +#ifndef __DEMO_WDG_H__ +#define __DEMO_WDG_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief demo测试接口函数 +* @param None +* @retval None +*/ +void demo_wdg_case(void); + +#endif /* __DEMO_WDG_H__ */ + diff --git a/src/app/module_demo/module_demo_main.c b/src/app/module_demo/module_demo_main.c new file mode 100644 index 0000000..59b4f51 --- /dev/null +++ b/src/app/module_demo/module_demo_main.c @@ -0,0 +1,69 @@ +/******************************************************************************* +* +* File: ap_demo_main.c +* Description: ap demo main file +* Version: V0.1 +* Date: 2022-04-15 +* Author: Jaya + *******************************************************************************/ + +#include +#include +#include +#include "module_demo_main.h" + +void module_demo_main() +{ +#if _MODULE_DEMO_DSI_TX_EN + demo_dsi_tx_case(); +#endif + +#if _MODULE_DEMO_DSI_RX_EN + demo_hal_dsi_rx_case(); +#endif + +#if _MODULE_DEMO_TIMER_EN + demo_timer_case(); +#endif + +#if _MODULE_DEMO_WDG_EN + demo_wdg_case(); +#endif + +#if _MODULE_DEMO_GPIO_EN + demo_gpio_case(); +#endif + +#if _MODULE_DEMO_SWIRE_EN + demo_hal_swire(); +#endif + +#if _MODULE_DEMO_SPI_EN + demo_hal_spi(); +#endif + +#if _MODULE_DEMO_I2C_EN + demo_hal_i2c(); +#endif + +#if _MODULE_DEMO_FLASH_EN + demo_hal_flash(); +#endif + +#if _MODULE_DEMO_PWM_EN + demo_hal_pwm(); +#endif + +#if _MODULE_DEMO_PWR_EN + demo_hal_pwr(); +#endif + +#if _MODULE_DEMO_UART_EN + demo_hal_uart_case(); +#endif + +#if _MODULE_DEMO_CRC_EN + demo_hal_crc_case(); +#endif + +} diff --git a/src/app/module_demo/module_demo_main.h b/src/app/module_demo/module_demo_main.h new file mode 100644 index 0000000..a01138f --- /dev/null +++ b/src/app/module_demo/module_demo_main.h @@ -0,0 +1,68 @@ +/******************************************************************************* +* +* File: module_demo_main.h +* Description: module demo main file +* Version: V0.1 +* Date: 2023-07-27 +* Author: Jaya + *******************************************************************************/ + +#ifndef __MODULE_DEMO_MAIN_H__ +#define __MODULE_DEMO_MAIN_H__ +#include "test_cfg_global.h" + +#if _MODULE_DEMO_DSI_TX_EN +#include "demo_hal_dsi_tx.h" +#endif + +#if _MODULE_DEMO_DSI_RX_EN +#include "demo_hal_dsi_rx.h" +#endif + +#if _MODULE_DEMO_TIMER_EN +#include "demo_hal_timer.h" +#endif + +#if _MODULE_DEMO_WDG_EN +#include "demo_hal_wdg.h" +#endif + +#if _MODULE_DEMO_GPIO_EN +#include "demo_hal_gpio.h" +#endif + +#if _MODULE_DEMO_SWIRE_EN +#include "demo_hal_swire.h" +#endif + +#if _MODULE_DEMO_SPI_EN +#include "demo_hal_spi.h" +#endif + +#if _MODULE_DEMO_I2C_EN +#include "demo_hal_i2c.h" +#endif + +#if _MODULE_DEMO_FLASH_EN +#include "demo_hal_flash.h" +#endif + +#if _MODULE_DEMO_PWM_EN +#include "demo_hal_pwm.h" +#endif + +#if _MODULE_DEMO_PWR_EN +#include "demo_hal_pwr.h" +#endif + +#if _MODULE_DEMO_UART_EN +#include "demo_hal_uart.h" +#endif + +#if _MODULE_DEMO_CRC_EN +#include "demo_hal_crc.h" +#endif + +void module_demo_main(void); + +#endif /* __MODULE_DEMO_MAIN_H__ */ diff --git a/src/app/test_cfg_global.h b/src/app/test_cfg_global.h new file mode 100644 index 0000000..93a471e --- /dev/null +++ b/src/app/test_cfg_global.h @@ -0,0 +1,40 @@ +/******************************************************************************* +* +* File: test_cfg_global.h +* Description： 测试用例全局配置头文件 +* Version： V0.1 +* Date： 2021-05-01 +* Author： kevin + *******************************************************************************/ + +#ifndef __TEST_GLOBAL_CONFIG_H__ +#define __TEST_GLOBAL_CONFIG_H__ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +/* 模块demo 宏定义 */ +#define _MODULE_DEMO_ENABLE 0 +#define _MODULE_DEMO_TIMER_EN 0 +#define _MODULE_DEMO_DSI_TX_EN 0 +#define _MODULE_DEMO_DSI_RX_EN 0 +#define _MODULE_DEMO_PWM_EN 0 +#define _MODULE_DEMO_SWIRE_EN 0 +#define _MODULE_DEMO_WDG_EN 0 +#define _MODULE_DEMO_GPIO_EN 0 +#define _MODULE_DEMO_I2C_EN 0 +#define _MODULE_DEMO_SPI_EN 0 +#define _MODULE_DEMO_PWR_EN 0 +/* ap demo 宏定义 */ + +#define _DEMO_HONOR_90Pro_EN 1 + + +#if _DEMO_HONOR_90Pro_EN + #include "Honor90Pro_demo.h" +#endif +#endif + diff --git a/src/board/board.c b/src/board/board.c new file mode 100644 index 0000000..ed06fd5 --- /dev/null +++ b/src/board/board.c @@ -0,0 +1,31 @@ +/******************************************************************************* +* +* +* File: board.c +* Description 板级文件 +* Version V0.1 +* Date 2023-07-23 +* Author lzy +*******************************************************************************/ +#include "board.h" +#include "hal_system.h" +#include "hal_gpio.h" +#include "ArmCM0.h" +#include "tau_log.h" + +/** +* @brief 系统板级初始化,配置系统时钟,调试log输出 +* @param none +* @retval none +*/ +void board_Init(void) +{ + /* system init ,配置MCU时钟 */ + hal_system_init(HAL_SYSCLK_80M); + + /* 使用SWD口作为Debug Log输出,可配置成Uart方式 */ + tau_log_init(115200, LOG_PORT_UART0); + + /* systick init,根据需要配置 */ + //hal_system_enable_systick(1); +} diff --git a/src/board/board.h b/src/board/board.h new file mode 100644 index 0000000..16c7b2a --- /dev/null +++ b/src/board/board.h @@ -0,0 +1,21 @@ +/******************************************************************************* +* +* +* File: board.h +* Description: baord 初始化头文件 +* Version: V0.1 +* Date: 2020-01-08 +* Author: lzy + *******************************************************************************/ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +/** +* @brief 系统板级初始化,配置系统时钟,调试log输出 +* @param none +* @retval none +*/ +void board_Init(void); + +#endif diff --git a/src/board/startup/startup_ARMCM0.s b/src/board/startup/startup_ARMCM0.s new file mode 100644 index 0000000..947bb24 --- /dev/null +++ b/src/board/startup/startup_ARMCM0.s @@ -0,0 +1,226 @@ +;/**************************************************************************//** +; * @file startup_ARMCM0.s +; * @brief CMSIS Core Device Startup File for +; * ARMCM0 Device +; * @version V5.4.0 +; * @date 12. December 2018 +; ******************************************************************************/ +;/* +; * Copyright (c) 2009-2018 Arm Limited. All rights reserved. +; * +; * SPDX-License-Identifier: Apache-2.0 +; * +; * Licensed under the Apache License, Version 2.0 (the License); you may +; * not use this file except in compliance with the License. +; * You may obtain a copy of the License at +; * +; * www.apache.org/licenses/LICENSE-2.0 +; * +; * Unless required by applicable law or agreed to in writing, software +; * distributed under the License is distributed on an AS IS BASIS, WITHOUT +; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +; * See the License for the specific language governing permissions and +; * limitations under the License. +; */ + +;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ + + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00001000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +__stack_limit +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000C00 + + IF Heap_Size != 0 ; Heap is provided + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + ENDIF + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; -14 NMI Handler + DCD HardFault_Handler ; -13 Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; -5 SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; -2 PendSV Handler + DCD SysTick_Handler ; -1 SysTick Handler + + + ; Interrupts + DCD VIDC_IRQn_Handler ; 0 Interrupt 0 + DCD LCDC_IRQn_Handler ; 1 Interrupt 1 + DCD MIPI_RX_IRQn_Handler ; 2 Interrupt 2 + DCD MIPI_TX_IRQn_Handler ; 3 Interrupt 3 + DCD MEMC_IRQn_Handler ; 4 Interrupt 4 + DCD VPRE_IRQn_Handler ; 5 Interrupt 5 + DCD FLSCTRL_IRQn_Handler ; 6 Interrupt 6 + DCD DMA_IRQn_Handler ; 7 Interrupt 7 + DCD TIMER0_IRQn_Handler ; 8 Interrupt 8 + DCD TIMER1_IRQn_Handler ; 9 Interrupt 9 + DCD TIMER2_IRQn_Handler ; 10 Interrupt 10 + DCD TIMER3_IRQn_Handler ; 11 Interrupt 11 + DCD WDG_IRQn_Handler ; 12 Interrupt 12 + DCD UART_IRQn_Handler ; 13 Interrupt 13 + DCD I2C0_IRQn_Handler ; 14 Interrupt 14 + DCD I2C1_IRQn_Handler ; 15 Interrupt 15 + DCD SPIS_IRQn_Handler ; 16 Interrupt 16 + DCD SPIM_IRQn_Handler ; 17 Interrupt 17 + DCD VPRE1_IRQn_Handler ; 18 Interrupt 18 + DCD I2C2_IRQn_Handler ; 19 Interrupt 19 + DCD OTP_IRQn_Handler ; 20 Interrupt 20 + DCD SWIRE_IRQn_Handler ; 21 Interrupt 21 + DCD PVD_IRQn_Handler ; 22 Interrupt 22 + DCD AP_NRESET_IRQn_Handler ; 23 Interrupt 23 + DCD EXTI_INT0_IRQn_Handler ; 24 Interrupt 24 + DCD EXTI_INT1_IRQn_Handler ; 25 Interrupt 25 + DCD EXTI_INT2_IRQn_Handler ; 26 Interrupt 26 + DCD EXTI_INT3_IRQn_Handler ; 27 Interrupt 27 + DCD EXTI_INT4_IRQn_Handler ; 28 Interrupt 28 + DCD EXTI_INT5_IRQn_Handler ; 29 Interrupt 29 + DCD EXTI_INT6_IRQn_Handler ; 30 Interrupt 30 + DCD EXTI_INT7_IRQn_Handler ; 31 Interrupt 31 + + SPACE ( 0 * 4) ; Interrupts 10 .. 31 are left out + +__Vectors_End +__Vectors_Size EQU __Vectors_End - __Vectors +_NVIC_ICER0 EQU 0xE000E180 ;清中断使能寄存器地址 +_NVIC_ICPR0 EQU 0xE000E280 ;清中断pending寄存器地址 + + AREA |.text|, CODE, READONLY + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + +;清中断使能和pending ——开始—— + CPSID I ; 屏蔽中断 + LDR R0, =_NVIC_ICER0 + LDR R1, =_NVIC_ICPR0 + LDR R2, =0xFFFFFFFF + MOVS R3, #1 ; 设置循环次数 M0只有1组(32个)中断，故只需要循环1次 +_irq_clear + ;CBZ R3, _irq_clear_end + CMP R3,#0 ; 循环次数等于0，跳转到_irq_clear_end + BNE _irq_clear_end + STR R2, [R0] ;,#4 ; NVIC_ICER0 - 清 enable IRQ 寄存器 + STR R2, [R1] ;,#4 ; NVIC_ICPR0 - 清 pending IRQ 寄存器 + SUBS R3, #1 ; 循环数自减1 + B _irq_clear +_irq_clear_end +;清中断使能和pending ——结束—— + CPSIE I ; 开启中断 + LDR R0, =__main + BX R0 + ENDP + + +; Macro to define default exception/interrupt handlers. +; Default handler are weak symbols with an endless loop. +; They can be overwritten by real handlers. + MACRO + Set_Default_Handler $Handler_Name +$Handler_Name PROC + EXPORT $Handler_Name [WEAK] + B . + ENDP + MEND + + +; Default exception/interrupt handler + + Set_Default_Handler NMI_Handler + Set_Default_Handler HardFault_Handler + Set_Default_Handler SVC_Handler + Set_Default_Handler PendSV_Handler + Set_Default_Handler SysTick_Handler + + Set_Default_Handler VIDC_IRQn_Handler + Set_Default_Handler LCDC_IRQn_Handler + Set_Default_Handler MIPI_RX_IRQn_Handler + Set_Default_Handler MIPI_TX_IRQn_Handler + Set_Default_Handler MEMC_IRQn_Handler + Set_Default_Handler VPRE_IRQn_Handler + Set_Default_Handler FLSCTRL_IRQn_Handler + Set_Default_Handler DMA_IRQn_Handler + Set_Default_Handler TIMER0_IRQn_Handler + Set_Default_Handler TIMER1_IRQn_Handler + + Set_Default_Handler TIMER2_IRQn_Handler + Set_Default_Handler TIMER3_IRQn_Handler + Set_Default_Handler WDG_IRQn_Handler + Set_Default_Handler UART_IRQn_Handler + Set_Default_Handler I2C0_IRQn_Handler + Set_Default_Handler I2C1_IRQn_Handler + Set_Default_Handler SPIS_IRQn_Handler + Set_Default_Handler SPIM_IRQn_Handler + Set_Default_Handler VPRE1_IRQn_Handler + Set_Default_Handler I2C2_IRQn_Handler + + Set_Default_Handler OTP_IRQn_Handler + Set_Default_Handler SWIRE_IRQn_Handler + Set_Default_Handler PVD_IRQn_Handler + Set_Default_Handler AP_NRESET_IRQn_Handler + Set_Default_Handler EXTI_INT0_IRQn_Handler + Set_Default_Handler EXTI_INT1_IRQn_Handler + Set_Default_Handler EXTI_INT2_IRQn_Handler + Set_Default_Handler EXTI_INT3_IRQn_Handler + Set_Default_Handler EXTI_INT4_IRQn_Handler + Set_Default_Handler EXTI_INT5_IRQn_Handler + + Set_Default_Handler EXTI_INT6_IRQn_Handler + Set_Default_Handler EXTI_INT7_IRQn_Handler + ALIGN + + +; User setup Stack & Heap + + IF :LNOT::DEF:__MICROLIB + IMPORT __use_two_region_memory + ENDIF + + EXPORT __stack_limit + EXPORT __initial_sp + IF Heap_Size != 0 ; Heap is provided + EXPORT __heap_base + EXPORT __heap_limit + ENDIF + + END diff --git a/src/common/tau_common.h b/src/common/tau_common.h new file mode 100644 index 0000000..48d8ac2 --- /dev/null +++ b/src/common/tau_common.h @@ -0,0 +1,222 @@ +/******************************************************************************* +* +* +* File: tau_common.h +* Description 通用数据类型相关定义头文件 +* Version V0.1 +* Date 2020-09-07 +* Author lzy + *******************************************************************************/ + +#ifndef __TAU_COMMON_H +#define __TAU_COMMON_H + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "stdint.h" +#include "math.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +/** + * \name 通用常量定义 + * @{ + */ +//#define ENABLE 1 +//#define DISABLE 0 + +#define ON 1 +#define OFF 0 + +#define NONE 0 +#define EOS '\0' + +/* +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif +*/ + +#ifndef __cplusplus +#define true 1 +#define false 0 +#define bool _Bool +#endif /* ifndef __cplusplus */ + +#ifndef NULL +#define NULL ((void *)0) +#endif + +#define TAU_LITTLE_ENDIAN 1234 /**< \brief 小端模式 */ +#define TAU_BIG_ENDIAN 3412 /**< \brief 大端模式 */ + +/** @} */ + +/******************************************************************************/ + +/** + * \name 常用宏定义 + * @{ + */ + +#ifdef __cplusplus +#define __I volatile /*!< Defines 'read only' permissions */ +#else +#define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +#define TAU_INLINE inline +#define TAU_STATIC_INLINE static inline +#define TAU_STATIC static +#define TAU_CONST const +#define TAU_EXTERN extern + +#define MIN(x, y) (((x) < (y)) ? (x) : (y)) +#define MAX(x, y) (((x) > (y)) ? (x) : (y)) + +/** + * \brief 求结构体成员的偏移 + * \attention 不同平台上，由于成员大小和内存对齐等原因， + * 同一结构体成员的偏移可能是不一样的 + * + * \par 示例 + * \code + * struct my_struct { + * int m1; + * char m2; + * }; + * int offset_m2; + * + * offset_m2 = TAU_OFFSET(struct my_struct, m2); + * \endcode + */ +#define TAU_OFFSET(structure, member) ((uint32_t)(&(((structure *)0)->member))) + +/** @} */ + +/** + * \brief 通过结构体成员指针获取包含该结构体成员的结构体 + * + * \param ptr 指向结构体成员的指针 + * \param type 结构体类型 + * \param member 结构体中该成员的名称 + * + * \par 示例 + * \code + * struct my_struct = { + * int m1; + * char m2; + * }; + * struct my_struct my_st; + * char *p_m2 = &my_st.m2; + * struct my_struct *p_st = TAU_CONTAINER_OF(p_m2, struct my_struct, m2); + * \endcode + */ +#define TAU_CONTAINER_OF(ptr, type, member) \ + ((type *)((char *)(ptr)-TAU_OFFSET(type, member))) + +/** + * \brief 计算结构体成员的大小 + * + * \code + * struct a = { + * uint32_t m1; + * uint32_t m2; + * }; + * int size_m2; + * + * size_m2 = TAU_MEMBER_SIZE(a, m2); //size_m2 = 4 + * \endcode + */ +#define TAU_MEMBER_SIZE(structure, member) (sizeof(((structure *)0)->member)) + +/** + * \brief 计算数组元素个数 + * + * \code + * int a[] = {0, 1, 2, 3}; + * int element_a = TAU_NELEMENTS(a); // element_a = 4 + * \endcode + */ +#define TAU_NELEMENTS(array) (sizeof(array) / sizeof((array)[0])) + +/** + * \brief 向上舍入 + * + * \param x 被运算的数 + * \param align 对齐因素 + * + * \code + * int size = TAU_ROUND_UP(15, 4); // size = 16 + * \endcode + */ +#define TAU_ROUND_UP(x, align) (((int)(x)/(align))*(align) + (((int)(x)%(align)) ? (align) : 0)) + +/** + * \brief 向下舍入 + * + * \param x 被运算的数 + * \param align 对齐因素 + * + * \code + * int size = TAU_ROUND_DOWN(15, 4); // size = 12 + * \endcode + */ +#define TAU_ROUND_DOWN(x, align) (((int)(x)/(align))*(align)) + +/** \brief 倍数向上舍入 */ +#define TAU_DIV_ROUND_UP(n, d) (((n) + (d)-1) / (d)) + +/** + * \brief 测试是否对齐 + * + * \param x 被运算的数 + * \param align 对齐因素，必须为2的乘方 + * + * \code + * if (TAU_ALIGNED(x, 4) { + * ; // x对齐 + * } else { + * ; // x不对齐 + * } + * \endcode + */ +#define TAU_ALIGNED(x, align) (((int)(x) & (align - 1)) == 0) + +/** \brief 将1字节BCD数据转换为16进制数据 */ +#define TAU_BCD_TO_HEX(val) (((val)&0x0f) + ((val) >> 4) * 10) + +/** \brief 将1字节16进制数据转换为BCD数据 */ +#define TAU_HEX_TO_BCD(val) ((((val) / 10) << 4) + (val) % 10) + +/** + * \brief 向上取整 + */ +#define TAU_CEIL(val) ceil(val) + + +/*! @brief Construct the version number for drivers. */ +#define MAKE_VERSION(major, minor, bugfix) (((major) << 16) | ((minor) << 8) | (bugfix)) + + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*!< @brief 用于返回状态和错误 */ +typedef uint32_t status_t; + +/* \brief 通用回调函数指针定义 */ +typedef void (*fcb_type)(void *data); + +typedef void (*uart_trans_cb)(status_t status, void *user_data); + +typedef void (*flash_trans_cb)(status_t status, void *user_data); +#endif /* __TAU_COMMON_H */ diff --git a/src/common/tau_delay.h b/src/common/tau_delay.h new file mode 100644 index 0000000..b4a64ca --- /dev/null +++ b/src/common/tau_delay.h @@ -0,0 +1,34 @@ +/** + * File Name: tau_delay.h + * + * + * + * Author: Fortsense 3D Firmware Team + * + * Date: 2020/12/04 + * + * Project: Taurus + * + * Description: + * + * HISTORY: +**/ +#ifndef _DELAY_H_ +#define _DELAY_H_ +#include "stdint.h" + +/** +* @brief delay ms 函数,误差2%以内 +* @param ms:delay时长 +* @retval none +*/ +void delayMs(uint32_t ms); + +/** +* @brief delay us 函数,误差2%以内 +* @param us:delay时长 +* @retval none +*/ +void delayUs(uint32_t us); + +#endif diff --git a/src/common/tau_device_datatype.h b/src/common/tau_device_datatype.h new file mode 100644 index 0000000..bfce3bc --- /dev/null +++ b/src/common/tau_device_datatype.h @@ -0,0 +1,229 @@ +/******************************************************************************* + * + * + * File: tau_device_datatype.h + * Description device datatype + * Version V0.1 + * Date 2020-12-04 + * Author kevin + *******************************************************************************/ + +#ifndef _TAU_DEVICE_DATATYPE_H_ +#define _TAU_DEVICE_DATATYPE_H_ + + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +#include "stdint.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief 计算组状态码 */ +#define MAKE_STATUS(group, code) ((((group)*100) + (code))) + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief 分组状态值 */ +enum _status_groups +{ + STATUS_GROUP_GENERIC = 0, + STATUS_GROUP_I2C = 1, + STATUS_GROUP_UART = 2, + STATUS_GROUP_SPI = 3, + STATUS_GROUP_TIMER = 4, +}; + +/*! @brief 常用状态码 */ +enum _generic_status +{ + STATUS_SUCCESS = MAKE_STATUS(STATUS_GROUP_GENERIC, 0), + STATUS_FAIL = MAKE_STATUS(STATUS_GROUP_GENERIC, 1), + STATUS_READ_ONLY = MAKE_STATUS(STATUS_GROUP_GENERIC, 2), + STATUS_OUT_OF_RANGE = MAKE_STATUS(STATUS_GROUP_GENERIC, 3), + STATUS_INVALID_ARGUMENT = MAKE_STATUS(STATUS_GROUP_GENERIC, 4), + STATUS_TIME_OUT = MAKE_STATUS(STATUS_GROUP_GENERIC, 5), + STATUS_NO_TRANSFER_IN_PROGRESS = MAKE_STATUS(STATUS_GROUP_GENERIC, 6), +}; + +/** +* @brief UART状态枚举定义 +* +*/ +typedef enum +{ + STATUS_UART_TX_BUSY = MAKE_STATUS(STATUS_GROUP_UART, 0), /*!< Transmitter is busy. */ + STATUS_UART_RX_BUSY = MAKE_STATUS(STATUS_GROUP_UART, 1), /*!< Receiver is busy. */ + STATUS_UART_TX_IDLE = MAKE_STATUS(STATUS_GROUP_UART, 2), /*!< USART transmitter is idle. */ + STATUS_UART_RX_IDLE = MAKE_STATUS(STATUS_GROUP_UART, 3), /*!< USART receiver is idle. */ + STATUS_UART_TX_ERR = MAKE_STATUS(STATUS_GROUP_UART, 7), /*!< Error happens on txFIFO. */ + STATUS_UART_RX_ERR = MAKE_STATUS(STATUS_GROUP_UART, 9), /*!< Error happens on rxFIFO. */ + STATUS_UART_RX_RING_BUFF_OVERRUN = MAKE_STATUS(STATUS_GROUP_UART, 8), /*!< Error happens on rx ring buffer */ + STATUS_UART_NOISE_ERR = MAKE_STATUS(STATUS_GROUP_UART, 10), /*!< USART noise error. */ + STATUS_UART_FRAMING_ERR = MAKE_STATUS(STATUS_GROUP_UART, 11), /*!< USART framing error. */ + STATUS_UART_PARITY_ERR = MAKE_STATUS(STATUS_GROUP_UART, 12), /*!< USART parity error. */ + STATUS_UART_BAUDRATE_NOT_SPT = MAKE_STATUS(STATUS_GROUP_UART, 13), /*!< Baudrate is not support in current clock source */ +} uart_status_e; + +/*! + * @brief timer状态 + */ +typedef enum +{ + STATUS_TIMER_IDLE = MAKE_STATUS(STATUS_GROUP_TIMER, 0), /*!< 空闲 */ + STATUS_TIMER_RUNNING = MAKE_STATUS(STATUS_GROUP_TIMER, 1), /*!< 运行中 */ + STATUS_TIMER_TIMEOUT = MAKE_STATUS(STATUS_GROUP_TIMER, 2), /*!< 超时 */ +} timer_status_e; + +/*! + * @brief system触发事件(中断/复位)模式 + */ +typedef enum +{ + DETECT_HIGH_LVL = 0, + DETECT_LOW_LVL, + DETECT_RISING_EDGE, + DETECT_FALLING_EDGE, + DETECT_DOUBLE_EDGE +} sys_cfg_trigger_e; + +/** +* @brief GPIO interrupt type +*/ +typedef enum +{ + TIMER_NUM0 = 0, + TIMER_NUM1, + TIMER_NUM2, + TIMER_NUM3, + TIMER_NUM_MAX +} timer_num_e; + +/** +* @brief GPIO interrupt type +*/ +typedef enum +{ + GPIO_INT_EXTI_INT0 = 0, + GPIO_INT_EXTI_INT1, + GPIO_INT_EXTI_INT2, + GPIO_INT_EXTI_INT3, + GPIO_INT_EXTI_INT4, + GPIO_INT_EXTI_INT5, + GPIO_INT_EXTI_INT6, + GPIO_INT_EXTI_INT7, + GPIO_INT_MAX +} gpio_int_e; + +/*! @brief PWMI中断类型 */ +typedef enum _pwm_int_type +{ + PWM_INT_HIGH_OVERFLOW = 0, + PWM_INT_LOW_OVERFLOW, + PWM_INT_TOTAL_OVERFLOW, + PWM_INT_HIGH_DONE, + PWM_INT_LOW_DONE, + PWM_INT_TOTAL_DONE, + PWM_INT_MAX +} pwm_int_type_e; + +/** +* @brief I2C chose +*/ +typedef enum +{ + I2C_SELECT_0 = 0, //常用slave + I2C_SELECT_1, //常用master +} i2c_select_e; + +/*! + * @brief 传输速度 + * @note + */ +typedef enum _i2c_rate +{ + I2C_RATE_STANDARD = 1, //100kHz + I2C_RATE_FAST, //400kHz + I2C_RATE_HIGH, //1MHz +} i2c_rate_e; + +/*! + * @brief I2C Index + * @note + */ +typedef enum +{ + I2C_INDEX_0, + I2C_INDEX_1, + I2C_INDEX_2, + I2C_INDEX_MAX +} i2c_index_e; + +/*! + * @brief DMA channel type + * @note + */ +typedef enum +{ + AHB_DMA_CH0, + AHB_DMA_CH1, + AHB_DMA_CH2, + AHB_DMA_CH3, + AHB_DMA_CH4, + AHB_DMA_CH5, + AHB_DMA_CH6, + AHB_DMA_CH7, + AHB_DMA_CH_NUM +} dma_channel_type_e; + +/*! @brief Type used for all status and error return values. */ + +typedef enum +{ + DISABLE = 0, + ENABLE = !DISABLE +} function_state_e; + +/** +* @brief The reversal types of the bit order of the input/output data +*/ +typedef enum +{ + CRC_REV_NO_TRANSPOSE = 0, /*!< No transposition */ + CRC_REV_ONLY_BITS_TRANSPOSE, /*!< Bits in bytes are transposed; bytes are not transposed */ + CRC_REV_BOTH_TRANSPOSE, /*!< Both bits in bytes and bytes are transposed */ + CRC_REV_ONLY_BYTES_TRANSPOSE, /*!< Only bytes are transposed; no bits in a byte are transposed */ +} crc_reversal_type_e; + +/** +* @brief Complement Read Of CRC Data Register +*/ +typedef enum +{ + CRC_FXOR_DISABLE = 0, /*!< No XOR on reading */ + CRC_FXOR_ENABLE, /*!< Invert or complement the read value of the CRC Data register */ +} crc_fxor_function_e; + +/** +* @brief width of CRC protocol (polynomial) +*/ +typedef enum +{ + CRC_16_BIT_PROTOCOL = 0, /*!< 0: 16-bit CRC protocol */ + CRC_32_BIT_PROTOCOL, /*!< 1: 32-bit CRC protocol */ +} crc_protocol_type_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +#endif + diff --git a/src/common/tau_dsi_datatype.h b/src/common/tau_dsi_datatype.h new file mode 100644 index 0000000..fb301c9 --- /dev/null +++ b/src/common/tau_dsi_datatype.h @@ -0,0 +1,405 @@ +/******************************************************************************* +* +* +* File: tau_dsi_datatype.h +* Description: mipi dsi 通用头文件 +* Version: V0.1 +* Date: 2021-01-13 +* Author: lzy + *******************************************************************************/ + +#ifndef __MIPI_DSI_COMMON_H__ +#define __MIPI_DSI_COMMON_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#define DSC_PPS_SIZE 128 + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/** +* @brief Data Types for Peripheral-sourced Packets,From Mipi DSI Spec +*/ +typedef enum +{ + DSI_ACK_DT_ERROR = 0x02, + DSI_ACK_DT_EOTP = 0x08, + DSI_ACK_DT_GEN_SHORT_RESPONSE_1B = 0x11, + DSI_ACK_DT_GEN_SHORT_RESPONSE_2B = 0x12, + DSI_ACK_DT_GEN_LONG_RESPONSE = 0x1A, + DSI_ACK_DT_DCS_LONG_RESPONSE = 0x1C, + DSI_ACK_DT_DCS_SHORT_RESPONSE_1B = 0x21, + DSI_ACK_DT_DCS_SHORT_RESPONSE_2B = 0x22, + DSI_ACK_DT_MAX +} dsi_ack_data_type_e; + +/** +* @brief Software handle data types +*/ +typedef enum +{ + DSI_RECV_DT_PPS = 0x0A, //Picture Parameter Set + DSI_RECV_DT_GEN_WRITE_1B = 0x13, //Generic Short WRITE, 1 parameter + DSI_RECV_DT_GEN_WRITE_2B = 0x23, //Generic Short WRITE, 2 parameters + DSI_RECV_DT_GEN_READ_0B = 0x04, //Generic READ, no parameters + DSI_RECV_DT_GEN_READ_1B = 0x14, //Generic READ, 1 parameter + DSI_RECV_DT_GEN_READ_2B = 0x24, //Generic READ, 2 parameters + DSI_RECV_DT_DCS_WRITE_0B = 0x05, //DCS Short WRITE, no parameters + DSI_RECV_DT_DCS_WRITE_1B = 0x15, //DCS Short WRITE, 1 parameter + DSI_RECV_DT_DCS_READ_0B = 0x06, //DCS READ, no parameters + DSI_RECV_DT_GEN_WRITE_LONG = 0x29, //Generic Long Write + DSI_RECV_DT_DCS_WRITE_LONG = 0x39, //DCS Long Write/write_LUT Command Packet + DSI_RECV_DT_MAX +} dsi_data_type_e; + +typedef enum +{ + DCS_ENTER_IDLE_MODE = 0x39, + DCS_ENTER_INVERT_MODE = 0x21, + DCS_ENTER_NORMAL_MODE = 0x13, + DCS_ENTER_PARTIAL_MODE = 0x12, + DCS_ENTER_SLEEP_MODE = 0x10, + DCS_EXIT_IDLE_MODE = 0x38, + DCS_EXIT_INVERT_MODE = 0x20, + DCS_EXIT_SLEEP_MODE = 0x11, + DCS_GET_3D_CONTROL = 0x3F, + DCS_GET_ADDRESS_MODE = 0x0B, + DCS_GET_BLUE_CHANNEL = 0x08, + DCS_GET_COMPRESSION_MODE = 0x03, + DCS_GET_DIAGNOSTIC_RESULT = 0x0F, + DCS_GET_DISPLAY_MODE = 0x0D, + DCS_GET_GREEN_CHANNEL = 0x07, + DCS_GET_PIXEL_FORMAT = 0x0C, + DCS_GET_POWER_MODE = 0x0A, + DCS_GET_RED_CHANNEL = 0x06, + DCS_GET_SCANLINE = 0x45, + DCS_GET_SIGNAL_MODE = 0x0E, + DCS_NOP = 0x00, + DCS_READ_DDB_CONTINUE = 0xA8, + DCS_READ_DDB_START = 0xA1, + DCS_READ_MEMORY_CONTINUE = 0x3E, + DCS_READ_MEMORY_START = 0x2E, + DCS_SET_3D_CONTROL = 0x3D, + DCS_SET_ADDRESS_MODE = 0x36, + DCS_SET_COLUMN_ADDRESS = 0x2A, + DCS_SET_DISPLAY_OFF = 0x28, + DCS_SET_DISPLAY_ON = 0x29, + DCS_SET_GAMMA_CURVE = 0x26, + DCS_SET_PAGE_ADDRESS = 0x2B, + DCS_SET_PARTIAL_COLUMNS = 0x31, + DCS_SET_PARTIAL_ROWS = 0x30, + DCS_SET_PIXEL_FORMAT = 0x3A, + DCS_SET_SCROLL_AREA = 0x33, + DCS_SET_SCROLL_START = 0x37, + DCS_SET_TEAR_OFF = 0x34, + DCS_SET_TEAR_ON = 0x35, + DCS_SET_TEAR_SCANLINE = 0x44, + DCS_SET_VSYNC_TIMING = 0x40, + DCS_SOFT_RESET = 0x01, + DCS_WRITE_LUT = 0x2D, + DCS_WRITE_MEMORY_CONTINUE = 0x3C, + DCS_WRITE_MEMORY_START = 0x2C +} dsi_dcs_cmd_type_e; + +/** +* @brief video data transfer mode +*/ +typedef enum +{ + DSI_DATA_VIDEO_MODE = 0, + DSI_DATA_CMD_MODE = 1, + DSI_DATA_MODE_MAX +} dsi_video_data_mode_e; + +/** +* @brief dsi virtual channel +*/ +typedef enum +{ + DSI_VC_0 = 0, + DSI_VC_1 = 1, + DSI_VC_2 = 2, + DSI_VC_3 = 3, + DSI_VC_MAX +} dsi_virtual_channel_e; + +/** +* @brief video data mode +*/ +typedef enum +{ + DSI_FRAME_RATE_60HZ = 0, + DSI_FRAME_RATE_90HZ = 1, + DSI_FRAME_RATE_120HZ = 2, + DSI_FRAME_RATE_144HZ = 3, + DSI_FRAME_RATE_160HZ = 4, + DSI_FRAME_RATE_MAX +} dsi_video_frame_rate_e; + +/** +* @brief dsi rx color coding +*/ +typedef enum +{ + DSI_RGB565 = 1, + DSI_RGB666 = 2, /*!< 18 bbp(18bits per pixel) */ + DSI_RGB666_LOOSELY = 3, /*!< 24 bbp(24bits per pixel) */ + DSI_RGB888 = 4, /*!< 24 bbp(24bits per pixel) */ + DSI_RGB10_10_10 = 5, + DSI_RGB12_12_12 = 6, + DSI_YCbCr422_16 = 7, + DSI_PENTILE_16 = DSI_YCbCr422_16, + DSI_YCbCr422_20_LOOSELY = 8, + DSI_YCbCr422_24 = 9, + DSI_YCbCr420_12 = 10, + DSI_DSC_STREAM = 11, + DSI_COLOR_CODE_MAX +} dsi_color_code_e; + +/** +* @brief dsi endianness type +*/ +typedef enum +{ + DPI_ENDIAN_RGB = 0, + DPI_ENDIAN_BGR +} dsi_endianness_e; + +/** +* @brief mipi lane number +*/ +typedef enum +{ + DSI_LANE_1 = 1, + DSI_LANE_2 = 2, + DSI_LANE_3 = 3, + DSI_LANE_4 = 4, + DSI_LANE_NUME_MAX +} dsi_lane_nume_e; + +/** +* @brief video mode +*/ +typedef enum +{ + DSI_NONBURST_PULSE = 0, + DSI_NONBURST_EVENT = 1, + DSI_BURST_MODE = 2, + DSI_VIDEO_MODE_MAX +} dsi_video_mode_type_e; + +/** +* @brief panel init cmd transfer type +*/ +typedef enum +{ + DSI_CMD_TX_HS = 0, + DSI_CMD_TX_LP = 1 +} dsi_tx_cmd_tx_type_e; + +/** +* @brief angle of rotation +*/ +typedef enum +{ + VIDOE_ROT_ANGLE_0 = 0, /* 不旋转 */ + VIDOE_ROT_ANGLE_90 = 1, /* 旋转90度 */ + VIDOE_ROT_ANGLE_180 = 2, /* 旋转180度 */ + VIDOE_ROT_ANGLE_270 = 3, /* 转转270度 */ + VIDOE_ROT_ANGLE_MAX +} video_rotate_angle_e; + +/** +* @brief mipi rx lane swap +软件配置 PIN28&PIN27 PIN26&PIN25 PIN24&PIN23 PIN22&PIN21 PIN20&PIN19 +RX_LANE_SWAP_0123 D0P&D0N D1P&D1N CLKP&CLKN D2P&D2N D3P&D3N +RX_LANE_SWAP_3210 D3P&D3N D2P&D2N CLKP&CLKN D1P&D1N D0P&D0N +RX_LANE_SWAP_2103(default) D2P&D2N D1P&D1N CLKP&CLKN D0P&D0N D3P&D3N +RX_LANE_SWAP_3012 D3P&D3N D0P&D0N CLKP&CLKN D1P&D1N D2P&D2N +*/ +typedef enum +{ + RX_LANE_SWAP_0123 = 0x0, + RX_LANE_SWAP_3210 = 0x1, + RX_LANE_SWAP_2103 = 0x2, + RX_LANE_SWAP_DEFAULT_ORDER = 0x2, /* 默认原理图为2103顺序 */ + RX_LANE_SWAP_3012 = 0x3, + RX_LANE_SWAP_MAX +} dsi_rx_lane_swap_e; + +/** +* @brief mipi P/N lane swap flag +* eg: pn_swap = RX_LANE_0_PN_SWAP | RX_LANE_CLK_PN_SWAP; +* 表示 lane0 与 CLK 的P跟N交换，其他lane不变。 +* 注意这里的lane表示的是进行完lane swap的lane,如lane swap配置RX_LANE_SWAP_3012,再配置RX_LANE_0_PN_SWAP则表示PIN26&PIN25进行PN交换,由D0P&D0N变成D0N&D0P +*/ +typedef enum +{ + RX_LANE_0_PN_SWAP = 0x1, + RX_LANE_1_PN_SWAP = 0x2, + RX_LANE_2_PN_SWAP = 0x4, + RX_LANE_3_PN_SWAP = 0x8, + RX_LANE_CLK_PN_SWAP = 0x10 +} dsi_rx_lane_pn_swap_e; + +/** +* @brief error processing level +*/ +typedef enum +{ + ERR_HANDLE_NONE = 0, + ERR_HANDLE_L1 = 1, + ERR_HANDLE_L2 = 2, + ERR_HANDLE_L3 = 3, + ERR_HANDLE_MAX +} hal_err_handle_level_e; + +/** +* @brief flow control mode +*/ +typedef enum +{ + FC_AUTO_MODE = 0, /* 自动匹配模式,根据base info配置匹配1-4 */ + FC_V2V_NORMAL_MODE = 1, /* Video to Video 模式转换 */ + FC_V2C_NORMAL_MODE = 2, /* Video to Command 模式转换 */ + FC_C2V_NORMAL_MODE = 3, /* Command to Video 模式转换 */ + FC_C2C_NORMAL_MODE = 4, /* Command to Command 模式转换 */ + FC_PRO_MOTION_MODE = 6, /* 自适应帧率转换(LTPO模式) */ + FC_PRO_MOTION_MODE_2 = 5, /* 自适应帧率转换(LTPO模式) */ + FC_PRO_MOTION_WITH_PU_MODE = 7, /* 自适应帧率带PU */ + FC_V2V_AUTO_SYCN_MODE = 8, /* Video to Video 软件同步 */ + FC_V2V_DIRECT_MODE = 9, /* Video to Video 直通模式 */ + FC_MODE_MAX +} flow_control_mode_e; + +/** +* @brief transform 基本信息 +*/ +typedef struct +{ + uint16_t top; + uint16_t bottom; + uint16_t left; + uint16_t right; + bool enable; +} pic_edge_info_t; + +/** +* @brief transform 基本信息 +*/ +typedef struct +{ + uint32_t src_w; /* mipi rx 接收的 width */ + uint32_t src_h; /* mipi rx 接收的 height */ + uint32_t dst_w; /* mipi tx 发送的 width */ + uint32_t dst_h; /* mipi tx 发送的 height */ + dsi_video_frame_rate_e src_frate; /* mipi rx 接收的frame rate */ + dsi_video_data_mode_e src_mode; /* mipi rx 接收video 数据传输模式(video/cmd mode) */ + dsi_video_data_mode_e dst_mode; /* mipi tx 输出video 数据传输模式(video/cmd mode) */ + uint16_t pn_swap; /* mipi P/N swap标志位, rx可配置/tx暂不支持 */ +} dsi_base_trans_info_t; + +/** +* @brief transform 基本信息 +*/ +typedef struct +{ + bool mirror_en; /* 对video 做水平镜像标志位 */ + bool pu_optimize; /* 用于优化PU显示效果，默认为false;true:优化PU显示显示效果,高功耗;false:普通PU模式,低功耗 */ + video_rotate_angle_e rot_angle; /* 对video 做旋转的角度 */ + flow_control_mode_e flow_control_mode; /* 图像数据流控制模式 */ + pic_edge_info_t crop_info; /* 图像边缘裁剪配置 not impletmented */ + pic_edge_info_t blank_info; /* 图像边缘补黑配置 not impletmented */ + bool bw_optimize; /* 带宽自动检查,默认打开 */ + uint8_t pq_type; /* picture quality,参数为 pq_type_e */ +} dsi_base_extra_info_t; + +/** +* @brief ccm系数 +*/ +typedef struct +{ + uint32_t coef_c00; + uint32_t coef_c01; + uint32_t coef_c02; + uint32_t coef_c10; + uint32_t coef_c11; + uint32_t coef_c12; + uint32_t coef_c20; + uint32_t coef_c21; + uint32_t coef_c22; +} ccm_coef_t; + +/** +* @brief hight performan mode level +*/ +typedef enum +{ + HIGHT_PERFORMAN_NONE = 0, + HIGHT_PERFORMAN_L1 = 1, + HIGHT_PERFORMAN_L2 = 2, + HIGHT_PERFORMAN_MAX +} hight_performan_mode_e; + +/** +* @brief TX False color去伪彩参数结构体 +*/ +typedef struct +{ + uint16_t edgemedslope; + uint16_t desatslope; +} dsi_tx_fc_t; + +/** +* @brief TX 边缘增强参数结构体 +*/ +typedef struct +{ + bool y_enh_method; + uint8_t enhance_str; + uint16_t enhance_slope; + uint16_t boundscale_low; + uint16_t boundscale_high; +} dsi_tx_edge_enh_t; + +/** +* @brief TX 边缘检测参数结构体 +*/ +typedef struct +{ + uint8_t edge_thr; + bool use_large_kernel; +} dsi_tx_edge_dect_t; + +/** +* @brief TX bcsa 参数结构体 +*/ +typedef struct +{ + int8_t brightness; /* 亮度调整, 范围-127 - 127 */ + uint16_t contrast; /* 对比度调整,范围0 - 4095 */ + uint16_t saturation; /* 饱和度调整,范围0 - 4095 */ +} dsi_tx_bcs_t; + +/** +* @brief partial display 参数结构体 +*/ +typedef struct +{ + uint32_t st_line; /*部分显示起始行位置*/ + uint32_t st_col; /*部分显示起始列位置*/ + uint32_t end_line; /*部分显示结束行位置*/ + uint32_t end_col; /*部分显示结束列位置*/ + uint8_t value_r; /*部分显示背景色R值*/ + uint8_t value_g; /*部分显示背景色G值*/ + uint8_t value_b; /*部分显示背景色B值*/ +} dsi_tx_par_dis_t; + +#endif //__MIPI_DSI_COMMON_H__ diff --git a/src/common/tau_log.h b/src/common/tau_log.h new file mode 100644 index 0000000..15e94a8 --- /dev/null +++ b/src/common/tau_log.h @@ -0,0 +1,100 @@ +/******************************************************************************* +* +* +* File: tau_log.h +* Description log file +* Version V0.1 +* Date 2020-12-08 +* Author linyw +*******************************************************************************/ +#ifndef _TAU_LOG_H_ +#define _TAU_LOG_H_ + + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include +#include +#include +#include "ArmCM0.h" +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "tau_log" +#define LOG_CURREN_LEVEL kLOG_LEVEL_DBG /* 配置打印等级 TODO:每个模块可配置打印等级 */ +#define LOG_BUF_SIZE (256) /* 配置打印缓存的大小 */ + +/* + * Using the following three macros for conveniently logging. + */ +#define TAU_LOGD(format,...) \ + do { \ + tau_log_printf(kLOG_LEVEL_DBG, "[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + } while (0) + +#define TAU_LOGI(format,...) \ + do { \ + tau_log_printf(kLOG_LEVEL_INF, "[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + } while (0) + +#define TAU_LOGE(format,...) \ + do { \ + tau_log_printf(kLOG_LEVEL_ERR, "[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + } while (0) + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/** +* @brief log打印等级枚举 +* +*/ +typedef enum +{ + kLOG_LEVEL_DBG = 0, + kLOG_LEVEL_INF, + kLOG_LEVEL_ERR, + kLOG_LEVEL_NONE /* 不打印任何参数 */ +} log_level_e; + +/** +* @brief log打印端口枚举 +* +*/ +typedef enum +{ + LOG_PORT_UART0, /* 使用串口输出打印 */ + LOG_PORT_UART1, /* 使用串口输出打印 */ + LOG_PORT_SWD, /* 使用swd输出打印 */ + LOG_PORT_UNKNOWN +} log_port_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 初始化log系统 +* @param baud_rate 波特率 +* @param log_port 打印端口选择 +* @retval none +*/ +void tau_log_init(uint32_t baud_rate, log_port_e log_port); + +/** +* @brief 初始化log系统 +* @param baud_rate 波特率 +* @param log_port 打印端口选择 +* @retval none +*/ +void tau_log_printf(log_level_e log_lv, const char *fmt, ...); + +#endif diff --git a/src/common/tau_operations.h b/src/common/tau_operations.h new file mode 100644 index 0000000..c7b2ba3 --- /dev/null +++ b/src/common/tau_operations.h @@ -0,0 +1,229 @@ +/******************************************************************************* +* +* +* File: tau_operations.h +* Description 位操作与字节操作相关定义头文件 +* Version V0.1 +* Date 2020-09-07 +* Author lzy + *******************************************************************************/ +#ifndef __TAU_BYTEOPS_H +#define __TAU_BYTEOPS_H + +/** + * \name 通用位常数定义 + * @{ + */ + +/** \brief 长整数位数 */ +#ifndef TAU_BITS_PER_LONG +#define TAU_BITS_PER_LONG 32 +#endif + +/** \brief 字节位数 */ +#define TAU_BITS_PER_BYTE 8 + +/** @} */ + + +/******************************************************************************/ + +/** + * \name 通用位操作 + * @{ + */ + +/** \brief bit移位 + * TAU_BIT(2) is 0x4 + */ +#define TAU_BIT(bit) (1u << (bit)) + +/** \brief 值移位 + * TAU_SBF(0xFF, 8) is 0xff00 + */ +#define TAU_SBF(value, field) ((value) << (field)) + +/** \brief bit置位 + * TAU_BIT_SET(0, 8) is 0x100 + */ +#define TAU_BIT_SET(data, bit) ((data) |= TAU_BIT(bit)) + +/** \brief bit清零 + * TAU_BIT_CLR(0xFF, 2) is 0xfb + */ +#define TAU_BIT_CLR(data, bit) ((data) &= ~TAU_BIT(bit)) + +/** \brief bit置位, 根据 mask 指定的位 + * TAU_BIT_SET_MASK(0xF0F0, 0xF00) is 0xfff0 + */ +#define TAU_BIT_SET_MASK(data, mask) ((data) |= (mask)) + +/** \brief bit清零, 根据 mask 指定的位 + * TAU_BIT_CLR_MASK(0xFFFF, 0xFF00) is 0xff + */ +#define TAU_BIT_CLR_MASK(data, mask) ((data) &= ~(mask)) + +/** \brief bit翻转 + * TAU_BIT_TOGGLE(0xFFFF, 0) is 0xfffe + * TAU_BIT_TOGGLE(0x0000, 1) is 0x2 + */ +#define TAU_BIT_TOGGLE(data, bit) ((data) ^= TAU_BIT(bit)) + +/** \brief bit修改 + * TAU_BIT_MODIFY(0, 8, 1) is 0x100 + * TAU_BIT_MODIFY(0xFFFF, 1, 0) is 0xfffd + */ +#define TAU_BIT_MODIFY(data, bit, value) \ + ((value) ? TAU_BIT_SET(data, bit) : TAU_BIT_CLR(data, bit)) + +/** \brief 测试bit是否置位 + * TAU_BIT_ISSET(0xF0F1, 1) is 0 + * TAU_BIT_ISSET(0xF0F2, 1) is 2 + */ +#define TAU_BIT_ISSET(data, bit) ((data) & TAU_BIT(bit)) + +/** \brief 获取bit值 + * TAU_BIT_GET(0xF0F1, 1) is 0 + * TAU_BIT_GET(0xF0F2, 1) is 1 + */ +#define TAU_BIT_GET(data, bit) (TAU_BIT_ISSET(data, bit) ? 1 : 0) + +/** \brief 检测bit值 + * TAU_BIT_CHECK(0xF5FF, 4) is 1 + */ +#define TAU_BIT_CHECK(data, bit) \ + (((data) & TAU_BIT(bit)) ? 1 : 0) + +/** \brief 获取 n bits 掩码值 + * TAU_BITS_MASK(2) is 0x3 + */ +#define TAU_BITS_MASK(n) (~((~0u) << (n))) + +/** \brief 获取位段值 + * TAU_BITS_GET(0xF5FF, 0x0F00, 8) is 0x5 + */ +#define TAU_BITS_GET(data, mask, pos) \ + (((data) & (mask)) >> (pos)) + +/** \brief 获取位段值 + * TAU_BITS_CHECK(0xF5FF, 0x0F00) is 1 + */ +#define TAU_BITS_CHECK(data, mask) \ + (((data) & (mask)) ? 1 : 0) + +/** \brief 修改位段值 + * TAU_BITS_MODIFY(0xF5FF, 0x0FF0, 0x8A0) is 0xF8AF +*/ +#define TAU_BITS_MODIFY(data, clear_mask, set_mask) \ + (data) = (((data) & (~(clear_mask))) | (set_mask)) + +/** \brief 设置位段值 + * TAU_WRITE_REG32(0x05FF, 0xFFFA) is 0xFFFA +*/ +#define TAU_WRITE_REG32(data, value) ((data) = (value)) + +/** \brief 设置位段值 + * TAU_RAED_REG32(0x05FF) is 0x05FF +*/ +#define TAU_RAED_REG32(data) (data) + + +/** @} */ + +/******************************************************************************/ + +/** + * \brief 取2-byte整数的高位byte + * + * \par 示例 + * \code + * uint16_t a = 0x1234; + * uint16_t b; + * + * b = TAU_MSB(a); //b=0x12 + * \endcode + */ +#define TAU_MSB(x) (((x) >> 8) & 0xff) + +/** + * \brief 取2-byte整数的低位byte + * + * \par 示例 + * \code + * uint16_t a = 0x1234; + * uint16_t b; + * + * b = TAU_LSB(a); //b=0x34 + * \endcode + */ +#define TAU_LSB(x) ((x) & 0xff) + +/** + * \brief 取2-word整数的高位word + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_MSW(a); //b=0x1234 + * \endcode + */ +#define TAU_MSW(x) (((x) >> 16) & 0xffff) + +/** + * \brief 取2-word整数的低位word + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_LSW(a); //b=0x5678 + * \endcode + */ +#define TAU_LSW(x) ((x) & 0xffff) + +/** + * \brief 交换32-bit整数的高位word和低位word + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_WORDSWAP(a); //b=0x56781234 + * \endcode + */ +#define TAU_WORDSWAP(x) (TAU_MSW(x) | (TAU_LSW(x) << 16)) + +/** + * \brief 交换32-bit整数的字节顺序 + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_LONGSWAP(a); //b=0x78563412 + * \endcode + */ +#define TAU_LONGSWAP(x) ((TAU_LLSB(x) << 24) | \ + (TAU_LNLSB(x) << 16) | \ + (TAU_LNMSB(x) << 8) | \ + (TAU_LMSB(x))) + +#define TAU_LLSB(x) ((x) & 0xff) /**< \brief 取32bit整数第1个字节 */ +#define TAU_LNLSB(x) (((x) >> 8) & 0xff) /**< \brief 取32bit整数第2个字节 */ +#define TAU_LNMSB(x) (((x) >> 16) & 0xff) /**< \brief 取32bit整数第3个字节 */ +#define TAU_LMSB(x) (((x) >> 24) & 0xff) /**< \brief 取32bit整数第4个字节 */ +#define TAU_LNSB(x,n) (((x) >> ((n) * 8) ) & 0xff) /**< \brief 取32bit整数第n个字节 ,参数 0 - 3*/ + +/** + * @} + */ + +#endif /* __TAU_BYTEOPS_H */ + +/* end of file */ + diff --git a/src/sdk/CVWL468/lib/CVWL468.lib b/src/sdk/CVWL468/lib/CVWL468.lib new file mode 100644 index 0000000..db7f8bc Binary files /dev/null and b/src/sdk/CVWL468/lib/CVWL468.lib differ diff --git a/src/sdk/CVWL668/lib/CVWL668.lib b/src/sdk/CVWL668/lib/CVWL668.lib new file mode 100644 index 0000000..8224cc3 Binary files /dev/null and b/src/sdk/CVWL668/lib/CVWL668.lib differ diff --git a/src/sdk/CVWL668T/lib/CVWL668T.lib b/src/sdk/CVWL668T/lib/CVWL668T.lib new file mode 100644 index 0000000..e27af89 Binary files /dev/null and b/src/sdk/CVWL668T/lib/CVWL668T.lib differ diff --git a/src/sdk/include/M0/ArmCM0.h b/src/sdk/include/M0/ArmCM0.h new file mode 100644 index 0000000..5cf8fc1 --- /dev/null +++ b/src/sdk/include/M0/ArmCM0.h @@ -0,0 +1,184 @@ +/**************************************************************************//** + * @file ARMCM0.h + * @brief CMSIS Core Peripheral Access Layer Header File for + * ARMCM0 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ARMCM0_H +#define ARMCM0_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ + /* ------------------- Processor Exceptions Numbers ----------------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + + /* ------------------- Processor Interrupt Numbers ------------------------------ */ + VIDC_IRQn = 0, + LCDC_IRQn = 1, + MIPI_RX_IRQn = 2, + MIPI_TX_IRQn = 3, + MEMC_IRQn = 4, + VPRE_IRQn = 5, + FLSCTRL_IRQn = 6, + DMA_IRQn = 7, + TIMER0_IRQn = 8, + TIMER1_IRQn = 9, + TIMER2_IRQn = 10, + TIMER3_IRQn = 11, + WDG_IRQn = 12, + UART_IRQn = 13, + I2C0_IRQn = 14, + I2C1_IRQn = 15, + SPIS_IRQn = 16, + SPIM_IRQn = 17, + VPRE1_IRQn = 18, + I2C2_IRQn = 19, + OTP_IRQn = 20, + SWIRE_IRQn = 21, + PVD_IRQn = 22, + AP_NRESET_IRQn = 23, + EXTI_INT0_IRQn = 24, + EXTI_INT1_IRQn = 25, + EXTI_INT2_IRQn = 26, + EXTI_INT3_IRQn = 27, + EXTI_INT4_IRQn = 28, + EXTI_INT5_IRQn = 29, + EXTI_INT6_IRQn = 30, + EXTI_INT7_IRQn = 31 + /* Interrupts 10 .. 31 are left out */ +} IRQn_Type; + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------- Start of section using anonymous unions and disabling warnings ------- */ +#if defined (__CC_ARM) +#pragma push +#pragma anon_unions +#elif defined (__ICCARM__) +#pragma language=extended +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Wc11-extensions" +#pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined (__GNUC__) +/* anonymous unions are enabled by default */ +#elif defined (__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined (__TASKING__) +#pragma warning 586 +#elif defined (__CSMC__) +/* anonymous unions are enabled by default */ +#else +#warning Not supported compiler type +#endif + +/* -------- Configuration of Core Peripherals ----------------------------------- */ +#define __CM0_REV 0x0000U /* Core revision r0p0 */ +#define __MPU_PRESENT 0U /* no MPU present */ +#define __VTOR_PRESENT 0U /* no VTOR present */ +#define __NVIC_PRIO_BITS 2U /* Number of Bits used for Priority Levels */ //20220228 +#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */ + +#define __FPU_PRESENT 0U /* Set to 1 if FPU is present */ +#define __FPU_DP 0U /* single precision FPU */ +#define __ICACHE_PRESENT 0U /* Set to 1 if I-CACHE is present */ +#define __DCACHE_PRESENT 0U /* Set to 1 if D-CACHE is present */ +#define __DSP_PRESENT 0U /* no DSP extension present */ + +#include "core_cm0.h" /* Processor and core peripherals */ +#include "system_ARMCM0.h" /* System Header */ + +/* -------- End of section using anonymous unions and disabling warnings -------- */ +#if defined (__CC_ARM) +#pragma pop +#elif defined (__ICCARM__) +/* leave anonymous unions enabled */ +#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) +#pragma clang diagnostic pop +#elif defined (__GNUC__) +/* anonymous unions are enabled by default */ +#elif defined (__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined (__TASKING__) +#pragma warning restore +#elif defined (__CSMC__) +/* anonymous unions are enabled by default */ +#else +#warning Not supported compiler type +#endif + +/* In HS mode and when the DMA is used, all variables and data structures dealing + with the DMA during the transaction process should be 4-bytes aligned */ +#define DMA_WORD_ALIGN_EN +#ifdef DMA_WORD_ALIGN_EN +#if defined (__GNUC__) /* GNU Compiler */ +#define __ALIGN_END __attribute__ ((aligned (4))) +#define __ALIGN_BEGIN +#else +#define __ALIGN_END +#if defined (__CC_ARM) /* ARM Compiler */ +#define __ALIGN_BEGIN __align(4) +#elif defined (__ICCARM__) /* IAR Compiler */ +#define __ALIGN_BEGIN +#elif defined (__TASKING__) /* TASKING Compiler */ +#define __ALIGN_BEGIN __align(4) +#endif /* __CC_ARM */ +#endif /* __GNUC__ */ +#else + +#define __ALIGN_BEGIN +#define __ALIGN_END + +#define __ALIGN_END_1 __attribute__ ((aligned (1))) +#endif /* DMA_WORD_ALIGN_EN */ + +/* __packed keyword used to decrease the data type alignment to 1-byte */ +#if defined (__CC_ARM) /* ARM Compiler */ +#define __packed __packed +#elif defined (__ICCARM__) /* IAR Compiler */ +#define __packed __packed +#elif defined ( __GNUC__ ) /* GNU Compiler */ +#define __packed __attribute__ ((__packed__)) +#define __weak __attribute__((weak)) +#elif defined (__TASKING__) /* TASKING Compiler */ +#define __packed __unaligned +#endif /* __CC_ARM */ + +#ifdef __cplusplus +} +#endif + +#endif /* ARMCM0_H */ diff --git a/src/sdk/include/hal_crc.h b/src/sdk/include/hal_crc.h new file mode 100644 index 0000000..41865cc --- /dev/null +++ b/src/sdk/include/hal_crc.h @@ -0,0 +1,114 @@ +/******************************************************************************* +* +* +* File: hal_crc.h +* Description: hal crc ͷ�ļ� +* Version: V0.1 +* Date: 2023-07-27 +* Author: zzf + *******************************************************************************/ +#ifndef __HAL_CRC_H +#define __HAL_CRC_H + +#ifdef __cplusplus +extern "C" { +#endif + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Exported constant and macro definitions +*******************************************************************************/ + +/******************************************************************************* +* 3.Exported structures, unions and enumerations +*******************************************************************************/ +/** +* @brief crc calculation unit structure +*/ +typedef struct +{ + uint32_t polynomial_value; + uint32_t initial_seed_value; + crc_protocol_type_e crc_protocol; + crc_fxor_function_e crc_foxr; + crc_reversal_type_e crc_reversal_in; + crc_reversal_type_e crc_reversal_out; +} crc_ctrl_handle_t; + +/** +* @brief crc dma callback function define +*/ +typedef void (*crc_dma_callback)(uint32_t crc_result); + +/******************************************************************************* +* 4.Exported variable declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Exported function declarations +*******************************************************************************/ +/** +* @brief The initialization for CRC calculation unit +* @param crc_ctrl_handle: configuration parameters in initialization +* @retval true or false +**/ +bool hal_crc_init(const crc_ctrl_handle_t *crc_ctrl_handle); + +/** +* @brief The initialization for CRC calculation unit +* @param None +* @retval true or false +**/ +bool hal_crc_deinit(void); + +/** +* @brief Reset CRC calculation unit and DR to CRCR_INIT value +* @param None +* @retval true or false +**/ +bool hal_crc_reset(void); + +/** +* @brief Get the result of CRC calculation uint +* @param buffer_address: 16-bit or 32-bit crc calculate buffer address +* @param buffer_length: the length of buffer +* @retval 32-bit crc calculate result +**/ +uint32_t hal_crc_cal(const void *buffer_address, uint32_t buffer_length); + +/** +* @brief initial DMA transfer +* @param crc_ctrl_handle: configuration parameters in initialization +* @param buffer_address: 16-bit or 32-bit crc calculate buffer address +* @param buffer_length: the length of buffer(0~65535) +* @param cb_func: dma interrupt callback function to get the result of crc calculation +* @retval true or false +**/ +bool hal_crc_dma_init(const crc_ctrl_handle_t *crc_ctrl_handle, crc_dma_callback cb_func, const void *buffer_address, uint16_t buffer_length); + +/** +* @brief deinitial DMA transfer +* @param None +* @retval true or false +**/ +bool hal_crc_dma_deinit(void); + +/** +* @brief start DMA transfer +* @param None +* @retval true or false +**/ +bool hal_crc_dma_start(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __HAL_CRC_H */ + +/***************** (C) COPYRIGHT ISP Systems (R) END OF FILE ******************/ diff --git a/src/sdk/include/hal_dsi_rx_ctrl.h b/src/sdk/include/hal_dsi_rx_ctrl.h new file mode 100644 index 0000000..6a5014a --- /dev/null +++ b/src/sdk/include/hal_dsi_rx_ctrl.h @@ -0,0 +1,523 @@ +/******************************************************************************* +* +* +* File: hal_dsi_rx_ctrl.h +* Description: hal mipi dsi rx path control 头文件 +* Version: V0.1 +* Date: 2021-04-06 +* Author: lzy + *******************************************************************************/ +#ifndef __HAL_DSI_RX_CTRL_H__ +#define __HAL_DSI_RX_CTRL_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_common.h" +#include "tau_log.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#define RX_DCS_QUEUE_MAX_SIZE 20 /* DCS存储队列长度 */ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef struct hal_dcs_execute_entry_t hal_dcs_execute_entry_t; + +typedef struct hal_dcs_packet_t hal_dcs_packet_t; + +typedef struct hal_dsi_rx_ctrl_handle_t hal_dsi_rx_ctrl_handle_t; + +/* DCS CMD 回调函数, 注册进cus_dcs_entry_table里, 匹配对应的DCS 后回调*/ +typedef bool (*hal_dsi_rx_ctrl_dcs_execute)(hal_dsi_rx_ctrl_handle_t *rx_handle, hal_dcs_packet_t *dcs_packet); + +/* AP 读cmd 回调, 需要快速回CMD 时可注册, 为NULL 时DSC 读指令与写指令经过parse后由cus_dcs_entry_table回调 */ +typedef bool (*hal_dsi_rx_ctrl_read_entry)(uint8_t data_type, uint8_t dcs_cmd, uint8_t param); + +/* AP PPS 更新回调,参数为PPS 以及从PPS 里解析出来的picture width/height, 用于分辨率切换, 不注册该接口时内部处理PPS */ +typedef bool (*hal_dsi_rx_ctrl_pps_entry)(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height); + +/** +* @brief hal_rx_event_e select +*/ +typedef enum hal_rx_event_e +{ + HAL_RX_FS_EVENT = 0x1, /* Frame start event */ + HAL_RX_LINE_EVENT = 0x2, /* Frame receive line event */ + HAL_RX_END_EVENT = 0x4, /* Frame end event */ +} hal_rx_event_e; + +/** +* @brief rx pq filter index +* 默认使用linear,特殊场景使用OPT filter +* RX_FLT_OPT_0最模糊,边缘最平滑,index越大越清晰,边缘锯齿会加重 +*/ +typedef enum +{ + RX_FLT_OPT_0 = 0, + RX_FLT_OPT_1 = 1, + RX_FLT_OPT_2 = 2, + RX_FLT_OPT_3 = 3, + RX_FLT_OPT_4 = 4, + RX_FLT_OPT_5 = 5, + RX_FLT_OPT_6 = 6, + RX_FLT_OPT_7 = 7, + RX_FLT_OPT_8 = 8, + RX_FLT_OPT_9 = 9, + RX_FLT_OPT_10 = 10, + RX_FLT_LINEAR = 11, + RX_FLT_MAX +} hal_dsi_rx_pq_filter_e; + +/* RX debug 回调函数,用于获取frame start 等功能debug */ +typedef void (*hal_dsi_rx_ctrl_event_entry)(hal_rx_event_e event, void *data); + +/** +* @brief dsi rx ctrl handle struct +*/ +typedef struct hal_dsi_rx_ctrl_handle_t +{ + dsi_base_trans_info_t base_info; /* mipi video 转换基本信息 */ + dsi_base_extra_info_t extra_info; /* 新增旋转、镜像配置 */ + dsi_color_code_e rx_color_mode; /* 输入color mode */ + dsi_lane_nume_e rx_lanes; /* mipi data lane */ + dsi_video_mode_type_e rx_nonburst_models; /* transmission packet sequences */ + bool compress_en; /* DSC 压缩标志 */ + uint32_t rx_hsclk_rate; /* mipi 高速信号lane rate */ + uint8_t rx_dsc_pps[DSC_PPS_SIZE]; /* DSC 压缩PPS参数 */ + const hal_dcs_execute_entry_t *cus_dcs_entry_table; /* DCS处理函数列表 */ + hal_dsi_rx_ctrl_read_entry rx_dcs_read_entry; /* Host读指令数据函数,为NULL时由rx_dcs_queue注册cmd处理 */ + hal_dsi_rx_ctrl_pps_entry pps_update_entry; /* PPS Update 时回调函数,用于分辨率切换更新PPS,为NULL时内部处理 */ + bool used; /* handle使用标志位 */ + hal_err_handle_level_e err_handler_level; /* RX接收错误的时候对模块做reset等级, 等级越高reset模块越多 */ + uint8_t rx_strength; /* 用于调节RX信号强度，仅适用于开启内阻校准模式，档位0~7，默认3 */ + hight_performan_mode_e hight_performan_mode; /* 高性能模式等级,参考hight_performan_mode_e */ + dsi_rx_lane_swap_e rx_lane_swap; /* lane swap default order is 2103*/ + hal_dsi_rx_pq_filter_e rx_pq_index; /* 画质调整滤波器,默认为linear最优效果,特殊场景使用OPT filter */ +} hal_dsi_rx_ctrl_handle_t; + +/** +* @brief DCS command execute entry +*/ +typedef struct hal_dcs_execute_entry_t +{ + uint32_t dcs_command; /* DCS command */ + hal_dsi_rx_ctrl_dcs_execute execute_func; /* command 对应处理函数 */ + bool immediately_func; /* 执行机制:true-在中断里立即执行,false-加入DCS队列异步执行 */ +} hal_dcs_execute_entry_t; + +/** +* @brief 存储 DCS packet 结构体 +*/ +typedef struct hal_dcs_packet_t +{ + uint32_t data_type; /* data type */ + uint32_t dcs_command; /* dcs command */ + uint32_t param_length; /* dcs param length */ + uint8_t *packet_param; /* dcs param */ + uint16_t crc_data; /* dcs crc */ + const hal_dcs_execute_entry_t *dcs_execute_entry; /* dcs packet 处理函数入口*/ +} hal_dcs_packet_t; + +/** +* @brief video mode 下 RX pattern参数结构体 +*/ +typedef struct +{ + uint32_t ipi_pg_hsa; + uint32_t ipi_pg_hbp; + uint32_t ipi_pg_hfp; + uint32_t ipi_pg_vsa; + uint32_t ipi_pg_vbp; + uint32_t ipi_pg_vfp; + uint32_t frame_rate; +} hal_dsi_rx_ipi_pg_t; + + +/** +* @brief dcs command filter select +*/ +typedef enum +{ + HAL_RX_DCS_FILTER_0 = 0x0, + HAL_RX_DCS_FILTER_1 = 0x1, + HAL_RX_DCS_FILTER_2 = 0x2, + HAL_RX_DCS_FILTER_3 = 0x3, + HAL_RX_DCS_FILTER_4 = 0x4, + HAL_RX_DCS_FILTER_5 = 0x5, + HAL_RX_DCS_FILTER_6 = 0x6, + HAL_RX_DCS_FILTER_7 = 0x7, + HAL_RX_DCS_FILTER_8 = 0x8, + HAL_RX_DCS_FILTER_9 = 0x9, + HAL_RX_DCS_FILTER_A = 0xA, + HAL_RX_DCS_FILTER_B = 0xB, + HAL_RX_DCS_FILTER_MAX +} hal_rx_dcs_filter_sel_e; + + +/** +* @brief dcs command filter select +*/ +typedef enum +{ + HAL_RX_QRESP_CODE0 = 0, + HAL_RX_QRESP_CODE1 = 1, + HAL_RX_QRESP_CODE2 = 2, + HAL_RX_QRESP_CODE3 = 3, + HAL_RX_QRESP_CODE4 = 4, + HAL_RX_QRESP_CODE5 = 5, + HAL_RX_QRESP_CODE6 = 6, + HAL_RX_QRESP_CODE7 = 7, + HAL_RX_QRESP_MAX +} hal_rx_dcs_qresp_e; + +/** +* @brief pentile source color format +*/ +typedef enum +{ + PENTILE_SRC_FORMAT_RGB = 0x0, + PENTILE_SRC_FORMAT_BGR = 0x1, + PENTILE_SRC_FORMAT_RGBG_BGRG = 0x8, + PENTILE_SRC_FORMAT_GBGR_GRGB = 0x9, + PENTILE_SRC_FORMAT_BGRG_RGBG = 0xA, + PENTILE_SRC_FORMAT_GRGB_GBGR = 0xB, + PENTILE_SRC_FORMAT_RGBG_RGBG = 0xC, + PENTILE_SRC_FORMAT_GBGR_GBGR = 0xD, + PENTILE_SRC_FORMAT_BGRG_BGRG = 0xE, + PENTILE_SRC_FORMAT_GRGB_GRGB = 0xF, + PENTILE_SRC_FORMAT_MAX +} pentile_src_format_e; + +/** +* @brief 设置RX CLK +*/ +typedef enum +{ + RX_CLK_100M = 0, + RX_CLK_150M = 1, + RX_CLK_200M = 2, + RX_CLK_300M = 3, + RX_CLK_40M = 4, + RX_CLK_80M = 5, + RX_CLK_MAX +} hal_rx_clk_e; + +/** +* @brief pq_type_e select +*/ +typedef enum +{ + PQ_TYPE_DEFAULT = 0x0, + PQ_TYPE_LIMIT = 0x1, + PQ_TYPE_MAX +} pq_type_e; + +/** +* @brief 线的粗细 +*/ +typedef enum +{ + LINE_WEIGHT_FINE = 0, + LINE_WEIGHT_MEDIUM = 1, + LINE_WEIGHT_BOLD = 2, + LINE_WEIGHT_MAX +} line_weight_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief 创建dsi rx ctrl handle (释放时需调用hal_dsi_rx_ctrl_release_handle) +* @param none +* @retval dsi rx handle +*/ +hal_dsi_rx_ctrl_handle_t *hal_dsi_rx_ctrl_create_handle(void); + +/** +* @brief 释放dsi rx ctrl handle +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_release_handle(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 设置rx ctrl handle 里的 PPS 参数 +* @param rx_ctrl_handle: dsi rx handle +* @param pps: pps 参数 +* @param pps_size: pps 参数长度 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_pre_init_pps(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t pps[], uint32_t pps_size); + +/** +* @brief 初始化dsi rx 模块 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_init(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief dsi rx 模块去初始化 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_deinit(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 启动dsi rx +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_start(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 重新配置dsi rx参数并恢复状态 (debug使用, 重新配置rx_ctrl_handle参数后调用该接口重启) +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_restart(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 停止dsi rx +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_stop(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 手动设置RX clk,一般RX CLK 由底层自动计算,用于特殊video mode场景出现FIFO FULL情况调试使用 +* @param rxbr_clk: rx clk, 需要大于hs_lane_rate/8 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_rx_clk(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, hal_rx_clk_e rxbr_clk); + +/** +* @brief 发送 MIPI HOST的读响应 CMD +* @param rx_ctrl_handle: dsi rx handle +* @param data_type: data type +* @param vc: virtual channel +* @param cmd_count: ack command 的长度 +* @param ... : 需要发送的command(数量与cmd_count 配置一致) +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_send_ack_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, dsi_ack_data_type_e data_type, dsi_virtual_channel_e vc, uint8_t cmd_count, ...); + +/** +* @brief 使用数组方式回复短包,与hal_dsi_rx_ctrl_send_ack_cmd功能一致 +* @param rx_ctrl_handle: dsi rx handle +* @param data_size: 数组长度,固定为4 +* @param data: 回复cmd数据,数据排列有严格规定: +* data[0]:DI(data type) +* data[1]:data 0 +* data[2]:data 1 +* data[3]:内部pkt type,短包固定为0 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_ack_short_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t data_size, uint8_t data[]); + +/** +* @brief 使用数组方式回复长包,与hal_dsi_rx_ctrl_send_ack_cmd功能一致 +* @param rx_ctrl_handle: dsi rx handle +* @param data_size: 数组长度,为Word Count + header长度 (header固定为4) +* @param data: 回复cmd数据,数据排列有严格规定: +* data[0]:DI(data type) +* data[1]:wc 0 (Word Count 低八位) +* data[2]:wc 1 (Word Count 高八位) +* data[3]:内部pkt type,长包固定为1 +* data[N]:长包数据 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_ack_long_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t data_size, uint8_t data[]); + +/** +* @brief 异步处理DSC接口,执行cus_dcs_entry_table里对应DCS immediately_func为false的函数 +* @param rx_ctrl_handle: dsi rx handle +* @retval true - 正常处理1个DSC , false - 无DSC 处理 +*/ +bool hal_dsi_rx_ctrl_dcs_async_handler(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 使用硬件filter丢弃不需要处理的CMD,避免MCU资源被无效CMD占用 +* @param rx_ctrl_handle: dsi rx handle +* @param filter_number: filter 编号(0-7) +* @param cmd_start: 需要丢弃command code起始位 +* @param cmd_end: 需要丢弃command code终止位 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_hw_cmd_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, + hal_rx_dcs_filter_sel_e filter_number, + uint32_t cmd_start, uint32_t cmd_end); + +/** +* @brief 使用内置pattern代替mipi输入(用于测试) +* @param rx_ctrl_handle: dsi rx handle +* @param pg_orient: pattern 方向(0:Vertical mode ; 1:Horizontal mode) +* @param enable: 开启/关闭pattern +* @param frame_rate: pattern 帧率 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_enable_test_pattern(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t pg_orient, bool enable, int frame_rate); + + +/** +* @brief 获取AP 配置 BTA回复数据最大size +* @param rx_ctrl_handle: dsi rx handle +* @retval 返回数据大小 +*/ +uint32_t hal_dsi_rx_ctrl_get_max_ret_size(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 获取AP Compression Mode Command配置,默认为0,谨慎使用 +* @param rx_ctrl_handle: dsi rx handle +* @retval AP 配置compressen_en +*/ +bool hal_dsi_rx_ctrl_get_compressen_en(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 输入分辨率切换接口 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_toggle_resolution(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 配置 RX escape clk +* @param rx_ctrl_handle: dsi rx handle +* @param esc_clk: escape clk 单位Hz,10000000时回CMD为10Mhz +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_esc_clk(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t esc_clk); + +/** +* @brief 自动计算并配置硬件filter +* @param rx_ctrl_handle: dsi rx handle +* @param enable: 启动/关闭 硬件filter +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_auto_hw_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, bool enable); + +/* +* @brief 输入帧率修改(针对video mode) +* @param rx_ctrl_handle: dsi rx handle +* @param frame_rate：frame rate +*/ +bool hal_dsi_rx_ctrl_toggle_input_frame_rate(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, dsi_video_frame_rate_e frame_rate); + +/* +* @brief 注册写命令的回调函数,用于特殊命令序列时写命令的处理. + 可配合hal_dsi_rx_ctrl_set_auto_hw_filter关闭hw filter用于获取所有软件CMD +* @param rx_ctrl_handle: dsi rx handle +* @param 写命令处理函数 +* @retval none +*/ +void hal_dsi_rx_ctrl_register_write_cmd_entry(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, hal_dsi_rx_ctrl_dcs_execute execute_func); + +/** +* @brief 配置硬件自动回复命令 +* 最大回复长度64,AP需要配置set_max_return_size后并且对比一直才会自动回复,不需要软件再参与 +* 应用于所有回复固定数据的场景 +* @param RXBR: registers struct +* @param qresp_number: qresp 编号(0-7) +* @param data_type: 需要回复的读命令的datatype +* @param cmd_code: 需要回复的读命令 +* @param cmd_count: 需要回复的命令的大小,长包最大size为64,与set_max_return_size一致才会回复 +* @param ...: 需要回复的参数 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_auto_ack(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, hal_rx_dcs_qresp_e qresp_number, dsi_ack_data_type_e data_type, uint32_t cmd_code, uint8_t cmd_count, ...); + +/* +* @brief 初始化画点模式 +* @param rx_ctrl_handle: dsi rx handle +* @param draw_en: 画点模式使能 +* @param pxl_init_en: 是否对全屏数据赋值,true:使用init_value赋值,false:使用上一帧数据作为初始值 +* @param color_mode: 画点模式数据源格式见dsi_color_code_e +* @param init_value: 全屏初始化数据,bit[23:16]--R，bit[15:8]--G，bit[7:0]--B +* @retval none +*/ +void hal_dsi_rx_ctrl_draw_mode_init(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, bool draw_en, bool pxl_init_en, dsi_color_code_e color_mode, uint32_t init_value); + +/* +* @brief 配置像素颜色 +* @param rx_ctrl_handle: dsi rx handle +* @param x: 像素点的x 坐标 +* @param y: 像素点的y 坐标 +* @param red_data: 像素点R分量 +* @param green_data: 像素点G分量 +* @param blue_data: 像素点B分量 +* @retval none +*/ +void hal_dsi_rx_ctrl_set_pixel_data(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, int x, int y, uint8_t red_data, uint8_t green_data, uint8_t blue_data); + + +/** +* @brief video mode下强制将数据设置为特定的color mode,具体type见dsi_color_code_e +* @param rx_ctrl_handle: dsi rx handle +* @param enable: 使能强制数据模式 +* @param frc_vid_code: 强制的数据格式 +* @retval none +*/ +void hal_dsi_rx_ctrl_force_video_crtl(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, bool enable, dsi_color_code_e frc_vid_code); + +/** +* @brief 注册RX 事件回调函数 +* @param rx_ctrl_handle: dsi rx handle +* @param event_cb: 回调函数 +* @param event_mask: 接收事件掩码,见hal_rx_event_e(eg:HAL_RX_FS_EVENT|HAL_RX_LINE_EVENT) +* @param enable: 事件回调开关 +* @param user_data: 预留扩展参数,不同事件事件配置不同参数 +* @retval none +*/ +void hal_dsi_rx_ctrl_register_callback(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, hal_dsi_rx_ctrl_event_entry event_cb, uint32_t event_mask, bool enable, void *user_data); + +/** +* @brief 配置是否打开长包CRC检查 +* @param rx_ctrl_handle: dsi rx handle +* @param enable: 开启或者屏蔽CRC检测 +* @retval none +*/ +void hal_dsi_rx_ctrl_set_check_crc(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, bool enable); + +/** +* @brief 配置rx log 等级 +* @param rx_drv_level: rx log等级见枚举log_level_e +* @retval none +*/ +void hal_dsi_rx_ctrl_set_log_level(log_level_e rx_drv_level); + +/** + * @brief 带颜色画线函数(直线、斜线) + * @param x1,y1 起点坐标 + * @param x2,y2 终点坐标 + * @param red_data: 像素点R分量 + * @param green_data: 像素点G分量 + * @param blue_data: 像素点B分量 + * @param line_weight: 线粗 + * @return none + */ +void hal_dsi_rx_ctrl_draw_line(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint8_t red_data, uint8_t green_data, uint8_t blue_data, line_weight_e line_weight); + +/** + * @brief 设置需要获取pixel的坐标 + * @param cap_x: 抓取pixel的x坐标 + * @param cap_y: 抓取pixel的y坐标 + * @return none + */ +void hal_dsi_rx_ctrl_set_cap_pixel_pos(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint16_t x0, uint16_t y0); + +/** + * @brief 获取指定坐标颜色,必须先设置获取颜色的坐标 + * @return 返回指定坐标颜色 + */ +uint32_t hal_dsi_rx_ctrl_get_cap_pixel_color(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +#endif //__HAL_DSI_RX_CTRL_H__ diff --git a/src/sdk/include/hal_dsi_tx_ctrl.h b/src/sdk/include/hal_dsi_tx_ctrl.h new file mode 100644 index 0000000..1f4bdf3 --- /dev/null +++ b/src/sdk/include/hal_dsi_tx_ctrl.h @@ -0,0 +1,349 @@ +/******************************************************************************* +* +* +* File: hal_dsi_tx_ctrl.h +* Description: hal mipi dsi tx 头文件 +* Version: V0.1 +* Date: 2021-04-23 +* Author: jaya + *******************************************************************************/ +#ifndef __HAL_DSI_TX_CTRL_H__ +#define __HAL_DSI_TX_CTRL_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_device_datatype.h" +#include "hal_gpio.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/** +* @brief blank display configure type +*/ +typedef struct +{ + uint16_t st_col; /* 补黑区域起始坐标，RGBG格式以子像素计数*/ + uint16_t width; /* 补黑区域宽度，RGBG格式以子像素计数*/ + uint8_t remap_en; /* 补黑区域是否参与子像素重排*/ + uint8_t blank_en; /* 补黑区域开关*/ +} blank_disp_t; + +/** +* @brief pentile remap rule configuration type in rom code +*/ +typedef uint8_t (remap_rule_t)[24]; + +/** +* @brief 客制化MIPI TX参数结构体 +*/ +typedef struct +{ + bool pentile_enable; /* 是否pentile输出*/ + bool pentile_reverse_en; /* 是否打开芯片本身行翻转功能*/ + bool pentile_24b; /* 是否以RGB IC搭配RGBG玻璃*/ + uint32_t rgb_hact; /* RGB IC搭配RGBG玻璃使用时IC水平方向分辨率*/ + remap_rule_t *remapl_rule; /* RGB IC搭配RGBG玻璃使用时remap规则1*/ + remap_rule_t *remapr_rule; /* RGB IC搭配RGBG玻璃使用时remap规则2*/ + blank_disp_t blank_info0; /* 补黑参数配置信息*/ + blank_disp_t blank_info1; /* 补黑参数配置信息*/ +} dsi_tx_pent_info_t; + +/** +* @brief MIPI TX clk/data lane是否自动进LP控制枚举类型 +* 不同driver IC spec不同,对Lane rate范围要求也不同 +* 无法点亮时可尝试替换不同的模式 +*/ +typedef enum +{ + ALWAYS_HS = 0, // vid输出默认此模式，仅VSA自动进LP; cmd输出暂不支持此模式 + ONLY_DATA_LANE_AUTO_LP = 1, // cmd输出默认此模式，data lane行间自动进LP， clk保持HS + CLK_DATA_LANE_AUTO_LP = 2, // data/clk lane行间自动进LP +} dsi_tx_lane_lp_e; + +/** +* @brief tx pq filter index +* 默认使用OPT +*/ +typedef enum +{ + TX_FLT_OPT = 0, + TX_FLT_LINEAR = 1, + TX_FLT_MAX +} hal_dsi_tx_pq_filter_e; + +/** +* @brief 客制化MIPI TX参数结构体 +*/ +typedef struct +{ + dsi_base_trans_info_t base_info; /* mipi video 转换基本信息 */ + uint32_t dpi_vsa; /* DPI VSA*/ + uint32_t dpi_vbp; /* DPI VBP*/ + uint32_t dpi_vfp; /* DPI VFP*/ + uint32_t dpi_hsa; /* DPI HSA*/ + uint32_t dpi_hbp; /* DPI HBP*/ + uint32_t dpi_hfp; /* DPI HFP*/ + float tx_frame_rate; /* 默认60Hz输出,不建议配置为其他,仅作为debug使用 */ + uint8_t lane_num; /* TX 使用的 lane 数量*/ + bool used; /* handle使用标志位 内部自动更新状态，不需要操作*/ + bool lp_exit_lpdt; /* 每一条LP CMD都退出LPDT */ + dsi_tx_lane_lp_e tx_lane_lp; /* clk/data lane是否自动进LP模式配置 */ + dsi_virtual_channel_e channel_id; /* 虚拟通道ID，默认为0*/ + dsi_video_mode_type_e vid_mode; /* video输出时选择输出的vid模式种类 */ + dsi_tx_cmd_tx_type_e cmd_tx_type; /* 初始化模式传输命令方式，0:HS; 1:LP */ + dsi_tx_pent_info_t pentile_info; /* pentile屏基本信息 */ + hal_dsi_tx_pq_filter_e tx_pq_index; /* 画质调整滤波器,默认为OPT最优效果 */ +} hal_dsi_tx_ctrl_handle_t; + +/** +* @brief TE 信号产生模式 +*/ +typedef enum +{ + TE_60HZ_MODE = 0, + TE_USER_MODE = 1, /* 底层不产生TE, 由hal_dsi_tx_ctrl_gen_a_tear_signal 接口产生 */ + TE_STOP_MODE = 1, + TE_90HZ_MODE = 2, + TE_120HZ_MODE = 3, + TE_144HZ_MODE = 4, + TE_160HZ_MODE = 5, + TE_MODE_MAX +} te_mode_e; + +/** +* @brief dpi tx vpg style +*/ +typedef enum +{ + TX_VPG_V_COLOR = 0, + TX_VPG_H_COLOR = 1, + TX_VPG_V_BER = 2, + TX_VPG_FLICKER = 3, + TX_VPG_MAX +} dsi_tx_vpg_style_e; + +/** +* @brief MIPI TX初始化 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval true/false +*/ +bool hal_dsi_tx_ctrl_init(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX反初始化 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval true/false +*/ +bool hal_dsi_tx_ctrl_deinit(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX创建实例 +* @param None +* @retval tx_ctrl_handle: MIPI TX实例 +*/ +hal_dsi_tx_ctrl_handle_t *hal_dsi_tx_ctrl_create_handle(void); + +/** +* @brief MIPI TX释放实例 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval true/false +*/ +bool hal_dsi_tx_ctrl_release_handle(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX开始运行 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval true/false +*/ +bool hal_dsi_tx_ctrl_start(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX停止运行 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval true/false +*/ +bool hal_dsi_tx_ctrl_stop(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX接收命令 +* @param data_type: 数据类型，参考枚举类型dsi_data_type_e +* @param vc: 虚拟通道编号，参考枚举类型dsi_virtual_channel_e +* @param cmd: DCS指令 +* @param size: 读取数据长度 +* @param data: 数据存放地址 +* @retval None +*/ +void hal_dsi_tx_ctrl_read_cmd(uint8_t data_type, uint8_t vc, uint8_t cmd, uint8_t size, uint8_t *data); + +/** +* @brief video高速数据传输时V porch阶段进行bta回读接口 +* @param data_type: 数据类型，参考枚举类型dsi_data_type_e +* @param cmd: DCS指令 +* @param size: 读取数据长度 +* @param data: 数据存放地址 +* @retval true-BTA回复获取有效，false-BTA回复未获得 +* @attention 需要考虑V porch时长是否足够size长度的寄存器回读，否则造成TX数据通路出错 +*/ +bool hal_dsi_tx_ctrl_vporch_bta_opera(uint8_t data_type, uint8_t cmd, uint8_t size, uint8_t *data); + +/** +* @brief MIPI TX发送命令 +* @param data_type: 数据类型，参考枚举类型dsi_data_type_e +* @param vc: 虚拟通道编号，参考枚举类型dsi_virtual_channel_e +* @param cmd_count: 可变参数个数 +* @param ...: 可变参数 +* @retval true-command发送正常；false-TX当前状态不能发送command +*/ +bool hal_dsi_tx_ctrl_write_cmd(uint8_t data_type, uint8_t vc, uint8_t cmd_count, ...); + +/** +* @brief MIPI TX发送命令 +* @param data_type: 数据类型，参考枚举类型dsi_data_type_e +* @param vc: 虚拟通道编号，参考枚举类型dsi_virtual_channel_e +* @param size: data个数 +* @param data: data数组 +* @retval true-command发送正常；false-TX当前状态不能发送command +*/ +bool hal_dsi_tx_ctrl_write_array_cmd(uint8_t data_type, uint8_t vc, uint8_t size, const uint8_t *data); + +/** +* @brief 切换至 LP cmd发送模式 +* @param enable: true-进行cmd发送；false-结束LP cmd发送 +* @retval None +* @attention 应用场景：AP enter sleep后传输发送LP cmd +*/ +void hal_dsi_tx_ctrl_cmd_mode(bool enable); + +/** +* @brief 设置TX escape mode时钟 +* @param esc_clk: escape clk 单位Hz,10000000时CMD为10Mhz +* @retval None +*/ +void hal_dsi_tx_ctrl_set_escape_clock_div(uint32_t esc_clk); + +/** +* @brief 设置RGB或BGR +* @param endianness: 选择RGB或BGR显示，参考dsi_endianness_e +* @attention 接口需要在初始化接口hal_dsi_tx_ctrl_init调用前才能生效 +* @retval None +*/ +void hal_dsi_tx_ctrl_set_endianness(dsi_endianness_e endianness); + +/** +* @brief 设置CCM参数 +* @param coef: 客制化参数，参考结构体ccm_coef_t +* @retval None +*/ +void hal_dsi_tx_ctrl_set_ccm(ccm_coef_t *ccm); + +/** +* @brief 设置边缘检测算法参数 +* @param edge_dect_para: 边缘检测算法参数，参考 dsi_tx_edge_dect_t;关闭模块时可以传参NULL +* @param edge_dect_en: 是否开启边缘检测模块 +* @retval None +*/ +void hal_dsi_tx_ctrl_set_edge_dect(dsi_tx_edge_dect_t *edge_dect_para, bool edge_dect_en); + +/** +* @brief 设置边缘增强效果算法参数 +* @param edge_enh_para: 边缘增强算法参数，参考 dsi_tx_edge_enh_t;关闭模块时可以传参NULL +* @param edge_enh_en: 是否开启边缘增强模块 +* @retval None +*/ +void hal_dsi_tx_ctrl_set_edge_enhance(dsi_tx_edge_enh_t *edge_enh_para, bool edge_enh_en); + +/** +* @brief 设置False Color remove算法参数 +* @param fc_para: false color参数，参考 dsi_tx_fc_t;关闭模块时可以传参NULL +* @param fc_en: 是否开启false color配置模块 +* @retval None +*/ +void hal_dsi_tx_ctrl_set_fc(dsi_tx_fc_t *fc_para, bool fc_en); + +/** +* @brief 设置bcs参数 +* @param bcs_para: 明亮度/对比度/饱和度，参考 dsi_tx_bcs_t;关闭模块时可以传参NULL +* @param bcs_en: 是否开启bcs配置模块 +* @retval None +*/ +void hal_dsi_tx_ctrl_set_bcs(dsi_tx_bcs_t *bcs_para, bool bcs_en); + +/** +* @brief 设置复写颜色 +* @param R: RGB的R分量 +* @param G: RGB的G分量 +* @param B: RGB的B分量 +* @retval None +*/ +void hal_dsi_tx_ctrl_set_overwrite_rgb(uint8_t R, uint8_t G, uint8_t B); + +/** +* @brief 打开overwrite功能 +* @param enable: true-打开overwrite； false-关闭overwrite +* @retval None +*/ +void hal_dsi_tx_ctrl_overwrite_enable(bool enable); + +/** +* @brief 设置部分显示 +* @param enable: true-打开partial显示； false-关闭partial显示 +* @param par_disp_cfg display区域和背景色设置，参考 dsi_tx_par_dis_t; 关闭模块功能时可以传参NULL +* @retval None +*/ +void hal_dsi_tx_ctrl_partial_disp_enable(bool enable, dsi_tx_par_dis_t *par_disp_cfg); + +/** +* @brief 控制TX VPG的输出 +* @param vpg_en: 使能VPG +* @param style: VPG的样式 +* @param vpg_hline_adj: false-正常情况使用，true-VPG显示滚动情况下使用 +* @attention vpg_hline_adj此参数只能解决带宽余量相差不大的情况，如果带宽需求超出过多，依然无法解决带宽不足引起的VPG显示滚动问题 +* @retval None +*/ +void hal_dsi_tx_ctrl_set_vpg(bool vpg_en, dsi_tx_vpg_style_e style, bool vpg_hline_adj); + +/** +* @brief 配置TE模式 +* @param tx_ctrl_handle: dsi tx handle +* @param te: te mode +* @retval None +*/ +void hal_dsi_tx_ctrl_set_tear_mode(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, te_mode_e te); + +/** +* @brief 生成一个TE信号 +* @param None +* @retval None +*/ +void hal_dsi_tx_ctrl_gen_a_tear_signal(void); + +/** +* @brief command mode输出模式下产生一帧数据 +* @param None +* @retval None +*/ +bool hal_dsi_tx_ctrl_gen_a_frame(void); + +/** +* @brief 配置输入输出同步行数,用于调整图像撕裂问题 +* @param tx_ctrl_handle: dsi tx handle +* @param line_num: 同步行号,范围1 ~ output height +* @retval true/false +*/ +bool hal_dsi_tx_ctrl_set_cus_sync_line(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint32_t line_num); + +/** +* @brief 获取TX当前显示行号 +* @param tx_ctrl_handle: dsi tx handle +* @retval 当前显示行号,包括vsa + vbp + vactive + vfp +*/ +uint32_t hal_dsi_tx_ctrl_get_disp_line(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +#endif //__HAL_DSI_TX_CTRL_H__ diff --git a/src/sdk/include/hal_flash.h b/src/sdk/include/hal_flash.h new file mode 100644 index 0000000..0375dcd --- /dev/null +++ b/src/sdk/include/hal_flash.h @@ -0,0 +1,139 @@ +/******************************************************************************* +* +* +* File: hal_system.h +* Description hal 通用系统接口头文件 +* Version V0.1 +* Date 2023-03-03 +* Author kevin + *******************************************************************************/ +#ifndef __HAL_FLASH_H__ +#define __HAL_FLASH_H__ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +typedef struct +{ + uint8_t flash_block; + uint8_t flash_page; + uint16_t data_size; + uint16_t page_offset_addr; + uint8_t *user_data; +} fls_ops_cfg_t; + +/** +* @brief 用户空间的操作 +*/ +typedef enum +{ + FLASH_USERDATA_READ, +} fls_userdata_ops_e; + + +/** +* @brief 公共区域的操作 +*/ +typedef enum +{ + FLASH_PUBLIC_READ, + FLASH_PUBLIC_WRITE, + FLASH_PUBLIC_ERASE_4K, + FLASH_PUBLIC_ERASE_32K +} fls_public_ops_e; + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief 初始化flash 模块,使用完flash模块后需要deinit用于节省功耗 +* @param +* @retval bool 无 +*/ +void hal_flash_init(void); + +/** +* @brief 关闭flash 模块 +* @param +* @retval bool 无 +*/ +void hal_flash_deinit(void); + + +/** +* @brief flash ctl读取flash-uid操作 +* @param UID[16] 存放UID的数组,UID最大长度为16 +* @param UID 数组长度(最大16) +* @retval +*/ +void hal_flash_read_uid(uint8_t *UID, uint8_t size); + +/** +* @brief 发送0xAB指令控制flash退出deep sleep power mode +* @param none +* @retval null +*/ +void hal_flash_release_power_down(void); + +/** +* @brief 发送0xB9指令控制flash进入deep sleep power mode +* @param none +* @retval null +*/ +void hal_flash_power_down(void); + +/** +* @brief 配置共享flash开关(使用过后注意关闭,常开功耗会增加) +* @param enable:true:可通过F_SPI访问内部flash , false:不可通过F_SPI访问内部flash +* @retval true/false +*/ +bool hal_flash_share_mode(bool enable); + +/** +* @brief 获取user_data的个数 +* @param +* @retval 数据个数 +*/ +uint32_t hal_flash_get_user_data_size(void); + +/** +* @brief Flash user data区域,该区域由烧录器烧录,软件只读,不可写。 + Size从hal_flash_get_user_data_size接口获取 +* @param ops:选择操作的方式：读 + cfg: flash_block: flash block = userdata偏移地址/64K + flash_page: flash page = (userdata偏移地址%/64K)/1K + page_offset_addr: userdata偏移地址%block(1K)，flash page内偏移地址(0-1023) + data_size: 读取数据的总长度 (0-1023) + user_data: 读取的数据 +* @retval 无 +*/ +void hal_flash_user_region_ops(fls_userdata_ops_e ops, fls_ops_cfg_t *cfg); + + +/** +* @brief Flash公共区域，可读写、擦除，大小32KB +* @param ops:选择操作的方式：读/写/擦除 + cfg: flash_block:固定为0 + flash_page:0-31 (总共32KB) + page_offset_addr: flash page内偏移地址(0-1023) + data_size: 需要操作数据的总长度 (0-1023) + user_data: 需要操作的数据 +* @retval 无 +*/ +void hal_flash_public_region_ops(fls_public_ops_e ops, fls_ops_cfg_t *cfg); +#endif //__HAL_FLASH_H__ diff --git a/src/sdk/include/hal_gpio.h b/src/sdk/include/hal_gpio.h new file mode 100644 index 0000000..75607c8 --- /dev/null +++ b/src/sdk/include/hal_gpio.h @@ -0,0 +1,725 @@ +/******************************************************************************* +* +* +* File: hal_gpio.h +* Description： gpio HAL层头文件 +* Version： V0.1 +* Date： 2023-07-27 +* Author： kevin + *******************************************************************************/ +#ifndef __HAL_GPIO_H__ +#define __HAL_GPIO_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +/** +* @brief GPIO pin +*/ +typedef enum +{ + /*以GPIO命名PIN*/ + IO_PAD_GPIO0 = 0, + IO_PAD_GPIO1, + IO_PAD_GPIO2, + IO_PAD_GPIO3, + IO_PAD_GPIO4, + IO_PAD_GPIO5, + IO_PAD_GPIO6, + IO_PAD_GPIO7, + IO_PAD_GPIO8, + IO_PAD_GPIO9, + IO_PAD_GPIO10, + IO_PAD_GPIO11, + IO_PAD_GPIO12, + IO_PAD_GPIO13, + IO_PAD_GPIO14, + IO_PAD_GPIO15, + IO_PAD_GPIO16, + IO_PAD_GPIO17, + IO_PAD_GPIO18, + IO_PAD_GPIO19, + IO_PAD_GPIO20, + IO_PAD_GPIO21, + IO_PAD_GPIO22, + IO_PAD_GPIO23, + IO_PAD_GPIO24, + IO_PAD_GPIO25, + + /*以实际PAD NAME命名PIN*/ + IO_PAD_AP_SPIS_MISO = IO_PAD_GPIO0, + IO_PAD_AP_SPIS_MOSI = IO_PAD_GPIO1, + IO_PAD_AP_INT = IO_PAD_GPIO2, + IO_PAD_AP_TE = IO_PAD_GPIO3, + IO_PAD_AP_SWIRE = IO_PAD_GPIO4, + IO_PAD_TD_SPIM_MISO = IO_PAD_GPIO5, + IO_PAD_TD_SPIM_MOSI = IO_PAD_GPIO6, + IO_PAD_TD_RSTN = IO_PAD_GPIO7, + IO_PAD_AP_PWMEN = IO_PAD_GPIO8, + IO_PAD_AP_SPIS_CLK = IO_PAD_GPIO9, + IO_PAD_AP_SPIS_CSN = IO_PAD_GPIO10, + IO_PAD_TD_FC_CLK = IO_PAD_GPIO11, + IO_PAD_TD_FC_CSN = IO_PAD_GPIO12, + IO_PAD_TD_FC_IO0 = IO_PAD_GPIO13, + IO_PAD_TD_FC_IO1 = IO_PAD_GPIO14, + IO_PAD_SWD_CLK = IO_PAD_GPIO15, + IO_PAD_SWD_DIO = IO_PAD_GPIO16, + IO_PAD_AP_RSTN = IO_PAD_GPIO17, + IO_PAD_UART0_TX = IO_PAD_GPIO18, + IO_PAD_TD_SPIM_CLK = IO_PAD_GPIO19, + IO_PAD_TD_SPIM_CSN = IO_PAD_GPIO20, + IO_PAD_AP_TPRSTN = IO_PAD_GPIO21, + IO_PAD_TD_INT = IO_PAD_GPIO22, + IO_PAD_TD_TP_RESX = IO_PAD_GPIO23, + IO_PAD_UART1_TX = IO_PAD_GPIO24, + IO_PAD_UART0_RX = IO_PAD_GPIO25, + + IO_PAD_MAX, + + + /*以实际引脚序号命名PIN*/ + IO_PIN_1 = IO_PAD_SWD_CLK, + IO_PIN_2 = IO_PAD_UART0_TX, + IO_PIN_3 = IO_PAD_SWD_DIO, + IO_PIN_4 = IO_PAD_TD_SPIM_MOSI, + IO_PIN_5 = IO_PAD_TD_SPIM_CLK, + IO_PIN_6 = IO_PAD_TD_SPIM_CSN, + IO_PIN_7 = IO_PAD_TD_SPIM_MISO, + IO_PIN_8 = IO_PAD_TD_RSTN, + IO_PIN_9 = IO_PAD_TD_FC_CSN, + IO_PIN_10 = IO_PAD_TD_FC_CLK, + IO_PIN_11 = IO_PAD_TD_FC_IO0, + IO_PIN_12 = IO_PAD_TD_FC_IO1, + IO_PIN_13 = IO_PAD_TD_TP_RESX, + IO_PIN_14 = IO_PAD_UART1_TX, + IO_PIN_15 = IO_PAD_AP_SWIRE, + IO_PIN_16 = IO_PAD_AP_INT, + IO_PIN_17 = IO_PAD_AP_PWMEN, + IO_PIN_18 = IO_PAD_AP_TPRSTN, + + IO_PIN_29 = IO_PAD_AP_TE, + IO_PIN_30 = IO_PAD_AP_SPIS_MISO, + IO_PIN_31 = IO_PAD_AP_SPIS_CSN, + IO_PIN_32 = IO_PAD_AP_SPIS_CLK, + IO_PIN_33 = IO_PAD_AP_SPIS_MOSI, + IO_PIN_34 = IO_PAD_AP_RSTN, + IO_PIN_35 = IO_PAD_TD_INT, + IO_PIN_36 = IO_PAD_UART0_RX, + +} io_pad_e; + + +/* +芯片引脚 | 默认mode | 可选mode +---------------------------------------------------------------- +IO_PIN_1 | IO_PAD_SWCLK, | PIN1_MODE_SWDCLK + | | PIN1_MODE_GPIO15 +---------------------------------------------------------------- +IO_PIN_2 | IO_PAD_UART0_TX, | PIN2_MODE_UART0_TX + | | PIN2_MODE_PWMO + | | PIN2_MODE_GPIO18 + | | PIN2_MODE_PWMI + | | PIN2_MODE_TEAR1 +---------------------------------------------------------------- +IO_PIN_3 | IO_PAD_SWDIO, | PIN3_MODE_SWDIO + | | PIN3_MODE_GPIO16 +---------------------------------------------------------------- +IO_PIN_4 | IO_PAD_TD_SPIM_MOSI, | PIN4_MODE_SPIM_MOSI + | | PIN4_MODE_I2C02_SDA + | | PIN4_MODE_GPIO6 + | | PIN4_MODE_UART0_TX +---------------------------------------------------------------- +IO_PIN_5 | IO_PAD_TD_SPIM_CLK, | PIN5_MODE_SPIM_SCLK + | | PIN5_MODE_I2C1_SCL + | | PIN5_MODE_GPIO19 +---------------------------------------------------------------- +IO_PIN_6 | IO_PAD_TD_SPIM_CSN, | PIN6_MODE_SPIM_CSN + | | PIN6_MODE_I2C1_SDA + | | PIN6_MODE_GPIO20 +---------------------------------------------------------------- +IO_PIN_7 | IO_PAD_TD_SPIM_MISO, | PIN7_MODE_SPIM_MISO + | | PIN7_MODE_I2C02_SCL + | | PIN7_MODE_GPIO5 +---------------------------------------------------------------- +IO_PIN_8 | IO_PAD_TD_RSTN, | PIN8_MODE_GPIO7 + | | PIN8_MODE_I2C02_SDA +---------------------------------------------------------------- +IO_PIN_9 | IO_PAD_TD_FC_CSN, | PIN9_MODE_TSPIS_CSN + | | PIN9_MODE_GPIO12 +---------------------------------------------------------------- +IO_PIN_10 | IO_PAD_TD_FC_CLK, | PIN10_MODE_TSPIS_CLK + | | PIN10_MODE_GPIO11 +---------------------------------------------------------------- +IO_PIN_11 | IO_PAD_TD_FC_IO0, | PIN11_MODE_TSPIS_IO0 + | | PIN11_MODE_GPIO13 + | | PIN11_MODE_I2C02_SDA +---------------------------------------------------------------- +IO_PIN_12 | IO_PAD_TD_FC_IO1, | PIN12_MODE_TSPIS_IO1 + | | PIN12_MODE_GPIO14 + | | PIN12_MODE_I2C02_SCL +---------------------------------------------------------------- +IO_PIN_13 | IO_PAD_TD_TP_RESX, | PIN13_MODE_GPIO23 + | | PIN13_MODE_PWMO + | | PIN13_MODE_UART1_RX + | | PIN13_MODE_UART1_RX +---------------------------------------------------------------- +IO_PIN_14 | IO_PAD_UART1_TX, | PIN14_MODE_GPIO24 + | | PIN14_MODE_UART0_RX + | | PIN14_MODE_UART1_TX + | | +---------------------------------------------------------------- +IO_PIN_15 | IO_PAD_AP_SWIRE, | PIN15_MODE_SWIRE + | | PIN15_MODE_PWMO + | | PIN15_MODE_GPIO4 +---------------------------------------------------------------- +IO_PIN_16 | IO_PAD_AP_INT, | PIN16_MODE_GPIO2 +---------------------------------------------------------------- +IO_PIN_17 | IO_PAD_AP_PWMEN, | PIN17_MODE_UART0_RX + | | PIN17_MODE_GPIO8 + | | PIN17_MODE_PWMO +---------------------------------------------------------------- +IO_PIN_18 | IO_PAD_AP_TPRSTN, | PIN18_MODE_UART0_RX + | | PIN18_MODE_GPIO21 + | | PIN18_MODE_I2C02_SCL +---------------------------------------------------------------- +IO_PIN_29 | IO_PAD_AP_TE, | PIN29_MODE_JTAG_TRSTN + | | PIN29_MODE_TEAR + | | PIN29_MODE_GPIO3 +---------------------------------------------------------------- +IO_PIN_30 | IO_PAD_AP_SPIS_MISO, | PIN30_MODE_JTAG_TDO + | | PIN30_MODE_SPIS_MISO + | | PIN30_MODE_GPIO0 + | | PIN30_MODE_UART0_RX + | | PIN30_MODE_I2C1_SCL +---------------------------------------------------------------- +IO_PIN_31 | IO_PAD_AP_SPIS_CSN, | PIN31_MODE_JTAG_TMS + | | PIN31_MODE_SPIS_CSN + | | PIN31_MODE_GPIO10 + | | PIN31_MODE_I2C02_SDA +---------------------------------------------------------------- +IO_PIN_32 | IO_PAD_AP_SPIS_CLK, | PIN32_MODE_JTAG_TCK + | | PIN32_MODE_SPIS_SCLK + | | PIN32_MODE_GPIO9 + | | PIN32_MODE_I2C02_SCL +---------------------------------------------------------------- +IO_PIN_33 | IO_PAD_AP_SPIS_MOSI, | PIN33_MODE_JTAG_TDI + | | PIN33_MODE_SPIS_MOSI + | | PIN33_MODE_GPIO1 + | | PIN33_MODE_UART0_TX + | | PIN33_MODE_I2C1_SDA_0 +---------------------------------------------------------------- +IO_PIN_34 | IO_PAD_AP_RSTN, | PIN34_MODE_GPIO17 +---------------------------------------------------------------- +IO_PIN_35 | IO_PAD_TD_INT, | PIN35_MODE_GPIO22 +---------------------------------------------------------------- +IO_PIN_36 | IO_PAD_UART0_RX, | PIN36_MODE_UART0_RX + | | PIN36_MODE_PWMO + | | PIN36_MODE_GPIO25 +---------------------------------------------------------------- +*/ + + +/** +* @brief PIN1 IO_PAD_SWD_CLK 可选的mode +*/ +typedef enum +{ + PIN1_MODE_SWDCLK = 0, + PIN1_MODE_GPIO15 = 2, +} pin1_mode_e; + + +/** +* @brief PIN2 PAD_UART0_TX可选的mode +*/ +typedef enum +{ + PIN2_MODE_UART0_TX = 0, + PIN2_MODE_PWMO = 1, + PIN2_MODE_GPIO18 = 2, + PIN2_MODE_PWMI = 3, + PIN2_MODE_TEAR1 = 4, +} pin2_mode_e; + +/** +* @brief PIN3 IO_PAD_SWD_DIO 可选的mode +*/ +typedef enum +{ + PIN3_MODE_SWDIO = 0, + PIN3_MODE_GPIO16 = 2, +} pin3_mode_e; + + +/** +* @brief PIN4 PAD_TD_SPIM_MOSI可选的mode +*/ +typedef enum +{ + PIN4_MODE_SPIM_MOSI = 0, + PIN4_MODE_I2C02_SDA = 1, + PIN4_MODE_GPIO6 = 2, + PIN4_MODE_UART0_TX = 3, +} pin4_mode_e; + +/** +* @brief PIN5 PAD_TD_SPIM_CLK可选的mode +*/ +typedef enum +{ + PIN5_MODE_SPIM_SCLK = 0, + PIN5_MODE_I2C1_SCL = 1, + PIN5_MODE_GPIO19 = 2, +} pin5_mode_e; + +/** +* @brief PIN6 PAD_TD_SPIM_CSN可选的mode +*/ +typedef enum +{ + PIN6_MODE_SPIM_CSN = 0, + PIN6_MODE_I2C1_SDA = 1, + PIN6_MODE_GPIO20 = 2, +} pin6_mode_e; + +/** +* @brief PIN7 PAD_TD_SPIM_MISO可选的mode +*/ +typedef enum +{ + PIN7_MODE_SPIM_MISO = 0, + PIN7_MODE_I2C02_SCL = 1, + PIN7_MODE_GPIO5 = 2, +} pin7_mode_e; + +/** +* @brief PIN8 PAD_TD_RSTN可选的mode +*/ +typedef enum +{ + PIN8_MODE_GPIO7 = 2, + PIN8_MODE_I2C02_SDA = 3, +} pin8_mode_e; + +/** +* @brief PIN9 PAD_TD_FC_CSN可选的mode +*/ +typedef enum +{ + PIN9_MODE_TSPIS_CSN = 0, + PIN9_MODE_GPIO12 = 2, +} pin9_mode_e; + +/** +* @brief PIN10 PAD_TD_FC_CLK可选的mode +*/ +typedef enum +{ + PIN10_MODE_TSPIS_CLK = 0, + PIN10_MODE_GPIO11 = 2, +} pin10_mode_e; + + +/** +* @brief PIN11 PAD_TD_FC_IO0可选的mode +*/ +typedef enum +{ + PIN11_MODE_TSPIS_IO0 = 0, + PIN11_MODE_GPIO13 = 2, + PIN11_MODE_I2C02_SDA = 3, +} pin11_mode_e; + +/** +* @brief PIN12 PAD_TD_FC_IO1可选的mode +*/ +typedef enum +{ + PIN12_MODE_TSPIS_IO1 = 0, + PIN12_MODE_GPIO14 = 2, + PIN12_MODE_I2C02_SCL = 3, +} pin12_mode_e; + +/** +* @brief PIN13 PAD_TD_TP_RESX可选的mode +*/ +typedef enum +{ + PIN13_MODE_GPIO23 = 2, + PIN13_MODE_PWMO = 3, + PIN13_MODE_UART1_RX = 4, +} pin13_mode_e; + +/** +* @brief PIN14 PAD_UART1_TX可选的mode +*/ +typedef enum +{ + PIN14_MODE_GPIO24 = 2, + PIN14_MODE_UART0_RX = 3, + PIN14_MODE_UART1_TX = 4, +} pin14_mode_e; + + + +/** +* @brief PIN15 PAD_AP_SWIRE可选的mode +*/ +typedef enum +{ + PIN15_MODE_SWIRE = 0, + PIN15_MODE_PWMO = 1, + PIN15_MODE_GPIO4 = 2, +} pin15_mode_e; + +/** +* @brief PIN16 IO_PAD_AP_INT 可选的mode +*/ +typedef enum +{ + PIN16_MODE_GPIO2 = 2, +} pin16_mode_e; + +/** +* @brief PIN17 PAD_AP_PWMEN可选的mode +*/ +typedef enum +{ + PIN17_MODE_UART0_RX = 1, + PIN17_MODE_GPIO8 = 2, + PIN17_MODE_PWMO = 3, +} pin17_mode_e; + +/** +* @brief PIN18 IO_PAD_AP_TPRSTN 可选的mode +*/ +typedef enum +{ + PIN18_MODE_UART0_RX = 0, + PIN18_MODE_GPIO21 = 2, + PIN18_MODE_I2C02_SCL = 3, +} pin18_mode_e; + + +//---------- + +/** +* @brief PIN29 IO_PAD_AP_TE 可选的mode +*/ +typedef enum +{ + PIN29_MODE_JTAG_TRSTN = 0, + PIN29_MODE_TEAR = 1, + PIN29_MODE_GPIO3 = 2, +} pin29_mode_e; + + +/** +* @brief PIN30 IO_PAD_AP_SPIS_MISO 可选的mode +*/ +typedef enum +{ + PIN30_MODE_JTAG_TDO = 0, + PIN30_MODE_SPIS_MISO = 1, + PIN30_MODE_GPIO0 = 2, + PIN30_MODE_UART0_RX = 3, + PIN30_MODE_I2C1_SCL = 6, +} pin30_mode_e; + +/** +* @brief PIN31 IO_PAD_AP_SPIS_CSN 可选的mode +*/ +typedef enum +{ + PIN31_MODE_JTAG_TMS = 0, + PIN31_MODE_SPIS_CSN = 1, + PIN31_MODE_GPIO10 = 2, + PIN31_MODE_I2C02_SDA = 3, +} pin31_mode_e; + +/** +* @brief PIN32 IO_PAD_AP_SPIS_CLK 可选的mode +*/ +typedef enum +{ + PIN32_MODE_JTAG_TCK = 0, + PIN32_MODE_SPIS_SCLK = 1, + PIN32_MODE_GPIO9 = 2, + PIN32_MODE_I2C02_SCL = 3, +} pin32_mode_e; + +/** +* @brief PIN33 IO_PAD_AP_SPIS_MOSI 可选的mode +*/ +typedef enum +{ + PIN33_MODE_JTAG_TDI = 0, + PIN33_MODE_SPIS_MOSI = 1, + PIN33_MODE_GPIO1 = 2, + PIN33_MODE_UART0_TX = 3, + PIN33_MODE_I2C1_SDA_0 = 6, +} pin33_mode_e; + +/** +* @brief PIN34 PAD_AP_RST可选的mode +*/ +typedef enum +{ + PIN34_MODE_GPIO17 = 2, +} pin34_mode_e; + + +/** +* @brief PIN35 PAD_TD_INT可选的mode +*/ +typedef enum +{ + PIN35_MODE_GPIO22 = 2, +} pin35_mode_e; + + +/** +* @brief PIN36 PAD_UART_RX可选的mode +*/ +typedef enum +{ + PIN36_MODE_UART0_RX = 0, + PIN36_MODE_PWMO = 1, + PIN36_MODE_GPIO25 = 2, +} pin36_mode_e; + + + +//------------------------------------------------------------------------- +/** +* @brief PAD_SFC_CLK可选的mode 内部PAD +*/ +typedef enum +{ + IO_MODE_INTER_FC_CLK = 0, + IO_MODE_TSPIS_CLK_EN = 2, +} pad_sfc_clk_mode_e; + +/** +* @brief PAD_SFC_CSN可选的mode 内部PAD +*/ +typedef enum +{ + IO_MODE_INTER_FC_CSN = 0, + IO_MODE_TSPIS_CSN_EN = 2, +} pad_sfc_csn_mode_e; + +/** +* @brief PAD_SFC_IO0可选的mode 内部PAD +*/ +typedef enum +{ + IO_MODE_INTER_FC_IO0 = 0, + IO_MODE_TSPIS_IO0_EN = 2, +} pad_sfc_io0_mode_e; + +/** +* @brief PAD_SFC_IO1可选的mode 内部PAD +*/ +typedef enum +{ + IO_MODE_INTER_FC_IO1 = 0, + IO_MODE_TSPIS_IO1_EN = 2, +} pad_sfc_io1_mode_e; + +/** +* @brief PAD电压转换速率 +*/ +typedef enum +{ + IO_SLEW_RATE_SLOW = 0, + IO_SLEW_RATE_FAST = 1, +} pad_slew_rate_e; + +/******************************************************************************* +* IOE +*******************************************************************************/ +/** +* @brief GPIO io方向 +*/ +typedef enum +{ + IO_IOE_INPUT = 0, + IO_IOE_OUTPUT, + IO_IOE_NONE +} gpio_ioe_e; + +/** +* @brief GPIO level +*/ +typedef enum +{ + IO_LVL_LOW = 0, + IO_LVL_HIGH, + IO_LVL_NONE +} gpio_level_e; + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/** +* @brief PAD与MODE的MAP结构体 +*/ +typedef struct +{ + io_pad_e pad; + uint8_t mode; + gpio_ioe_e ioe; + gpio_level_e lvl; +} io_pad_attr_t; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 配置指定PAD为GPIO mode，方向为input，指定中断触发方式 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param trig：4种中断触发方式，参考枚举类型sys_cfg_trigger_e +* @retval 无 +*/ +void hal_gpio_init_eint(io_pad_e pad, sys_cfg_trigger_e trig); + +/** +* @brief 注册GPIO中断回调函数 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param cb_func：回调函数地址 +* @param data：回调函数参数地址 +* @retval 无 +*/ +void hal_gpio_reg_eint_cb(io_pad_e pad, fcb_type cb_func); + +/** +* @brief 开关GPIO中断 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param state：开关控制 +* @retval 无 +*/ +void hal_gpio_ctrl_eint(io_pad_e pad, bool state); + +/** +* @brief 获取GPIO中断类型 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @retval 无 +*/ +gpio_int_e hal_gpio_get_int_type(io_pad_e pad); + +/** +* @brief 配置指定PAD为GPIO mode，方向为output，指定初始电平 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param lvl：初始电平，参考枚举类型gpio_level_e +* @retval 无 +*/ +void hal_gpio_init_output(io_pad_e pad, gpio_level_e lvl); + +/** +* @brief 封装设置输出接口 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param lvl：初始电平，参考枚举类型gpio_level_e +* @retval 无 +*/ +void hal_gpio_set_output_data(io_pad_e pad, gpio_level_e lvl); + +/** +* @brief 配置指定PAD为GPIO mode，方向为input +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @retval 无 +*/ +void hal_gpio_init_input(io_pad_e pad); + +/** +* @brief 读取输入电平 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @retval 无 +*/ +gpio_level_e hal_gpio_get_input_data(io_pad_e pad); + +/** +* @brief 设置io mode +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param mode：工作模式，参考各PAD对应的mode枚举类型 +* @retval 无 +*/ +void hal_gpio_set_mode(io_pad_e pad, uint8_t mode); + +/** +* @brief 设置io 为高阻态 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @retval 无 +*/ +void hal_gpio_set_high_impedance(io_pad_e pad); + +/** +* @brief 获取指定PAD的默认上拉、下拉状态 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param up_enable：默认上拉状态 +* @param down_enable：默认下拉状态 +* @retval 无 +*/ +void hal_gpio_get_pull_state(io_pad_e pad, bool *up_enable, bool *down_enable); + +/** +* @brief 配置指定PAD的默认上拉、下拉状态 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param up_enable：默认上拉状态 +* @param down_enable：默认下拉状态 +* @retval 无 +*/ +void hal_gpio_set_pull_state(io_pad_e pad, bool up_enable, bool down_enable); + +/** +* @brief 配置指定PAD是否为施密特触发 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param st_enable：1为施密特触发，0为正常触发 +* @retval 无 +*/ +void hal_gpio_set_schmitt_trigger(io_pad_e pad, bool st_enable); + +/** +* @brief 配置指定PAD的驱动能力 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param strength：驱动强度，取值为0~3 +* @retval 无 +*/ +void hal_gpio_set_driving_strength(io_pad_e pad, uint8_t strength); + +/** +* @brief 配置指定PAD的电压转换速率 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param rate：驱动强度，取值为0~3 +* @retval 无 +*/ +void hal_gpio_set_slew_rate(io_pad_e pad, pad_slew_rate_e rate); + +/** +* @brief 配置AP_RSTN引脚中断 +* @param enable: 中断开关 +* @param cb_func：回调函数 +* @param trig：触发模式 +* @retval 无 +*/ +void hal_gpio_set_ap_reset_int(bool enable, fcb_type cb_func, sys_cfg_trigger_e trig); + +/** +* @brief 批量设置IO参数 +* @param attrs: PAD属性 +* @param size: 数组成员个数 +* @retval 无 +*/ +void hal_gpio_config_pad(io_pad_attr_t *attrs, uint8_t size); + +#endif /* __HAL_GPIO_H__ */ diff --git a/src/sdk/include/hal_i2c_master.h b/src/sdk/include/hal_i2c_master.h new file mode 100644 index 0000000..5e352da --- /dev/null +++ b/src/sdk/include/hal_i2c_master.h @@ -0,0 +1,134 @@ +/******************************************************************************* +* Copyright (C) 2021-2025, All Rights Reserved. +* +* File: hal_i2c_master.h +* Description hal i2c master模块接口头文件 +* Version V0.1 +* Date 2023-07-27 +* Author swx +*******************************************************************************/ +#ifndef __HAL_I2C_MASTER_H__ +#define __HAL_I2C_MASTER_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief hal_i2cm_init +* @param index: I2Cx index +* @param slave_addr: 从机地址 +* @param addr_bits: 从机地址位数 +* @param i2c_m_speed_hz: 主机速率设置 +* @retval none +*/ +void hal_i2cm_init(i2c_index_e index, uint16_t slave_addr, uint8_t addr_bits, uint32_t i2cm_speed_hz); + +/** +* @brief hal_i2cm_deinit +* @param index: I2Cx index +* @retval none +*/ +void hal_i2cm_deinit(i2c_index_e index); + +/** +* @brief hal_i2cm_set_slave_addr +* @param index: I2Cx index +* @param slave_addr: 从机地址 +* @param addr_bits: 从机地址位数 +* @retval none +*/ +void hal_i2cm_set_slave_addr(i2c_index_e index, uint16_t slave_addr, uint8_t addr_bits); + +/** +* @brief i2c master 发送数据 +* @param index: I2Cx index +* @param tx_buffer: 发送数据buffer +* @param tx_size: 发送数据个数 +* @retval true/false: 成功/失败 +*/ +bool hal_i2cm_write(i2c_index_e index, const uint8_t *tx_buffer, uint32_t tx_size); + +/** +* @brief i2c master 接收数据 +* @param index: I2Cx index +* @param reg_address：寄存器地址 +* @param reg_size: 寄存器地址size +* @param rx_buffer: 接收数据buffer +* @param rx_size: 接收数据个数 +* @retval true/false: 成功/失败 +*/ +bool hal_i2cm_read(i2c_index_e index, uint32_t reg_address, size_t reg_size, uint8_t *rx_buffer, size_t rx_size); + +/** +* @brief i2c master 多地址参数接收数据 +* @param index: I2Cx index +* @param reg_address：寄存器地址 +* @param reg_size: 寄存器地址size +* @param rx_buffer: 接收数据buffer +* @param rx_size: 接收数据个数 +* @retval true/false: 成功/失败 +*/ +bool hal_i2cm_multi_params_read(i2c_index_e index, uint8_t *reg_address, size_t reg_size, uint8_t *rx_buffer, size_t rx_size); + +/** +* @brief i2c master dma 发送数据 +* @param index: I2Cx index +* @param tx_buffer: 发送数据buffer +* @param tx_size: 发送数据个数 +* @retval true: 数据已排入 DMA 通道，但不一定全部发送 +* false：发送出错，需要重新调用函数发送 +*/ +bool hal_i2cm_dma_write(i2c_index_e index, const uint8_t *tx_buffer, uint32_t tx_size); + +/** +* @brief i2c master dma 接收数据 +* @param index: I2Cx index +* @param reg_address：寄存器地址 +* @param reg_size: 寄存器地址size +* @param rx_buffer: 接收数据buffer +* @param rx_size: 接收数据个数 +* @retval true：寄存器地址发送成功，并已配置DMA接收通道，但不一定完成接收 +* false：接收出错，需要重新调用函数接收 +*/ +bool hal_i2cm_dma_read(i2c_index_e index, uint32_t reg_address, size_t reg_size, uint8_t *rx_buffer, size_t rx_size); + +/** +* @brief i2c master dma 多地址参数接收数据 +* @param index: I2Cx index +* @param reg_address：寄存器地址 +* @param reg_size: 寄存器地址size +* @param rx_buffer: 接收数据buffer +* @param rx_size: 接收数据个数 +* @retval true：寄存器地址发送成功，并已配置DMA接收通道，但不一定完成接收 +* false：接收出错，需要重新调用函数接收 +*/ +bool hal_i2cm_multi_params_dma_read(i2c_index_e index, uint8_t *reg_address, size_t reg_size, uint8_t *rx_buffer, size_t rx_size); + +/** +* @brief 获取 i2c master 发送状态 +* @param index: I2Cx index +* @retval true/false +*/ +bool hal_i2cm_get_transfer_complete(i2c_index_e index); + +#endif /* __HAL_I2C_MASTER_H__*/ + diff --git a/src/sdk/include/hal_i2c_slave.h b/src/sdk/include/hal_i2c_slave.h new file mode 100644 index 0000000..eaa69a9 --- /dev/null +++ b/src/sdk/include/hal_i2c_slave.h @@ -0,0 +1,156 @@ +/******************************************************************************* +* Copyright (C) 2021-2025, All Rights Reserved. +* +* File: hal_i2c_slave.h +* Description hal i2c slave模块接口头文件 +* Version V0.1 +* Date 2023-07-27 +* Author swx +*******************************************************************************/ +#ifndef __HAL_I2C_SLAVE_H__ +#define __HAL_I2C_SLAVE_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/** +* @brief i2cs event packet info +*/ +typedef struct hal_i2cs_packet_info_t +{ + uint8_t *rx_buffer; /* 接收buffer */ + uint32_t rx_buffer_size; /* 接收buffer size */ + const uint8_t *tx_buffer; /* 发送buffer */ + uint32_t tx_buffer_size; /* 发送buffer size */ + bool tx_circle; /* 发送circle mode */ + uint32_t packet_size; /* packet size : READ、RST、STOP中断事件时整个传输过程中I2CM发送packet的总量 */ +} hal_i2cs_packet_info_t; + +/** +* @brief i2cs event +*/ +typedef enum +{ + I2CS_EVENT_READ = 0, //发生 读请求 中断 + I2CS_EVENT_RST, //发生 restart 中断 + I2CS_EVENT_STOP //发生 stop 中断 +} hal_i2cs_event_e; + +typedef void (*hal_i2cs_cb)(i2c_index_e index, hal_i2cs_event_e event, size_t receive_num); + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief hal_i2cs_init +* @param index: I2Cx index +* @param slave_addr: 从机地址 +* @param addr_bits: 从机地址位数 +* @retval none +*/ +void hal_i2cs_init(i2c_index_e index, uint16_t slave_addr, uint8_t addr_bits); + +/** +* @brief hal_i2cs_deinit +* @param index: I2Cx index +* @retval none +*/ +void hal_i2cs_deinit(i2c_index_e index); + +/** +* @brief hal_i2cs_set_continue_transfer +* @param index: I2Cx index +* @param status: true/false +* @retval none +*/ +void hal_i2cs_set_continue_transfer(i2c_index_e index, bool status); + +/** +* @brief 获取i2c slave发送成功字节数 +* 注意这是通信过程i2c slave发送的数据量，如果更新了i2c slave的tx_buffer，则清零 +* @param index: I2Cx index +* @retval 发送总字节数 +*/ +uint32_t hal_i2cs_get_tx_cnt(i2c_index_e index); + +/** +* @brief 获取 i2c slave 接收数量 +* 注意这是通信过程i2c slave接收的数据量，如果更新了i2c slave的rx_buffer，则清零 +* @param index: I2Cx index +* @retval 数据接收数量 +*/ +uint32_t hal_i2cs_get_rx_cnt(i2c_index_e index); + +/** +* @brief 清零 i2c slave 接收数量 +* @param index: I2Cx index +* @retval none +*/ +void hal_i2cs_rx_cnt_clear(i2c_index_e index); + +/** +* @brief 获取 i2c slave 发送状态 +* @param index: I2Cx index +* @retval true：数据发送完成 +* false：数据还在发送 +*/ +bool hal_i2cs_get_write_complete(i2c_index_e index); + +/** +* @brief i2c slave 注册回调函数 +* @param index: I2Cx index +* @param cb：call back +* @retval +*/ +void hal_i2cs_register_callback(i2c_index_e index, hal_i2cs_cb cb); + +/** +* @brief i2c slave 配置接收buffer, 底层自动接收数据后调用callback +* @param index: I2Cx index +* @param rx_buffer：自动模式数据接收buffer +* @param rx_size: 自动模式数据接收buffer size +* @retval none +*/ +void hal_i2cs_update_rx_buffer(i2c_index_e index, uint8_t *rx_buffer, size_t rx_size); + +/** +* @brief i2c slave 配置自动发送buffer +* @param index: I2Cx index +* @param tx_buffer：自动模式数据发送buffer +* @param tx_size： 自动模式数据发收buffer size +* @param circle：circle mode，重复发送buffer的数据 +* @retval none +*/ +void hal_i2cs_update_tx_buffer(i2c_index_e index, const uint8_t *tx_buffer, uint32_t tx_size, bool circle); + +/** +* @brief i2c slave 启动 +* @param index: I2Cx index +* @retval none +*/ +void hal_i2cs_start(i2c_index_e index); + +/** +* @brief i2c slave 停止 +* @param index: I2Cx index +* @retval none +*/ +void hal_i2cs_stop(i2c_index_e index); + +#endif /* __HAL_I2C_SLAVE_H__*/ + diff --git a/src/sdk/include/hal_pwm.h b/src/sdk/include/hal_pwm.h new file mode 100644 index 0000000..cc8f876 --- /dev/null +++ b/src/sdk/include/hal_pwm.h @@ -0,0 +1,82 @@ +/******************************************************************************* +* +* +* File: hal_pwm.h +* Description： pwm HAL层头文件 +* Version： V0.1 +* Date： 2021-03-17 +* Author： jaya + *******************************************************************************/ +#ifndef __HAL_PWM_H__ +#define __HAL_PWM_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief pwm 初始化 +* @param frequency: PWM 频率 < 30000 (30K) +* @param duty_step: 占空比调试阶数,与硬件相关,不能超过硬件限制（建议配置255） + 最大阶数 = (1000000000/130)/frequency，常见如下 + frequency, max step(最大step可配置) + { 30000, 255 } + { 4000, 1923} + { 3000, 2564} +* @retval true/false +*/ +bool hal_pwm_init(uint32_t frequency, uint32_t duty_step); + +/** +* @brief pwm 启动停止控制 +* @param enable: 启动/停止 +* @retval none +*/ +void hal_pwm_enable(bool enable); + +/** +* @brief pwm 设置占空比 +* @param duty_ratio: 占空比,范围为0 - duty_step(hal_pwm_init配置的参数) +* @retval none +*/ +void hal_pwm_set_duty(uint32_t duty_ratio); + +/** +* @brief pwm 配置从elvcc直接输出背光电源 +* @param enable: ELVCC输出启停 +* @retval none +*/ +bool hal_pwm_set_elvcc_output(bool enable); + +/** +* @brief 配置elvcc PWM 驱动背光能力,范围 0 - 15, capactiy为15时驱动能力最强,ELVCC输出电流最大 +* @param capacity: 0 - 15,hal_pwm_set_elvcc_output配置时会恢复默认值15 +* @retval none +*/ +void hal_pwm_set_elvcc_capacity(uint8_t capacity); + +/** +* @brief pwm 去初始化 +* @param none +* @retval true/false +*/ +bool hal_pwm_deinit(void); + +#endif /* __HAL_PWM_H__ */ diff --git a/src/sdk/include/hal_pwr.h b/src/sdk/include/hal_pwr.h new file mode 100644 index 0000000..3572bc8 --- /dev/null +++ b/src/sdk/include/hal_pwr.h @@ -0,0 +1,325 @@ +/******************************************************************************* +* +* +* File: hal_pwr.h +* Description： pwr hal层头文件 +* Version： V0.1 +* Date： 2023-07-21 +* Author： lyw + *******************************************************************************/ +#ifndef __HAL_PWR_H__ +#define __HAL_PWR_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "hal_gpio.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/** +* @brief IC主供电电源选择 +*/ +typedef enum +{ + PWR_SEL_IOV18 = 0, /* IC选择IOV18主供电(默认值) */ + PWR_SEL_TP18 = 1, /* IC选择TP18主供电 */ + PWR_SEL_VCC = 2, /* IC选择VCC主供电 */ + PWR_SEL_VDD13CP = 3, /* IC选择VDD13CP外接电源主供电*/ +} pwr_main_power_sel_e; + +/** +* @brief Sleep mode 供电模式 +*/ +typedef enum +{ + PWR_SLEEP_IN_NON = 0, /* Sleep Mode期间无外部供电(默认值) */ + PWR_SLEEP_IN_TP18 = 1, /* Sleep Mode期间TP18有电,其他电源掉电或不存在 */ + PWR_SLEEP_IN_VCC = 2, /* Sleep Mode期间VCC有电,其他电源掉电或不存在 */ + PWR_SLEEP_IN_VCC_TP18 = 3, /* Sleep Mode期间TP18与VCC有电,其他电源掉电或不存在 */ + PWR_SLEEP_IN_IOV18 = 4, /* Sleep Mode期间IOV18有电,其他电源掉电或不存在 */ + PWR_SLEEP_IN_IOV18_TP18 = 5, /* Sleep Mode期间IOV18与TP18有电,其他电源掉电或不存在 */ + PWR_SLEEP_IN_IOV18_VCC = 6, /* Sleep Mode期间IOV18与VCC有电,其他电源掉电或不存在 */ + PWR_SLEEP_IN_IOV18_VCC_TP18 = 7, /* Sleep Mode期间IOV18、TP18、VCC均有电,其他电源掉电或不存在 */ +} pwr_sleep_power_sel_e; + +/** +* @brief sleep mode 唤醒沿配置 +*/ +typedef enum +{ + WUP_RISING_EDGE = 2, /* 上升沿唤醒 */ + WUP_FALLING_EDGE = 3 /* 下降沿唤醒 */ +} pwr_wakeup_trigger_e; + +/** +* @brief 软件启动原因 +*/ +typedef enum +{ + RF_POWER_ON = 0, /* Power On,正常上电 */ + RF_CORE_RST = 1, /* 软件reset, 调用NVIC_SystemReset产生reset */ + RF_WDT_RST = 2, /* WDT reset */ + RF_CHIP_RST = 3, /* Chip reset,调用hal_system_reset_chip产生的reset */ + RF_APRSTN_WAKEUP = 4, /* deep sleep mode 下AP_RSTN reset */ + RF_TDINT_WAKEUP = 5 /* deep sleep mode 下TD_INT reset */ +} pwr_reset_flag_e; + +/** +* @brief pwr sleep mode type +* 不同sleep mode具体应用场景见《PWR说明文档》 +*/ +typedef enum +{ + PWR_NORMAL_SLEEP_MODE = 0, /* 待机下需要处理外设(I2C)等事件使用,调用hal_pwr_enter_normal_sleep_mode 进入,hal_pwr_exit_sleep_mode退出 */ + PWR_STOP_SLEEP_MODE = 1, /* 待机下需要通过任意GPIO唤醒时使用此模式,进入之前关闭所有模块以及MCU,通过hal_pwr_set_stop_sleep_wakeup_pin 注册GPIO中唤醒源,调用hal_pwr_enter_stop_sleep_mode 进入,hal_pwr_exit_sleep_mode退出 */ + PWR_DEEP_SLEEP_MODE = 2 /* 待机下只需要通过AP RSTN跟TD INT引脚唤醒使用时使用此模式,调用hal_pwr_enter_deep_sleep_mode 唤醒后重启,通过hal_pwr_get_reset_flag确定唤醒源 */ +} pwr_sleep_mode_e; + +/*! @brief HV LDO输出电压配置*/ +typedef enum _pwr_hv_ldo_e +{ + HV_LDO_0 = 0, /*1.20V*/ + HV_LDO_1 = 1, /*1.26V*/ + HV_LDO_2 = 2, /*1.32V*/ + HV_LDO_3 = 3, /*1.38V*/ + HV_LDO_4 = 4, /*1.44V*/ + HV_LDO_5 = 5, /*1.50V*/ + HV_LDO_6 = 6, /*1.56V*/ + HV_LDO_7 = 7, /*1.62V*/ + HV_LDO_8 = 8, /*1.68V*/ + HV_LDO_9 = 9, /*1.74V*/ + HV_LDO_10 = 10, /*1.80V*/ + HV_LDO_11 = 11, /*1.86V*/ + HV_LDO_12 = 12, /*2.04V*/ + HV_LDO_13 = 13, /*2.46V*/ + HV_LDO_14 = 14, /*3.00V*/ + HV_LDO_15 = 15, /*3.30V*/ +} pwr_hv_ldo_e; + +/*! @brief LDO 13S输出电压配置*/ +typedef enum _pwr_ldo_13s_e +{ + LDO_13S_0 = 0, /*1.22V*/ + LDO_13S_1 = 1, /*1.25V*/ + LDO_13S_2 = 2, /*1.27V*/ + LDO_13S_3 = 3, /*1.30V*/ + LDO_13S_4 = 4, /*1.33V*/ + LDO_13S_5 = 5, /*1.37V*/ + LDO_13S_6 = 6, /*1.40V*/ + LDO_13S_7 = 7, /*1.43V*/ +} pwr_ldo_13s_e; + +/*! @brief LDO 18S输出电压配置*/ +typedef enum _pwr_ldo_18s_e +{ + LDO_18S_0 = 0, /*1.61V*/ + LDO_18S_1 = 1, /*1.64V*/ + LDO_18S_2 = 2, /*1.67V*/ + LDO_18S_3 = 3, /*1.70V*/ + LDO_18S_4 = 4, /*1.74V*/ + LDO_18S_5 = 5, /*1.77V*/ + LDO_18S_6 = 6, /*1.80V*/ + LDO_18S_7 = 7, /*1.83V*/ +} pwr_ldo_18s_e; + +/*! @brief PWR PVD index */ +typedef enum +{ + PVD_IOVCC = 3, + PVD_VCI = 15, +} pwr_pvd_index_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief IC主供电选择,如果是配置vcc主供电，可通过hal_pwr_get_vcc_power_ready获取电源状态 +* 注:上电只能配置一次,不可随意切换 +* @param power_sel 主供电选择,见枚举描述 +* @retval none +*/ +void hal_pwr_set_main_power(pwr_main_power_sel_e power_sel); + +/** +* @brief 获取VCC电源稳定状态,使用hal_pwr_set_main_power切换电源后,通过此接口获取电源稳定状态 +* eg: 使用hal_pwr_set_main_power切换至VCC主供电,在VCC电源接口上电之前,此接口返回值为false +* @param None +* @retval true-电源切换完成 false-电源未切换完成 +*/ +bool hal_pwr_get_vcc_power_ready(void); + +/** +* @brief 配置VCC开关,芯片启动默认打开VCC CP,不存在VCC的情况下可关闭 +* @param enable: true:打开CP, false:关闭CP +* @retval none +*/ +void hal_pwr_set_vcc_enable(bool enable); + +/** +* @brief sleep mode 期间电源情况配置 +* 调用sleep mode之前配置,根据配置情况在sleep mode自动切换电源 +* exit sleep mode后切换回hal_pwr_set_main_power的电源 +* @param powerin =000 息屏期间状态，IOV18掉电0，VCC掉电0，TP18也掉电0； +* @retval none +*/ +void hal_pwr_set_sleep_mode_power(pwr_sleep_power_sel_e power_sel); + +/** +* @brief 进入normal sleep mode 模式（详细使用方法见《PWR说明文档》） +* 待机下需要处理外设(I2C)等事件使用,图像通路关闭,MCU&外设正常运行 +* 调用hal_pwr_exit_sleep_mode退出 +* @param none +* @retval bool true/false +*/ +bool hal_pwr_enter_normal_sleep_mode(void); + +/** +* @brief 进入stop sleep mode 模式（详细使用方法见《PWR说明文档》） +* 待机下需要通过任意GPIO唤醒时使用此模式，进入之前关闭所有模块,通过hal_pwr_set_stop_sleep_wakeup_pin 注册GPIO中唤醒源。 +* 调用此接口后MCU会停止运行,等待中断唤醒后该函数才返回,调用hal_pwr_exit_sleep_mode真正退出stop sleep mode +* @param none +* @retval io_pad_e:唤醒接口 +*/ +io_pad_e hal_pwr_enter_stop_sleep_mode(void); + +/** +* @brief 注册 stop sleep mode 唤醒IO （详细使用方法见文档） +* @param pad ：Pin name +* @param trig：唤醒触发模式 +* @retval true/false +*/ +bool hal_pwr_set_stop_sleep_wakeup_pin(io_pad_e pad, pwr_wakeup_trigger_e trig); + +/** +* @brief 进入deep sleep mode 模式, 等待AP_RSTN 或者TD_INT 唤醒 +* 待机下只需要通过AP RSTN跟TD INT引脚唤醒使用时使用此模式，唤醒后重启,通过hal_pwr_get_reset_flag确定唤醒源 +* 注意, 如果需要使用deep sleep mode,TD INT引脚不能悬空,必须有上拉或者下拉保证确定电平,否则会导致误唤醒 +* @param polarity true:上升沿唤醒 false:下降沿唤醒 +* @retval none +*/ +void hal_pwr_enter_deep_sleep_mode(pwr_wakeup_trigger_e ap_rstn_trig, pwr_wakeup_trigger_e td_int_trig); + +/** +* @brief 退出sleep mode, normal/stop sleep mode都需要通过此接口退出 +* @param none +* @retval true/false +*/ +bool hal_pwr_exit_sleep_mode(void); + +/** +* @brief 获取系统复位原因 +* @param none +* @retval reset flag,见pwr_reset_flag_e +*/ +pwr_reset_flag_e hal_pwr_get_reset_flag(void); + +/** +* @brief 打开ELVCC作为供电电源 +* @param none +* @retval +*/ +void hal_pwr_elvcc_ldo_en(bool enable); + + +/** +* @brief +* @param HV LDO输出电压配置 + =0000：1.20V， + =0001：1.26V， + =0010：1.32V， + =0011：1.38V， + =0100：1.44V， + =0101：1.50V， + =0110：1.56V， + =0111：1.62V， + =1000：1.68V， + =1001：1.74V， + =1010：1.80V， + =1011：1.86V， + =1100：2.04V， + =1101：2.46V， + =1110：3.00V， + =1111：3.30V +* @retval none +*/ +void hal_pwr_elvcc_vol_set(pwr_hv_ldo_e voltage); + +/** +* @brief +* @param LDO18_S模块使能控制，=0关闭，默认关闭；=1开启 +* @retval none +*/ +void hal_pwr_ldo18s_en(bool enable); + + +/** +* @brief +* @param LDO18_S输出电压配置， + 000=1.61V + 001=1.64V + 010=1.67V + 011=1.70V + 100=1.74V + 101=1.77V + 110=1.80V + 111=1.83V +* @retval none +*/ +void hal_pwr_ldo18s_set(pwr_ldo_18s_e voltage); + +/** +* @brief +* @param LDO13_S模块使能控制，=0关闭，默认关闭；=1开启 +* @retval none +*/ +void hal_pwr_ldo13s_en(bool enable); + + +/** +* @brief +* @param LDO13_S输出电压配置， + 000=1.22V, + 001=1.25V, + 010=1.27V, + 011=1.30V, + 100=1.33V， + 101=1.37V， + 110=1.40V， + 111=1.43V +* @retval none +*/ +void hal_pwr_ldo13s_set(pwr_ldo_13s_e voltage); + +/** +* @brief PVD(电源检查)开关接口, +* PVD默认均为打开,注意!电源切换(如主供电切换,进出sleep mode)必须打开PVD! +* @param index: PVD选择 IOVCC/VCI +* @param enable: PVD开关 +* @retval none +*/ +void hal_pwr_set_pvd(pwr_pvd_index_e index, bool enable); + +/** +* @brief 使能TP18给VDD18供电 +* @warning info!!! 1:进入休眠的电源要选择TP18供电 eg： hal_pwr_set_sleep_mode_power(PWR_SLEEP_IN_TP18); +* @warning info!!! 2:唤醒之后，关闭改使能 eg： hal_pwr_sw_tp18_en(DISENABLE); +* @param enable: +* @retval none +*/ +void hal_pwr_sw_tp18_en(bool enable); + + + +#endif /* __HAL_PWR_H__ */ diff --git a/src/sdk/include/hal_spi_master.h b/src/sdk/include/hal_spi_master.h new file mode 100644 index 0000000..931ef5a --- /dev/null +++ b/src/sdk/include/hal_spi_master.h @@ -0,0 +1,93 @@ +/******************************************************************************* +* Copyright (C) 2021-2025, All Rights Reserved. +* +* File: hal_spi_master.h +* Description hal spi masrer模块头文件 +* Version V0.1 +* Date 2023-07-27 +* Author swx +*******************************************************************************/ +#ifndef __HAL_SPI_MASTER_H__ +#define __HAL_SPI_MASTER_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief 初始化spi master 模块 +* @param speed: 传输速度 +* @param cpha: 相位配置 +* @param cpol: 极性配置 +* @retval none +*/ +void hal_spim_init(uint32_t speed, uint8_t cpha, uint8_t cpol); + +/** +* @brief spi master 去初始化 +* @param none +* @retval none +*/ +void hal_spim_deinit(void); + +/** +* @brief spi master自定义CS脚 +* @param none +* @retval none +*/ +void hal_spim_set_csio_byself(bool enable); + +/** +* @brief 获取dma tx 传输状态 +* @param none +* @retval true:传输完成, false:传输数据中,不可操作spim接口 +*/ +bool hal_spim_get_transfer_complete(void); + +/** +* @brief spim flush fifo +* @param none +* @retval none +*/ +void hal_spim_flush(void); + +/** +* @brief spim 发送数据,函数返回即传输完成,阻塞函数 +* @param tx_buffer:tx buffer地址 +* @param tx_size: tx size +* @retval none +*/ +void hal_spim_write(const uint8_t *data_buffer, uint32_t data_size); + +/** +* @brief spi master读写数据,函数返回即传输完成,阻塞函数 +* @param cmd : 传输过程汇总需要发送command的地址 +* @param cmd_size: 传输过程汇总需要发送command的数据长度 +* @param rx_buffer:rx buffer地址 +* @param rx_size: rx buffer size +* @retval none +*/ +void hal_spim_read(const uint8_t *cmd, uint32_t cmd_size, uint8_t *data_buffer, uint32_t data_size); + + +#endif + diff --git a/src/sdk/include/hal_spi_slave.h b/src/sdk/include/hal_spi_slave.h new file mode 100644 index 0000000..97b90ba --- /dev/null +++ b/src/sdk/include/hal_spi_slave.h @@ -0,0 +1,217 @@ +/******************************************************************************* +* Copyright (C) 2021-2025, All Rights Reserved. +* +* File: hal_spi_slave.h +* Description hal spi slave 模块头文件 +* Version V0.1 +* Date 2023-07-27 +* Author swx +*******************************************************************************/ +#ifndef __HAL_SPI_SLAVE_H__ +#define __HAL_SPI_SLAVE_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/** +* @brief spi slave event type +*/ +typedef enum +{ + SPIS_EVENT_RCV_FULL = 0x2, /* 数据接收完全 */ + SPIS_EVENT_RCV_CNT = 0x4, /* 数据接收指定阈值 */ + SPIS_EVENT_RCV_CS_RISE = 0x40, /* CS上升沿 */ + SPIS_EVENT_RCV_CS_FALL = 0x80, /* CS下降沿 */ + SPIS_EVENT_ALL_MISS = 0X100, /* ALL MISS中断*/ +} hal_spis_event_e; + +/** +* @brief spi 硬件快速回复配置结构体 +*/ +typedef struct hal_spis_hw_ack_info_t +{ + uint8_t index; + uint8_t cmp_data[4]; /* 匹配最长4byte */ + uint8_t cmp_len; /* 0 - 3 */ + bool cmp_en; /* 匹配enable */ + uint8_t delay_clk; /* 匹配成功后延迟数据恢复的clk数量,最小设置0,延迟1 clk */ + uint8_t *ack_address; /* 匹配成功回复数据地址 */ + uint32_t ack_length; /* 匹配成功回复数据长度 */ +} hal_spis_hw_ack_info_t; + +/** +* @brief spi 事件 packet info +*/ +typedef struct hal_spis_packet_info_t +{ + uint8_t *rx_buffer; /* 接收buffer */ + uint32_t rx_buffer_size; /* 接收buffer size */ + const uint8_t *tx_buffer; /* 发送buffer */ + uint32_t tx_buffer_size; /* 发送buffer size */ + bool tx_circle; /* 发送circle mode */ + uint32_t packet_size; /* packet size : RCV FULL事件 = rx buffer size, CS_RISE事件时为整个传输过程中SPIM发送packet的总量 */ +} hal_spis_packet_info_t; + +typedef void (*hal_spis_cb)(hal_spis_event_e event, hal_spis_packet_info_t *packet_info); + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/* +SPIS启动流程: +1：hal_spis_init +2：hal_spis_update_rx_buffer & hal_spis_update_tx_buffer +3：hal_spis_register_callback +4：hal_spis_start +等待回调函数并从packet_info获取数据 + +Event: +SPI_EVENT_RCV_FULL,表示RX buffer接收满 , packet_info.packet_size = rx_buffer_size +SPI_EVENT_RCV_CS_HIGH,表示CS 拉高,一帧传输数据结束，此时packet_info.packet_size 为当前packet传输的所有byte数量 + +有可能存在只有SPI_EVENT_RCV_CS_HIGH而没有SPI_EVENT_RCV_FULL的情况,此时表示SPIM发送的数据不足于填满RX buffer +eg: rx_buffer_size = 10, SPIM实际只发送了2byte数据 + +接收到SPI_EVENT_RCV_CS_HIGH后可通过hal_spis_update_tx_buffer更新下一帧需要发送的数据 +也可以通过hal_spis_update_rx_buffer更新接收数据的buffer + +*/ + +/** +* @brief 初始化spi slave 模块 +* @param cpha: 相位配置 +* @param cpol: 极性配置 +* @param +* @retval none +*/ +void hal_spis_init(uint8_t cpha, uint8_t cpol); + +/** +* @brief spi slave 模块去初始化 +* @param none +* @retval none +*/ +void hal_spis_deinit(void); + +/** +* @brief spi slave 注册回调函数 +* @param cb：call back +* @param event_mask：接收事件掩码(eg:SPIS_EVENT_RCV_FULL|SPIS_EVENT_RCV_CS_RISE) +* @param data_intcnt：SPIS_EVENT_RCV_CNT事件触发参数,当rx buffer接收到data_intcnt数据时.产生RCV_CNT事件 +* @retval +*/ +void hal_spis_register_callback(hal_spis_cb cb, uint32_t event_mask, uint16_t data_intcnt); + +/** +* @brief spi slave 设置RX DMA传输数据中断阈值 +* @param data_intcnt：SPIS_EVENT_RCV_CNT事件触发参数,当rx buffer接收到data_intcnt数据时.产生RCV_CNT事件 +* @retval none +*/ +void hal_spis_set_rx_dma_intcnt(uint16_t data_intcnt); + +/** +* @brief spi slave 配置接收buffer, 底层自动接收数据后调用callback +* @param buffer：自动模式数据接收buffer +* @param size： 自动模式数据接收buffer size +* @retval +*/ +void hal_spis_update_rx_buffer(uint8_t *buffer, uint32_t size); + +/** +* @brief spi slave 配置自动发送buffer +* @param buffer：自动模式数据发送buffer +* @param size： 自动模式数据发收buffer size +* @param circle：circle mode，重复发送buffer的数据 +* @retval +*/ +void hal_spis_update_tx_buffer(const uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief spi slave 启动 +* @param none +* @retval +*/ +void hal_spis_start(void); + +/** +* @brief spi slave 停止 +* @param none +* @retval true/false +*/ +void hal_spis_stop(void); + +/** +* @brief spi slave flush fifo +* @param none +* @retval true/false +*/ +void hal_spis_flush(void); + +/** +* @brief 获取SPIS busy状态 +* @param none +* @retval true: CS拉低状态, false:CS拉高状态 +*/ +bool hal_spis_busy(void); + +/** +* @brief 读取rx fifo缓冲数据 +* @param buffer:读取数据的缓冲区 +* @param count:需要读取的字节数 +* @retval uint8_t:实际读取的字节数 +*/ +uint8_t hal_spis_read_data(uint8_t *buffer, uint8_t count); + +/** +* @brief spi slave cpu写一个数据 +* @param data:写的数据 +* @retval true/false +*/ +bool hal_spis_write_data(uint8_t data); + +/** +* @brief 获取rx fifo状态 +* @param none +* @retval true/false +*/ +bool hal_spis_get_rxfifo(void); + +/** +* @brief 设置SPIS硬件快速回复功能使能状态 +* @param en:硬件快速回复功能使能 +* @param header_default:硬件快速回复功能的默认回复值 +* @retval none +*/ +void hal_spis_set_hw_ack_enable(bool en, uint8_t header_default); + +/** +* @brief 获取SPIS硬件快速回复功能使能状态 +* @param void +* @retval bool +*/ +bool hal_spis_get_hw_ack_enable(void); + +/** +* @brief 设置SPIS硬件快速回复header参数 +* @param info:spi硬件快速回复配置结构体数组 +* @param size:设置size组参数 +* @retval none +*/ +void hal_spis_set_hw_ack_info(hal_spis_hw_ack_info_t *info, uint8_t size); + +#endif /* __HAL_SPI_SLAVE_H__*/ + diff --git a/src/sdk/include/hal_swire.h b/src/sdk/include/hal_swire.h new file mode 100644 index 0000000..2d5ff35 --- /dev/null +++ b/src/sdk/include/hal_swire.h @@ -0,0 +1,90 @@ +/******************************************************************************* +* +* +* File: hal_swire.h +* Description： swire HAL层头文件 +* Version： V0.1 +* Date： 2021-03-17 +* Author： jaya + *******************************************************************************/ +#ifndef __HAL_SWIRE_H__ +#define __HAL_SWIRE_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief SWIRE初始化 +* @param 无 +* @retval 无 +*/ +void hal_swire_init(void); + +/** +* @brief SWIRE去初始化 +* @param 无 +* @retval 无 +*/ +void hal_swire_deinit(void); + +/** +* @brief 配置SWIRE波形 +* @param start_time：起始时长，单位us +* @param stop_time：结束时长，单位us，必须大于300us +* @param high_time：高电平时长，单位us +* @param low_time：低电平时长，单位us +* @retval 无 +*/ +void hal_swire_set_waveform(uint32_t start_time, uint32_t stop_time, + uint32_t high_time, uint32_t low_time); + + +/** +* @brief 配置SWIRE脉冲个数 +* @param pulse：脉冲数 +* @retval 无 +*/ +void hal_swire_set_pulse(uint32_t pulse); + +/** +* @brief 开关swire输出,不绑定timer的情况下,每次调用hal_swire_set_pulse产生一个swire波形 +* @param state：开关控制 +* @retval 无 +*/ +void hal_swire_enable(bool state); + +/** +* @brief 配置swire选择的timer +* @param timer_num_e index：定时器编号 +* @param uint32_t ms：超时时间 +* @param repeat :是否重复 +* @retval 无 +*/ +void hal_swire_set_timer(timer_num_e index, uint32_t ms, bool repeat); + +/** +* @brief 注册回调函数,每次swire 发送完成后会产生回调 +* @param cb_func：回调函数地址 +* @retval 无 +*/ +void hal_swire_register_callback(fcb_type cb_func); + +#endif /* __HAL_SWIRE_H__ */ diff --git a/src/sdk/include/hal_system.h b/src/sdk/include/hal_system.h new file mode 100644 index 0000000..26df5c5 --- /dev/null +++ b/src/sdk/include/hal_system.h @@ -0,0 +1,114 @@ +/******************************************************************************* +* +* +* File: hal_system.h +* Description hal 通用系统接口头文件 +* Version V0.1 +* Date 2021-05-21 +* Author lzy + *******************************************************************************/ +#ifndef __HAL_SYSTEM_H__ +#define __HAL_SYSTEM_H__ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_common.h" +#include "hal_gpio.h" +#include "tau_log.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/** +* @brief 系统时钟配置 +*/ +typedef enum +{ + HAL_SYSCLK_80M = 80000000, + HAL_SYSCLK_100M = 100000000, + HAL_SYSCLK_150M = 150000000 +} hal_system_clk_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief system 初始化 +* @param sysclk:系统时钟 +* @retval none +*/ +void hal_system_init(hal_system_clk_e sysclk); + +/** +* @brief mcu进入idle模式,等待中断唤醒 +* @param disable_systick: 进入idle时是否关闭systick(退出idle 恢复systick) +* @retval none +*/ +void hal_system_idle_mode(bool disable_systick); + +/** +* @brief 注册systick回调函数 +* @param cb_func：回调函数地址 +* @retval 无 +*/ +void hal_system_register_systick_cb(fcb_type cb_func); + +/** +* @brief 启动sys tickt +* @param ms: sys tickt 间隔, 范围1-10ms +* @retval true/false +*/ +bool hal_system_enable_systick(uint8_t ms); + +/** +* @brief 获取systickt +* @param none +* @retval 当前systickt值 +*/ +bool hal_system_disable_systick(void); + +/** +* @brief 获取systickt +* @param none +* @retval 当前systickt值 +*/ +uint32_t hal_system_get_tick(void); + +/** +* @brief reset chip +* @param none +* @retval none +*/ +void hal_system_reset_chip(void); + +/** +* @brief 获取上位机设置的debug state(debug only) +* @param none +* @retval debug state +*/ +uint32_t hal_system_get_debug_state(void); + +/** +* @brief clear debug state(debug only) +* @param none +* @retval none +*/ +void hal_system_clear_debug_state(void); + +/** +* @brief 更新MCU时钟 +* @param sysclk:系统时钟 +* @retval true/false +*/ +bool hal_system_updata_sysclk(hal_system_clk_e sysclk); + +#endif //__HAL_SYSTEM_H__ diff --git a/src/sdk/include/hal_timer.h b/src/sdk/include/hal_timer.h new file mode 100644 index 0000000..f73566b --- /dev/null +++ b/src/sdk/include/hal_timer.h @@ -0,0 +1,92 @@ +/******************************************************************************* +* +* +* File: hal_timer.h +* Description： timer HAL层头文件 +* Version： V0.1 +* Date： 2021-03-16 +* Author： jaya + *******************************************************************************/ +#ifndef __HAL_TIMER_H__ +#define __HAL_TIMER_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 指定定时器初始化 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval None +*/ +void hal_timer_init(timer_num_e index); + +/** +* @brief 指定定时器反初始化 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval None +*/ +void hal_timer_deinit(timer_num_e index); + +/** +* @brief 启动指定定时器 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @param ms：超时时间，单位ms。由于应用场景一般是ms级别的，应用开发不需要计数具体时针数， + 故直接输入时间，在接口内部换算成时钟数进行寄存器设置。 +* @param cb_func：回调函数地址，不需要则填NULL +* @param data：回调函数的参数地址，不需要则填NULL +* @retval None +*/ +void hal_timer_start(timer_num_e index, uint32_t ms, fcb_type cb_func, void *data); + +/** +* @brief 启动指定定时器 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @param us：超时时间，单位us。由于应用场景一般是us级别的，应用开发不需要计数具体时针数， + 故直接输入时间，在接口内部换算成时钟数进行寄存器设置。 +* @param cb_func：回调函数地址，不需要则填NULL +* @param data：回调函数的参数地址，不需要则填NULL +* @retval None +*/ +void hal_timer_start_ex(timer_num_e index, uint32_t us, fcb_type cb_func, void *data); + +/** +* @brief 停止指定定时器 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval None +*/ +void hal_timer_stop(timer_num_e index); + +/** +* @brief 设置定时器是否循环超时 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @param bool enable：循环超时使能 +* @retval None +*/ +void hal_timer_set_repeat(timer_num_e index, bool repeat); + +/** +* @brief 获取指定指示器状态 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval 参考timer_status_e +*/ +timer_status_e hal_timer_get_status(timer_num_e index); + +#endif /* __HAL_TIMER_H__ */ diff --git a/src/sdk/include/hal_uart.h b/src/sdk/include/hal_uart.h new file mode 100644 index 0000000..4760521 --- /dev/null +++ b/src/sdk/include/hal_uart.h @@ -0,0 +1,164 @@ +/******************************************************************************* +* +* +* File: hal_uart.h +* Description +* Version V0.1 +* Date 2021-11-24 +* Author kc +*******************************************************************************/ + +#ifndef __HAL_UART_H__ +#define __HAL_UART_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/** +* @brief UART停止位 +*/ +typedef enum +{ + HAL_UART_STOPBIT_1 = 0, + HAL_UART_STOPBIT_1P5 = 1, + HAL_UART_STOPBIT_2 = 1 +} hal_uart_stopbit_e; + +/** +* @brief UART极性 +*/ +typedef enum +{ + HAL_UART_PARITY_NO = 0, + HAL_UART_PARITY_ODD = 0x01, + HAL_UART_PARITY_EVEN = 0x03, +} hal_uart_parity_e; + +/** +* @brief UART数据宽度 +*/ +typedef enum +{ + HAL_UART_DATAWIDTH_5 = 0, + HAL_UART_DATAWIDTH_6 = 1, + HAL_UART_DATAWIDTH_7 = 2, + HAL_UART_DATAWIDTH_8 = 3 +} hal_uart_datawidth_e; + +/** +* @brief UART编号 +*/ +typedef enum +{ + HAL_UART_0, + HAL_UART_1, + HAL_UART_MAX +} hal_uart_num_e; + +typedef struct +{ + uint32_t baudrate; + hal_uart_stopbit_e stopbits; + hal_uart_datawidth_e data_width; + hal_uart_parity_e parity; + uart_trans_cb callback; + void *user_data; +} hal_uart_config_t; + +/** +* @brief UART DMA 通道TX/RX方向选择 +*/ +typedef enum +{ + HAL_UART0_DMA_PATH_TX, + HAL_UART0_DMA_PATH_RX, + HAL_UART1_DMA_PATH_TX, + HAL_UART1_DMA_PATH_RX, + HAL_UART_DMA_PATH_MAX +} hal_uart_dma_path_e; +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 初始化设置uart 传输的波特率、位宽等参数 +* @param hal_uart_config_t +* @retval hal_uart_status +*/ +void hal_uart_init(hal_uart_num_e num, hal_uart_config_t *huart); + +/** +* @brief 关闭uart口 +* @retval 无 +*/ +void hal_uart_deinit(hal_uart_num_e num); + +/** +* @brief 阻塞式发送数据 +* @param pdata:传输数据指针 +* @param size:传输数据大小 +* @retval hal_uart_status +*/ +bool hal_uart_send_blocking(hal_uart_num_e num, uint8_t *pdata, uint16_t size); + +/** +* @brief 阻塞式接收数据 +* @param pdata:传输数据指针 +* @param size:传输数据大小 +* @retval hal_uart_status +*/ +bool hal_uart_recv_blocking(hal_uart_num_e num, uint8_t *pdata, uint16_t size); + +/** +* @brief 中断非阻塞式发送数据 +* @param pdata:传输数据指针 +* @param size:传输数据大小 +* @retval 状态 +*/ +bool hal_uart_send_none_blocking(hal_uart_num_e num, uint8_t *pdata, uint16_t size); + +/** +* @brief 中断非阻塞式接收数据 +* @param pdata:传输数据指针 +* @param size:传输数据大小 +* @retval hal_uart_status +*/ +bool hal_uart_recv_none_blocking(hal_uart_num_e num, uint8_t *pdata, uint16_t size); + +/** +* @brief 使用DMA通道发送数据 +* @param num: 串口编号 串口0或串口1 +* @param pdata:传输数据指针 +* @param size:传输数据大小 +* @retval true or false +*/ +bool hal_uart_dma_send(hal_uart_num_e num, uint8_t *pdata, uint16_t size); + +/** +* @brief 使用DMA接收数据 +* @param num: 串口编号 串口0或串口1 +* @param pdata:传输数据指针 +* @param size:传输数据大小 +* @retval true or false +*/ +bool hal_uart_dma_recv(hal_uart_num_e num, uint8_t *pdata, uint16_t size); + +/** +* @brief UART DMA通道不再使用后关闭释放UART DMA资源 +* @param path:TX通道或RX通道 +* @retval void +*/ +void hal_uart_dma_path_close(hal_uart_dma_path_e path); +#endif /* __HAL_UART_H__ */ diff --git a/src/sdk/include/hal_wdg.h b/src/sdk/include/hal_wdg.h new file mode 100644 index 0000000..8e40ee3 --- /dev/null +++ b/src/sdk/include/hal_wdg.h @@ -0,0 +1,94 @@ +/******************************************************************************* +* +* +* File: hal_wdg.h +* Description： wdg HAL层头文件 +* Version： V0.1 +* Date： 2021-03-16 +* Author： jaya + *******************************************************************************/ +#ifndef __HAL_WDG_H__ +#define __HAL_WDG_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! + * @brief watch dog模式 + */ +typedef enum +{ + WDG_MODE_RESET = 0, //复位模式，跑飞复位 + WDG_MODE_INTERRUPT = 1 //中断模式，跑飞进入中断 +} wdg_mode_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 看门狗初始化 +* @param 无 +* @retval 无 +*/ +void hal_wdg_init(void); + +/** +* @brief 看门狗反初始化 +* @param 无 +* @retval 无 +*/ +void hal_wdg_deinit(void); + +/** +* @brief 启动看门狗 +* @param wdg_mode_e modeSel: 复位或中断模式 +* @param uint32_t load: 超时时间，单位ms +* @retval 无 +*/ +void hal_wdg_start(wdg_mode_e modeSel, uint32_t load); + +/** +* @brief 停止看门狗 +* @param 无 +* @retval 无 +*/ +void hal_wdg_stop(void); + +/** +* @brief 设置WDG是否循环超时 +* @param enable：循环超时使能 +* @retval 无 +*/ +void hal_wdg_set_repeat(bool repeat); + +/** +* @brief 注册中断回调函数 +* @param cb_func：回调函数地址 +* @param data：回调参数地址 +* @retval 无 +*/ +void hal_wdg_register_callback(fcb_type cb_func, void *data); + +/** +* @brief 喂狗 +* @param 无 +* @retval 无 +*/ +void hal_wdg_kick_dog(void); + +#endif /* __HAL_WDG_H__ */ diff --git a/src/sdk/sdk_version.h b/src/sdk/sdk_version.h new file mode 100644 index 0000000..398c0e5 --- /dev/null +++ b/src/sdk/sdk_version.h @@ -0,0 +1 @@ +#define SDK_REVISION 6000 \ No newline at end of file