commit 45974a2785b065433dbacd659846a084185e8909 Author: “苏飞源” Date: Thu Jul 13 18:37:36 2023 +0800 1、首次提交 2、解决唤醒抖动分屏问题 diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..243d6b9 --- /dev/null +++ b/.gitignore @@ -0,0 +1,85 @@ +# A .gitignore for Keil projects. +# Taken mostly from http://www.keil.com/support/man/docs/uv4/uv4_b_filetypes.htm + +# User-specific uVision files +*.opt +*.uvopt +*.uvoptx +*.uvgui +*.uvgui.* +*.uvguix.* + +# Listing files +#*.cod +#*.map +#*.m51 +#*.m66 +*._ip +*.i +*.lst +*/Listings/*.txt + +# define exception below if needed +*.scr + +# Object and HEX files +*.axf +*.b[0-3][0-9] +*.hex +*.d +*.crf +*.elf +*.hex +*.h86 +*.obj +*.o +*.sbr +*.htm + +# Build files +# define exception below if needed +*.bat +*._ia +*.__i +*._ii + +# Generated output files +/Listings/* +/Objects/* + +# Debugger files +# define exception below if needed +*.ini + +# Other files +*.build_log.htm +*.cdb +*.dep +*.ic +*.lin +*.lnp +*.orc +# define exception below if needed +*.pack +# define exception below if needed +*.pdsc +*.plg +# define exception below if needed +*.sct +*.sfd +*.sfr + +# Miscellaneous +*.tra +*.fed +*.l1p +*.l2p +*.iex + + +/si/ +!*.bin +!*.map + +# To explicitly override the above, define any exceptions here; e.g.: +# !my_customized_scatter_file.sct diff --git a/project/ISP_568/ISP_568.uvprojx b/project/ISP_568/ISP_568.uvprojx new file mode 100644 index 0000000..6f29ba6 --- /dev/null +++ b/project/ISP_568/ISP_568.uvprojx @@ -0,0 +1,521 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ISP_568 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM0 + ARM + ARM.CMSIS.5.5.1 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + 0 + $$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h + + + + + + + + + + $$Device:ARMCM0$Device\ARM\SVD\ARMCM0.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Objects\ + ISP_568_Pixel7Pro + 1 + 0 + 1 + 1 + 1 + .\Listings\ + 1 + 0 + 1 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + ..\..\ISP_568_TP.BAT + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin -o .\Objects\@L.bin .\Objects\@L.axf + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 16 + 1 + 1 + 0 + 0 + 4 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x2000 + + + 1 + 0x10000 + 0x10000 + + + 0 + 0x70000 + 0xf0 + + + 0 + 0x70100 + 0xd0 + + + 0 + 0x701d0 + 0x7e30 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 4 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + ISP_568 + + ..\..\src;..\..\src\board;..\..\src\common;..\..\src\sdk\include;..\..\src\app\ap_demo;..\..\src\sdk\include\M0;..\..\src\app;..\..\src\app\module_demo;..\..\src\app\touch;..\..\src\app\S8;..\..\src\app\S9;..\CVWL568 + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + app + + + main.c + 1 + ..\..\src\app\main.c + + + ap_demo.c + 1 + ..\..\src\app\ap_demo\ap_demo.c + + + app_tp_transfer.c + 1 + ..\..\src\app\ap_demo\app_tp_transfer.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + ISP_568_TP.lib + 4 + ..\..\src\app\ap_demo\ISP_568_TP.lib + + + + + driver + + + CVWL568.lib + 4 + ..\..\src\sdk\CVWL568\lib\CVWL568.lib + + + + + board + + + board.c + 1 + ..\..\src\board\board.c + + + + + startup + + + startup_ARMCM0.s + 2 + ..\..\src\board\startup\startup_ARMCM0.s + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + RTE\Device\ARMCM0\startup_ARMCM0.s + + + + + + RTE\Device\ARMCM0\system_ARMCM0.c + + + + + + + + diff --git a/project/ISP_568/Listings/ISP_568_Pixel6Pro_TP_DEBUG.map b/project/ISP_568/Listings/ISP_568_Pixel6Pro_TP_DEBUG.map new file mode 100644 index 0000000..c1323e3 --- /dev/null +++ b/project/ISP_568/Listings/ISP_568_Pixel6Pro_TP_DEBUG.map @@ -0,0 +1,2839 @@ +Component: ARM Compiler 5.06 update 7 (build 960) Tool: armlink [4d3601] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.PWM_OUTPUT_TEST) refers to ap_demo.o(i.test_pwm_out_adjust) for test_pwm_out_adjust + ap_demo.o(i.PWM_OUTPUT_TEST) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.PWM_Task) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(i.tp_io_init) for tp_io_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(i.tp_proc) for tp_proc + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tp_heartbeat_exec) for tp_heartbeat_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) for ap_tp_scan_point_record_event_exec + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + ap_demo.o(i.ap_demo) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_reset_cb) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_reset_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.ap_set_backlight) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_backlight_B1) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_backlight_B1) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_on) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_on) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_update_frame_rate) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) for hal_dsi_rx_ctrl_set_tear_mode_ex + ap_demo.o(i.ap_update_frame_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_update_frame_rate) refers to ap_demo.o(.data) for .data + ap_demo.o(i.app_tp_calibration_exec) refers to app_tp_transfer.o(i.ap_tp_calibration) for ap_tp_calibration + ap_demo.o(i.app_tp_calibration_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.app_tp_calibration_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.init_panel) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.init_panel) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) for hal_dsi_rx_ctrl_hight_performan_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.test_pwm_out_adjust) refers to uidiv.o(.text) for __aeabi_uidivmod + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_init) for hal_pwm_out_init + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_config_all) for hal_pwm_out_config_all + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_sync_all) for hal_pwm_out_sync_all + ap_demo.o(i.tp_heartbeat_exec) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + ap_demo.o(i.tp_heartbeat_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_transfer.o(i.ap_tp_system_softReset) for ap_tp_system_softReset + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_transfer.o(.data) for s_screen_init_complate + ap_demo.o(i.tp_heartbeat_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight) for ap_set_backlight + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight_B1) for ap_set_backlight_B1 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.ap_tp_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.ap_tp_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.ap_tp_scan_point_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.ap_tp_scan_point_record_event) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) refers to app_tp_transfer.o(i.ap_tp_simulate_finger_release_event) for ap_tp_simulate_finger_release_event + app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) refers to app_tp_transfer.o(i.ap_tp_scan_point_init) for ap_tp_scan_point_init + app_tp_transfer.o(i.ap_tp_scan_point_record_event_exec) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.ap_tp_simulate_finger_release_event) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_system_softReset) refers to app_tp_transfer.o(i.ap_tp_simulate_finger_release_event) for ap_tp_simulate_finger_release_event + app_tp_transfer.o(i.ap_tp_system_softReset) refers to app_tp_transfer.o(i.ap_tp_scan_point_init) for ap_tp_scan_point_init + app_tp_transfer.o(i.ap_tp_system_softReset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.ap_tp_system_softReset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.ap_tp_system_softReset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_system_softReset) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_spi_slave.o(i.hal_spi_slave_reset_tx) for hal_spi_slave_reset_tx + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_spis_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_transfer.o(i.app_tp_spis_callback) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_spis_callback) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_spis_callback) refers to app_tp_transfer.o(.conststring) for .conststring + app_tp_transfer.o(i.app_tp_spis_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.slave_SPI_init) refers to hal_spi_slave.o(i.hal_spi_slave_init) for hal_spi_slave_init + app_tp_transfer.o(i.slave_SPI_init) refers to hal_spi_slave.o(i.hal_spi_slave_register_callback) for hal_spi_slave_register_callback + app_tp_transfer.o(i.slave_SPI_init) refers to hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) for hal_spi_slave_auto_transfer_abort + app_tp_transfer.o(i.slave_SPI_init) refers to hal_spi_slave.o(i.hal_spi_slave_flush_fifo) for hal_spi_slave_flush_fifo + app_tp_transfer.o(i.slave_SPI_init) refers to hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) for hal_spi_slave_set_auto_rx_buffer + app_tp_transfer.o(i.slave_SPI_init) refers to hal_spi_slave.o(i.hal_spi_slave_enable) for hal_spi_slave_enable + app_tp_transfer.o(i.slave_SPI_init) refers to hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) for hal_spi_slave_auto_transfer_start + app_tp_transfer.o(i.slave_SPI_init) refers to app_tp_transfer.o(i.app_tp_spis_callback) for app_tp_spis_callback + app_tp_transfer.o(i.slave_SPI_init) refers to app_tp_transfer.o(.bss) for .bss + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to tau_log.o(i.fputc) for fputc + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to app_tp_for_custom_s8.o(i.M_delay_ms) for M_delay_ms + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to app_tp_for_custom_s8.o(i.bin_send) for bin_send + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.FingerPos2RawData) refers to idiv.o(.text) for __aeabi_idivmod + app_tp_for_custom_s8.o(i.FingerPos2RawData) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.FingerPos2RawData) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.FingerPos2RawData) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.Get_IIC_Addr) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_for_custom_s8.o(i.Get_IIC_Addr) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_for_custom_s8.o(i.Get_IIC_Addr) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_for_custom_s8.o(i.Get_IIC_Addr) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.Get_IIC_Addr) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.IIC_WriteM_ReadN) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_for_custom_s8.o(i.IIC_WriteM_ReadN) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_for_custom_s8.o(i.IIC_WriteM_ReadN) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.Read_TP_Data) refers to app_tp_for_custom_s8.o(i.Get_IIC_Addr) for Get_IIC_Addr + app_tp_for_custom_s8.o(i.Read_TP_Data) refers to app_tp_for_custom_s8.o(i.IIC_WriteM_ReadN) for IIC_WriteM_ReadN + app_tp_for_custom_s8.o(i.Read_TP_Data) refers to idiv.o(.text) for __aeabi_idivmod + app_tp_for_custom_s8.o(i.Read_TP_Data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.Read_TP_Data) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.Read_TP_Data) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_spis_irq) refers to app_tp_for_custom_s8.o(i.spis_cs_irq) for spis_cs_irq + app_tp_for_custom_s8.o(i.bin_send) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_for_custom_s8.o(i.bin_send) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_for_custom_s8.o(i.bin_send) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_for_custom_s8.o(i.bin_send) refers to app_tp_for_custom_s8.o(i.M_delay_ms) for M_delay_ms + app_tp_for_custom_s8.o(i.bin_send) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + app_tp_for_custom_s8.o(i.bin_send) refers to tau_log.o(i.fputc) for fputc + app_tp_for_custom_s8.o(i.bin_send) refers to norflash.o(i.norflash_init) for norflash_init + app_tp_for_custom_s8.o(i.bin_send) refers to hal_system.o(i.hal_system_share_flash_mode) for hal_system_share_flash_mode + app_tp_for_custom_s8.o(i.bin_send) refers to norflash.o(i.norflash_read) for norflash_read + app_tp_for_custom_s8.o(i.delay_test) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_for_custom_s8.o(i.delay_test) refers to app_tp_for_custom_s8.o(i.M_delay_180ns) for M_delay_180ns + app_tp_for_custom_s8.o(i.delay_test) refers to app_tp_for_custom_s8.o(i.M_delay_ms) for M_delay_ms + app_tp_for_custom_s8.o(i.delay_test) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.iic_tp_proc) refers to app_tp_for_custom_s8.o(i.Read_TP_Data) for Read_TP_Data + app_tp_for_custom_s8.o(i.iic_tp_proc) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.init_tp_proc) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_for_custom_s8.o(i.init_tp_proc) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_for_custom_s8.o(i.init_tp_proc) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_for_custom_s8.o(i.init_tp_proc) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_for_custom_s8.o(i.init_tp_proc) refers to app_tp_for_custom_s8.o(i.tp_motion_irq) for tp_motion_irq + app_tp_for_custom_s8.o(i.init_tp_proc) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.spi_init_proc) refers to hal_spi_slave.o(i.hal_spi_slave_init) for hal_spi_slave_init + app_tp_for_custom_s8.o(i.spi_init_proc) refers to hal_spi_slave.o(i.hal_spi_slave_register_callback) for hal_spi_slave_register_callback + app_tp_for_custom_s8.o(i.spi_init_proc) refers to hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) for hal_spi_slave_auto_transfer_abort + app_tp_for_custom_s8.o(i.spi_init_proc) refers to hal_spi_slave.o(i.hal_spi_slave_flush_fifo) for hal_spi_slave_flush_fifo + app_tp_for_custom_s8.o(i.spi_init_proc) refers to hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) for hal_spi_slave_set_auto_rx_buffer + app_tp_for_custom_s8.o(i.spi_init_proc) refers to hal_spi_slave.o(i.hal_spi_slave_enable) for hal_spi_slave_enable + app_tp_for_custom_s8.o(i.spi_init_proc) refers to hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) for hal_spi_slave_auto_transfer_start + app_tp_for_custom_s8.o(i.spi_init_proc) refers to app_tp_for_custom_s8.o(i.app_tp_spis_irq) for app_tp_spis_irq + app_tp_for_custom_s8.o(i.spi_init_proc) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.spis_cs_irq) refers to hal_spi_slave.o(i.hal_spi_slave_reset_tx) for hal_spi_slave_reset_tx + app_tp_for_custom_s8.o(i.spis_cs_irq) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.spis_cs_irq) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.spis_cs_irq) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.tp_create_report) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.tp_create_report) refers to hal_spi_slave.o(i.hal_spi_slave_reset_tx) for hal_spi_slave_reset_tx + app_tp_for_custom_s8.o(i.tp_create_report) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.tp_create_report) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.tp_init_proc) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_for_custom_s8.o(i.tp_init_proc) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_for_custom_s8.o(i.tp_init_proc) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_for_custom_s8.o(i.tp_init_proc) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_for_custom_s8.o(i.tp_init_proc) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_for_custom_s8.o(i.tp_init_proc) refers to app_tp_for_custom_s8.o(i.tp_motion_irq) for tp_motion_irq + app_tp_for_custom_s8.o(i.tp_init_proc) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.tp_io_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_for_custom_s8.o(i.tp_io_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_for_custom_s8.o(i.tp_motion_irq) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(i.tp_init_proc) for tp_init_proc + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(i.spi_init_proc) for spi_init_proc + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(.ARM.__at_0x1A100) for LibCheckEncrypt + app_tp_for_custom_s8.o(i.tp_proc) refers to norflash.o(i.norflash_init) for norflash_init + app_tp_for_custom_s8.o(i.tp_proc) refers to hal_system.o(i.hal_system_share_flash_mode) for hal_system_share_flash_mode + app_tp_for_custom_s8.o(i.tp_proc) refers to norflash.o(i.norflash_read) for norflash_read + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(i.iic_tp_proc) for iic_tp_proc + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(i.FingerPos2RawData) for FingerPos2RawData + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(i.tp_create_report) for tp_create_report + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(i.M_delay_us) for M_delay_us + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(i.type_config_ch) for type_config_ch + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.type_config_ch) refers to hal_system.o(i.hal_system_share_flash_mode) for hal_system_share_flash_mode + app_tp_for_custom_s8.o(i.type_config_ch) refers to norflash.o(i.norflash_erase_sector) for norflash_erase_sector + app_tp_for_custom_s8.o(i.type_config_ch) refers to norflash.o(i.norflash_write) for norflash_write + app_tp_for_custom_s8.o(i.type_config_ch) refers to app_tp_for_custom_s8.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) for hal_internal_sync_input_resolution_change_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_dsi_tx_ctrl.o(.conststring) for .conststring + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) for hal_internal_vsync_update_lcdc_addr + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te) refers to hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) for hal_internal_sync_cmd_mode_rcv_te + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) for hal_dsi_tx_ctrl_set_rect_pixel_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) for hal_dsi_tx_ctrl_draw_flicker + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) for hal_dsi_tx_ctrl_draw_chessboard + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_set_prefetch) for drv_lcdc_set_prefetch + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_config_intr) for drv_i2c_s_config_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c0_set_callback) for drv_i2c0_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_sel) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_pwm.o(i.hal_pwm_in_clear_int) refers to drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all) for drv_pwm_in_clear_pwm_int_all + hal_pwm.o(i.hal_pwm_in_config_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_in_ctrl_int) refers to drv_pwm.o(i.drv_pwm_in_set_sys_int) for drv_pwm_in_set_sys_int + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_get_current_count) refers to drv_pwm.o(i.drv_pwm_in_get_current_count) for drv_pwm_in_get_current_count + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_pwm.o(i.drv_pwm_in_get_high_period) for drv_pwm_in_get_high_period + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_pwm.o(i.drv_pwm_in_get_low_period) for drv_pwm_in_get_low_period + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_pwm.o(i.drv_pwm_in_get_counter_period) for drv_pwm_in_get_counter_period + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_in_init) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_register_callback) refers to drv_pwm.o(i.drv_pwm_in_register_callback) for drv_pwm_in_register_callback + hal_pwm.o(i.hal_pwm_in_set_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_config_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(i.hal_pwm_out_common_config) for hal_pwm_out_common_config + hal_pwm.o(i.hal_pwm_out_convert_time) refers to tau_delay.o(i.delayUs) for delayUs + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_get_sync_flag) for drv_pwm_out_get_sync_flag + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_deinit) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sel_io) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_out_sync_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_common.o(.data) for g_system_clock + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_system.o(i.hal_system_flash_read) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_dual_read) for norflash_dual_read + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_erase_block) for norflash_erase_block + hal_system.o(i.hal_system_flash_write) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_write) for norflash_write + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c1_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c0_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_slave_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000F) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$00000011) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry12b.o(.ARM.Collect$$$$0000000E) for __rt_lib_shutdown_fini + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(i.PWM_OUTPUT_TEST), (44 bytes). + Removing ap_demo.o(i.PWM_Task), (12 bytes). + Removing ap_demo.o(i.test_pwm_out_adjust), (104 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (1 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.S20_Start_init), (492 bytes). + Removing app_tp_transfer.o(i.ap_tp_scan_point_record_event), (148 bytes). + Removing app_tp_transfer.o(i.app_tp_init), (48 bytes). + Removing app_tp_transfer.o(i.app_tp_m_read), (32 bytes). + Removing app_tp_transfer.o(i.app_tp_m_transfer_complate), (8 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_clear_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_read), (2 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_transfer.o(i.app_tp_s_write), (10 bytes). + Removing app_tp_transfer.o(i.app_tp_screen_init), (52 bytes). + Removing app_tp_transfer.o(i.app_tp_screen_int_callback), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_spis_callback), (88 bytes). + Removing app_tp_transfer.o(i.app_tp_transfer_screen_const), (64 bytes). + Removing app_tp_transfer.o(i.app_tp_transfer_screen_int), (232 bytes). + Removing app_tp_transfer.o(i.app_tp_transfer_screen_start), (20 bytes). + Removing app_tp_transfer.o(i.slave_SPI_init), (56 bytes). + Removing app_tp_transfer.o(.bss), (200 bytes). + Removing app_tp_transfer.o(.conststring), (98 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (5 bytes). + Removing app_tp_transfer.o(.data), (6 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (1 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.M_delay_180ns), (12 bytes). + Removing app_tp_for_custom_s8.o(i.delay_test), (60 bytes). + Removing app_tp_for_custom_s8.o(i.init_tp_proc), (60 bytes). + Removing app_tp_for_custom_s8.o(.bss), (100 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (12 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (16 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter), (108 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data), (268 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (188 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex), (32 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (148 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te), (10 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard), (280 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker), (172 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init), (30 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (140 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm), (32 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data), (272 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (80 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback), (16 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_dma_write), (76 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_init), (200 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read), (20 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (32 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (40 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_sel), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_transfer), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (32 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_slave_irq_callback), (372 bytes). + Removing hal_i2c_slave.o(.constdata), (32 bytes). + Removing hal_i2c_slave.o(.data), (32 bytes). + Removing hal_pwm.o(.rev16_text), (4 bytes). + Removing hal_pwm.o(.revsh_text), (4 bytes). + Removing hal_pwm.o(i.hal_pwm_in_clear_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_config_int), (60 bytes). + Removing hal_pwm.o(i.hal_pwm_in_ctrl_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_deinit), (18 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_current_count), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_high_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_low_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_total_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_init), (26 bytes). + Removing hal_pwm.o(i.hal_pwm_in_register_callback), (10 bytes). + Removing hal_pwm.o(i.hal_pwm_in_set_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_common_config), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_config_all), (16 bytes). + Removing hal_pwm.o(i.hal_pwm_out_config_duty_ratio), (76 bytes). + Removing hal_pwm.o(i.hal_pwm_out_convert_time), (164 bytes). + Removing hal_pwm.o(i.hal_pwm_out_deinit), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_init), (12 bytes). + Removing hal_pwm.o(i.hal_pwm_out_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sel_io), (38 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_all), (16 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_ctl), (30 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_pause), (28 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_period), (48 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_thr), (52 bytes). + Removing hal_pwm.o(.data), (1 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_clear_rxfifo), (14 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (112 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_flash_read), (52 bytes). + Removing hal_system.o(i.hal_system_flash_write), (60 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_clocks), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_enable_channel_interrupts), (36 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_dma.o(i.drv_i2c_dma_callback), (52 bytes). + Removing drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback), (88 bytes). + Removing drv_i2c_dma.o(i.drv_i2c_slave_write_dma), (24 bytes). + Removing drv_i2c_dma.o(.bss), (320 bytes). + Removing drv_i2c_dma.o(.data), (8 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c0_set_callback), (12 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit), (66 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_config_intr), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_enable), (8 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status), (20 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (30 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (16 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_intr), (80 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_write_data), (28 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_slave_init), (50 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_scld_filter), (100 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (64 bytes). + Removing drv_pwm.o(i.drv_pwm_out_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_control), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_threshold), (12 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_set_frame_buff_pd), (28 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_read_data), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (168 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex), (468 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr), (48 bytes). + Removing hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler), (476 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (6 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing dflti.o(.text), (40 bytes). + +569 unused section(s) (total 26078 bytes) removed from the image. diff --git a/project/ISP_568/Listings/ISP_568_Pixel7Pro.map b/project/ISP_568/Listings/ISP_568_Pixel7Pro.map new file mode 100644 index 0000000..7312eb4 --- /dev/null +++ b/project/ISP_568/Listings/ISP_568_Pixel7Pro.map @@ -0,0 +1,5205 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.PWM_OUTPUT_TEST) refers to ap_demo.o(i.test_pwm_out_adjust) for test_pwm_out_adjust + ap_demo.o(i.PWM_OUTPUT_TEST) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.PWM_Task) refers to ap_demo.o(.data) for .data + ap_demo.o(i.PWM_init) refers to hal_pwm.o(i.hal_pwm_out_init) for hal_pwm_out_init + ap_demo.o(i.PWM_init) refers to hal_pwm.o(i.hal_pwm_out_config_all) for hal_pwm_out_config_all + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(i.tp_io_init) for tp_io_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(i.tp_proc) for tp_proc + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + ap_demo.o(i.ap_demo) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_ca) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + ap_demo.o(i.ap_get_reg_df) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_get_reg_df) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_reset_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.ap_set_backlight) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_backlight_B1) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_backlight_B1) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_on) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + ap_demo.o(i.ap_set_display_on) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.ap_set_display_on) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_display_on) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_on) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_update_frame_rate) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) for hal_dsi_rx_ctrl_set_tear_mode_ex + ap_demo.o(i.ap_update_frame_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_update_frame_rate) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.init_panel) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.init_panel) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_te_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + ap_demo.o(i.soft_te_timer_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_te_timer_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_te_timer_init) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.soft_te_timer_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.soft_te_timer_init) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.soft_te_timer_init) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_te_timer_init) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_te_timer_init) refers to ap_demo.o(i.soft_te_timer_cb) for soft_te_timer_cb + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.test_pwm_out_adjust) refers to uidiv.o(.text) for __aeabi_uidivmod + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_init) for hal_pwm_out_init + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_config_all) for hal_pwm_out_config_all + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_sync_all) for hal_pwm_out_sync_all + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight) for ap_set_backlight + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight_B1) for ap_set_backlight_B1 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to tau_log.o(i.fputc) for fputc + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to app_tp_for_custom_s8.o(i.M_delay_ms) for M_delay_ms + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to app_tp_for_custom_s8.o(i.bin_send) for bin_send + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + app_tp_for_custom_s8.o(.ARM.__at_0x1A100) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.EncryptCheck) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.FST_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_for_custom_s8.o(i.FST_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_for_custom_s8.o(i.FST_tp_init) refers to app_tp_for_custom_s8.o(i.M_delay_us) for M_delay_us + app_tp_for_custom_s8.o(i.FST_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_for_custom_s8.o(i.FST_tp_init) refers to app_tp_for_custom_s8.o(i.M_delay_ms) for M_delay_ms + app_tp_for_custom_s8.o(i.FST_tp_init) refers to app_tp_for_custom_s8.o(i.Read_TP_Data) for Read_TP_Data + app_tp_for_custom_s8.o(i.FST_tp_init) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.FingerPos2RawData) refers to idiv.o(.text) for __aeabi_idivmod + app_tp_for_custom_s8.o(i.FingerPos2RawData) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.Get_IIC_Addr) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_for_custom_s8.o(i.Get_IIC_Addr) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_for_custom_s8.o(i.Get_IIC_Addr) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_for_custom_s8.o(i.Get_IIC_Addr) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.Get_IIC_Addr) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.IIC_WriteM_ReadN) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_for_custom_s8.o(i.IIC_WriteM_ReadN) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_for_custom_s8.o(i.IIC_WriteM_ReadN) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.RawData2DiffBuff) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.Read_TP_Data) refers to app_tp_for_custom_s8.o(i.Get_IIC_Addr) for Get_IIC_Addr + app_tp_for_custom_s8.o(i.Read_TP_Data) refers to app_tp_for_custom_s8.o(i.IIC_WriteM_ReadN) for IIC_WriteM_ReadN + app_tp_for_custom_s8.o(i.Read_TP_Data) refers to idiv.o(.text) for __aeabi_idivmod + app_tp_for_custom_s8.o(i.Read_TP_Data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.Read_TP_Data) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.Read_TP_Data) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.Read_TP_Data) refers to app_tp_for_custom_s8.o(i.M_delay_us) for M_delay_us + app_tp_for_custom_s8.o(i.app_tp_spis_irq) refers to app_tp_for_custom_s8.o(i.spis_cs_irq) for spis_cs_irq + app_tp_for_custom_s8.o(i.bin_send) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_for_custom_s8.o(i.bin_send) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_for_custom_s8.o(i.bin_send) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_for_custom_s8.o(i.bin_send) refers to app_tp_for_custom_s8.o(i.M_delay_ms) for M_delay_ms + app_tp_for_custom_s8.o(i.bin_send) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + app_tp_for_custom_s8.o(i.bin_send) refers to tau_log.o(i.fputc) for fputc + app_tp_for_custom_s8.o(i.bin_send) refers to norflash.o(i.norflash_init) for norflash_init + app_tp_for_custom_s8.o(i.bin_send) refers to hal_system.o(i.hal_system_share_flash_mode) for hal_system_share_flash_mode + app_tp_for_custom_s8.o(i.bin_send) refers to norflash.o(i.norflash_read) for norflash_read + app_tp_for_custom_s8.o(i.delay_test) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_for_custom_s8.o(i.delay_test) refers to app_tp_for_custom_s8.o(i.M_delay_180ns) for M_delay_180ns + app_tp_for_custom_s8.o(i.delay_test) refers to app_tp_for_custom_s8.o(i.M_delay_ms) for M_delay_ms + app_tp_for_custom_s8.o(i.delay_test) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.iic_tp_proc) refers to app_tp_for_custom_s8.o(i.Read_TP_Data) for Read_TP_Data + app_tp_for_custom_s8.o(i.iic_tp_proc) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.init_tp_proc) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_for_custom_s8.o(i.init_tp_proc) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_for_custom_s8.o(i.init_tp_proc) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_for_custom_s8.o(i.init_tp_proc) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_for_custom_s8.o(i.init_tp_proc) refers to app_tp_for_custom_s8.o(i.tp_motion_irq) for tp_motion_irq + app_tp_for_custom_s8.o(i.init_tp_proc) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.spi_init_proc) refers to hal_spi_slave.o(i.hal_spi_slave_init) for hal_spi_slave_init + app_tp_for_custom_s8.o(i.spi_init_proc) refers to hal_spi_slave.o(i.hal_spi_slave_register_callback) for hal_spi_slave_register_callback + app_tp_for_custom_s8.o(i.spi_init_proc) refers to hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) for hal_spi_slave_auto_transfer_abort + app_tp_for_custom_s8.o(i.spi_init_proc) refers to hal_spi_slave.o(i.hal_spi_slave_flush_fifo) for hal_spi_slave_flush_fifo + app_tp_for_custom_s8.o(i.spi_init_proc) refers to hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) for hal_spi_slave_set_auto_rx_buffer + app_tp_for_custom_s8.o(i.spi_init_proc) refers to hal_spi_slave.o(i.hal_spi_slave_enable) for hal_spi_slave_enable + app_tp_for_custom_s8.o(i.spi_init_proc) refers to hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) for hal_spi_slave_auto_transfer_start + app_tp_for_custom_s8.o(i.spi_init_proc) refers to app_tp_for_custom_s8.o(i.app_tp_spis_irq) for app_tp_spis_irq + app_tp_for_custom_s8.o(i.spi_init_proc) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.spis_cs_irq) refers to hal_spi_slave.o(i.hal_spi_slave_reset_tx) for hal_spi_slave_reset_tx + app_tp_for_custom_s8.o(i.spis_cs_irq) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.spis_cs_irq) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.spis_cs_irq) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.tp_I2cPos_spiPosRaw_Proc) refers to app_tp_for_custom_s8.o(i.EncryptCheck) for EncryptCheck + app_tp_for_custom_s8.o(i.tp_I2cPos_spiPosRaw_Proc) refers to app_tp_for_custom_s8.o(i.FingerPos2RawData) for FingerPos2RawData + app_tp_for_custom_s8.o(i.tp_I2cPos_spiPosRaw_Proc) refers to app_tp_for_custom_s8.o(i.RawData2DiffBuff) for RawData2DiffBuff + app_tp_for_custom_s8.o(i.tp_I2cPos_spiPosRaw_Proc) refers to hal_spi_slave.o(i.hal_spi_slave_reset_tx) for hal_spi_slave_reset_tx + app_tp_for_custom_s8.o(i.tp_I2cPos_spiPosRaw_Proc) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.tp_I2cPos_spiPosRaw_Proc) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.tp_del_touchoff_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.tp_del_touchoff_data) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.tp_init_proc) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_for_custom_s8.o(i.tp_init_proc) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_for_custom_s8.o(i.tp_init_proc) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_for_custom_s8.o(i.tp_init_proc) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_for_custom_s8.o(i.tp_init_proc) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_for_custom_s8.o(i.tp_init_proc) refers to app_tp_for_custom_s8.o(i.tp_motion_irq) for tp_motion_irq + app_tp_for_custom_s8.o(i.tp_init_proc) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.tp_io_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_for_custom_s8.o(i.tp_io_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_for_custom_s8.o(i.tp_motion_irq) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.tp_pixel7pro_wakeup_Proc) refers to app_tp_for_custom_s8.o(i.tp_touch_wakeup_Proc) for tp_touch_wakeup_Proc + app_tp_for_custom_s8.o(i.tp_pixel7pro_wakeup_Proc) refers to hal_spi_slave.o(i.hal_spi_slave_reset_tx) for hal_spi_slave_reset_tx + app_tp_for_custom_s8.o(i.tp_pixel7pro_wakeup_Proc) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.tp_pixel7pro_wakeup_Proc) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(i.tp_init_proc) for tp_init_proc + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(i.M_delay_us) for M_delay_us + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(i.spi_init_proc) for spi_init_proc + app_tp_for_custom_s8.o(i.tp_proc) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(.ARM.__at_0x1A100) for LibCheckEncrypt + app_tp_for_custom_s8.o(i.tp_proc) refers to hal_spi_slave.o(i.hal_spi_slave_reset_tx) for hal_spi_slave_reset_tx + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(i.iic_tp_proc) for iic_tp_proc + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(i.tp_del_touchoff_data) for tp_del_touchoff_data + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(i.tp_pixel7pro_wakeup_Proc) for tp_pixel7pro_wakeup_Proc + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(i.tp_I2cPos_spiPosRaw_Proc) for tp_I2cPos_spiPosRaw_Proc + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(i.FST_tp_init) for FST_tp_init + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.tp_proc) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.tp_touch_wakeup_Proc) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.tp_touch_wakeup_Proc) refers to app_tp_for_custom_s8.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) for hal_internal_sync_input_resolution_change_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_dsi_tx_ctrl.o(.conststring) for .conststring + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) for hal_internal_vsync_update_lcdc_addr + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te) refers to hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) for hal_internal_sync_cmd_mode_rcv_te + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) for hal_dsi_tx_ctrl_set_rect_pixel_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) for hal_dsi_tx_ctrl_draw_flicker + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) for hal_dsi_tx_ctrl_draw_chessboard + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_set_prefetch) for drv_lcdc_set_prefetch + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_pwm.o(i.hal_pwm_in_clear_int) refers to drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all) for drv_pwm_in_clear_pwm_int_all + hal_pwm.o(i.hal_pwm_in_config_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_in_ctrl_int) refers to drv_pwm.o(i.drv_pwm_in_set_sys_int) for drv_pwm_in_set_sys_int + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_get_current_count) refers to drv_pwm.o(i.drv_pwm_in_get_current_count) for drv_pwm_in_get_current_count + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_pwm.o(i.drv_pwm_in_get_high_period) for drv_pwm_in_get_high_period + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_pwm.o(i.drv_pwm_in_get_low_period) for drv_pwm_in_get_low_period + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_pwm.o(i.drv_pwm_in_get_counter_period) for drv_pwm_in_get_counter_period + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_in_init) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_register_callback) refers to drv_pwm.o(i.drv_pwm_in_register_callback) for drv_pwm_in_register_callback + hal_pwm.o(i.hal_pwm_in_set_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_config_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(i.hal_pwm_out_common_config) for hal_pwm_out_common_config + hal_pwm.o(i.hal_pwm_out_convert_time) refers to tau_delay.o(i.delayUs) for delayUs + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_get_sync_flag) for drv_pwm_out_get_sync_flag + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_deinit) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sel_io) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_out_sync_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_common.o(.data) for g_system_clock + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_system.o(i.hal_system_flash_read) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_dual_read) for norflash_dual_read + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_erase_block) for norflash_erase_block + hal_system.o(i.hal_system_flash_write) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_write) for norflash_write + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c1_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c0_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to ap_demo.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_slave_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(i.PWM_OUTPUT_TEST), (44 bytes). + Removing ap_demo.o(i.PWM_Task), (12 bytes). + Removing ap_demo.o(i.PWM_init), (24 bytes). + Removing ap_demo.o(i.ap_get_reg_ca), (24 bytes). + Removing ap_demo.o(i.ap_get_reg_df), (252 bytes). + Removing ap_demo.o(i.soft_te_timer_cb), (32 bytes). + Removing ap_demo.o(i.soft_te_timer_init), (100 bytes). + Removing ap_demo.o(i.test_pwm_out_adjust), (104 bytes). + Removing ap_demo.o(.data), (1 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (4 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (1 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.M_delay_180ns), (12 bytes). + Removing app_tp_for_custom_s8.o(i.delay_test), (60 bytes). + Removing app_tp_for_custom_s8.o(i.init_tp_proc), (60 bytes). + Removing app_tp_for_custom_s8.o(.bss), (100 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (186 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (4 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (8 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (16 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode), (100 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter), (108 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data), (268 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (188 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex), (32 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (148 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te), (10 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard), (280 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker), (172 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init), (30 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (140 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm), (32 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data), (272 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (80 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_pwm.o(.rev16_text), (4 bytes). + Removing hal_pwm.o(.revsh_text), (4 bytes). + Removing hal_pwm.o(i.hal_pwm_in_clear_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_config_int), (60 bytes). + Removing hal_pwm.o(i.hal_pwm_in_ctrl_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_deinit), (18 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_current_count), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_high_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_low_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_total_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_init), (26 bytes). + Removing hal_pwm.o(i.hal_pwm_in_register_callback), (10 bytes). + Removing hal_pwm.o(i.hal_pwm_in_set_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_common_config), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_config_all), (16 bytes). + Removing hal_pwm.o(i.hal_pwm_out_config_duty_ratio), (76 bytes). + Removing hal_pwm.o(i.hal_pwm_out_convert_time), (164 bytes). + Removing hal_pwm.o(i.hal_pwm_out_deinit), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_init), (12 bytes). + Removing hal_pwm.o(i.hal_pwm_out_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sel_io), (38 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_all), (16 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_ctl), (30 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_pause), (28 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_period), (48 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_thr), (52 bytes). + Removing hal_pwm.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (112 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_flash_read), (52 bytes). + Removing hal_system.o(i.hal_system_flash_write), (60 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_clocks), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_scld_filter), (100 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (64 bytes). + Removing drv_pwm.o(i.drv_pwm_out_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_control), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_threshold), (12 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_set_frame_buff_pd), (28 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (168 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex), (468 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr), (48 bytes). + Removing hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler), (476 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (6 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_enable_channel_interrupts), (36 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_dma.o(i.drv_i2c_dma_callback), (52 bytes). + Removing drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback), (88 bytes). + Removing drv_i2c_dma.o(i.drv_i2c_slave_write_dma), (24 bytes). + Removing drv_i2c_dma.o(.bss), (320 bytes). + Removing drv_i2c_dma.o(.data), (8 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c0_set_callback), (12 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit), (66 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_config_intr), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_enable), (8 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status), (20 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (30 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (16 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_intr), (80 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_write_data), (28 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_slave_init), (50 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_read_data), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing dflti.o(.text), (40 bytes). + +530 unused section(s) (total 24198 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../fplib/microlib/fpsqrt.c 0x00000000 Number 0 dsqrt.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt_x.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + 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i.EXTI_INT0_IRQn_Handler 0x00010c24 Section 0 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010c40 Section 0 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010c5c Section 0 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010c78 Section 0 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010c94 Section 0 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010cb0 Section 0 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010ccc Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010ce8 Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.EncryptCheck 0x00010d04 Section 0 app_tp_for_custom_s8.o(i.EncryptCheck) + i.FLSCTRL_IRQn_Handler 0x00010d54 Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.FST_tp_init 0x00010d68 Section 0 app_tp_for_custom_s8.o(i.FST_tp_init) + i.FingerPos2RawData 0x00010e60 Section 0 app_tp_for_custom_s8.o(i.FingerPos2RawData) + i.UART_DisableDma 0x00010ffc Section 0 drv_uart.o(i.UART_DisableDma) + i.__scatterload_null 0x00010ffe Section 2 handlers.o(i.__scatterload_null) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.UART_GetInstance 0x00011014 Section 0 drv_uart.o(i.UART_GetInstance) + .ARM.__at_0x11018 0x00011018 Section 4 drv_common.o(.ARM.__at_0x11018) + i.Get_IIC_Addr 0x0001101c Section 0 app_tp_for_custom_s8.o(i.Get_IIC_Addr) + i.Gpio_swire_output 0x000110d4 Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00011124 Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00011138 Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00011150 Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.IIC_WriteM_ReadN 0x00011168 Section 0 app_tp_for_custom_s8.o(i.IIC_WriteM_ReadN) + i.LCDC_IRQn_Handler 0x0001118c Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x000111a4 Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x000111cc Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x000111e4 Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x000111fc Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.M_delay_ms 0x00011214 Section 0 app_tp_for_custom_s8.o(i.M_delay_ms) + i.M_delay_us 0x00011230 Section 0 app_tp_for_custom_s8.o(i.M_delay_us) + i.PWMDET_IRQn_Handler 0x00011254 Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.RawData2DiffBuff 0x00011270 Section 0 app_tp_for_custom_s8.o(i.RawData2DiffBuff) + i.Read_TP_Data 0x00011350 Section 0 app_tp_for_custom_s8.o(i.Read_TP_Data) + i.SPIM_IRQn_Handler 0x00011a3c Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.SPIS_IRQn_Handler 0x00011a58 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.SWIRE_IRQn_Handler 0x00011a74 Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00011a90 Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00011aa8 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x00011ac0 Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00011ad8 Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x00011af0 Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART0_IRQ_Handle 0x00011b08 Section 0 drv_uart.o(i.UART0_IRQ_Handle) + i.UART_IRQn_Handler 0x00011b24 Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_ResetRxFIFO 0x00011b3c Section 0 drv_uart.o(i.UART_ResetRxFIFO) + i.UART_SetBaudRate 0x00011b60 Section 0 drv_uart.o(i.UART_SetBaudRate) + i.UART_SwitchSCLK 0x00011ba8 Section 0 drv_uart.o(i.UART_SwitchSCLK) + i.UART_TransferHandleIRQ 0x00011bc2 Section 0 drv_uart.o(i.UART_TransferHandleIRQ) + i.UART_WriteBlocking 0x00011cf6 Section 0 drv_uart.o(i.UART_WriteBlocking) + i.UART_init 0x00011d10 Section 0 drv_uart.o(i.UART_init) + i.VIDC_IRQn_Handler 0x00011dcc Section 0 irq_redirect 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i.__NVIC_DisableIRQ 0x00011ee8 Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x00011ee9 Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x00011f08 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x00011f09 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__NVIC_SetPriority 0x00011f20 Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x00011f21 Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_copy 0x00011f64 Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_zeroinit 0x00011f72 Section 14 handlers.o(i.__scatterload_zeroinit) + i.__set_errno 0x00011f80 Section 0 errno.o(i.__set_errno) + i._fp_digits 0x00011f8c Section 0 printfa.o(i._fp_digits) + _fp_digits 0x00011f8d Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x00012100 Section 0 printfa.o(i._printf_core) + _printf_core 0x00012101 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x000127ec Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x000127ed Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x0001280c Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x0001280d Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00012838 Section 0 printfa.o(i._sputc) + _sputc 0x00012839 Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00012844 Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00012845 Thumb Code 210 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x00012950 Section 0 ap_demo.o(i.ap_demo) + i.ap_reset_cb 0x00012b24 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x00012b25 Thumb Code 48 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight 0x00012ba0 Section 0 ap_demo.o(i.ap_set_backlight) + ap_set_backlight 0x00012ba1 Thumb Code 72 ap_demo.o(i.ap_set_backlight) + i.ap_set_backlight_B1 0x00012bf0 Section 0 ap_demo.o(i.ap_set_backlight_B1) + ap_set_backlight_B1 0x00012bf1 Thumb Code 150 ap_demo.o(i.ap_set_backlight_B1) + i.ap_set_display_off 0x00012c8c Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x00012c8d Thumb Code 30 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x00012cd4 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x00012cd5 Thumb Code 84 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x00012d6c Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x00012d6d Thumb Code 86 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x00012df8 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x00012df9 Thumb Code 22 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_update_frame_rate 0x00012e40 Section 0 ap_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x00012e41 Thumb Code 62 ap_demo.o(i.ap_update_frame_rate) + i.app_ADC_IRQn_Handler 0x00012ec0 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x00012edc Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x00012f00 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x00012f1c Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x00012f38 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x00012f54 Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x00012f70 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x00012f8c Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x00012fa8 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x00012fc4 Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x00012fe0 Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x00013028 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x00013040 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00013050 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00013180 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00013208 Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x000134a0 Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00013540 Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00013588 Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x000135b8 Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x000137b8 Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x000137d8 Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x000137f0 Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x000137fa Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x00013804 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x0001380e Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x00013818 Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x00013820 Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x0001383c Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x00013858 Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x00013890 Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x000138a0 Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_spis_irq 0x000138d0 Section 0 app_tp_for_custom_s8.o(i.app_tp_spis_irq) + app_tp_spis_irq 0x000138d1 Thumb Code 14 app_tp_for_custom_s8.o(i.app_tp_spis_irq) + i.bin_send 0x000138e0 Section 0 app_tp_for_custom_s8.o(i.bin_send) + bin_send 0x000138e1 Thumb Code 250 app_tp_for_custom_s8.o(i.bin_send) + i.board_Init 0x000139e0 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x00013a04 Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x00013e78 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x00013f40 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x00013f41 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x00013f6c Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x00013f6d Thumb Code 90 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x00014000 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x00014058 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x00014070 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x000140b4 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x000140d8 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x000140d9 Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x000140f4 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x0001410c Section 0 tau_delay.o(i.delayUs) + i.drv_ap_rst_trig_edge_detect 0x00014130 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x00014168 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x00014174 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x000141b4 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x0001427c Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x00014290 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x000142e8 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x000142f0 Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x00014300 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x00014314 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x00014328 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x00014348 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x0001435c Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x00014374 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x00014388 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x0001439c Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x000143b0 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x000143c4 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x000143d8 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x000143ec Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x00014400 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x00014414 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x00014428 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x00014440 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x00014458 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x0001446c Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x00014480 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x00014494 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x000144ac Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x000144c8 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_disenable_channel_interrupts 0x000144d8 Section 0 drv_dma.o(i.drv_dma_disenable_channel_interrupts) + i.drv_dma_enable_channel 0x000144f0 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_cycle 0x00014500 Section 0 drv_dma.o(i.drv_dma_enable_cycle) + i.drv_dma_get_channel_flag 0x0001452c Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00014538 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x000145c8 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x000145da Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x000145f4 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x000145fc Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00014640 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x00014676 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00014684 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x000146f8 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00014702 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x0001472c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00014830 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00014870 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00014871 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x000148c0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x000148c1 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x000148dc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x000148e4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x000148ea Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x000148f8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00014918 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00014928 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x0001492c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x0001493c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00014982 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x000149a8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00014aac Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00014aba Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00014ace Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00014b3a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x00014b3e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00014b56 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00014b5e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00014b66 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00014b70 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00014b94 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x00014b98 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00014b9c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00014ba0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x00014bb8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x00014bd2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00014bde Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x00014c42 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x00014c80 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00014db4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x00014dd2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00014dda Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x00014df6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x00014e0e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x00014e1c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x00014e5c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x00014e6c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x00014e74 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00014e96 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x00014e9e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00014ec4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x00014f6e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x00014f84 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x00014f9c Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x00014fbc Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x00014fc8 Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x00014ffa Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_fls_gpio_connect 0x00015014 Section 0 drv_fls.o(i.drv_fls_gpio_connect) + i.drv_fls_gpio_disconnect 0x00015030 Section 0 drv_fls.o(i.drv_fls_gpio_disconnect) + i.drv_gpio_get_input_data 0x00015050 Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x00015068 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x00015074 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00015088 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x000150d8 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x000150f8 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x00015108 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x00015118 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x00015128 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00015138 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00015139 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x00015158 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c1_set_callback 0x00015288 Section 0 drv_i2c_master.o(i.drv_i2c1_set_callback) + i.drv_i2c_dma_init 0x00015294 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x00015340 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x0001535a Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x00015374 Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x000153d4 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x000153e4 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_master_init 0x0001541c Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x000154a8 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x00015504 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x00015540 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x00015541 Thumb Code 46 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_lcdc_config_bypass 0x0001556e Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x00015586 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x000155b6 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x000155cc Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x000155f0 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x00015616 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x0001562c Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x00015642 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x0001564e Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x0001566c Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x0001568e Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x000156b0 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x000156bc Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x000156d6 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x000156f8 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00015712 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x0001571e Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x0001576a Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00015770 Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00015782 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x000157a4 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_prefetch 0x000157e4 Section 0 drv_lcdc.o(i.drv_lcdc_set_prefetch) + i.drv_lcdc_set_video_hw_mode 0x000157fc Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00015810 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x00015830 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x0001583c Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x0001587c Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00015888 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x0001589a Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x000158aa Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x000158b8 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x000158cc Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x000158d8 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x000158e8 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x000158fa Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x0001590a Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x00015920 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00015938 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x00015952 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00015960 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00015988 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x00015998 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x000159a0 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x000159b4 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x000159c8 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x000159d0 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_p2r_filter_init 0x000159e4 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x00015a08 Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x00015a18 Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x00015a54 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x00015ab4 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x00015b08 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00015b18 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x00015b30 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x00015b50 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x00015b76 Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x00015b94 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x00015b95 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x00015bb4 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x00015bd4 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x00015bec Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x00015c24 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x00015c25 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x00015c30 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x00015c31 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x00015c40 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x00015c41 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x00015c54 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x00015c55 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x00015c6a Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00015c74 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00015c78 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x00015cd4 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x00015ce8 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x00015d4c Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x00015d50 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00015d51 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x00015d62 Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x00015d66 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x00015d67 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x00015d78 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00015d84 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x00015d8c Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x00015d98 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x00015da4 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x00015db8 Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x00015e84 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x00015e98 Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x00015eac Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x00015ebc Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x00015ee2 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x00015eea Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_abort_dma 0x00015ef4 Section 0 drv_spi_dma.o(i.drv_spi_abort_dma) + i.drv_spi_dma_callback 0x00015f60 Section 0 drv_spi_dma.o(i.drv_spi_dma_callback) + drv_spi_dma_callback 0x00015f61 Thumb Code 48 drv_spi_dma.o(i.drv_spi_dma_callback) + i.drv_spi_dma_init 0x00015f9c Section 0 drv_spi_dma.o(i.drv_spi_dma_init) + i.drv_spi_m_enable_rx_dma 0x00016078 Section 0 drv_spi_master.o(i.drv_spi_m_enable_rx_dma) + i.drv_spi_m_enable_tx_dma 0x00016098 Section 0 drv_spi_master.o(i.drv_spi_m_enable_tx_dma) + i.drv_spi_s_enable_int 0x000160b4 Section 0 drv_spi_slave.o(i.drv_spi_s_enable_int) + i.drv_spi_s_enable_rx_dma 0x000160fc Section 0 drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) + i.drv_spi_s_enable_tx_dma 0x0001611c Section 0 drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) + i.drv_spi_s_gpio_init 0x00016138 Section 0 drv_spi_slave.o(i.drv_spi_s_gpio_init) + i.drv_spi_set_dma_irq_callback 0x00016150 Section 0 drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) + i.drv_spi_slave_init 0x000161a8 Section 0 drv_spi_slave.o(i.drv_spi_slave_init) + i.drv_spis_dma_write 0x000161f4 Section 0 drv_spi_dma.o(i.drv_spis_dma_write) + i.drv_swire_enable 0x0001623c Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_set_int 0x00016258 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x000162ac Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x000162c8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x000162d4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x000162fc Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x00016314 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x00016330 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x00016354 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x00016378 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x00016388 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x00016398 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x000163bc Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x000163bd Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x000163d6 Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x000163f8 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x00016408 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x00016418 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x00016419 Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x0001645c Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x00016470 Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x00016480 Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x000164d4 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x000164fc Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_clear 0x0001650c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x0001650d Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x00016516 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x00016532 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x0001654e Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x0001654f Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x00016560 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x00016561 Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x00016574 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x00016575 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00016584 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x0001658c Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x000165a4 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x000165e4 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x000165f8 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x00016620 Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x0001662c Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x00016632 Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x0001666e Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00016682 Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x00016692 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x0001669a Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x000166c0 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x000166e8 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x00016700 Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x0001670a Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x0001671a Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00016724 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x0001672e Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00016740 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x0001674a Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00016754 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x0001676c Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x0001677c Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x0001677d Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x0001678c Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x0001678d Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x0001679c Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clear_irq_status 0x000167dc Section 0 drv_fls.o(i.fls_clear_irq_status) + i.fls_clr_interrupt_flag 0x000167e2 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fls_ctrl_cfg_init 0x000167ec Section 0 drv_fls.o(i.fls_ctrl_cfg_init) + i.fls_dma_disable 0x00016834 Section 0 drv_fls_dma.o(i.fls_dma_disable) + i.fls_get_default_fls_config 0x0001683e Section 0 drv_fls.o(i.fls_get_default_fls_config) + i.fls_get_default_spi_config 0x00016852 Section 0 drv_fls.o(i.fls_get_default_spi_config) + i.fls_get_default_tuning 0x0001687e Section 0 drv_fls.o(i.fls_get_default_tuning) + i.fls_init 0x0001688a Section 0 drv_fls.o(i.fls_init) + i.fls_read_byte_data 0x000168c8 Section 0 drv_fls.o(i.fls_read_byte_data) + i.fls_set_read 0x0001694a Section 0 drv_fls.o(i.fls_set_read) + i.fls_set_tuning 0x00016954 Section 0 drv_fls.o(i.fls_set_tuning) + i.fls_spi_init 0x0001696c Section 0 drv_fls.o(i.fls_spi_init) + i.fls_spi_start 0x00016a20 Section 0 drv_fls.o(i.fls_spi_start) + i.fls_swrst 0x00016a2a Section 0 drv_fls.o(i.fls_swrst) + i.fputc 0x00016a3c Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x00016a50 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x00016a84 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00016b20 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016ba4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00016bcc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00016bf4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00016c8c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00016c8d Thumb Code 332 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00016e30 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00016e31 Thumb Code 184 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00016f08 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00016f09 Thumb Code 334 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x00017060 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x00017061 Thumb Code 294 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x00017198 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x00017199 Thumb Code 546 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x000173c8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00017404 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x000174f4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00017528 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00017529 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x00017560 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x00017561 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x000175d4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_set_tear_mode_ex 0x00017608 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + i.hal_dsi_rx_ctrl_start 0x00017618 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x00017654 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x00017690 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_calc_video_chunks 0x000176b0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x000176b1 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x00017840 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x00017841 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x00017874 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x00017875 Thumb Code 1022 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x00017cc4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00017cf0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00017d74 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017dc0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x00017de8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00017e8c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00017e8d Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x00017eb0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00017ebc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x00017ed0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x00017ee0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x00017f04 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00017fa0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00017fe4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x000180bc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x0001816c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x0001816d Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x000181b0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x000181b1 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x000181e0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x000181e1 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x00018200 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00018201 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x00018220 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x00018221 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x000182b4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x000182b5 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x0001830c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x0001830d Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x00018350 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x00018368 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x0001837c Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x000183bc Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x000183dc Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00018404 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x0001841c Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x0001846c Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x000184cc Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x000184d4 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x000184f4 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x00018560 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x00018580 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x0001859c Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x000185a8 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x000185a9 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_internal_init_memc 0x000185c8 Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x000186c4 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_get_hight_performan_mode 0x000186d4 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change 0x000186e4 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_vsync_deinit 0x00018910 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00018938 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00018944 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tear_mode 0x0001895c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + i.hal_internal_vsync_get_tx_state 0x00018968 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00018974 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00018a8c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x00018b3c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x00018c58 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x00018c6c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x00018c90 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00018ce0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x00018d60 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x00018d61 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x00018d84 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x00018d85 Thumb Code 84 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x00018ddc Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x00018ddd Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x00018df0 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x00018df1 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x00018f54 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00018f55 Thumb Code 78 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x00018fa8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x00018fa9 Thumb Code 392 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x00019138 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x00019139 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_slave_auto_transfer_abort 0x00019178 Section 0 hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) + i.hal_spi_slave_auto_transfer_start 0x00019188 Section 0 hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) + i.hal_spi_slave_enable 0x000191c0 Section 0 hal_spi_slave.o(i.hal_spi_slave_enable) + i.hal_spi_slave_flush_fifo 0x00019220 Section 0 hal_spi_slave.o(i.hal_spi_slave_flush_fifo) + i.hal_spi_slave_gpio_init 0x00019234 Section 0 hal_spi_slave.o(i.hal_spi_slave_gpio_init) + i.hal_spi_slave_init 0x0001923c Section 0 hal_spi_slave.o(i.hal_spi_slave_init) + i.hal_spi_slave_register_callback 0x00019288 Section 0 hal_spi_slave.o(i.hal_spi_slave_register_callback) + i.hal_spi_slave_reset_tx 0x00019294 Section 0 hal_spi_slave.o(i.hal_spi_slave_reset_tx) + i.hal_spi_slave_set_auto_rx_buffer 0x000192d8 Section 0 hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) + i.hal_swire_deinit 0x000192e8 Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_open 0x000192fa Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x00019310 Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x00019318 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x000193a0 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x000193bc Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x000193c4 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x000193cc Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_system_share_flash_mode 0x000193d4 Section 0 hal_system.o(i.hal_system_share_flash_mode) + i.hal_timer_deinit 0x000193e8 Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x00019416 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x00019430 Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x00019478 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x000194a0 Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x0001952c Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.handle_init 0x0001953c Section 0 irq_redirect .o(i.handle_init) + i.iic_tp_proc 0x0001964c Section 0 app_tp_for_custom_s8.o(i.iic_tp_proc) + i.init_mipi_tx 0x0001966c Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x0001966d Thumb Code 110 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x000196e4 Section 0 ap_demo.o(i.init_panel) + init_panel 0x000196e5 Thumb Code 154 ap_demo.o(i.init_panel) + i.main 0x000197b4 Section 0 main.o(i.main) + i.norflash_init 0x000197c0 Section 0 norflash.o(i.norflash_init) + i.norflash_read 0x000197f0 Section 0 norflash.o(i.norflash_read) + i.open_mipi_rx 0x0001980c Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x0001980d Thumb Code 144 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x000198b8 Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x000198b9 Thumb Code 54 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x000198f4 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x000198f5 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x00019ce8 Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x00019ce9 Thumb Code 358 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x00019e60 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x00019e61 Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rxbr_irq0_callback 0x00019eec Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x00019eed Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.soft_timer3_cb 0x00019f90 Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x00019f91 Thumb Code 34 ap_demo.o(i.soft_timer3_cb) + i.spi_init_proc 0x00019fbc Section 0 app_tp_for_custom_s8.o(i.spi_init_proc) + .ARM.__at_0x19FF8 0x00019ff8 Section 8 app_tp_for_custom_s8.o(.ARM.__at_0x19FF8) + .ARM.__at_0x1A000 0x0001a000 Section 24 app_tp_for_custom_s8.o(.ARM.__at_0x1A000) + .ARM.__at_0x1A018 0x0001a018 Section 8 app_tp_for_custom_s8.o(.ARM.__at_0x1A018) + .ARM.__at_0x1A020 0x0001a020 Section 224 app_tp_for_custom_s8.o(.ARM.__at_0x1A020) + .ARM.__at_0x1A100 0x0001a100 Section 0 app_tp_for_custom_s8.o(.ARM.__at_0x1A100) + LibCheckEncrypt 0x0001a101 Thumb Code 166 app_tp_for_custom_s8.o(.ARM.__at_0x1A100) + i.rx_receive_pps 0x0001a1b0 Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001a1b1 Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq1_callback 0x0001a330 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001a331 Thumb Code 282 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_gen_te 0x0001a4e4 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001a4e5 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x0001a5a8 Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x0001a5a9 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.spis_cs_irq 0x0001a668 Section 0 app_tp_for_custom_s8.o(i.spis_cs_irq) + i.sqrt 0x0001a828 Section 0 sqrt.o(i.sqrt) + i.tp_I2cPos_spiPosRaw_Proc 0x0001a870 Section 0 app_tp_for_custom_s8.o(i.tp_I2cPos_spiPosRaw_Proc) + i.tp_del_touchoff_data 0x0001a9a4 Section 0 app_tp_for_custom_s8.o(i.tp_del_touchoff_data) + i.tp_init_proc 0x0001aa50 Section 0 app_tp_for_custom_s8.o(i.tp_init_proc) + i.tp_io_init 0x0001aaa8 Section 0 app_tp_for_custom_s8.o(i.tp_io_init) + i.tp_motion_irq 0x0001aac8 Section 0 app_tp_for_custom_s8.o(i.tp_motion_irq) + tp_motion_irq 0x0001aac9 Thumb Code 8 app_tp_for_custom_s8.o(i.tp_motion_irq) + i.tp_pixel7pro_wakeup_Proc 0x0001aad4 Section 0 app_tp_for_custom_s8.o(i.tp_pixel7pro_wakeup_Proc) + i.tp_proc 0x0001ab10 Section 0 app_tp_for_custom_s8.o(i.tp_proc) + i.tp_touch_wakeup_Proc 0x0001ac34 Section 0 app_tp_for_custom_s8.o(i.tp_touch_wakeup_Proc) + i.vidc_callback 0x0001acb4 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001acb5 Thumb Code 232 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001adbc Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001adbd Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001ae8c Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001ae8d Thumb Code 300 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001b058 Section 10668 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001b058 Data 96 ap_demo.o(.constdata) + .constdata 0x0001da04 Section 322 app_tp_for_custom_s8.o(.constdata) + reg_0x24 0x0001da04 Data 8 app_tp_for_custom_s8.o(.constdata) + reg_0x07 0x0001da15 Data 38 app_tp_for_custom_s8.o(.constdata) + reg_0x20 0x0001da3b Data 58 app_tp_for_custom_s8.o(.constdata) + reg_0x23 0x0001da75 Data 10 app_tp_for_custom_s8.o(.constdata) + reg_0x25 0x0001da7f Data 140 app_tp_for_custom_s8.o(.constdata) + reg_defalut 0x0001db0b Data 9 app_tp_for_custom_s8.o(.constdata) + reg_0x00 0x0001db14 Data 11 app_tp_for_custom_s8.o(.constdata) + reg_0x06 0x0001db1f Data 12 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001db48 Section 36 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001db6c Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001db6c Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001dbe4 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001dc40 Section 8 drv_param_init.o(.constdata) + .constdata 0x0001dc48 Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001dc48 Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001dd00 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001dd80 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001ddb0 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001ddd0 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001de18 Section 67 hal_dsi_tx_ctrl.o(.conststring) + .conststring 0x0001de5c Section 308 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 164 ap_demo.o(.data) + send_29_flag 0x000701d0 Data 1 ap_demo.o(.data) + start_display_on 0x000701d1 Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701d2 Data 1 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701d3 Data 1 ap_demo.o(.data) + panel_display_done 0x000701d4 Data 1 ap_demo.o(.data) + g_resolution_change 0x000701d5 Data 1 ap_demo.o(.data) + g_mipi_path_off 0x000701d7 Data 1 ap_demo.o(.data) + value_blue 0x000701d8 Data 1 ap_demo.o(.data) + blue_flag 0x000701d9 Data 1 ap_demo.o(.data) + frame_rate 0x000701da Data 1 ap_demo.o(.data) + read_bl_data_bak 0x000701e0 Data 2 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701e8 Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701ec Data 4 ap_demo.o(.data) + value_reg_df 0x000701f0 Data 4 ap_demo.o(.data) + .data 0x00070274 Section 42 app_tp_for_custom_s8.o(.data) + iic_addr_8bit 0x00070275 Data 1 app_tp_for_custom_s8.o(.data) + init_flag 0x0007027c Data 1 app_tp_for_custom_s8.o(.data) + u8_fst_init_flag 0x0007027d Data 1 app_tp_for_custom_s8.o(.data) + g_u8EncryptFlag 0x00070282 Data 1 app_tp_for_custom_s8.o(.data) + g_u8EncryptData 0x00070283 Data 1 app_tp_for_custom_s8.o(.data) + u16_pre_pos_x 0x00070284 Data 2 app_tp_for_custom_s8.o(.data) + u16_pre_pos_y 0x00070286 Data 2 app_tp_for_custom_s8.o(.data) + g_u16EncryptCnt 0x00070288 Data 2 app_tp_for_custom_s8.o(.data) + u32_cnt 0x0007028c Data 4 app_tp_for_custom_s8.o(.data) + u32_tp_init_cnt 0x00070290 Data 4 app_tp_for_custom_s8.o(.data) + u32_reg0x24_cnt 0x00070294 Data 4 app_tp_for_custom_s8.o(.data) + .data 0x000702a0 Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x000702a0 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x000702a4 Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x000702a8 Section 3 hal_dsi_tx_ctrl.o(.data) + g_tx_vcom_en 0x000702a8 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_vpg_en 0x000702a9 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x000702aa Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x000702ab Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x000702ab Data 1 hal_i2c_master.o(.data) + .data 0x000702ac Section 18 norflash.o(.data) + tmprg 0x000702b4 Data 4 norflash.o(.data) + .data 0x000702c0 Section 12 drv_common.o(.data) + s_my_tick 0x000702c0 Data 4 drv_common.o(.data) + .data 0x000702cc Section 4 drv_fls.o(.data) + .data 0x000702d0 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x000702d0 Data 4 drv_gpio.o(.data) + .data 0x000702d4 Section 1188 drv_param_init.o(.data) + .data 0x00070778 Section 12 drv_pwm.o(.data) + s_pwm_type 0x00070778 Data 1 drv_pwm.o(.data) + s_pwm_cb 0x0007077c Data 8 drv_pwm.o(.data) + .data 0x00070784 Section 8 drv_swire.o(.data) + s_swire_cb 0x00070784 Data 8 drv_swire.o(.data) + .data 0x0007078c Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x0007078c Data 1 drv_sys_cfg.o(.data) + .data 0x00070790 Section 80 drv_timer.o(.data) + sg_timer_info 0x00070790 Data 80 drv_timer.o(.data) + .data 0x000707e0 Section 12 hal_internal_vsync.o(.data) + sg_cmd_mode_tx_start 0x000707e0 Data 1 hal_internal_vsync.o(.data) + sg_cur_te_info 0x000707e4 Data 4 hal_internal_vsync.o(.data) + .data 0x000707ec Section 8 drv_rxbr.o(.data) + .data 0x000707f4 Section 4 drv_vidc.o(.data) + .data 0x000707f8 Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x000707f8 Data 1 drv_phy_common.o(.data) + .data 0x000707fc Section 12 drv_chip_info.o(.data) + sg_chip_info 0x000707fc Data 4 drv_chip_info.o(.data) + sg_chip_function 0x00070800 Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x00070804 Data 4 drv_chip_info.o(.data) + .data 0x00070808 Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x00070808 Data 4 drv_i2c_master.o(.data) + .data 0x0007080c Section 4 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x0007080c Data 4 drv_i2c_slave.o(.data) + .data 0x00070810 Section 16 drv_spi_dma.o(.data) + spim_dma_tx_channel 0x00070810 Data 1 drv_spi_dma.o(.data) + spim_dma_rx_channel 0x00070811 Data 1 drv_spi_dma.o(.data) + spim_dma_callback 0x00070814 Data 4 drv_spi_dma.o(.data) + spis_dma_callback 0x00070818 Data 4 drv_spi_dma.o(.data) + dma_ch6_callback 0x0007081c Data 4 drv_spi_dma.o(.data) + .data 0x00070820 Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x00070820 Data 4 drv_spi_master.o(.data) + .data 0x00070824 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x00070824 Data 4 drv_uart.o(.data) + uart_userData 0x00070828 Data 4 drv_uart.o(.data) + .data 0x0007082c Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x0007082c Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x00070830 Data 8 drv_wdg.o(.data) + .data 0x00070838 Section 4 stdout.o(.data) + .data 0x0007083c Section 4 errno.o(.data) + _errno 0x0007083c Data 4 errno.o(.data) + .bss 0x00070840 Section 2976 app_tp_for_custom_s8.o(.bss) + g_u16CoordZ 0x00070858 Data 12 app_tp_for_custom_s8.o(.bss) + .bss 0x000713e0 Section 196 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x000713e0 Data 196 hal_dsi_rx_ctrl.o(.bss) + .bss 0x000714a4 Section 76 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x000714a4 Data 76 hal_dsi_tx_ctrl.o(.bss) + .bss 0x000714f0 Section 256 tau_log.o(.bss) + .bss 0x000715f0 Section 32 hal_spi_slave.o(.bss) + .bss 0x00071610 Section 208 hal_uart.o(.bss) + .bss 0x000716e0 Section 412 norflash.o(.bss) + .bss 0x0007187c Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x0007187c Data 64 drv_gpio.o(.bss) + .bss 0x000718bc Section 2416 hal_internal_vsync.o(.bss) + g_imm_buffer 0x0007210c Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x0007220c Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x00072218 Data 20 hal_internal_vsync.o(.bss) + .bss 0x0007222c Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x0007325c Section 28 drv_dma.o(.bss) + s_dma_handle 0x0007325c Data 28 drv_dma.o(.bss) + .bss 0x00073278 Section 480 drv_spi_dma.o(.bss) + spim_dma_handle 0x00073278 Data 160 drv_spi_dma.o(.bss) + spis_dma_handle 0x00073318 Data 160 drv_spi_dma.o(.bss) + dma_ch6_handle 0x000733b8 Data 160 drv_spi_dma.o(.bss) + STACK 0x00073458 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfrcmple 0x0001083d Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010851 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108b1 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108b1 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108d1 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108d1 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000108f3 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000108f3 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010919 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010919 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010929 Thumb Code 114 fepilogue.o(.text) + _double_round 0x0001099b Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109b5 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a59 Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010afd Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b3d Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b65 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b65 Thumb Code 0 init.o(.text) + __decompress 0x00010b89 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010b89 Thumb Code 86 __dczerorl2.o(.text) + ADC_IRQn_Handler 0x00010be1 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010bf9 Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010c11 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c25 Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c41 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010c5d Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010c79 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010c95 Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010cb1 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010ccd Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010ce9 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + EncryptCheck 0x00010d05 Thumb Code 72 app_tp_for_custom_s8.o(i.EncryptCheck) + FLSCTRL_IRQn_Handler 0x00010d55 Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + FST_tp_init 0x00010d69 Thumb Code 220 app_tp_for_custom_s8.o(i.FST_tp_init) + FingerPos2RawData 0x00010e61 Thumb Code 408 app_tp_for_custom_s8.o(i.FingerPos2RawData) + UART_DisableDma 0x00010ffd Thumb Code 2 drv_uart.o(i.UART_DisableDma) + __scatterload_null 0x00010fff Thumb Code 2 handlers.o(i.__scatterload_null) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + UART_GetInstance 0x00011015 Thumb Code 4 drv_uart.o(i.UART_GetInstance) + s_debug_state 0x00011018 Data 4 drv_common.o(.ARM.__at_0x11018) + Get_IIC_Addr 0x0001101d Thumb Code 166 app_tp_for_custom_s8.o(i.Get_IIC_Addr) + Gpio_swire_output 0x000110d5 Thumb Code 78 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00011125 Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00011139 Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00011151 Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + IIC_WriteM_ReadN 0x00011169 Thumb Code 32 app_tp_for_custom_s8.o(i.IIC_WriteM_ReadN) + LCDC_IRQn_Handler 0x0001118d Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x000111a5 Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x000111cd Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x000111e5 Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x000111fd Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + M_delay_ms 0x00011215 Thumb Code 22 app_tp_for_custom_s8.o(i.M_delay_ms) + M_delay_us 0x00011231 Thumb Code 34 app_tp_for_custom_s8.o(i.M_delay_us) + PWMDET_IRQn_Handler 0x00011255 Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + RawData2DiffBuff 0x00011271 Thumb Code 214 app_tp_for_custom_s8.o(i.RawData2DiffBuff) + Read_TP_Data 0x00011351 Thumb Code 1734 app_tp_for_custom_s8.o(i.Read_TP_Data) + SPIM_IRQn_Handler 0x00011a3d Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + SPIS_IRQn_Handler 0x00011a59 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + SWIRE_IRQn_Handler 0x00011a75 Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00011a91 Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00011aa9 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x00011ac1 Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00011ad9 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x00011af1 Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x00011b09 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + UART_IRQn_Handler 0x00011b25 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x00011b3d Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SetBaudRate 0x00011b61 Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x00011ba9 Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x00011bc3 Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x00011cf7 Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x00011d11 Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x00011dcd Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x00011de5 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x00011dfd Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x00011e15 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x00011e15 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x00011e15 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x00011e15 Thumb Code 0 printfa.o(i.__0printf) + printf 0x00011e15 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x00011e35 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x00011e35 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x00011e35 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x00011e35 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x00011e35 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x00011e59 Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x00011e87 Thumb Code 26 ap_demo.o(i.__ARM_common_switch8) + __scatterload_copy 0x00011f65 Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x00011f73 Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x00011f81 Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x00012951 Thumb Code 290 ap_demo.o(i.ap_demo) + app_ADC_IRQn_Handler 0x00012ec1 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x00012edd Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x00012f01 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x00012f1d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x00012f39 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x00012f55 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x00012f71 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x00012f8d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x00012fa9 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00012fc5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x00012fe1 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x00013029 Thumb Code 14 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00013041 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00013051 Thumb Code 146 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00013181 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00013209 Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x000134a1 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00013541 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00013589 Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x000135b9 Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x000137b9 Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x000137d9 Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x000137f1 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x000137fb Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x00013805 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x0001380f Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x00013819 Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x00013821 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x0001383d Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x00013859 Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x00013891 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x000138a1 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + board_Init 0x000139e1 Thumb Code 30 board.o(i.board_Init) + calc_framebuffer_setting 0x00013a05 Thumb Code 1138 hal_internal_vsync.o(i.calc_framebuffer_setting) + ceil 0x00013e79 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x00014001 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x00014059 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x00014071 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x000140b5 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x000140f5 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x0001410d Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x00014131 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x00014169 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x00014175 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x000141b5 Thumb Code 122 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x0001427d Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x00014291 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x000142e9 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x000142f1 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x00014301 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x00014315 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x00014329 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x00014349 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x0001435d Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x00014375 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x00014389 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x0001439d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x000143b1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x000143c5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x000143d9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x000143ed Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x00014401 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x00014415 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x00014429 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x00014441 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x00014459 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x0001446d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x00014481 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x00014495 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x000144ad Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x000144c9 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_disenable_channel_interrupts 0x000144d9 Thumb Code 24 drv_dma.o(i.drv_dma_disenable_channel_interrupts) + drv_dma_enable_channel 0x000144f1 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_cycle 0x00014501 Thumb Code 44 drv_dma.o(i.drv_dma_enable_cycle) + drv_dma_get_channel_flag 0x0001452d Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00014539 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x000145c9 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x000145db Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x000145f5 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x000145fd Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00014641 Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x00014677 Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00014685 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x000146f9 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00014703 Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x0001472d Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00014831 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x000148dd Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x000148e5 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x000148eb Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x000148f9 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00014919 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00014929 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x0001492d Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x0001493d Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00014983 Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x000149a9 Thumb Code 256 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00014aad Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00014abb Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00014acf Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00014b3b Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x00014b3f Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00014b57 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00014b5f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00014b67 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00014b71 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00014b95 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x00014b99 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00014b9d Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x00014ba1 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x00014bb9 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x00014bd3 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00014bdf Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x00014c43 Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x00014c81 Thumb Code 308 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00014db5 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x00014dd3 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00014ddb Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x00014df7 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x00014e0f Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x00014e1d Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x00014e5d Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x00014e6d Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x00014e75 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00014e97 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x00014e9f Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00014ec5 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x00014f6f Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x00014f85 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x00014f9d Thumb Code 32 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x00014fbd Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x00014fc9 Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x00014ffb Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_fls_gpio_connect 0x00015015 Thumb Code 18 drv_fls.o(i.drv_fls_gpio_connect) + drv_fls_gpio_disconnect 0x00015031 Thumb Code 22 drv_fls.o(i.drv_fls_gpio_disconnect) + drv_gpio_get_input_data 0x00015051 Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x00015069 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x00015075 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00015089 Thumb Code 74 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x000150d9 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x000150f9 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x00015109 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x00015119 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x00015129 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x00015159 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c1_set_callback 0x00015289 Thumb Code 6 drv_i2c_master.o(i.drv_i2c1_set_callback) + drv_i2c_dma_init 0x00015295 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x00015341 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x0001535b Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x00015375 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x000153d5 Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x000153e5 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_master_init 0x0001541d Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x000154a9 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x00015505 Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_lcdc_config_bypass 0x0001556f Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x00015587 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x000155b7 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x000155cd Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x000155f1 Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x00015617 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x0001562d Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x00015643 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x0001564f Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x0001566d Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x0001568f Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x000156b1 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x000156bd Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x000156d7 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x000156f9 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00015713 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x0001571f Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x0001576b Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00015771 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00015783 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x000157a5 Thumb Code 58 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_prefetch 0x000157e5 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_prefetch) + drv_lcdc_set_video_hw_mode 0x000157fd Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00015811 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x00015831 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x0001583d Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x0001587d Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00015889 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x0001589b Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x000158ab Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x000158b9 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x000158cd Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x000158d9 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x000158e9 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x000158fb Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x0001590b Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x00015921 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00015939 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x00015953 Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00015961 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00015989 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x00015999 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x000159a1 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x000159b5 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x000159c9 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x000159d1 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_p2r_filter_init 0x000159e5 Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x00015a09 Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x00015a19 Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x00015a55 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x00015ab5 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x00015b09 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00015b19 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x00015b31 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x00015b51 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x00015b77 Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x00015bb5 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x00015bd5 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x00015bed Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x00015c6b Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00015c75 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00015c79 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x00015cd5 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x00015ce9 Thumb Code 66 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x00015d4d Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x00015d63 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x00015d79 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x00015d85 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x00015d8d Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x00015d99 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x00015da5 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x00015db9 Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x00015e85 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x00015e99 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x00015ead Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x00015ebd Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x00015ee3 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x00015eeb Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_abort_dma 0x00015ef5 Thumb Code 90 drv_spi_dma.o(i.drv_spi_abort_dma) + drv_spi_dma_init 0x00015f9d Thumb Code 196 drv_spi_dma.o(i.drv_spi_dma_init) + drv_spi_m_enable_rx_dma 0x00016079 Thumb Code 26 drv_spi_master.o(i.drv_spi_m_enable_rx_dma) + drv_spi_m_enable_tx_dma 0x00016099 Thumb Code 24 drv_spi_master.o(i.drv_spi_m_enable_tx_dma) + drv_spi_s_enable_int 0x000160b5 Thumb Code 52 drv_spi_slave.o(i.drv_spi_s_enable_int) + drv_spi_s_enable_rx_dma 0x000160fd Thumb Code 26 drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) + drv_spi_s_enable_tx_dma 0x0001611d Thumb Code 24 drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) + drv_spi_s_gpio_init 0x00016139 Thumb Code 16 drv_spi_slave.o(i.drv_spi_s_gpio_init) + drv_spi_set_dma_irq_callback 0x00016151 Thumb Code 68 drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) + drv_spi_slave_init 0x000161a9 Thumb Code 68 drv_spi_slave.o(i.drv_spi_slave_init) + drv_spis_dma_write 0x000161f5 Thumb Code 58 drv_spi_dma.o(i.drv_spis_dma_write) + drv_swire_enable 0x0001623d Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_set_int 0x00016259 Thumb Code 76 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x000162ad Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x000162c9 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x000162d5 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x000162fd Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x00016315 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x00016331 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x00016355 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x00016379 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x00016389 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x00016399 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x000163d7 Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x000163f9 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x00016409 Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x0001645d Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x00016471 Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x00016481 Thumb Code 80 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x000164d5 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x000164fd Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x00016517 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x00016533 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00016585 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x0001658d Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x000165a5 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x000165e5 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x000165f9 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x00016621 Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x0001662d Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x00016633 Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x0001666f Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00016683 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x00016693 Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x0001669b Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x000166c1 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x000166e9 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x00016701 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x0001670b Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x0001671b Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00016725 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x0001672f Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00016741 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x0001674b Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00016755 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x0001676d Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x0001679d Thumb Code 60 drv_wdg.o(i.drv_wdg_set_int) + fls_clear_irq_status 0x000167dd Thumb Code 6 drv_fls.o(i.fls_clear_irq_status) + fls_clr_interrupt_flag 0x000167e3 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fls_ctrl_cfg_init 0x000167ed Thumb Code 72 drv_fls.o(i.fls_ctrl_cfg_init) + fls_dma_disable 0x00016835 Thumb Code 10 drv_fls_dma.o(i.fls_dma_disable) + fls_get_default_fls_config 0x0001683f Thumb Code 20 drv_fls.o(i.fls_get_default_fls_config) + fls_get_default_spi_config 0x00016853 Thumb Code 44 drv_fls.o(i.fls_get_default_spi_config) + fls_get_default_tuning 0x0001687f Thumb Code 12 drv_fls.o(i.fls_get_default_tuning) + fls_init 0x0001688b Thumb Code 62 drv_fls.o(i.fls_init) + fls_read_byte_data 0x000168c9 Thumb Code 130 drv_fls.o(i.fls_read_byte_data) + fls_set_read 0x0001694b Thumb Code 10 drv_fls.o(i.fls_set_read) + fls_set_tuning 0x00016955 Thumb Code 24 drv_fls.o(i.fls_set_tuning) + fls_spi_init 0x0001696d Thumb Code 180 drv_fls.o(i.fls_spi_init) + fls_spi_start 0x00016a21 Thumb Code 10 drv_fls.o(i.fls_spi_start) + fls_swrst 0x00016a2b Thumb Code 18 drv_fls.o(i.fls_swrst) + fputc 0x00016a3d Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00016a51 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x00016a85 Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00016b21 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016ba5 Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x00016bcd Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00016bf5 Thumb Code 144 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x000173c9 Thumb Code 56 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_send_ack_cmd 0x00017405 Thumb Code 214 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_sync_line 0x000174f5 Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x000175d5 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_set_tear_mode_ex 0x00017609 Thumb Code 14 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + hal_dsi_rx_ctrl_start 0x00017619 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x00017655 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x00017691 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x00017cc5 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00017cf1 Thumb Code 118 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x00017d75 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017dc1 Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x00017de9 Thumb Code 154 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x00017eb1 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00017ebd Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x00017ed1 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x00017ee1 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x00017f05 Thumb Code 140 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00017fa1 Thumb Code 56 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00017fe5 Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x000180bd Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x00018351 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x00018369 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x0001837d Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x000183bd Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x000183dd Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00018405 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x0001841d Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x0001846d Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x000184cd Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x000184d5 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x000184f5 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x00018561 Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x00018581 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x0001859d Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_internal_init_memc 0x000185c9 Thumb Code 170 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x000186c5 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_get_hight_performan_mode 0x000186d5 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change 0x000186e5 Thumb Code 438 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_vsync_deinit 0x00018911 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00018939 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00018945 Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tear_mode 0x0001895d Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + hal_internal_vsync_get_tx_state 0x00018969 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00018975 Thumb Code 236 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00018a8d Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x00018b3d Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x00018c59 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x00018c6d Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x00018c91 Thumb Code 72 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00018ce1 Thumb Code 118 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_spi_slave_auto_transfer_abort 0x00019179 Thumb Code 12 hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) + hal_spi_slave_auto_transfer_start 0x00019189 Thumb Code 44 hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) + hal_spi_slave_enable 0x000191c1 Thumb Code 40 hal_spi_slave.o(i.hal_spi_slave_enable) + hal_spi_slave_flush_fifo 0x00019221 Thumb Code 16 hal_spi_slave.o(i.hal_spi_slave_flush_fifo) + hal_spi_slave_gpio_init 0x00019235 Thumb Code 8 hal_spi_slave.o(i.hal_spi_slave_gpio_init) + hal_spi_slave_init 0x0001923d Thumb Code 66 hal_spi_slave.o(i.hal_spi_slave_init) + hal_spi_slave_register_callback 0x00019289 Thumb Code 8 hal_spi_slave.o(i.hal_spi_slave_register_callback) + hal_spi_slave_reset_tx 0x00019295 Thumb Code 52 hal_spi_slave.o(i.hal_spi_slave_reset_tx) + hal_spi_slave_set_auto_rx_buffer 0x000192d9 Thumb Code 12 hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) + hal_swire_deinit 0x000192e9 Thumb Code 18 hal_swire.o(i.hal_swire_deinit) + hal_swire_open 0x000192fb Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x00019311 Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x00019319 Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x000193a1 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x000193bd Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x000193c5 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x000193cd Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_system_share_flash_mode 0x000193d5 Thumb Code 20 hal_system.o(i.hal_system_share_flash_mode) + hal_timer_deinit 0x000193e9 Thumb Code 46 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x00019417 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x00019431 Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x00019479 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x000194a1 Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x0001952d Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x0001953d Thumb Code 140 irq_redirect .o(i.handle_init) + iic_tp_proc 0x0001964d Thumb Code 26 app_tp_for_custom_s8.o(i.iic_tp_proc) + main 0x000197b5 Thumb Code 10 main.o(i.main) + norflash_init 0x000197c1 Thumb Code 34 norflash.o(i.norflash_init) + norflash_read 0x000197f1 Thumb Code 22 norflash.o(i.norflash_read) + spi_init_proc 0x00019fbd Thumb Code 46 app_tp_for_custom_s8.o(i.spi_init_proc) + u32_enc_code 0x00019ff8 Data 8 app_tp_for_custom_s8.o(.ARM.__at_0x19FF8) + u8_date_inv 0x0001a000 Data 24 app_tp_for_custom_s8.o(.ARM.__at_0x1A000) + u32_bin_size 0x0001a018 Data 8 app_tp_for_custom_s8.o(.ARM.__at_0x1A018) + u8_message_code 0x0001a020 Data 224 app_tp_for_custom_s8.o(.ARM.__at_0x1A020) + spis_cs_irq 0x0001a669 Thumb Code 426 app_tp_for_custom_s8.o(i.spis_cs_irq) + sqrt 0x0001a829 Thumb Code 66 sqrt.o(i.sqrt) + tp_I2cPos_spiPosRaw_Proc 0x0001a871 Thumb Code 296 app_tp_for_custom_s8.o(i.tp_I2cPos_spiPosRaw_Proc) + tp_del_touchoff_data 0x0001a9a5 Thumb Code 162 app_tp_for_custom_s8.o(i.tp_del_touchoff_data) + tp_init_proc 0x0001aa51 Thumb Code 80 app_tp_for_custom_s8.o(i.tp_init_proc) + tp_io_init 0x0001aaa9 Thumb Code 30 app_tp_for_custom_s8.o(i.tp_io_init) + tp_pixel7pro_wakeup_Proc 0x0001aad5 Thumb Code 46 app_tp_for_custom_s8.o(i.tp_pixel7pro_wakeup_Proc) + tp_proc 0x0001ab11 Thumb Code 264 app_tp_for_custom_s8.o(i.tp_proc) + tp_touch_wakeup_Proc 0x0001ac35 Thumb Code 114 app_tp_for_custom_s8.o(i.tp_touch_wakeup_Proc) + panel_init_code 0x0001b0b8 Data 10444 ap_demo.o(.constdata) + iic_addr_list 0x0001da0c Data 9 app_tp_for_custom_s8.o(.constdata) + u8_wakeup_data 0x0001db2b Data 27 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001df90 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001dfc0 Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_DisplayOFF_flag 0x000701d6 Data 1 ap_demo.o(.data) + tp_sleep_in 0x000701db Data 1 ap_demo.o(.data) + tp_sleep_count 0x000701dc Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701de Data 2 ap_demo.o(.data) + value_reg_ca 0x000701e2 Data 2 ap_demo.o(.data) + rd_51_value 0x000701e4 Data 2 ap_demo.o(.data) + pps_fhd 0x000701f4 Data 128 ap_demo.o(.data) + g_phone_output_int_pad 0x00070274 Data 1 app_tp_for_custom_s8.o(.data) + g_cur_touchnum 0x00070276 Data 1 app_tp_for_custom_s8.o(.data) + g_pre_touchnum 0x00070277 Data 1 app_tp_for_custom_s8.o(.data) + g_tp_spi_com_flag 0x00070278 Data 1 app_tp_for_custom_s8.o(.data) + g_u8_pre_cmd 0x00070279 Data 1 app_tp_for_custom_s8.o(.data) + g_u8_cmd_cnt 0x0007027a Data 1 app_tp_for_custom_s8.o(.data) + g_u8_wakeup_flag 0x0007027b Data 1 app_tp_for_custom_s8.o(.data) + g_tp_int_flag 0x0007027e Data 1 app_tp_for_custom_s8.o(.data) + flag_tp_report 0x0007027f Data 1 app_tp_for_custom_s8.o(.data) + g_tp_sleep_flag 0x00070280 Data 1 app_tp_for_custom_s8.o(.data) + g_tp_sleepout_flag 0x00070281 Data 1 app_tp_for_custom_s8.o(.data) + g_u8CoordID 0x00070298 Data 6 app_tp_for_custom_s8.o(.data) + g_fls_w_cmd 0x000702ac Data 1 norflash.o(.data) + g_fls_r_cmd 0x000702ad Data 1 norflash.o(.data) + g_fls_write_en_status 0x000702ae Data 1 norflash.o(.data) + isFlsTransferEnd 0x000702af Data 1 norflash.o(.data) + isFlsFifoReq 0x000702b0 Data 1 norflash.o(.data) + isNandWriteCompleted 0x000702b1 Data 1 norflash.o(.data) + isNandReadCompleted 0x000702b2 Data 1 norflash.o(.data) + g_fls_error_info 0x000702b8 Data 6 norflash.o(.data) + g_systick_cb_func 0x000702c4 Data 4 drv_common.o(.data) + g_system_clock 0x000702c8 Data 4 drv_common.o(.data) + g_fls_tuning 0x000702cc Data 4 drv_fls.o(.data) + g_scld_fhd_filter_h 0x000702d4 Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x000703d4 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x000704d4 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x000705d4 Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x000706d4 Data 128 drv_param_init.o(.data) + g_ccm_setting 0x00070754 Data 36 drv_param_init.o(.data) + g_sof_gen_te_func 0x000707e8 Data 4 hal_internal_vsync.o(.data) + g_int_rxbr_irq0_cb_func 0x000707ec Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x000707f0 Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x000707f4 Data 4 drv_vidc.o(.data) + __stdout 0x00070838 Data 4 stdout.o(.data) + g_u16CoordX 0x00070840 Data 12 app_tp_for_custom_s8.o(.bss) + g_u16CoordY 0x0007084c Data 12 app_tp_for_custom_s8.o(.bss) + spi0_dma_tx_array 0x00070864 Data 1501 app_tp_for_custom_s8.o(.bss) + spi0_rx_array 0x00070e41 Data 32 app_tp_for_custom_s8.o(.bss) + g_tp_raw_buf 0x00070e64 Data 1404 app_tp_for_custom_s8.o(.bss) + string 0x000714f0 Data 256 tau_log.o(.bss) + g_spis_ctrl_handle 0x000715f0 Data 32 hal_spi_slave.o(.bss) + hal_dmahandle 0x00071610 Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x000716b0 Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x000716d0 Data 16 hal_uart.o(.bss) + g_fls_best_cfg 0x000716e0 Data 32 norflash.o(.bss) + g_fls_spi_cfg 0x00071700 Data 28 norflash.o(.bss) + g_nandDmaHandle 0x0007171c Data 32 norflash.o(.bss) + g_nand_dma_ReadHandle 0x0007173c Data 160 norflash.o(.bss) + g_nand_dma_WriteHandle 0x000717dc Data 160 norflash.o(.bss) + g_vsync_hande 0x000718bc Data 80 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x0007190c Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x0007222c Data 4144 dcs_packet_fifo.o(.bss) + __stack_limit 0x00073458 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00074458 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000e630, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000e3ac]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000dfc0, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 312 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2577 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2887 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2890 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2892 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2894 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2895 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2897 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2899 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2888 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 313 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2580 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2582 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2584 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2586 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 2851 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 2853 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 2855 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 2857 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 2859 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 2861 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 2863 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 2865 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 2867 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 2871 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 2873 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 2875 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 2877 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 2879 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 2881 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 2883 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 2885 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 2902 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 2904 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 2906 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 2908 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 2917 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 2918 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 2920 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 2924 .text mf_p.l(dsqrt.o) + 0x00010afa 0x00010afa 0x00000002 PAD + 0x00010afc 0x00010afc 0x00000040 Code RO 2926 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 2928 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 2930 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000056 Code RO 2940 .text mc_p.l(__dczerorl2.o) + 0x00010bde 0x00010bde 0x00000002 PAD + 0x00010be0 0x00010be0 0x00000018 Code RO 2056 i.ADC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010bf8 0x00010bf8 0x00000018 Code RO 2057 i.AP_NRESET_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c10 0x00010c10 0x00000014 Code RO 2058 i.DMA_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c24 0x00010c24 0x0000001c Code RO 2059 i.EXTI_INT0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c40 0x00010c40 0x0000001c Code RO 2060 i.EXTI_INT1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c5c 0x00010c5c 0x0000001c Code RO 2061 i.EXTI_INT2_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c78 0x00010c78 0x0000001c Code RO 2062 i.EXTI_INT3_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010c94 0x00010c94 0x0000001c Code RO 2063 i.EXTI_INT4_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010cb0 0x00010cb0 0x0000001c Code RO 2064 i.EXTI_INT5_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ccc 0x00010ccc 0x0000001c Code RO 2065 i.EXTI_INT6_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010ce8 0x00010ce8 0x0000001c Code RO 2066 i.EXTI_INT7_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d04 0x00010d04 0x00000050 Code RO 320 i.EncryptCheck ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x00010d54 0x00010d54 0x00000014 Code RO 2067 i.FLSCTRL_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00010d68 0x00010d68 0x000000f8 Code RO 321 i.FST_tp_init ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x00010e60 0x00010e60 0x0000019c Code RO 322 i.FingerPos2RawData ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x00010ffc 0x00010ffc 0x00000002 Code RO 2459 i.UART_DisableDma CVWL568.lib(drv_uart.o) + 0x00010ffe 0x00010ffe 0x00000002 Code RO 2935 i.__scatterload_null mc_p.l(handlers.o) + 0x00011000 0x00011000 0x00000014 Data RO 1124 .ARM.__at_0x11000 CVWL568.lib(drv_common.o) + 0x00011014 0x00011014 0x00000004 Code RO 2465 i.UART_GetInstance CVWL568.lib(drv_uart.o) + 0x00011018 0x00011018 0x00000004 Data RO 1125 .ARM.__at_0x11018 CVWL568.lib(drv_common.o) + 0x0001101c 0x0001101c 0x000000b8 Code RO 323 i.Get_IIC_Addr ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x000110d4 0x000110d4 0x0000004e Code RO 97 i.Gpio_swire_output ap_demo.o + 0x00011122 0x00011122 0x00000002 PAD + 0x00011124 0x00011124 0x00000014 Code RO 2068 i.HardFault_Handler CVWL568.lib(irq_redirect .o) + 0x00011138 0x00011138 0x00000018 Code RO 2069 i.I2C0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011150 0x00011150 0x00000018 Code RO 2070 i.I2C1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011168 0x00011168 0x00000024 Code RO 324 i.IIC_WriteM_ReadN ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001118c 0x0001118c 0x00000018 Code RO 2071 i.LCDC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000111a4 0x000111a4 0x00000028 Code RO 940 i.LOG_printf CVWL568.lib(tau_log.o) + 0x000111cc 0x000111cc 0x00000018 Code RO 2072 i.MEMC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000111e4 0x000111e4 0x00000018 Code RO 2073 i.MIPI_RX_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x000111fc 0x000111fc 0x00000018 Code RO 2074 i.MIPI_TX_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011214 0x00011214 0x0000001c Code RO 326 i.M_delay_ms ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x00011230 0x00011230 0x00000022 Code RO 327 i.M_delay_us ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x00011252 0x00011252 0x00000002 PAD + 0x00011254 0x00011254 0x0000001c Code RO 2075 i.PWMDET_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011270 0x00011270 0x000000e0 Code RO 328 i.RawData2DiffBuff ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x00011350 0x00011350 0x000006ec Code RO 329 i.Read_TP_Data ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x00011a3c 0x00011a3c 0x0000001c Code RO 2076 i.SPIM_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011a58 0x00011a58 0x0000001c Code RO 2077 i.SPIS_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011a74 0x00011a74 0x0000001c Code RO 2078 i.SWIRE_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011a90 0x00011a90 0x00000018 Code RO 2079 i.SysTick_Handler CVWL568.lib(irq_redirect .o) + 0x00011aa8 0x00011aa8 0x00000018 Code RO 2080 i.TIMER0_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011ac0 0x00011ac0 0x00000018 Code RO 2081 i.TIMER1_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011ad8 0x00011ad8 0x00000018 Code RO 2082 i.TIMER2_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011af0 0x00011af0 0x00000018 Code RO 2083 i.TIMER3_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011b08 0x00011b08 0x0000001c Code RO 2455 i.UART0_IRQ_Handle CVWL568.lib(drv_uart.o) + 0x00011b24 0x00011b24 0x00000018 Code RO 2084 i.UART_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011b3c 0x00011b3c 0x00000024 Code RO 2473 i.UART_ResetRxFIFO CVWL568.lib(drv_uart.o) + 0x00011b60 0x00011b60 0x00000048 Code RO 2476 i.UART_SetBaudRate CVWL568.lib(drv_uart.o) + 0x00011ba8 0x00011ba8 0x0000001a Code RO 2477 i.UART_SwitchSCLK CVWL568.lib(drv_uart.o) + 0x00011bc2 0x00011bc2 0x00000134 Code RO 2479 i.UART_TransferHandleIRQ CVWL568.lib(drv_uart.o) + 0x00011cf6 0x00011cf6 0x0000001a Code RO 2481 i.UART_WriteBlocking CVWL568.lib(drv_uart.o) + 0x00011d10 0x00011d10 0x000000bc Code RO 2482 i.UART_init CVWL568.lib(drv_uart.o) + 0x00011dcc 0x00011dcc 0x00000018 Code RO 2085 i.VIDC_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011de4 0x00011de4 0x00000018 Code RO 2086 i.VPRE_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011dfc 0x00011dfc 0x00000018 Code RO 2087 i.WDG_IRQn_Handler CVWL568.lib(irq_redirect .o) + 0x00011e14 0x00011e14 0x00000020 Code RO 2823 i.__0printf mc_p.l(printfa.o) + 0x00011e34 0x00011e34 0x00000024 Code RO 2829 i.__0vsprintf mc_p.l(printfa.o) + 0x00011e58 0x00011e58 0x0000002e Code RO 2922 i.__ARM_clz mf_p.l(depilogue.o) + 0x00011e86 0x00011e86 0x0000001a Code RO 246 i.__ARM_common_switch8 ap_demo.o + 0x00011ea0 0x00011ea0 0x00000018 Code RO 2308 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_i2c_master.o) + 0x00011eb8 0x00011eb8 0x00000018 Code RO 2370 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_spi_dma.o) + 0x00011ed0 0x00011ed0 0x00000018 Code RO 2396 i.__NVIC_ClearPendingIRQ CVWL568.lib(drv_spi_master.o) + 0x00011ee8 0x00011ee8 0x00000020 Code RO 1910 i.__NVIC_DisableIRQ CVWL568.lib(drv_rxbr.o) + 0x00011f08 0x00011f08 0x00000018 Code RO 1911 i.__NVIC_EnableIRQ CVWL568.lib(drv_rxbr.o) + 0x00011f20 0x00011f20 0x00000044 Code RO 970 i.__NVIC_SetPriority CVWL568.lib(hal_spi_slave.o) + 0x00011f64 0x00011f64 0x0000000e Code RO 2934 i.__scatterload_copy mc_p.l(handlers.o) + 0x00011f72 0x00011f72 0x0000000e Code RO 2936 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x00011f80 0x00011f80 0x0000000c Code RO 2912 i.__set_errno mc_p.l(errno.o) + 0x00011f8c 0x00011f8c 0x00000174 Code RO 2830 i._fp_digits mc_p.l(printfa.o) + 0x00012100 0x00012100 0x000006ec Code RO 2831 i._printf_core mc_p.l(printfa.o) + 0x000127ec 0x000127ec 0x00000020 Code RO 2832 i._printf_post_padding mc_p.l(printfa.o) + 0x0001280c 0x0001280c 0x0000002c Code RO 2833 i._printf_pre_padding mc_p.l(printfa.o) + 0x00012838 0x00012838 0x0000000a Code RO 2835 i._sputc mc_p.l(printfa.o) + 0x00012842 0x00012842 0x00000002 PAD + 0x00012844 0x00012844 0x0000010c Code RO 101 i.ap_dcs_read ap_demo.o + 0x00012950 0x00012950 0x000001d4 Code RO 102 i.ap_demo ap_demo.o + 0x00012b24 0x00012b24 0x0000007c Code RO 105 i.ap_reset_cb ap_demo.o + 0x00012ba0 0x00012ba0 0x00000050 Code RO 106 i.ap_set_backlight ap_demo.o + 0x00012bf0 0x00012bf0 0x0000009c Code RO 107 i.ap_set_backlight_B1 ap_demo.o + 0x00012c8c 0x00012c8c 0x00000048 Code RO 108 i.ap_set_display_off ap_demo.o + 0x00012cd4 0x00012cd4 0x00000098 Code RO 109 i.ap_set_display_on ap_demo.o + 0x00012d6c 0x00012d6c 0x0000008c Code RO 110 i.ap_set_enter_sleep_mode ap_demo.o + 0x00012df8 0x00012df8 0x00000048 Code RO 111 i.ap_set_exit_sleep_mode ap_demo.o + 0x00012e40 0x00012e40 0x00000080 Code RO 112 i.ap_update_frame_rate ap_demo.o + 0x00012ec0 0x00012ec0 0x0000001c Code RO 1912 i.app_ADC_IRQn_Handler CVWL568.lib(drv_rxbr.o) + 0x00012edc 0x00012edc 0x00000024 Code RO 1316 i.app_AP_NRESET_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00012f00 0x00012f00 0x0000001c Code RO 1317 i.app_EXTI_INT0_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00012f1c 0x00012f1c 0x0000001c Code RO 1318 i.app_EXTI_INT1_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00012f38 0x00012f38 0x0000001c Code RO 1319 i.app_EXTI_INT2_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00012f54 0x00012f54 0x0000001c Code RO 1320 i.app_EXTI_INT3_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00012f70 0x00012f70 0x0000001c Code RO 1321 i.app_EXTI_INT4_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00012f8c 0x00012f8c 0x0000001c Code RO 1322 i.app_EXTI_INT5_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00012fa8 0x00012fa8 0x0000001c Code RO 1323 i.app_EXTI_INT6_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00012fc4 0x00012fc4 0x0000001c Code RO 1324 i.app_EXTI_INT7_IRQn_Handler CVWL568.lib(drv_gpio.o) + 0x00012fe0 0x00012fe0 0x00000048 Code RO 1116 i.app_HardFault_Handler CVWL568.lib(drv_common.o) + 0x00013028 0x00013028 0x00000018 Code RO 2343 i.app_I2C0_IRQn_Handler CVWL568.lib(drv_i2c_slave.o) + 0x00013040 0x00013040 0x00000010 Code RO 2309 i.app_I2C1_IRQn_Handler CVWL568.lib(drv_i2c_master.o) + 0x00013050 0x00013050 0x00000130 Code RO 1528 i.app_LCDC_IRQn_Handler CVWL568.lib(hal_internal_vsync.o) + 0x00013180 0x00013180 0x00000088 Code RO 1854 i.app_MEMC_IRQn_Handler CVWL568.lib(drv_memc.o) + 0x00013208 0x00013208 0x00000298 Code RO 1626 i.app_MIPI_RX_IRQn_Handler CVWL568.lib(drv_dsi_rx.o) + 0x000134a0 0x000134a0 0x000000a0 Code RO 1682 i.app_MIPI_TX_IRQn_Handler CVWL568.lib(drv_dsi_tx.o) + 0x00013540 0x00013540 0x00000048 Code RO 1390 i.app_PWMDET_IRQn_Handler CVWL568.lib(drv_pwm.o) + 0x00013588 0x00013588 0x00000030 Code RO 2397 i.app_SPIM_IRQn_Handler CVWL568.lib(drv_spi_master.o) + 0x000135b8 0x000135b8 0x00000200 Code RO 971 i.app_SPIS_IRQn_Handler CVWL568.lib(hal_spi_slave.o) + 0x000137b8 0x000137b8 0x00000020 Code RO 1443 i.app_SWIRE_IRQn_Handler CVWL568.lib(drv_swire.o) + 0x000137d8 0x000137d8 0x00000018 Code RO 1117 i.app_SysTick_Handler CVWL568.lib(drv_common.o) + 0x000137f0 0x000137f0 0x0000000a Code RO 1493 i.app_TIMER0_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x000137fa 0x000137fa 0x0000000a Code RO 1494 i.app_TIMER1_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00013804 0x00013804 0x0000000a Code RO 1495 i.app_TIMER2_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x0001380e 0x0001380e 0x0000000a Code RO 1496 i.app_TIMER3_IRQn_Handler CVWL568.lib(drv_timer.o) + 0x00013818 0x00013818 0x00000008 Code RO 2483 i.app_UART_IRQn_Handler CVWL568.lib(drv_uart.o) + 0x00013820 0x00013820 0x0000001c Code RO 1977 i.app_VIDC_IRQn_Handler CVWL568.lib(drv_vidc.o) + 0x0001383c 0x0001383c 0x0000001c Code RO 1913 i.app_VPRE_IRQn_Handler CVWL568.lib(drv_rxbr.o) + 0x00013858 0x00013858 0x00000038 Code RO 2542 i.app_WDG_IRQn_Handler CVWL568.lib(drv_wdg.o) + 0x00013890 0x00013890 0x00000010 Code RO 2206 i.app_dma_irq_handler CVWL568.lib(drv_dma.o) + 0x000138a0 0x000138a0 0x00000030 Code RO 1032 i.app_fls_ctrl_Handler CVWL568.lib(norflash.o) + 0x000138d0 0x000138d0 0x0000000e Code RO 330 i.app_tp_spis_irq ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x000138de 0x000138de 0x00000002 PAD + 0x000138e0 0x000138e0 0x00000100 Code RO 331 i.bin_send ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x000139e0 0x000139e0 0x00000024 Code RO 292 i.board_Init board.o + 0x00013a04 0x00013a04 0x00000472 Code RO 1529 i.calc_framebuffer_setting CVWL568.lib(hal_internal_vsync.o) + 0x00013e76 0x00013e76 0x00000002 PAD + 0x00013e78 0x00013e78 0x000000c8 Code RO 2566 i.ceil m_ps.l(ceil.o) + 0x00013f40 0x00013f40 0x0000002c Code RO 1530 i.check_mipi_rx_tx_video_info CVWL568.lib(hal_internal_vsync.o) + 0x00013f6c 0x00013f6c 0x00000094 Code RO 1531 i.check_pkt_buf_rev CVWL568.lib(hal_internal_vsync.o) + 0x00014000 0x00014000 0x00000058 Code RO 1613 i.dcs_packet_fifo_alloc CVWL568.lib(dcs_packet_fifo.o) + 0x00014058 0x00014058 0x00000018 Code RO 1614 i.dcs_packet_fifo_init CVWL568.lib(dcs_packet_fifo.o) + 0x00014070 0x00014070 0x00000044 Code RO 1615 i.dcs_packet_free_fifo_header CVWL568.lib(dcs_packet_fifo.o) + 0x000140b4 0x000140b4 0x00000024 Code RO 1616 i.dcs_packet_get_fifo_header CVWL568.lib(dcs_packet_fifo.o) + 0x000140d8 0x000140d8 0x0000001c Code RO 1532 i.dcs_sw_filter CVWL568.lib(hal_internal_vsync.o) + 0x000140f4 0x000140f4 0x00000018 Code RO 932 i.delayMs CVWL568.lib(tau_delay.o) + 0x0001410c 0x0001410c 0x00000022 Code RO 933 i.delayUs CVWL568.lib(tau_delay.o) + 0x0001412e 0x0001412e 0x00000002 PAD + 0x00014130 0x00014130 0x00000038 Code RO 1462 i.drv_ap_rst_trig_edge_detect CVWL568.lib(drv_sys_cfg.o) + 0x00014168 0x00014168 0x0000000c Code RO 2177 i.drv_chip_info_get_info CVWL568.lib(drv_chip_info.o) + 0x00014174 0x00014174 0x00000040 Code RO 2178 i.drv_chip_info_init CVWL568.lib(drv_chip_info.o) + 0x000141b4 0x000141b4 0x000000c8 Code RO 2179 i.drv_chip_rx_info_check CVWL568.lib(drv_chip_info.o) + 0x0001427c 0x0001427c 0x00000014 Code RO 2180 i.drv_chip_rx_init_done CVWL568.lib(drv_chip_info.o) + 0x00014290 0x00014290 0x00000058 Code RO 1119 i.drv_common_enable_systick CVWL568.lib(drv_common.o) + 0x000142e8 0x000142e8 0x00000008 Code RO 1122 i.drv_common_system_init CVWL568.lib(drv_common.o) + 0x000142f0 0x000142f0 0x00000010 Code RO 1144 i.drv_crgu_config_reset_modules CVWL568.lib(drv_crgu.o) + 0x00014300 0x00014300 0x00000014 Code RO 1157 i.drv_crgu_set_ahb_pre_div CVWL568.lib(drv_crgu.o) + 0x00014314 0x00014314 0x00000014 Code RO 1158 i.drv_crgu_set_ahb_src CVWL568.lib(drv_crgu.o) + 0x00014328 0x00014328 0x00000020 Code RO 1161 i.drv_crgu_set_clock CVWL568.lib(drv_crgu.o) + 0x00014348 0x00014348 0x00000014 Code RO 1162 i.drv_crgu_set_dpi_mux_src CVWL568.lib(drv_crgu.o) + 0x0001435c 0x0001435c 0x00000018 Code RO 1163 i.drv_crgu_set_dpi_pre_div CVWL568.lib(drv_crgu.o) + 0x00014374 0x00014374 0x00000014 Code RO 1164 i.drv_crgu_set_dpi_pre_src CVWL568.lib(drv_crgu.o) + 0x00014388 0x00014388 0x00000014 Code RO 1165 i.drv_crgu_set_dsc_core_div CVWL568.lib(drv_crgu.o) + 0x0001439c 0x0001439c 0x00000014 Code RO 1166 i.drv_crgu_set_dsco_src CVWL568.lib(drv_crgu.o) + 0x000143b0 0x000143b0 0x00000014 Code RO 1167 i.drv_crgu_set_dsco_src_div CVWL568.lib(drv_crgu.o) + 0x000143c4 0x000143c4 0x00000014 Code RO 1168 i.drv_crgu_set_fb_div CVWL568.lib(drv_crgu.o) + 0x000143d8 0x000143d8 0x00000014 Code RO 1169 i.drv_crgu_set_fb_src CVWL568.lib(drv_crgu.o) + 0x000143ec 0x000143ec 0x00000014 Code RO 1172 i.drv_crgu_set_lcdc_div CVWL568.lib(drv_crgu.o) + 0x00014400 0x00014400 0x00000014 Code RO 1173 i.drv_crgu_set_lcdc_src CVWL568.lib(drv_crgu.o) + 0x00014414 0x00014414 0x00000014 Code RO 1174 i.drv_crgu_set_mipi_cfg_src CVWL568.lib(drv_crgu.o) + 0x00014428 0x00014428 0x00000018 Code RO 1175 i.drv_crgu_set_mipi_ref_src CVWL568.lib(drv_crgu.o) + 0x00014440 0x00014440 0x00000018 Code RO 1178 i.drv_crgu_set_reset CVWL568.lib(drv_crgu.o) + 0x00014458 0x00014458 0x00000014 Code RO 1179 i.drv_crgu_set_rxbr_div CVWL568.lib(drv_crgu.o) + 0x0001446c 0x0001446c 0x00000014 Code RO 1180 i.drv_crgu_set_rxbr_src CVWL568.lib(drv_crgu.o) + 0x00014480 0x00014480 0x00000014 Code RO 1182 i.drv_crgu_set_vidc_src CVWL568.lib(drv_crgu.o) + 0x00014494 0x00014494 0x00000018 Code RO 2210 i.drv_dma_clear_flag CVWL568.lib(drv_dma.o) + 0x000144ac 0x000144ac 0x0000001c Code RO 2211 i.drv_dma_create_handle CVWL568.lib(drv_dma.o) + 0x000144c8 0x000144c8 0x00000010 Code RO 2213 i.drv_dma_disenable_channel CVWL568.lib(drv_dma.o) + 0x000144d8 0x000144d8 0x00000018 Code RO 2214 i.drv_dma_disenable_channel_interrupts CVWL568.lib(drv_dma.o) + 0x000144f0 0x000144f0 0x00000010 Code RO 2215 i.drv_dma_enable_channel CVWL568.lib(drv_dma.o) + 0x00014500 0x00014500 0x0000002c Code RO 2217 i.drv_dma_enable_cycle CVWL568.lib(drv_dma.o) + 0x0001452c 0x0001452c 0x0000000c Code RO 2218 i.drv_dma_get_channel_flag CVWL568.lib(drv_dma.o) + 0x00014538 0x00014538 0x00000090 Code RO 2221 i.drv_dma_irq_handler CVWL568.lib(drv_dma.o) + 0x000145c8 0x000145c8 0x00000012 Code RO 2223 i.drv_dma_prepar_transfer CVWL568.lib(drv_dma.o) + 0x000145da 0x000145da 0x0000001a Code RO 2225 i.drv_dma_set_burst CVWL568.lib(drv_dma.o) + 0x000145f4 0x000145f4 0x00000006 Code RO 2226 i.drv_dma_set_callback CVWL568.lib(drv_dma.o) + 0x000145fa 0x000145fa 0x00000002 PAD + 0x000145fc 0x000145fc 0x00000044 Code RO 2228 i.drv_dma_set_transfer CVWL568.lib(drv_dma.o) + 0x00014640 0x00014640 0x00000036 Code RO 2190 i.drv_dsc_dec_convert_pps_rc_parameter CVWL568.lib(drv_dsc_dec.o) + 0x00014676 0x00014676 0x0000000c Code RO 2191 i.drv_dsc_dec_disable CVWL568.lib(drv_dsc_dec.o) + 0x00014682 0x00014682 0x00000002 PAD + 0x00014684 0x00014684 0x00000074 Code RO 2192 i.drv_dsc_dec_enable CVWL568.lib(drv_dsc_dec.o) + 0x000146f8 0x000146f8 0x0000000a Code RO 2193 i.drv_dsc_dec_get_nslc CVWL568.lib(drv_dsc_dec.o) + 0x00014702 0x00014702 0x00000028 Code RO 2195 i.drv_dsc_dec_set_u8_pps CVWL568.lib(drv_dsc_dec.o) + 0x0001472a 0x0001472a 0x00000002 PAD + 0x0001472c 0x0001472c 0x00000104 Code RO 1627 i.drv_dsi_rx_calc_ipi_tx_delay CVWL568.lib(drv_dsi_rx.o) + 0x00014830 0x00014830 0x00000040 Code RO 1628 i.drv_dsi_rx_enable_irq CVWL568.lib(drv_dsi_rx.o) + 0x00014870 0x00014870 0x00000050 Code RO 1629 i.drv_dsi_rx_get_color_bpp CVWL568.lib(drv_dsi_rx.o) + 0x000148c0 0x000148c0 0x0000001c Code RO 1630 i.drv_dsi_rx_get_color_pcc CVWL568.lib(drv_dsi_rx.o) + 0x000148dc 0x000148dc 0x00000008 Code RO 1631 i.drv_dsi_rx_get_compression_en CVWL568.lib(drv_dsi_rx.o) + 0x000148e4 0x000148e4 0x00000006 Code RO 1632 i.drv_dsi_rx_get_max_ret_size CVWL568.lib(drv_dsi_rx.o) + 0x000148ea 0x000148ea 0x0000000e Code RO 1636 i.drv_dsi_rx_power_up CVWL568.lib(drv_dsi_rx.o) + 0x000148f8 0x000148f8 0x00000020 Code RO 1637 i.drv_dsi_rx_set_ctrl_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00014918 0x00014918 0x00000010 Code RO 1638 i.drv_dsi_rx_set_ddi_cfg CVWL568.lib(drv_dsi_rx.o) + 0x00014928 0x00014928 0x00000004 Code RO 1640 i.drv_dsi_rx_set_inten CVWL568.lib(drv_dsi_rx.o) + 0x0001492c 0x0001492c 0x00000010 Code RO 1641 i.drv_dsi_rx_set_ipi_cfg CVWL568.lib(drv_dsi_rx.o) + 0x0001493c 0x0001493c 0x00000046 Code RO 1643 i.drv_dsi_rx_set_lane_swap CVWL568.lib(drv_dsi_rx.o) + 0x00014982 0x00014982 0x00000026 Code RO 1644 i.drv_dsi_rx_set_resp_cnt CVWL568.lib(drv_dsi_rx.o) + 0x000149a8 0x000149a8 0x00000104 Code RO 1645 i.drv_dsi_rx_set_up_phy CVWL568.lib(drv_dsi_rx.o) + 0x00014aac 0x00014aac 0x0000000e Code RO 1646 i.drv_dsi_rx_shut_down CVWL568.lib(drv_dsi_rx.o) + 0x00014aba 0x00014aba 0x00000014 Code RO 1684 i.drv_dsi_tx_command_header CVWL568.lib(drv_dsi_tx.o) + 0x00014ace 0x00014ace 0x0000006c Code RO 1685 i.drv_dsi_tx_command_mode_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00014b3a 0x00014b3a 0x00000004 Code RO 1686 i.drv_dsi_tx_command_put_payload CVWL568.lib(drv_dsi_tx.o) + 0x00014b3e 0x00014b3e 0x00000018 Code RO 1687 i.drv_dsi_tx_config_eotp CVWL568.lib(drv_dsi_tx.o) + 0x00014b56 0x00014b56 0x00000008 Code RO 1688 i.drv_dsi_tx_config_int CVWL568.lib(drv_dsi_tx.o) + 0x00014b5e 0x00014b5e 0x00000008 Code RO 1689 i.drv_dsi_tx_dpi_lpcmd_time CVWL568.lib(drv_dsi_tx.o) + 0x00014b66 0x00014b66 0x0000000a Code RO 1690 i.drv_dsi_tx_dpi_mode CVWL568.lib(drv_dsi_tx.o) + 0x00014b70 0x00014b70 0x00000024 Code RO 1691 i.drv_dsi_tx_dpi_polarity CVWL568.lib(drv_dsi_tx.o) + 0x00014b94 0x00014b94 0x00000004 Code RO 1692 i.drv_dsi_tx_edpi_cmd_size CVWL568.lib(drv_dsi_tx.o) + 0x00014b98 0x00014b98 0x00000004 Code RO 1694 i.drv_dsi_tx_get_cmd_status CVWL568.lib(drv_dsi_tx.o) + 0x00014b9c 0x00014b9c 0x00000004 Code RO 1696 i.drv_dsi_tx_mode CVWL568.lib(drv_dsi_tx.o) + 0x00014ba0 0x00014ba0 0x00000018 Code RO 1697 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL568.lib(drv_dsi_tx.o) + 0x00014bb8 0x00014bb8 0x0000001a Code RO 1698 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL568.lib(drv_dsi_tx.o) + 0x00014bd2 0x00014bd2 0x0000000c Code RO 1700 i.drv_dsi_tx_phy_lane_mode CVWL568.lib(drv_dsi_tx.o) + 0x00014bde 0x00014bde 0x00000064 Code RO 1704 i.drv_dsi_tx_phy_status_ready CVWL568.lib(drv_dsi_tx.o) + 0x00014c42 0x00014c42 0x0000003e Code RO 1705 i.drv_dsi_tx_phy_status_stopstate CVWL568.lib(drv_dsi_tx.o) + 0x00014c80 0x00014c80 0x00000134 Code RO 1707 i.drv_dsi_tx_phy_test_setup CVWL568.lib(drv_dsi_tx.o) + 0x00014db4 0x00014db4 0x0000001e Code RO 1708 i.drv_dsi_tx_phy_time_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00014dd2 0x00014dd2 0x00000008 Code RO 1712 i.drv_dsi_tx_powerup CVWL568.lib(drv_dsi_tx.o) + 0x00014dda 0x00014dda 0x0000001c Code RO 1713 i.drv_dsi_tx_response_mode CVWL568.lib(drv_dsi_tx.o) + 0x00014df6 0x00014df6 0x00000018 Code RO 1716 i.drv_dsi_tx_set_bta_ack CVWL568.lib(drv_dsi_tx.o) + 0x00014e0e 0x00014e0e 0x0000000c Code RO 1717 i.drv_dsi_tx_set_esc_div CVWL568.lib(drv_dsi_tx.o) + 0x00014e1a 0x00014e1a 0x00000002 PAD + 0x00014e1c 0x00014e1c 0x00000040 Code RO 1718 i.drv_dsi_tx_set_int CVWL568.lib(drv_dsi_tx.o) + 0x00014e5c 0x00014e5c 0x00000010 Code RO 1719 i.drv_dsi_tx_set_time_out_div CVWL568.lib(drv_dsi_tx.o) + 0x00014e6c 0x00014e6c 0x00000008 Code RO 1720 i.drv_dsi_tx_set_video_chunk CVWL568.lib(drv_dsi_tx.o) + 0x00014e74 0x00014e74 0x00000022 Code RO 1721 i.drv_dsi_tx_set_video_timing CVWL568.lib(drv_dsi_tx.o) + 0x00014e96 0x00014e96 0x00000008 Code RO 1723 i.drv_dsi_tx_shutdown CVWL568.lib(drv_dsi_tx.o) + 0x00014e9e 0x00014e9e 0x00000026 Code RO 1724 i.drv_dsi_tx_timeout_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00014ec4 0x00014ec4 0x000000aa Code RO 1727 i.drv_dsi_tx_video_mode_cfg CVWL568.lib(drv_dsi_tx.o) + 0x00014f6e 0x00014f6e 0x00000016 Code RO 1728 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL568.lib(drv_dsi_tx.o) + 0x00014f84 0x00014f84 0x00000018 Code RO 1729 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL568.lib(drv_dsi_tx.o) + 0x00014f9c 0x00014f9c 0x00000020 Code RO 2128 i.drv_efuse_enter_inactive CVWL568.lib(drv_efuse.o) + 0x00014fbc 0x00014fbc 0x0000000c Code RO 2131 i.drv_efuse_int_enable CVWL568.lib(drv_efuse.o) + 0x00014fc8 0x00014fc8 0x00000032 Code RO 2132 i.drv_efuse_read CVWL568.lib(drv_efuse.o) + 0x00014ffa 0x00014ffa 0x00000018 Code RO 2133 i.drv_efuse_read_req CVWL568.lib(drv_efuse.o) + 0x00015012 0x00015012 0x00000002 PAD + 0x00015014 0x00015014 0x0000001c Code RO 1232 i.drv_fls_gpio_connect CVWL568.lib(drv_fls.o) + 0x00015030 0x00015030 0x00000020 Code RO 1233 i.drv_fls_gpio_disconnect CVWL568.lib(drv_fls.o) + 0x00015050 0x00015050 0x00000018 Code RO 1325 i.drv_gpio_get_input_data CVWL568.lib(drv_gpio.o) + 0x00015068 0x00015068 0x0000000c Code RO 1327 i.drv_gpio_register_ap_reset_callback CVWL568.lib(drv_gpio.o) + 0x00015074 0x00015074 0x00000014 Code RO 1328 i.drv_gpio_register_callback CVWL568.lib(drv_gpio.o) + 0x00015088 0x00015088 0x00000050 Code RO 1330 i.drv_gpio_set_int CVWL568.lib(drv_gpio.o) + 0x000150d8 0x000150d8 0x00000020 Code RO 1331 i.drv_gpio_set_ioe CVWL568.lib(drv_gpio.o) + 0x000150f8 0x000150f8 0x00000010 Code RO 1332 i.drv_gpio_set_mode0 CVWL568.lib(drv_gpio.o) + 0x00015108 0x00015108 0x00000010 Code RO 1333 i.drv_gpio_set_mode1 CVWL568.lib(drv_gpio.o) + 0x00015118 0x00015118 0x00000010 Code RO 1334 i.drv_gpio_set_mode2 CVWL568.lib(drv_gpio.o) + 0x00015128 0x00015128 0x00000010 Code RO 1335 i.drv_gpio_set_mode3 CVWL568.lib(drv_gpio.o) + 0x00015138 0x00015138 0x00000020 Code RO 768 i.drv_gpio_set_output_data CVWL568.lib(hal_gpio.o) + 0x00015158 0x00015158 0x00000130 Code RO 1336 i.drv_gpio_set_pull_state CVWL568.lib(drv_gpio.o) + 0x00015288 0x00015288 0x0000000c Code RO 2310 i.drv_i2c1_set_callback CVWL568.lib(drv_i2c_master.o) + 0x00015294 0x00015294 0x000000ac Code RO 2285 i.drv_i2c_dma_init CVWL568.lib(drv_i2c_dma.o) + 0x00015340 0x00015340 0x0000001a Code RO 2286 i.drv_i2c_enable_rx_dma CVWL568.lib(drv_i2c_dma.o) + 0x0001535a 0x0001535a 0x00000018 Code RO 2287 i.drv_i2c_enable_tx_dma CVWL568.lib(drv_i2c_dma.o) + 0x00015372 0x00015372 0x00000002 PAD + 0x00015374 0x00015374 0x00000060 Code RO 2312 i.drv_i2c_m_clear_it_pending_bit CVWL568.lib(drv_i2c_master.o) + 0x000153d4 0x000153d4 0x00000010 Code RO 2315 i.drv_i2c_m_enable CVWL568.lib(drv_i2c_master.o) + 0x000153e4 0x000153e4 0x00000038 Code RO 2316 i.drv_i2c_m_enable_intr CVWL568.lib(drv_i2c_master.o) + 0x0001541c 0x0001541c 0x0000008c Code RO 2322 i.drv_i2c_master_init CVWL568.lib(drv_i2c_master.o) + 0x000154a8 0x000154a8 0x0000005c Code RO 2288 i.drv_i2c_master_read_dma CVWL568.lib(drv_i2c_dma.o) + 0x00015504 0x00015504 0x0000003c Code RO 2289 i.drv_i2c_master_write_dma CVWL568.lib(drv_i2c_dma.o) + 0x00015540 0x00015540 0x0000002e Code RO 2290 i.drv_i2c_master_write_read_cmd CVWL568.lib(drv_i2c_dma.o) + 0x0001556e 0x0001556e 0x00000018 Code RO 1796 i.drv_lcdc_config_bypass CVWL568.lib(drv_lcdc.o) + 0x00015586 0x00015586 0x00000030 Code RO 1797 i.drv_lcdc_config_ccm CVWL568.lib(drv_lcdc.o) + 0x000155b6 0x000155b6 0x00000016 Code RO 1798 i.drv_lcdc_config_disp_mode CVWL568.lib(drv_lcdc.o) + 0x000155cc 0x000155cc 0x00000024 Code RO 1799 i.drv_lcdc_config_dpi_polarity CVWL568.lib(drv_lcdc.o) + 0x000155f0 0x000155f0 0x00000026 Code RO 1800 i.drv_lcdc_config_dpi_timing CVWL568.lib(drv_lcdc.o) + 0x00015616 0x00015616 0x00000016 Code RO 1801 i.drv_lcdc_config_edpi_mode CVWL568.lib(drv_lcdc.o) + 0x0001562c 0x0001562c 0x00000016 Code RO 1802 i.drv_lcdc_config_endianness CVWL568.lib(drv_lcdc.o) + 0x00015642 0x00015642 0x0000000c Code RO 1803 i.drv_lcdc_config_input_size CVWL568.lib(drv_lcdc.o) + 0x0001564e 0x0001564e 0x0000001e Code RO 1804 i.drv_lcdc_config_int CVWL568.lib(drv_lcdc.o) + 0x0001566c 0x0001566c 0x00000022 Code RO 1805 i.drv_lcdc_config_int_single CVWL568.lib(drv_lcdc.o) + 0x0001568e 0x0001568e 0x00000022 Code RO 1806 i.drv_lcdc_config_overwrite CVWL568.lib(drv_lcdc.o) + 0x000156b0 0x000156b0 0x0000000c Code RO 1807 i.drv_lcdc_config_overwrite_rgb CVWL568.lib(drv_lcdc.o) + 0x000156bc 0x000156bc 0x0000001a Code RO 1808 i.drv_lcdc_config_partial_display_area CVWL568.lib(drv_lcdc.o) + 0x000156d6 0x000156d6 0x00000022 Code RO 1809 i.drv_lcdc_config_partial_display_enable CVWL568.lib(drv_lcdc.o) + 0x000156f8 0x000156f8 0x0000001a Code RO 1811 i.drv_lcdc_config_scale_up_coef CVWL568.lib(drv_lcdc.o) + 0x00015712 0x00015712 0x0000000c Code RO 1812 i.drv_lcdc_config_scale_up_step CVWL568.lib(drv_lcdc.o) + 0x0001571e 0x0001571e 0x0000004c Code RO 1813 i.drv_lcdc_config_src_parameter CVWL568.lib(drv_lcdc.o) + 0x0001576a 0x0001576a 0x00000006 Code RO 1814 i.drv_lcdc_config_thresh CVWL568.lib(drv_lcdc.o) + 0x00015770 0x00015770 0x00000012 Code RO 1815 i.drv_lcdc_ctrl_flow CVWL568.lib(drv_lcdc.o) + 0x00015782 0x00015782 0x00000020 Code RO 1817 i.drv_lcdc_enable_shadow_reg CVWL568.lib(drv_lcdc.o) + 0x000157a2 0x000157a2 0x00000002 PAD + 0x000157a4 0x000157a4 0x00000040 Code RO 1818 i.drv_lcdc_set_int CVWL568.lib(drv_lcdc.o) + 0x000157e4 0x000157e4 0x00000018 Code RO 1819 i.drv_lcdc_set_prefetch CVWL568.lib(drv_lcdc.o) + 0x000157fc 0x000157fc 0x00000014 Code RO 1820 i.drv_lcdc_set_video_hw_mode CVWL568.lib(drv_lcdc.o) + 0x00015810 0x00015810 0x00000020 Code RO 1821 i.drv_lcdc_start CVWL568.lib(drv_lcdc.o) + 0x00015830 0x00015830 0x0000000c Code RO 1855 i.drv_memc_clear_status CVWL568.lib(drv_memc.o) + 0x0001583c 0x0001583c 0x00000040 Code RO 1856 i.drv_memc_enable_irq CVWL568.lib(drv_memc.o) + 0x0001587c 0x0001587c 0x0000000c Code RO 1857 i.drv_memc_gen_a_tear_signal CVWL568.lib(drv_memc.o) + 0x00015888 0x00015888 0x00000012 Code RO 1858 i.drv_memc_get_status CVWL568.lib(drv_memc.o) + 0x0001589a 0x0001589a 0x00000010 Code RO 1859 i.drv_memc_rate_transfer_sel CVWL568.lib(drv_memc.o) + 0x000158aa 0x000158aa 0x0000000e Code RO 1860 i.drv_memc_sel_vsync CVWL568.lib(drv_memc.o) + 0x000158b8 0x000158b8 0x00000014 Code RO 1861 i.drv_memc_set_active_height CVWL568.lib(drv_memc.o) + 0x000158cc 0x000158cc 0x0000000c Code RO 1862 i.drv_memc_set_data_mode CVWL568.lib(drv_memc.o) + 0x000158d8 0x000158d8 0x00000010 Code RO 1865 i.drv_memc_set_double_buffer CVWL568.lib(drv_memc.o) + 0x000158e8 0x000158e8 0x00000012 Code RO 1866 i.drv_memc_set_double_buffer_reverse CVWL568.lib(drv_memc.o) + 0x000158fa 0x000158fa 0x00000010 Code RO 1868 i.drv_memc_set_fs_en_conditions CVWL568.lib(drv_memc.o) + 0x0001590a 0x0001590a 0x00000014 Code RO 1869 i.drv_memc_set_inten CVWL568.lib(drv_memc.o) + 0x0001591e 0x0001591e 0x00000002 PAD + 0x00015920 0x00015920 0x00000018 Code RO 1870 i.drv_memc_set_lcdc_st_conditions CVWL568.lib(drv_memc.o) + 0x00015938 0x00015938 0x0000001a Code RO 1871 i.drv_memc_set_ltpo_mode CVWL568.lib(drv_memc.o) + 0x00015952 0x00015952 0x0000000e Code RO 1875 i.drv_memc_set_tear_mode CVWL568.lib(drv_memc.o) + 0x00015960 0x00015960 0x00000028 Code RO 1876 i.drv_memc_set_tear_waveform CVWL568.lib(drv_memc.o) + 0x00015988 0x00015988 0x0000000e Code RO 1878 i.drv_memc_set_vidc_sync_cnt CVWL568.lib(drv_memc.o) + 0x00015996 0x00015996 0x00000002 PAD + 0x00015998 0x00015998 0x00000008 Code RO 1368 i.drv_param_init_get_ccm CVWL568.lib(drv_param_init.o) + 0x000159a0 0x000159a0 0x00000014 Code RO 1369 i.drv_param_init_get_scld_filter_h CVWL568.lib(drv_param_init.o) + 0x000159b4 0x000159b4 0x00000014 Code RO 1370 i.drv_param_init_get_scld_filter_v CVWL568.lib(drv_param_init.o) + 0x000159c8 0x000159c8 0x00000008 Code RO 1371 i.drv_param_init_get_sclu_filter CVWL568.lib(drv_param_init.o) + 0x000159d0 0x000159d0 0x00000014 Code RO 1372 i.drv_param_init_set_ccm CVWL568.lib(drv_param_init.o) + 0x000159e4 0x000159e4 0x00000024 Code RO 1375 i.drv_param_p2r_filter_init CVWL568.lib(drv_param_init.o) + 0x00015a08 0x00015a08 0x00000010 Code RO 2149 i.drv_phy_enable_calibration CVWL568.lib(drv_phy_common.o) + 0x00015a18 0x00015a18 0x0000003c Code RO 2150 i.drv_phy_get_calibration CVWL568.lib(drv_phy_common.o) + 0x00015a54 0x00015a54 0x00000060 Code RO 2151 i.drv_phy_get_pll_para CVWL568.lib(drv_phy_common.o) + 0x00015ab4 0x00015ab4 0x00000054 Code RO 2152 i.drv_phy_get_rate_para CVWL568.lib(drv_phy_common.o) + 0x00015b08 0x00015b08 0x00000010 Code RO 2153 i.drv_phy_test_clear CVWL568.lib(drv_phy_common.o) + 0x00015b18 0x00015b18 0x00000018 Code RO 2154 i.drv_phy_test_lock CVWL568.lib(drv_phy_common.o) + 0x00015b30 0x00015b30 0x00000020 Code RO 2156 i.drv_phy_test_write_1_byte CVWL568.lib(drv_phy_common.o) + 0x00015b50 0x00015b50 0x00000026 Code RO 2157 i.drv_phy_test_write_2_byte CVWL568.lib(drv_phy_common.o) + 0x00015b76 0x00015b76 0x0000001e Code RO 2158 i.drv_phy_test_write_code CVWL568.lib(drv_phy_common.o) + 0x00015b94 0x00015b94 0x00000020 Code RO 2159 i.drv_phy_test_write_data CVWL568.lib(drv_phy_common.o) + 0x00015bb4 0x00015bb4 0x00000020 Code RO 1430 i.drv_pwr_set_cp_mode CVWL568.lib(drv_pwr.o) + 0x00015bd4 0x00015bd4 0x00000018 Code RO 1432 i.drv_pwr_set_pvd_mode CVWL568.lib(drv_pwr.o) + 0x00015bec 0x00015bec 0x00000038 Code RO 1433 i.drv_pwr_set_system_clk_src CVWL568.lib(drv_pwr.o) + 0x00015c24 0x00015c24 0x0000000c Code RO 1647 i.drv_rx_phy_test_clear CVWL568.lib(drv_dsi_rx.o) + 0x00015c30 0x00015c30 0x00000010 Code RO 1648 i.drv_rx_phy_test_lock CVWL568.lib(drv_dsi_rx.o) + 0x00015c40 0x00015c40 0x00000014 Code RO 1650 i.drv_rx_phy_test_write_1_byte CVWL568.lib(drv_dsi_rx.o) + 0x00015c54 0x00015c54 0x00000016 Code RO 1651 i.drv_rx_phy_test_write_2_byte CVWL568.lib(drv_dsi_rx.o) + 0x00015c6a 0x00015c6a 0x0000000a Code RO 1914 i.drv_rxbr_clear_pkt_buffer CVWL568.lib(drv_rxbr.o) + 0x00015c74 0x00015c74 0x00000004 Code RO 1915 i.drv_rxbr_clear_status0 CVWL568.lib(drv_rxbr.o) + 0x00015c78 0x00015c78 0x0000005a Code RO 1917 i.drv_rxbr_enable_irq CVWL568.lib(drv_rxbr.o) + 0x00015cd2 0x00015cd2 0x00000002 PAD + 0x00015cd4 0x00015cd4 0x00000014 Code RO 1918 i.drv_rxbr_frame_drop_cfg CVWL568.lib(drv_rxbr.o) + 0x00015ce8 0x00015ce8 0x00000064 Code RO 1919 i.drv_rxbr_get_clk CVWL568.lib(drv_rxbr.o) + 0x00015d4c 0x00015d4c 0x00000004 Code RO 1920 i.drv_rxbr_get_col_addr CVWL568.lib(drv_rxbr.o) + 0x00015d50 0x00015d50 0x00000012 Code RO 1533 i.drv_rxbr_get_int_source CVWL568.lib(hal_internal_vsync.o) + 0x00015d62 0x00015d62 0x00000004 Code RO 1923 i.drv_rxbr_get_page_addr CVWL568.lib(drv_rxbr.o) + 0x00015d66 0x00015d66 0x00000012 Code RO 1534 i.drv_rxbr_get_status0 CVWL568.lib(hal_internal_vsync.o) + 0x00015d78 0x00015d78 0x0000000c Code RO 1925 i.drv_rxbr_hline_rcv0_cfg CVWL568.lib(drv_rxbr.o) + 0x00015d84 0x00015d84 0x00000008 Code RO 1926 i.drv_rxbr_hline_rcv_cfg CVWL568.lib(drv_rxbr.o) + 0x00015d8c 0x00015d8c 0x0000000c Code RO 1927 i.drv_rxbr_register_irq0_callback CVWL568.lib(drv_rxbr.o) + 0x00015d98 0x00015d98 0x0000000c Code RO 1928 i.drv_rxbr_register_irq1_callback CVWL568.lib(drv_rxbr.o) + 0x00015da4 0x00015da4 0x00000014 Code RO 1929 i.drv_rxbr_set_ack_pkt_header CVWL568.lib(drv_rxbr.o) + 0x00015db8 0x00015db8 0x000000cc Code RO 1930 i.drv_rxbr_set_cmd_filter CVWL568.lib(drv_rxbr.o) + 0x00015e84 0x00015e84 0x00000014 Code RO 1932 i.drv_rxbr_set_color_format CVWL568.lib(drv_rxbr.o) + 0x00015e98 0x00015e98 0x00000014 Code RO 1934 i.drv_rxbr_set_inten CVWL568.lib(drv_rxbr.o) + 0x00015eac 0x00015eac 0x00000010 Code RO 1935 i.drv_rxbr_set_ltpo_drop_th CVWL568.lib(drv_rxbr.o) + 0x00015ebc 0x00015ebc 0x00000026 Code RO 1937 i.drv_rxbr_set_usr_cfg CVWL568.lib(drv_rxbr.o) + 0x00015ee2 0x00015ee2 0x00000008 Code RO 1938 i.drv_rxbr_set_usr_col CVWL568.lib(drv_rxbr.o) + 0x00015eea 0x00015eea 0x00000008 Code RO 1939 i.drv_rxbr_set_usr_row CVWL568.lib(drv_rxbr.o) + 0x00015ef2 0x00015ef2 0x00000002 PAD + 0x00015ef4 0x00015ef4 0x0000006c Code RO 2371 i.drv_spi_abort_dma CVWL568.lib(drv_spi_dma.o) + 0x00015f60 0x00015f60 0x0000003c Code RO 2372 i.drv_spi_dma_callback CVWL568.lib(drv_spi_dma.o) + 0x00015f9c 0x00015f9c 0x000000dc Code RO 2374 i.drv_spi_dma_init CVWL568.lib(drv_spi_dma.o) + 0x00016078 0x00016078 0x00000020 Code RO 2401 i.drv_spi_m_enable_rx_dma CVWL568.lib(drv_spi_master.o) + 0x00016098 0x00016098 0x0000001c Code RO 2402 i.drv_spi_m_enable_tx_dma CVWL568.lib(drv_spi_master.o) + 0x000160b4 0x000160b4 0x00000048 Code RO 2431 i.drv_spi_s_enable_int CVWL568.lib(drv_spi_slave.o) + 0x000160fc 0x000160fc 0x00000020 Code RO 2432 i.drv_spi_s_enable_rx_dma CVWL568.lib(drv_spi_slave.o) + 0x0001611c 0x0001611c 0x0000001c Code RO 2433 i.drv_spi_s_enable_tx_dma CVWL568.lib(drv_spi_slave.o) + 0x00016138 0x00016138 0x00000018 Code RO 2435 i.drv_spi_s_gpio_init CVWL568.lib(drv_spi_slave.o) + 0x00016150 0x00016150 0x00000058 Code RO 2376 i.drv_spi_set_dma_irq_callback CVWL568.lib(drv_spi_dma.o) + 0x000161a8 0x000161a8 0x0000004c Code RO 2439 i.drv_spi_slave_init CVWL568.lib(drv_spi_slave.o) + 0x000161f4 0x000161f4 0x00000048 Code RO 2379 i.drv_spis_dma_write CVWL568.lib(drv_spi_dma.o) + 0x0001623c 0x0001623c 0x0000001c Code RO 1444 i.drv_swire_enable CVWL568.lib(drv_swire.o) + 0x00016258 0x00016258 0x00000054 Code RO 1447 i.drv_swire_set_int CVWL568.lib(drv_swire.o) + 0x000162ac 0x000162ac 0x0000001c Code RO 1448 i.drv_swire_set_power_down CVWL568.lib(drv_swire.o) + 0x000162c8 0x000162c8 0x0000000c Code RO 1463 i.drv_sys_cfg_clear_all_int CVWL568.lib(drv_sys_cfg.o) + 0x000162d4 0x000162d4 0x00000028 Code RO 1464 i.drv_sys_cfg_clear_pending CVWL568.lib(drv_sys_cfg.o) + 0x000162fc 0x000162fc 0x00000018 Code RO 1467 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL568.lib(drv_sys_cfg.o) + 0x00016314 0x00016314 0x0000001c Code RO 1468 i.drv_sys_cfg_sel_ap_rst_trig CVWL568.lib(drv_sys_cfg.o) + 0x00016330 0x00016330 0x00000024 Code RO 1469 i.drv_sys_cfg_sel_gpio_group CVWL568.lib(drv_sys_cfg.o) + 0x00016354 0x00016354 0x00000024 Code RO 1470 i.drv_sys_cfg_sel_int_trig CVWL568.lib(drv_sys_cfg.o) + 0x00016378 0x00016378 0x00000010 Code RO 1472 i.drv_sys_cfg_set_dma_rx_req CVWL568.lib(drv_sys_cfg.o) + 0x00016388 0x00016388 0x00000010 Code RO 1473 i.drv_sys_cfg_set_dma_tx_req CVWL568.lib(drv_sys_cfg.o) + 0x00016398 0x00016398 0x00000024 Code RO 1474 i.drv_sys_cfg_set_int CVWL568.lib(drv_sys_cfg.o) + 0x000163bc 0x000163bc 0x0000001a Code RO 1497 i.drv_timer_clear_status_flags CVWL568.lib(drv_timer.o) + 0x000163d6 0x000163d6 0x00000020 Code RO 1498 i.drv_timer_enable CVWL568.lib(drv_timer.o) + 0x000163f6 0x000163f6 0x00000002 PAD + 0x000163f8 0x000163f8 0x00000010 Code RO 1499 i.drv_timer_get_instance CVWL568.lib(drv_timer.o) + 0x00016408 0x00016408 0x00000010 Code RO 1500 i.drv_timer_get_prescaler CVWL568.lib(drv_timer.o) + 0x00016418 0x00016418 0x00000044 Code RO 1502 i.drv_timer_handle_interrupt CVWL568.lib(drv_timer.o) + 0x0001645c 0x0001645c 0x00000014 Code RO 1503 i.drv_timer_register_callback CVWL568.lib(drv_timer.o) + 0x00016470 0x00016470 0x00000010 Code RO 1504 i.drv_timer_set_compare_val CVWL568.lib(drv_timer.o) + 0x00016480 0x00016480 0x00000054 Code RO 1505 i.drv_timer_set_int CVWL568.lib(drv_timer.o) + 0x000164d4 0x000164d4 0x00000028 Code RO 1506 i.drv_timer_set_prescaler CVWL568.lib(drv_timer.o) + 0x000164fc 0x000164fc 0x00000010 Code RO 1507 i.drv_timer_set_repeat CVWL568.lib(drv_timer.o) + 0x0001650c 0x0001650c 0x0000000a Code RO 1730 i.drv_tx_phy_test_clear CVWL568.lib(drv_dsi_tx.o) + 0x00016516 0x00016516 0x0000001c Code RO 1731 i.drv_tx_phy_test_enter CVWL568.lib(drv_dsi_tx.o) + 0x00016532 0x00016532 0x0000001c Code RO 1732 i.drv_tx_phy_test_exit CVWL568.lib(drv_dsi_tx.o) + 0x0001654e 0x0001654e 0x00000012 Code RO 1734 i.drv_tx_phy_test_write_1_byte CVWL568.lib(drv_dsi_tx.o) + 0x00016560 0x00016560 0x00000014 Code RO 1735 i.drv_tx_phy_test_write_2_byte CVWL568.lib(drv_dsi_tx.o) + 0x00016574 0x00016574 0x00000010 Code RO 1736 i.drv_tx_phy_test_write_code CVWL568.lib(drv_dsi_tx.o) + 0x00016584 0x00016584 0x00000008 Code RO 1978 i.drv_vidc_clear_irq CVWL568.lib(drv_vidc.o) + 0x0001658c 0x0001658c 0x00000018 Code RO 1982 i.drv_vidc_enable CVWL568.lib(drv_vidc.o) + 0x000165a4 0x000165a4 0x00000040 Code RO 1983 i.drv_vidc_enable_irq CVWL568.lib(drv_vidc.o) + 0x000165e4 0x000165e4 0x00000012 Code RO 1985 i.drv_vidc_get_irq_status CVWL568.lib(drv_vidc.o) + 0x000165f6 0x000165f6 0x00000002 PAD + 0x000165f8 0x000165f8 0x00000028 Code RO 1989 i.drv_vidc_init_module_enable CVWL568.lib(drv_vidc.o) + 0x00016620 0x00016620 0x0000000c Code RO 1990 i.drv_vidc_register_callback CVWL568.lib(drv_vidc.o) + 0x0001662c 0x0001662c 0x00000006 Code RO 1991 i.drv_vidc_reset CVWL568.lib(drv_vidc.o) + 0x00016632 0x00016632 0x0000003c Code RO 1993 i.drv_vidc_set_dst_parameter CVWL568.lib(drv_vidc.o) + 0x0001666e 0x0001666e 0x00000014 Code RO 1997 i.drv_vidc_set_irqen CVWL568.lib(drv_vidc.o) + 0x00016682 0x00016682 0x00000010 Code RO 1998 i.drv_vidc_set_mirror CVWL568.lib(drv_vidc.o) + 0x00016692 0x00016692 0x00000008 Code RO 2001 i.drv_vidc_set_p2r_hcoef0 CVWL568.lib(drv_vidc.o) + 0x0001669a 0x0001669a 0x00000026 Code RO 2002 i.drv_vidc_set_p2r_hinitb CVWL568.lib(drv_vidc.o) + 0x000166c0 0x000166c0 0x00000026 Code RO 2003 i.drv_vidc_set_p2r_hinitr CVWL568.lib(drv_vidc.o) + 0x000166e6 0x000166e6 0x00000002 PAD + 0x000166e8 0x000166e8 0x00000018 Code RO 2004 i.drv_vidc_set_pentile_swap CVWL568.lib(drv_vidc.o) + 0x00016700 0x00016700 0x0000000a Code RO 2005 i.drv_vidc_set_pu_ctrl CVWL568.lib(drv_vidc.o) + 0x0001670a 0x0001670a 0x00000010 Code RO 2006 i.drv_vidc_set_rotation CVWL568.lib(drv_vidc.o) + 0x0001671a 0x0001671a 0x0000000a Code RO 2007 i.drv_vidc_set_scld_hcoef0 CVWL568.lib(drv_vidc.o) + 0x00016724 0x00016724 0x0000000a Code RO 2008 i.drv_vidc_set_scld_hcoef1 CVWL568.lib(drv_vidc.o) + 0x0001672e 0x0001672e 0x00000012 Code RO 2009 i.drv_vidc_set_scld_step CVWL568.lib(drv_vidc.o) + 0x00016740 0x00016740 0x0000000a Code RO 2010 i.drv_vidc_set_scld_vcoef0 CVWL568.lib(drv_vidc.o) + 0x0001674a 0x0001674a 0x0000000a Code RO 2011 i.drv_vidc_set_scld_vcoef1 CVWL568.lib(drv_vidc.o) + 0x00016754 0x00016754 0x00000016 Code RO 2012 i.drv_vidc_set_src_parameter CVWL568.lib(drv_vidc.o) + 0x0001676a 0x0001676a 0x00000002 PAD + 0x0001676c 0x0001676c 0x00000010 Code RO 2543 i.drv_wdg_clear_counter CVWL568.lib(drv_wdg.o) + 0x0001677c 0x0001677c 0x00000010 Code RO 2544 i.drv_wdg_clear_edge_flag CVWL568.lib(drv_wdg.o) + 0x0001678c 0x0001678c 0x00000010 Code RO 2547 i.drv_wdg_read_edge_flag CVWL568.lib(drv_wdg.o) + 0x0001679c 0x0001679c 0x00000040 Code RO 2550 i.drv_wdg_set_int CVWL568.lib(drv_wdg.o) + 0x000167dc 0x000167dc 0x00000006 Code RO 1236 i.fls_clear_irq_status CVWL568.lib(drv_fls.o) + 0x000167e2 0x000167e2 0x0000000a Code RO 1237 i.fls_clr_interrupt_flag CVWL568.lib(drv_fls.o) + 0x000167ec 0x000167ec 0x00000048 Code RO 1238 i.fls_ctrl_cfg_init CVWL568.lib(drv_fls.o) + 0x00016834 0x00016834 0x0000000a Code RO 2260 i.fls_dma_disable CVWL568.lib(drv_fls_dma.o) + 0x0001683e 0x0001683e 0x00000014 Code RO 1246 i.fls_get_default_fls_config CVWL568.lib(drv_fls.o) + 0x00016852 0x00016852 0x0000002c Code RO 1247 i.fls_get_default_spi_config CVWL568.lib(drv_fls.o) + 0x0001687e 0x0001687e 0x0000000c Code RO 1248 i.fls_get_default_tuning CVWL568.lib(drv_fls.o) + 0x0001688a 0x0001688a 0x0000003e Code RO 1250 i.fls_init CVWL568.lib(drv_fls.o) + 0x000168c8 0x000168c8 0x00000082 Code RO 1254 i.fls_read_byte_data CVWL568.lib(drv_fls.o) + 0x0001694a 0x0001694a 0x0000000a Code RO 1262 i.fls_set_read CVWL568.lib(drv_fls.o) + 0x00016954 0x00016954 0x00000018 Code RO 1263 i.fls_set_tuning CVWL568.lib(drv_fls.o) + 0x0001696c 0x0001696c 0x000000b4 Code RO 1266 i.fls_spi_init CVWL568.lib(drv_fls.o) + 0x00016a20 0x00016a20 0x0000000a Code RO 1267 i.fls_spi_start CVWL568.lib(drv_fls.o) + 0x00016a2a 0x00016a2a 0x00000012 Code RO 1268 i.fls_swrst CVWL568.lib(drv_fls.o) + 0x00016a3c 0x00016a3c 0x00000014 Code RO 942 i.fputc CVWL568.lib(tau_log.o) + 0x00016a50 0x00016a50 0x00000034 Code RO 573 i.hal_dsi_rx_ctrl_create_handle CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00016a84 0x00016a84 0x0000009c Code RO 575 i.hal_dsi_rx_ctrl_deinit CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00016b20 0x00016b20 0x00000084 Code RO 577 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00016ba4 0x00016ba4 0x00000028 Code RO 579 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00016bcc 0x00016bcc 0x00000028 Code RO 581 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00016bf4 0x00016bf4 0x00000098 Code RO 583 i.hal_dsi_rx_ctrl_init CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00016c8c 0x00016c8c 0x000001a4 Code RO 584 i.hal_dsi_rx_ctrl_init_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00016e30 0x00016e30 0x000000d8 Code RO 585 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00016f08 0x00016f08 0x00000158 Code RO 586 i.hal_dsi_rx_ctrl_init_memc CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017060 0x00017060 0x00000138 Code RO 587 i.hal_dsi_rx_ctrl_init_rxbr CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017198 0x00017198 0x00000230 Code RO 588 i.hal_dsi_rx_ctrl_init_vidc CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000173c8 0x000173c8 0x0000003c Code RO 589 i.hal_dsi_rx_ctrl_pre_init_pps CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017404 0x00017404 0x000000f0 Code RO 592 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000174f4 0x000174f4 0x00000034 Code RO 596 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017528 0x00017528 0x00000038 Code RO 600 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017560 0x00017560 0x00000072 Code RO 605 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000175d2 0x000175d2 0x00000002 PAD + 0x000175d4 0x000175d4 0x00000034 Code RO 606 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017608 0x00017608 0x0000000e Code RO 608 i.hal_dsi_rx_ctrl_set_tear_mode_ex CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017616 0x00017616 0x00000002 PAD + 0x00017618 0x00017618 0x0000003c Code RO 609 i.hal_dsi_rx_ctrl_start CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017654 0x00017654 0x0000003c Code RO 610 i.hal_dsi_rx_ctrl_stop CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x00017690 0x00017690 0x00000020 Code RO 612 i.hal_dsi_rx_ctrl_toggle_resolution CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000176b0 0x000176b0 0x00000190 Code RO 664 i.hal_dsi_tx_calc_video_chunks CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00017840 0x00017840 0x00000034 Code RO 665 i.hal_dsi_tx_config_params_for_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00017874 0x00017874 0x00000450 Code RO 666 i.hal_dsi_tx_count_lane_rate CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00017cc4 0x00017cc4 0x0000002c Code RO 669 i.hal_dsi_tx_ctrl_create_handle CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00017cf0 0x00017cf0 0x00000084 Code RO 670 i.hal_dsi_tx_ctrl_deinit CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00017d74 0x00017d74 0x0000004c Code RO 674 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00017dc0 0x00017dc0 0x00000028 Code RO 676 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00017de8 0x00017de8 0x000000a4 Code RO 678 i.hal_dsi_tx_ctrl_init CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00017e8c 0x00017e8c 0x00000024 Code RO 679 i.hal_dsi_tx_ctrl_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00017eb0 0x00017eb0 0x0000000c Code RO 680 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00017ebc 0x00017ebc 0x00000014 Code RO 689 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00017ed0 0x00017ed0 0x00000010 Code RO 690 i.hal_dsi_tx_ctrl_set_partial_disp CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00017ee0 0x00017ee0 0x00000024 Code RO 691 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00017f04 0x00017f04 0x0000009c Code RO 694 i.hal_dsi_tx_ctrl_start CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00017fa0 0x00017fa0 0x00000044 Code RO 695 i.hal_dsi_tx_ctrl_stop CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00017fe4 0x00017fe4 0x000000d8 Code RO 696 i.hal_dsi_tx_ctrl_write_array_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000180bc 0x000180bc 0x000000b0 Code RO 697 i.hal_dsi_tx_ctrl_write_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001816c 0x0001816c 0x00000044 Code RO 698 i.hal_dsi_tx_init_data_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000181b0 0x000181b0 0x00000030 Code RO 699 i.hal_dsi_tx_init_dpi_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000181e0 0x000181e0 0x00000020 Code RO 700 i.hal_dsi_tx_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018200 0x00018200 0x00000020 Code RO 701 i.hal_dsi_tx_init_phy_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018220 0x00018220 0x00000094 Code RO 702 i.hal_dsi_tx_init_remains CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000182b4 0x000182b4 0x00000058 Code RO 703 i.hal_dsi_tx_init_video_mode CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001830c 0x0001830c 0x00000044 Code RO 704 i.hal_dsi_tx_send_cmd CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018350 0x00018350 0x00000018 Code RO 769 i.hal_gpio_ctrl_eint CVWL568.lib(hal_gpio.o) + 0x00018368 0x00018368 0x00000012 Code RO 770 i.hal_gpio_get_input_data CVWL568.lib(hal_gpio.o) + 0x0001837a 0x0001837a 0x00000002 PAD + 0x0001837c 0x0001837c 0x00000040 Code RO 773 i.hal_gpio_init_eint CVWL568.lib(hal_gpio.o) + 0x000183bc 0x000183bc 0x00000020 Code RO 774 i.hal_gpio_init_input CVWL568.lib(hal_gpio.o) + 0x000183dc 0x000183dc 0x00000028 Code RO 775 i.hal_gpio_init_output CVWL568.lib(hal_gpio.o) + 0x00018404 0x00018404 0x00000018 Code RO 776 i.hal_gpio_reg_eint_cb CVWL568.lib(hal_gpio.o) + 0x0001841c 0x0001841c 0x00000050 Code RO 777 i.hal_gpio_set_ap_reset_int CVWL568.lib(hal_gpio.o) + 0x0001846c 0x0001846c 0x00000060 Code RO 779 i.hal_gpio_set_mode CVWL568.lib(hal_gpio.o) + 0x000184cc 0x000184cc 0x00000008 Code RO 780 i.hal_gpio_set_output_data CVWL568.lib(hal_gpio.o) + 0x000184d4 0x000184d4 0x00000020 Code RO 782 i.hal_gpio_set_pull_state CVWL568.lib(hal_gpio.o) + 0x000184f4 0x000184f4 0x0000006c Code RO 952 i.hal_i2c_m_dma_init CVWL568.lib(hal_i2c_master.o) + 0x00018560 0x00018560 0x00000020 Code RO 953 i.hal_i2c_m_dma_read CVWL568.lib(hal_i2c_master.o) + 0x00018580 0x00018580 0x0000001c Code RO 954 i.hal_i2c_m_dma_write CVWL568.lib(hal_i2c_master.o) + 0x0001859c 0x0001859c 0x0000000c Code RO 956 i.hal_i2c_m_transfer_complate CVWL568.lib(hal_i2c_master.o) + 0x000185a8 0x000185a8 0x00000020 Code RO 957 i.hal_i2c_master_irq_callback CVWL568.lib(hal_i2c_master.o) + 0x000185c8 0x000185c8 0x000000fc Code RO 1535 i.hal_internal_init_memc CVWL568.lib(hal_internal_vsync.o) + 0x000186c4 0x000186c4 0x00000010 Code RO 1537 i.hal_internal_sync_get_fb_setting CVWL568.lib(hal_internal_vsync.o) + 0x000186d4 0x000186d4 0x00000010 Code RO 1538 i.hal_internal_sync_get_hight_performan_mode CVWL568.lib(hal_internal_vsync.o) + 0x000186e4 0x000186e4 0x0000022c Code RO 1539 i.hal_internal_sync_input_resolution_change CVWL568.lib(hal_internal_vsync.o) + 0x00018910 0x00018910 0x00000028 Code RO 1542 i.hal_internal_vsync_deinit CVWL568.lib(hal_internal_vsync.o) + 0x00018938 0x00018938 0x0000000c Code RO 1543 i.hal_internal_vsync_get_rx_state CVWL568.lib(hal_internal_vsync.o) + 0x00018944 0x00018944 0x00000018 Code RO 1544 i.hal_internal_vsync_get_sync_line CVWL568.lib(hal_internal_vsync.o) + 0x0001895c 0x0001895c 0x0000000c Code RO 1545 i.hal_internal_vsync_get_tear_mode CVWL568.lib(hal_internal_vsync.o) + 0x00018968 0x00018968 0x0000000c Code RO 1546 i.hal_internal_vsync_get_tx_state CVWL568.lib(hal_internal_vsync.o) + 0x00018974 0x00018974 0x00000118 Code RO 1547 i.hal_internal_vsync_init_rx CVWL568.lib(hal_internal_vsync.o) + 0x00018a8c 0x00018a8c 0x000000b0 Code RO 1548 i.hal_internal_vsync_init_tx CVWL568.lib(hal_internal_vsync.o) + 0x00018b3c 0x00018b3c 0x0000011c Code RO 1549 i.hal_internal_vsync_set_auto_hw_filter CVWL568.lib(hal_internal_vsync.o) + 0x00018c58 0x00018c58 0x00000014 Code RO 1551 i.hal_internal_vsync_set_rx_state CVWL568.lib(hal_internal_vsync.o) + 0x00018c6c 0x00018c6c 0x00000024 Code RO 1552 i.hal_internal_vsync_set_sync_line CVWL568.lib(hal_internal_vsync.o) + 0x00018c90 0x00018c90 0x00000050 Code RO 1553 i.hal_internal_vsync_set_tear_mode CVWL568.lib(hal_internal_vsync.o) + 0x00018ce0 0x00018ce0 0x00000080 Code RO 1554 i.hal_internal_vsync_set_tx_state CVWL568.lib(hal_internal_vsync.o) + 0x00018d60 0x00018d60 0x00000024 Code RO 705 i.hal_lcdc_config_ccm CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018d84 0x00018d84 0x00000058 Code RO 706 i.hal_lcdc_config_remains CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018ddc 0x00018ddc 0x00000014 Code RO 707 i.hal_lcdc_config_rgb_to_pentile CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018df0 0x00018df0 0x00000164 Code RO 708 i.hal_lcdc_config_upscaler CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018f54 0x00018f54 0x00000054 Code RO 709 i.hal_lcdc_init_cfg CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00018fa8 0x00018fa8 0x00000190 Code RO 710 i.hal_lcdc_init_clk CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019138 0x00019138 0x00000040 Code RO 711 i.hal_lcdc_init_interrupt CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x00019178 0x00019178 0x00000010 Code RO 973 i.hal_spi_slave_auto_transfer_abort CVWL568.lib(hal_spi_slave.o) + 0x00019188 0x00019188 0x00000038 Code RO 974 i.hal_spi_slave_auto_transfer_start CVWL568.lib(hal_spi_slave.o) + 0x000191c0 0x000191c0 0x00000060 Code RO 978 i.hal_spi_slave_enable CVWL568.lib(hal_spi_slave.o) + 0x00019220 0x00019220 0x00000014 Code RO 979 i.hal_spi_slave_flush_fifo CVWL568.lib(hal_spi_slave.o) + 0x00019234 0x00019234 0x00000008 Code RO 981 i.hal_spi_slave_gpio_init CVWL568.lib(hal_spi_slave.o) + 0x0001923c 0x0001923c 0x0000004c Code RO 982 i.hal_spi_slave_init CVWL568.lib(hal_spi_slave.o) + 0x00019288 0x00019288 0x0000000c Code RO 984 i.hal_spi_slave_register_callback CVWL568.lib(hal_spi_slave.o) + 0x00019294 0x00019294 0x00000044 Code RO 985 i.hal_spi_slave_reset_tx CVWL568.lib(hal_spi_slave.o) + 0x000192d8 0x000192d8 0x00000010 Code RO 986 i.hal_spi_slave_set_auto_rx_buffer CVWL568.lib(hal_spi_slave.o) + 0x000192e8 0x000192e8 0x00000012 Code RO 860 i.hal_swire_deinit CVWL568.lib(hal_swire.o) + 0x000192fa 0x000192fa 0x00000016 Code RO 862 i.hal_swire_open CVWL568.lib(hal_swire.o) + 0x00019310 0x00019310 0x00000008 Code RO 877 i.hal_system_enable_systick CVWL568.lib(hal_system.o) + 0x00019318 0x00019318 0x00000088 Code RO 883 i.hal_system_init CVWL568.lib(hal_system.o) + 0x000193a0 0x000193a0 0x0000001c Code RO 884 i.hal_system_init_console CVWL568.lib(hal_system.o) + 0x000193bc 0x000193bc 0x00000008 Code RO 887 i.hal_system_set_phy_calibration CVWL568.lib(hal_system.o) + 0x000193c4 0x000193c4 0x00000008 Code RO 888 i.hal_system_set_pvd CVWL568.lib(hal_system.o) + 0x000193cc 0x000193cc 0x00000008 Code RO 889 i.hal_system_set_vcc CVWL568.lib(hal_system.o) + 0x000193d4 0x000193d4 0x00000014 Code RO 890 i.hal_system_share_flash_mode CVWL568.lib(hal_system.o) + 0x000193e8 0x000193e8 0x0000002e Code RO 914 i.hal_timer_deinit CVWL568.lib(hal_timer.o) + 0x00019416 0x00019416 0x0000001a Code RO 916 i.hal_timer_init CVWL568.lib(hal_timer.o) + 0x00019430 0x00019430 0x00000048 Code RO 918 i.hal_timer_start CVWL568.lib(hal_timer.o) + 0x00019478 0x00019478 0x00000028 Code RO 920 i.hal_timer_stop CVWL568.lib(hal_timer.o) + 0x000194a0 0x000194a0 0x0000008c Code RO 1015 i.hal_uart_init CVWL568.lib(hal_uart.o) + 0x0001952c 0x0001952c 0x00000010 Code RO 1018 i.hal_uart_transmit_blocking CVWL568.lib(hal_uart.o) + 0x0001953c 0x0001953c 0x00000110 Code RO 2088 i.handle_init CVWL568.lib(irq_redirect .o) + 0x0001964c 0x0001964c 0x00000020 Code RO 333 i.iic_tp_proc ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001966c 0x0001966c 0x00000078 Code RO 113 i.init_mipi_tx ap_demo.o + 0x000196e4 0x000196e4 0x000000d0 Code RO 114 i.init_panel ap_demo.o + 0x000197b4 0x000197b4 0x0000000a Code RO 3 i.main main.o + 0x000197be 0x000197be 0x00000002 PAD + 0x000197c0 0x000197c0 0x00000030 Code RO 1054 i.norflash_init CVWL568.lib(norflash.o) + 0x000197f0 0x000197f0 0x0000001c Code RO 1057 i.norflash_read CVWL568.lib(norflash.o) + 0x0001980c 0x0001980c 0x000000ac Code RO 115 i.open_mipi_rx ap_demo.o + 0x000198b8 0x000198b8 0x0000003c Code RO 116 i.pps_update_handle ap_demo.o + 0x000198f4 0x000198f4 0x000003f4 Code RO 1557 i.rx_get_dcs_packet_data CVWL568.lib(hal_internal_vsync.o) + 0x00019ce8 0x00019ce8 0x00000178 Code RO 1558 i.rx_partial_update CVWL568.lib(hal_internal_vsync.o) + 0x00019e60 0x00019e60 0x0000008c Code RO 1559 i.rx_receive_packet CVWL568.lib(hal_internal_vsync.o) + 0x00019eec 0x00019eec 0x000000a4 Code RO 1561 i.rxbr_irq0_callback CVWL568.lib(hal_internal_vsync.o) + 0x00019f90 0x00019f90 0x0000002c Code RO 119 i.soft_timer3_cb ap_demo.o + 0x00019fbc 0x00019fbc 0x00000038 Code RO 335 i.spi_init_proc ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x00019ff4 0x00019ff4 0x00000004 PAD + 0x00019ff8 0x00019ff8 0x00000008 Data RO 345 .ARM.__at_0x19FF8 ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001a000 0x0001a000 0x00000018 Data RO 346 .ARM.__at_0x1A000 ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001a018 0x0001a018 0x00000008 Data RO 347 .ARM.__at_0x1A018 ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001a020 0x0001a020 0x000000e0 Data RO 348 .ARM.__at_0x1A020 ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001a100 0x0001a100 0x000000b0 Code RO 319 .ARM.__at_0x1A100 ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001a1b0 0x0001a1b0 0x00000180 Code RO 1560 i.rx_receive_pps CVWL568.lib(hal_internal_vsync.o) + 0x0001a330 0x0001a330 0x000001b4 Code RO 1562 i.rxbr_irq1_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001a4e4 0x0001a4e4 0x000000c4 Code RO 1563 i.soft_gen_te CVWL568.lib(hal_internal_vsync.o) + 0x0001a5a8 0x0001a5a8 0x000000c0 Code RO 1564 i.soft_gen_te_double_buffer CVWL568.lib(hal_internal_vsync.o) + 0x0001a668 0x0001a668 0x000001c0 Code RO 336 i.spis_cs_irq ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001a828 0x0001a828 0x00000048 Code RO 2570 i.sqrt m_ps.l(sqrt.o) + 0x0001a870 0x0001a870 0x00000134 Code RO 337 i.tp_I2cPos_spiPosRaw_Proc ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001a9a4 0x0001a9a4 0x000000ac Code RO 338 i.tp_del_touchoff_data ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001aa50 0x0001aa50 0x00000058 Code RO 339 i.tp_init_proc ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001aaa8 0x0001aaa8 0x0000001e Code RO 340 i.tp_io_init ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001aac6 0x0001aac6 0x00000002 PAD + 0x0001aac8 0x0001aac8 0x0000000c Code RO 341 i.tp_motion_irq ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001aad4 0x0001aad4 0x0000003c Code RO 342 i.tp_pixel7pro_wakeup_Proc ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001ab10 0x0001ab10 0x00000124 Code RO 343 i.tp_proc ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001ac34 0x0001ac34 0x00000080 Code RO 344 i.tp_touch_wakeup_Proc ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001acb4 0x0001acb4 0x00000108 Code RO 1565 i.vidc_callback CVWL568.lib(hal_internal_vsync.o) + 0x0001adbc 0x0001adbc 0x000000d0 Code RO 1566 i.vpre_err_reset CVWL568.lib(hal_internal_vsync.o) + 0x0001ae8c 0x0001ae8c 0x000001cc Code RO 1567 i.vsync_set_te_mode CVWL568.lib(hal_internal_vsync.o) + 0x0001b058 0x0001b058 0x000029ac Data RO 121 .constdata ap_demo.o + 0x0001da04 0x0001da04 0x00000142 Data RO 351 .constdata ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0001db46 0x0001db46 0x00000002 PAD + 0x0001db48 0x0001db48 0x00000024 Data RO 713 .constdata CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001db6c 0x0001db6c 0x000000d2 Data RO 785 .constdata CVWL568.lib(hal_gpio.o) + 0x0001dc3e 0x0001dc3e 0x00000002 PAD + 0x0001dc40 0x0001dc40 0x00000008 Data RO 1376 .constdata CVWL568.lib(drv_param_init.o) + 0x0001dc48 0x0001dc48 0x00000186 Data RO 2160 .constdata CVWL568.lib(drv_phy_common.o) + 0x0001ddce 0x0001ddce 0x00000002 PAD + 0x0001ddd0 0x0001ddd0 0x00000048 Data RO 615 .conststring CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x0001de18 0x0001de18 0x00000043 Data RO 714 .conststring CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x0001de5b 0x0001de5b 0x00000001 PAD + 0x0001de5c 0x0001de5c 0x00000134 Data RO 1569 .conststring CVWL568.lib(hal_internal_vsync.o) + 0x0001df90 0x0001df90 0x00000030 Data RO 2932 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001dfc0, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001dfc0, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2089 .ARM.__AT_0x00070100 CVWL568.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001dfc0, Size: 0x00004288, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x000003ec]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x000000a4 Data RW 122 .data ap_demo.o + 0x00070274 COMPRESSED 0x0000002a Data RW 356 .data ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x0007029e COMPRESSED 0x00000002 PAD + 0x000702a0 COMPRESSED 0x00000008 Data RW 616 .data CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000702a8 COMPRESSED 0x00000003 Data RW 715 .data CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000702ab COMPRESSED 0x00000001 Data RW 958 .data CVWL568.lib(hal_i2c_master.o) + 0x000702ac COMPRESSED 0x00000012 Data RW 1072 .data CVWL568.lib(norflash.o) + 0x000702be COMPRESSED 0x00000002 PAD + 0x000702c0 COMPRESSED 0x0000000c Data RW 1126 .data CVWL568.lib(drv_common.o) + 0x000702cc COMPRESSED 0x00000004 Data RW 1271 .data CVWL568.lib(drv_fls.o) + 0x000702d0 COMPRESSED 0x00000004 Data RW 1340 .data CVWL568.lib(drv_gpio.o) + 0x000702d4 COMPRESSED 0x000004a4 Data RW 1377 .data CVWL568.lib(drv_param_init.o) + 0x00070778 COMPRESSED 0x0000000c Data RW 1407 .data CVWL568.lib(drv_pwm.o) + 0x00070784 COMPRESSED 0x00000008 Data RW 1450 .data CVWL568.lib(drv_swire.o) + 0x0007078c COMPRESSED 0x00000001 Data RW 1475 .data CVWL568.lib(drv_sys_cfg.o) + 0x0007078d COMPRESSED 0x00000003 PAD + 0x00070790 COMPRESSED 0x00000050 Data RW 1508 .data CVWL568.lib(drv_timer.o) + 0x000707e0 COMPRESSED 0x0000000c Data RW 1570 .data CVWL568.lib(hal_internal_vsync.o) + 0x000707ec COMPRESSED 0x00000008 Data RW 1941 .data CVWL568.lib(drv_rxbr.o) + 0x000707f4 COMPRESSED 0x00000004 Data RW 2014 .data CVWL568.lib(drv_vidc.o) + 0x000707f8 COMPRESSED 0x00000001 Data RW 2161 .data CVWL568.lib(drv_phy_common.o) + 0x000707f9 COMPRESSED 0x00000003 PAD + 0x000707fc COMPRESSED 0x0000000c Data RW 2181 .data CVWL568.lib(drv_chip_info.o) + 0x00070808 COMPRESSED 0x00000004 Data RW 2323 .data CVWL568.lib(drv_i2c_master.o) + 0x0007080c COMPRESSED 0x00000004 Data RW 2354 .data CVWL568.lib(drv_i2c_slave.o) + 0x00070810 COMPRESSED 0x00000010 Data RW 2381 .data CVWL568.lib(drv_spi_dma.o) + 0x00070820 COMPRESSED 0x00000004 Data RW 2410 .data CVWL568.lib(drv_spi_master.o) + 0x00070824 COMPRESSED 0x00000008 Data RW 2485 .data CVWL568.lib(drv_uart.o) + 0x0007082c COMPRESSED 0x0000000c Data RW 2552 .data CVWL568.lib(drv_wdg.o) + 0x00070838 COMPRESSED 0x00000004 Data RW 2901 .data mc_p.l(stdout.o) + 0x0007083c COMPRESSED 0x00000004 Data RW 2913 .data mc_p.l(errno.o) + 0x00070840 - 0x00000ba0 Zero RW 349 .bss ISP_568_TP.lib(app_tp_for_custom_s8.o) + 0x000713e0 - 0x000000c4 Zero RW 614 .bss CVWL568.lib(hal_dsi_rx_ctrl.o) + 0x000714a4 - 0x0000004c Zero RW 712 .bss CVWL568.lib(hal_dsi_tx_ctrl.o) + 0x000714f0 - 0x00000100 Zero RW 943 .bss CVWL568.lib(tau_log.o) + 0x000715f0 - 0x00000020 Zero RW 989 .bss CVWL568.lib(hal_spi_slave.o) + 0x00071610 - 0x000000d0 Zero RW 1020 .bss CVWL568.lib(hal_uart.o) + 0x000716e0 - 0x0000019c Zero RW 1070 .bss CVWL568.lib(norflash.o) + 0x0007187c - 0x00000040 Zero RW 1339 .bss CVWL568.lib(drv_gpio.o) + 0x000718bc - 0x00000970 Zero RW 1568 .bss CVWL568.lib(hal_internal_vsync.o) + 0x0007222c - 0x00001030 Zero RW 1618 .bss CVWL568.lib(dcs_packet_fifo.o) + 0x0007325c - 0x0000001c Zero RW 2230 .bss CVWL568.lib(drv_dma.o) + 0x00073278 - 0x000001e0 Zero RW 2380 .bss CVWL568.lib(drv_spi_dma.o) + 0x00073458 - 0x00001000 Zero RW 310 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 2368 714 10668 164 0 32980 ap_demo.o + 36 6 0 0 0 529 board.o + 10 0 0 0 0 5683 main.o + 120 18 192 0 4096 2112 startup_armcm0.o + + ---------------------------------------------------------------------- + 2538 738 10908 164 4096 41304 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 4 0 0 0 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 296 96 0 12 0 256 drv_chip_info.o + 192 82 24 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 442 24 0 0 28 868 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1644 494 0 0 0 1336 drv_dsi_rx.o + 1528 118 0 0 0 2428 drv_dsi_tx.o + 118 0 0 0 0 256 drv_efuse.o + 658 20 0 4 0 960 drv_fls.o + 10 0 0 0 0 60 drv_fls_dma.o + 796 112 0 4 64 1236 drv_gpio.o + 420 46 0 0 0 428 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 24 10 0 4 0 60 drv_i2c_slave.o + 704 6 0 0 0 1504 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 112 36 8 1188 0 376 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 72 10 0 12 0 76 drv_pwm.o + 112 24 0 0 0 180 drv_pwr.o + 722 84 0 8 0 1456 drv_rxbr.o + 572 94 0 16 480 412 drv_spi_dma.o + 132 30 0 4 0 248 drv_spi_master.o + 232 46 0 0 0 308 drv_spi_slave.o + 172 20 0 8 0 260 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 374 34 0 80 0 932 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 168 22 0 12 0 316 drv_wdg.o + 3164 306 72 8 196 1532 hal_dsi_rx_ctrl.o + 4280 298 103 3 76 2324 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 7474 1610 308 12 2416 2476 hal_internal_vsync.o + 948 142 0 0 32 732 hal_spi_slave.o + 40 0 0 0 0 136 hal_swire.o + 216 32 0 0 0 476 hal_system.o + 184 6 0 0 0 276 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 124 30 0 18 412 204 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 5090 276 586 42 2976 37003 app_tp_for_custom_s8.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 42126 5162 1708 1484 11480 72939 Library Totals + 58 4 7 10 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 31598 4676 1115 1424 8504 32660 CVWL568.lib + 5090 276 586 42 2976 37003 ISP_568_TP.lib + 272 26 0 0 0 152 m_ps.l + 2838 126 0 8 0 1264 mc_p.l + 2270 54 0 0 0 1860 mf_p.l + + ---------------------------------------------------------------------- + 42126 5162 1708 1484 11480 72939 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 44664 5900 12616 1648 15576 89275 Grand Totals + 44664 5900 12616 1004 15576 89275 ELF Image Totals (compressed) + 44664 5900 12616 1004 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 57280 ( 55.94kB) + Total RW Size (RW Data + ZI Data) 17224 ( 16.82kB) + Total ROM Size (Code + RO Data + RW Data) 58284 ( 56.92kB) + +============================================================================== + diff --git a/project/ISP_568/Listings/ap_demo.txt b/project/ISP_568/Listings/ap_demo.txt new file mode 100644 index 0000000..30f119a --- /dev/null +++ b/project/ISP_568/Listings/ap_demo.txt @@ -0,0 +1,5254 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\ap_demo.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\ap_demo.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\ap_demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL568 -I.\RTE\_ISP_568 -IC:\Users\Markin\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Users\Markin\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_568 --omf_browse=.\objects\ap_demo.crf ..\..\src\app\ap_demo\ap_demo.c] + THUMB + + AREA ||i.Gpio_swire_output||, CODE, READONLY, ALIGN=1 + + Gpio_swire_output PROC +;;;382 *****************************************************************************/ +;;;383 void Gpio_swire_output(uint8_t flag, uint8_t num) +000000 b570 PUSH {r4-r6,lr} +;;;384 { +000002 460d MOV r5,r1 +;;;385 uint8_t ii; +;;;386 +;;;387 if (flag) +000004 2800 CMP r0,#0 +000006 d01d BEQ |L1.68| +;;;388 { +;;;389 if (flag == 2) +000008 2802 CMP r0,#2 +00000a d106 BNE |L1.26| +;;;390 { +;;;391 hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_HIGH); +00000c 2101 MOVS r1,#1 +00000e 2014 MOVS r0,#0x14 +000010 f7fffffe BL hal_gpio_init_output +;;;392 delayMs(2); +000014 2002 MOVS r0,#2 +000016 f7fffffe BL delayMs + |L1.26| +;;;393 } +;;;394 for (ii = 0; ii < num; ii++) +00001a 2400 MOVS r4,#0 +00001c e00f B |L1.62| + |L1.30| +;;;395 { +;;;396 hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_LOW); +00001e 2100 MOVS r1,#0 +000020 2014 MOVS r0,#0x14 +000022 f7fffffe BL hal_gpio_set_output_data +;;;397 delayUs(10); +000026 200a MOVS r0,#0xa +000028 f7fffffe BL delayUs +;;;398 hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); +00002c 2101 MOVS r1,#1 +00002e 2014 MOVS r0,#0x14 +000030 f7fffffe BL hal_gpio_set_output_data +;;;399 delayUs(9); +000034 2009 MOVS r0,#9 +000036 f7fffffe BL delayUs +00003a 1c64 ADDS r4,r4,#1 +00003c b2e4 UXTB r4,r4 ;394 + |L1.62| +00003e 42ac CMP r4,r5 ;394 +000040 d3ed BCC |L1.30| +;;;400 } +;;;401 } +;;;402 else +;;;403 { +;;;404 hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW); +;;;405 } +;;;406 } +000042 bd70 POP {r4-r6,pc} + |L1.68| +000044 2100 MOVS r1,#0 ;404 +000046 2014 MOVS r0,#0x14 ;404 +000048 f7fffffe BL hal_gpio_init_output +00004c bd70 POP {r4-r6,pc} +;;;407 + ENDP + + + AREA ||i.PWM_OUTPUT_TEST||, CODE, READONLY, ALIGN=2 + + PWM_OUTPUT_TEST PROC +;;;445 +;;;446 void PWM_OUTPUT_TEST(void) +000000 b510 PUSH {r4,lr} +;;;447 { +;;;448 test_pwm_out_adjust(true, true, 30, 20000); +000002 2101 MOVS r1,#1 +000004 4b07 LDR r3,|L2.36| +000006 221e MOVS r2,#0x1e +000008 4608 MOV r0,r1 +00000a f7fffffe BL test_pwm_out_adjust +;;;449 delayMs(2); +00000e 2002 MOVS r0,#2 +000010 f7fffffe BL delayMs +;;;450 test_pwm_out_adjust(false, false, 40, 10000); +000014 2100 MOVS r1,#0 +000016 4b04 LDR r3,|L2.40| +000018 2228 MOVS r2,#0x28 +00001a 4608 MOV r0,r1 +00001c f7fffffe BL test_pwm_out_adjust +;;;451 } +000020 bd10 POP {r4,pc} +;;;452 + ENDP + +000022 0000 DCW 0x0000 + |L2.36| + DCD 0x00004e20 + |L2.40| + DCD 0x00002710 + + AREA ||i.PWM_Task||, CODE, READONLY, ALIGN=2 + + PWM_Task PROC +;;;463 static __attribute__((unused)) uint16_t read_bl_data_bak = 0; +;;;464 void PWM_Task(void) +000000 4901 LDR r1,|L3.8| +;;;465 { +;;;466 __attribute__((unused)) uint16_t pwm_h; +;;;467 +;;;468 #ifdef USE_FOR_Google_Pixel6pro +;;;469 +;;;470 #if AMOLED_NT37701_CSOT667 +;;;471 +;;;472 // s20: read_bl_data = 1~FD +;;;473 __attribute__((unused)) uint8_t reg51_val_h = 0; +;;;474 __attribute__((unused)) uint8_t reg51_val_l = 0; +;;;475 // if(Flag_blacklight_EN) +;;;476 { +;;;477 read_bl_data_bak = 0; +000002 2000 MOVS r0,#0 +000004 8208 STRH r0,[r1,#0x10] +;;;478 // hal_pwm_out_sync_thr(0, PWM_PERIOD+1); +;;;479 // hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x3F); //Ϣ·رRX,TXԴ󣬲ٷ +;;;480 //printf("Flag_blacklight_EN!!!! read_bl_data[%4x] \n", read_bl_data); +;;;481 return; +;;;482 } +;;;483 /* +;;;484 +;;;485 if (g_need_enter_sleep_mode) +;;;486 { +;;;487 //ΪϨʱ +;;;488 read_bl_data_bak = 0; +;;;489 // hal_pwm_out_sync_thr(0, PWM_PERIOD-PWM_MIN); //ΪС +;;;490 // hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x3F); //Ϣ·رRX,TXԴ󣬲ٷ +;;;491 // printf("tp_sleep_in!!!! read_bl_data[%4x] \n", read_bl_data); +;;;492 // return; +;;;493 } +;;;494 +;;;495 if(read_bl_data != read_bl_data_bak) +;;;496 { +;;;497 +;;;498 +;;;499 #if 0 +;;;500 #if 1//Բ +;;;501 if (pwm_h > 700) +;;;502 pwm_h = 300 + (pwm_h - 700) * 7 / 3; +;;;503 else +;;;504 pwm_h = 1 + (pwm_h - 1) * 3 / 7; +;;;505 #endif +;;;506 if(pwm_h < PWM_MIN) +;;;507 pwm_h = PWM_MIN; +;;;508 +;;;509 //printf("ok!!!! read_bl_data[%4x],pwm_h[%d] \n", read_bl_data, pwm_h); +;;;510 +;;;511 if(pwm_h < PWM_PERIOD) +;;;512 pwm_h = PWM_PERIOD - pwm_h; +;;;513 else +;;;514 pwm_h = 1; +;;;515 //hal_pwm_out_sync_thr(0, pwm_h); +;;;516 #endif +;;;517 +;;;518 pwm_h = read_bl_data * 16; //NT37701 51 (0~FFF) +;;;519 +;;;520 reg51_val_l = ( uint8_t )pwm_h; +;;;521 reg51_val_h = pwm_h >> 8; +;;;522 +;;;523 // hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, reg51_val_h, reg51_val_l); //0FFF//Ϣ·رRX,TXԴ󣬲ٷ +;;;524 +;;;525 +;;;526 read_bl_data_bak = read_bl_data; +;;;527 } +;;;528 */ +;;;529 +;;;530 +;;;531 #else +;;;532 // s20: read_bl_data = 1~FD +;;;533 +;;;534 if(Flag_blacklight_EN) +;;;535 { +;;;536 read_bl_data_bak = 0; +;;;537 hal_pwm_out_sync_thr(0, PWM_PERIOD + 1); +;;;538 //printf("Flag_blacklight_EN!!!! read_bl_data[%4x] \n", read_bl_data); +;;;539 return; +;;;540 } +;;;541 +;;;542 if (g_need_enter_sleep_mode) +;;;543 { +;;;544 //ΪϨʱ +;;;545 read_bl_data_bak = 0; +;;;546 hal_pwm_out_sync_thr(0, PWM_PERIOD - PWM_MIN); //ΪС +;;;547 // printf("tp_sleep_in!!!! read_bl_data[%4x] \n", read_bl_data); +;;;548 // return; +;;;549 } +;;;550 +;;;551 if(read_bl_data != read_bl_data_bak) +;;;552 { +;;;553 pwm_h = PWM_PERIOD * read_bl_data / 0xFF; +;;;554 #if 1//Բ +;;;555 if (pwm_h > 700) +;;;556 pwm_h = 300 + (pwm_h - 700) * 7 / 3; +;;;557 else +;;;558 pwm_h = 1 + (pwm_h - 1) * 3 / 7; +;;;559 #endif +;;;560 if(pwm_h < PWM_MIN) +;;;561 pwm_h = PWM_MIN; +;;;562 +;;;563 //printf("ok!!!! read_bl_data[%4x],pwm_h[%d] \n", read_bl_data, pwm_h); +;;;564 +;;;565 if(pwm_h < PWM_PERIOD) +;;;566 pwm_h = PWM_PERIOD - pwm_h; +;;;567 else +;;;568 pwm_h = 1; +;;;569 hal_pwm_out_sync_thr(0, pwm_h); +;;;570 read_bl_data_bak = read_bl_data; +;;;571 } +;;;572 +;;;573 #endif +;;;574 +;;;575 #endif +;;;576 +;;;577 } +000006 4770 BX lr +;;;578 #endif + ENDP + + |L3.8| + DCD ||.data|| + + AREA ||i.PWM_init||, CODE, READONLY, ALIGN=1 + + PWM_init PROC +;;;454 #define PWM_MIN 8 //Сֵɵ +;;;455 void PWM_init(void)//static +000000 b508 PUSH {r3,lr} +;;;456 { +;;;457 // 1ms ڳʼ͵ƽ1000 +;;;458 hal_pwm_out_init(); +000002 f7fffffe BL hal_pwm_out_init +;;;459 hal_pwm_out_config_all(PWMO_CTRL_LOW, PWMO_CTRL_HIGH, 0, PWM_PERIOD, PWM_PERIOD); +000006 237d MOVS r3,#0x7d +000008 00db LSLS r3,r3,#3 +00000a 2200 MOVS r2,#0 +00000c 2102 MOVS r1,#2 +00000e 2001 MOVS r0,#1 +000010 9300 STR r3,[sp,#0] +000012 f7fffffe BL hal_pwm_out_config_all +;;;460 } +000016 bd08 POP {r3,pc} +;;;461 + ENDP + + + AREA ||i.ap_dcs_read||, CODE, READONLY, ALIGN=2 + + ap_dcs_read PROC +;;;193 +;;;194 static bool ap_dcs_read(uint8_t data_type, uint8_t dcs_cmd, uint8_t param) +000000 b570 PUSH {r4-r6,lr} +;;;195 { +;;;196 if (dcs_cmd == 0x04) +;;;197 { +;;;198 phone_DisplayOFF_flag = 1; +000002 4d34 LDR r5,|L5.212| +000004 460c MOV r4,r1 ;195 +000006 2301 MOVS r3,#1 +;;;199 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000008 2107 MOVS r1,#7 +00000a 2668 MOVS r6,#0x68 +00000c 220a MOVS r2,#0xa +00000e 69a8 LDR r0,[r5,#0x18] ;196 +000010 b08e SUB sp,sp,#0x38 ;195 +000012 2c04 CMP r4,#4 ;196 +000014 d01e BEQ |L5.84| +;;;200 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;201 DSI_VC_0, +;;;202 3, 0x0A, 0x68, 0x07); +;;;203 } +;;;204 else if (dcs_cmd == 0xa1) +000016 2ca1 CMP r4,#0xa1 +000018 d026 BEQ |L5.104| +;;;205 { +;;;206 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;207 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;208 DSI_VC_0, +;;;209 13, 0x0C, 0x21, 0x0C, 0xC6, 0x01, 0xF3, 0xAA, 0x11, 0x06, 0x2B, 0x25, 0x21, 0xF6); +;;;210 } +;;;211 else if (dcs_cmd == 0xDA) +00001a 2cda CMP r4,#0xda +00001c d040 BEQ |L5.160| +;;;212 { +;;;213 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;214 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;215 DSI_VC_0, +;;;216 1, 0x0A); +;;;217 } +;;;218 else if (dcs_cmd == 0xDB) +00001e 2cdb CMP r4,#0xdb +000020 d040 BEQ |L5.164| +;;;219 { +;;;220 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;221 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;222 DSI_VC_0, +;;;223 1, 0x68); +;;;224 } +;;;225 else if (dcs_cmd == 0xDC) +000022 2cdc CMP r4,#0xdc +000024 d040 BEQ |L5.168| +;;;226 { +;;;227 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;228 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;229 DSI_VC_0, +;;;230 1, 0x07); +;;;231 } +;;;232 else if (dcs_cmd == 0xD6) +000026 2cd6 CMP r4,#0xd6 +000028 d045 BEQ |L5.182| +;;;233 { +;;;234 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;235 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;236 DSI_VC_0, +;;;237 5, 0xF0, 0xEA, 0x85, 0x61, 0x86); +;;;238 } +;;;239 else +;;;240 { +;;;241 uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); +00002a f7fffffe BL hal_dsi_rx_ctrl_get_max_ret_size +00002e 4606 MOV r6,r0 +;;;242 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000030 2000 MOVS r0,#0 +000032 4602 MOV r2,r0 +000034 9000 STR r0,[sp,#0] +000036 2301 MOVS r3,#1 +000038 2121 MOVS r1,#0x21 +00003a 69a8 LDR r0,[r5,#0x18] ; g_rx_ctrl_handle +00003c f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +;;;243 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;244 DSI_VC_0, +;;;245 1, 0); +;;;246 TAU_LOGD("r[%x] [%d] err!!!!!!\n", dcs_cmd, return_size); +000040 4623 MOV r3,r4 +000042 22f6 MOVS r2,#0xf6 +000044 a124 ADR r1,|L5.216| +000046 a028 ADR r0,|L5.232| +000048 9600 STR r6,[sp,#0] +00004a f7fffffe BL LOG_printf + |L5.78| +;;;247 } +;;;248 +;;;249 //TAU_LOGD("r %x\n",dcs_cmd); +;;;250 return true; +00004e 2001 MOVS r0,#1 +;;;251 } +000050 b00e ADD sp,sp,#0x38 +000052 bd70 POP {r4-r6,pc} + |L5.84| +000054 71ab STRB r3,[r5,#6] ;198 +000056 9200 STR r2,[sp,#0] ;199 +000058 9102 STR r1,[sp,#8] ;199 +00005a 2303 MOVS r3,#3 ;199 +00005c 9601 STR r6,[sp,#4] ;199 +00005e 2200 MOVS r2,#0 ;199 +000060 211c MOVS r1,#0x1c ;199 +000062 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000066 e7f2 B |L5.78| + |L5.104| +000068 22f6 MOVS r2,#0xf6 ;206 +00006a 2425 MOVS r4,#0x25 ;206 +00006c 920c STR r2,[sp,#0x30] ;206 +00006e 252b MOVS r5,#0x2b ;206 +000070 940a STR r4,[sp,#0x28] ;206 +000072 2121 MOVS r1,#0x21 ;206 +000074 9509 STR r5,[sp,#0x24] ;206 +000076 910b STR r1,[sp,#0x2c] ;206 +000078 2206 MOVS r2,#6 ;206 +00007a 2411 MOVS r4,#0x11 ;206 +00007c 25aa MOVS r5,#0xaa ;206 +00007e 26f3 MOVS r6,#0xf3 ;206 +000080 9506 STR r5,[sp,#0x18] ;206 +000082 9407 STR r4,[sp,#0x1c] ;206 +000084 9208 STR r2,[sp,#0x20] ;206 +000086 9605 STR r6,[sp,#0x14] ;206 +000088 24c6 MOVS r4,#0xc6 ;206 +00008a 220c MOVS r2,#0xc ;206 +00008c ad01 ADD r5,sp,#4 ;206 +00008e c516 STM r5!,{r1,r2,r4} ;206 +000090 9304 STR r3,[sp,#0x10] ;206 +000092 9200 STR r2,[sp,#0] ;206 +000094 230d MOVS r3,#0xd ;206 +000096 2200 MOVS r2,#0 ;206 +000098 211c MOVS r1,#0x1c ;206 +00009a f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +00009e e7d6 B |L5.78| + |L5.160| +0000a0 9200 STR r2,[sp,#0] ;213 +0000a2 e002 B |L5.170| + |L5.164| +0000a4 9600 STR r6,[sp,#0] ;220 +0000a6 e000 B |L5.170| + |L5.168| +0000a8 9100 STR r1,[sp,#0] ;227 + |L5.170| +0000aa 2301 MOVS r3,#1 ;227 +0000ac 2200 MOVS r2,#0 ;227 +0000ae 2121 MOVS r1,#0x21 ;227 +0000b0 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +0000b4 e7cb B |L5.78| + |L5.182| +0000b6 2486 MOVS r4,#0x86 ;234 +0000b8 2361 MOVS r3,#0x61 ;234 +0000ba 2285 MOVS r2,#0x85 ;234 +0000bc 21ea MOVS r1,#0xea ;234 +0000be ad01 ADD r5,sp,#4 ;234 +0000c0 c51e STM r5!,{r1-r4} ;234 +0000c2 21f0 MOVS r1,#0xf0 ;234 +0000c4 9100 STR r1,[sp,#0] ;234 +0000c6 2305 MOVS r3,#5 ;234 +0000c8 2200 MOVS r2,#0 ;234 +0000ca 211c MOVS r1,#0x1c ;234 +0000cc f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +0000d0 e7bd B |L5.78| +;;;252 + ENDP + +0000d2 0000 DCW 0x0000 + |L5.212| + DCD ||.data|| + |L5.216| +0000d8 50697865 DCB "Pixel7_pro_demo",0 +0000dc 6c375f70 +0000e0 726f5f64 +0000e4 656d6f00 + |L5.232| +0000e8 5b25735d DCB "[%s] (%04d) r[%x] [%d] err!!!!!!\n",0 +0000ec 20282530 +0000f0 34642920 +0000f4 725b2578 +0000f8 5d205b25 +0000fc 645d2065 +000100 72722121 +000104 21212121 +000108 0a00 +00010a 00 DCB 0 +00010b 00 DCB 0 + + AREA ||i.ap_demo||, CODE, READONLY, ALIGN=2 + + ap_demo PROC +;;;2280 +;;;2281 void ap_demo(void) +000000 b50e PUSH {r1-r3,lr} +;;;2282 { +;;;2283 //for checksum +;;;2284 char u8_date_inv[11] = {~__DATE__[0], ~__DATE__[1], ~__DATE__[2], ~__DATE__[3], \ +000002 a248 ADR r2,|L6.292| +000004 ca07 LDM r2,{r0-r2} +000006 466b MOV r3,sp +000008 c307 STM r3!,{r0-r2} +;;;2285 ~__DATE__[4], ~__DATE__[5], ~__DATE__[6], ~__DATE__[7], \ +;;;2286 ~__DATE__[8], ~__DATE__[9], ~__DATE__[10] +;;;2287 }; +;;;2288 char u8_time_inv[8] = {~__TIME__[0], ~__TIME__[1], ~__TIME__[2], ~__TIME__[3], \ +00000a a149 ADR r1,|L6.304| +00000c c903 LDM r1,{r0,r1} +;;;2289 ~__TIME__[4], ~__TIME__[5], ~__TIME__[6], ~__TIME__[7] +;;;2290 }; +;;;2291 +;;;2292 +;;;2293 +;;;2294 #if 0//TEST +;;;2295 hal_gpio_set_ap_reset_int(ENABLE, ap_reset_cb_test, DETECT_HIGH_LVL); +;;;2296 while(power_on_flag == 0) +;;;2297 { +;;;2298 ; +;;;2299 } +;;;2300 #endif +;;;2301 +;;;2302 hal_gpio_set_output_data(IO_PAD_TD_LEDPWM, IO_LVL_LOW); +00000e 9102 STR r1,[sp,#8] +000010 9001 STR r0,[sp,#4] +000012 2100 MOVS r1,#0 +000014 200a MOVS r0,#0xa +000016 f7fffffe BL hal_gpio_set_output_data +;;;2303 hal_gpio_init_output(IO_PAD_TD_TPRSTN, IO_LVL_HIGH); +00001a 2101 MOVS r1,#1 +00001c 2008 MOVS r0,#8 +00001e f7fffffe BL hal_gpio_init_output +;;;2304 hal_gpio_init_output(IO_PAD_AP_SWIRE, IO_LVL_LOW); +000022 2100 MOVS r1,#0 +000024 2004 MOVS r0,#4 +000026 f7fffffe BL hal_gpio_init_output +;;;2305 hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_LOW); // LED_ON +00002a 2100 MOVS r1,#0 +00002c 2013 MOVS r0,#0x13 +00002e f7fffffe BL hal_gpio_init_output +;;;2306 +;;;2307 open_mipi_rx(); +000032 f7fffffe BL open_mipi_rx +;;;2308 //TAU_LOGD("Pixe6 [%s %s]", __DATE__, __TIME__); +;;;2309 TAU_LOGD("Pixel7pro [%s %s %s %s]", __DATE__, __TIME__, u8_date_inv[0], u8_time_inv[0]); +000036 4669 MOV r1,sp +000038 790a LDRB r2,[r1,#4] +00003a 7809 LDRB r1,[r1,#0] +00003c a03e ADR r0,|L6.312| +00003e 9202 STR r2,[sp,#8] +000040 9101 STR r1,[sp,#4] +000042 9000 STR r0,[sp,#0] +000044 a33f ADR r3,|L6.324| +000046 4a42 LDR r2,|L6.336| +000048 a142 ADR r1,|L6.340| +00004a a046 ADR r0,|L6.356| +00004c f7fffffe BL LOG_printf +;;;2310 +;;;2311 tp_io_init(); +000050 f7fffffe BL tp_io_init +;;;2312 // slave_SPI_init(); +;;;2313 +;;;2314 init_mipi_tx(); +000054 f7fffffe BL init_mipi_tx +;;;2315 +;;;2316 //hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_USER_MODE); +;;;2317 +;;;2318 //soft_te_timer_init(); +;;;2319 +;;;2320 // app_tp_init(); +;;;2321 +;;;2322 #ifdef ADD_TIMER3_FUNCTION +;;;2323 tp_sleep_count = 0; +000058 4c4b LDR r4,|L6.392| +00005a 2600 MOVS r6,#0 +00005c 7326 STRB r6,[r4,#0xc] +;;;2324 phone_DisplayOFF_count = 1; +00005e 2501 MOVS r5,#1 +000060 81e5 STRH r5,[r4,#0xe] +;;;2325 hal_timer_init(TIMER_NUM3); +000062 2003 MOVS r0,#3 +000064 f7fffffe BL hal_timer_init +;;;2326 hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); +000068 2300 MOVS r3,#0 +00006a 4a48 LDR r2,|L6.396| +00006c 210a MOVS r1,#0xa +00006e 2003 MOVS r0,#3 +000070 f7fffffe BL hal_timer_start +;;;2327 TAU_LOGD("start timer3"); +000074 4a36 LDR r2,|L6.336| +000076 a137 ADR r1,|L6.340| +000078 3212 ADDS r2,r2,#0x12 +00007a a045 ADR r0,|L6.400| +00007c f7fffffe BL LOG_printf + |L6.128| +;;;2328 #endif +;;;2329 +;;;2330 #if 1 // TEST RGB, From Lin +;;;2331 // RGB_TEST(); +;;;2332 //hal_dsi_tx_ctrl_set_overwrite_rgb(0xff, 0xff, 0xff); +;;;2333 #endif +;;;2334 +;;;2335 +;;;2336 while (1) +;;;2337 { +;;;2338 tp_proc(); +000080 f7fffffe BL tp_proc +;;;2339 +;;;2340 if (start_display_on == true ) +000084 7860 LDRB r0,[r4,#1] ; start_display_on +000086 2800 CMP r0,#0 +000088 d018 BEQ |L6.188| +00008a f7fffffe BL init_panel +00008e 69e0 LDR r0,[r4,#0x1c] ; g_tx_ctrl_handle +000090 f7fffffe BL hal_dsi_tx_ctrl_start +000094 79a0 LDRB r0,[r4,#6] ; phone_DisplayOFF_flag +000096 2801 CMP r0,#1 +000098 d103 BNE |L6.162| +00009a 20ff MOVS r0,#0xff +00009c 302d ADDS r0,r0,#0x2d +00009e f7fffffe BL delayMs + |L6.162| +0000a2 2329 MOVS r3,#0x29 +0000a4 2201 MOVS r2,#1 +0000a6 2100 MOVS r1,#0 +0000a8 2005 MOVS r0,#5 +0000aa f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;2341 { +;;;2342 tx_display_on(); +;;;2343 start_display_on = false; +0000ae 7066 STRB r6,[r4,#1] +;;;2344 panel_display_done = true; +0000b0 7125 STRB r5,[r4,#4] +;;;2345 #ifndef DISABLE_TDDI_I2C_FUNCTION +;;;2346 /* TP ģͨѶʼ */ +;;;2347 app_tp_transfer_screen_start(); +;;;2348 #endif +;;;2349 +;;;2350 #if ENABLE_TP_WAKE_UP//жϷԭǵʱλһ(70ms)Ḷ́ΪֿʹԽж70ms,ʹøλڶʱʶ +;;;2351 hal_gpio_set_ap_reset_int(ENABLE, ap_reset_cb, DETECT_RISING_EDGE); +0000b2 2202 MOVS r2,#2 +0000b4 493d LDR r1,|L6.428| +0000b6 2001 MOVS r0,#1 +0000b8 f7fffffe BL hal_gpio_set_ap_reset_int + |L6.188| +;;;2352 #endif +;;;2353 } +;;;2354 +;;;2355 // if(phone_start_flag) +;;;2356 // { +;;;2357 // FST_tp_init(); +;;;2358 // phone_start_flag =0; +;;;2359 // } +;;;2360 +;;;2361 +;;;2362 // if(phone_DisplayOFF_flag == 1) +;;;2363 // { +;;;2364 // if(phone_DisplayOFF_count > 1000) +;;;2365 // { +;;;2366 // phone_DisplayOFF_count = 0; +;;;2367 // phone_start_flag = 1; +;;;2368 // } +;;;2369 // } +;;;2370 // else +;;;2371 // { +;;;2372 // if(phone_DisplayOFF_count > 20) +;;;2373 // { +;;;2374 // phone_DisplayOFF_count = 0; +;;;2375 // phone_start_flag = 1; +;;;2376 // hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW); //ͣ˫2~3s޴.jason_su +;;;2377 // } +;;;2378 // } +;;;2379 +;;;2380 +;;;2381 +;;;2382 // app_tp_transfer_screen_int(); +;;;2383 +;;;2384 #if ADD_TP_CALIBRATION +;;;2385 app_tp_calibration_exec(); +;;;2386 #endif +;;;2387 +;;;2388 // tp_heartbeat_exec(); +;;;2389 // ap_tp_scan_point_record_event_exec(); +;;;2390 +;;;2391 if(g_mipi_path_off == false) +0000bc 79e0 LDRB r0,[r4,#7] ; g_mipi_path_off +0000be 2800 CMP r0,#0 +0000c0 d104 BNE |L6.204| + |L6.194| +;;;2392 { +;;;2393 while (hal_dsi_rx_ctrl_dsc_async_handler(g_rx_ctrl_handle)); +0000c2 69a0 LDR r0,[r4,#0x18] ; g_rx_ctrl_handle +0000c4 f7fffffe BL hal_dsi_rx_ctrl_dsc_async_handler +0000c8 2800 CMP r0,#0 +0000ca d1fa BNE |L6.194| + |L6.204| +;;;2394 } +;;;2395 +;;;2396 #if ENABLE_TP_WAKE_UP +;;;2397 if (g_need_enter_sleep_mode) +0000cc 78e0 LDRB r0,[r4,#3] ; g_need_enter_sleep_mode +0000ce 2800 CMP r0,#0 +0000d0 d0d6 BEQ |L6.128| +;;;2398 { +;;;2399 g_mipi_path_off = true; +0000d2 71e5 STRB r5,[r4,#7] +;;;2400 hal_gpio_set_output_data(IO_PAD_TD_LEDPWM, IO_LVL_HIGH); +0000d4 2101 MOVS r1,#1 +0000d6 200a MOVS r0,#0xa +0000d8 f7fffffe BL hal_gpio_set_output_data +;;;2401 /* FIXME stop more model */ +;;;2402 hal_dsi_tx_ctrl_stop(g_tx_ctrl_handle); +0000dc 69e0 LDR r0,[r4,#0x1c] ; g_tx_ctrl_handle +0000de f7fffffe BL hal_dsi_tx_ctrl_stop +;;;2403 hal_dsi_tx_ctrl_deinit(g_tx_ctrl_handle); +0000e2 69e0 LDR r0,[r4,#0x1c] ; g_tx_ctrl_handle +0000e4 f7fffffe BL hal_dsi_tx_ctrl_deinit +;;;2404 hal_dsi_rx_ctrl_stop(g_rx_ctrl_handle); +0000e8 69a0 LDR r0,[r4,#0x18] ; g_rx_ctrl_handle +0000ea f7fffffe BL hal_dsi_rx_ctrl_stop +;;;2405 hal_dsi_rx_ctrl_deinit(g_rx_ctrl_handle); +0000ee 69a0 LDR r0,[r4,#0x18] ; g_rx_ctrl_handle +0000f0 f7fffffe BL hal_dsi_rx_ctrl_deinit +;;;2406 +;;;2407 hal_swire_open(DISABLE); +0000f4 2000 MOVS r0,#0 +0000f6 f7fffffe BL hal_swire_open +;;;2408 hal_swire_deinit(); +0000fa f7fffffe BL hal_swire_deinit +;;;2409 hal_timer_stop(SWIRE_TIMER); +0000fe 2001 MOVS r0,#1 +000100 f7fffffe BL hal_timer_stop +;;;2410 hal_timer_deinit(SWIRE_TIMER); +000104 2001 MOVS r0,#1 +000106 f7fffffe BL hal_timer_deinit +;;;2411 tp_sleep_in = 1; +00010a 72e5 STRB r5,[r4,#0xb] +;;;2412 //hal_gpio_init_output(IO_PAD_TD_TPRSTN, IO_LVL_LOW); +;;;2413 hal_system_set_vcc(false); //VCC +00010c 2000 MOVS r0,#0 +00010e f7fffffe BL hal_system_set_vcc +;;;2414 +;;;2415 TAU_LOGD("disable video path \n"); +000112 4a0f LDR r2,|L6.336| +000114 a10f ADR r1,|L6.340| +000116 326a ADDS r2,r2,#0x6a +000118 a025 ADR r0,|L6.432| +00011a f7fffffe BL LOG_printf +;;;2416 g_need_enter_sleep_mode = false; +00011e 70e6 STRB r6,[r4,#3] +000120 e7ae B |L6.128| +;;;2417 } +;;;2418 #endif +;;;2419 +;;;2420 /* enter idle mode*/ +;;;2421 //hal_system_idle_mode(true); +;;;2422 } +;;;2423 } +;;;2424 + ENDP + +000122 0000 DCW 0x0000 + |L6.292| +000124 b29e86df DCB 178,158,134,223,223,203,223,205,207,205,204,0 +000128 dfcbdfcd +00012c cfcdcc00 + |L6.304| +000130 cecec5ce DCB 206,206,197,206,207,197,202,204 +000134 cfc5cacc + |L6.312| +000138 31313a31 DCB "11:10:53",0 +00013c 303a3533 +000140 00 +000141 00 DCB 0 +000142 00 DCB 0 +000143 00 DCB 0 + |L6.324| +000144 4d617920 DCB "May 4 2023",0 +000148 20342032 +00014c 30323300 + |L6.336| + DCD 0x00000905 + |L6.340| +000154 50697865 DCB "Pixel7_pro_demo",0 +000158 6c375f70 +00015c 726f5f64 +000160 656d6f00 + |L6.356| +000164 5b25735d DCB "[%s] (%04d) Pixel7pro [%s %s %s %s]",0 +000168 20282530 +00016c 34642920 +000170 50697865 +000174 6c377072 +000178 6f205b25 +00017c 73202573 +000180 20257320 +000184 25735d00 + |L6.392| + DCD ||.data|| + |L6.396| + DCD soft_timer3_cb + |L6.400| +000190 5b25735d DCB "[%s] (%04d) start timer3",0 +000194 20282530 +000198 34642920 +00019c 73746172 +0001a0 74207469 +0001a4 6d657233 +0001a8 00 +0001a9 00 DCB 0 +0001aa 00 DCB 0 +0001ab 00 DCB 0 + |L6.428| + DCD ap_reset_cb + |L6.432| +0001b0 5b25735d DCB "[%s] (%04d) disable video path \n",0 +0001b4 20282530 +0001b8 34642920 +0001bc 64697361 +0001c0 626c6520 +0001c4 76696465 +0001c8 6f207061 +0001cc 7468200a +0001d0 00 +0001d1 00 DCB 0 +0001d2 00 DCB 0 +0001d3 00 DCB 0 + + AREA ||i.ap_get_reg_ca||, CODE, READONLY, ALIGN=2 + + ap_get_reg_ca PROC +;;;629 +;;;630 bool ap_get_reg_ca(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet)//static +000000 68c8 LDR r0,[r1,#0xc] +;;;631 { +;;;632 value_reg_ca = (dcs_packet->packet_param[0] << 8) + dcs_packet->packet_param[1]; +000002 7801 LDRB r1,[r0,#0] +000004 7840 LDRB r0,[r0,#1] +000006 0209 LSLS r1,r1,#8 +000008 1808 ADDS r0,r1,r0 +00000a 4902 LDR r1,|L7.20| +00000c 8248 STRH r0,[r1,#0x12] +;;;633 //TAU_LOGD("CA[%x]", value_reg_ca); +;;;634 +;;;635 return true; +00000e 2001 MOVS r0,#1 +;;;636 } +000010 4770 BX lr +;;;637 + ENDP + +000012 0000 DCW 0x0000 + |L7.20| + DCD ||.data|| + + AREA ||i.ap_get_reg_df||, CODE, READONLY, ALIGN=2 + + ap_get_reg_df PROC +;;;659 +;;;660 bool ap_get_reg_df(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet)//static +000000 b538 PUSH {r3-r5,lr} +;;;661 { +;;;662 #ifdef ADD_PANEL_DISPLAY_MODE +;;;663 value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; +;;;664 panel_mode = dcs_packet->packet_param[0]; +;;;665 panel_r = dcs_packet->packet_param[49]; +;;;666 panel_g = dcs_packet->packet_param[51]; +;;;667 panel_b = dcs_packet->packet_param[53]; +;;;668 // TAU_LOGD("value_reg_df[%4x],panel_mode[%4x],panel_r[%4x],panel_g[%4x],panel_b[%4x]", value_reg_df,panel_mode,panel_r,panel_g,panel_b); +;;;669 +;;;670 if (panel_mode == 00) +;;;671 { +;;;672 //ģʽ +;;;673 +;;;674 #ifdef USE_FOR_S10_BLUE_MODE +;;;675 //panel_r =256-RATIO_VALUE*(0xFF-panel_r); +;;;676 //panel_g =256-RATIO_VALUE*(0xFF-panel_g); +;;;677 //panel_b =256-RATIO_VALUE*(0xFF-panel_b); +;;;678 // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); +;;;679 +;;;680 +;;;681 #else +;;;682 +;;;683 value_reg_df = value_reg_df & 0xFF; +;;;684 switch(value_reg_df) +;;;685 { +;;;686 case 0xC1: +;;;687 case 0xC3: +;;;688 value_blue = BLUE_MIN; +;;;689 break; +;;;690 +;;;691 case 0xCF: +;;;692 case 0xD0: +;;;693 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) / BLUE_STEP; +;;;694 break; +;;;695 +;;;696 case 0xD8: +;;;697 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 2 / BLUE_STEP; +;;;698 break; +;;;699 +;;;700 case 0xDE: +;;;701 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 3 / BLUE_STEP; +;;;702 break; +;;;703 +;;;704 case 0xE4: +;;;705 case 0xE5: +;;;706 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 4 / BLUE_STEP; +;;;707 break; +;;;708 +;;;709 case 0xE9: +;;;710 case 0xEA: +;;;711 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 5 / BLUE_STEP; +;;;712 break; +;;;713 +;;;714 case 0xED: +;;;715 case 0xEE: +;;;716 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 6 / BLUE_STEP; +;;;717 break; +;;;718 +;;;719 case 0xF1: +;;;720 case 0xF2: +;;;721 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 7 / BLUE_STEP; +;;;722 break; +;;;723 +;;;724 case 0xF4: +;;;725 case 0xF5: +;;;726 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 8 / BLUE_STEP; +;;;727 break; +;;;728 +;;;729 case 0xF7: +;;;730 case 0xF8: +;;;731 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 9 / BLUE_STEP; +;;;732 break; +;;;733 +;;;734 case 0xFA: +;;;735 value_blue = BLUE_MAX; +;;;736 break; +;;;737 +;;;738 default: +;;;739 case 0xFF: +;;;740 value_blue = 0; +;;;741 break; +;;;742 +;;;743 } +;;;744 hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle, 256, 256, 256); +;;;745 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;746 +;;;747 #endif +;;;748 +;;;749 } +;;;750 else +;;;751 { +;;;752 #ifndef USE_FOR_S10_BLUE_MODE +;;;753 value_blue = 0; +;;;754 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); //ģʽs8+/s9+ +;;;755 #endif +;;;756 +;;;757 //һ㣬ЧԡҪݿͻҪϸ +;;;758 +;;;759 panel_r = 256 - RATIO_VALUE * (0xFF - panel_r); +;;;760 panel_g = 256 - RATIO_VALUE * (0xFF - panel_g); +;;;761 panel_b = 256 - RATIO_VALUE * (0xFF - panel_b); +;;;762 //hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); +;;;763 } +;;;764 +;;;765 #ifndef USE_FOR_S10_BLUE_MODE +;;;766 if (blue_flag == 0) +;;;767 { +;;;768 blue_flag = 1; +;;;769 delayMs(20); +;;;770 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;771 } +;;;772 #endif +;;;773 +;;;774 #else +;;;775 value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; +000002 68c8 LDR r0,[r1,#0xc] +000004 4c32 LDR r4,|L8.208| +000006 3020 ADDS r0,r0,#0x20 +000008 78c1 LDRB r1,[r0,#3] +00000a 7840 LDRB r0,[r0,#1] +00000c 0209 LSLS r1,r1,#8 +00000e 1808 ADDS r0,r1,r0 +;;;776 +;;;777 value_reg_df = value_reg_df & 0xFF; +000010 b2c0 UXTB r0,r0 +;;;778 switch(value_reg_df) +000012 6220 STR r0,[r4,#0x20] ; value_reg_df +000014 28ea CMP r0,#0xea +000016 d03e BEQ |L8.150| +000018 dc14 BGT |L8.68| +00001a 28d8 CMP r0,#0xd8 +00001c d035 BEQ |L8.138| +00001e dc08 BGT |L8.50| +000020 28c1 CMP r0,#0xc1 +000022 d01c BEQ |L8.94| +000024 28c3 CMP r0,#0xc3 +000026 d01a BEQ |L8.94| +000028 28cf CMP r0,#0xcf +00002a d01a BEQ |L8.98| +00002c 28d0 CMP r0,#0xd0 +00002e d13e BNE |L8.174| +000030 e017 B |L8.98| + |L8.50| +000032 28de CMP r0,#0xde +000034 d02b BEQ |L8.142| +000036 28e4 CMP r0,#0xe4 +000038 d02b BEQ |L8.146| +00003a 28e5 CMP r0,#0xe5 +00003c d029 BEQ |L8.146| +00003e 28e9 CMP r0,#0xe9 +000040 d135 BNE |L8.174| +000042 e028 B |L8.150| + |L8.68| +000044 4601 MOV r1,r0 +000046 39ed SUBS r1,r1,#0xed +000048 000b MOVS r3,r1 +00004a f7fffffe BL __ARM_common_switch8 +00004e 0e26 DCB 0x0e,0x26 +000050 26303028 DCB 0x26,0x30,0x30,0x28 +000054 28302a2a DCB 0x28,0x30,0x2a,0x2a +000058 302c2c30 DCB 0x30,0x2c,0x2c,0x30 +00005c 2e30 DCB 0x2e,0x30 + |L8.94| +;;;779 { +;;;780 case 0xC1: +;;;781 case 0xC3: +;;;782 value_blue = BLUE_MIN; +00005e 2186 MOVS r1,#0x86 +;;;783 break; +000060 e000 B |L8.100| + |L8.98| +;;;784 +;;;785 case 0xCF: +;;;786 case 0xD0: +;;;787 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) / BLUE_STEP; +000062 2190 MOVS r1,#0x90 + |L8.100| +000064 7221 STRB r1,[r4,#8] ;782 +000066 4603 MOV r3,r0 ;782 +;;;788 break; +;;;789 +;;;790 case 0xD8: +;;;791 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 2 / BLUE_STEP; +;;;792 break; +;;;793 +;;;794 case 0xDE: +;;;795 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 3 / BLUE_STEP; +;;;796 break; +;;;797 +;;;798 case 0xE4: +;;;799 case 0xE5: +;;;800 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 4 / BLUE_STEP; +;;;801 break; +;;;802 +;;;803 case 0xE9: +;;;804 case 0xEA: +;;;805 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 5 / BLUE_STEP; +;;;806 break; +;;;807 +;;;808 case 0xED: +;;;809 case 0xEE: +;;;810 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 6 / BLUE_STEP; +;;;811 break; +;;;812 +;;;813 case 0xF1: +;;;814 case 0xF2: +;;;815 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 7 / BLUE_STEP; +;;;816 break; +;;;817 +;;;818 case 0xF4: +;;;819 case 0xF5: +;;;820 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 8 / BLUE_STEP; +;;;821 break; +;;;822 +;;;823 case 0xF7: +;;;824 case 0xF8: +;;;825 value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 9 / BLUE_STEP; +;;;826 break; +;;;827 +;;;828 case 0xFA: +;;;829 value_blue = BLUE_MAX; +;;;830 break; +;;;831 +;;;832 default: +;;;833 case 0xFF: +;;;834 value_blue = 0; +;;;835 break; +;;;836 +;;;837 } +;;;838 +;;;839 TAU_LOGD("df[%4x]", value_reg_df); +000068 4a1a LDR r2,|L8.212| +00006a a11b ADR r1,|L8.216| +00006c a01e ADR r0,|L8.232| +00006e f7fffffe BL LOG_printf +;;;840 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +000072 7a20 LDRB r0,[r4,#8] ; value_blue +000074 9000 STR r0,[sp,#0] +000076 2384 MOVS r3,#0x84 +000078 2202 MOVS r2,#2 +00007a 2100 MOVS r1,#0 +00007c 2015 MOVS r0,#0x15 +00007e f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;841 if (blue_flag == 0) +000082 7a60 LDRB r0,[r4,#9] ; blue_flag +000084 2800 CMP r0,#0 +000086 d014 BEQ |L8.178| +000088 e020 B |L8.204| + |L8.138| +00008a 219b MOVS r1,#0x9b ;791 +00008c e7ea B |L8.100| + |L8.142| +00008e 21a5 MOVS r1,#0xa5 ;795 +000090 e7e8 B |L8.100| + |L8.146| +000092 21b0 MOVS r1,#0xb0 ;800 +000094 e7e6 B |L8.100| + |L8.150| +000096 21bb MOVS r1,#0xbb ;805 +000098 e7e4 B |L8.100| +00009a 21c5 MOVS r1,#0xc5 ;810 +00009c e7e2 B |L8.100| +00009e 21d0 MOVS r1,#0xd0 ;815 +0000a0 e7e0 B |L8.100| +0000a2 21da MOVS r1,#0xda ;820 +0000a4 e7de B |L8.100| +0000a6 21e5 MOVS r1,#0xe5 ;825 +0000a8 e7dc B |L8.100| +0000aa 21f0 MOVS r1,#0xf0 ;829 +0000ac e7da B |L8.100| + |L8.174| +0000ae 2100 MOVS r1,#0 ;834 +0000b0 e7d8 B |L8.100| + |L8.178| +;;;842 { +;;;843 blue_flag = 1; +0000b2 2001 MOVS r0,#1 +0000b4 7260 STRB r0,[r4,#9] +;;;844 delayMs(20); +0000b6 2014 MOVS r0,#0x14 +0000b8 f7fffffe BL delayMs +;;;845 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +0000bc 7a20 LDRB r0,[r4,#8] ; value_blue +0000be 9000 STR r0,[sp,#0] +0000c0 2384 MOVS r3,#0x84 +0000c2 2202 MOVS r2,#2 +0000c4 2100 MOVS r1,#0 +0000c6 2015 MOVS r0,#0x15 +0000c8 f7fffffe BL hal_dsi_tx_ctrl_write_cmd + |L8.204| +;;;846 } +;;;847 #endif +;;;848 +;;;849 return true; +0000cc 2001 MOVS r0,#1 +;;;850 } +0000ce bd38 POP {r3-r5,pc} +;;;851 + ENDP + + |L8.208| + DCD ||.data|| + |L8.212| + DCD 0x00000347 + |L8.216| +0000d8 50697865 DCB "Pixel7_pro_demo",0 +0000dc 6c375f70 +0000e0 726f5f64 +0000e4 656d6f00 + |L8.232| +0000e8 5b25735d DCB "[%s] (%04d) df[%4x]",0 +0000ec 20282530 +0000f0 34642920 +0000f4 64665b25 +0000f8 34785d00 + + AREA ||i.ap_reset_cb||, CODE, READONLY, ALIGN=2 + + ap_reset_cb PROC +;;;178 +;;;179 static void ap_reset_cb(void *data) +000000 2100 MOVS r1,#0 +;;;180 { +;;;181 /* лԴ */ +;;;182 // hal_gpio_set_output_data_ex(POWER_IO_B, IO_LVL_HIGH, POWER_IO_A, IO_LVL_LOW); +;;;183 hal_gpio_set_output_data(POWER_IO_A, IO_LVL_LOW);// +000002 200a MOVS r0,#0xa +000004 f7fffffe BL hal_gpio_set_output_data +;;;184 /* VCC */ +;;;185 TAU_LOGD("disable reset!!!!!!!!!!!!!!!!!!!!!!!!!!"); +000008 22b9 MOVS r2,#0xb9 +00000a a109 ADR r1,|L9.48| +00000c a00c ADR r0,|L9.64| +00000e f7fffffe BL LOG_printf +;;;186 hal_system_set_pvd(true); +000012 2001 MOVS r0,#1 +000014 f7fffffe BL hal_system_set_pvd +;;;187 hal_system_set_vcc(true); +000018 2001 MOVS r0,#1 +00001a f7fffffe BL hal_system_set_vcc +00001e f3bf8f4f DSB +000022 4915 LDR r1,|L9.120| +000024 4813 LDR r0,|L9.116| +000026 60c8 STR r0,[r1,#0xc] +000028 f3bf8f4f DSB + |L9.44| +00002c bf00 NOP +00002e e7fd B |L9.44| +;;;188 NVIC_SystemReset(); +;;;189 } +;;;190 #endif + ENDP + + |L9.48| +000030 50697865 DCB "Pixel7_pro_demo",0 +000034 6c375f70 +000038 726f5f64 +00003c 656d6f00 + |L9.64| +000040 5b25735d DCB "[%s] (%04d) disable reset!!!!!!!!!!!!!!!!!!!!!!!!!!",0 +000044 20282530 +000048 34642920 +00004c 64697361 +000050 626c6520 +000054 72657365 +000058 74212121 +00005c 21212121 +000060 21212121 +000064 21212121 +000068 21212121 +00006c 21212121 +000070 21212100 + |L9.116| + DCD 0x05fa0004 + |L9.120| + DCD 0xe000ed00 + + AREA ||i.ap_set_backlight||, CODE, READONLY, ALIGN=2 + + ap_set_backlight PROC +;;;604 #if 1 // +;;;605 static bool ap_set_backlight(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b51c PUSH {r2-r4,lr} +;;;606 { +;;;607 uint16_t rd_51_val, rd_51_val2; +;;;608 +;;;609 //ֻ0x04~7FF(2043) ӳ䵽0x6e~7FF(1937),ȥмͻһ +;;;610 rd_51_val = dcs_packet->packet_param[0]; +000002 68c9 LDR r1,[r1,#0xc] +000004 7808 LDRB r0,[r1,#0] +;;;611 rd_51_val <<= 8; +;;;612 rd_51_val |= dcs_packet->packet_param[1]; +000006 784c LDRB r4,[r1,#1] +000008 0200 LSLS r0,r0,#8 ;611 +00000a 4304 ORRS r4,r4,r0 +;;;613 rd_51_val2 = (rd_51_val - 0x04) * 1937 / 2043 + 0x6e; +00000c 490e LDR r1,|L10.72| +00000e 1f20 SUBS r0,r4,#4 +000010 4348 MULS r0,r1,r0 +000012 490d LDR r1,|L10.72| +000014 316a ADDS r1,r1,#0x6a +000016 f7fffffe BL __aeabi_idivmod +00001a 306e ADDS r0,r0,#0x6e +00001c b280 UXTH r0,r0 +;;;614 +;;;615 if (rd_51_val2 < 0x220 && rd_51_val2 > 0x1B3) +00001e 4601 MOV r1,r0 +000020 39ff SUBS r1,r1,#0xff +000022 39b5 SUBS r1,r1,#0xb5 +000024 296c CMP r1,#0x6c +000026 d201 BCS |L10.44| +;;;616 { +;;;617 rd_51_val2 = 0x1B3; +000028 20ff MOVS r0,#0xff +00002a 30b4 ADDS r0,r0,#0xb4 + |L10.44| +;;;618 } +;;;619 +;;;620 rd_51_value = rd_51_val; +00002c 4907 LDR r1,|L10.76| +;;;621 +;;;622 // TAU_LOGD("51[%04X][%04X]", rd_51_val, rd_51_val2); +;;;623 +;;;624 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, rd_51_val2 >> 8, rd_51_val2 & 0x00FF); +00002e 2351 MOVS r3,#0x51 +000030 828c STRH r4,[r1,#0x14] ;620 +000032 b2c1 UXTB r1,r0 +000034 0a00 LSRS r0,r0,#8 +000036 9101 STR r1,[sp,#4] +000038 9000 STR r0,[sp,#0] +00003a 2203 MOVS r2,#3 +00003c 2100 MOVS r1,#0 +00003e 2039 MOVS r0,#0x39 +000040 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;625 +;;;626 return true; +000044 2001 MOVS r0,#1 +;;;627 } +000046 bd1c POP {r2-r4,pc} +;;;628 #endif + ENDP + + |L10.72| + DCD 0x00000791 + |L10.76| + DCD ||.data|| + + AREA ||i.ap_set_backlight_B1||, CODE, READONLY, ALIGN=2 + + ap_set_backlight_B1 PROC +;;;851 +;;;852 static bool ap_set_backlight_B1(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b53e PUSH {r1-r5,lr} +;;;853 { +;;;854 uint8_t value_b1 = 0; +;;;855 +;;;856 value_b1 = dcs_packet->packet_param[0]; +000002 68c8 LDR r0,[r1,#0xc] +000004 7800 LDRB r0,[r0,#0] +;;;857 +;;;858 // hal_dsi_tx_ctrl_write_cmd(0x29, 0, 2, 0x53, value_b1); +;;;859 +;;;860 if(value_b1 == 0x90) // ģʽ +000006 2890 CMP r0,#0x90 +000008 d002 BEQ |L11.16| +;;;861 { +;;;862 ///FPR ON +;;;863 // hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87,0x13,0xFF,0x05); +;;;864 if(rd_51_value >= 0x400) +;;;865 { +;;;866 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87, 0x1B, 0xF2, 0x05); +;;;867 } +;;;868 else if((rd_51_value >= 0x200) && (rd_51_value < 0x400)) +;;;869 { +;;;870 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87, 0x19, 0xF2, 0x05); +;;;871 } +;;;872 else if((rd_51_value >= 0x70) && (rd_51_value < 0x200)) +;;;873 { +;;;874 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87, 0x16, 0xF2, 0x05); +;;;875 } +;;;876 else if((rd_51_value >= 0x2F) && (rd_51_value < 0x70)) +;;;877 { +;;;878 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87, 0x13, 0xF2, 0x05); +;;;879 } +;;;880 else if((rd_51_value >= 0x10) && (rd_51_value < 0x2F)) +;;;881 { +;;;882 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87, 0x12, 0xF2, 0x05); +;;;883 } +;;;884 else +;;;885 { +;;;886 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87, 0x11, 0xF2, 0x05); +;;;887 } +;;;888 +;;;889 } +;;;890 else if(value_b1 == 0x00) // ˳ģʽ +00000a 2800 CMP r0,#0 +00000c d031 BEQ |L11.114| +00000e e040 B |L11.146| + |L11.16| +000010 4821 LDR r0,|L11.152| +000012 2301 MOVS r3,#1 ;864 +000014 8a80 LDRH r0,[r0,#0x14] ;864 ; rd_51_value +000016 029b LSLS r3,r3,#10 ;864 +000018 2105 MOVS r1,#5 ;866 +00001a 22f2 MOVS r2,#0xf2 ;866 +00001c 4298 CMP r0,r3 ;864 +00001e d301 BCC |L11.36| +000020 201b MOVS r0,#0x1b ;866 +000022 e01c B |L11.94| + |L11.36| +000024 1fc3 SUBS r3,r0,#7 ;868 +000026 3bff SUBS r3,r3,#0xff ;868 +000028 2401 MOVS r4,#1 ;868 +00002a 3bfa SUBS r3,r3,#0xfa ;868 +00002c 0264 LSLS r4,r4,#9 ;868 +00002e 42a3 CMP r3,r4 ;868 +000030 d201 BCS |L11.54| +000032 2019 MOVS r0,#0x19 ;870 +000034 e013 B |L11.94| + |L11.54| +000036 4603 MOV r3,r0 ;872 +000038 24ff MOVS r4,#0xff ;872 +00003a 3b70 SUBS r3,r3,#0x70 ;872 +00003c 3491 ADDS r4,r4,#0x91 ;872 +00003e 42a3 CMP r3,r4 ;872 +000040 d201 BCS |L11.70| +000042 2016 MOVS r0,#0x16 ;874 +000044 e00b B |L11.94| + |L11.70| +000046 4603 MOV r3,r0 ;876 +000048 3b2f SUBS r3,r3,#0x2f ;876 +00004a 2b41 CMP r3,#0x41 ;876 +00004c d201 BCS |L11.82| +00004e 2013 MOVS r0,#0x13 ;878 +000050 e005 B |L11.94| + |L11.82| +000052 3810 SUBS r0,r0,#0x10 ;878 +000054 281f CMP r0,#0x1f ;880 +000056 d201 BCS |L11.92| +000058 2012 MOVS r0,#0x12 ;882 +00005a e000 B |L11.94| + |L11.92| +00005c 2011 MOVS r0,#0x11 ;886 + |L11.94| +00005e 9201 STR r2,[sp,#4] ;882 +000060 9102 STR r1,[sp,#8] ;882 +000062 9000 STR r0,[sp,#0] ;882 +000064 2387 MOVS r3,#0x87 ;882 +000066 2204 MOVS r2,#4 ;882 +000068 2100 MOVS r1,#0 ;882 +00006a 2039 MOVS r0,#0x39 ;882 +00006c f7fffffe BL hal_dsi_tx_ctrl_write_cmd +000070 e00f B |L11.146| + |L11.114| +;;;891 { +;;;892 ///FPR OFF +;;;893 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x6F, 0x02); +000072 2002 MOVS r0,#2 +000074 4602 MOV r2,r0 +000076 9000 STR r0,[sp,#0] +000078 236f MOVS r3,#0x6f +00007a 2100 MOVS r1,#0 +00007c 2039 MOVS r0,#0x39 +00007e f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;894 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x87, 0x04); +000082 2004 MOVS r0,#4 +000084 9000 STR r0,[sp,#0] +000086 2387 MOVS r3,#0x87 +000088 2202 MOVS r2,#2 +00008a 2100 MOVS r1,#0 +00008c 2039 MOVS r0,#0x39 +00008e f7fffffe BL hal_dsi_tx_ctrl_write_cmd + |L11.146| +;;;895 } +;;;896 +;;;897 // TAU_LOGD("B1[%x]", value_b1); +;;;898 return true; +000092 2001 MOVS r0,#1 +;;;899 } +000094 bd3e POP {r1-r5,pc} +;;;900 + ENDP + +000096 0000 DCW 0x0000 + |L11.152| + DCD ||.data|| + + AREA ||i.ap_set_display_off||, CODE, READONLY, ALIGN=2 + + ap_set_display_off PROC +;;;335 +;;;336 static bool ap_set_display_off(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;337 { +;;;338 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x28); +000002 2328 MOVS r3,#0x28 +000004 2201 MOVS r2,#1 +000006 2100 MOVS r1,#0 +000008 2005 MOVS r0,#5 +00000a f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;339 TAU_LOGD("disp off"); +00000e 22ff MOVS r2,#0xff +000010 3254 ADDS r2,r2,#0x54 +000012 a103 ADR r1,|L12.32| +000014 a006 ADR r0,|L12.48| +000016 f7fffffe BL LOG_printf +;;;340 return true; +00001a 2001 MOVS r0,#1 +;;;341 } +00001c bd10 POP {r4,pc} +;;;342 + ENDP + +00001e 0000 DCW 0x0000 + |L12.32| +000020 50697865 DCB "Pixel7_pro_demo",0 +000024 6c375f70 +000028 726f5f64 +00002c 656d6f00 + |L12.48| +000030 5b25735d DCB "[%s] (%04d) disp off",0 +000034 20282530 +000038 34642920 +00003c 64697370 +000040 206f6666 +000044 00 +000045 00 DCB 0 +000046 00 DCB 0 +000047 00 DCB 0 + + AREA ||i.ap_set_display_on||, CODE, READONLY, ALIGN=2 + + ap_set_display_on PROC +;;;317 +;;;318 static bool ap_set_display_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;319 { +;;;320 TAU_LOGD("disp on"); +000002 22ff MOVS r2,#0xff +000004 3241 ADDS r2,r2,#0x41 +000006 a113 ADR r1,|L13.84| +000008 a016 ADR r0,|L13.100| +00000a f7fffffe BL LOG_printf +;;;321 if(g_resolution_change) +00000e 4c1a LDR r4,|L13.120| +000010 7960 LDRB r0,[r4,#5] ; g_resolution_change +000012 2800 CMP r0,#0 +000014 d010 BEQ |L13.56| +;;;322 { +;;;323 hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps_fhd, 128); +000016 4621 MOV r1,r4 +000018 2280 MOVS r2,#0x80 +00001a 3124 ADDS r1,r1,#0x24 +00001c 69a0 LDR r0,[r4,#0x18] ; g_rx_ctrl_handle +00001e f7fffffe BL hal_dsi_rx_ctrl_pre_init_pps +;;;324 hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); +000022 69a0 LDR r0,[r4,#0x18] ; g_rx_ctrl_handle +000024 f7fffffe BL hal_dsi_rx_ctrl_toggle_resolution +;;;325 g_resolution_change = false; +000028 2000 MOVS r0,#0 +00002a 7160 STRB r0,[r4,#5] +;;;326 TAU_LOGD("pps_update_1\r\n"); +00002c 22ff MOVS r2,#0xff +00002e 3247 ADDS r2,r2,#0x47 +000030 a108 ADR r1,|L13.84| +000032 a012 ADR r0,|L13.124| +000034 f7fffffe BL LOG_printf + |L13.56| +;;;327 } +;;;328 delayMs(5); +000038 2005 MOVS r0,#5 +00003a f7fffffe BL delayMs +;;;329 if (start_display_on == false){ +00003e 7860 LDRB r0,[r4,#1] ; start_display_on +000040 2800 CMP r0,#0 +000042 d105 BNE |L13.80| +;;;330 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x29); +000044 2329 MOVS r3,#0x29 +000046 2202 MOVS r2,#2 +000048 2100 MOVS r1,#0 +00004a 2005 MOVS r0,#5 +00004c f7fffffe BL hal_dsi_tx_ctrl_write_cmd + |L13.80| +;;;331 } +;;;332 // g_set_display_on = true; +;;;333 return true; +000050 2001 MOVS r0,#1 +;;;334 } +000052 bd10 POP {r4,pc} +;;;335 + ENDP + + |L13.84| +000054 50697865 DCB "Pixel7_pro_demo",0 +000058 6c375f70 +00005c 726f5f64 +000060 656d6f00 + |L13.100| +000064 5b25735d DCB "[%s] (%04d) disp on",0 +000068 20282530 +00006c 34642920 +000070 64697370 +000074 206f6e00 + |L13.120| + DCD ||.data|| + |L13.124| +00007c 5b25735d DCB "[%s] (%04d) pps_update_1\r\n",0 +000080 20282530 +000084 34642920 +000088 7070735f +00008c 75706461 +000090 74655f31 +000094 0d0a00 +000097 00 DCB 0 + + AREA ||i.ap_set_enter_sleep_mode||, CODE, READONLY, ALIGN=2 + + ap_set_enter_sleep_mode PROC +;;;343 +;;;344 static bool ap_set_enter_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b570 PUSH {r4-r6,lr} +;;;345 { +;;;346 send_29_flag = 0; +000002 4c15 LDR r4,|L14.88| +000004 2500 MOVS r5,#0 +000006 7025 STRB r5,[r4,#0] +;;;347 +;;;348 hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); +000008 69a0 LDR r0,[r4,#0x18] ; g_rx_ctrl_handle +00000a f7fffffe BL hal_dsi_rx_ctrl_set_sw_tear_mode +;;;349 delayMs(10); +00000e 200a MOVS r0,#0xa +000010 f7fffffe BL delayMs +;;;350 Gpio_swire_output(0, 0); +000014 2100 MOVS r1,#0 +000016 4608 MOV r0,r1 +000018 f7fffffe BL Gpio_swire_output +;;;351 delayMs(10); +00001c 200a MOVS r0,#0xa +00001e f7fffffe BL delayMs +;;;352 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x10); +000022 2310 MOVS r3,#0x10 +000024 2201 MOVS r2,#1 +000026 2100 MOVS r1,#0 +000028 2005 MOVS r0,#5 +00002a f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;353 delayMs(20); +00002e 2014 MOVS r0,#0x14 +000030 f7fffffe BL delayMs +;;;354 hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_LOW); +000034 2100 MOVS r1,#0 +000036 2013 MOVS r0,#0x13 +000038 f7fffffe BL hal_gpio_set_output_data +;;;355 +;;;356 hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW);//Reaet +00003c 2000 MOVS r0,#0 +00003e f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin +;;;357 +;;;358 TAU_LOGD("enter sleep mode"); +000042 22ff MOVS r2,#0xff +000044 3267 ADDS r2,r2,#0x67 +000046 a105 ADR r1,|L14.92| +000048 a008 ADR r0,|L14.108| +00004a f7fffffe BL LOG_printf +;;;359 #if ENABLE_TP_WAKE_UP +;;;360 g_need_enter_sleep_mode = true; +00004e 2001 MOVS r0,#1 +000050 70e0 STRB r0,[r4,#3] +;;;361 #endif +;;;362 g_exit_sleep_mode = false; +000052 70a5 STRB r5,[r4,#2] +;;;363 +;;;364 return true; +;;;365 } +000054 bd70 POP {r4-r6,pc} +;;;366 + ENDP + +000056 0000 DCW 0x0000 + |L14.88| + DCD ||.data|| + |L14.92| +00005c 50697865 DCB "Pixel7_pro_demo",0 +000060 6c375f70 +000064 726f5f64 +000068 656d6f00 + |L14.108| +00006c 5b25735d DCB "[%s] (%04d) enter sleep mode",0 +000070 20282530 +000074 34642920 +000078 656e7465 +00007c 7220736c +000080 65657020 +000084 6d6f6465 +000088 00 +000089 00 DCB 0 +00008a 00 DCB 0 +00008b 00 DCB 0 + + AREA ||i.ap_set_exit_sleep_mode||, CODE, READONLY, ALIGN=2 + + ap_set_exit_sleep_mode PROC +;;;366 +;;;367 static bool ap_set_exit_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;368 { +;;;369 TAU_LOGD("exit sleep mode"); +000002 22ff MOVS r2,#0xff +000004 3272 ADDS r2,r2,#0x72 +000006 a104 ADR r1,|L15.24| +000008 a007 ADR r0,|L15.40| +00000a f7fffffe BL LOG_printf +;;;370 g_exit_sleep_mode = true; +00000e 490d LDR r1,|L15.68| +000010 2001 MOVS r0,#1 +000012 7088 STRB r0,[r1,#2] +;;;371 /* AVDD ϵ, ڽϢPPS */ +;;;372 // hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); +;;;373 return true; +;;;374 } +000014 bd10 POP {r4,pc} +;;;375 + ENDP + +000016 0000 DCW 0x0000 + |L15.24| +000018 50697865 DCB "Pixel7_pro_demo",0 +00001c 6c375f70 +000020 726f5f64 +000024 656d6f00 + |L15.40| +000028 5b25735d DCB "[%s] (%04d) exit sleep mode",0 +00002c 20282530 +000030 34642920 +000034 65786974 +000038 20736c65 +00003c 6570206d +000040 6f646500 + |L15.68| + DCD ||.data|| + + AREA ||i.ap_update_frame_rate||, CODE, READONLY, ALIGN=2 + + ap_update_frame_rate PROC +;;;280 +;;;281 static bool ap_update_frame_rate(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;282 { +;;;283 static uint8_t frame_rate = 0; //ÿλʱĻʾ60hzǶȡframe_rateȴ +;;;284 //TAU_LOGD("frame_rate:[%02X], %d", dcs_packet->packet_param[0], dcs_packet->param_length); +;;;285 if (frame_rate != dcs_packet->packet_param[0]) +000002 68c8 LDR r0,[r1,#0xc] +000004 7802 LDRB r2,[r0,#0] +000006 480e LDR r0,|L16.64| +000008 7a81 LDRB r1,[r0,#0xa] ; frame_rate +00000a 428a CMP r2,r1 +00000c d00d BEQ |L16.42| +;;;286 { +;;;287 frame_rate = dcs_packet->packet_param[0]; +00000e 7282 STRB r2,[r0,#0xa] +;;;288 if (frame_rate == 0x00) //120hz +;;;289 { +;;;290 +;;;291 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_SOFT_120HZ_MODE); +000010 490c LDR r1,|L16.68| +000012 6980 LDR r0,[r0,#0x18] +000014 2a00 CMP r2,#0 ;288 +000016 d00a BEQ |L16.46| +;;;292 // hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_HW_MODE); +;;;293 TAU_LOGD("120HZ\n"); +;;;294 } +;;;295 else +;;;296 { +;;;297 //hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_SOFT_60HZ_MODE); +;;;298 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_HW_MODE); +000018 2200 MOVS r2,#0 +00001a f7fffffe BL hal_dsi_rx_ctrl_set_tear_mode_ex +;;;299 TAU_LOGD("60HZ\n"); +00001e 22ff MOVS r2,#0xff +000020 322c ADDS r2,r2,#0x2c +000022 a109 ADR r1,|L16.72| +000024 a00c ADR r0,|L16.88| + |L16.38| +000026 f7fffffe BL LOG_printf + |L16.42| +;;;300 +;;;301 } +;;;302 //TAU_LOGD("frame_rate:%x",frame_rate); +;;;303 } +;;;304 return true; +00002a 2001 MOVS r0,#1 +;;;305 } +00002c bd10 POP {r4,pc} + |L16.46| +00002e 2205 MOVS r2,#5 ;291 +000030 f7fffffe BL hal_dsi_rx_ctrl_set_tear_mode_ex +000034 22ff MOVS r2,#0xff ;293 +000036 3226 ADDS r2,r2,#0x26 ;293 +000038 a103 ADR r1,|L16.72| +00003a a00c ADR r0,|L16.108| +00003c e7f3 B |L16.38| +;;;306 + ENDP + +00003e 0000 DCW 0x0000 + |L16.64| + DCD ||.data|| + |L16.68| + DCD 0x00000bcc + |L16.72| +000048 50697865 DCB "Pixel7_pro_demo",0 +00004c 6c375f70 +000050 726f5f64 +000054 656d6f00 + |L16.88| +000058 5b25735d DCB "[%s] (%04d) 60HZ\n",0 +00005c 20282530 +000060 34642920 +000064 3630485a +000068 0a00 +00006a 00 DCB 0 +00006b 00 DCB 0 + |L16.108| +00006c 5b25735d DCB "[%s] (%04d) 120HZ\n",0 +000070 20282530 +000074 34642920 +000078 31323048 +00007c 5a0a00 +00007f 00 DCB 0 + + AREA ||i.init_mipi_tx||, CODE, READONLY, ALIGN=2 + + init_mipi_tx PROC +;;;2031 +;;;2032 static void init_mipi_tx(void) +000000 b570 PUSH {r4-r6,lr} +;;;2033 { +;;;2034 if (g_tx_ctrl_handle == NULL) +000002 4c1b LDR r4,|L17.112| +000004 69e0 LDR r0,[r4,#0x1c] ; g_tx_ctrl_handle +000006 2800 CMP r0,#0 +000008 d102 BNE |L17.16| +;;;2035 { +;;;2036 g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); +00000a f7fffffe BL hal_dsi_tx_ctrl_create_handle +00000e 61e0 STR r0,[r4,#0x1c] ; g_tx_ctrl_handle + |L17.16| +;;;2037 } +;;;2038 g_tx_ctrl_handle->channel_id = OUTPUT_VC; +000010 2100 MOVS r1,#0 +000012 7081 STRB r1,[r0,#2] +;;;2039 g_tx_ctrl_handle->lane_num = OUTPUT_LANE_NUMBER; +000014 2104 MOVS r1,#4 +000016 7041 STRB r1,[r0,#1] +;;;2040 g_tx_ctrl_handle->vid_mode = OUTPUT_VIDEO_MODEL; +000018 2302 MOVS r3,#2 +00001a 70c3 STRB r3,[r0,#3] +;;;2041 g_tx_ctrl_handle->cmd_tx_type = _CMD_TYPE; +00001c 2201 MOVS r2,#1 +;;;2042 g_tx_ctrl_handle->dpi_vsa = OUTPUT_VSA; +;;;2043 g_tx_ctrl_handle->dpi_vbp = OUTPUT_VBP; +00001e 2408 MOVS r4,#8 +000020 7102 STRB r2,[r0,#4] ;2041 +000022 210c MOVS r1,#0xc ;2042 +;;;2044 g_tx_ctrl_handle->dpi_vfp = OUTPUT_VFP; +000024 2538 MOVS r5,#0x38 +000026 1906 ADDS r6,r0,r4 +000028 c632 STM r6!,{r1,r4,r5} +;;;2045 g_tx_ctrl_handle->dpi_hsa = OUTPUT_HSA; +;;;2046 g_tx_ctrl_handle->dpi_hbp = OUTPUT_HBP; +;;;2047 g_tx_ctrl_handle->dpi_hfp = OUTPUT_HFP; +00002a 6144 STR r4,[r0,#0x14] +00002c 6181 STR r1,[r0,#0x18] +00002e 2178 MOVS r1,#0x78 +;;;2048 g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; +000030 61c1 STR r1,[r0,#0x1c] +000032 212d MOVS r1,#0x2d +000034 0149 LSLS r1,r1,#5 +;;;2049 g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; +000036 6201 STR r1,[r0,#0x20] +000038 21c3 MOVS r1,#0xc3 +00003a 0109 LSLS r1,r1,#4 +;;;2050 g_tx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; +00003c 6241 STR r1,[r0,#0x24] +00003e 2187 MOVS r1,#0x87 +000040 00c9 LSLS r1,r1,#3 +;;;2051 g_tx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; +000042 6281 STR r1,[r0,#0x28] +000044 214b MOVS r1,#0x4b +000046 0149 LSLS r1,r1,#5 +;;;2052 g_tx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; +000048 62c1 STR r1,[r0,#0x2c] +00004a 4601 MOV r1,r0 +00004c 3120 ADDS r1,r1,#0x20 +00004e 740b STRB r3,[r1,#0x10] +;;;2053 g_tx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; +000050 744a STRB r2,[r1,#0x11] +;;;2054 g_tx_ctrl_handle->tx_frame_rate = OUTPUT_FRAME_RATE;//OUTPUT_FRAME_RATE; +000052 4908 LDR r1,|L17.116| +;;;2055 g_tx_ctrl_handle->tx_clkawayshs = true; +000054 6401 STR r1,[r0,#0x40] +000056 4601 MOV r1,r0 +000058 3140 ADDS r1,r1,#0x40 +00005a 710a STRB r2,[r1,#4] +;;;2056 // g_tx_ctrl_handle->tx_line_delay = TX_LINE_DELAY; +;;;2057 g_tx_ctrl_handle->lp_exit_lpdt = true; +00005c 71ca STRB r2,[r1,#7] +;;;2058 +;;;2059 hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); +00005e f7fffffe BL hal_dsi_tx_ctrl_init +;;;2060 /* AP ûзʱĬϵʾɫ, Ϊ0 0 0(ɫ), ɫΪdebugʹ */ +;;;2061 #ifndef DISPLAY_ONLY +;;;2062 hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); +000062 2200 MOVS r2,#0 +000064 4611 MOV r1,r2 +000066 4610 MOV r0,r2 +000068 f7fffffe BL hal_dsi_tx_ctrl_set_overwrite_rgb +;;;2063 #else +;;;2064 hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0xFF); +;;;2065 #endif +;;;2066 } +00006c bd70 POP {r4-r6,pc} +;;;2067 + ENDP + +00006e 0000 DCW 0x0000 + |L17.112| + DCD ||.data|| + |L17.116| + DCD 0x42700000 + + AREA ||i.init_panel||, CODE, READONLY, ALIGN=2 + + init_panel PROC +;;;1943 +;;;1944 static void init_panel(void) +000000 b5fe PUSH {r1-r7,lr} +000002 2001 MOVS r0,#1 +000004 f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin +000008 200a MOVS r0,#0xa +00000a f7fffffe BL delayMs +00000e 2000 MOVS r0,#0 +000010 f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin +000014 200a MOVS r0,#0xa +000016 f7fffffe BL delayMs +00001a 2001 MOVS r0,#1 +00001c f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin +000020 200a MOVS r0,#0xa +000022 f7fffffe BL delayMs +;;;1945 { +;;;1946 /* reset panel*/ +;;;1947 tx_panel_reset(); +;;;1948 +;;;1949 // hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH); +;;;1950 /* enter send initial code mode*/ +;;;1951 hal_dsi_tx_ctrl_enter_init_panel_mode(); +000026 f7fffffe BL hal_dsi_tx_ctrl_enter_init_panel_mode +;;;1952 #if AMOLED_NT37701_CSOT667 +;;;1953 #if PANEL_INIT_CODE_ARRAY +;;;1954 send_panel_init_code(sizeof(panel_init_code), (uint8_t *) panel_init_code); +00002a 4f1c LDR r7,|L18.156| +00002c 4d1c LDR r5,|L18.160| +00002e 2400 MOVS r4,#0 + |L18.48| +000030 192b ADDS r3,r5,r4 +000032 789e LDRB r6,[r3,#2] +000034 7859 LDRB r1,[r3,#1] +000036 5d28 LDRB r0,[r5,r4] +000038 4632 MOV r2,r6 +00003a 1cdb ADDS r3,r3,#3 +00003c f7fffffe BL hal_dsi_tx_ctrl_write_array_cmd +000040 19a4 ADDS r4,r4,r6 +000042 1ce4 ADDS r4,r4,#3 +000044 42bc CMP r4,r7 +000046 d3f3 BCC |L18.48| +;;;1955 #endif +;;;1956 hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x01); //0FFF +000048 2101 MOVS r1,#1 +00004a 2000 MOVS r0,#0 +00004c 9101 STR r1,[sp,#4] +00004e 9000 STR r0,[sp,#0] +000050 4601 MOV r1,r0 +000052 2351 MOVS r3,#0x51 +000054 2203 MOVS r2,#3 +000056 2029 MOVS r0,#0x29 +000058 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;1957 hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH); +00005c 2101 MOVS r1,#1 +00005e 2013 MOVS r0,#0x13 +000060 f7fffffe BL hal_gpio_init_output +;;;1958 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); +000064 2311 MOVS r3,#0x11 +000066 2201 MOVS r2,#1 +000068 2100 MOVS r1,#0 +00006a 2005 MOVS r0,#5 +00006c f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;1959 delayMs(90); //120 +000070 205a MOVS r0,#0x5a +000072 f7fffffe BL delayMs +;;;1960 Gpio_swire_output(2, 40); +000076 2128 MOVS r1,#0x28 +000078 2002 MOVS r0,#2 +00007a f7fffffe BL Gpio_swire_output +;;;1961 delayMs(20); +00007e 2014 MOVS r0,#0x14 +000080 f7fffffe BL delayMs +;;;1962 +;;;1963 #endif +;;;1964 +;;;1965 // hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); +;;;1966 +;;;1967 /* exit send initial code mode*/ +;;;1968 hal_dsi_tx_ctrl_exit_init_panel_mode(); +000084 f7fffffe BL hal_dsi_tx_ctrl_exit_init_panel_mode +;;;1969 TAU_LOGD("Pannel init"); +000088 4a06 LDR r2,|L18.164| +00008a a107 ADR r1,|L18.168| +00008c a00a ADR r0,|L18.184| +00008e f7fffffe BL LOG_printf +;;;1970 delayMs(20); +000092 2014 MOVS r0,#0x14 +000094 f7fffffe BL delayMs +;;;1971 } +000098 bdfe POP {r1-r7,pc} +;;;1972 + ENDP + +00009a 0000 DCW 0x0000 + |L18.156| + DCD 0x000028cc + |L18.160| + DCD ||.constdata||+0x60 + |L18.164| + DCD 0x000007b1 + |L18.168| +0000a8 50697865 DCB "Pixel7_pro_demo",0 +0000ac 6c375f70 +0000b0 726f5f64 +0000b4 656d6f00 + |L18.184| +0000b8 5b25735d DCB "[%s] (%04d) Pannel init",0 +0000bc 20282530 +0000c0 34642920 +0000c4 50616e6e +0000c8 656c2069 +0000cc 6e697400 + + AREA ||i.open_mipi_rx||, CODE, READONLY, ALIGN=2 + + open_mipi_rx PROC +;;;1972 +;;;1973 static void open_mipi_rx(void) +000000 b530 PUSH {r4,r5,lr} +;;;1974 { +000002 b0a1 SUB sp,sp,#0x84 +;;;1975 /* TE */ +;;;1976 hal_gpio_set_mode(IO_PAD_AP_TE, IO_MODE_TEAR); +000004 2100 MOVS r1,#0 +000006 2003 MOVS r0,#3 +000008 f7fffffe BL hal_gpio_set_mode +;;;1977 +;;;1978 if (g_rx_ctrl_handle == NULL) +00000c 4d20 LDR r5,|L19.144| +00000e 69a8 LDR r0,[r5,#0x18] ; g_rx_ctrl_handle +000010 2800 CMP r0,#0 +000012 d102 BNE |L19.26| +;;;1979 { +;;;1980 /* rx ctrl handle */ +;;;1981 g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); +000014 f7fffffe BL hal_dsi_rx_ctrl_create_handle +000018 61a8 STR r0,[r5,#0x18] ; g_rx_ctrl_handle + |L19.26| +;;;1982 } +;;;1983 /* ò */ +;;;1984 g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; +00001a 202d MOVS r0,#0x2d +00001c 69ac LDR r4,[r5,#0x18] ; g_rx_ctrl_handle +00001e 0140 LSLS r0,r0,#5 +;;;1985 g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; +000020 6020 STR r0,[r4,#0] +000022 20c3 MOVS r0,#0xc3 +000024 0100 LSLS r0,r0,#4 +;;;1986 g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; +000026 6060 STR r0,[r4,#4] +000028 2087 MOVS r0,#0x87 +00002a 00c0 LSLS r0,r0,#3 +;;;1987 g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; +00002c 60a0 STR r0,[r4,#8] +00002e 204b MOVS r0,#0x4b +000030 0140 LSLS r0,r0,#5 +;;;1988 g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; +000032 60e0 STR r0,[r4,#0xc] +000034 2002 MOVS r0,#2 +000036 7420 STRB r0,[r4,#0x10] +;;;1989 g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; +000038 2101 MOVS r1,#1 +00003a 7461 STRB r1,[r4,#0x11] +;;;1990 g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; +00003c 2004 MOVS r0,#4 +00003e 7720 STRB r0,[r4,#0x1c] +;;;1991 g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; +000040 7760 STRB r0,[r4,#0x1d] +;;;1992 g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; /* ɲ */ +000042 77a1 STRB r1,[r4,#0x1e] +;;;1993 g_rx_ctrl_handle->rx_vc = INPUT_VC; +000044 2000 MOVS r0,#0 +000046 77e0 STRB r0,[r4,#0x1f] +;;;1994 g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; +000048 2020 MOVS r0,#0x20 +00004a 5501 STRB r1,[r0,r4] +;;;1995 g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; +00004c 4811 LDR r0,|L19.148| +;;;1996 g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; /* ע DCSб */ +00004e 6260 STR r0,[r4,#0x24] +000050 4620 MOV r0,r4 +000052 4a11 LDR r2,|L19.152| +000054 3080 ADDS r0,r0,#0x80 +;;;1997 g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; /* עdsc read ص,ѡ,˺Ϊʱcus_dcs_entry_tableִ */ +000056 6282 STR r2,[r0,#0x28] +000058 4a10 LDR r2,|L19.156| +;;;1998 g_rx_ctrl_handle->pps_update_entry = pps_update_handle; +00005a 62c2 STR r2,[r0,#0x2c] +00005c 4a10 LDR r2,|L19.160| +;;;1999 g_rx_ctrl_handle->hight_performan_mode = HIGHT_PERFORMAN_L1;///////////////////////// 0/1/2 +00005e 6302 STR r2,[r0,#0x30] +000060 20bf MOVS r0,#0xbf +000062 5501 STRB r1,[r0,r4] +;;;2000 #if 1//򿪻ᵼ¿ӡϢTX +;;;2001 // g_rx_ctrl_handle->pq_marginal = PQ_TYPE_5; +;;;2002 #endif +;;;2003 /* ǰԤPPS, AP PPS cmdҲ */ +;;;2004 if (g_rx_ctrl_handle->compress_en == true) +;;;2005 { +;;;2006 +;;;2007 uint8_t pps[128] = {0x11, 0x00, 0x00, 0x89, 0x30, 0x80, 0x0C, 0x30, 0x05, 0xA0, 0x00, 0x34, 0x02, 0xD0, 0x02, 0xD0, +000064 2280 MOVS r2,#0x80 +000066 490f LDR r1,|L19.164| +000068 4668 MOV r0,sp +00006a f7fffffe BL __aeabi_memcpy4 +;;;2008 0x02, 0x00, 0x02, 0x68, 0x00, 0x20, 0x05, 0xC6, 0x00, 0x0A, 0x00, 0x0C, 0x01, 0xE2, 0x01, 0x78, +;;;2009 0x18, 0x00, 0x10, 0xF0, 0x03, 0x0C, 0x20, 0x00, 0x06, 0x0B, 0x0B, 0x33, 0x0E, 0x1C, 0x2A, 0x38, +;;;2010 0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7B, 0x7D, 0x7E, 0x01, 0x02, 0x01, 0x00, 0x09, 0x40, +;;;2011 0x09, 0xBE, 0x19, 0xFC, 0x19, 0xFA, 0x19, 0xF8, 0x1A, 0x38, 0x1A, 0x78, 0x1A, 0xB6, 0x2A, 0xF6, +;;;2012 0x2B, 0x34, 0x2B, 0x74, 0x3B, 0x74, 0x6B, 0xF4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +;;;2013 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +;;;2014 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +;;;2015 }; +;;;2016 +;;;2017 hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 128); +00006e 2280 MOVS r2,#0x80 +000070 4669 MOV r1,sp +000072 4620 MOV r0,r4 +000074 f7fffffe BL hal_dsi_rx_ctrl_pre_init_pps +;;;2018 } +;;;2019 /* ʼrx ctrl */ +;;;2020 hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); +000078 69a8 LDR r0,[r5,#0x18] ; g_rx_ctrl_handle +00007a f7fffffe BL hal_dsi_rx_ctrl_init +;;;2021 +;;;2022 hal_dsi_rx_ctrl_set_cus_sync_line(g_rx_ctrl_handle, SYNC_LIN_NUMBER); // Ҫ򿪡˺ +00007e 490a LDR r1,|L19.168| +000080 69a8 LDR r0,[r5,#0x18] ; g_rx_ctrl_handle +000082 f7fffffe BL hal_dsi_rx_ctrl_set_cus_sync_line +;;;2023 // hal_dsi_rx_ctrl_set_cus_esc_clk(g_rx_ctrl_handle,20000000); +;;;2024 // hal_dsi_rx_ctrl_hight_performan_mode(g_rx_ctrl_handle);///////////////////////// +;;;2025 // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256, 256, 211); +;;;2026 // hal_dsi_rx_ctrl_set_te_waveform(g_rx_ctrl_handle, false, 512); +;;;2027 +;;;2028 /* rx ctrl */ +;;;2029 hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +000086 69a8 LDR r0,[r5,#0x18] ; g_rx_ctrl_handle +000088 f7fffffe BL hal_dsi_rx_ctrl_start +;;;2030 } +00008c b021 ADD sp,sp,#0x84 +00008e bd30 POP {r4,r5,pc} +;;;2031 + ENDP + + |L19.144| + DCD ||.data|| + |L19.148| + DCD 0x59682f00 + |L19.152| + DCD ||.constdata|| + |L19.156| + DCD ap_dcs_read + |L19.160| + DCD pps_update_handle + |L19.164| + DCD ||.constdata||+0x292c + |L19.168| + DCD 0x00000bcc + + AREA ||i.pps_update_handle||, CODE, READONLY, ALIGN=2 + + pps_update_handle PROC +;;;254 /* PPS update callback ڷֱлcase */ +;;;255 static bool pps_update_handle(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height) +000000 b570 PUSH {r4-r6,lr} +;;;256 { +;;;257 /* AVDD ϵ, ڽϢPPS */ +;;;258 // hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); +;;;259 // hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); +;;;260 if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) +000002 490d LDR r1,|L20.56| +000004 6988 LDR r0,[r1,#0x18] ; g_rx_ctrl_handle +000006 6804 LDR r4,[r0,#0] +000008 4294 CMP r4,r2 +00000a d102 BNE |L20.18| +00000c 6844 LDR r4,[r0,#4] +00000e 429c CMP r4,r3 +000010 d00f BEQ |L20.50| + |L20.18| +;;;261 { +;;;262 /* PPS Update ҷֱʷ仯 */ +;;;263 g_rx_ctrl_handle->base_info.src_w = pic_width; +;;;264 g_rx_ctrl_handle->base_info.src_h = pic_height; +;;;265 /* עⲿֻPPSǰ Compression Mode Command */ +;;;266 g_rx_ctrl_handle->compress_en = true; +000012 4605 MOV r5,r0 +000014 2401 MOVS r4,#1 +000016 c00c STM r0!,{r2,r3} +000018 3520 ADDS r5,r5,#0x20 +00001a 702c STRB r4,[r5,#0] +;;;267 +;;;268 g_resolution_change = true; +00001c 714c STRB r4,[r1,#5] +;;;269 if(pic_width > 720) +00001e 242d MOVS r4,#0x2d +000020 0124 LSLS r4,r4,#4 +000022 3808 SUBS r0,r0,#8 +000024 42a2 CMP r2,r4 +000026 d902 BLS |L20.46| +;;;270 { +;;;271 g_tx_ctrl_handle->base_info.src_w = pic_width; +000028 69c9 LDR r1,[r1,#0x1c] ; g_tx_ctrl_handle +;;;272 g_tx_ctrl_handle->base_info.src_h = pic_height; +00002a 624b STR r3,[r1,#0x24] +00002c 620a STR r2,[r1,#0x20] + |L20.46| +;;;273 } +;;;274 hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); +00002e f7fffffe BL hal_dsi_rx_ctrl_toggle_resolution + |L20.50| +;;;275 } +;;;276 // hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); +;;;277 // TAU_LOGD("PPS Update\n"); +;;;278 return true; +000032 2001 MOVS r0,#1 +;;;279 } +000034 bd70 POP {r4-r6,pc} +;;;280 + ENDP + +000036 0000 DCW 0x0000 + |L20.56| + DCD ||.data|| + + AREA ||i.soft_te_timer_cb||, CODE, READONLY, ALIGN=2 + + soft_te_timer_cb PROC +;;;2133 +;;;2134 static void soft_te_timer_cb(void *data) +000000 b510 PUSH {r4,lr} +;;;2135 { +;;;2136 /* +;;;2137 S8 ӵTP1.8V, AC ҪȵTP1.8 ٳʼ, TP ǰҪͨTEֻֻ +;;;2138 */ +;;;2139 // if (panel_display_done == false) +;;;2140 // { +;;;2141 hal_dsi_rx_ctrl_gen_a_tear_signal(g_rx_ctrl_handle); +000002 4805 LDR r0,|L21.24| +000004 6980 LDR r0,[r0,#0x18] ; g_rx_ctrl_handle +000006 f7fffffe BL hal_dsi_rx_ctrl_gen_a_tear_signal +;;;2142 hal_timer_start(TE_TIMER, 17, soft_te_timer_cb, NULL); +00000a 2300 MOVS r3,#0 +00000c 4a03 LDR r2,|L21.28| +00000e 2111 MOVS r1,#0x11 +000010 2002 MOVS r0,#2 +000012 f7fffffe BL hal_timer_start +;;;2143 // } +;;;2144 // else +;;;2145 // { +;;;2146 // hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); +;;;2147 // } +;;;2148 } +000016 bd10 POP {r4,pc} +;;;2149 + ENDP + + |L21.24| + DCD ||.data|| + |L21.28| + DCD soft_te_timer_cb + + AREA ||i.soft_te_timer_init||, CODE, READONLY, ALIGN=2 + + soft_te_timer_init PROC +;;;2149 +;;;2150 void soft_te_timer_init()//static +000000 b510 PUSH {r4,lr} +;;;2151 { +;;;2152 TAU_LOGD("soft_te_timer_init"); +000002 4a09 LDR r2,|L22.40| +000004 a109 ADR r1,|L22.44| +000006 a00d ADR r0,|L22.60| +000008 f7fffffe BL LOG_printf +;;;2153 hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); +00000c 4813 LDR r0,|L22.92| +00000e 6980 LDR r0,[r0,#0x18] ; g_rx_ctrl_handle +000010 f7fffffe BL hal_dsi_rx_ctrl_set_sw_tear_mode +;;;2154 hal_timer_init(TE_TIMER); +000014 2002 MOVS r0,#2 +000016 f7fffffe BL hal_timer_init +;;;2155 hal_timer_start(TE_TIMER, 1, soft_te_timer_cb, NULL); +00001a 2300 MOVS r3,#0 +00001c 4a10 LDR r2,|L22.96| +00001e 2101 MOVS r1,#1 +000020 2002 MOVS r0,#2 +000022 f7fffffe BL hal_timer_start +;;;2156 } +000026 bd10 POP {r4,pc} +;;;2157 + ENDP + + |L22.40| + DCD 0x00000868 + |L22.44| +00002c 50697865 DCB "Pixel7_pro_demo",0 +000030 6c375f70 +000034 726f5f64 +000038 656d6f00 + |L22.60| +00003c 5b25735d DCB "[%s] (%04d) soft_te_timer_init",0 +000040 20282530 +000044 34642920 +000048 736f6674 +00004c 5f74655f +000050 74696d65 +000054 725f696e +000058 697400 +00005b 00 DCB 0 + |L22.92| + DCD ||.data|| + |L22.96| + DCD soft_te_timer_cb + + AREA ||i.soft_timer3_cb||, CODE, READONLY, ALIGN=2 + + soft_timer3_cb PROC +;;;2158 #ifdef ADD_TIMER3_FUNCTION +;;;2159 static void soft_timer3_cb(void *data) +000000 b510 PUSH {r4,lr} +;;;2160 { +;;;2161 hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); +000002 2300 MOVS r3,#0 +000004 4a07 LDR r2,|L23.36| +000006 210a MOVS r1,#0xa +000008 2003 MOVS r0,#3 +00000a f7fffffe BL hal_timer_start +;;;2162 tp_sleep_count++; +00000e 4806 LDR r0,|L23.40| +000010 7b01 LDRB r1,[r0,#0xc] ; tp_sleep_count +000012 1c49 ADDS r1,r1,#1 +000014 7301 STRB r1,[r0,#0xc] +;;;2163 if(phone_DisplayOFF_count > 0) +000016 89c1 LDRH r1,[r0,#0xe] ; phone_DisplayOFF_count +000018 2900 CMP r1,#0 +00001a d001 BEQ |L23.32| +00001c 1c49 ADDS r1,r1,#1 +;;;2164 { +;;;2165 phone_DisplayOFF_count++; +00001e 81c1 STRH r1,[r0,#0xe] + |L23.32| +;;;2166 } +;;;2167 +;;;2168 #if AUTO_CAL_TP +;;;2169 if (g_exit_sleep_mode) +;;;2170 { +;;;2171 if (g_cal_cnt > 0) +;;;2172 { +;;;2173 g_cal_cnt--; +;;;2174 if (g_cal_cnt == 0) +;;;2175 { +;;;2176 g_calibration_flag = true; +;;;2177 TAU_LOGD("Start cal tp!\n"); +;;;2178 } +;;;2179 } +;;;2180 } +;;;2181 #endif +;;;2182 +;;;2183 #if RUN_TEST +;;;2184 g_run_test_cnt++; +;;;2185 #endif +;;;2186 } +000020 bd10 POP {r4,pc} +;;;2187 #endif + ENDP + +000022 0000 DCW 0x0000 + |L23.36| + DCD soft_timer3_cb + |L23.40| + DCD ||.data|| + + AREA ||i.test_pwm_out_adjust||, CODE, READONLY, ALIGN=2 + + test_pwm_out_adjust PROC +;;;416 *****************************************************************************/ +;;;417 static void test_pwm_out_adjust(bool init, bool polarity, uint8_t duty_ratio, uint32_t frequency) +000000 b5ff PUSH {r0-r7,lr} +;;;418 { +;;;419 pwm_out_ctrl_e ctl0 = PWMO_CTRL_HIGH; +000002 2602 MOVS r6,#2 +;;;420 pwm_out_ctrl_e ctl1 = PWMO_CTRL_LOW; +000004 2501 MOVS r5,#1 +000006 b083 SUB sp,sp,#0xc ;418 +;;;421 if (polarity) +000008 2900 CMP r1,#0 +00000a d001 BEQ |L24.16| +;;;422 { +;;;423 ctl0 = PWMO_CTRL_LOW; +00000c 2601 MOVS r6,#1 +;;;424 ctl1 = PWMO_CTRL_HIGH; +00000e 2502 MOVS r5,#2 + |L24.16| +;;;425 } +;;;426 uint32_t period = 1000000 / frequency; //λus +000010 4619 MOV r1,r3 +000012 4814 LDR r0,|L24.100| +000014 f7fffffe BL __aeabi_uidivmod +000018 4604 MOV r4,r0 +;;;427 uint32_t thr0 = 0; +00001a 2000 MOVS r0,#0 +;;;428 uint32_t thr1 = (period * duty_ratio / 100); +00001c 9001 STR r0,[sp,#4] +00001e 9905 LDR r1,[sp,#0x14] +000020 4620 MOV r0,r4 +000022 4348 MULS r0,r1,r0 +000024 2164 MOVS r1,#0x64 +000026 f7fffffe BL __aeabi_uidivmod +00002a 4607 MOV r7,r0 +;;;429 +;;;430 if (duty_ratio == 100) +00002c 9805 LDR r0,[sp,#0x14] +00002e 2864 CMP r0,#0x64 +000030 d101 BNE |L24.54| +;;;431 { +;;;432 ctl1 = ctl0; +000032 4635 MOV r5,r6 +;;;433 thr1 = period / 2; +000034 0867 LSRS r7,r4,#1 + |L24.54| +;;;434 } +;;;435 if (init) +000036 9803 LDR r0,[sp,#0xc] +000038 2800 CMP r0,#0 +00003a d00a BEQ |L24.82| +;;;436 { +;;;437 hal_pwm_out_init(); +00003c f7fffffe BL hal_pwm_out_init +;;;438 hal_pwm_out_config_all(ctl0, ctl1, thr0, thr1, period); +000040 463b MOV r3,r7 +000042 9400 STR r4,[sp,#0] +000044 4629 MOV r1,r5 +000046 4630 MOV r0,r6 +000048 9a01 LDR r2,[sp,#4] +00004a f7fffffe BL hal_pwm_out_config_all + |L24.78| +;;;439 } +;;;440 else +;;;441 { +;;;442 hal_pwm_out_sync_all(ctl0, ctl1, thr0, thr1, period); +;;;443 } +;;;444 } +00004e b007 ADD sp,sp,#0x1c +000050 bdf0 POP {r4-r7,pc} + |L24.82| +000052 463b MOV r3,r7 ;442 +000054 9400 STR r4,[sp,#0] ;442 +000056 4629 MOV r1,r5 ;442 +000058 4630 MOV r0,r6 ;442 +00005a 9a01 LDR r2,[sp,#4] ;442 +00005c f7fffffe BL hal_pwm_out_sync_all +000060 e7f5 B |L24.78| +;;;445 + ENDP + +000062 0000 DCW 0x0000 + |L24.100| + DCD 0x000f4240 + + AREA ||.constdata||, DATA, READONLY, ALIGN=2 + + g_cus_rx_dcs_execute_table + DCD 0x00000029 + DCD ap_set_display_on +000008 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000028 + DCD ap_set_display_off +000014 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000051 + DCD ap_set_backlight +000020 00000000 DCB 0x00,0x00,0x00,0x00 + DCD 0x000000b1 + DCD ap_set_backlight_B1 +00002c 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000060 + DCD ap_update_frame_rate +000038 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000010 + DCD ap_set_enter_sleep_mode +000044 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000011 + DCD ap_set_exit_sleep_mode +000050 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000000 + DCD 0x00000000 +00005c 00000000 DCB 0x00,0x00,0x00,0x00 + panel_init_code +000060 390006f0 DCB 0x39,0x00,0x06,0xf0 +000064 55aa5208 DCB 0x55,0xaa,0x52,0x08 +000068 00390009 DCB 0x00,0x39,0x00,0x09 +00006c ba027900 DCB 0xba,0x02,0x79,0x00 +000070 14039c00 DCB 0x14,0x03,0x9c,0x00 +000074 01390002 DCB 0x01,0x39,0x00,0x02 +000078 6f083900 DCB 0x6f,0x08,0x39,0x00 +00007c 09ba01af DCB 0x09,0xba,0x01,0xaf +000080 0014001c DCB 0x00,0x14,0x00,0x1c +000084 00003900 DCB 0x00,0x00,0x39,0x00 +000088 026f1039 DCB 0x02,0x6f,0x10,0x39 +00008c 0008ba01 DCB 0x00,0x08,0xba,0x01 +000090 66001400 DCB 0x66,0x00,0x14,0x00 +000094 1c003900 DCB 0x1c,0x00,0x39,0x00 +000098 09bb0279 DCB 0x09,0xbb,0x02,0x79 +00009c 0014039c DCB 0x00,0x14,0x03,0x9c +0000a0 00213900 DCB 0x00,0x21,0x39,0x00 +0000a4 02b58439 DCB 0x02,0xb5,0x84,0x39 +0000a8 00026f06 DCB 0x00,0x02,0x6f,0x06 +0000ac 390004b5 DCB 0x39,0x00,0x04,0xb5 +0000b0 2b0c3339 DCB 0x2b,0x0c,0x33,0x39 +0000b4 00026f0b DCB 0x00,0x02,0x6f,0x0b +0000b8 390004b5 DCB 0x39,0x00,0x04,0xb5 +0000bc 2b233339 DCB 0x2b,0x23,0x33,0x39 +0000c0 00026f10 DCB 0x00,0x02,0x6f,0x10 +0000c4 390006b5 DCB 0x39,0x00,0x06,0xb5 +0000c8 0c0c0c0c DCB 0x0c,0x0c,0x0c,0x0c +0000cc 0c390002 DCB 0x0c,0x39,0x00,0x02 +0000d0 6f013900 DCB 0x6f,0x01,0x39,0x00 +0000d4 02b61939 DCB 0x02,0xb6,0x19,0x39 +0000d8 0013b799 DCB 0x00,0x13,0xb7,0x99 +0000dc 99999999 DCB 0x99,0x99,0x99,0x99 +0000e0 99876543 DCB 0x99,0x87,0x65,0x43 +0000e4 32100000 DCB 0x32,0x10,0x00,0x00 +0000e8 00000000 DCB 0x00,0x00,0x00,0x00 +0000ec 00390002 DCB 0x00,0x39,0x00,0x02 +0000f0 6f133900 DCB 0x6f,0x13,0x39,0x00 +0000f4 0db70000 DCB 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0x39,0x00,0x05,0x2b +002738 0000095f DCB 0x00,0x00,0x09,0x5f +00273c 3900022f DCB 0x39,0x00,0x02,0x2f +002740 01390006 DCB 0x01,0x39,0x00,0x06 +002744 f055aa52 DCB 0xf0,0x55,0xaa,0x52 +002748 08073900 DCB 0x08,0x07,0x39,0x00 +00274c 0fc00101 DCB 0x0f,0xc0,0x01,0x01 +002750 00005500 DCB 0x00,0x00,0x55,0x00 +002754 00000000 DCB 0x00,0x00,0x00,0x00 +002758 00000000 DCB 0x00,0x00,0x00,0x00 +00275c 3900026f DCB 0x39,0x00,0x02,0x6f +002760 00390016 DCB 0x00,0x39,0x00,0x16 +002764 c921002a DCB 0xc9,0x21,0x00,0x2a +002768 402a4000 DCB 0x40,0x2a,0x40,0x00 +00276c 003fddac DCB 0x00,0x3f,0xdd,0xac +002770 003fddac DCB 0x00,0x3f,0xdd,0xac +002774 008006f9 DCB 0x00,0x80,0x06,0xf9 +002778 10003900 DCB 0x10,0x00,0x39,0x00 +00277c 026f1539 DCB 0x02,0x6f,0x15,0x39 +002780 0010c961 DCB 0x00,0x10,0xc9,0x61 +002784 b4b0721c DCB 0xb4,0xb0,0x72,0x1c +002788 1833e02a DCB 0x18,0x33,0xe0,0x2a +00278c 400f9898 DCB 0x40,0x0f,0x98,0x98 +002790 00003900 DCB 0x00,0x00,0x39,0x00 +002794 026f2439 DCB 0x02,0x6f,0x24,0x39 +002798 0008c900 DCB 0x00,0x08,0xc9,0x00 +00279c 00000000 DCB 0x00,0x00,0x00,0x00 +0027a0 00003900 DCB 0x00,0x00,0x39,0x00 +0027a4 026f0039 DCB 0x02,0x6f,0x00,0x39 +0027a8 0016ca27 DCB 0x00,0x16,0xca,0x27 +0027ac 002a402a DCB 0x00,0x2a,0x40,0x2a +0027b0 40000000 DCB 0x40,0x00,0x00,0x00 +0027b4 0000003f DCB 0x00,0x00,0x00,0x3f +0027b8 ddac0080 DCB 0xdd,0xac,0x00,0x80 +0027bc 00000000 DCB 0x00,0x00,0x00,0x00 +0027c0 3900026f DCB 0x39,0x00,0x02,0x6f +0027c4 15390010 DCB 0x15,0x39,0x00,0x10 +0027c8 ca621db0 DCB 0xca,0x62,0x1d,0xb0 +0027cc 72851833 DCB 0x72,0x85,0x18,0x33 +0027d0 e0000003 DCB 0xe0,0x00,0x00,0x03 +0027d4 68980000 DCB 0x68,0x98,0x00,0x00 +0027d8 3900026f DCB 0x39,0x00,0x02,0x6f +0027dc 24390008 DCB 0x24,0x39,0x00,0x08 +0027e0 ca000000 DCB 0xca,0x00,0x00,0x00 +0027e4 00000000 DCB 0x00,0x00,0x00,0x00 +0027e8 3900026f DCB 0x39,0x00,0x02,0x6f +0027ec 00390016 DCB 0x00,0x39,0x00,0x16 +0027f0 cb2d002a DCB 0xcb,0x2d,0x00,0x2a +0027f4 402a4000 DCB 0x40,0x2a,0x40,0x00 +0027f8 003fddac DCB 0x00,0x3f,0xdd,0xac +0027fc 00800000 DCB 0x00,0x80,0x00,0x00 +002800 00000000 DCB 0x00,0x00,0x00,0x00 +002804 00003900 DCB 0x00,0x00,0x39,0x00 +002808 026f1539 DCB 0x02,0x6f,0x15,0x39 +00280c 0010cb71 DCB 0x00,0x10,0xcb,0x71 +002810 b419721c DCB 0xb4,0x19,0x72,0x1c +002814 81339000 DCB 0x81,0x33,0x90,0x00 +002818 000c9868 DCB 0x00,0x0c,0x98,0x68 +00281c 00003900 DCB 0x00,0x00,0x39,0x00 +002820 026f2439 DCB 0x02,0x6f,0x24,0x39 +002824 0008cb00 DCB 0x00,0x08,0xcb,0x00 +002828 00000000 DCB 0x00,0x00,0x00,0x00 +00282c 00003900 DCB 0x00,0x00,0x39,0x00 +002830 026f0039 DCB 0x02,0x6f,0x00,0x39 +002834 0016cc2b DCB 0x00,0x16,0xcc,0x2b +002838 002a402a DCB 0x00,0x2a,0x40,0x2a +00283c 40000000 DCB 0x40,0x00,0x00,0x00 +002840 00000080 DCB 0x00,0x00,0x00,0x80 +002844 0000007f DCB 0x00,0x00,0x00,0x7f +002848 f906f000 DCB 0xf9,0x06,0xf0,0x00 +00284c 3900026f DCB 0x39,0x00,0x02,0x6f +002850 15390010 DCB 0x15,0x39,0x00,0x10 +002854 cc721d19 DCB 0xcc,0x72,0x1d,0x19 +002858 72858133 DCB 0x72,0x85,0x81,0x33 +00285c 9fd5c000 DCB 0x9f,0xd5,0xc0,0x00 +002860 68680000 DCB 0x68,0x68,0x00,0x00 +002864 3900026f DCB 0x39,0x00,0x02,0x6f +002868 24390008 DCB 0x24,0x39,0x00,0x08 +00286c cc000000 DCB 0xcc,0x00,0x00,0x00 +002870 00000000 DCB 0x00,0x00,0x00,0x00 +002874 390006f0 DCB 0x39,0x00,0x06,0xf0 +002878 55aa5208 DCB 0x55,0xaa,0x52,0x08 +00287c 02390002 DCB 0x02,0x39,0x00,0x02 +002880 6f083900 DCB 0x6f,0x08,0x39,0x00 +002884 03d00be4 DCB 0x03,0xd0,0x0b,0xe4 +002888 3900026f DCB 0x39,0x00,0x02,0x6f +00288c 0a390003 DCB 0x0a,0x39,0x00,0x03 +002890 d00a6039 DCB 0xd0,0x0a,0x60,0x39 +002894 00026f0c DCB 0x00,0x02,0x6f,0x0c +002898 390003d0 DCB 0x39,0x00,0x03,0xd0 +00289c 0c303900 DCB 0x0c,0x30,0x39,0x00 +0028a0 02d14139 DCB 0x02,0xd1,0x41,0x39 +0028a4 00026f01 DCB 0x00,0x02,0x6f,0x01 +0028a8 390002d1 DCB 0x39,0x00,0x02,0xd1 +0028ac 00390002 DCB 0x00,0x39,0x00,0x02 +0028b0 6f023900 DCB 0x6f,0x02,0x39,0x00 +0028b4 02d10039 DCB 0x02,0xd1,0x00,0x39 +0028b8 00026f03 DCB 0x00,0x02,0x6f,0x03 +0028bc 390005d1 DCB 0x39,0x00,0x05,0xd1 +0028c0 021e0719 DCB 0x02,0x1e,0x07,0x19 +0028c4 3900026f DCB 0x39,0x00,0x02,0x6f +0028c8 07390005 DCB 0x07,0x39,0x00,0x05 +0028cc d101b006 DCB 0xd1,0x01,0xb0,0x06 +0028d0 ac390002 DCB 0xac,0x39,0x00,0x02 +0028d4 6f0b3900 DCB 0x6f,0x0b,0x39,0x00 +0028d8 05d10288 DCB 0x05,0xd1,0x02,0x88 +0028dc 0f843900 DCB 0x0f,0x84,0x39,0x00 +0028e0 026f0f39 DCB 0x02,0x6f,0x0f,0x39 +0028e4 0007d13f DCB 0x00,0x07,0xd1,0x3f +0028e8 ff200030 DCB 0xff,0x20,0x00,0x30 +0028ec 00390006 DCB 0x00,0x39,0x00,0x06 +0028f0 f055aa52 DCB 0xf0,0x55,0xaa,0x52 +0028f4 08003900 DCB 0x08,0x00,0x39,0x00 +0028f8 026f1739 DCB 0x02,0x6f,0x17,0x39 +0028fc 0003b207 DCB 0x00,0x03,0xb2,0x07 +002900 ff390002 DCB 0xff,0x39,0x00,0x02 +002904 6f1f3900 DCB 0x6f,0x1f,0x39,0x00 +002908 03b20050 DCB 0x03,0xb2,0x00,0x50 +00290c 39000288 DCB 0x39,0x00,0x02,0x88 +002910 01390002 DCB 0x01,0x39,0x00,0x02 +002914 6f013900 DCB 0x6f,0x01,0x39,0x00 +002918 0588021d DCB 0x05,0x88,0x02,0x1d +00291c 07193900 DCB 0x07,0x19,0x39,0x00 +002920 06f055aa DCB 0x06,0xf0,0x55,0xaa +002924 52080039 DCB 0x52,0x08,0x00,0x39 +002928 0002c077 DCB 0x00,0x02,0xc0,0x77 +00292c 11000089 DCB 0x11,0x00,0x00,0x89 +002930 30800c30 DCB 0x30,0x80,0x0c,0x30 +002934 05a00034 DCB 0x05,0xa0,0x00,0x34 +002938 02d002d0 DCB 0x02,0xd0,0x02,0xd0 +00293c 02000268 DCB 0x02,0x00,0x02,0x68 +002940 002005c6 DCB 0x00,0x20,0x05,0xc6 +002944 000a000c DCB 0x00,0x0a,0x00,0x0c +002948 01e20178 DCB 0x01,0xe2,0x01,0x78 +00294c 180010f0 DCB 0x18,0x00,0x10,0xf0 +002950 030c2000 DCB 0x03,0x0c,0x20,0x00 +002954 060b0b33 DCB 0x06,0x0b,0x0b,0x33 +002958 0e1c2a38 DCB 0x0e,0x1c,0x2a,0x38 +00295c 46546269 DCB 0x46,0x54,0x62,0x69 +002960 7077797b DCB 0x70,0x77,0x79,0x7b +002964 7d7e0102 DCB 0x7d,0x7e,0x01,0x02 +002968 01000940 DCB 0x01,0x00,0x09,0x40 +00296c 09be19fc DCB 0x09,0xbe,0x19,0xfc +002970 19fa19f8 DCB 0x19,0xfa,0x19,0xf8 +002974 1a381a78 DCB 0x1a,0x38,0x1a,0x78 +002978 1ab62af6 DCB 0x1a,0xb6,0x2a,0xf6 +00297c 2b342b74 DCB 0x2b,0x34,0x2b,0x74 +002980 3b746bf4 DCB 0x3b,0x74,0x6b,0xf4 +002984 00000000 DCB 0x00,0x00,0x00,0x00 +002988 00000000 DCB 0x00,0x00,0x00,0x00 +00298c 00000000 DCB 0x00,0x00,0x00,0x00 +002990 00000000 DCB 0x00,0x00,0x00,0x00 +002994 00000000 DCB 0x00,0x00,0x00,0x00 +002998 00000000 DCB 0x00,0x00,0x00,0x00 +00299c 00000000 DCB 0x00,0x00,0x00,0x00 +0029a0 00000000 DCB 0x00,0x00,0x00,0x00 +0029a4 00000000 DCB 0x00,0x00,0x00,0x00 +0029a8 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||.data||, DATA, ALIGN=2 + + send_29_flag +000000 00 DCB 0x00 + start_display_on +000001 01 DCB 0x01 + g_exit_sleep_mode +000002 00 DCB 0x00 + g_need_enter_sleep_mode +000003 00 DCB 0x00 + panel_display_done +000004 00 DCB 0x00 + g_resolution_change +000005 00 DCB 0x00 + phone_DisplayOFF_flag +000006 00 DCB 0x00 + g_mipi_path_off +000007 00 DCB 0x00 + value_blue +000008 00 DCB 0x00 + blue_flag +000009 00 DCB 0x00 + frame_rate +00000a 00 DCB 0x00 + tp_sleep_in +00000b 00 DCB 0x00 + tp_sleep_count +00000c 0000 DCB 0x00,0x00 + phone_DisplayOFF_count +00000e 0000 DCW 0x0000 + read_bl_data_bak +000010 0000 DCW 0x0000 + value_reg_ca +000012 0000 DCW 0x0000 + rd_51_value +000014 0000 DCW 0x0000 +000016 0000 DCB 0x00,0x00 + g_rx_ctrl_handle + DCD 0x00000000 + g_tx_ctrl_handle + DCD 0x00000000 + value_reg_df + DCD 0x00000000 + pps_fhd +000024 11000089 DCB 0x11,0x00,0x00,0x89 +000028 30800924 DCB 0x30,0x80,0x09,0x24 +00002c 0438004e DCB 0x04,0x38,0x00,0x4e +000030 021c021c DCB 0x02,0x1c,0x02,0x1c +000034 0200020e DCB 0x02,0x00,0x02,0x0e +000038 00200793 DCB 0x00,0x20,0x07,0x93 +00003c 0007000c DCB 0x00,0x07,0x00,0x0c +000040 0140014e DCB 0x01,0x40,0x01,0x4e +000044 180010f0 DCB 0x18,0x00,0x10,0xf0 +000048 030c2000 DCB 0x03,0x0c,0x20,0x00 +00004c 060b0b33 DCB 0x06,0x0b,0x0b,0x33 +000050 0e1c2a38 DCB 0x0e,0x1c,0x2a,0x38 +000054 46546269 DCB 0x46,0x54,0x62,0x69 +000058 7077797b DCB 0x70,0x77,0x79,0x7b +00005c 7d7e0102 DCB 0x7d,0x7e,0x01,0x02 +000060 01000940 DCB 0x01,0x00,0x09,0x40 +000064 09be19fc DCB 0x09,0xbe,0x19,0xfc +000068 19fa19f8 DCB 0x19,0xfa,0x19,0xf8 +00006c 1a381a78 DCB 0x1a,0x38,0x1a,0x78 +000070 1ab62af6 DCB 0x1a,0xb6,0x2a,0xf6 +000074 2b342b74 DCB 0x2b,0x34,0x2b,0x74 +000078 3b746bf4 DCB 0x3b,0x74,0x6b,0xf4 +00007c 00000000 DCB 0x00,0x00,0x00,0x00 +000080 00000000 DCB 0x00,0x00,0x00,0x00 +000084 00000000 DCB 0x00,0x00,0x00,0x00 +000088 00000000 DCB 0x00,0x00,0x00,0x00 +00008c 00000000 DCB 0x00,0x00,0x00,0x00 +000090 00000000 DCB 0x00,0x00,0x00,0x00 +000094 00000000 DCB 0x00,0x00,0x00,0x00 +000098 00000000 DCB 0x00,0x00,0x00,0x00 +00009c 00000000 DCB 0x00,0x00,0x00,0x00 +0000a0 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.29||, DATA, ALIGN=0 + + EXPORTAS ||area_number.29||, ||.data|| + phone_start_flag +000000 00 DCB 0x00 + + AREA ||area_number.30||, DATA, ALIGN=1 + + EXPORTAS ||area_number.30||, ||.data|| + phone_tempcount +000000 0000 DCW 0x0000 + + AREA ||area_number.31||, DATA, ALIGN=1 + + EXPORTAS ||area_number.31||, ||.data|| + flag_test_count +000000 0000 DCW 0x0000 + + AREA ||area_number.32||, DATA, ALIGN=2 + + EXPORTAS ||area_number.32||, ||.data|| + s_heartbeat + DCD 0x00000000 + + AREA ||area_number.33||, DATA, ALIGN=1 + + EXPORTAS ||area_number.33||, ||.data|| + value_reg_b1 +000000 0000 DCW 0x0000 + + AREA ||area_number.34||, DATA, ALIGN=1 + + EXPORTAS ||area_number.34||, ||.data|| + value_reg_ca_bak +000000 0000 DCW 0x0000 + + AREA ||area_number.35||, DATA, ALIGN=1 + + EXPORTAS ||area_number.35||, ||.data|| + value_reg_b1_bak +000000 0000 DCW 0x0000 + + AREA ||area_number.36||, DATA, ALIGN=0 + + EXPORTAS ||area_number.36||, ||.data|| + Flag_blacklight_EN +000000 00 DCB 0x00 + + AREA ||i.__ARM_common_switch8||, COMGROUP=__ARM_common_switch8, CODE, READONLY, ALIGN=1 + + __ARM_common_switch8 PROC +000000 b430 PUSH {r4,r5} +000002 4674 MOV r4,lr +000004 1e64 SUBS r4,r4,#1 +000006 7825 LDRB r5,[r4,#0] +000008 1c64 ADDS r4,r4,#1 +00000a 42ab CMP r3,r5 +00000c d200 BCS |L147.16| +00000e 461d MOV r5,r3 + |L147.16| +000010 5d63 LDRB r3,[r4,r5] +000012 005b LSLS r3,r3,#1 +000014 18e3 ADDS r3,r4,r3 +000016 bc30 POP {r4,r5} +000018 4718 BX r3 + ENDP + + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\ap_demo\\ap_demo.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___9_ap_demo_c_c64640cd____REV16| +#line 467 "C:\\Users\\Markin\\AppData\\Local\\Arm\\Packs\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___9_ap_demo_c_c64640cd____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___9_ap_demo_c_c64640cd____REVSH| +#line 482 +|__asm___9_ap_demo_c_c64640cd____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/ISP_568/Listings/board.txt b/project/ISP_568/Listings/board.txt new file mode 100644 index 0000000..3288462 --- /dev/null +++ b/project/ISP_568/Listings/board.txt @@ -0,0 +1,63 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\board.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\board.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\ap_demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL568 -I.\RTE\_ISP_568 -IC:\Users\Markin\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Users\Markin\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_568 --omf_browse=.\objects\board.crf ..\..\src\board\board.c] + THUMB + + AREA ||i.board_Init||, CODE, READONLY, ALIGN=2 + + board_Init PROC +;;;13 +;;;14 void board_Init(void) +000000 b510 PUSH {r4,lr} +;;;15 { +;;;16 hal_system_init(SYSTEM_CLOCK); +000002 4807 LDR r0,|L1.32| +000004 f7fffffe BL hal_system_init +;;;17 hal_system_enable_systick(1); +000008 2001 MOVS r0,#1 +00000a f7fffffe BL hal_system_enable_systick +;;;18 #if !EDA_MODE +;;;19 hal_system_init_console(115200); +00000e 20e1 MOVS r0,#0xe1 +000010 0240 LSLS r0,r0,#9 +000012 f7fffffe BL hal_system_init_console +;;;20 #endif +;;;21 #if defined(ISP_568) || defined(ISP_368) +;;;22 /* 从EFUSE读取DPHY校准值并设置 */ +;;;23 hal_system_set_phy_calibration(true); +000016 2001 MOVS r0,#1 +000018 f7fffffe BL hal_system_set_phy_calibration +;;;24 #endif +;;;25 } +00001c bd10 POP {r4,pc} +;;;26 + ENDP + +00001e 0000 DCW 0x0000 + |L1.32| + DCD 0x04c4b400 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\board\\board.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___7_board_c_bcd01269____REV16| +#line 467 "C:\\Users\\Markin\\AppData\\Local\\Arm\\Packs\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___7_board_c_bcd01269____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___7_board_c_bcd01269____REVSH| +#line 482 +|__asm___7_board_c_bcd01269____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/ISP_568/Listings/main.txt b/project/ISP_568/Listings/main.txt new file mode 100644 index 0000000..2dfdc58 --- /dev/null +++ b/project/ISP_568/Listings/main.txt @@ -0,0 +1,92 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\main.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\main.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\ap_demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL568 -I.\RTE\_ISP_568 -IC:\Users\Markin\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Users\Markin\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_568 --omf_browse=.\objects\main.crf ..\..\src\app\main.c] + THUMB + + AREA ||i.main||, CODE, READONLY, ALIGN=1 + + main PROC +;;;8 +;;;9 int main() +000000 f7fffffe BL board_Init +;;;10 { +;;;11 board_Init(); +;;;12 +;;;13 while (1) +;;;14 { +;;;15 #if _DEMO_DSI_TX_EN +;;;16 demo_dsi_tx_case(); +;;;17 #endif +;;;18 #if _DEMO_DSI_RX_EN +;;;19 demo_hal_dsi_rx_case(); +;;;20 #endif +;;;21 #if _DEMO_TIMER_EN +;;;22 demo_timer_case(); +;;;23 #endif +;;;24 #if _DEMO_WDG_EN +;;;25 demo_wdg_case(); +;;;26 #endif +;;;27 #if _DEMO_GPIO_EN +;;;28 demo_gpio_case(); +;;;29 #endif +;;;30 #if _DEMO_PWM_EN +;;;31 demo_pwm_case(); +;;;32 #endif +;;;33 #if _DEMO_SWIRE_EN +;;;34 demo_swire_case(); +;;;35 #endif +;;;36 +;;;37 #if _DEMO_I2C_EN +;;;38 demo_hal_spi(); +;;;39 #endif +;;;40 +;;;41 #if _DEMO_SPI_EN +;;;42 demo_hal_i2c(); +;;;43 #endif +;;;44 +;;;45 #if _DEMO_S8_EN +;;;46 s8_demo(); +;;;47 #endif +;;;48 +;;;49 #if _DEMO_S8P_EN +;;;50 s8p_demo(); +;;;51 #endif +;;;52 +;;;53 #if _DEMO_S9_EN +;;;54 ap_demo(); +000004 f7fffffe BL ap_demo + |L1.8| +;;;55 #endif +;;;56 while (1); +000008 e7fe B |L1.8| +;;;57 } +;;;58 } + ENDP + + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\main.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___6_main_c_main____REV16| +#line 467 "C:\\Users\\Markin\\AppData\\Local\\Arm\\Packs\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___6_main_c_main____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___6_main_c_main____REVSH| +#line 482 +|__asm___6_main_c_main____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** + + __ARM_use_no_argv EQU 0 diff --git a/project/ISP_568/Objects/ISP_568_Pixel7Pro.bin b/project/ISP_568/Objects/ISP_568_Pixel7Pro.bin new file mode 100644 index 0000000..359d04b Binary files /dev/null and b/project/ISP_568/Objects/ISP_568_Pixel7Pro.bin differ diff --git a/project/ISP_568/RTE/_ISP_568/RTE_Components.h b/project/ISP_568/RTE/_ISP_568/RTE_Components.h new file mode 100644 index 0000000..e317663 --- /dev/null +++ b/project/ISP_568/RTE/_ISP_568/RTE_Components.h @@ -0,0 +1,21 @@ + +/* + * Auto generated Run-Time-Environment Configuration File + * *** Do not modify ! *** + * + * Project: 'ISP_568' + * Target: 'ISP_568' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "ARMCM0.h" + + + +#endif /* RTE_COMPONENTS_H */ diff --git a/src/app/ap_demo/ISP_568_TP.lib b/src/app/ap_demo/ISP_568_TP.lib new file mode 100644 index 0000000..1273a70 Binary files /dev/null and b/src/app/ap_demo/ISP_568_TP.lib differ diff --git a/src/app/ap_demo/ap_demo.c b/src/app/ap_demo/ap_demo.c new file mode 100644 index 0000000..c7700a5 --- /dev/null +++ b/src/app/ap_demo/ap_demo.c @@ -0,0 +1,2425 @@ +/******************************************************************************* +* +* File: S20_demo.c +* Description: ϵͳļ +* Version: V0.1 +* Date: 2020-02-22 +* Author: Tempest + *******************************************************************************/ + +#include "ap_demo.h" +#include "ArmCM0.h" +#include "tau_device_datatype.h" +#include "tau_log.h" +#include "tau_operations.h" +#include "tau_common.h" +#include "tau_delay.h" +#include "hal_dsi_rx_ctrl.h" +#include "hal_dsi_tx_ctrl.h" +#include "hal_swire.h" +#include "hal_timer.h" +#include "hal_system.h" +#include "hal_gpio.h" +#include "hal_pwm.h" + + +#include "app_tp_transfer.h" +#ifdef LOG_TAG +#undef LOG_TAG +#endif +#define LOG_TAG "Pixel7_pro_demo" + +/*****************************************/ + +//S8 MIPIϢ +/* ֱ */ +#define INPUT_WIDTH 1440 +#define INPUT_HEIGHT 3120 +/* MIPI lane rate,video modeҪȷãcmd mode */ +#define INPUT_MIPI_LANE_RATE 1500000000 //1250000000//1500000000 +/* ͼʽ */ +#define INPUT_COLOR_MODE DSI_RGB888 +/* ݸʽ(DSI_DATA_CMD_MODE , DSI_DATA_VIDEO_MODE) */ +#define INPUT_DATA_MODE DSI_DATA_CMD_MODE +/* mipi lane(DSI_RX_LANE_x xΪ1-4) */ +#define INPUT_MIPI_LANE_NUM DSI_LANE_4 +/* Ϊvideo mode ʱݸʽ */ +#define INPUT_VIDEO_MODEL DSI_NONBURST_EVENT +/* ͨ(0-3) */ +#define INPUT_VC DSI_VC_0 +/* ֡(60/90/120/144Hz) */ +#define INPUT_FRAME_RATE DSI_FRAME_RATE_120HZ +/* ǷDSCѹ */ +#define INPUT_COMPRESS true +#define OUTPUT_FRAME_RATE 60//60* + +#if AMOLED_NT37701_CSOT667 + +/* ֱ */ +#define OUTPUT_WIDTH 1080 +#define OUTPUT_HEIGHT 2400 +/* ͨ(0-3) */ +#define OUTPUT_VC DSI_VC_0 +/* mipi lane(DSI_RX_LANE_x xΪ1-4) */ +#define OUTPUT_LANE_NUMBER DSI_LANE_4 +/* Ϊvideo mode ݸʽ */ +#define OUTPUT_VIDEO_MODEL DSI_BURST_MODE +#if 0 +/* VSA */ +#define OUTPUT_VSA 2 +/* VBP */ +#define OUTPUT_VBP 58//64 +/* VBP */ +#define OUTPUT_VFP 62 +/* VSA */ +#define OUTPUT_HSA 4 +/* HBP */ +#define OUTPUT_HBP 16 +/* HFP */ +#define OUTPUT_HFP 18 +#else +#define OUTPUT_VSA 12//8//4 +/* VBP */ +#define OUTPUT_VBP 8 +/* VBP */ +#define OUTPUT_VFP 56//72 +/* VSA */ +#define OUTPUT_HSA 8 +/* HBP */ +#define OUTPUT_HBP 12//92 +/* HFP */ +#define OUTPUT_HFP 120//100 +/* ʼģʽ */ +#endif +#define _CMD_TYPE DSI_CMD_TX_LP //0-HS,1-LP; +#endif + +#define SWIRE_TIMER TIMER_NUM1 +#define TE_TIMER TIMER_NUM2 +#ifdef USE_FOR_SUMSUNG_S20 +#define ENABLE_TP_WAKE_UP true +#define SWIRE_MAX_NUM 24 +#else +#define SWIRE_MAX_NUM 40 +#endif + +#define ADD_TP_CALIBRATION 0//1 +#define AUTO_CAL_TP 0 +#define RUN_TEST 0 + +#if ADD_TP_CALIBRATION +static volatile bool g_calibration_flag = false; +#endif + +#ifdef RUN_TEST +static __attribute__((unused)) uint8_t g_run_test_cnt = 0; //leo +#endif + +#if AUTO_CAL_TP +static uint16_t g_cal_cnt = 300; //3sʱTPУ׼ +#endif + +static __attribute__((unused)) uint8_t send_29_flag = 0; // ʼ29ָȡ1⡣ +#if ENABLE_TP_WAKE_UP +#define POWER_IO_A IO_PAD_TD_LEDPWM //C2 IO_PWRCTRL /* ӦIOҪ */ +#define POWER_IO_B IO_PAD_TD_SPIM_MISO /* ӦIOҪ */ +#endif +//#define DISPLAY_ONLY +#define CUS_SCLD_FILTER true +#define NEW_ACK_CMD_FUNC true + +/******************************************************/ +static hal_dsi_rx_ctrl_handle_t *g_rx_ctrl_handle = NULL; +static hal_dsi_tx_ctrl_handle_t *g_tx_ctrl_handle = NULL; + +#ifdef USE_FOR_SUMSUNG_S20 +//S20 SWIRE=50->ELVSS=-1.7V +#define SWIRE_DEFAULT_NUM 50 +#else +#define SWIRE_DEFAULT_NUM 38 +#endif + +#define SYNC_LIN_NUMBER 3020//3120 2720 +#define TX_LINE_DELAY 1400//2200 + +static uint8_t swire_num = SWIRE_DEFAULT_NUM; +static __attribute__((unused)) uint8_t swire_num_bak = SWIRE_DEFAULT_NUM; + +/* Ĭfalse,ʼ־λ,ʹTP1.8V,AC ʼҪTP1.8Vе */ +static volatile bool start_display_on = true; +static __attribute__((unused)) bool g_exit_sleep_mode = false; + +#if ENABLE_TP_WAKE_UP +static bool g_need_enter_sleep_mode = false; +#endif + +/* ʼɱ־λ */ +static __attribute__((unused)) bool panel_display_done = false; +//static bool g_panel_init_done = false; +static volatile bool g_resolution_change = false; +static void swire_init(void); +void Gpio_swire_output(uint8_t flag, uint8_t num); + +#ifdef USE_FOR_Google_Pixel6pro +uint8_t Flag_blacklight_EN;//extern +uint8_t tp_sleep_in;//extern +uint8_t tp_sleep_count;//extern +uint8_t phone_start_flag = 0; +uint16_t phone_DisplayOFF_count = 0; +uint8_t phone_DisplayOFF_flag = 0; +uint16_t phone_tempcount = 0; +uint16_t flag_test_count = 0; +static bool g_mipi_path_off = false; +#endif + +uint32_t s_heartbeat = 0; + +#if ENABLE_TP_WAKE_UP + +static void ap_reset_cb(void *data) +{ + /* лԴ */ + // hal_gpio_set_output_data_ex(POWER_IO_B, IO_LVL_HIGH, POWER_IO_A, IO_LVL_LOW); + hal_gpio_set_output_data(POWER_IO_A, IO_LVL_LOW);// + /* VCC */ + TAU_LOGD("disable reset!!!!!!!!!!!!!!!!!!!!!!!!!!"); + hal_system_set_pvd(true); + hal_system_set_vcc(true); + NVIC_SystemReset(); +} +#endif + + + +static bool ap_dcs_read(uint8_t data_type, uint8_t dcs_cmd, uint8_t param) +{ + if (dcs_cmd == 0x04) + { + phone_DisplayOFF_flag = 1; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0x0A, 0x68, 0x07); + } + else if (dcs_cmd == 0xa1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 13, 0x0C, 0x21, 0x0C, 0xC6, 0x01, 0xF3, 0xAA, 0x11, 0x06, 0x2B, 0x25, 0x21, 0xF6); + } + else if (dcs_cmd == 0xDA) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x0A); + } + else if (dcs_cmd == 0xDB) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x68); + } + else if (dcs_cmd == 0xDC) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x07); + } + else if (dcs_cmd == 0xD6) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 5, 0xF0, 0xEA, 0x85, 0x61, 0x86); + } + else + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0); + TAU_LOGD("r[%x] [%d] err!!!!!!\n", dcs_cmd, return_size); + } + + //TAU_LOGD("r %x\n",dcs_cmd); + return true; +} + + +/* PPS update callback ڷֱлcase */ +static bool pps_update_handle(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height) +{ + /* AVDD ϵ, ڽϢPPS */ +// hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); +// hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) + { + /* PPS Update ҷֱʷ仯 */ + g_rx_ctrl_handle->base_info.src_w = pic_width; + g_rx_ctrl_handle->base_info.src_h = pic_height; + /* עⲿֻPPSǰ Compression Mode Command */ + g_rx_ctrl_handle->compress_en = true; + + g_resolution_change = true; + if(pic_width > 720) + { + g_tx_ctrl_handle->base_info.src_w = pic_width; + g_tx_ctrl_handle->base_info.src_h = pic_height; + } + hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); + } +// hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); + // TAU_LOGD("PPS Update\n"); + return true; +} + +static bool ap_update_frame_rate(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + static uint8_t frame_rate = 0; //ÿλʱĻʾ60hzǶȡframe_rateȴ + //TAU_LOGD("frame_rate:[%02X], %d", dcs_packet->packet_param[0], dcs_packet->param_length); + if (frame_rate != dcs_packet->packet_param[0]) + { + frame_rate = dcs_packet->packet_param[0]; + if (frame_rate == 0x00) //120hz + { + + hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_SOFT_120HZ_MODE); +// hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_HW_MODE); + TAU_LOGD("120HZ\n"); + } + else + { + //hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_SOFT_60HZ_MODE); + hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_HW_MODE); + TAU_LOGD("60HZ\n"); + + } + //TAU_LOGD("frame_rate:%x",frame_rate); + } + return true; +} + + + uint8_t pps_fhd[128] = {0x11,0x00,0x00,0x89,0x30,0x80,0x09,0x24,0x04,0x38,0x00,0x4E,0x02,0x1C,0x02,0x1C, + 0x02,0x00,0x02,0x0E,0x00,0x20,0x07,0x93,0x00,0x07,0x00,0x0C,0x01,0x40,0x01,0x4E, + 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, + 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, + 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, + 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x6B,0xF4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; + + +static bool ap_set_display_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + TAU_LOGD("disp on"); + if(g_resolution_change) + { + hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps_fhd, 128); + hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); + g_resolution_change = false; + TAU_LOGD("pps_update_1\r\n"); + } + delayMs(5); + if (start_display_on == false){ + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x29); + } +// g_set_display_on = true; + return true; +} + +static bool ap_set_display_off(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x28); + TAU_LOGD("disp off"); + return true; +} + + +static bool ap_set_enter_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + send_29_flag = 0; + + hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + delayMs(10); + Gpio_swire_output(0, 0); + delayMs(10); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x10); + delayMs(20); + hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_LOW); + + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW);//Reaet + + TAU_LOGD("enter sleep mode"); +#if ENABLE_TP_WAKE_UP + g_need_enter_sleep_mode = true; +#endif + g_exit_sleep_mode = false; + + return true; +} + +static bool ap_set_exit_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + TAU_LOGD("exit sleep mode"); + g_exit_sleep_mode = true; + /* AVDD ϵ, ڽϢPPS */ +// hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); + return true; +} + +#ifdef ADD_PWM_OUTPUT_FOR_BL +/***************************************************************************** +*GPIOswire +*flag: =0, SWIRE=0; =1,SWIREź; =2, øٷSWIREź +*num: +*עFLAG=1ʱGPIOʼ!!!!!! +*****************************************************************************/ +void Gpio_swire_output(uint8_t flag, uint8_t num) +{ + uint8_t ii; + + if (flag) + { + if (flag == 2) + { + hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_HIGH); + delayMs(2); + } + for (ii = 0; ii < num; ii++) + { + hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_LOW); + delayUs(10); + hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); + delayUs(9); + } + } + else + { + hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW); + } +} + + +/***************************************************************************** +* @brief pwmԿƱ +* @param init: ǷΪʼһαѡʼ +* @param polarity: ԣfalse:ȸߺͣtrue:ȵͺ +* @param duty_ratio: ռձ(0-100) +* @param frequency: ƵʣλHZ +* @retval null +*****************************************************************************/ +static void test_pwm_out_adjust(bool init, bool polarity, uint8_t duty_ratio, uint32_t frequency) +{ + pwm_out_ctrl_e ctl0 = PWMO_CTRL_HIGH; + pwm_out_ctrl_e ctl1 = PWMO_CTRL_LOW; + if (polarity) + { + ctl0 = PWMO_CTRL_LOW; + ctl1 = PWMO_CTRL_HIGH; + } + uint32_t period = 1000000 / frequency; //λus + uint32_t thr0 = 0; + uint32_t thr1 = (period * duty_ratio / 100); + + if (duty_ratio == 100) + { + ctl1 = ctl0; + thr1 = period / 2; + } + if (init) + { + hal_pwm_out_init(); + hal_pwm_out_config_all(ctl0, ctl1, thr0, thr1, period); + } + else + { + hal_pwm_out_sync_all(ctl0, ctl1, thr0, thr1, period); + } +} + +void PWM_OUTPUT_TEST(void) +{ + test_pwm_out_adjust(true, true, 30, 20000); + delayMs(2); + test_pwm_out_adjust(false, false, 40, 10000); +} + +#define PWM_PERIOD 1000 //PWM.λUS +#define PWM_MIN 8 //Сֵɵ +void PWM_init(void)//static +{ + // 1ms ڳʼ͵ƽ1000 + hal_pwm_out_init(); + hal_pwm_out_config_all(PWMO_CTRL_LOW, PWMO_CTRL_HIGH, 0, PWM_PERIOD, PWM_PERIOD); +} + +static __attribute__((unused)) uint16_t read_bl_data = 0; +static __attribute__((unused)) uint16_t read_bl_data_bak = 0; +void PWM_Task(void) +{ + __attribute__((unused)) uint16_t pwm_h; + +#ifdef USE_FOR_Google_Pixel6pro + +#if AMOLED_NT37701_CSOT667 + + // s20: read_bl_data = 1~FD + __attribute__((unused)) uint8_t reg51_val_h = 0; + __attribute__((unused)) uint8_t reg51_val_l = 0; +// if(Flag_blacklight_EN) + { + read_bl_data_bak = 0; + // hal_pwm_out_sync_thr(0, PWM_PERIOD+1); +// hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x3F); //Ϣ·رRX,TXԴ󣬲ٷ + //printf("Flag_blacklight_EN!!!! read_bl_data[%4x] \n", read_bl_data); + return; + } + /* + + if (g_need_enter_sleep_mode) + { + //ΪϨʱ + read_bl_data_bak = 0; + // hal_pwm_out_sync_thr(0, PWM_PERIOD-PWM_MIN); //ΪС + // hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x3F); //Ϣ·رRX,TXԴ󣬲ٷ + // printf("tp_sleep_in!!!! read_bl_data[%4x] \n", read_bl_data); + // return; + } + + if(read_bl_data != read_bl_data_bak) + { + + + #if 0 + #if 1//Բ + if (pwm_h > 700) + pwm_h = 300 + (pwm_h - 700) * 7 / 3; + else + pwm_h = 1 + (pwm_h - 1) * 3 / 7; + #endif + if(pwm_h < PWM_MIN) + pwm_h = PWM_MIN; + + //printf("ok!!!! read_bl_data[%4x],pwm_h[%d] \n", read_bl_data, pwm_h); + + if(pwm_h < PWM_PERIOD) + pwm_h = PWM_PERIOD - pwm_h; + else + pwm_h = 1; + //hal_pwm_out_sync_thr(0, pwm_h); + #endif + + pwm_h = read_bl_data * 16; //NT37701 51 (0~FFF) + + reg51_val_l = ( uint8_t )pwm_h; + reg51_val_h = pwm_h >> 8; + + // hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, reg51_val_h, reg51_val_l); //0FFF//Ϣ·رRX,TXԴ󣬲ٷ + + + read_bl_data_bak = read_bl_data; + } + */ + + +#else +// s20: read_bl_data = 1~FD + + if(Flag_blacklight_EN) + { + read_bl_data_bak = 0; + hal_pwm_out_sync_thr(0, PWM_PERIOD + 1); + //printf("Flag_blacklight_EN!!!! read_bl_data[%4x] \n", read_bl_data); + return; + } + + if (g_need_enter_sleep_mode) + { + //ΪϨʱ + read_bl_data_bak = 0; + hal_pwm_out_sync_thr(0, PWM_PERIOD - PWM_MIN); //ΪС +// printf("tp_sleep_in!!!! read_bl_data[%4x] \n", read_bl_data); + // return; + } + + if(read_bl_data != read_bl_data_bak) + { + pwm_h = PWM_PERIOD * read_bl_data / 0xFF; +#if 1//Բ + if (pwm_h > 700) + pwm_h = 300 + (pwm_h - 700) * 7 / 3; + else + pwm_h = 1 + (pwm_h - 1) * 3 / 7; +#endif + if(pwm_h < PWM_MIN) + pwm_h = PWM_MIN; + + //printf("ok!!!! read_bl_data[%4x],pwm_h[%d] \n", read_bl_data, pwm_h); + + if(pwm_h < PWM_PERIOD) + pwm_h = PWM_PERIOD - pwm_h; + else + pwm_h = 1; + hal_pwm_out_sync_thr(0, pwm_h); + read_bl_data_bak = read_bl_data; + } + +#endif + +#endif + +} +#endif + +/* B1ص g_cus_rx_dcs_execute_table Ϊ첽ִУCAͬ*/ + +uint16_t value_reg_b1 = 0; +uint16_t value_reg_ca = 0; +uint16_t rd_51_value = 0; + +//static uint32_t value_reg_b5 =0; +static uint32_t value_reg_df = 0; +static uint8_t value_blue = 0; +static uint8_t blue_flag = 0; +#if 1 // +#define BLUE_MAX 0xF0 //ֵ +#define BLUE_MIN 0x86 //Сֵ +#define BLUE_STEP 10 //ȼ-1 +#endif + +#if 1//def USE_FOR_SUMSUNG_S20 +static __attribute__((unused)) uint32_t s20_power_on_flag = 0; // >0: Ϊǡʱ +uint16_t value_reg_ca_bak = 0; +uint16_t value_reg_b1_bak = 0; +//#define USE_BL_ADJ6 //֮ǰS20ⷽʽ +#define USE_BL_ADJ7 //ĹS20ⷽʽ +#endif + +#if 1 // +static bool ap_set_backlight(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + uint16_t rd_51_val, rd_51_val2; + + //ֻ0x04~7FF(2043) ӳ䵽0x6e~7FF(1937),ȥмͻһ + rd_51_val = dcs_packet->packet_param[0]; + rd_51_val <<= 8; + rd_51_val |= dcs_packet->packet_param[1]; + rd_51_val2 = (rd_51_val - 0x04) * 1937 / 2043 + 0x6e; + + if (rd_51_val2 < 0x220 && rd_51_val2 > 0x1B3) + { + rd_51_val2 = 0x1B3; + } + + rd_51_value = rd_51_val; + +// TAU_LOGD("51[%04X][%04X]", rd_51_val, rd_51_val2); + + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, rd_51_val2 >> 8, rd_51_val2 & 0x00FF); + + return true; +} +#endif + +bool ap_get_reg_ca(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet)//static +{ + value_reg_ca = (dcs_packet->packet_param[0] << 8) + dcs_packet->packet_param[1]; + //TAU_LOGD("CA[%x]", value_reg_ca); + + return true; +} + +#if 0 +static bool ap_get_reg_b5(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + value_reg_b5 = (dcs_packet->packet_param[3] << 8) + dcs_packet->packet_param[2]; + TAU_LOGD("CA[%4x],B1[%4x],B5[%4x]", value_reg_ca, value_reg_b1, value_reg_b5); + + return true; +} +#endif + +#ifdef ADD_PANEL_DISPLAY_MODE +uint8_t panel_mode = 1; // DFĴ100:ۿ,01:۹,11:3(ӰԺ/Ƭ/.Ŀǰû) +uint16_t panel_r, panel_g, panel_b; // ¼RGBֵ + +#ifdef USE_FOR_SUMSUNG_S9PLUS +#define RATIO_VALUE 2 //Żϵ +#else +#define RATIO_VALUE 2 //Żϵ +#endif + +#endif + +bool ap_get_reg_df(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet)//static +{ +#ifdef ADD_PANEL_DISPLAY_MODE + value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; + panel_mode = dcs_packet->packet_param[0]; + panel_r = dcs_packet->packet_param[49]; + panel_g = dcs_packet->packet_param[51]; + panel_b = dcs_packet->packet_param[53]; +// TAU_LOGD("value_reg_df[%4x],panel_mode[%4x],panel_r[%4x],panel_g[%4x],panel_b[%4x]", value_reg_df,panel_mode,panel_r,panel_g,panel_b); + + if (panel_mode == 00) + { + //ģʽ + +#ifdef USE_FOR_S10_BLUE_MODE + //panel_r =256-RATIO_VALUE*(0xFF-panel_r); + //panel_g =256-RATIO_VALUE*(0xFF-panel_g); + //panel_b =256-RATIO_VALUE*(0xFF-panel_b); + // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); + + +#else + + value_reg_df = value_reg_df & 0xFF; + switch(value_reg_df) + { + case 0xC1: + case 0xC3: + value_blue = BLUE_MIN; + break; + + case 0xCF: + case 0xD0: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) / BLUE_STEP; + break; + + case 0xD8: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 2 / BLUE_STEP; + break; + + case 0xDE: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 3 / BLUE_STEP; + break; + + case 0xE4: + case 0xE5: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 4 / BLUE_STEP; + break; + + case 0xE9: + case 0xEA: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 5 / BLUE_STEP; + break; + + case 0xED: + case 0xEE: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 6 / BLUE_STEP; + break; + + case 0xF1: + case 0xF2: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 7 / BLUE_STEP; + break; + + case 0xF4: + case 0xF5: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 8 / BLUE_STEP; + break; + + case 0xF7: + case 0xF8: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 9 / BLUE_STEP; + break; + + case 0xFA: + value_blue = BLUE_MAX; + break; + + default: + case 0xFF: + value_blue = 0; + break; + + } + hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle, 256, 256, 256); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + +#endif + + } + else + { +#ifndef USE_FOR_S10_BLUE_MODE + value_blue = 0; + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); //ģʽs8+/s9+ +#endif + + //һ㣬ЧԡҪݿͻҪϸ + + panel_r = 256 - RATIO_VALUE * (0xFF - panel_r); + panel_g = 256 - RATIO_VALUE * (0xFF - panel_g); + panel_b = 256 - RATIO_VALUE * (0xFF - panel_b); + //hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); + } + +#ifndef USE_FOR_S10_BLUE_MODE + if (blue_flag == 0) + { + blue_flag = 1; + delayMs(20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + } +#endif + +#else + value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; + + value_reg_df = value_reg_df & 0xFF; + switch(value_reg_df) + { + case 0xC1: + case 0xC3: + value_blue = BLUE_MIN; + break; + + case 0xCF: + case 0xD0: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) / BLUE_STEP; + break; + + case 0xD8: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 2 / BLUE_STEP; + break; + + case 0xDE: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 3 / BLUE_STEP; + break; + + case 0xE4: + case 0xE5: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 4 / BLUE_STEP; + break; + + case 0xE9: + case 0xEA: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 5 / BLUE_STEP; + break; + + case 0xED: + case 0xEE: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 6 / BLUE_STEP; + break; + + case 0xF1: + case 0xF2: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 7 / BLUE_STEP; + break; + + case 0xF4: + case 0xF5: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 8 / BLUE_STEP; + break; + + case 0xF7: + case 0xF8: + value_blue = BLUE_MIN + (BLUE_MAX - BLUE_MIN) * 9 / BLUE_STEP; + break; + + case 0xFA: + value_blue = BLUE_MAX; + break; + + default: + case 0xFF: + value_blue = 0; + break; + + } + + TAU_LOGD("df[%4x]", value_reg_df); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + if (blue_flag == 0) + { + blue_flag = 1; + delayMs(20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + } +#endif + + return true; +} + +static bool ap_set_backlight_B1(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + uint8_t value_b1 = 0; + + value_b1 = dcs_packet->packet_param[0]; + +// hal_dsi_tx_ctrl_write_cmd(0x29, 0, 2, 0x53, value_b1); + + if(value_b1 == 0x90) // ģʽ + { + ///FPR ON + // hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87,0x13,0xFF,0x05); + if(rd_51_value >= 0x400) + { + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87, 0x1B, 0xF2, 0x05); + } + else if((rd_51_value >= 0x200) && (rd_51_value < 0x400)) + { + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87, 0x19, 0xF2, 0x05); + } + else if((rd_51_value >= 0x70) && (rd_51_value < 0x200)) + { + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87, 0x16, 0xF2, 0x05); + } + else if((rd_51_value >= 0x2F) && (rd_51_value < 0x70)) + { + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87, 0x13, 0xF2, 0x05); + } + else if((rd_51_value >= 0x10) && (rd_51_value < 0x2F)) + { + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87, 0x12, 0xF2, 0x05); + } + else + { + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87, 0x11, 0xF2, 0x05); + } + + } + else if(value_b1 == 0x00) // ˳ģʽ + { + ///FPR OFF + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x6F, 0x02); + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x87, 0x04); + } + +// TAU_LOGD("B1[%x]", value_b1); + return true; +} + + +/* ƻDCS command */ +static const hal_dcs_execute_entry_t g_cus_rx_dcs_execute_table[] = +{ + {DCS_SET_DISPLAY_ON, ap_set_display_on, true}, + {DCS_SET_DISPLAY_OFF, ap_set_display_off, true}, + //{0xDF, ap_get_reg_df, false}, // + //{0xCA, ap_get_reg_ca, false}, // ⡣ҪB1ܵ + {0x51, ap_set_backlight, false}, + {0xB1, ap_set_backlight_B1, true}, + {0x60, ap_update_frame_rate, true}, + {DCS_ENTER_SLEEP_MODE, ap_set_enter_sleep_mode, true}, + {DCS_EXIT_SLEEP_MODE, ap_set_exit_sleep_mode, true}, + {0, NULL, false} //{0,NULL,false} һ̶ԱΪtableβжϱ׼ +}; + +static void tx_panel_reset(void) +{ +#ifdef USE_WL518_INTERNAL_FLASH + hal_system_share_flash_mode(true); +#endif + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); + delayMs(10); //10ms + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW); + delayMs(10); //10ms + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); + delayMs(10); +} + + +#if PANEL_INIT_CODE_ARRAY +static void send_panel_init_code(uint32_t size, uint8_t * data) +{ + uint32_t data_offeset = 0; + uint8_t data_type; + uint8_t vc; + uint8_t data_size; + uint8_t * p_data; + + while(data_offeset < size) + { + data_type = data[data_offeset]; + vc = data[data_offeset + 1]; + data_size = data[data_offeset + 2]; + p_data = &data[data_offeset + 3]; + hal_dsi_tx_ctrl_write_array_cmd(data_type, vc, data_size, p_data); + data_offeset = data_offeset + data_size + 3; +// delayUs(5); + } +} + +const uint8_t panel_init_code[] = +{ + +#if AMOLED_NT37701_CSOT667 + 0x39, 0, 6, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00, + 0x39, 0, 9, 0xBA, 0x02, 0x79, 0x00, 0x14, 0x03, 0x9C, 0x00, 0x01, + 0x39, 0, 2, 0x6F, 0x08, + 0x39, 0, 9, 0xBA, 0x01, 0xAF, 0x00, 0x14, 0x00, 0x1C, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x10, + 0x39, 0, 8, 0xBA, 0x01, 0x66, 0x00, 0x14, 0x00, 0x1C, 0x00, + 0x39, 0, 9, 0xBB, 0x02, 0x79, 0x00, 0x14, 0x03, 0x9C, 0x00, 0x21, + 0x39, 0, 2, 0xB5, 0x84, + 0x39, 0, 2, 0x6F, 0x06, + 0x39, 0, 4, 0xB5, 0x2B, 0x0C, 0x33, + 0x39, 0, 2, 0x6F, 0x0B, + 0x39, 0, 4, 0xB5, 0x2B, 0x23, 0x33, + 0x39, 0, 2, 0x6F, 0x10, + 0x39, 0, 6, 0xB5, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, + 0x39, 0, 2, 0x6F, 0x01, + 0x39, 0, 2, 0xB6, 0x19, + 0x39, 0, 19, 0xB7, 0x99, 0x99, 0x99, 0x99, 0x99, 0x99, 0x87, 0x65, 0x43, 0x32, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x13, + 0x39, 0, 13, 0xB7, 0x00, 0x00, 0x01, 0x13, 0x78, 0x89, 0x9A, 0xAB, 0xBC, 0xCD, 0xDE, 0xEF, + 0x39, 0, 2, 0x6F, 0x1F, + 0x39, 0, 25, 0xB7, 0x08, 0x31, 0x66, 0x8F, 0xF5, 0xC1, 0xC2, 0x33, 0xFF, 0x7F, 0xFF, 0x7F, 0xFF, 0x7F, 0xFF, 0x7F, 0xFF, 0x7F, 0xFF, 0x7F, 0xFF, 0x7F, 0xFF, 0xFF, + 0x39, 0, 3, 0xB2, 0x98, 0x60, + 0x39, 0, 2, 0x6F, 0x09, + 0x39, 0, 2, 0xB2, 0x40, + 0x39, 0, 2, 0x6F, 0x0F, + 0x39, 0, 9, 0xB2, 0x20, 0x20, 0x21, 0xC2, 0x21, 0xC2, 0x2F, 0xFF, + 0x39, 0, 13, 0xB3, 0x00, 0x08, 0x00, 0x1C, 0x00, 0x1C, 0x00, 0x3C, 0x00, 0x3C, 0x00, 0x70, + 0x39, 0, 2, 0x6F, 0x0C, + 0x39, 0, 13, 0xB3, 0x00, 0x70, 0x00, 0xC8, 0x00, 0xC8, 0x01, 0x48, 0x01, 0x48, 0x01, 0xAD, + 0x39, 0, 2, 0x6F, 0x18, + 0x39, 0, 13, 0xB3, 0x01, 0xAD, 0x01, 0xC2, 0x01, 0xC2, 0x01, 0xC2, 0x07, 0xFF, 0x0F, 0xFF, + 0x39, 0, 2, 0x6F, 0x24, + 0x39, 0, 9, 0xB3, 0x01, 0x55, 0x08, 0xCC, 0x08, 0xCC, 0x0F, 0xFF, + 0x39, 0, 2, 0x6F, 0x2C, + 0x39, 0, 15, 0xB3, 0x09, 0x90, 0x08, 0xDC, 0x08, 0x70, 0x08, 0x70, 0x07, 0xC8, 0x07, 0xC8, 0x06, 0xB8, + 0x39, 0, 2, 0x6F, 0x3A, + 0x39, 0, 13, 0xB3, 0x06, 0xB8, 0x04, 0xE8, 0x04, 0xE8, 0x02, 0x48, 0x02, 0x48, 0x00, 0x38, + 0x39, 0, 2, 0x6F, 0x46, + 0x39, 0, 13, 0xB3, 0x00, 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0x6F, 0x70, + 0x39, 0, 17, 0xBB, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, + 0x39, 0, 2, 0x6F, 0x80, + 0x39, 0, 17, 0xBB, 0x01, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x90, + 0x39, 0, 17, 0xBB, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x10, 0x10, + 0x39, 0, 2, 0x6F, 0xA0, + 0x39, 0, 5, 0xBB, 0x80, 0x80, 0x80, 0x00, + 0x39, 0, 2, 0xEE, 0x05, + 0x39, 0, 5, 0xFF, 0xAA, 0x55, 0xA5, 0x80, + 0x39, 0, 2, 0x6F, 0x1D, + 0x39, 0, 2, 0xF2, 0x05, + 0x39, 0, 5, 0x3B, 0x00, 0x14, 0x00, 0x12, + 0x39, 0, 2, 0x03, 0x01, + 0x39, 0, 2, 0x90, 0x02, + 0x39, 0, 19, 0x91, 0x89, 0x28, 0x00, 0x0C, 0xC2, 0x00, 0x03, 0x1C, 0x01, 0x7E, 0x00, 0x0F, 0x08, 0xBB, 0x04, 0x3D, 0x10, 0xF0, + 0x39, 0, 1, 0x2C, + 0x39, 0, 5, 0x51, 0x07, 0xFF, 0x0F, 0xFF, + 0x39, 0, 2, 0x53, 0x20, + 0x39, 0, 1, 0x35, + 0x39, 0, 5, 0x2A, 0x00, 0x00, 0x04, 0x37, + 0x39, 0, 5, 0x2B, 0x00, 0x00, 0x09, 0x5F, + 0x39, 0, 2, 0x2F, 0x01, +#endif + +#if FINGERPRINT_USE_DRIVERIC_FPR + +#if 0 +//v01 + 0x39, 0, 6, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x07, + 0x39, 0, 15, 0xC0, 0x01, 0x01, 0x00, 0x00, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + + 0x39, 0, 2, 0x6F, 0x00, + 0x39, 0, 22, 0xC9, 0x21, 0x00, 0x29, 0x71, 0x29, 0x71, 0x00, 0x00, 0x3F, 0xDE, 0xA7, 0x12, 0x3F, 0xDE, 0xA7, 0x12, 0x80, 0x06, 0xB5, 0x63, 0xE1, + 0x39, 0, 2, 0x6F, 0x15, + 0x39, 0, 16, 0xC9, 0x71, 0xB5, 0xC6, 0x82, 0x1C, 0x2D, 0x33, 0xE0, 0x29, 0x71, 0x0F, 0x99, 0x99, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x24, + 0x39, 0, 8, 0xC9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + + 0x39, 0, 2, 0x6F, 0x00, + 0x39, 0, 22, 0xCA, 0x27, 0x00, 0x29, 0x71, 0x28, 0xA4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xDF, 0x4C, 0x08, 0x80, 0x00, 0x00, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x15, + 0x39, 0, 16, 0xCA, 0x72, 0x1D, 0xC6, 0x82, 0x83, 0x2D, 0x33, 0xD0, 0x00, 0x00, 0x03, 0x67, 0x9A, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x24, + 0x39, 0, 8, 0xCA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + + 0x39, 0, 2, 0x6F, 0x00, + 0x39, 0, 22, 0xCB, 0x2D, 0x00, 0x28, 0xA4, 0x29, 0x71, 0x00, 0x00, 0x3F, 0xDF, 0x4C, 0x08, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x15, + 0x39, 0, 16, 0xCB, 0x81, 0xB5, 0x2E, 0x82, 0x1C, 0x94, 0x33, 0x70, 0x00, 0x00, 0x0C, 0x9A, 0x67, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x24, + 0x39, 0, 8, 0xCB, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + + 0x39, 0, 2, 0x6F, 0x00, + 0x39, 0, 22, 0xCC, 0x2B, 0x00, 0x28, 0xA4, 0x28, 0xA4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x7F, 0xF9, 0x8C, 0x56, 0xF0, + 0x39, 0, 2, 0x6F, 0x15, + 0x39, 0, 16, 0xCC, 0x82, 0x1D, 0x2E, 0x82, 0x83, 0x94, 0x33, 0x8F, 0xD7, 0x5C, 0x00, 0x66, 0x66, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x24, + 0x39, 0, 8, 0xCC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +///////////////// + 0x39, 0, 6, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x02, + 0x39, 0, 2, 0x6F, 0x08, + 0x39, 0, 3, 0xD0, 0x0C, 0xE4, + 0x39, 0, 2, 0x6F, 0x0A, + 0x39, 0, 3, 0xD0, 0x0B, 0x60, + 0x39, 0, 2, 0x6F, 0x0C, + 0x39, 0, 3, 0xD0, 0x0E, 0x30, + 0x39, 0, 2, 0xD1, 0x41, + 0x39, 0, 2, 0x6F, 0x01, + 0x39, 0, 2, 0xD1, 0x00, + 0x39, 0, 2, 0x6F, 0x02, + 0x39, 0, 2, 0xD1, 0x00, + // ʼãֻһεķΧ + 0x39, 0, 2, 0x6F, 0x03, + 0x39, 0, 5, 0xD1, 0x02, 0x1D, 0x08, 0x2E, + 0x39, 0, 2, 0x6F, 0x07, + 0x39, 0, 5, 0xD1, 0x01, 0xB5, 0x07, 0xC6, +// 0x39, 0, 5, 0xD1,0x01,0xB5,0x07,0x92, + 0x39, 0, 2, 0x6F, 0x0B, + 0x39, 0, 5, 0xD1, 0x02, 0x83, 0x08, 0x94, +// 0x39, 0, 5, 0xD1,0x02,0x83,0x08,0xC8, + + 0x39, 0, 2, 0x6F, 0x0F, + 0x39, 0, 7, 0xD1, 0x3F, 0xFF, 0x20, 0x00, 0x30, 0x00, +//////////////////////////////////// + 0x39, 0, 6, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00, + 0x39, 0, 2, 0x6F, 0x17, + 0x39, 0, 3, 0xB2, 0x0F, 0xFF, + 0x39, 0, 2, 0x6F, 0x1F, + 0x39, 0, 3, 0xB2, 0x00, 0x50, +//FPR1_CENTER_X=540, FPR1_CENTER_Y=2093 +//FPR1_EN = 1 ƶλã228x,72By + 0x39, 0, 2, 0x88, 0x01, + 0x39, 0, 2, 0x6F, 0x01, +// 0x39, 0, 5, 0x88,0x02,0x28,0x07,0x2B, + 0x39, 0, 5, 0x88, 0x02, 0x1D, 0x07, 0x19, // 0x02,0x28,0x07,0x2B, +///FPR ON +// 0x39, 0, 4, 0x87,0x13,0xFF,0x05, +///FPR OFF +// 0x39, 0, 2, 0x6F,0x02, +// 0x39, 0, 2, 0x87,0x04, +#else +//v2 + 0x39, 0, 6, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x07, +// ##Enable Round + 0x39, 0, 15, 0xC0, 0x01, 0x01, 0x00, 0x00, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x00, + 0x39, 0, 22, 0xC9, 0x21, 0x00, 0x2A, 0x40, 0x2A, 0x40, 0x00, 0x00, 0x3F, 0xDD, 0xAC, 0x00, 0x3F, 0xDD, 0xAC, 0x00, 0x80, 0x06, 0xF9, 0x10, 0x00, + 0x39, 0, 2, 0x6F, 0x15, + 0x39, 0, 16, 0xC9, 0x61, 0xB4, 0xB0, 0x72, 0x1C, 0x18, 0x33, 0xE0, 0x2A, 0x40, 0x0F, 0x98, 0x98, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x24, + 0x39, 0, 8, 0xC9, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x00, + 0x39, 0, 22, 0xCA, 0x27, 0x00, 0x2A, 0x40, 0x2A, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0xDD, 0xAC, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x15, + 0x39, 0, 16, 0xCA, 0x62, 0x1D, 0xB0, 0x72, 0x85, 0x18, 0x33, 0xE0, 0x00, 0x00, 0x03, 0x68, 0x98, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x24, + 0x39, 0, 8, 0xCA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x00, + 0x39, 0, 22, 0xCB, 0x2D, 0x00, 0x2A, 0x40, 0x2A, 0x40, 0x00, 0x00, 0x3F, 0xDD, 0xAC, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x15, + 0x39, 0, 16, 0xCB, 0x71, 0xB4, 0x19, 0x72, 0x1C, 0x81, 0x33, 0x90, 0x00, 0x00, 0x0C, 0x98, 0x68, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x24, + 0x39, 0, 8, 0xCB, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x00, + 0x39, 0, 22, 0xCC, 0x2B, 0x00, 0x2A, 0x40, 0x2A, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x7F, 0xF9, 0x06, 0xF0, 0x00, + 0x39, 0, 2, 0x6F, 0x15, + 0x39, 0, 16, 0xCC, 0x72, 0x1D, 0x19, 0x72, 0x85, 0x81, 0x33, 0x9F, 0xD5, 0xC0, 0x00, 0x68, 0x68, 0x00, 0x00, + 0x39, 0, 2, 0x6F, 0x24, + 0x39, 0, 8, 0xCC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +///////////////// + // ڸ + /* 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 3, 0xD0,0x0C,0xE4, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 3, 0xD0,0x0B,0x60, + 0x39, 0, 2, 0x6F,0x0C, + 0x39, 0, 3, 0xD0,0x0E,0x30, + */ + 0x39, 0, 6, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x02, + 0x39, 0, 2, 0x6F, 0x08, + 0x39, 0, 3, 0xD0, 0x0B, 0xE4, + 0x39, 0, 2, 0x6F, 0x0A, + 0x39, 0, 3, 0xD0, 0x0A, 0x60, + 0x39, 0, 2, 0x6F, 0x0C, + 0x39, 0, 3, 0xD0, 0x0C, 0x30, + + 0x39, 0, 2, 0xD1, 0x41, + 0x39, 0, 2, 0x6F, 0x01, + 0x39, 0, 2, 0xD1, 0x00, + 0x39, 0, 2, 0x6F, 0x02, + 0x39, 0, 2, 0xD1, 0x00, + 0x39, 0, 2, 0x6F, 0x03, + 0x39, 0, 5, 0xD1, 0x02, 0x1E, 0x07, 0x19, + 0x39, 0, 2, 0x6F, 0x07, + 0x39, 0, 5, 0xD1, 0x01, 0xB0, 0x06, 0xAC, + 0x39, 0, 2, 0x6F, 0x0B, + 0x39, 0, 5, 0xD1, 0x02, 0x88, 0x0F, 0x84, + 0x39, 0, 2, 0x6F, 0x0F, + 0x39, 0, 7, 0xD1, 0x3F, 0xFF, 0x20, 0x00, 0x30, 0x00, +//////////////////////////////////// + 0x39, 0, 6, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00, + 0x39, 0, 2, 0x6F, 0x17, + 0x39, 0, 3, 0xB2, 0x07, 0xFF, // DBV + 0x39, 0, 2, 0x6F, 0x1F, + 0x39, 0, 3, 0xB2, 0x00, 0x50, +/////////////////// +//FPR1_CENTER_X=540, FPR1_CENTER_Y=2093 +//FPR1_EN = 1 + 0x39, 0, 2, 0x88, 0x01, + 0x39, 0, 2, 0x6F, 0x01, + 0x39, 0, 5, 0x88, 0x02, 0x1D, 0x07, 0x19, +///FPR ON +// 0x39, 0, 4, 0x87,0x13,0xFF,0x05, +///FPR OFF +// 0x39, 0, 2, 0x6F,0x02, +// 0x39, 0, 2, 0x87,0x04, + +#endif + +#endif +#if 1 //20221129 wlx su + 0x39, 0, 6, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00, + 0x39, 0, 2, 0xC0, 0x77, +// 0x39, 0, 5, 0x3B,0x00,0x10,0x09,0x90, +// 0x39, 0, 2, 0x90,0x00, +// 0x05, 0, 1, 0x2C, +// 0x39, 0, 3, 0x51,0x03,0x00, +#endif + + +#if 0//BIST MODE + 0x39, 0, 6, 0xF0, 0x55, 0xAA, 0x52, 0x08, 0x00, + 0x39, 0, 8, 0xEF, 0x01, 0x02, 0xFF, 0xFF, 0xFF, 0x17, 0xFF, + 0x39, 0, 5, 0xEE, 0x87, 0x78, 0x02, 0x40 +#endif + +#endif + +}; + + + +static void init_panel(void) +{ + /* reset panel*/ + tx_panel_reset(); + + // hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH); + /* enter send initial code mode*/ + hal_dsi_tx_ctrl_enter_init_panel_mode(); +#if AMOLED_NT37701_CSOT667 +#if PANEL_INIT_CODE_ARRAY + send_panel_init_code(sizeof(panel_init_code), (uint8_t *) panel_init_code); +#endif + hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x01); //0FFF + hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); + delayMs(90); //120 + Gpio_swire_output(2, 40); + delayMs(20); + +#endif + +// hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); + + /* exit send initial code mode*/ + hal_dsi_tx_ctrl_exit_init_panel_mode(); + TAU_LOGD("Pannel init"); + delayMs(20); +} + +static void open_mipi_rx(void) +{ + /* TE */ + hal_gpio_set_mode(IO_PAD_AP_TE, IO_MODE_TEAR); + + if (g_rx_ctrl_handle == NULL) + { + /* rx ctrl handle */ + g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); + } + /* ò */ + g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; + g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; + g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; + g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; + g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; + g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; + g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; /* ɲ */ + g_rx_ctrl_handle->rx_vc = INPUT_VC; + g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; + g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; + g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; /* ע DCSб */ + g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; /* עdsc read ص,ѡ,˺Ϊʱcus_dcs_entry_tableִ */ + g_rx_ctrl_handle->pps_update_entry = pps_update_handle; + g_rx_ctrl_handle->hight_performan_mode = HIGHT_PERFORMAN_L1;///////////////////////// 0/1/2 +#if 1//򿪻ᵼ¿ӡϢTX +// g_rx_ctrl_handle->pq_marginal = PQ_TYPE_5; +#endif + /* ǰԤPPS, AP PPS cmdҲ */ + if (g_rx_ctrl_handle->compress_en == true) + { + + uint8_t pps[128] = {0x11, 0x00, 0x00, 0x89, 0x30, 0x80, 0x0C, 0x30, 0x05, 0xA0, 0x00, 0x34, 0x02, 0xD0, 0x02, 0xD0, + 0x02, 0x00, 0x02, 0x68, 0x00, 0x20, 0x05, 0xC6, 0x00, 0x0A, 0x00, 0x0C, 0x01, 0xE2, 0x01, 0x78, + 0x18, 0x00, 0x10, 0xF0, 0x03, 0x0C, 0x20, 0x00, 0x06, 0x0B, 0x0B, 0x33, 0x0E, 0x1C, 0x2A, 0x38, + 0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7B, 0x7D, 0x7E, 0x01, 0x02, 0x01, 0x00, 0x09, 0x40, + 0x09, 0xBE, 0x19, 0xFC, 0x19, 0xFA, 0x19, 0xF8, 0x1A, 0x38, 0x1A, 0x78, 0x1A, 0xB6, 0x2A, 0xF6, + 0x2B, 0x34, 0x2B, 0x74, 0x3B, 0x74, 0x6B, 0xF4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }; + + hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 128); + } + /* ʼrx ctrl */ + hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); + + hal_dsi_rx_ctrl_set_cus_sync_line(g_rx_ctrl_handle, SYNC_LIN_NUMBER); // Ҫ򿪡˺ +// hal_dsi_rx_ctrl_set_cus_esc_clk(g_rx_ctrl_handle,20000000); +// hal_dsi_rx_ctrl_hight_performan_mode(g_rx_ctrl_handle);///////////////////////// +// hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256, 256, 211); +// hal_dsi_rx_ctrl_set_te_waveform(g_rx_ctrl_handle, false, 512); + + /* rx ctrl */ + hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +} + +static void init_mipi_tx(void) +{ + if (g_tx_ctrl_handle == NULL) + { + g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); + } + g_tx_ctrl_handle->channel_id = OUTPUT_VC; + g_tx_ctrl_handle->lane_num = OUTPUT_LANE_NUMBER; + g_tx_ctrl_handle->vid_mode = OUTPUT_VIDEO_MODEL; + g_tx_ctrl_handle->cmd_tx_type = _CMD_TYPE; + g_tx_ctrl_handle->dpi_vsa = OUTPUT_VSA; + g_tx_ctrl_handle->dpi_vbp = OUTPUT_VBP; + g_tx_ctrl_handle->dpi_vfp = OUTPUT_VFP; + g_tx_ctrl_handle->dpi_hsa = OUTPUT_HSA; + g_tx_ctrl_handle->dpi_hbp = OUTPUT_HBP; + g_tx_ctrl_handle->dpi_hfp = OUTPUT_HFP; + g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_tx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; + g_tx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; + g_tx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; + g_tx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; + g_tx_ctrl_handle->tx_frame_rate = OUTPUT_FRAME_RATE;//OUTPUT_FRAME_RATE; + g_tx_ctrl_handle->tx_clkawayshs = true; +// g_tx_ctrl_handle->tx_line_delay = TX_LINE_DELAY; + g_tx_ctrl_handle->lp_exit_lpdt = true; + + hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); + /* AP ûзʱĬϵʾɫ, Ϊ0 0 0(ɫ), ɫΪdebugʹ */ +#ifndef DISPLAY_ONLY + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); +#else + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0xFF); +#endif +} + +static void tx_display_on(void) +{ + init_panel(); + + // swire_init(); + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + + if(phone_DisplayOFF_flag == 1)/////////////////////////////2023/4/26 19:40:52 + { + delayMs(300);//ʱ,⿪ + } + + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); + +#if 0 + if(g_resolution_change) + { + hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); + //hal_dsi_rx_ctrl_set_auto_hw_filter(g_rx_ctrl_handle, true); + //TAU_LOGD("resolutio toggle\n"); + } + panel_display_done = true; +#endif +} + +static void swire_timer_callback(void *data) +{ +#ifdef USE_FOR_SUMSUNG_S20 + if(Flag_blacklight_EN) + { + hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); + } + else if(s20_power_on_flag) + { + hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); + } + else +#endif + { + hal_swire_start(12, 12, 12, 12, swire_num); + } +} + +static void swire_callback(void *data) +{ + /* swire ǷҪһֱҪֻֻͬͬ */ + //if(start_display_on == false) + { + hal_timer_start(SWIRE_TIMER, 26, swire_timer_callback, NULL); + } +} + +/* swire ʼ,ͨ hal_swire_start , ѭһֱ */ +static __attribute__((unused)) void swire_init(void) +{ + hal_swire_open(DISABLE); + hal_swire_init(); + /* swire ηɺص */ + hal_swire_register_callback(swire_callback); + hal_swire_open(ENABLE); + //hal_swire_start(12, 12, 12, 12, 43); + hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); //3~27,~,9.45V~7.43V + hal_timer_init(SWIRE_TIMER); + hal_timer_start(SWIRE_TIMER, 26, swire_timer_callback, NULL); +} + +static void soft_te_timer_cb(void *data) +{ + /* + S8 ӵTP1.8V, AC ҪȵTP1.8 ٳʼ, TP ǰҪͨTEֻֻ + */ +// if (panel_display_done == false) +// { + hal_dsi_rx_ctrl_gen_a_tear_signal(g_rx_ctrl_handle); + hal_timer_start(TE_TIMER, 17, soft_te_timer_cb, NULL); +// } +// else +// { +// hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); +// } +} + +void soft_te_timer_init()//static +{ + TAU_LOGD("soft_te_timer_init"); + hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + hal_timer_init(TE_TIMER); + hal_timer_start(TE_TIMER, 1, soft_te_timer_cb, NULL); +} + +#ifdef ADD_TIMER3_FUNCTION +static void soft_timer3_cb(void *data) +{ + hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); + tp_sleep_count++; + if(phone_DisplayOFF_count > 0) + { + phone_DisplayOFF_count++; + } + +#if AUTO_CAL_TP + if (g_exit_sleep_mode) + { + if (g_cal_cnt > 0) + { + g_cal_cnt--; + if (g_cal_cnt == 0) + { + g_calibration_flag = true; + TAU_LOGD("Start cal tp!\n"); + } + } + } +#endif + +#if RUN_TEST + g_run_test_cnt++; +#endif +} +#endif + +#if ADD_TP_CALIBRATION +void app_tp_calibration_exec(void) +{ + if(g_calibration_flag) + { + g_calibration_flag = false; + ap_tp_calibration(); + TAU_LOGD("calibration successful \n"); + } +} +#endif + +#if 0 // TEST RGB, From Lin +void RGB_TEST(void) +{ + tx_display_on(); + while (1) + { + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_set_overwrite_rgb(0xFF, 0x00, 0x00); // RED + delayMs(1000); + + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0xFF, 0x00); // GREEN + delayMs(1000); + + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0xFF); // BLUE + delayMs(1000); + + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_set_overwrite_rgb(0xFF, 0xFF, 0xFF); // WHITE + delayMs(1000); + + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); // BLACK + delayMs(1000); + + hal_dsi_tx_ctrl_set_partial_disp(DISABLE); + hal_dsi_tx_ctrl_set_partial_disp(ENABLE); + delayMs(1000); + + hal_dsi_tx_ctrl_set_partial_disp_area(0, 0, 0, 0); + } + +} +#endif + +//void tp_heartbeat_exec(void) +//{ +// if (s_screen_init_complate) +// { +// if(hal_gpio_get_input_data(IO_PAD_TD_INT)) +// { +// s_heartbeat = 0; +// } +// else +// { +// if(s_heartbeat < (65536 / 50)) // 65536*3 = 900ms 65536/50 = 6ms +// { +// s_heartbeat ++; +// } +// else +// { +// TAU_LOGD("hb"); +// s_heartbeat = 0; +// ap_tp_system_softReset(); +// } +// } +// } +//} + +#if 0//TEST +static uint8_t power_on_flag = 0; +static void ap_reset_cb_test(void *data) +{ + /* лԴ */ + // hal_gpio_set_output_data_ex(POWER_IO_B, IO_LVL_HIGH, POWER_IO_A, IO_LVL_LOW); + /* VCC */ + TAU_LOGD("ap reset cb!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n"); + hal_gpio_set_ap_reset_int(DISABLE, ap_reset_cb_test, DETECT_HIGH_LVL); + power_on_flag = 1; + //hal_system_set_vcc(true); + //NVIC_SystemReset(); +} +#endif + + + +extern void tp_io_init(void); +extern void tp_proc(void); + +void ap_demo(void) +{ + //for checksum + char u8_date_inv[11] = {~__DATE__[0], ~__DATE__[1], ~__DATE__[2], ~__DATE__[3], \ + ~__DATE__[4], ~__DATE__[5], ~__DATE__[6], ~__DATE__[7], \ + ~__DATE__[8], ~__DATE__[9], ~__DATE__[10] + }; + char u8_time_inv[8] = {~__TIME__[0], ~__TIME__[1], ~__TIME__[2], ~__TIME__[3], \ + ~__TIME__[4], ~__TIME__[5], ~__TIME__[6], ~__TIME__[7] + }; + + + +#if 0//TEST + hal_gpio_set_ap_reset_int(ENABLE, ap_reset_cb_test, DETECT_HIGH_LVL); + while(power_on_flag == 0) + { + ; + } +#endif + + hal_gpio_set_output_data(IO_PAD_TD_LEDPWM, IO_LVL_LOW); + hal_gpio_init_output(IO_PAD_TD_TPRSTN, IO_LVL_HIGH); + hal_gpio_init_output(IO_PAD_AP_SWIRE, IO_LVL_LOW); + hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_LOW); // LED_ON + + open_mipi_rx(); + //TAU_LOGD("Pixe6 [%s %s]", __DATE__, __TIME__); + TAU_LOGD("Pixel7pro [%s %s %s %s]", __DATE__, __TIME__, u8_date_inv[0], u8_time_inv[0]); + + tp_io_init(); +// slave_SPI_init(); + + init_mipi_tx(); + + //hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_USER_MODE); + + //soft_te_timer_init(); + +// app_tp_init(); + +#ifdef ADD_TIMER3_FUNCTION + tp_sleep_count = 0; + phone_DisplayOFF_count = 1; + hal_timer_init(TIMER_NUM3); + hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); + TAU_LOGD("start timer3"); +#endif + +#if 1 // TEST RGB, From Lin +// RGB_TEST(); +//hal_dsi_tx_ctrl_set_overwrite_rgb(0xff, 0xff, 0xff); +#endif + + + while (1) + { + tp_proc(); + + if (start_display_on == true ) + { + tx_display_on(); + start_display_on = false; + panel_display_done = true; +#ifndef DISABLE_TDDI_I2C_FUNCTION + /* TP ģͨѶʼ */ + app_tp_transfer_screen_start(); +#endif + +#if ENABLE_TP_WAKE_UP//жϷԭǵʱλһ(70ms)Ḷ́ΪֿʹԽж70ms,ʹøλڶʱʶ + hal_gpio_set_ap_reset_int(ENABLE, ap_reset_cb, DETECT_RISING_EDGE); +#endif + } + +// if(phone_start_flag) +// { +// FST_tp_init(); +// phone_start_flag =0; +// } + + +// if(phone_DisplayOFF_flag == 1) +// { +// if(phone_DisplayOFF_count > 1000) +// { +// phone_DisplayOFF_count = 0; +// phone_start_flag = 1; +// } +// } +// else +// { +// if(phone_DisplayOFF_count > 20) +// { +// phone_DisplayOFF_count = 0; +// phone_start_flag = 1; +// hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW); //ͣ˫2~3s޴.jason_su +// } +// } + + + +// app_tp_transfer_screen_int(); + +#if ADD_TP_CALIBRATION + app_tp_calibration_exec(); +#endif + +// tp_heartbeat_exec(); +// ap_tp_scan_point_record_event_exec(); + + if(g_mipi_path_off == false) + { + while (hal_dsi_rx_ctrl_dsc_async_handler(g_rx_ctrl_handle)); + } + +#if ENABLE_TP_WAKE_UP + if (g_need_enter_sleep_mode) + { + g_mipi_path_off = true; + hal_gpio_set_output_data(IO_PAD_TD_LEDPWM, IO_LVL_HIGH); + /* FIXME stop more model */ + hal_dsi_tx_ctrl_stop(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_deinit(g_tx_ctrl_handle); + hal_dsi_rx_ctrl_stop(g_rx_ctrl_handle); + hal_dsi_rx_ctrl_deinit(g_rx_ctrl_handle); + + hal_swire_open(DISABLE); + hal_swire_deinit(); + hal_timer_stop(SWIRE_TIMER); + hal_timer_deinit(SWIRE_TIMER); + tp_sleep_in = 1; + //hal_gpio_init_output(IO_PAD_TD_TPRSTN, IO_LVL_LOW); + hal_system_set_vcc(false); //VCC + + TAU_LOGD("disable video path \n"); + g_need_enter_sleep_mode = false; + } +#endif + + /* enter idle mode*/ + //hal_system_idle_mode(true); + } +} + + diff --git a/src/app/ap_demo/ap_demo.h b/src/app/ap_demo/ap_demo.h new file mode 100644 index 0000000..d087282 --- /dev/null +++ b/src/app/ap_demo/ap_demo.h @@ -0,0 +1,57 @@ +/******************************************************************************* +* +* +* File: s8_demo.h +* Description: s8ͷļ +* Version: V0.1 +* Date: 2021-02-22 +* Author: Tempest + *******************************************************************************/ + +#ifndef __AP_DEMO_H__ +#define __AP_DEMO_H__ + +#define DISABLE_TDDI_I2C_FUNCTION +//#define USE_WL518_INTERNAL_FLASH + + +/* ͬѡѡѡ1*/ +#define USE_FOR_Google_Pixel6pro +//#define USE_FOR_SUMSUNG_S20PLUS +//#define USE_FOR_OPPO_RENO3_PRO + + + + +#ifdef USE_FOR_Google_Pixel6pro +#define AMOLED_NT37701_CSOT667 1 + +#define FINGERPRINT_USE_DRIVERIC_FPR 1 // ָʶʹdriver icFPRʵ + +#define PANEL_INIT_CODE_ARRAY 1 +#define ENABLE_TP_WAKE_UP 1 +#define USE_GPIO_CTRL_SWIRE //GPIOSWIRE/LED_ON + +#define G_PHONE_INT_DEFAULT_LOW + +//#define USE_FOR_S10_BLUE_MODE //S10ģʽ +//#define ADD_PANEL_DISPLAY_MODE //Ļģʽܡƽ⹦ +#define ADD_TIMER3_FUNCTION +#define ENABLE_TP_SLEEP + +#define USE_FILTER_20220513 +#define ADD_PWM_OUTPUT_FOR_BL //PWMƱ 20220510 +#endif + +#ifdef USE_FOR_OPPO_RENO3_PRO +#define AMOLED_NT37701_HX655 1 +#endif + +/** +* @brief test system +* @param none +* @retval none +*/ +void ap_demo(void); +void slave_SPI_init(void); +#endif diff --git a/src/app/ap_demo/ap_demo备份-1216.c b/src/app/ap_demo/ap_demo备份-1216.c new file mode 100644 index 0000000..413ab17 --- /dev/null +++ b/src/app/ap_demo/ap_demo备份-1216.c @@ -0,0 +1,2139 @@ +/******************************************************************************* +* +* File: S20_demo.c +* Description: ϵͳļ +* Version: V0.1 +* Date: 2020-02-22 +* Author: Tempest + *******************************************************************************/ + +#include "ap_demo.h" +#include "ArmCM0.h" +#include "tau_device_datatype.h" +#include "tau_log.h" +#include "tau_operations.h" +#include "tau_common.h" +#include "tau_delay.h" +#include "hal_dsi_rx_ctrl.h" +#include "hal_dsi_tx_ctrl.h" +#include "hal_swire.h" +#include "hal_timer.h" +#include "hal_system.h" +#include "hal_gpio.h" +#include "hal_pwm.h" + + +#include "app_tp_transfer.h" +#ifdef LOG_TAG + #undef LOG_TAG +#endif +#define LOG_TAG "Pixel6_pro_demo" + +/*****************************************/ + +//S8 MIPIϢ +/* ֱ */ +#define INPUT_WIDTH 1440 +#define INPUT_HEIGHT 3120 +/* MIPI lane rate,video modeҪȷãcmd mode */ +#define INPUT_MIPI_LANE_RATE 1250000000 //1000000000 +/* ͼʽ */ +#define INPUT_COLOR_MODE DSI_RGB888 +/* ݸʽ(DSI_DATA_CMD_MODE , DSI_DATA_VIDEO_MODE) */ +#define INPUT_DATA_MODE DSI_DATA_CMD_MODE +/* mipi lane(DSI_RX_LANE_x xΪ1-4) */ +#define INPUT_MIPI_LANE_NUM DSI_LANE_4 +/* Ϊvideo mode ʱݸʽ */ +#define INPUT_VIDEO_MODEL DSI_NONBURST_EVENT +/* ͨ(0-3) */ +#define INPUT_VC DSI_VC_0 +/* ֡(60/90/120/144Hz) */ +#define INPUT_FRAME_RATE DSI_FRAME_RATE_60HZ +/* ǷDSCѹ */ +#define INPUT_COMPRESS true +#define OUTPUT_FRAME_RATE 60 + +#if AMOLED_NT37701_CSOT667 + + /* ֱ */ + #define OUTPUT_WIDTH 1080 + #define OUTPUT_HEIGHT 2400 + /* ͨ(0-3) */ + #define OUTPUT_VC DSI_VC_0 + /* mipi lane(DSI_RX_LANE_x xΪ1-4) */ + #define OUTPUT_LANE_NUMBER DSI_LANE_4 + /* Ϊvideo mode ݸʽ */ + #define OUTPUT_VIDEO_MODEL DSI_BURST_MODE +#if 0 + /* VSA */ + #define OUTPUT_VSA 2 + /* VBP */ + #define OUTPUT_VBP 58//64 + /* VBP */ + #define OUTPUT_VFP 62 + /* VSA */ + #define OUTPUT_HSA 4 + /* HBP */ + #define OUTPUT_HBP 16 + /* HFP */ + #define OUTPUT_HFP 18 +#else + #define OUTPUT_VSA 12//8//4 + /* VBP */ + #define OUTPUT_VBP 8 + /* VBP */ + #define OUTPUT_VFP 56//72 + /* VSA */ + #define OUTPUT_HSA 8 + /* HBP */ + #define OUTPUT_HBP 12//92 + /* HFP */ + #define OUTPUT_HFP 120//100 + /* ʼģʽ */ +#endif +#define _CMD_TYPE DSI_CMD_TX_LP //0-HS,1-LP; +#endif + +#define SWIRE_TIMER TIMER_NUM1 +#define TE_TIMER TIMER_NUM2 +#ifdef USE_FOR_SUMSUNG_S20 +#define ENABLE_TP_WAKE_UP true +#define SWIRE_MAX_NUM 24 +#else +#define SWIRE_MAX_NUM 40 +#endif + +#define ADD_TP_CALIBRATION 1 +#define AUTO_CAL_TP 0 +#define RUN_TEST 0 + +#if ADD_TP_CALIBRATION +static volatile bool g_calibration_flag = false; +#endif + +#ifdef RUN_TEST +static uint8_t g_run_test_cnt = 0; //leo +#endif + +#if AUTO_CAL_TP +static uint16_t g_cal_cnt = 300; //3sʱTPУ׼ +#endif + +static uint8_t send_29_flag =0; // ʼ29ָȡ1⡣ +#if ENABLE_TP_WAKE_UP + #define POWER_IO_A IO_PAD_TD_LEDPWM //C2 IO_PWRCTRL /* ӦIOҪ */ + #define POWER_IO_B IO_PAD_TD_SPIM_MISO /* ӦIOҪ */ +#endif +//#define DISPLAY_ONLY +#define CUS_SCLD_FILTER true +#define NEW_ACK_CMD_FUNC true + +/******************************************************/ +static hal_dsi_rx_ctrl_handle_t *g_rx_ctrl_handle = NULL; +static hal_dsi_tx_ctrl_handle_t *g_tx_ctrl_handle = NULL; + +#ifdef USE_FOR_SUMSUNG_S20 +//S20 SWIRE=50->ELVSS=-1.7V +#define SWIRE_DEFAULT_NUM 50 +#else +#define SWIRE_DEFAULT_NUM 38 +#endif + +#define SYNC_LIN_NUMBER 2100//2000 + +static uint8_t swire_num=SWIRE_DEFAULT_NUM; +static uint8_t swire_num_bak=SWIRE_DEFAULT_NUM; + +/* Ĭfalse,ʼ־λ,ʹTP1.8V,AC ʼҪTP1.8Vе */ +static volatile bool start_display_on = true; +static bool g_exit_sleep_mode = false; + +#if ENABLE_TP_WAKE_UP + static bool g_need_enter_sleep_mode = false; +#endif + +/* ʼɱ־λ */ +static bool panel_display_done = false; +//static bool g_panel_init_done = false; +static volatile bool g_resolution_change = false; +static void swire_init(void); +void Gpio_swire_output(uint8_t flag, uint8_t num); + +#ifdef USE_FOR_Google_Pixel6pro +extern uint8_t Flag_blacklight_EN; +extern uint8_t tp_sleep_in; +extern uint8_t tp_sleep_count; +uint8_t phone_start_flag=0; +uint16_t phone_DisplayOFF_count=0; +uint8_t phone_DisplayOFF_flag=0; +uint16_t phone_tempcount=0; +uint16_t flag_test_count=0; +static bool g_mipi_path_off = false; +#endif + +uint32_t s_heartbeat = 0; + +#if ENABLE_TP_WAKE_UP + +static void ap_reset_cb(void *data) +{ + /* лԴ */ + // hal_gpio_set_output_data_ex(POWER_IO_B, IO_LVL_HIGH, POWER_IO_A, IO_LVL_LOW); + hal_gpio_set_output_data(POWER_IO_A, IO_LVL_LOW);// + /* VCC */ + TAU_LOGD("disable reset!!!!!!!!!!!!!!!!!!!!!!!!!!"); + hal_system_set_pvd(true); + hal_system_set_vcc(true); + NVIC_SystemReset(); +} +#endif + + + +static bool ap_dcs_read(uint8_t data_type, uint8_t dcs_cmd, uint8_t param) +{ + if (dcs_cmd == 0x04) + { + phone_DisplayOFF_flag=1; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0x0A,0x84,0x49); + } + else if (dcs_cmd == 0xa1) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 13, 0x0C,0x21,0x0C,0xC6,0x01,0xF3,0xAA,0x11,0x06,0x2B,0x25,0x21,0xF6); + } + else if (dcs_cmd == 0xDA) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x0A); + } + else if (dcs_cmd == 0xDB) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x84); + } + else if (dcs_cmd == 0xDC) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x49); + } + else if (dcs_cmd == 0xD8) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 5, 0x09,0x8A,0x22,0x57,0x2A); + } + else + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0); + TAU_LOGD("r[%x] [%d] err!!!!!!\n", dcs_cmd, return_size); + } + + //TAU_LOGD("r %x\n",dcs_cmd); + return true; +} + + +/* PPS update callback ڷֱлcase */ +static bool pps_update_handle(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height) +{ + /* AVDD ϵ, ڽϢPPS */ +// hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); +// hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) + { + /* PPS Update ҷֱʷ仯 */ + g_rx_ctrl_handle->base_info.src_w = pic_width; + g_rx_ctrl_handle->base_info.src_h = pic_height; + /* עⲿֻPPSǰ Compression Mode Command */ + g_rx_ctrl_handle->compress_en = true; + if(pic_width > 720) + { + g_tx_ctrl_handle->base_info.src_w = pic_width; + g_tx_ctrl_handle->base_info.src_h = pic_height; + } + hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); + } +// hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); + // TAU_LOGD("PPS Update\n"); + return true; +} + +static bool ap_update_frame_rate(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + static uint8_t frame_rate = 0; //ÿλʱĻʾ60hzǶȡframe_rateȴ + //TAU_LOGD("frame_rate:[%02X], %d", dcs_packet->packet_param[0], dcs_packet->param_length); + if (frame_rate != dcs_packet->packet_param[0]) + { + frame_rate = dcs_packet->packet_param[0]; + if (frame_rate == 0x00) //120hz + { + hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_SOFT_120HZ_MODE); +// hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_HW_MODE); + } + else + { + //hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_SOFT_60HZ_MODE); + hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LIN_NUMBER, TE_HW_MODE); + } + TAU_LOGD("frame_rate:%x",frame_rate); + } + return true; +} + +static bool ap_set_display_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + TAU_LOGD("disp on"); + if (start_display_on == false){ + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x29); + } + return true; +} + +static bool ap_set_display_off(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x28); + TAU_LOGD("disp off"); + return true; +} + + +static bool ap_set_enter_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + send_29_flag =0; + + hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + delayMs(10); + Gpio_swire_output(0, 0); + delayMs(10); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x10); + delayMs(20); + hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_LOW); + + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW);//Reaet + + TAU_LOGD("enter sleep mode"); +#if ENABLE_TP_WAKE_UP + g_need_enter_sleep_mode = true; +#endif + g_exit_sleep_mode = false; + + return true; +} + +static bool ap_set_exit_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + TAU_LOGD("exit sleep mode"); + g_exit_sleep_mode = true; + /* AVDD ϵ, ڽϢPPS */ +// hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); + return true; +} + +#ifdef ADD_PWM_OUTPUT_FOR_BL +/***************************************************************************** +*GPIOswire +*flag: =0, SWIRE=0; =1,SWIREź; =2, øٷSWIREź +*num: +*עFLAG=1ʱGPIOʼ!!!!!! +*****************************************************************************/ +void Gpio_swire_output(uint8_t flag, uint8_t num) +{ + uint8_t ii; + + if (flag) + { + if (flag ==2) + { + hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_HIGH); + delayMs(2); + } + for (ii =0; ii< num; ii++) + { + hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_LOW); + delayUs(10); + hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); + delayUs(9); + } + } + else + { + hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW); + } +} + + +/***************************************************************************** +* @brief pwmԿƱ +* @param init: ǷΪʼһαѡʼ +* @param polarity: ԣfalse:ȸߺͣtrue:ȵͺ +* @param duty_ratio: ռձ(0-100) +* @param frequency: ƵʣλHZ +* @retval null +*****************************************************************************/ +static void test_pwm_out_adjust(bool init, bool polarity, uint8_t duty_ratio, uint32_t frequency) +{ + pwm_out_ctrl_e ctl0 = PWMO_CTRL_HIGH; + pwm_out_ctrl_e ctl1 = PWMO_CTRL_LOW; + if (polarity) + { + ctl0 = PWMO_CTRL_LOW; + ctl1 = PWMO_CTRL_HIGH; + } + uint32_t period = 1000000 / frequency; //λus + uint32_t thr0 = 0; + uint32_t thr1 = (period * duty_ratio / 100); + + if (duty_ratio == 100) + { + ctl1 = ctl0; + thr1 = period / 2; + } + if (init) + { + hal_pwm_out_init(); + hal_pwm_out_config_all(ctl0, ctl1, thr0, thr1, period); + } + else + { + hal_pwm_out_sync_all(ctl0, ctl1, thr0, thr1, period); + } +} + +void PWM_OUTPUT_TEST(void) +{ + test_pwm_out_adjust(true, true, 30, 20000); + delayMs(2); + test_pwm_out_adjust(false, false, 40, 10000); +} + +#define PWM_PERIOD 1000 //PWM.λUS +#define PWM_MIN 8 //Сֵɵ +static void PWM_init(void) +{ + // 1ms ڳʼ͵ƽ1000 + hal_pwm_out_init(); + hal_pwm_out_config_all(PWMO_CTRL_LOW, PWMO_CTRL_HIGH, 0, PWM_PERIOD, PWM_PERIOD); +} + +static uint16_t read_bl_data =0; +static uint16_t read_bl_data_bak =0; +void PWM_Task(void) +{ +uint16_t pwm_h; + +#ifdef USE_FOR_Google_Pixel6pro + +#if AMOLED_NT37701_CSOT667 + + // s20: read_bl_data = 1~FD + + uint8_t reg51_val_h=0; + uint8_t reg51_val_l=0; +// if(Flag_blacklight_EN) + { + read_bl_data_bak =0; + // hal_pwm_out_sync_thr(0, PWM_PERIOD+1); +// hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x3F); //Ϣ·رRX,TXԴ󣬲ٷ + //printf("Flag_blacklight_EN!!!! read_bl_data[%4x] \n", read_bl_data); + return; + } + + if (g_need_enter_sleep_mode) + { + //ΪϨʱ + read_bl_data_bak =0; + // hal_pwm_out_sync_thr(0, PWM_PERIOD-PWM_MIN); //ΪС +// hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x3F); //Ϣ·رRX,TXԴ󣬲ٷ +// printf("tp_sleep_in!!!! read_bl_data[%4x] \n", read_bl_data); + // return; + } + + if(read_bl_data !=read_bl_data_bak) + { + + +#if 0 + #if 1//Բ + if (pwm_h >700) + pwm_h = 300+(pwm_h-700)*7/3; + else + pwm_h = 1+(pwm_h-1)*3/7; + #endif + if(pwm_h >8; + +// hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, reg51_val_h, reg51_val_l); //0FFF//Ϣ·رRX,TXԴ󣬲ٷ + + + read_bl_data_bak =read_bl_data; + } + + + +#else +// s20: read_bl_data = 1~FD + + if(Flag_blacklight_EN) + { + read_bl_data_bak =0; + hal_pwm_out_sync_thr(0, PWM_PERIOD+1); + //printf("Flag_blacklight_EN!!!! read_bl_data[%4x] \n", read_bl_data); + return; + } + + if (g_need_enter_sleep_mode) + { + //ΪϨʱ + read_bl_data_bak =0; + hal_pwm_out_sync_thr(0, PWM_PERIOD-PWM_MIN); //ΪС +// printf("tp_sleep_in!!!! read_bl_data[%4x] \n", read_bl_data); + // return; + } + + if(read_bl_data !=read_bl_data_bak) + { + pwm_h = PWM_PERIOD*read_bl_data/0xFF; + #if 1//Բ + if (pwm_h >700) + pwm_h = 300+(pwm_h-700)*7/3; + else + pwm_h = 1+(pwm_h-1)*3/7; + #endif + if(pwm_h 0: Ϊǡʱ +uint16_t value_reg_ca_bak =0; +uint16_t value_reg_b1_bak =0; +//#define USE_BL_ADJ6 //֮ǰS20ⷽʽ +#define USE_BL_ADJ7 //ĹS20ⷽʽ +#endif + +#if 1 // +static bool ap_set_backlight(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + uint16_t rd_51_val, rd_51_val2; + + //ֻ0x04~7FF(2043) ӳ䵽0x6e~7FF(1937),ȥмͻһ + rd_51_val = dcs_packet->packet_param[0]; + rd_51_val <<=8; + rd_51_val |= dcs_packet->packet_param[1]; + rd_51_val2 = (rd_51_val-0x04)*1937/2043+0x6e; + + if (rd_51_val2 < 0x220 && rd_51_val2 > 0x1B3){ + rd_51_val2 = 0x1B3; + } +// TAU_LOGD("51[%04X][%04X]", rd_51_val, rd_51_val2); + + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, rd_51_val2>>8, rd_51_val2&0x00FF); + + return true; +} +#endif + +static bool ap_get_reg_ca(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + value_reg_ca = (dcs_packet->packet_param[0] << 8) + dcs_packet->packet_param[1]; + //TAU_LOGD("CA[%x]", value_reg_ca); + + return true; +} + +#if 0 +static bool ap_get_reg_b5(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + value_reg_b5 = (dcs_packet->packet_param[3] << 8) + dcs_packet->packet_param[2]; + TAU_LOGD("CA[%4x],B1[%4x],B5[%4x]", value_reg_ca,value_reg_b1,value_reg_b5); + + return true; +} +#endif + +#ifdef ADD_PANEL_DISPLAY_MODE +uint8_t panel_mode =1; // DFĴ100:ۿ,01:۹,11:3(ӰԺ/Ƭ/.Ŀǰû) +uint16_t panel_r,panel_g,panel_b; // ¼RGBֵ + +#ifdef USE_FOR_SUMSUNG_S9PLUS +#define RATIO_VALUE 2 //Żϵ +#else +#define RATIO_VALUE 2 //Żϵ +#endif + +#endif + +static bool ap_get_reg_df(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ +#ifdef ADD_PANEL_DISPLAY_MODE + value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; + panel_mode = dcs_packet->packet_param[0]; + panel_r =dcs_packet->packet_param[49]; + panel_g =dcs_packet->packet_param[51]; + panel_b =dcs_packet->packet_param[53]; +// TAU_LOGD("value_reg_df[%4x],panel_mode[%4x],panel_r[%4x],panel_g[%4x],panel_b[%4x]", value_reg_df,panel_mode,panel_r,panel_g,panel_b); + + if (panel_mode ==00) + { + //ģʽ + + #ifdef USE_FOR_S10_BLUE_MODE + //panel_r =256-RATIO_VALUE*(0xFF-panel_r); + //panel_g =256-RATIO_VALUE*(0xFF-panel_g); + //panel_b =256-RATIO_VALUE*(0xFF-panel_b); + // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); + + + #else + + value_reg_df =value_reg_df&0xFF; + switch(value_reg_df) + { + case 0xC1: + case 0xC3: + value_blue = BLUE_MIN; + break; + + case 0xCF: + case 0xD0: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; + break; + + case 0xD8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; + break; + + case 0xDE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; + break; + + case 0xE4: + case 0xE5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; + break; + + case 0xE9: + case 0xEA: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; + break; + + case 0xED: + case 0xEE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; + break; + + case 0xF1: + case 0xF2: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; + break; + + case 0xF4: + case 0xF5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; + break; + + case 0xF7: + case 0xF8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; + break; + + case 0xFA: + value_blue = BLUE_MAX; + break; + + default: + case 0xFF: + value_blue = 0; + break; + + } + hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256,256,256); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + + #endif + + } + else + { + #ifndef USE_FOR_S10_BLUE_MODE + value_blue =0; + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); //ģʽs8+/s9+ + #endif + + //һ㣬ЧԡҪݿͻҪϸ + + panel_r =256-RATIO_VALUE*(0xFF-panel_r); + panel_g =256-RATIO_VALUE*(0xFF-panel_g); + panel_b =256-RATIO_VALUE*(0xFF-panel_b); + //hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); + } + + #ifndef USE_FOR_S10_BLUE_MODE + if (blue_flag==0) + { + blue_flag =1; + delayMs(20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + } + #endif + +#else + value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; + + value_reg_df =value_reg_df&0xFF; + switch(value_reg_df) + { + case 0xC1: + case 0xC3: + value_blue = BLUE_MIN; + break; + + case 0xCF: + case 0xD0: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; + break; + + case 0xD8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; + break; + + case 0xDE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; + break; + + case 0xE4: + case 0xE5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; + break; + + case 0xE9: + case 0xEA: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; + break; + + case 0xED: + case 0xEE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; + break; + + case 0xF1: + case 0xF2: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; + break; + + case 0xF4: + case 0xF5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; + break; + + case 0xF7: + case 0xF8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; + break; + + case 0xFA: + value_blue = BLUE_MAX; + break; + + default: + case 0xFF: + value_blue = 0; + break; + + } + + TAU_LOGD("df[%4x]", value_reg_df); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + if (blue_flag==0) + { + blue_flag =1; + delayMs(20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + } +#endif + + return true; +} + + + +/* ƻDCS command */ +static const hal_dcs_execute_entry_t g_cus_rx_dcs_execute_table[] = +{ + {DCS_SET_DISPLAY_ON, ap_set_display_on, true}, + {DCS_SET_DISPLAY_OFF, ap_set_display_off, true}, + //{0xDF, ap_get_reg_df, false}, // + //{0xCA, ap_get_reg_ca, false}, // ⡣ҪB1ܵ + {0x51, ap_set_backlight, false}, + {0x60, ap_update_frame_rate, true}, + {DCS_ENTER_SLEEP_MODE, ap_set_enter_sleep_mode, true}, + {DCS_EXIT_SLEEP_MODE, ap_set_exit_sleep_mode, true}, + {0, NULL, false} //{0,NULL,false} һ̶ԱΪtableβжϱ׼ +}; + +static void tx_panel_reset(void) +{ +#ifdef USE_WL518_INTERNAL_FLASH + hal_system_share_flash_mode(true); +#endif + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); + delayMs(10); //10ms + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW); + delayMs(10); //10ms + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); + delayMs(10); +} + + +#if PANEL_INIT_CODE_ARRAY +static void send_panel_init_code(uint32_t size, uint8_t * data) +{ + uint32_t data_offeset = 0; + uint8_t data_type; + uint8_t vc; + uint8_t data_size; + uint8_t * p_data; + + while(data_offeset < size) + { + data_type = data[data_offeset]; + vc = data[data_offeset + 1]; + data_size = data[data_offeset + 2]; + p_data = &data[data_offeset + 3]; + hal_dsi_tx_ctrl_write_array_cmd(data_type, vc, data_size, p_data); + data_offeset = data_offeset + data_size + 3; + delayUs(5); + } +} + +const uint8_t panel_init_code[] = { + +#if AMOLED_NT37701_CSOT667 + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 9, 0xBA,0x02,0x79,0x00,0x14,0x03,0x9C,0x00,0x01, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 9, 0xBA,0x01,0xAF,0x00,0x14,0x00,0x1C,0x00,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 8, 0xBA,0x01,0x66,0x00,0x14,0x00,0x1C,0x00, + 0x39, 0, 9, 0xBB,0x02,0x79,0x00,0x14,0x03,0x9C,0x00,0x21, + 0x39, 0, 2, 0xB5,0x84, + 0x39, 0, 2, 0x6F,0x06, + 0x39, 0, 4, 0xB5,0x2B,0x0C,0x33, + 0x39, 0, 2, 0x6F,0x0B, + 0x39, 0, 4, 0xB5,0x2B,0x23,0x33, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 6, 0xB5,0x0C,0x0C,0x0C,0x0C,0x0C, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 2, 0xB6,0x19, + 0x39, 0, 19, 0xB7,0x99,0x99,0x99,0x99,0x99,0x99,0x87,0x65,0x43,0x32,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x13, + 0x39, 0, 13, 0xB7,0x00,0x00,0x01,0x13,0x78,0x89,0x9A,0xAB,0xBC,0xCD,0xDE,0xEF, + 0x39, 0, 2, 0x6F,0x1F, + 0x39, 0, 25, 0xB7,0x08,0x31,0x66,0x8F,0xF5,0xC1,0xC2,0x33,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0xFF, + 0x39, 0, 3, 0xB2,0x98,0x60, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 2, 0xB2,0x40, + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 9, 0xB2,0x20,0x20,0x21,0xC2,0x21,0xC2,0x2F,0xFF, + 0x39, 0, 13, 0xB3,0x00,0x08,0x00,0x1C,0x00,0x1C,0x00,0x3C,0x00,0x3C,0x00,0x70, + 0x39, 0, 2, 0x6F,0x0C, + 0x39, 0, 13, 0xB3,0x00,0x70,0x00,0xC8,0x00,0xC8,0x01,0x48,0x01,0x48,0x01,0xAD, + 0x39, 0, 2, 0x6F,0x18, + 0x39, 0, 13, 0xB3,0x01,0xAD,0x01,0xC2,0x01,0xC2,0x01,0xC2,0x07,0xFF,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 9, 0xB3,0x01,0x55,0x08,0xCC,0x08,0xCC,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x2C, + 0x39, 0, 15, 0xB3,0x09,0x90,0x08,0xDC,0x08,0x70,0x08,0x70,0x07,0xC8,0x07,0xC8,0x06,0xB8, + 0x39, 0, 2, 0x6F,0x3A, + 0x39, 0, 13, 0xB3,0x06,0xB8,0x04,0xE8,0x04,0xE8,0x02,0x48,0x02,0x48,0x00,0x38, + 0x39, 0, 2, 0x6F,0x46, + 0x39, 0, 13, 0xB3,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38, + 0x39, 0, 15, 0xB4,0x0D,0x10,0x0C,0x1C,0x0B,0x88,0x0B,0x88,0x0A,0xA0,0x0A,0xA0,0x09,0x28, + 0x39, 0, 2, 0x6F,0x0E, + 0x39, 0, 13, 0xB4,0x09,0x28,0x06,0xB0,0x06,0xB0,0x03,0x18,0x03,0x18,0x00,0x48, + 0x39, 0, 2, 0x6F,0x1A, + 0x39, 0, 13, 0xB4,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48, + 0x39, 0, 2, 0x6F,0x26, + 0x39, 0, 11, 0xB4,0x0D,0x10,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 15, 0xB4,0x09,0x90,0x08,0xDC,0x08,0x70,0x08,0x70,0x07,0xC8,0x07,0xC8,0x06,0xB8, + 0x39, 0, 2, 0x6F,0x3E, + 0x39, 0, 13, 0xB4,0x06,0xB8,0x04,0xE8,0x04,0xE8,0x02,0x48,0x02,0x48,0x00,0x38, + 0x39, 0, 2, 0x6F,0x4A, + 0x39, 0, 13, 0xB4,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38, + 0x39, 0, 2, 0x6F,0xAC, + 0x39, 0, 21, 0xB2,0x0F,0xFF,0x0F,0xFF,0x08,0x09,0x08,0x6C,0x08,0xCA,0x09,0x24,0x09,0x79,0x09,0xCB,0x0A,0x1A,0x0A,0x66, + 0x39, 0, 2, 0x6F,0xC0, + 0x39, 0, 21, 0xB2,0x0A,0xB0,0x0A,0xF7,0x0B,0x3D,0x0B,0x80,0x0B,0xC1,0x0C,0x01,0x0C,0x40,0x0C,0x7C,0x0C,0xB8,0x0C,0xF2, + 0x39, 0, 2, 0x6F,0xD4, + 0x39, 0, 21, 0xB2,0x0D,0x2B,0x0D,0x63,0x0D,0x9A,0x0D,0xCF,0x0E,0x04,0x0E,0x38,0x0E,0x6B,0x0E,0x9D,0x0E,0xCF,0x0E,0xFF, + 0x39, 0, 2, 0x6F,0xE8, + 0x39, 0, 11, 0xB2,0x0F,0x2F,0x0F,0x5E,0x0F,0x8D,0x0F,0xBB,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x52, + 0x39, 0, 21, 0xB3,0x01,0xC2,0x01,0xC3,0x01,0xF5,0x02,0x27,0x02,0x59,0x02,0x8B,0x02,0xBD,0x02,0xEF,0x03,0x21,0x03,0x53, + 0x39, 0, 2, 0x6F,0x66, + 0x39, 0, 21, 0xB3,0x03,0x84,0x03,0xB6,0x03,0xE8,0x04,0x1A,0x04,0x4C,0x04,0x7E,0x04,0xB0,0x04,0xE2,0x05,0x14,0x05,0x46, + 0x39, 0, 2, 0x6F,0x7A, + 0x39, 0, 21, 0xB3,0x05,0x78,0x05,0xA9,0x05,0xDB,0x06,0x0D,0x06,0x3F,0x06,0x71,0x06,0xA3,0x06,0xD5,0x07,0x07,0x07,0x39, + 0x39, 0, 2, 0x6F,0x8E, + 0x39, 0, 9, 0xB3,0x07,0x6B,0x07,0x9D,0x07,0xCE,0x07,0xFF, + 0x39, 0, 3, 0xB9,0x00,0x96, + 0x39, 0, 3, 0xBD,0x04,0xB0, + 0x39, 0, 4, 0xC0,0x76,0xF3,0xC1, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 2, 0xC0,0x40, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 3, 0xC0,0x20,0x20, + 0x39, 0, 2, 0x6F,0x02, + 0x39, 0, 7, 0xC1,0x24,0x86,0x00,0x57,0x00,0x45, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 3, 0xC1,0x00,0x86, + 0x39, 0, 2, 0xC5,0x05, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 2, 0xC3,0x00, + 0x39, 0, 15, 0xC6,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55, + 0x39, 0, 2, 0xCA,0x12, + 0x39, 0, 2, 0xB9,0x00, + 0x39, 0, 5, 0xBE,0x0E,0x0B,0x14,0x13, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 2, 0xBE,0x8A, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 2, 0x6F,0x2A, + 0x39, 0, 2, 0xD9,0x43, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x01, + 0x39, 0, 11, 0xB5,0x00,0xB0,0x00,0x98,0x00,0x98,0x00,0xB0,0x00,0x98, + 0x39, 0, 11, 0xB6,0x01,0x38,0x00,0xD0,0x00,0xD0,0x01,0x38,0x00,0xD0, + 0x39, 0, 13, 0xC2,0x00,0xB0,0x01,0x38,0x00,0xB0,0x01,0x38,0x00,0xB0,0x01,0x38, + 0x39, 0, 3, 0xB0,0x04,0x04, + 0x39, 0, 3, 0xB3,0x13,0x13, + 0x39, 0, 7, 0xB7,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B, + 0x39, 0, 3, 0xB1,0x08,0x08, + 0x39, 0, 3, 0xB4,0x13,0x13, + 0x39, 0, 8, 0xB8,0x46,0x46,0x46,0x46,0x46,0x46,0x46, + 0x39, 0, 29, 0xB9,0x00,0x1F,0x00,0x00,0x00,0x1F,0x00,0x00,0x1F,0x00,0x00,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 6, 0xBB,0x03,0x94,0x00,0x19,0x3C, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 2, 0x6F,0x18, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 2, 0x6F,0x2B, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 2, 0x6F,0x3E, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 5, 0xBA,0x10,0x10,0x10,0x10, + 0x39, 0, 3, 0xC4,0x80,0x03, + 0x39, 0, 2, 0xC7,0x01, + 0x39, 0, 3, 0xCD,0x05,0x81, + 0x39, 0, 2, 0xCF,0x1D, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 5, 0xCE,0x00,0x01,0x00,0x00, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 2, 0xD2,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 2, 0xD8,0x0C, + 0x39, 0, 2, 0xD9,0xAB, + 0x39, 0, 2, 0xD1,0x07, + 0x39, 0, 2, 0x6F,0x02, + 0x39, 0, 2, 0xD1,0x06, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 2, 0xD1,0x06, + 0x39, 0, 3, 0xD6,0x00,0x40, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 25, 0xB9,0x00,0x04,0x00,0x0C,0x00,0x14,0x00,0x1C,0x00,0x2C,0x00,0x3C,0x00,0x4C,0x00,0x5C,0x00,0x7C,0x00,0x9C,0x00,0xBC,0x00,0xDC, + 0x39, 0, 25, 0xBA,0x00,0xFC,0x01,0x3C,0x01,0x7C,0x01,0xBC,0x01,0xFC,0x02,0x7C,0x02,0xFC,0x03,0x7C,0x03,0xBC,0x03,0xDC,0x03,0xFC,0x03,0xFF, + 0x39, 0, 2, 0xBC,0x11, + 0x39, 0, 17, 0xBD,0x96,0x00,0x69,0x00,0x00,0x96,0x00,0x69,0xBB,0x44,0x44,0xBB,0xEE,0x11,0x11,0xEE, + 0x39, 0, 2, 0xC1,0x02, + 0x39, 0, 9, 0xC2,0x19,0x00,0x91,0x00,0x19,0x00,0x91,0x00, + 0x39, 0, 3, 0xC0,0x00,0x00, + 0x39, 0, 2, 0xCE,0x01, + 0x39, 0, 2, 0xCC,0x00, + +#if 1 + ///////////#1_gamma.txt/////////////// + + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0xCC,0x30, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0xBF,0x09, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0x3C,0x02,0x8A,0x02,0xD8,0x03,0x19,0x03,0x99,0x04,0x02,0x04,0x58,0x04,0xAC, + 0x39, 0, 19, 0xB1,0x05,0x37,0x05,0xA7,0x06,0x15,0x06,0x6F,0x06,0xC7,0x07,0x5D,0x07,0xE1,0x08,0x5E,0x08,0xD2, + 0x39, 0, 15, 0xB2,0x09,0xB8,0x0A,0x91,0x0B,0x68,0x0B,0xD7,0x0C,0x12,0x0C,0x4A,0x0C,0x4A, + 0x39, 0, 19, 0xB3,0x00,0x00,0x01,0xB0,0x02,0x29,0x02,0x75,0x02,0xB7,0x03,0x38,0x03,0x98,0x03,0xE4,0x04,0x2E, + 0x39, 0, 19, 0xB4,0x04,0xA4,0x05,0x05,0x05,0x65,0x05,0xB3,0x06,0x00,0x06,0x7F,0x06,0xF5,0x07,0x60,0x07,0xC1, + 0x39, 0, 15, 0xB5,0x08,0x80,0x09,0x33,0x09,0xE4,0x0A,0x38,0x0A,0x61,0x0A,0x8C,0x0A,0x8C, + 0x39, 0, 19, 0xB6,0x00,0x00,0x01,0xE6,0x02,0x6C,0x02,0xDC,0x03,0x31,0x03,0xD7,0x04,0x53,0x04,0xB4,0x05,0x14, + 0x39, 0, 19, 0xB7,0x05,0xA4,0x06,0x1A,0x06,0x8E,0x06,0xEF,0x07,0x4E,0x07,0xEC,0x08,0x7D,0x09,0x03,0x09,0x83, + 0x39, 0, 15, 0xB8,0x0A,0x7F,0x0B,0x79,0x0C,0x72,0x0C,0xFB,0x0D,0x42,0x0D,0x8E,0x0D,0x8E, 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0xB0,0x00,0x00,0x03,0xCD,0x03,0xD2,0x03,0xD7,0x03,0xDC,0x03,0xF4,0x04,0x10,0x04,0x2A,0x04,0x42, + 0x39, 0, 19, 0xB1,0x04,0x6F,0x04,0x99,0x04,0xC1,0x04,0xF0,0x05,0x17,0x05,0x62,0x05,0xAB,0x05,0xED,0x06,0x2E, + 0x39, 0, 15, 0xB2,0x06,0x9C,0x06,0xFE,0x07,0x5C,0x07,0x8C,0x07,0xA0,0x07,0xB2,0x07,0xB2, + 0x39, 0, 19, 0xB3,0x00,0x00,0x03,0x2F,0x03,0x37,0x03,0x3F,0x03,0x44,0x03,0x4B,0x03,0x54,0x03,0x5B,0x03,0x6D, + 0x39, 0, 19, 0xB4,0x03,0x8F,0x03,0xB8,0x03,0xE0,0x04,0x0E,0x04,0x38,0x04,0x8A,0x04,0xCF,0x05,0x0D,0x05,0x49, + 0x39, 0, 15, 0xB5,0x05,0xAF,0x06,0x06,0x06,0x56,0x06,0x79,0x06,0x8C,0x06,0x9E,0x06,0x9E, + 0x39, 0, 19, 0xB6,0x00,0x00,0x03,0x72,0x03,0x78,0x03,0x7E,0x03,0x83,0x03,0x9B,0x03,0xB6,0x03,0xCF,0x03,0xF0, + 0x39, 0, 19, 0xB7,0x04,0x30,0x04,0x70,0x04,0xAE,0x04,0xF1,0x05,0x27,0x05,0x91,0x05,0xEF,0x06,0x3F,0x06,0x8D, + 0x39, 0, 15, 0xB8,0x07,0x11,0x07,0x80,0x07,0xE1,0x08,0x11,0x08,0x28,0x08,0x3D,0x08,0x3D, + 0x39, 0, 2, 0xCE,0x01, + 0x39, 0, 2, 0xCC,0x00, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 25, 0xB9,0x00,0x04,0x00,0x0C,0x00,0x14,0x00,0x1C,0x00,0x2C,0x00,0x3C,0x00,0x5C,0x00,0x7C,0x00,0x9C,0x00,0xBC,0x00,0xDC,0x00,0xFC, + 0x39, 0, 25, 0xBA,0x01,0x3C,0x01,0x7C,0x01,0xBC,0x01,0xFC,0x02,0x3C,0x02,0x7C,0x02,0xFC,0x03,0x7C,0x03,0xBC,0x03,0xDC,0x03,0xFC,0x03,0xFF, + + /////////#1_gamma.txt end/////////// +#endif + + + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x03, + 0x39, 0, 6, 0xB2,0x00,0x1F,0x1F,0x06,0x01, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 13, 0xB2,0x00,0x10,0x10,0x00,0x0F,0x0F,0x00,0x10,0x10,0x00,0x1F,0x1F, + 0x39, 0, 2, 0x6F,0x11, + 0x39, 0, 9, 0xB2,0x06,0x01,0x06,0x01,0x06,0x01,0x06,0x01, + 0x39, 0, 2, 0x6F,0x19, + 0x39, 0, 2, 0xB2,0x00, + 0x39, 0, 16, 0xB6,0xF0,0x1C,0x1C,0x00,0x10,0x01,0x00,0x10,0x01,0x00,0x10,0x01,0x00,0x1C,0x1C, + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 4, 0xB6,0x1F,0x00,0x0A, + 0x39, 0, 2, 0x6F,0x1A, + 0x39, 0, 4, 0xB6,0x0F,0x00,0x0A, + 0x39, 0, 2, 0x6F,0x25, + 0x39, 0, 4, 0xB6,0x0F,0x00,0x0A, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 4, 0xB6,0x0F,0x00,0x0A, + 0x39, 0, 17, 0xBB,0x11,0x00,0x1D,0x7E,0x00,0x0F,0x5E,0x00,0x0E,0x4C,0x00,0x00,0x00,0x00,0x1D,0x7E, + 0x39, 0, 17, 0xBC,0x22,0x10,0x1D,0x5C,0x00,0x0F,0x3C,0x00,0x0E,0x29,0x00,0x00,0x00,0x00,0x1D,0x5C, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x04, + 0x39, 0, 2, 0xC2,0x14, + 0x39, 0, 2, 0xB1,0x02, + 0x39, 0, 2, 0xB2,0x40, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 4, 0xB2,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x04, + 0x39, 0, 4, 0xB2,0x09,0xE3,0x40, + 0x39, 0, 2, 0x6F,0x07, + 0x39, 0, 4, 0xB2,0x09,0xE4,0x00, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 4, 0xB2,0x09,0xE3,0x40, + 0x39, 0, 2, 0xCB,0x86, + 0x39, 0, 5, 0xD0,0x00,0x00,0x00,0x10, + 0x39, 0, 2, 0x6F,0x04, + 0x39, 0, 2, 0xD0,0x01, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 6, 0xCB,0x05,0x0F,0x1F,0x3E,0x7C, + 0x39, 0, 2, 0x6F,0x06, + 0x39, 0, 11, 0xCB,0x00,0x08,0x00,0x3C,0x01,0x48,0x07,0xFF,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 6, 0xD2,0x12,0x0C,0x0C,0x0A,0x06, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 6, 0xD2,0x30,0x14,0x16,0x0E,0x0A, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 6, 0xD2,0x48,0x20,0x16,0x12,0x0E, + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 6, 0xD2,0x44,0x20,0x16,0x12,0x15, + 0x39, 0, 2, 0x6F,0x14, + 0x39, 0, 6, 0xD2,0x40,0x20,0x16,0x12,0x12, + 0x39, 0, 2, 0x6F,0x19, + 0x39, 0, 6, 0xD2,0xFF,0xE4,0xA9,0x40,0x30, + 0x39, 0, 2, 0x6F,0x1E, + 0x39, 0, 6, 0xD2,0xFF,0xD8,0x40,0x26,0x20, + 0x39, 0, 2, 0x6F,0x23, + 0x39, 0, 6, 0xD2,0xFF,0x8F,0x40,0x26,0x1F, + 0x39, 0, 2, 0x6F,0x28, + 0x39, 0, 6, 0xD2,0x9F,0x60,0x40,0x20,0x1B, + 0x39, 0, 2, 0x6F,0x2D, + 0x39, 0, 6, 0xD2,0x84,0x40,0x40,0x20,0x1B, + 0x39, 0, 2, 0x6F,0x32, + 0x39, 0, 6, 0xD2,0x12,0x08,0x10,0x10,0x06, + 0x39, 0, 2, 0x6F,0x37, + 0x39, 0, 6, 0xD2,0x30,0x08,0x15,0x0B,0x0A, + 0x39, 0, 2, 0x6F,0x3C, + 0x39, 0, 6, 0xD2,0x46,0x08,0x10,0x10,0x0C, + 0x39, 0, 2, 0x6F,0x41, + 0x39, 0, 6, 0xD2,0x30,0x1A,0x10,0x16,0x16, + 0x39, 0, 2, 0x6F,0x46, + 0x39, 0, 6, 0xD2,0x30,0x1A,0x10,0x12,0x12, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 6, 0xD4,0x08,0x08,0x04,0x0C,0x06, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 6, 0xD4,0x29,0x18,0x10,0x0D,0x0A, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 6, 0xD4,0x40,0x14,0x10,0x11,0x0C, + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 6, 0xD4,0x40,0x1F,0x13,0x14,0x10, + 0x39, 0, 2, 0x6F,0x14, + 0x39, 0, 6, 0xD4,0x5f,0x16,0x14,0x16,0x13, + 0x39, 0, 2, 0x6F,0x19, + 0x39, 0, 6, 0xD4,0xFF,0xFF,0xA0,0x50,0x2F, + 0x39, 0, 2, 0x6F,0x1E, + 0x39, 0, 6, 0xD4,0xFF,0xF0,0x9A,0x30,0x0C, + 0x39, 0, 2, 0x6F,0x23, + 0x39, 0, 6, 0xD4,0xFF,0xA0,0x6A,0x30,0x0F, + 0x39, 0, 2, 0x6F,0x28, + 0x39, 0, 6, 0xD4,0xF0,0x80,0x40,0x30,0x12, + 0x39, 0, 2, 0x6F,0x2D, + 0x39, 0, 6, 0xD4,0xB0,0x40,0x40,0x30,0x14, + 0x39, 0, 2, 0x6F,0x32, + 0x39, 0, 6, 0xD4,0x04,0x04,0x04,0x0A,0x05, + 0x39, 0, 2, 0x6F,0x37, + 0x39, 0, 6, 0xD4,0x32,0x14,0x10,0x0B,0x07, + 0x39, 0, 2, 0x6F,0x3C, + 0x39, 0, 6, 0xD4,0x40,0x18,0x10,0x0C,0x09, + 0x39, 0, 2, 0x6F,0x41, + 0x39, 0, 6, 0xD4,0x20,0x1C,0x1A,0x0E,0x0B, + 0x39, 0, 2, 0x6F,0x46, + 0x39, 0, 6, 0xD4,0xB5,0x18,0x18,0x08,0x0C, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x05, + 0x39, 0, 3, 0xC7,0x07,0x01, + 0x39, 0, 4, 0xB0,0x07,0x21,0x00, + 0x39, 0, 3, 0xB3,0x86,0x80, + 0x39, 0, 3, 0xB5,0x85,0x81, + 0x39, 0, 5, 0xB7,0x85,0x00,0x00,0x81, + 0x39, 0, 5, 0xB8,0x85,0x00,0x00,0x81, + 0x39, 0, 5, 0xB9,0x85,0x00,0x00,0x81, + 0x39, 0, 4, 0xD0,0x00,0x03,0x10, + 0x39, 0, 5, 0xE0,0x82,0x00,0x00,0x02, + 0x39, 0, 4, 0xD1,0x00,0x01,0x10, + 0x39, 0, 5, 0xE1,0x82,0x00,0x00,0x02, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x06, + 0x39, 0, 6, 0xB0,0x13,0x32,0x12,0x32,0x04, + 0x39, 0, 6, 0xB1,0x32,0x31,0x0E,0x32,0x31, + 0x39, 0, 6, 0xB2,0x32,0x00,0x32,0x31,0x32, + 0x39, 0, 2, 0xB3,0x0F, + 0x39, 0, 6, 0xB6,0x13,0x32,0x12,0x32,0x04, + 0x39, 0, 6, 0xB7,0x32,0x31,0x0E,0x32,0x31, + 0x39, 0, 6, 0xB8,0x32,0x00,0x32,0x31,0x32, + 0x39, 0, 2, 0xB9,0x0F, + 0x39, 0, 2, 0xD0,0x01, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x07, + 0x39, 0, 2, 0xB4,0xC0, + 0x39, 0, 6, 0xB0,0x84,0xC0,0x78,0x70,0x00, + 0x39, 0, 7, 0xB1,0x0C,0x1C,0x00,0x1C,0x0C,0x00, + 0x39, 0, 2, 0xB2,0x20, + 0x39, 0, 2, 0x6F,0x36, + 0x39, 0, 2, 0xB2,0x32, + 0x39, 0, 2, 0x6F,0x3F, + 0x39, 0, 2, 0xB2,0x04, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 2, 0xB2,0x20, + 0x39, 0, 2, 0x6F,0x48, + 0x39, 0, 2, 0xB2,0x32, + 0x39, 0, 2, 0x6F,0x51, + 0x39, 0, 2, 0xB2,0x04, + 0x39, 0, 2, 0x6F,0x12, + 0x39, 0, 2, 0xB2,0xF0, + 0x39, 0, 2, 0x6F,0x5A, + 0x39, 0, 2, 0xB2,0x03, + 0x39, 0, 2, 0x6F,0x63, + 0x39, 0, 2, 0xB2,0x9B, + 0x39, 0, 2, 0x6F,0x1B, + 0x39, 0, 2, 0xB2,0x20, + 0x39, 0, 2, 0x6F,0x6C, + 0x39, 0, 2, 0xB2,0x32, + 0x39, 0, 2, 0x6F,0x75, + 0x39, 0, 2, 0xB2,0x04, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 2, 0xB2,0x20, + 0x39, 0, 2, 0x6F,0x7E, + 0x39, 0, 2, 0xB2,0x32, + 0x39, 0, 2, 0x6F,0x87, + 0x39, 0, 2, 0xB2,0x04, + 0x39, 0, 2, 0x6F,0x2D, + 0x39, 0, 2, 0xB2,0xCC, + 0x39, 0, 2, 0x6F,0x90, + 0x39, 0, 2, 0xB2,0x03, + 0x39, 0, 2, 0x6F,0x99, + 0x39, 0, 2, 0xB2,0x3A, + 0x39, 0, 2, 0xB4,0xC0, + 0x39, 0, 3, 0xB7,0x00,0x00, + 0x39, 0, 6, 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+ 0x39, 0, 17, 0xB9,0x80,0x80,0x7D,0x7E,0x7B,0x7B,0x77,0x73,0x80,0x80,0x82,0x81,0x80,0x7F,0x7E,0x7B, + 0x39, 0, 2, 0x6F,0x90, + 0x39, 0, 17, 0xB9,0x78,0x80,0x80,0x81,0x82,0x82,0x82,0x81,0x7F,0x7C,0x80,0x80,0x80,0x83,0x86,0x86, + 0x39, 0, 2, 0x6F,0xA0, + 0x39, 0, 17, 0xB9,0x85,0x81,0x7D,0x80,0x80,0x82,0x81,0x84,0x85,0x87,0x85,0x88,0x80,0x80,0x81,0x8B, + 0x39, 0, 2, 0x6F,0xB0, + 0x39, 0, 17, 0xB9,0x88,0x8A,0x8C,0x8D,0x8E,0x80,0x80,0x84,0x87,0x8A,0x8C,0x8F,0x90,0x91,0x80,0x80, + 0x39, 0, 2, 0x6F,0xC0, + 0x39, 0, 17, 0xB9,0x84,0x87,0x8A,0x8D,0x91,0x91,0x92,0x80,0x80,0x85,0x88,0x8D,0x8F,0x8F,0x95,0x96, + 0x39, 0, 2, 0x6F,0xD0, + 0x39, 0, 17, 0xB9,0x80,0x80,0x7A,0x73,0x6E,0x69,0x66,0x60,0x5D,0x80,0x80,0x80,0x80,0x76,0x74,0x70, + 0x39, 0, 2, 0x6F,0xE0, + 0x39, 0, 17, 0xB9,0x6C,0x6A,0x80,0x80,0x81,0x7F,0x7F,0x7C,0x7B,0x76,0x73,0x80,0x80,0x83,0x83,0x83, + 0x39, 0, 2, 0x6F,0xF0, + 0x39, 0, 14, 0xB9,0x82,0x82,0x7F,0x7C,0x80,0x80,0x82,0x84,0x85,0x84,0x87,0x83,0x80, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x20, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x40, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x50, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x60, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x05,0xD1,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0x70, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0x80, + 0x39, 0, 17, 0xBA,0x08,0x00,0x05,0x3E,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36, + 0x39, 0, 2, 0x6F,0x90, + 0x39, 0, 17, 0xBA,0x07,0x36,0x07,0x36,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x05,0x3E,0x07,0x36, + 0x39, 0, 2, 0x6F,0xA0, + 0x39, 0, 17, 0xBA,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x08,0x00, + 0x39, 0, 2, 0x6F,0xB0, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x05,0xD1,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0xC0, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0xD0, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0xE0, + 0x39, 0, 11, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x20, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x00,0x01,0x00, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 17, 0xBB,0x01,0x00,0x01,0x00,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x40, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x50, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x60, + 0x39, 0, 17, 0xBB,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00, + 0x39, 0, 2, 0x6F,0x70, + 0x39, 0, 17, 0xBB,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00, + 0x39, 0, 2, 0x6F,0x80, + 0x39, 0, 17, 0xBB,0x01,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x90, + 0x39, 0, 17, 0xBB,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x10,0x10, + 0x39, 0, 2, 0x6F,0xA0, + 0x39, 0, 5, 0xBB,0x80,0x80,0x80,0x00, + 0x39, 0, 2, 0xEE,0x05, + 0x39, 0, 5, 0xFF,0xAA,0x55,0xA5,0x80, + 0x39, 0, 2, 0x6F,0x1D, + 0x39, 0, 2, 0xF2,0x05, + 0x39, 0, 5, 0x3B,0x00,0x14,0x00,0x12, + 0x39, 0, 2, 0x03,0x01, + 0x39, 0, 2, 0x90,0x02, + 0x39, 0, 19, 0x91,0x89,0x28,0x00,0x0C,0xC2,0x00,0x03,0x1C,0x01,0x7E,0x00,0x0F,0x08,0xBB,0x04,0x3D,0x10,0xF0, + 0x39, 0, 1, 0x2C, + 0x39, 0, 5, 0x51,0x07,0xFF,0x0F,0xFF, + 0x39, 0, 2, 0x53,0x20, + 0x39, 0, 1, 0x35, + 0x39, 0, 5, 0x2A,0x00,0x00,0x04,0x37, + 0x39, 0, 5, 0x2B,0x00,0x00,0x09,0x5F, + 0x39, 0, 2, 0x2F,0x01, +#endif + +#if 1 //20221129 wlx su + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 2, 0xC0,0x77, +// 0x39, 0, 5, 0x3B,0x00,0x10,0x09,0x90, +// 0x39, 0, 2, 0x90,0x00, +// 0x05, 0, 1, 0x2C, +// 0x39, 0, 3, 0x51,0x03,0x00, +#endif + + +#if 0//BIST MODE + 0x39, 0, 6,0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 8,0xEF,0x01,0x02,0xFF,0xFF,0xFF,0x17,0xFF, + 0x39, 0, 5,0xEE,0x87,0x78,0x02,0x40 +#endif + +#endif + +}; + + + +static void init_panel(void) +{ + /* reset panel*/ + tx_panel_reset(); + + // hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH); + /* enter send initial code mode*/ + hal_dsi_tx_ctrl_enter_init_panel_mode(); +#if AMOLED_NT37701_CSOT667 +#if PANEL_INIT_CODE_ARRAY + send_panel_init_code(sizeof(panel_init_code), (uint8_t *) panel_init_code); +#endif + hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x01); //0FFF + hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); + delayMs(90); //120 + Gpio_swire_output(2, 40); + delayMs(20); + +#endif + +// hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); + + /* exit send initial code mode*/ + hal_dsi_tx_ctrl_exit_init_panel_mode(); + TAU_LOGD("Pannel init"); + delayMs(20); +} + +static void open_mipi_rx(void) +{ + /* TE */ + hal_gpio_set_mode(IO_PAD_AP_TE, IO_MODE_TEAR); + + if (g_rx_ctrl_handle == NULL) + { + /* rx ctrl handle */ + g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); + } + /* ò */ + g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; + g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; + g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; + g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; + g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; + g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; + g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; /* ɲ */ + g_rx_ctrl_handle->rx_vc = INPUT_VC; + g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; + g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; + g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; /* ע DCSб */ + g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; /* עdsc read ص,ѡ,˺Ϊʱcus_dcs_entry_tableִ */ + g_rx_ctrl_handle->pps_update_entry = pps_update_handle; +#if 1//򿪻ᵼ¿ӡϢTX +// g_rx_ctrl_handle->pq_marginal = PQ_TYPE_5; +#endif + /* ǰԤPPS, AP PPS cmdҲ */ + if (g_rx_ctrl_handle->compress_en == true) + { + + uint8_t pps[128] = {0x11,0x00,0x00,0x89,0x30,0x80,0x0C,0x30,0x05,0xA0,0x00,0x34,0x02,0xD0,0x02,0xD0, + 0x02,0x00,0x02,0x68,0x00,0x20,0x05,0xC6,0x00,0x0A,0x00,0x0C,0x01,0xE2,0x01,0x78, + 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, + 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, + 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, + 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x6B,0xF4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; + + hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 128); + } + /* ʼrx ctrl */ + hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); + + hal_dsi_rx_ctrl_set_cus_sync_line(g_rx_ctrl_handle, SYNC_LIN_NUMBER); // Ҫ򿪡˺ +// hal_dsi_rx_ctrl_set_cus_esc_clk(g_rx_ctrl_handle,20000000); + hal_dsi_rx_ctrl_hight_performan_mode(g_rx_ctrl_handle); +// hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256, 256, 211); + hal_dsi_rx_ctrl_set_te_waveform(g_rx_ctrl_handle, true, 512); + + /* rx ctrl */ + hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +} + +static void init_mipi_tx(void) +{ + if (g_tx_ctrl_handle == NULL) + { + g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); + } + g_tx_ctrl_handle->channel_id = OUTPUT_VC; + g_tx_ctrl_handle->lane_num = OUTPUT_LANE_NUMBER; + g_tx_ctrl_handle->vid_mode = OUTPUT_VIDEO_MODEL; + g_tx_ctrl_handle->cmd_tx_type = _CMD_TYPE; + g_tx_ctrl_handle->dpi_vsa = OUTPUT_VSA; + g_tx_ctrl_handle->dpi_vbp = OUTPUT_VBP; + g_tx_ctrl_handle->dpi_vfp = OUTPUT_VFP; + g_tx_ctrl_handle->dpi_hsa = OUTPUT_HSA; + g_tx_ctrl_handle->dpi_hbp = OUTPUT_HBP; + g_tx_ctrl_handle->dpi_hfp = OUTPUT_HFP; + g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_tx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; + g_tx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; + g_tx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; + g_tx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; + g_tx_ctrl_handle->tx_frame_rate = OUTPUT_FRAME_RATE;//OUTPUT_FRAME_RATE; + g_tx_ctrl_handle->tx_clkawayshs = true; + g_tx_ctrl_handle->tx_line_delay = 400; + + hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); + /* AP ûзʱĬϵʾɫ, Ϊ0 0 0(ɫ), ɫΪdebugʹ */ +#ifndef DISPLAY_ONLY + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); +#else + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0xFF); +#endif +} + +static void tx_display_on(void) +{ + init_panel(); + + // swire_init(); + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + + delayMs(300);//ʱ,⿪ + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); + +#if 0 + if(g_resolution_change) + { + hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); + //hal_dsi_rx_ctrl_set_auto_hw_filter(g_rx_ctrl_handle, true); + //TAU_LOGD("resolutio toggle\n"); + } + panel_display_done = true; +#endif +} + +static void swire_timer_callback(void *data) +{ +#ifdef USE_FOR_SUMSUNG_S20 + if(Flag_blacklight_EN) + { + hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); + } + else if(s20_power_on_flag) + { + hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); + } + else +#endif + { + hal_swire_start(12, 12, 12, 12, swire_num); + } +} + +static void swire_callback(void *data) +{ + /* swire ǷҪһֱҪֻֻͬͬ */ + //if(start_display_on == false) + { + hal_timer_start(SWIRE_TIMER, 26, swire_timer_callback, NULL); + } +} + +/* swire ʼ,ͨ hal_swire_start , ѭһֱ */ +static void swire_init() +{ + hal_swire_open(DISABLE); + hal_swire_init(); + /* swire ηɺص */ + hal_swire_register_callback(swire_callback); + hal_swire_open(ENABLE); + //hal_swire_start(12, 12, 12, 12, 43); + hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); //3~27,~,9.45V~7.43V + hal_timer_init(SWIRE_TIMER); + hal_timer_start(SWIRE_TIMER, 26, swire_timer_callback, NULL); +} + +static void soft_te_timer_cb(void *data) +{ + /* + S8 ӵTP1.8V, AC ҪȵTP1.8 ٳʼ, TP ǰҪͨTEֻֻ + */ + if (panel_display_done == false) + { + hal_dsi_rx_ctrl_gen_a_tear_signal(g_rx_ctrl_handle); + hal_timer_start(TE_TIMER, 17, soft_te_timer_cb, NULL); + } + else + { + hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); + } +} + +static void soft_te_timer_init() +{ + TAU_LOGD("soft_te_timer_init"); + hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + hal_timer_init(TE_TIMER); + hal_timer_start(TE_TIMER, 1, soft_te_timer_cb, NULL); +} + +#ifdef ADD_TIMER3_FUNCTION +static void soft_timer3_cb(void *data) +{ + hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); + tp_sleep_count++; + if(phone_DisplayOFF_count>0) + { + phone_DisplayOFF_count++; + } + +#if AUTO_CAL_TP + if (g_exit_sleep_mode) + { + if (g_cal_cnt > 0) + { + g_cal_cnt--; + if (g_cal_cnt == 0){ + g_calibration_flag = true; + TAU_LOGD("Start cal tp!\n"); + } + } + } +#endif + +#if RUN_TEST + g_run_test_cnt++; +#endif +} +#endif + +#if ADD_TP_CALIBRATION +void app_tp_calibration_exec(void) +{ + if(g_calibration_flag) + { + g_calibration_flag = false; + ap_tp_calibration(); + TAU_LOGD("calibration successful \n"); + } +} +#endif + +#if 0 // TEST RGB, From Lin +void RGB_TEST(void) +{ + tx_display_on(); + while (1) + { + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_set_overwrite_rgb(0xFF, 0x00, 0x00); // RED + delayMs(1000); + + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0xFF, 0x00); // GREEN + delayMs(1000); + + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0xFF); // BLUE + delayMs(1000); + + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_set_overwrite_rgb(0xFF, 0xFF, 0xFF); // WHITE + delayMs(1000); + + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); // BLACK + delayMs(1000); + + hal_dsi_tx_ctrl_set_partial_disp(DISABLE); + hal_dsi_tx_ctrl_set_partial_disp(ENABLE); + delayMs(1000); + + hal_dsi_tx_ctrl_set_partial_disp_area(0, 0, 0, 0); + } + +} +#endif + +void tp_heartbeat_exec(void) +{ + if (s_screen_init_complate) + { + if(hal_gpio_get_input_data(IO_PAD_TD_INT)) + { + s_heartbeat = 0; + } + else + { + if(s_heartbeat < (65536/50)) // 65536*3 = 900ms 65536/50 = 6ms + { + s_heartbeat ++; + }else + { + TAU_LOGD("hb"); + s_heartbeat = 0; + ap_tp_system_softReset(); + } + } + } +} + +#if 0//TEST +static uint8_t power_on_flag =0; +static void ap_reset_cb_test(void *data) +{ + /* лԴ */ + // hal_gpio_set_output_data_ex(POWER_IO_B, IO_LVL_HIGH, POWER_IO_A, IO_LVL_LOW); + /* VCC */ + TAU_LOGD("ap reset cb!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n"); + hal_gpio_set_ap_reset_int(DISABLE, ap_reset_cb_test, DETECT_HIGH_LVL); + power_on_flag =1; + //hal_system_set_vcc(true); + //NVIC_SystemReset(); +} +#endif + +void ap_demo(void) +{ +#if 0//TEST + hal_gpio_set_ap_reset_int(ENABLE, ap_reset_cb_test, DETECT_HIGH_LVL); + while(power_on_flag ==0) + { + ; + } +#endif + + hal_gpio_set_output_data(IO_PAD_TD_LEDPWM, IO_LVL_LOW); + hal_gpio_init_output(IO_PAD_TD_TPRSTN, IO_LVL_HIGH); + hal_gpio_init_output(IO_PAD_AP_SWIRE, IO_LVL_LOW); + hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_LOW); // LED_ON + + open_mipi_rx(); + TAU_LOGD("Pixe6 [%s %s]", __DATE__, __TIME__); + +// slave_SPI_init(); + init_mipi_tx(); + soft_te_timer_init(); +// app_tp_init(); + +#ifdef ADD_TIMER3_FUNCTION + tp_sleep_count = 0; + phone_DisplayOFF_count=1; + hal_timer_init(TIMER_NUM3); + hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); + TAU_LOGD("start timer3"); +#endif + +#if 1 // TEST RGB, From Lin +// RGB_TEST(); +//hal_dsi_tx_ctrl_set_overwrite_rgb(0xff, 0xff, 0xff); +#endif + + + while (1) + { + if (start_display_on == true ) + { + tx_display_on(); + start_display_on = false; + panel_display_done = true; + #ifndef DISABLE_TDDI_I2C_FUNCTION + /* TP ģͨѶʼ */ +// app_tp_transfer_screen_start(); + #endif + #if ENABLE_TP_WAKE_UP//жϷԭǵʱλһ(70ms)Ḷ́ΪֿʹԽж70ms,ʹøλڶʱʶ + hal_gpio_set_ap_reset_int(ENABLE, ap_reset_cb, DETECT_RISING_EDGE); + #endif + } + + if(phone_DisplayOFF_flag==1) + { + if(phone_DisplayOFF_count>1000) + { + phone_DisplayOFF_count=0; + phone_start_flag=1; + } + } + else + { + if(phone_DisplayOFF_count>20) + { + phone_DisplayOFF_count=0; + phone_start_flag=1; + hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW); //ͣ˫2~3s޴.jason_su + } + } +// app_tp_transfer_screen_int(); + #if ADD_TP_CALIBRATION +// app_tp_calibration_exec(); + #endif + +// tp_heartbeat_exec(); +// ap_tp_scan_point_record_event_exec(); + + if(g_mipi_path_off==false) + { + while (hal_dsi_rx_ctrl_dsc_async_handler(g_rx_ctrl_handle)); + } + + #if ENABLE_TP_WAKE_UP + if (g_need_enter_sleep_mode) + { + g_mipi_path_off = true; + hal_gpio_set_output_data(IO_PAD_TD_LEDPWM, IO_LVL_HIGH); + /* FIXME stop more model */ + hal_dsi_tx_ctrl_stop(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_deinit(g_tx_ctrl_handle); + hal_dsi_rx_ctrl_stop(g_rx_ctrl_handle); + hal_dsi_rx_ctrl_deinit(g_rx_ctrl_handle); + + hal_swire_open(DISABLE); + hal_swire_deinit(); + hal_timer_stop(SWIRE_TIMER); + hal_timer_deinit(SWIRE_TIMER); + tp_sleep_in=1; + //hal_gpio_init_output(IO_PAD_TD_TPRSTN, IO_LVL_LOW); + hal_system_set_vcc(false); //VCC + + TAU_LOGD("disable video path \n"); + g_need_enter_sleep_mode = false; + } + #endif + + /* enter idle mode*/ + //hal_system_idle_mode(true); + } +} + + diff --git a/src/app/ap_demo/app_tp_for_custom_s8.h b/src/app/ap_demo/app_tp_for_custom_s8.h new file mode 100644 index 0000000..e5d2eec --- /dev/null +++ b/src/app/ap_demo/app_tp_for_custom_s8.h @@ -0,0 +1,156 @@ +/******************************************************************************* +* +* +* File: app_tp_for_custom.h +* Description tp Э鴦ļضõĺ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __APP_TP_FOR_CUSTOM_S8_H__ +#define __APP_TP_FOR_CUSTOM_S8_H__ +#include "test_cfg_global.h" + +#include "string.h" +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "app_tp_transfer.h" +#include "hal_gpio.h" + +#define AP_TP_TRANSFER 1 + +#if AMOLED_NT37280 + #define PHONE_SLAVE_TRANSFER_I2C 1 //1:ʾֻоƬ֮䣬touch ݲ I2C ͨţ + #define PHONE_SLAVE_TRANSFER_SPI 0 //1:ʾֻоƬ֮䣬touch ݲ SPI ͨţ + #define SCREEN_MASTER_TRANSFER_I2C 0 //1:ʾĻоƬ֮䣬touch ݲ I2C ͨţ + #define SCREEN_MASTER_TRANSFER_SPI 1 //1:ʾĻоƬ֮䣬touch ݲ SPI ͨţ +#elif LCD_HX83112A + #define PHONE_SLAVE_TRANSFER_I2C 1 //1:ʾֻоƬ֮䣬touch ݲ I2C ͨţ + #define PHONE_SLAVE_TRANSFER_SPI 0 //1:ʾֻоƬ֮䣬touch ݲ SPI ͨţ + #define SCREEN_MASTER_TRANSFER_I2C 0 //1:ʾĻоƬ֮䣬touch ݲ I2C ͨţ + #define SCREEN_MASTER_TRANSFER_SPI 0 //1:ʾĻоƬ֮䣬touch ݲ SPI ͨţ +#else // #if LCD_TD4310 + #define PHONE_SLAVE_TRANSFER_I2C 0 //1:ʾֻоƬ֮䣬touch ݲ I2C ͨţ + #define PHONE_SLAVE_TRANSFER_SPI 1 //1:ʾֻоƬ֮䣬touch ݲ SPI ͨţ + #define SCREEN_MASTER_TRANSFER_I2C 1 //1:ʾĻоƬ֮䣬touch ݲ I2C ͨţ + #define SCREEN_MASTER_TRANSFER_SPI 0 //1:ʾĻоƬ֮䣬touch ݲ SPI ͨţ +#endif + +#ifdef USE_FOR_SUMSUNG_S20 +#define CHIP_I2C_ADDRESS 0x48 //оƬ I2C ӻַ.I2Cַ +#define SCREEN_I2C_ADDRESS 0x49 //Ļ I2C ӻַ + +#elif defined(USE_FOR_SUMSUNG_S9PLUS) +#define CHIP_I2C_ADDRESS 0x48 //оƬ I2C ӻַ +#define SCREEN_I2C_ADDRESS 0x20 //Ļ I2C ӻַ + +#else +#define CHIP_I2C_ADDRESS 0x49 //оƬ I2C ӻַ +#define SCREEN_I2C_ADDRESS 0x49 //Ļ I2C ӻַ +#endif + +#define CHIP_I2C_ADDR_BITS I2C_ADDR_BITS_7 //Ļ I2C ַλ 7/10ĬΪ7 +#define SCREEN_I2C_ADDR_BITS I2C_ADDR_BITS_7 //Ļ I2C ַλ 7/10ĬΪ7 +#define I2C_MASTER_SPEED 400000 // I2C ͨ + +#define SPI_MASTER_SPEED 10000000 // SPI ͨ + +#define BUFFER_SIZE_MAX 200 // bufrer ֽ + +#define INPUT_WIDTH_VALUE 1440 //ԭװ X ֵֵ +#define INPUT_HEIGHT_VALUE 3120 //ԭװ Y ֵֵ + +#if LCD_FT8006S_TRULY59 +#define OUTPUT_WIDTH_VALUE 720 //ά X ֵֵ +#define OUTPUT_HEIGHT_VALUE 1520 //ά Y ֵֵ + +#else +#define OUTPUT_WIDTH_VALUE 1080 //ά X ֵֵ +#define OUTPUT_HEIGHT_VALUE 2400 //ά Y ֵֵ +#endif + + +#define SCREEN_TRANSFER_WRITE false //յscreen ioжϣ֮ö +#define SCREEN_TRANSFER_READ true //յscreen ioжϣ֮Ҫ + +typedef enum +{ + I2C_ADDR_BITS_7 = 7, + I2C_ADDR_BITS_10 = 10 +} en_I2C_ADDR_BITS_mdoe; + +typedef struct +{ + uint8_t *buffer; //յscreen ioжϺͨŵķbufferָ + size_t txbuffer_size; // buffer ݳȣҪʱĿǰֻ֧4ֽ + size_t rxbuffer_size; //֮Ҫصݳ + bool read_flag; //true յscreen ioжϣ֮Ҫ +} st_screen_data; + +typedef struct +{ + const uint8_t *buffer; //ͨŵķbufferָ + size_t txbuffer_size; // buffer ݳȣҪʱĿǰֻ֧4ֽ + size_t rxbuffer_size; //֮Ҫصݳ + bool read_flag; //true յscreen ioжϣ֮Ҫ +} st_screen_const_data; + +typedef struct +{ + uint8_t reg_size; //bufferĸ + size_t write_back_size; //Ҫ͵ݳ + const uint8_t *reg_data; //buffer + const uint8_t *write_back; //bufer +} st_reg_const_data; + +typedef struct +{ + uint8_t reg_size; //bufferĸ + size_t write_back_size; //Ҫ͵ݳ + uint8_t *reg_data; //buffer + uint8_t *write_back; //bufer +} st_reg_data; + +extern io_pad_e g_screen_input_rst_pad; +extern io_pad_e g_screen_input_int_pad; +extern io_pad_e g_phone_input_rst_pad; +extern io_pad_e g_phone_output_int_pad; + +extern uint8_t phone_start_flag; + +extern const uint8_t screen_reg_int_data_size; +extern const uint8_t screen_reg_start_data_size; +extern st_screen_data screen_reg_int_data[]; +extern st_screen_const_data screen_reg_start_data[]; +extern st_reg_const_data phone_reg_const_data[]; + +/************************************************************************** +* @name : app_tp_screen_analysis_const +* @brief : screen start ׶ݽɿͻ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +uint8_t app_tp_screen_analysis_const(uint8_t transfer_now, uint8_t *rxbuffer, size_t data_size); + +/************************************************************************** +* @name : app_tp_screen_analysis_int +* @brief : screen IOжϺ ݽɿͻ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +uint8_t app_tp_screen_analysis_int(uint8_t transfer_now, uint8_t *rxbuffer, size_t data_size); + +/************************************************************************** +* @name : app_tp_phone_analysis_data +* @brief : phone ݽɿͻ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_phone_analysis_data(uint8_t *rxbuffer, size_t rxbuffer_size, const uint8_t **txbuffer, size_t *txbuffer_size); + + +#endif + diff --git a/src/app/ap_demo/app_tp_screen_transfer_data_s8.h b/src/app/ap_demo/app_tp_screen_transfer_data_s8.h new file mode 100644 index 0000000..c511a3e --- /dev/null +++ b/src/app/ap_demo/app_tp_screen_transfer_data_s8.h @@ -0,0 +1,23 @@ +/******************************************************************************* +* +* +* File: hal_tp_screen_transfer_data.h +* Description start/sleep/awake ģʽҪ͵ֵ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __HAL_TP_SCREEN_TRANSFER_DATA_S8_H__ +#define __HAL_TP_SCREEN_TRANSFER_DATA_S8_H__ + +#include "tau_common.h" + +/***************send to screen***************/ +const uint8_t screen_87_data[] = {0x87}; +const uint8_t screen_a0_00_ff_data[] = {0xa0, 0x00, 0xff}; +const uint8_t screen_a4_06_c1_data[] = {0xa4, 0x06, 0xc1}; + +/*******************************************/ + +#endif + diff --git a/src/app/ap_demo/app_tp_transfer.c b/src/app/ap_demo/app_tp_transfer.c new file mode 100644 index 0000000..837e25e --- /dev/null +++ b/src/app/ap_demo/app_tp_transfer.c @@ -0,0 +1,900 @@ +/******************************************************************************* +* +* +* File: app_tp_transfer.c +* Description touch I2C/SPI ʼԼͨ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#include "test_cfg_global.h" +#include "app_tp_transfer.h" +#include "hal_i2c_master.h" +#include "hal_i2c_slave.h" +#include "hal_spi_master.h" +#include "hal_spi_slave.h" +#include "tau_log.h" +#include "tau_delay.h" + +#if 1//def AP_TP_TRANSFER +uint8_t read_point; //ǰҪıһ8BYTE +uint8_t s_screen_number[2]; +uint8_t s_screen_temp[2]; +uint8_t s_screen_read_bak[200]; + +static const uint8_t *s_slave_txbuffer = NULL; +static size_t s_slave_txbuffer_size = 0; + + +static uint8_t s_screen_read_buffer[BUFFER_SIZE_MAX]; +static uint8_t s_phone_read_buffer[BUFFER_SIZE_MAX]; + +static bool s_spim_write = false; //¼SPIǷ÷ͣǵĻҪRXFIFO +static bool s_screen_int_flag = false; //¼ǷյĻıж +static bool s_phone_reset_flag = false; //¼ǷյֻĿλź +static bool s_screen_int_transfer_status = false; //¼ǷѾʼͨ +bool s_screen_init_complate = false; //ĻTPʼɱ־ +static uint8_t s_screen_const_transfer_count = 0xff; //¼ǰͨŵһ,ʼֵ screen_reg_start_data_size +st_tp_scan_data tp_scan_data; + +#ifdef USE_FOR_SUMSUNG_S20 +uint16_t u16TouchID; +#endif +static void app_tp_transfer_phone(size_t recieve_num); +//static void app_tp_reset_callback(void *data); +#if PHONE_SLAVE_TRANSFER_I2C //warning +static void app_tp_i2cs_callback(e_i2c_s_int_status int_status, size_t recieve_num); +#endif +#if PHONE_SLAVE_TRANSFER_SPI //warning +static void app_tp_spis_callback(hal_spis_event_e event, hal_spi_packet_info_t *packet_info); +#define PHONE_SPI_CPHA 1 +#define PHONE_SPI_CPOL 1 +#endif + +#if 1 +uint8_t MI10_PRO_screen_init_data1[3] = {0xA0,0x00,0x01}; +uint8_t MI10_PRO_screen_init_data2[6] = {0xA2,0x03,0x00,0x00,0x00,0x03}; +uint8_t MI10_PRO_screen_init_data3[3] = {0xA2,0x02,0x00}; +uint8_t MI10_PRO_screen_init_data4[3] = {0xC0,0x07,0x01}; + +uint8_t MI10_PRO_screen_init_data5[3] = {0xA4,0x06,0x70}; +uint8_t MI10_PRO_screen_init_data6[3] = {0xA6,0x00,0x00}; +uint8_t MI10_PRO_screen_init_data7[5] = {0xFA,0x20,0x00,0x00,0x78}; + +uint8_t MI10_PRO_screen_init_data8[6] = {0xA2,0x03,0x20,0x00,0x00,0x00}; +uint8_t MI10_PRO_screen_init_data9[2] = {0xA0,0x01}; +uint8_t MI10_PRO_screen_init_data10[3] = {0xA0,0x00,0x00}; +#endif + +#if 1//def ADD_TP_TUNING +uint8_t MI10_PRO_TP_Tuning_data1[3] = {0xA4,0x00,0x00}; // System Reset +uint8_t MI10_PRO_TP_Tuning_data2[3] = {0xA4,0x00,0x03}; // FPnl Init +uint8_t MI10_PRO_TP_Tuning_data3[3] = {0xA4,0x00,0x02}; // Pnl Init +uint8_t MI10_PRO_TP_Tuning_data4[4] = {0xA4,0x03,0x13,0x00}; // TuneM +uint8_t MI10_PRO_TP_Tuning_data5[4] = {0xA4,0x03,0x0C,0x00}; // TuneS +uint8_t MI10_PRO_TP_Tuning_data6[3] = {0xA4,0x05,0x01}; // SvCfg +uint8_t MI10_PRO_TP_Tuning_data7[3] = {0xA4,0x05,0x02}; // SvCx +uint8_t MI10_PRO_TP_Tuning_data8[3] = {0xA4,0x05,0x04}; // SvPnl +#endif + +/************************************************************************** +* @name : app_tp_screen_int_callback +* @brief : screen ж ص +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_screen_int_callback(void *data) +{ + s_screen_int_flag = true; +} + +/************************************************************************** +* @name : app_tp_screen_int_lvl_low +* @brief : ȡ screen ж IO ƽ +* @param[in] : +* @return : trueIO Ϊ͵ƽ +* @retval : +**************************************************************************/ +static bool app_tp_screen_int_lvl_low(void) +{ +#if SCREEN_MASTER_TRANSFER_I2C + return false; +#elif SCREEN_MASTER_TRANSFER_SPI + return !hal_gpio_get_input_data(g_screen_input_int_pad); //ӦSPIͨŹżͻȻCS ͨ쳣 +#else + return false; +#endif +} + +/************************************************************************** +* @name : app_tp_screen_int_init +* @brief : screen ж IO ʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_screen_int_init(void) +{ + hal_gpio_set_pull_state(g_screen_input_int_pad, ENABLE, DISABLE); // 1. + hal_gpio_ctrl_eint(g_screen_input_int_pad, DISABLE); // 2.رж + hal_gpio_init_eint(g_screen_input_int_pad, DETECT_FALLING_EDGE); // 3.жϳʼ,TPһ㶼½شж + hal_gpio_reg_eint_cb(g_screen_input_int_pad, app_tp_screen_int_callback); // 4.עص + hal_gpio_ctrl_eint(g_screen_input_int_pad, ENABLE); // 5.ʹж +} + +#if 0 +/************************************************************************** +* @name : app_tp_phone_reset_init +* @brief : phone reset ж IO ʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_phone_reset_init(void) +{ + /*0.Ϊ*/ + hal_gpio_init_input(g_phone_input_rst_pad); + /*1.رж*/ + hal_gpio_ctrl_eint(g_phone_input_rst_pad, DISABLE); + /*2.жϳʼ*/ + hal_gpio_init_eint(g_phone_input_rst_pad, DETECT_RISING_EDGE); + /*3.עص*/ + hal_gpio_reg_eint_cb(g_phone_input_rst_pad, app_tp_reset_callback); + /*4.ʹж*/ + hal_gpio_ctrl_eint(g_phone_input_rst_pad, ENABLE); +} +#endif + +/************************************************************************** +* @name : app_tp_screen_init +* @brief : screen IO 䣬ʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_screen_init(void) +{ + hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); + delayUs(500); + hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_LOW); + delayUs(500); + hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); +} + +void slave_SPI_init(void) +{ + hal_spi_slave_init(PHONE_SPI_CPHA, PHONE_SPI_CPOL, true); // ʼspiԼdma + hal_spi_slave_register_callback(app_tp_spis_callback); // עص + hal_spi_slave_auto_transfer_abort(); // ֹͣ + hal_spi_slave_flush_fifo(); // Flush FIFO + + /* ÿpacketԶ, circle mode Ϊfalse, յbuffer max sizeݺbufferٸ, packetɺûص */ + hal_spi_slave_set_auto_rx_buffer(s_phone_read_buffer, 10, false); // auto rx buffer +// hal_spi_slave_set_auto_tx_buffer(phone_reg_const_data[0].write_back, phone_reg_const_data[0].write_back_size, false); // TX BUFFER + + hal_spi_slave_enable(); // spis + hal_spi_slave_auto_transfer_start(); // rxԶ +} + +/************************************************************************** +* @name : app_tp_init +* @brief : ʼͨ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_init(void) +{ +#ifdef DISABLE_TDDI_I2C_FUNCTION + hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO + hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET + + hal_gpio_set_mode(IO_PAD_TD_SPIM_CLK,IO_MODE_I2C1_SCL); + hal_gpio_set_mode(IO_PAD_TD_SPIM_CSN,IO_MODE_I2C1_SDA); + + return; +#else + hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CLK, ENABLE, DISABLE); + hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CSN, ENABLE, DISABLE); +#endif + + app_tp_screen_init(); //ʼֻλIO +// app_tp_screen_int_init(); //screenж +#ifdef G_PHONE_INT_DEFAULT_LOW + hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_LOW); //phoneжIO +#else + hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO +#endif + hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET + +#if SCREEN_MASTER_TRANSFER_I2C + hal_i2c_m_dma_init(SCREEN_I2C_ADDRESS, SCREEN_I2C_ADDR_BITS, I2C_MASTER_SPEED); +#elif SCREEN_MASTER_TRANSFER_SPI + hal_spi_m_dma_init(SPI_MASTER_SPEED, SCREEN_SPI_CPHA, SCREEN_SPI_CPOL); +#endif + +#if PHONE_SLAVE_TRANSFER_I2C + hal_i2c_s_init(CHIP_I2C_ADDRESS, CHIP_I2C_ADDR_BITS); + hal_i2c_s_set_transfer(app_tp_i2cs_callback); + hal_i2c_s_nonblocking_read(s_phone_read_buffer, BUFFER_SIZE_MAX); //ý buffer +#elif PHONE_SLAVE_TRANSFER_SPI +// hal_spi_slave_init(PHONE_SPI_CPHA, PHONE_SPI_CPOL, true); // ʼspiԼdma +// hal_spi_slave_register_callback(app_tp_spis_callback); // עص +// hal_spi_slave_auto_transfer_abort(); // ֹͣ +// hal_spi_slave_flush_fifo(); // Flush FIFO + +// /* ÿpacketԶ, circle mode Ϊfalse, յbuffer max sizeݺbufferٸ, packetɺûص */ +// hal_spi_slave_set_auto_rx_buffer(s_phone_read_buffer, 8, false); // auto rx buffer +//// hal_spi_slave_set_auto_tx_buffer(phone_reg_const_data[0].write_back, phone_reg_const_data[0].write_back_size, false); // TX BUFFER + +// hal_spi_slave_enable(); // spis +// hal_spi_slave_auto_transfer_start(); // rxԶ +#endif + +} + +/************************************************************************** +* @name : app_tp_m_transfer_complate +* @brief : ȡͨ״̬ +* @param[in] : +* @return :true: ͨ +* @retval : +**************************************************************************/ +bool app_tp_m_transfer_complate(void) +{ +#if SCREEN_MASTER_TRANSFER_I2C + return hal_i2c_m_transfer_complate(); +#elif SCREEN_MASTER_TRANSFER_SPI + return hal_spi_m_get_transfer_complate(); +#else + return true; +#endif +} + +/************************************************************************** +* @name : app_tp_s_transfer_complate +* @brief : ȡӻͨ״̬ +* @param[in] : +* @return :true: ͨ +* @retval : +**************************************************************************/ +bool app_tp_s_transfer_complate(void) +{ +#if SCREEN_MASTER_TRANSFER_I2C + return hal_i2c_s_write_complate() && hal_i2c_s_read_complate(); +#elif SCREEN_MASTER_TRANSFER_SPI + return !hal_spi_slave_busy(); +#else + return true; +#endif +} + +/************************************************************************** +* @name : app_tp_m_write +* @brief : ͨŷʽ÷txbufferе +* @param[in] :txbuffer: buffer ͷַ +* @param[in] :buffer_size: buffer +* @return : +* @retval : +**************************************************************************/ +static void app_tp_m_write(const uint8_t *txbuffer, size_t buffer_size) +{ +#if SCREEN_MASTER_TRANSFER_I2C + hal_i2c_m_dma_write(txbuffer, buffer_size); +#elif SCREEN_MASTER_TRANSFER_SPI + hal_spi_m_dma_write(txbuffer, buffer_size); + s_spim_write = true; +#endif +} + +/************************************************************************** +* @name : app_tp_m_read +* @brief : ͨŷʽ÷txbufferеݺrxbuffer +* @param[in] :cmd: buffer ͷַ +* @param[in] :cmd_size: buffer +* @param[in] :data_buffer: ȡ buffer ͷַ +* @param[in] :data_size: ȡ buffer +* @return : +* @retval : +**************************************************************************/ +static void app_tp_m_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size) +{ +#if SCREEN_MASTER_TRANSFER_I2C + uint8_t i = 0; + uint32_t address = 0; + + for (i = 0; i < cmd_size; i++) //ȽҪ͵ϵ address + { + address |= (uint32_t)cmd[i] << i * 8; + } + hal_i2c_m_dma_read(address, cmd_size, data_buffer, data_size); +#elif SCREEN_MASTER_TRANSFER_SPI + hal_spi_m_dma_read(cmd, cmd_size, data_buffer, data_size); +#endif +} + +/************************************************************************** +* @name : app_tp_s_write +* @brief : ͨŷʽ÷txbufferе +* @param[in] :txbuffer: buffer ͷַ +* @param[in] :buffer_size: buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size) +{ +#if PHONE_SLAVE_TRANSFER_I2C + hal_i2c_s_dma_write(txbuffer, buffer_size); +#elif PHONE_SLAVE_TRANSFER_SPI + //while (hal_spi_slave_busy()); +// hal_spi_slave_auto_transfer_abort(); +// hal_spi_slave_flush_fifo(); +// hal_spi_slave_set_auto_tx_buffer(txbuffer, buffer_size, true); +// hal_spi_slave_auto_transfer_start(); + + hal_spi_slave_reset_tx(txbuffer, buffer_size, true); +#endif +} + +/************************************************************************** +* @name : app_tp_s_read +* @brief : ͨŷʽrxbuffer +* @param[in] :rxBuffer: ȡ buffer ͷַ +* @param[in] :data_size: ȡ buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_s_read(void *rxBuffer, size_t data_size) +{ +#if PHONE_SLAVE_TRANSFER_I2C + hal_i2c_s_nonblocking_read(rxBuffer, data_size); +#endif +} + +/************************************************************************** +* @name : app_tp_spis_callback +* @brief : SPI slave жϴ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +#if PHONE_SLAVE_TRANSFER_I2C //warning +//ԡint_status=0Ϊ=2ΪSTOP=1δԵ +//recieve_numΪյָ +static void app_tp_i2cs_callback(e_i2c_s_int_status int_status, size_t recieve_num) +{ +#if 0 // 1: test + if (int_status >2) + { + s_phone_read_buffer[2]=int_status; + s_phone_read_buffer[3]=recieve_num; + app_tp_m_write(s_phone_read_buffer, 4); + } +#endif + app_tp_transfer_phone(recieve_num); +} +#endif + +/************************************************************************** +* @name : app_tp_spis_callback +* @brief : SPI slave жϴ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +#if PHONE_SLAVE_TRANSFER_SPI //warning +static void app_tp_spis_callback(hal_spis_event_e event, hal_spi_packet_info_t *packet_info) +{ +#if 0 + + if (event == SPI_EVENT_RCV_FULL) + { + + app_tp_transfer_phone(packet_info->packet_size); + + while(hal_spi_slave_busy()); + + app_tp_s_write(s_slave_txbuffer, s_slave_txbuffer_size); + hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); + } +#else + if (event == SPI_EVENT_RCV_FULL) + { + + } + else if (event == SPI_EVENT_RCV_CS_HIGH) + { + app_tp_transfer_phone(packet_info->packet_size); + app_tp_s_write(s_slave_txbuffer, s_slave_txbuffer_size); + } +#endif +} +#endif + +#if 0 +/************************************************************************** +* @name : app_tp_reset_callback +* @brief : ֻ IO临λжϴ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_reset_callback(void *data) +{ + TAU_LOGD("app_tp_reset_callback\n"); + s_phone_reset_flag = true; + app_tp_s_write(phone_reg_const_data[0].write_back, phone_reg_const_data[0].write_back_size); +#if PHONE_SLAVE_TRANSFER_SPI + hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW); +#endif +} +#endif + +void S20_Start_init(void) +{ + uint8_t len=0; + // if(phone_start_flag==1) + { + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + uint8_t lenth = sizeof(screen_reg_int_data[1])/sizeof(uint8_t); + TAU_LOGD("SCREEN reg_data_size:%d", screen_reg_int_data_size); + TAU_LOGD("SCREEN reg0_data_len:%d", lenth); + for(int i =0; i<30; i++){ + TAU_LOGD("SCREEN reg1_data0[%d]:%x\n", i, screen_reg_int_data[0].buffer[i]); + + } + //TAU_LOGD("SCREEN reg1_data0:%x\n", screen_reg_int_data[2].buffer[0]); + // TAU_LOGD("SCREEN reg1_data1:%x\n", screen_reg_int_data[2].buffer[1]); + // TAU_LOGD("SCREEN reg1_data2:%x\n", screen_reg_int_data[2].buffer[2]); + // TAU_LOGD("SCREEN reg1_data3:%x\n", screen_reg_int_data[2].buffer[3]); + // TAU_LOGD("SCREEN reg1_data4:%x\n", screen_reg_int_data[2].buffer[4]); + // TAU_LOGD("SCREEN reg1_data5:%x\n", screen_reg_int_data[2].buffer[5]); + + while(!hal_i2c_m_transfer_complate()); + delayMs(2); + while(!hal_gpio_get_input_data(g_screen_input_int_pad)) + { + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + delayMs(2); + } + app_tp_m_write(MI10_PRO_screen_init_data1, sizeof(MI10_PRO_screen_init_data1));//0xA0,0x00,0x01 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_screen_init_data2, sizeof(MI10_PRO_screen_init_data2));//0xA2,0x03,0x00,0x00,0x00,0x03 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_screen_init_data3, sizeof(MI10_PRO_screen_init_data3));//0xA2,0x02,0x00 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_screen_init_data4, sizeof(MI10_PRO_screen_init_data4));//0xC0,0x07,0x01 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + if(s_screen_read_buffer[7]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, len); + while(!hal_i2c_m_transfer_complate()); + } + if(hal_gpio_get_input_data(g_screen_input_int_pad)) + { + s_screen_init_complate = true; + app_tp_screen_int_init(); + phone_start_flag=0; + } + } +} + + + + +/************************************************************************** +* @name : app_tp_transfer_screen_const +* @brief : flowдscreen screen ʼ +* @param[in] : +* @return : +* @retval : +*޸TP1ģʼ +*ִscreen_reg_start_data[] +**************************************************************************/ +static void app_tp_transfer_screen_const(void) +{ +// static bool screen_const_transfer_buffer_ready = true; // buffer Ƿ׼ + + /**** 1. жϵǰ״̬ͨѽ, ״̬ͨѽҿʼ̻δ****/ + + if (app_tp_m_transfer_complate() && (s_screen_const_transfer_count < screen_reg_start_data_size)) + { + if (s_spim_write) //SPI дݺҪѽFIFOݶȻӰһζȡ + { + hal_spi_m_clear_rxfifo(); + s_spim_write = false; + } + + #if 1 + + if(phone_start_flag==1) + { + S20_Start_init(); + } + + #endif + } +} + +/************************************************************************** +* @name : ap_tp_calibration +* @brief : ����У׼���� +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void ap_tp_calibration(void) +{ + // app_tp_m_write(MI10_PRO_TP_Tuning_data1, sizeof(MI10_PRO_TP_Tuning_data1)); // System Reset + // while(!hal_i2c_m_transfer_complate()); + // delayMs(10); + app_tp_m_write(MI10_PRO_TP_Tuning_data2, sizeof(MI10_PRO_TP_Tuning_data2)); // FPnl Init + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data3, sizeof(MI10_PRO_TP_Tuning_data3)); // Pnl Init + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data4, sizeof(MI10_PRO_TP_Tuning_data4)); // TuneM + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data5, sizeof(MI10_PRO_TP_Tuning_data5)); // TuneS + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data6, sizeof(MI10_PRO_TP_Tuning_data6)); // SvCfg + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data7, sizeof(MI10_PRO_TP_Tuning_data7)); // SvCx + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data8, sizeof(MI10_PRO_TP_Tuning_data8)); // SvPnl + while(!hal_i2c_m_transfer_complate()); + delayMs(1); +} + +void ap_tp_scan_point_init(void) +{ + uint8_t i=0; + + for(i=0;i>4)+1; + i+=7; + + if(eventdata == 0x13) // ¼ + { + for(j=0;j0)) // ͷ¼ + { + for(j=0;j0) // в + { + TAU_LOGD("release finger %2d", tp_scan_data.tp_read_point_counter); + tp_scan_data.tp_read_point_counter = 0; + ap_tp_simulate_finger_release_event(); + } + + // printf("F %2d,%2d,%2d,%2d,%2d,%2d\n",tp_scan_data.tp_point_buffer[0],tp_scan_data.tp_point_buffer[1],tp_scan_data.tp_point_buffer[2] + // ,tp_scan_data.tp_point_buffer[3],tp_scan_data.tp_point_buffer[4],tp_scan_data.tp_point_buffer[5]); + + ap_tp_scan_point_init(); + } + } + +} + + +/************************************************************************** +* @name : app_tp_transfer_screen_start +* @brief : flowдscreenʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_transfer_screen_start(void) +{ +// s_screen_init_complate = false; + s_screen_const_transfer_count = 0; + //app_tp_screen_init(); +#ifndef DISABLE_I2C_INIT_CODE + app_tp_transfer_screen_const(); +#endif +// s_screen_int_flag = false; +} + +/************************************************************************** +* @name : app_tp_transfer_screen_int +* @brief : screenжϺ󣬰flowдscreenЭת +* @param[in] : +* @return : +* @retval : +*޸TP2ȡģ鱨㣡 +*ִscreen_reg_int_data[]ҲԼд +**************************************************************************/ +void app_tp_transfer_screen_int(void) +{ + uint8_t len=0; + bool screen_gpio_int = false; + static uint8_t screen_int_transfer_count = 0; //¼ǰͨŵһ + static bool screen_int_transfer_buffer_ready = true; // buffer Ƿ׼ +// static uint8_t test_flag = 0; +// s_screen_init_complate=false;//Ϊ¼⽫ƬΪ·ݣFT8719̩ĹͨѶ + if (!s_screen_init_complate) //TP ʼδɣȽгʼ + { + app_tp_transfer_screen_const(); + return; + } + +#if 0 //test + test_flag++; + if (test_flag >1000000) + { + test_flag =0; + //TAU_LOGD("Run ok!!\n"); + //app_tp_m_read(screen_reg_int_data[0].buffer, screen_reg_int_data[0].txbuffer_size, s_screen_number, screen_reg_int_data[0].rxbuffer_size); + //while(!hal_i2c_m_transfer_complate()); + } +#endif + + /**** 1. ж screen Ƿ񷢳жź ****/ + // s_screen_int_flag: жźű־λ + // app_tp_screen_int_lvl_low : SPI ʱͨʱżcsߵͨ쳣ñ־λڽ + screen_gpio_int = s_screen_int_flag || app_tp_screen_int_lvl_low(); + if (((screen_gpio_int) || (s_screen_int_transfer_status)) && app_tp_m_transfer_complate()) //жϵǰͨ״̬׼ͨ + { + s_screen_int_flag = false; + if (s_spim_write) //SPI дݺҪѽFIFOݶȻӰһζȡ + { + hal_spi_m_clear_rxfifo(); + s_spim_write = false; + } + + /**** 2. ͻȡӻ ****/ + if (screen_int_transfer_buffer_ready) + { + #ifndef READ_MODULE_TP_ONE_BY_ONE + screen_int_transfer_buffer_ready = false; + s_screen_int_transfer_status = true; + #if 1 + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + if(s_screen_read_buffer[7]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); + while(!hal_i2c_m_transfer_complate()); + } + delayUs(100); + while(!hal_gpio_get_input_data(g_screen_input_int_pad)) + { + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + delayUs(100); + if(s_screen_read_buffer[7]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); + while(!hal_i2c_m_transfer_complate()); + delayUs(100); + } + } + + #endif + + #endif + } + /**** 3. ͨݣ׼һͨŵbuffer ****/ + else + { + #if 1 + #ifdef USE_FOR_SUMSUNG_S20 + u16TouchID=0x0000; + #endif + screen_int_transfer_buffer_ready = true; + screen_int_transfer_count = app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer,screen_reg_int_data[2].rxbuffer_size); + screen_int_transfer_count = 0; + s_screen_int_transfer_status = false; + #endif + } + } +} + +/************************************************************************** +* @name : app_tp_transfer_phone +* @brief : ݽӦĴ +* @param[in] : recieve_numݳ +* @return : +* @retval : +**************************************************************************/ +static void app_tp_transfer_phone(size_t recieve_num) +{ + TAU_LOGD("app_tp_transfer_phone,s_phone_read_buffer[0] [1] [2]=0x%x 0x%x 0x%x recieve_num=%d!\r\n",s_phone_read_buffer[0],s_phone_read_buffer[1],s_phone_read_buffer[2],recieve_num); + app_tp_phone_analysis_data(s_phone_read_buffer, recieve_num, &s_slave_txbuffer, &s_slave_txbuffer_size); + +#if PHONE_SLAVE_TRANSFER_I2C + app_tp_s_read(s_phone_read_buffer, BUFFER_SIZE_MAX); +#endif +} + +/************************************************************************** +* @name : app_tp_phone_reset_on +* @brief : ȡֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +bool app_tp_phone_reset_on(void) +{ + return s_phone_reset_flag; +} + +/************************************************************************** +* @name : app_tp_phone_clear_reset_on +* @brief : ֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_phone_clear_reset_on(void) +{ + s_phone_reset_flag = false; +} + +#else + +void app_tp_screen_init(void) +{ + +} + +void app_tp_init(void) +{ + +} + +void app_tp_transfer_screen_int(void) +{ + +} + +void app_tp_transfer_screen_start(void) +{ + +} + +bool app_tp_phone_reset_on(void) +{ + return false; +} + +void app_tp_phone_clear_reset_on(void) +{ + +} + +void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size) +{ + +} + +bool app_tp_enter_sleep_on(void) +{ + return false; +} + +#endif + diff --git a/src/app/ap_demo/app_tp_transfer.h b/src/app/ap_demo/app_tp_transfer.h new file mode 100644 index 0000000..156b0ab --- /dev/null +++ b/src/app/ap_demo/app_tp_transfer.h @@ -0,0 +1,120 @@ +/******************************************************************************* +* +* +* File: app_tp_transfer.h +* Description touch I2C/SPI ͨغ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __APP_TP_TRANSFER_H__ +#define __APP_TP_TRANSFER_H__ + +#include "string.h" +#include "tau_device_datatype.h" +#include "tau_common.h" + +#define SCREEN_TRANSFER_WRITE false //յscreen ioжϣ֮ö +#define SCREEN_TRANSFER_READ true //յscreen ioжϣ֮Ҫ + +#define ST_TP_SCAN_POINT_NUMBER_MAX 6 + +typedef struct +{ + uint8_t tp_point_buffer[ST_TP_SCAN_POINT_NUMBER_MAX]; // ���յ� TP ���㣬���ڼ�¼������Ϣ + uint8_t tp_read_point_counter; // ͳ�Ʊ�����ֵ + uint8_t tp_point_up_error_flag; // �����ͷ��쳣��־ + uint32_t tp_point_error_time_counter; // ������ʱ�� +} st_tp_scan_data; + +/************************************************************************** +* @name : ap_tp_calibration +* @brief : ����У׼���� +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void ap_tp_calibration(void); + +void ap_tp_system_softReset(void); + +void ap_tp_scan_point_record_event_exec(void); +void ap_tp_scan_point_init(void); + +extern bool s_screen_init_complate; //ĻTPʼɱ־ + +/************************************************************************** +* @name : app_tp_screen_init +* @brief : screen IO 䣬ʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_screen_init(void); + +/************************************************************************** +* @name : app_tp_init +* @brief : ʼͨ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_init(void); + +/************************************************************************** +* @name : app_tp_transfer_screen_int +* @brief : screenжϺ󣬰flowдscreenЭת +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_transfer_screen_int(void); + +/************************************************************************** +* @name : app_tp_transfer_screen_start +* @brief : flowдscreenʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_transfer_screen_start(void); + +/************************************************************************** +* @name : app_tp_phone_reset_on +* @brief : ȡֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +bool app_tp_phone_reset_on(void); + +/************************************************************************** +* @name : app_tp_phone_clear_reset_on +* @brief : ֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_phone_clear_reset_on(void); + +/************************************************************************** +* @name : app_tp_s_write +* @brief : ͨŷʽ÷txbufferе +* @param[in] :txbuffer: buffer ͷַ +* @param[in] :buffer_size: buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size); + +/************************************************************************** +* @name : app_tp_enter_sleep_on +* @brief : ȡ tp ͨ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +bool app_tp_enter_sleep_on(void); + +#endif + diff --git a/src/app/main.c b/src/app/main.c new file mode 100644 index 0000000..185510a --- /dev/null +++ b/src/app/main.c @@ -0,0 +1,58 @@ +#include +#include +#include +#include "test_cfg_global.h" +#include "tau_log.h" +#include "hal_system.h" +#include "board.h" + +int main() +{ + board_Init(); + + while (1) + { +#if _DEMO_DSI_TX_EN + demo_dsi_tx_case(); +#endif +#if _DEMO_DSI_RX_EN + demo_hal_dsi_rx_case(); +#endif +#if _DEMO_TIMER_EN + demo_timer_case(); +#endif +#if _DEMO_WDG_EN + demo_wdg_case(); +#endif +#if _DEMO_GPIO_EN + demo_gpio_case(); +#endif +#if _DEMO_PWM_EN + demo_pwm_case(); +#endif +#if _DEMO_SWIRE_EN + demo_swire_case(); +#endif + +#if _DEMO_I2C_EN + demo_hal_spi(); +#endif + +#if _DEMO_SPI_EN + demo_hal_i2c(); +#endif + +#if _DEMO_S8_EN + s8_demo(); +#endif + +#if _DEMO_S8P_EN + s8p_demo(); +#endif + +#if _DEMO_S9_EN + ap_demo(); +#endif + while (1); + } +} diff --git a/src/app/test_cfg_global.h b/src/app/test_cfg_global.h new file mode 100644 index 0000000..b05c0eb --- /dev/null +++ b/src/app/test_cfg_global.h @@ -0,0 +1,88 @@ +/******************************************************************************* +* +* File: test_cfg_global.h +* Description： 测试用例全局配置头文件 +* Version： V0.1 +* Date： 2021-05-01 +* Author： kevin + *******************************************************************************/ + +#ifndef __TEST_GLOBAL_CONFIG_H__ +#define __TEST_GLOBAL_CONFIG_H__ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +/* 模块demo 宏定义 */ +#define _DEMO_TIMER_EN 0 +#define _DEMO_DSI_TX_EN 0 +#define _DEMO_DSI_RX_EN 0 +#define _DEMO_PWM_EN 0 +#define _DEMO_SWIRE_EN 0 +#define _DEMO_WDG_EN 0 +#define _DEMO_GPIO_EN 0 +#define _DEMO_I2C_EN 0 +#define _DEMO_SPI_EN 0 +/* ap demo 宏定义 */ +#define _DEMO_S8_EN 0 +#define _DEMO_S8P_EN 0 +#define _DEMO_S9_EN 1 +#if _DEMO_TIMER_EN + #include "demo_hal_timer.h" +#endif + +#if _DEMO_I2C_EN + #include "demo_hal_i2c.h" +#endif + +#if _DEMO_SPI_EN + #include "demo_hal_spi.h" +#endif + +#if _DEMO_DSI_TX_EN + #include "demo_hal_dsi_tx.h" +#endif + +#if _DEMO_DSI_RX_EN + #include "demo_hal_dsi_rx.h" +#endif + +#if _DEMO_PWM_EN + #include "demo_hal_pwm.h" +#endif + +#if _DEMO_SWIRE_EN + #include "demo_hal_swire.h" +#endif + +#if _DEMO_WDG_EN + #include "demo_hal_wdg.h" +#endif + +#if _DEMO_GPIO_EN + #include "demo_hal_gpio.h" +#endif + +#if _DEMO_I2C_TP_EN + #include "demo_hal_i2c_tp.h" +#endif + +#if _DEMO_S8_EN + #include "s8_demo.h" + #include "app_tp_for_custom_s8.h" +#endif + +#if _DEMO_S8P_EN + #include "s8p_demo.h" + #include "app_tp_for_custom_s8p.h" +#endif + +#if _DEMO_S9_EN + #include "ap_demo.h" + #include "app_tp_for_custom_s8.h" +#endif +#endif + diff --git a/src/board/board.c b/src/board/board.c new file mode 100644 index 0000000..f4bc88f --- /dev/null +++ b/src/board/board.c @@ -0,0 +1,26 @@ +/******************************************************************************* +* Copyright (C) 2019-2022, CVA Systems (R),All Rights Reserved. +* +* File: board.c +* Description 板级文件 +* Version V0.1 +* Date 2020-12-07 +* Author linyw +*******************************************************************************/ +#include "board.h" +#include "hal_system.h" +#include "ArmCM0.h" + +void board_Init(void) +{ + hal_system_init(SYSTEM_CLOCK); + hal_system_enable_systick(1); +#if !EDA_MODE + hal_system_init_console(115200); +#endif +#if defined(ISP_568) || defined(ISP_368) + /* 从EFUSE读取DPHY校准值并设置 */ + hal_system_set_phy_calibration(true); +#endif +} + diff --git a/src/board/board.h b/src/board/board.h new file mode 100644 index 0000000..b450fd3 --- /dev/null +++ b/src/board/board.h @@ -0,0 +1,16 @@ +/******************************************************************************* +* Copyright (C) 2019-2022, CVA Systems (R),All Rights Reserved. +* +* File: board.h +* Description: baord 初始化头文件 +* Version: V0.1 +* Date: 2020-01-08 +* Author: lzy + *******************************************************************************/ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +void board_Init(void); + +#endif diff --git a/src/board/startup/startup_ARMCM0.s b/src/board/startup/startup_ARMCM0.s new file mode 100644 index 0000000..4a17757 --- /dev/null +++ b/src/board/startup/startup_ARMCM0.s @@ -0,0 +1,226 @@ +;/**************************************************************************//** +; * @file startup_ARMCM0.s +; * @brief CMSIS Core Device Startup File for +; * ARMCM0 Device +; * @version V5.4.0 +; * @date 12. December 2018 +; ******************************************************************************/ +;/* +; * Copyright (c) 2009-2018 Arm Limited. All rights reserved. +; * +; * SPDX-License-Identifier: Apache-2.0 +; * +; * Licensed under the Apache License, Version 2.0 (the License); you may +; * not use this file except in compliance with the License. +; * You may obtain a copy of the License at +; * +; * www.apache.org/licenses/LICENSE-2.0 +; * +; * Unless required by applicable law or agreed to in writing, software +; * distributed under the License is distributed on an AS IS BASIS, WITHOUT +; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +; * See the License for the specific language governing permissions and +; * limitations under the License. +; */ + +;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ + + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00001000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +__stack_limit +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000C00 + + IF Heap_Size != 0 ; Heap is provided + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + ENDIF + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; -14 NMI Handler + DCD HardFault_Handler ; -13 Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; -5 SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; -2 PendSV Handler + DCD SysTick_Handler ; -1 SysTick Handler + + + ; Interrupts + DCD VIDC_IRQn_Handler ; 0 Interrupt 0 + DCD LCDC_IRQn_Handler ; 1 Interrupt 1 + DCD MIPI_RX_IRQn_Handler ; 2 Interrupt 2 + DCD MIPI_TX_IRQn_Handler ; 3 Interrupt 3 + DCD MEMC_IRQn_Handler ; 4 Interrupt 4 + DCD VPRE_IRQn_Handler ; 5 Interrupt 5 + DCD FLSCTRL_IRQn_Handler ; 6 Interrupt 6 + DCD DMA_IRQn_Handler ; 7 Interrupt 7 + DCD TIMER0_IRQn_Handler ; 8 Interrupt 8 + DCD TIMER1_IRQn_Handler ; 9 Interrupt 9 + DCD TIMER2_IRQn_Handler ; 10 Interrupt 10 + DCD TIMER3_IRQn_Handler ; 11 Interrupt 11 + DCD WDG_IRQn_Handler ; 12 Interrupt 12 + DCD UART_IRQn_Handler ; 13 Interrupt 13 + DCD I2C0_IRQn_Handler ; 14 Interrupt 14 + DCD I2C1_IRQn_Handler ; 15 Interrupt 15 + DCD SPIS_IRQn_Handler ; 16 Interrupt 16 + DCD SPIM_IRQn_Handler ; 17 Interrupt 17 + DCD ADC_IRQn_Handler ; 18 Interrupt 18 + DCD PWMDET_IRQn_Handler ; 19 Interrupt 19 + DCD OTP_IRQn_Handler ; 20 Interrupt 20 + DCD SWIRE_IRQn_Handler ; 21 Interrupt 21 + DCD PVD_IRQn_Handler ; 22 Interrupt 22 + DCD AP_NRESET_IRQn_Handler ; 23 Interrupt 23 + DCD EXTI_INT0_IRQn_Handler ; 24 Interrupt 24 + DCD EXTI_INT1_IRQn_Handler ; 25 Interrupt 25 + DCD EXTI_INT2_IRQn_Handler ; 26 Interrupt 26 + DCD EXTI_INT3_IRQn_Handler ; 27 Interrupt 27 + DCD EXTI_INT4_IRQn_Handler ; 28 Interrupt 28 + DCD EXTI_INT5_IRQn_Handler ; 29 Interrupt 29 + DCD EXTI_INT6_IRQn_Handler ; 30 Interrupt 30 + DCD EXTI_INT7_IRQn_Handler ; 31 Interrupt 31 + + SPACE ( 0 * 4) ; Interrupts 10 .. 31 are left out + +__Vectors_End +__Vectors_Size EQU __Vectors_End - __Vectors +_NVIC_ICER0 EQU 0xE000E180 ;清中断使能寄存器地址 +_NVIC_ICPR0 EQU 0xE000E280 ;清中断pending寄存器地址 + + AREA |.text|, CODE, READONLY + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + +;清中断使能和pending ——开始—— + CPSID I ; 屏蔽中断 + LDR R0, =_NVIC_ICER0 + LDR R1, =_NVIC_ICPR0 + LDR R2, =0xFFFFFFFF + MOVS R3, #1 ; 设置循环次数 M0只有1组(32个)中断，故只需要循环1次 +_irq_clear + ;CBZ R3, _irq_clear_end + CMP R3,#0 ; 循环次数等于0，跳转到_irq_clear_end + BEQ _irq_clear_end + STR R2, [R0] ;,#4 ; NVIC_ICER0 - 清 enable IRQ 寄存器 + STR R2, [R1] ;,#4 ; NVIC_ICPR0 - 清 pending IRQ 寄存器 + SUBS R3, #1 ; 循环数自减1 + B _irq_clear +_irq_clear_end +;清中断使能和pending ——结束—— + CPSIE I ; 开启中断 + LDR R0, =__main + BX R0 + ENDP + + +; Macro to define default exception/interrupt handlers. +; Default handler are weak symbols with an endless loop. +; They can be overwritten by real handlers. + MACRO + Set_Default_Handler $Handler_Name +$Handler_Name PROC + EXPORT $Handler_Name [WEAK] + B . + ENDP + MEND + + +; Default exception/interrupt handler + + Set_Default_Handler NMI_Handler + Set_Default_Handler HardFault_Handler + Set_Default_Handler SVC_Handler + Set_Default_Handler PendSV_Handler + Set_Default_Handler SysTick_Handler + + Set_Default_Handler VIDC_IRQn_Handler + Set_Default_Handler LCDC_IRQn_Handler + Set_Default_Handler MIPI_RX_IRQn_Handler + Set_Default_Handler MIPI_TX_IRQn_Handler + Set_Default_Handler MEMC_IRQn_Handler + Set_Default_Handler VPRE_IRQn_Handler + Set_Default_Handler FLSCTRL_IRQn_Handler + Set_Default_Handler DMA_IRQn_Handler + Set_Default_Handler TIMER0_IRQn_Handler + Set_Default_Handler TIMER1_IRQn_Handler + + Set_Default_Handler TIMER2_IRQn_Handler + Set_Default_Handler TIMER3_IRQn_Handler + Set_Default_Handler WDG_IRQn_Handler + Set_Default_Handler UART_IRQn_Handler + Set_Default_Handler I2C0_IRQn_Handler + Set_Default_Handler I2C1_IRQn_Handler + Set_Default_Handler SPIS_IRQn_Handler + Set_Default_Handler SPIM_IRQn_Handler + Set_Default_Handler ADC_IRQn_Handler + Set_Default_Handler PWMDET_IRQn_Handler + + Set_Default_Handler OTP_IRQn_Handler + Set_Default_Handler SWIRE_IRQn_Handler + Set_Default_Handler PVD_IRQn_Handler + Set_Default_Handler AP_NRESET_IRQn_Handler + Set_Default_Handler EXTI_INT0_IRQn_Handler + Set_Default_Handler EXTI_INT1_IRQn_Handler + Set_Default_Handler EXTI_INT2_IRQn_Handler + Set_Default_Handler EXTI_INT3_IRQn_Handler + Set_Default_Handler EXTI_INT4_IRQn_Handler + Set_Default_Handler EXTI_INT5_IRQn_Handler + + Set_Default_Handler EXTI_INT6_IRQn_Handler + Set_Default_Handler EXTI_INT7_IRQn_Handler + ALIGN + + +; User setup Stack & Heap + + IF :LNOT::DEF:__MICROLIB + IMPORT __use_two_region_memory + ENDIF + + EXPORT __stack_limit + EXPORT __initial_sp + IF Heap_Size != 0 ; Heap is provided + EXPORT __heap_base + EXPORT __heap_limit + ENDIF + + END diff --git a/src/common/tau_common.h b/src/common/tau_common.h new file mode 100644 index 0000000..2ca8cd1 --- /dev/null +++ b/src/common/tau_common.h @@ -0,0 +1,216 @@ +/******************************************************************************* +* +* +* File: tau_common.h +* Description 通用数据类型相关定义头文件 +* Version V0.1 +* Date 2020-09-07 +* Author lzy + *******************************************************************************/ + +#ifndef __TAU_COMMON_H +#define __TAU_COMMON_H + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "stdint.h" +#include "math.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +/** + * \name 通用常量定义 + * @{ + */ +//#define ENABLE 1 +//#define DISABLE 0 + +#define ON 1 +#define OFF 0 + +#define NONE 0 +#define EOS '\0' + +/* +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif +*/ + +#ifndef __cplusplus + #define true 1 + #define false 0 + #define bool _Bool +#endif /* ifndef __cplusplus */ + +#ifndef NULL + #define NULL ((void *)0) +#endif + +#define TAU_LITTLE_ENDIAN 1234 /**< \brief 小端模式 */ +#define TAU_BIG_ENDIAN 3412 /**< \brief 大端模式 */ + +/** @} */ + +/******************************************************************************/ + +/** + * \name 常用宏定义 + * @{ + */ + +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +#define TAU_INLINE inline +#define TAU_STATIC_INLINE static inline +#define TAU_STATIC static +#define TAU_CONST const +#define TAU_EXTERN extern + +#define MIN(x, y) (((x) < (y)) ? (x) : (y)) +#define MAX(x, y) (((x) > (y)) ? (x) : (y)) + +/** + * \brief 求结构体成员的偏移 + * \attention 不同平台上，由于成员大小和内存对齐等原因， + * 同一结构体成员的偏移可能是不一样的 + * + * \par 示例 + * \code + * struct my_struct { + * int m1; + * char m2; + * }; + * int offset_m2; + * + * offset_m2 = TAU_OFFSET(struct my_struct, m2); + * \endcode + */ +#define TAU_OFFSET(structure, member) ((uint32_t)(&(((structure *)0)->member))) + +/** @} */ + +/** + * \brief 通过结构体成员指针获取包含该结构体成员的结构体 + * + * \param ptr 指向结构体成员的指针 + * \param type 结构体类型 + * \param member 结构体中该成员的名称 + * + * \par 示例 + * \code + * struct my_struct = { + * int m1; + * char m2; + * }; + * struct my_struct my_st; + * char *p_m2 = &my_st.m2; + * struct my_struct *p_st = TAU_CONTAINER_OF(p_m2, struct my_struct, m2); + * \endcode + */ +#define TAU_CONTAINER_OF(ptr, type, member) \ + ((type *)((char *)(ptr)-TAU_OFFSET(type, member))) + +/** + * \brief 计算结构体成员的大小 + * + * \code + * struct a = { + * uint32_t m1; + * uint32_t m2; + * }; + * int size_m2; + * + * size_m2 = TAU_MEMBER_SIZE(a, m2); //size_m2 = 4 + * \endcode + */ +#define TAU_MEMBER_SIZE(structure, member) (sizeof(((structure *)0)->member)) + +/** + * \brief 计算数组元素个数 + * + * \code + * int a[] = {0, 1, 2, 3}; + * int element_a = TAU_NELEMENTS(a); // element_a = 4 + * \endcode + */ +#define TAU_NELEMENTS(array) (sizeof(array) / sizeof((array)[0])) + +/** + * \brief 向上舍入 + * + * \param x 被运算的数 + * \param align 对齐因素 + * + * \code + * int size = TAU_ROUND_UP(15, 4); // size = 16 + * \endcode + */ +#define TAU_ROUND_UP(x, align) (((int)(x)/(align))*(align) + (((int)(x)%(align)) ? (align) : 0)) + +/** + * \brief 向下舍入 + * + * \param x 被运算的数 + * \param align 对齐因素 + * + * \code + * int size = TAU_ROUND_DOWN(15, 4); // size = 12 + * \endcode + */ +#define TAU_ROUND_DOWN(x, align) (((int)(x)/(align))*(align)) + +/** \brief 倍数向上舍入 */ +#define TAU_DIV_ROUND_UP(n, d) (((n) + (d)-1) / (d)) + +/** + * \brief 测试是否对齐 + * + * \param x 被运算的数 + * \param align 对齐因素，必须为2的乘方 + * + * \code + * if (TAU_ALIGNED(x, 4) { + * ; // x对齐 + * } else { + * ; // x不对齐 + * } + * \endcode + */ +#define TAU_ALIGNED(x, align) (((int)(x) & (align - 1)) == 0) + +/** \brief 将1字节BCD数据转换为16进制数据 */ +#define TAU_BCD_TO_HEX(val) (((val)&0x0f) + ((val) >> 4) * 10) + +/** \brief 将1字节16进制数据转换为BCD数据 */ +#define TAU_HEX_TO_BCD(val) ((((val) / 10) << 4) + (val) % 10) + +/** + * \brief 向上取整 + */ +#define TAU_CEIL(val) ceil(val) + + +/*! @brief Construct the version number for drivers. */ +#define MAKE_VERSION(major, minor, bugfix) (((major) << 16) | ((minor) << 8) | (bugfix)) + + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/* \brief 通用回调函数指针定义 */ +typedef void (*fcb_type)(void *data); + +#endif /* __TAU_COMMON_H */ diff --git a/src/common/tau_delay.h b/src/common/tau_delay.h new file mode 100644 index 0000000..b4a64ca --- /dev/null +++ b/src/common/tau_delay.h @@ -0,0 +1,34 @@ +/** + * File Name: tau_delay.h + * + * + * + * Author: Fortsense 3D Firmware Team + * + * Date: 2020/12/04 + * + * Project: Taurus + * + * Description: + * + * HISTORY: +**/ +#ifndef _DELAY_H_ +#define _DELAY_H_ +#include "stdint.h" + +/** +* @brief delay ms 函数,误差2%以内 +* @param ms:delay时长 +* @retval none +*/ +void delayMs(uint32_t ms); + +/** +* @brief delay us 函数,误差2%以内 +* @param us:delay时长 +* @retval none +*/ +void delayUs(uint32_t us); + +#endif diff --git a/src/common/tau_device_datatype.h b/src/common/tau_device_datatype.h new file mode 100644 index 0000000..99b2397 --- /dev/null +++ b/src/common/tau_device_datatype.h @@ -0,0 +1,167 @@ +/******************************************************************************* + * + * + * File: tau_device_datatype.h + * Description device datatype + * Version V0.1 + * Date 2020-12-04 + * Author kevin + *******************************************************************************/ + +#ifndef _TAU_DEVICE_DATATYPE_H_ +#define _TAU_DEVICE_DATATYPE_H_ + + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +#include "stdint.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief 计算组状态码 */ +#define MAKE_STATUS(group, code) ((((group)*100) + (code))) + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief 分组状态值 */ +enum _status_groups +{ + STATUS_GROUP_GENERIC = 0, + STATUS_GROUP_I2C = 1, + STATUS_GROUP_UART = 2, + STATUS_GROUP_SPI = 3, + kStatusGroup_Timer = 4, +}; + +/*! @brief 常用状态码 */ +enum _generic_status +{ + STATUS_SUCCESS = MAKE_STATUS(STATUS_GROUP_GENERIC, 0), + STATUS_FAIL = MAKE_STATUS(STATUS_GROUP_GENERIC, 1), + STATUS_READ_ONLY = MAKE_STATUS(STATUS_GROUP_GENERIC, 2), + STATUS_OUT_OF_RANGE = MAKE_STATUS(STATUS_GROUP_GENERIC, 3), + STATUS_INVALID_ARGUMENT = MAKE_STATUS(STATUS_GROUP_GENERIC, 4), + STATUS_TIME_OUT = MAKE_STATUS(STATUS_GROUP_GENERIC, 5), + STATUS_NO_TRANSFER_IN_PROGRESS = MAKE_STATUS(STATUS_GROUP_GENERIC, 6), +}; + +/*! + * @brief timer状态 + */ +typedef enum +{ + TIMER_STATUS_IDLE = MAKE_STATUS(kStatusGroup_Timer, 0), /*!< 空闲 */ + TIMER_STATUS_RUNNING = MAKE_STATUS(kStatusGroup_Timer, 1), /*!< 运行中 */ + TIMER_STATUS_TIMEOUT = MAKE_STATUS(kStatusGroup_Timer, 2), /*!< 超时 */ +} timer_status_e; + +/*! + * @brief system触发事件(中断/复位)模式 + */ +typedef enum +{ + DETECT_HIGH_LVL = 0, + DETECT_LOW_LVL, + DETECT_RISING_EDGE, + DETECT_FALLING_EDGE +} sys_cfg_trigger_e; + +/** +* @brief GPIO interrupt type +*/ +typedef enum +{ + TIMER_NUM0 = 0, + TIMER_NUM1, + TIMER_NUM2, + TIMER_NUM3, + TIMER_NUM_MAX +} timer_num_e; + +/** +* @brief GPIO interrupt type +*/ +typedef enum +{ + GPIO_INT_EXTI_INT0 = 0, + GPIO_INT_EXTI_INT1, + GPIO_INT_EXTI_INT2, + GPIO_INT_EXTI_INT3, + GPIO_INT_EXTI_INT4, + GPIO_INT_EXTI_INT5, + GPIO_INT_EXTI_INT6, + GPIO_INT_EXTI_INT7, + GPIO_INT_MAX +} gpio_int_e; + +/*! @brief PWMI中断类型 */ +typedef enum _pwm_int_type +{ + PWM_INT_HIGH_OVERFLOW = 0, + PWM_INT_LOW_OVERFLOW, + PWM_INT_TOTAL_OVERFLOW, + PWM_INT_HIGH_DONE, + PWM_INT_LOW_DONE, + PWM_INT_TOTAL_DONE, + PWM_INT_MAX +} pwm_int_type_e; + +/** +* @brief I2C chose +*/ +typedef enum +{ + I2C_SELECT_0 = 0, //常用slave + I2C_SELECT_1, //常用master +} i2c_select_e; + +/*! + * @brief 传输速度 + * @note + */ +typedef enum _i2c_rate +{ + I2C_RATE_STANDARD = 1, //100kHz + I2C_RATE_FAST, //400kHz + I2C_RATE_HIGH, //1MHz +} i2c_rate_e; + +/*! @brief DMA channel type */ +typedef enum +{ + DMA_CH0 = 0, /*!< SPIM */ + DMA_CH1 = 1, /*!< IIC0 */ + DMA_CH2 = 2, /*!< SPIS */ + DMA_CH3 = 3, /*!< IIC1 */ + DMA_CH4 = 4, /*!< SPI FLASH */ + DMA_CH5 = 5, /*!< UART */ +} dma_channel_e; + + +/*! @brief Type used for all status and error return values. */ + +typedef enum +{ + DISABLE = 0, + ENABLE = !DISABLE +} function_state_e; +/*!< @brief 用于返回状态和错误 */ +typedef int32_t status_t; + + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +#endif + diff --git a/src/common/tau_dsi_datatype.h b/src/common/tau_dsi_datatype.h new file mode 100644 index 0000000..fe706a4 --- /dev/null +++ b/src/common/tau_dsi_datatype.h @@ -0,0 +1,374 @@ +/******************************************************************************* +* +* +* File: tau_dsi_datatype.h +* Description: mipi dsi 通用头文件 +* Version: V0.1 +* Date: 2021-01-13 +* Author: lzy + *******************************************************************************/ + +#ifndef __MIPI_DSI_COMMON_H__ +#define __MIPI_DSI_COMMON_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#define DSC_PPS_SIZE 128 + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/** +* @brief Data Types for Peripheral-sourced Packets,From Mipi DSI Spec +*/ +typedef enum +{ + DSI_ACK_DT_ERROR = 0x02, + DSI_ACK_DT_EOTP = 0x08, + DSI_ACK_DT_GEN_SHORT_RESPONSE_1B = 0x11, + DSI_ACK_DT_GEN_SHORT_RESPONSE_2B = 0x12, + DSI_ACK_DT_GEN_LONG_RESPONSE = 0x1A, + DSI_ACK_DT_DSC_LONG_RESPONSE = 0x1C, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B = 0x21, + DSI_ACK_DT_DSC_SHORT_RESPONSE_2B = 0x22, + DSI_ACK_DT_MAX +} dsi_ack_data_type_e; + +/** +* @brief Software handle data types +*/ +typedef enum +{ + DSI_RECV_DT_PPS = 0x0A, //Picture Parameter Set + DSI_RECV_DT_GEN_WRITE_1B = 0x13, //Generic Short WRITE, 1 parameter + DSI_RECV_DT_GEN_WRITE_2B = 0x23, //Generic Short WRITE, 2 parameters + DSI_RECV_DT_GEN_READ_0B = 0x04, //Generic READ, no parameters + DSI_RECV_DT_GEN_READ_1B = 0x14, //Generic READ, 1 parameter + DSI_RECV_DT_GEN_READ_2B = 0x24, //Generic READ, 2 parameters + DSI_RECV_DT_DCS_WRITE_0B = 0x05, //DCS Short WRITE, no parameters + DSI_RECV_DT_DCS_WRITE_1B = 0x15, //DCS Short WRITE, 1 parameter + DSI_RECV_DT_DCS_READ_0B = 0x06, //DCS READ, no parameters + DSI_RECV_DT_GEN_WRITE_LONG = 0x29, //Generic Long Write + DSI_RECV_DT_DCS_WRITE_LONG = 0x39, //DCS Long Write/write_LUT Command Packet + DSI_RECV_DT_MAX +} dsi_data_type_e; + +typedef enum +{ + DCS_ENTER_IDLE_MODE = 0x39, + DCS_ENTER_INVERT_MODE = 0x21, + DCS_ENTER_NORMAL_MODE = 0x13, + DCS_ENTER_PARTIAL_MODE = 0x12, + DCS_ENTER_SLEEP_MODE = 0x10, + DCS_EXIT_IDLE_MODE = 0x38, + DCS_EXIT_INVERT_MODE = 0x20, + DCS_EXIT_SLEEP_MODE = 0x11, + DCS_GET_3D_CONTROL = 0x3F, + DCS_GET_ADDRESS_MODE = 0x0B, + DCS_GET_BLUE_CHANNEL = 0x08, + DCS_GET_COMPRESSION_MODE = 0x03, + DCS_GET_DIAGNOSTIC_RESULT = 0x0F, + DCS_GET_DISPLAY_MODE = 0x0D, + DCS_GET_GREEN_CHANNEL = 0x07, + DCS_GET_PIXEL_FORMAT = 0x0C, + DCS_GET_POWER_MODE = 0x0A, + DCS_GET_RED_CHANNEL = 0x06, + DCS_GET_SCANLINE = 0x45, + DCS_GET_SIGNAL_MODE = 0x0E, + DCS_NOP = 0x00, + DCS_READ_DDB_CONTINUE = 0xA8, + DCS_READ_DDB_START = 0xA1, + DCS_READ_MEMORY_CONTINUE = 0x3E, + DCS_READ_MEMORY_START = 0x2E, + DCS_SET_3D_CONTROL = 0x3D, + DCS_SET_ADDRESS_MODE = 0x36, + DCS_SET_COLUMN_ADDRESS = 0x2A, + DCS_SET_DISPLAY_OFF = 0x28, + DCS_SET_DISPLAY_ON = 0x29, + DCS_SET_GAMMA_CURVE = 0x26, + DCS_SET_PAGE_ADDRESS = 0x2B, + DCS_SET_PARTIAL_COLUMNS = 0x31, + DCS_SET_PARTIAL_ROWS = 0x30, + DCS_SET_PIXEL_FORMAT = 0x3A, + DCS_SET_SCROLL_AREA = 0x33, + DCS_SET_SCROLL_START = 0x37, + DCS_SET_TEAR_OFF = 0x34, + DCS_SET_TEAR_ON = 0x35, + DCS_SET_TEAR_SCANLINE = 0x44, + DCS_SET_VSYNC_TIMING = 0x40, + DCS_SOFT_RESET = 0x01, + DCS_WRITE_LUT = 0x2D, + DCS_WRITE_MEMORY_CONTINUE = 0x3C, + DCS_WRITE_MEMORY_START = 0x2C +} dsi_dcs_cmd_type_e; + +/** +* @brief video data transfer mode +*/ +typedef enum +{ + DSI_DATA_VIDEO_MODE = 0, + DSI_DATA_CMD_MODE = 1, + DSI_DATA_MODE_MAX +} dsi_video_data_mode_e; + +/** +* @brief dsi virtual channel +*/ +typedef enum +{ + DSI_VC_0 = 0, + DSI_VC_1 = 1, + DSI_VC_2 = 2, + DSI_VC_3 = 3, + DSI_VC_MAX +} dsi_virtual_channel_e; + +/** +* @brief video data mode +*/ +typedef enum +{ + DSI_FRAME_RATE_60HZ = 0, + DSI_FRAME_RATE_90HZ = 1, + DSI_FRAME_RATE_120HZ = 2, + DSI_FRAME_RATE_144HZ = 3, + DSI_FRAME_RATE_160HZ = 4, + DSI_FRAME_RATE_MAX +} dsi_video_frame_rate_e; + +/** +* @brief dsi rx color coding +*/ +typedef enum +{ + DSI_RGB565 = 1, + DSI_RGB666 = 2, /*!< 18 bbp(18bits per pixel) */ + DSI_RGB666_LOOSELY = 3, /*!< 24 bbp(24bits per pixel) */ + DSI_RGB888 = 4, /*!< 24 bbp(24bits per pixel) */ + DSI_RGB10_10_10 = 5, + DSI_RGB12_12_12 = 6, + DSI_YCbCr422_16 = 7, + DSI_PENTILE_16 = DSI_YCbCr422_16, + DSI_YCbCr422_20_LOOSELY = 8, + DSI_YCbCr422_24 = 9, + DSI_YCbCr420_12 = 10, + DSI_COLOR_CODE_MAX +} dsi_color_code_e; + +/** +* @brief dpi endianness type +*/ +typedef enum +{ + DPI_ENDIAN_RGB = 0, + DPI_ENDIAN_BGR +} dpi_endianness_type_e; + +/** +* @brief dpi polarity type +*/ +typedef enum +{ + DPI_SIG_ACTIVE_HIGH = 0, + DPI_SIG_ACTIVE_LOW = 1 +} dpi_polarity_e; + +/** +* @brief mipi lane number +*/ +typedef enum +{ + DSI_LANE_1 = 1, + DSI_LANE_2 = 2, + DSI_LANE_3 = 3, + DSI_LANE_4 = 4, + DSI_LANE_NUME_MAX +} dsi_lane_nume_e; + +/** +* @brief video mode +*/ +typedef enum +{ + DSI_NONBURST_PULSE = 0, + DSI_NONBURST_EVENT = 1, + DSI_BURST_MODE = 2, + DSI_VIDEO_MODE_MAX +} dsi_video_mode_type_e; + +/** +* @brief panel init cmd transfer type +*/ +typedef enum +{ + DSI_CMD_TX_HS = 0, + DSI_CMD_TX_LP = 1 +} dsi_tx_cmd_tx_type_e; + +/** +* @brief dpi tx vpg style +*/ +typedef enum +{ + TX_VPG_V_COLOR = 0, + TX_VPG_H_COLOR = 1, + TX_VPG_V_BER = 2, + TX_VPG_FLICKER = 3, + TX_VPG_CHESSBOARD = 4, + TX_VPG_MAX +} dsi_tx_vpg_style_e; + +#if defined(ISP_568) || defined(ISP_368) +/** +* @brief angle of rotation +*/ +typedef enum +{ + VIDOE_ROT_ANGLE_0 = 0, /* 不旋转 */ + VIDOE_ROT_ANGLE_90 = 1, /* 旋转90度 */ + VIDOE_ROT_ANGLE_180 = 2, /* 旋转180度 */ + VIDOE_ROT_ANGLE_270 = 3, /* 转转270度 */ + VIDOE_ROT_ANGLE_MAX +} video_rotate_angle_e; + +/** +* @brief mipi rx lane swap +*/ +typedef enum +{ + RX_LANE_ORDER_DEFAULT = 0x0, + RX_LANE_ORDER_3012 = RX_LANE_ORDER_DEFAULT, + RX_LANE_ORDER_3210 = 0x1, + RX_LANE_ORDER_MAX +} dsi_rx_lane_swap_e; + +/** +* @brief LTPO mode +*/ +typedef enum +{ + LTPO_MODE_NONE = 0, + LTPO_MODE_1 = 1, + LTPO_MODE_2 = 2, + LTPO_MODE_MAX +} ltpo_mode_e; + +/** +* @brief transform 基本信息 +*/ +typedef struct +{ + ltpo_mode_e ltpo; /* ltpo 模式 */ + bool mirror_en; /* 对video 做水平镜像标志位 */ + video_rotate_angle_e rot_angle; /* 对video 做旋转的角度 */ + dsi_video_data_mode_e dst_mode; /* mipi tx 输出video 数据传输模式(video/cmd mode) */ + dsi_rx_lane_swap_e rx_lane_swap; /* rx lane swap */ +} dsi_base_extra_info_t; +#endif + +/** +* @brief mipi P/N lane swap flag +* eg: pn_swap = RX_LANE_0_PN_SWAP | RX_LANE_CLK_PN_SWAP; +* 表示 lane0 与 CLK 的P跟N交换，其他lane不变 +*/ +typedef enum +{ + RX_LANE_0_PN_SWAP = 0x1, + RX_LANE_1_PN_SWAP = 0x2, + RX_LANE_2_PN_SWAP = 0x4, + RX_LANE_3_PN_SWAP = 0x8, + RX_LANE_CLK_PN_SWAP = 0x10 +} dsi_rx_lane_pn_swap_e; + +/** +* @brief error processing level +*/ +typedef enum +{ + ERR_HANDLE_NONE = 0, + ERR_HANDLE_L1 = 1, + ERR_HANDLE_L2 = 2, + ERR_HANDLE_L3 = 3, + ERR_HANDLE_MAX +} hal_err_handle_level_e; + +/** +* @brief transform 基本信息 +*/ +typedef struct +{ + uint32_t src_w; /* mipi rx 接收的 width */ + uint32_t src_h; /* mipi rx 接收的 height */ + uint32_t dst_w; /* mipi tx 发送的 width */ + uint32_t dst_h; /* mipi tx 发送的 height */ + dsi_video_frame_rate_e src_frate; /* mipi rx 接收的frame rate */ + dsi_video_data_mode_e src_mode; /* mipi rx 接收video 数据传输模式(video/cmd mode) */ + uint16_t pn_swap; /* mipi rx P/N swap标志位 */ +#if defined(ISP_568) || defined(ISP_368) + dsi_base_extra_info_t extra_info; /* ISP_568/ISP_368 新增功能配置 */ +#endif +} dsi_base_trans_info_t; + +/** +* @brief ccm系数 +*/ +typedef struct +{ + uint32_t coef_c00; + uint32_t coef_c01; + uint32_t coef_c02; + uint32_t coef_c10; + uint32_t coef_c11; + uint32_t coef_c12; + uint32_t coef_c20; + uint32_t coef_c21; + uint32_t coef_c22; +} ccm_coef_t; + +/** +* @brief video mode display timing +*/ +typedef struct +{ + uint32_t vsa; + uint32_t vbp; + uint32_t vact; + uint32_t vfp; + uint32_t hsa; + uint32_t hbp; + uint32_t hact; + uint32_t hfp; +} vid_disp_timing_t; + +/** +* @brief dpi极性配置 +*/ +typedef struct +{ + dpi_polarity_e vsync_active_level; //vsync极性 + dpi_polarity_e hsync_active_level; //hsync极性 + dpi_polarity_e dataen_active_level; //dataen极性 + dpi_polarity_e shutdown_active_level; //shutdown极性 + dpi_polarity_e colorm_active_level; //colorm极性 +} dpi_polarity_t; + +/** +* @brief hight performan mode level +*/ +typedef enum +{ + HIGHT_PERFORMAN_NONE = 0, + HIGHT_PERFORMAN_L1 = 1, + HIGHT_PERFORMAN_L2 = 2, + HIGHT_PERFORMAN_MAX +} hight_performan_mode_e; + + +#endif //__MIPI_DSI_COMMON_H__ diff --git a/src/common/tau_log.h b/src/common/tau_log.h new file mode 100644 index 0000000..dcf1f18 --- /dev/null +++ b/src/common/tau_log.h @@ -0,0 +1,83 @@ +/******************************************************************************* +* +* +* File: tau_log.h +* Description log file +* Version V0.1 +* Date 2020-12-08 +* Author linyw +*******************************************************************************/ +#ifndef _TAU_LOG_H_ +#define _TAU_LOG_H_ + + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include +#include +#include +#include "ArmCM0.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +#ifdef LOG_TAG + #undef LOG_TAG +#endif +#define LOG_TAG "tau_log" +#define LOG_CURREN_LEVEL kLOG_LEVEL_DBG /* 配置打印等级 TODO:每个模块可配置打印等级 */ + +/* + * Using the following three macros for conveniently logging. + */ +#if EDA_MODE +#define TAU_LOGD(format,...) +#define TAU_LOGI(format,...) +#define TAU_LOGE(format,...) +#else +#define TAU_LOGD(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_DBG) { \ + LOG_printf("[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + + +#define TAU_LOGI(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_INF) { \ + LOG_printf("[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + +#define TAU_LOGE(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_ERR) { \ + LOG_printf("error [%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) +#endif + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef enum +{ + kLOG_LEVEL_DBG = 0, + kLOG_LEVEL_INF, + kLOG_LEVEL_ERR, + kLOG_LEVEL_NONE /* 不打印任何参数 */ +} log_level_t; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +void LOG_printf(const char *fmt, ...); + +#endif diff --git a/src/common/tau_operations.h b/src/common/tau_operations.h new file mode 100644 index 0000000..da2f90b --- /dev/null +++ b/src/common/tau_operations.h @@ -0,0 +1,229 @@ +/******************************************************************************* +* +* +* File: tau_operations.h +* Description 位操作与字节操作相关定义头文件 +* Version V0.1 +* Date 2020-09-07 +* Author lzy + *******************************************************************************/ +#ifndef __TAU_BYTEOPS_H +#define __TAU_BYTEOPS_H + +/** + * \name 通用位常数定义 + * @{ + */ + +/** \brief 长整数位数 */ +#ifndef TAU_BITS_PER_LONG + #define TAU_BITS_PER_LONG 32 +#endif + +/** \brief 字节位数 */ +#define TAU_BITS_PER_BYTE 8 + +/** @} */ + + +/******************************************************************************/ + +/** + * \name 通用位操作 + * @{ + */ + +/** \brief bit移位 + * TAU_BIT(2) is 0x4 + */ +#define TAU_BIT(bit) (1u << (bit)) + +/** \brief 值移位 + * TAU_SBF(0xFF, 8) is 0xff00 + */ +#define TAU_SBF(value, field) ((value) << (field)) + +/** \brief bit置位 + * TAU_BIT_SET(0, 8) is 0x100 + */ +#define TAU_BIT_SET(data, bit) ((data) |= TAU_BIT(bit)) + +/** \brief bit清零 + * TAU_BIT_CLR(0xFF, 2) is 0xfb + */ +#define TAU_BIT_CLR(data, bit) ((data) &= ~TAU_BIT(bit)) + +/** \brief bit置位, 根据 mask 指定的位 + * TAU_BIT_SET_MASK(0xF0F0, 0xF00) is 0xfff0 + */ +#define TAU_BIT_SET_MASK(data, mask) ((data) |= (mask)) + +/** \brief bit清零, 根据 mask 指定的位 + * TAU_BIT_CLR_MASK(0xFFFF, 0xFF00) is 0xff + */ +#define TAU_BIT_CLR_MASK(data, mask) ((data) &= ~(mask)) + +/** \brief bit翻转 + * TAU_BIT_TOGGLE(0xFFFF, 0) is 0xfffe + * TAU_BIT_TOGGLE(0x0000, 1) is 0x2 + */ +#define TAU_BIT_TOGGLE(data, bit) ((data) ^= TAU_BIT(bit)) + +/** \brief bit修改 + * TAU_BIT_MODIFY(0, 8, 1) is 0x100 + * TAU_BIT_MODIFY(0xFFFF, 1, 0) is 0xfffd + */ +#define TAU_BIT_MODIFY(data, bit, value) \ + ((value) ? TAU_BIT_SET(data, bit) : TAU_BIT_CLR(data, bit)) + +/** \brief 测试bit是否置位 + * TAU_BIT_ISSET(0xF0F1, 1) is 0 + * TAU_BIT_ISSET(0xF0F2, 1) is 2 + */ +#define TAU_BIT_ISSET(data, bit) ((data) & TAU_BIT(bit)) + +/** \brief 获取bit值 + * TAU_BIT_GET(0xF0F1, 1) is 0 + * TAU_BIT_GET(0xF0F2, 1) is 1 + */ +#define TAU_BIT_GET(data, bit) (TAU_BIT_ISSET(data, bit) ? 1 : 0) + +/** \brief 检测bit值 + * TAU_BIT_CHECK(0xF5FF, 4) is 1 + */ +#define TAU_BIT_CHECK(data, bit) \ + (((data) & TAU_BIT(bit)) ? 1 : 0) + +/** \brief 获取 n bits 掩码值 + * TAU_BITS_MASK(2) is 0x3 + */ +#define TAU_BITS_MASK(n) (~((~0u) << (n))) + +/** \brief 获取位段值 + * TAU_BITS_GET(0xF5FF, 0x0F00, 8) is 0x5 + */ +#define TAU_BITS_GET(data, mask, pos) \ + (((data) & (mask)) >> (pos)) + +/** \brief 获取位段值 + * TAU_BITS_CHECK(0xF5FF, 0x0F00) is 1 + */ +#define TAU_BITS_CHECK(data, mask) \ + (((data) & (mask)) ? 1 : 0) + +/** \brief 修改位段值 + * TAU_BITS_MODIFY(0xF5FF, 0x0FF0, 0x8A0) is 0xF8AF +*/ +#define TAU_BITS_MODIFY(data, clear_mask, set_mask) \ + (data) = (((data) & (~(clear_mask))) | (set_mask)) + +/** \brief 设置位段值 + * TAU_WRITE_REG32(0x05FF, 0xFFFA) is 0xFFFA +*/ +#define TAU_WRITE_REG32(data, value) ((data) = (value)) + +/** \brief 设置位段值 + * TAU_READ_REG32(0x05FF) is 0x05FF +*/ +#define TAU_READ_REG32(data) (data) + + +/** @} */ + +/******************************************************************************/ + +/** + * \brief 取2-byte整数的高位byte + * + * \par 示例 + * \code + * uint16_t a = 0x1234; + * uint16_t b; + * + * b = TAU_MSB(a); //b=0x12 + * \endcode + */ +#define TAU_MSB(x) (((x) >> 8) & 0xff) + +/** + * \brief 取2-byte整数的低位byte + * + * \par 示例 + * \code + * uint16_t a = 0x1234; + * uint16_t b; + * + * b = TAU_LSB(a); //b=0x34 + * \endcode + */ +#define TAU_LSB(x) ((x) & 0xff) + +/** + * \brief 取2-word整数的高位word + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_MSW(a); //b=0x1234 + * \endcode + */ +#define TAU_MSW(x) (((x) >> 16) & 0xffff) + +/** + * \brief 取2-word整数的低位word + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_LSW(a); //b=0x5678 + * \endcode + */ +#define TAU_LSW(x) ((x) & 0xffff) + +/** + * \brief 交换32-bit整数的高位word和低位word + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_WORDSWAP(a); //b=0x56781234 + * \endcode + */ +#define TAU_WORDSWAP(x) (TAU_MSW(x) | (TAU_LSW(x) << 16)) + +/** + * \brief 交换32-bit整数的字节顺序 + * + * \par 示例 + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_LONGSWAP(a); //b=0x78563412 + * \endcode + */ +#define TAU_LONGSWAP(x) ((TAU_LLSB(x) << 24) | \ + (TAU_LNLSB(x) << 16) | \ + (TAU_LNMSB(x) << 8) | \ + (TAU_LMSB(x))) + +#define TAU_LLSB(x) ((x) & 0xff) /**< \brief 取32bit整数第1个字节 */ +#define TAU_LNLSB(x) (((x) >> 8) & 0xff) /**< \brief 取32bit整数第2个字节 */ +#define TAU_LNMSB(x) (((x) >> 16) & 0xff) /**< \brief 取32bit整数第3个字节 */ +#define TAU_LMSB(x) (((x) >> 24) & 0xff) /**< \brief 取32bit整数第4个字节 */ +#define TAU_LNSB(x,n) (((x) >> ((n) * 8) ) & 0xff) /**< \brief 取32bit整数第n个字节 ,参数 0 - 3*/ + +/** + * @} + */ + +#endif /* __TAU_BYTEOPS_H */ + +/* end of file */ + diff --git a/src/sdk/CVWL368/lib/CVWL368.lib b/src/sdk/CVWL368/lib/CVWL368.lib new file mode 100644 index 0000000..c901816 Binary files /dev/null and b/src/sdk/CVWL368/lib/CVWL368.lib differ diff --git a/src/sdk/CVWL518/lib/CVWL518.lib b/src/sdk/CVWL518/lib/CVWL518.lib new file mode 100644 index 0000000..2cf316f Binary files /dev/null and b/src/sdk/CVWL518/lib/CVWL518.lib differ diff --git a/src/sdk/CVWL518T/lib/CVWL518T.lib b/src/sdk/CVWL518T/lib/CVWL518T.lib new file mode 100644 index 0000000..82374c9 Binary files /dev/null and b/src/sdk/CVWL518T/lib/CVWL518T.lib differ diff --git a/src/sdk/CVWL568/lib/CVWL568.lib b/src/sdk/CVWL568/lib/CVWL568.lib new file mode 100644 index 0000000..ae1192a Binary files /dev/null and b/src/sdk/CVWL568/lib/CVWL568.lib differ diff --git a/src/sdk/CVWL568T/lib/CVWL568T.lib b/src/sdk/CVWL568T/lib/CVWL568T.lib new file mode 100644 index 0000000..8417e96 Binary files /dev/null and b/src/sdk/CVWL568T/lib/CVWL568T.lib differ diff --git a/src/sdk/include/M0/ArmCM0.h b/src/sdk/include/M0/ArmCM0.h new file mode 100644 index 0000000..b1614d7 --- /dev/null +++ b/src/sdk/include/M0/ArmCM0.h @@ -0,0 +1,211 @@ +/**************************************************************************//** + * @file ARMCM0.h + * @brief CMSIS Core Peripheral Access Layer Header File for + * ARMCM0 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ARMCM0_H +#define ARMCM0_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ + /* ------------------- Processor Exceptions Numbers ----------------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + + /* ------------------- Processor Interrupt Numbers ------------------------------ */ + VIDC_IRQn = 0, + LCDC_IRQn = 1, + MIPI_RX_IRQn = 2, + MIPI_TX_IRQn = 3, + MEMC_IRQn = 4, + VPRE_IRQn = 5, + FLSCTRL_IRQn = 6, + DMA_IRQn = 7, + TIMER0_IRQn = 8, + TIMER1_IRQn = 9, + TIMER2_IRQn = 10, + TIMER3_IRQn = 11, + WDG_IRQn = 12, + UART_IRQn = 13, + I2C0_IRQn = 14, + I2C1_IRQn = 15, + SPIS_IRQn = 16, + SPIM_IRQn = 17, + ADC_IRQn = 18, + PWMDET_IRQn = 19, + OTP_IRQn = 20, + SWIRE_IRQn = 21, + PVD_IRQn = 22, + AP_NRESET_IRQn = 23, + EXTI_INT0_IRQn = 24, + EXTI_INT1_IRQn = 25, + EXTI_INT2_IRQn = 26, + EXTI_INT3_IRQn = 27, + EXTI_INT4_IRQn = 28, + EXTI_INT5_IRQn = 29, + EXTI_INT6_IRQn = 30, + EXTI_INT7_IRQn = 31 + /* Interrupts 10 .. 31 are left out */ +} IRQn_Type; + + + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------- Start of section using anonymous unions and disabling warnings ------- */ +#if defined (__CC_ARM) +#pragma push +#pragma anon_unions +#elif defined (__ICCARM__) +#pragma language=extended +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Wc11-extensions" +#pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined (__GNUC__) +/* anonymous unions are enabled by default */ +#elif defined (__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined (__TASKING__) +#pragma warning 586 +#elif defined (__CSMC__) +/* anonymous unions are enabled by default */ +#else +#warning Not supported compiler type +#endif + +/* -------- Configuration of Core Peripherals ----------------------------------- */ +#define __CM0_REV 0x0000U /* Core revision r0p0 */ +#define __MPU_PRESENT 0U /* no MPU present */ +#define __VTOR_PRESENT 0U /* no VTOR present */ +#define __NVIC_PRIO_BITS 2U /* Number of Bits used for Priority Levels */ //20220228 +#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */ + +#define __FPU_PRESENT 0U /* Set to 1 if FPU is present */ +#define __FPU_DP 0U /* single precision FPU */ +#define __ICACHE_PRESENT 0U /* Set to 1 if I-CACHE is present */ +#define __DCACHE_PRESENT 0U /* Set to 1 if D-CACHE is present */ +#define __DSP_PRESENT 0U /* no DSP extension present */ + +#define FPGA_MODE 0 +#define EDA_MODE 0 +#define EXTERN_24M 0 +#define CPU_CLK_100M 0 + +#include "core_cm0.h" /* Processor and core peripherals */ +#include "system_ARMCM0.h" /* System Header */ + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (500000000UL) /* Oscillator frequency */ + +#if FPGA_MODE +#define SYSTEM_CLOCK (33300000U) +#else +/* 使用外部晶振时,系统时钟只能是100M,不使用外部晶振时,系统时钟可以是100M/80M*/ +#if EXTERN_24M +#define SYSTEM_CLOCK (100000000U) +#else +#if CPU_CLK_100M +#define SYSTEM_CLOCK (100000000U) +#else +#define SYSTEM_CLOCK (80000000U) +#endif +#endif +#endif + +/* -------- End of section using anonymous unions and disabling warnings -------- */ +#if defined (__CC_ARM) +#pragma pop +#elif defined (__ICCARM__) +/* leave anonymous unions enabled */ +#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) +#pragma clang diagnostic pop +#elif defined (__GNUC__) +/* anonymous unions are enabled by default */ +#elif defined (__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined (__TASKING__) +#pragma warning restore +#elif defined (__CSMC__) +/* anonymous unions are enabled by default */ +#else +#warning Not supported compiler type +#endif + +/* In HS mode and when the DMA is used, all variables and data structures dealing + with the DMA during the transaction process should be 4-bytes aligned */ +#define DMA_WORD_ALIGN_EN +#ifdef DMA_WORD_ALIGN_EN +#if defined (__GNUC__) /* GNU Compiler */ +#define __ALIGN_END __attribute__ ((aligned (4))) +#define __ALIGN_BEGIN +#else +#define __ALIGN_END +#if defined (__CC_ARM) /* ARM Compiler */ +#define __ALIGN_BEGIN __align(4) +#elif defined (__ICCARM__) /* IAR Compiler */ +#define __ALIGN_BEGIN +#elif defined (__TASKING__) /* TASKING Compiler */ +#define __ALIGN_BEGIN __align(4) +#endif /* __CC_ARM */ +#endif /* __GNUC__ */ +#else + +#define __ALIGN_BEGIN +#define __ALIGN_END + +#define __ALIGN_END_1 __attribute__ ((aligned (1))) +#endif /* DMA_WORD_ALIGN_EN */ + +/* __packed keyword used to decrease the data type alignment to 1-byte */ +#if defined (__CC_ARM) /* ARM Compiler */ +#define __packed __packed +#elif defined (__ICCARM__) /* IAR Compiler */ +#define __packed __packed +#elif defined ( __GNUC__ ) /* GNU Compiler */ +#define __packed __attribute__ ((__packed__)) +#define __weak __attribute__((weak)) +#elif defined (__TASKING__) /* TASKING Compiler */ +#define __packed __unaligned +#endif /* __CC_ARM */ + +#ifdef __cplusplus +} +#endif + +#endif /* ARMCM0_H */ diff --git a/src/sdk/include/hal_dsi_rx_ctrl.h b/src/sdk/include/hal_dsi_rx_ctrl.h new file mode 100644 index 0000000..185b0c9 --- /dev/null +++ b/src/sdk/include/hal_dsi_rx_ctrl.h @@ -0,0 +1,557 @@ +/******************************************************************************* +* +* +* File: hal_dsi_rx_ctrl.h +* Description: hal mipi dsi rx path control 头文件 +* Version: V0.1 +* Date: 2021-04-06 +* Author: lzy + *******************************************************************************/ +#ifndef __HAL_DSI_RX_CTRL_H__ +#define __HAL_DSI_RX_CTRL_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#define RX_DCS_QUEUE_MAX_SIZE 20 /* DCS存储队列长度 */ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef struct hal_dcs_execute_entry_t hal_dcs_execute_entry_t; + +typedef struct hal_dcs_packet_t hal_dcs_packet_t; + +typedef struct hal_dsi_rx_ctrl_handle_t hal_dsi_rx_ctrl_handle_t; + +/* DCS CMD 回调函数, 注册进cus_dcs_entry_table里, 匹配对应的DCS 后回调*/ +typedef bool (*hal_dsi_rx_ctrl_dcs_execute)(hal_dsi_rx_ctrl_handle_t *rx_handle, hal_dcs_packet_t *dcs_packet); + +/* AP 读cmd 回调, 需要快速回CMD 时可注册, 为NULL 时DSC 读指令与写指令经过parse后由cus_dcs_entry_table回调 */ +typedef bool (*hal_dsi_rx_ctrl_read_entry)(uint8_t data_type, uint8_t dcs_cmd, uint8_t param); + +/* AP PPS 更新回调,参数为PPS 以及从PPS 里解析出来的picture width/height, 用于分辨率切换, 不注册该接口时内部处理PPS */ +typedef bool (*hal_dsi_rx_ctrl_pps_entry)(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height); + +/** +* @brief hal_rx_dbg_event_e select +*/ +typedef enum hal_rx_dbg_event_e +{ + HAL_RX_DBG_FS = 0, /* Frame start */ + HAL_RX_DBG_EVENT_MAX +} hal_rx_dbg_event_e; + +/* RX debug 回调函数,用于获取frame start 等功能debug */ +typedef void (*hal_dsi_rx_ctrl_dbg_entry)(hal_rx_dbg_event_e event); + +/** +* @brief dsi rx ctrl handle struct +*/ +typedef struct hal_dsi_rx_ctrl_handle_t +{ + dsi_base_trans_info_t base_info; /* mipi video 转换基本信息 */ + dsi_color_code_e rx_color_mode; /* 输入color mode */ + dsi_lane_nume_e rx_lanes; /* mipi data lane */ + dsi_video_mode_type_e rx_nonburst_models; /* transmission packet sequences */ + dsi_virtual_channel_e rx_vc; /* virtual channel number */ + bool compress_en; /* DSC 压缩标志 */ + uint32_t rx_hsclk_rate; /* mipi 高速信号lane rate */ + uint8_t rx_dsc_pps[DSC_PPS_SIZE]; /* DSC 压缩PPS参数 */ + const hal_dcs_execute_entry_t *cus_dcs_entry_table; /* DCS处理函数列表 */ + hal_dsi_rx_ctrl_read_entry rx_dcs_read_entry; /* Host读指令数据函数,为NULL时由rx_dcs_queue注册cmd处理 */ + hal_dsi_rx_ctrl_pps_entry pps_update_entry; /* PPS Update 时回调函数,用于分辨率切换更新PPS,为NULL时内部处理 */ + bool used; /* handle使用标志位 */ + uint8_t pq_marginal; /* picture quality,参数为hal_rx_pq_marginal_type_e */ + bool direct_mode; /* video mode 直通模式,预留,仅debug使用 */ + hal_dsi_rx_ctrl_dbg_entry rx_debug_cb; /* rx debug 回调函数,目前为收到frame start之后回调，预留其他debug功能 */ + hal_err_handle_level_e err_handler_level; /* RX接收错误的时候对模块做reset等级, 等级越高reset模块越多 */ + bool draw_mode; /* 画点模式,仅debug使用 */ +#if defined(ISP_568) || defined(ISP_368) + uint8_t rx_strength; /* 用于调节RX信号强度，仅适用于开启内阻校准模式，档位0~7，默认3 */ + hight_performan_mode_e hight_performan_mode; /* 高性能模式等级,参考hight_performan_mode_e */ + bool pu_optimize; /* 用于优化PU显示效果，默认为false;true:优化PU显示显示效果,高功耗;false:普通PU模式,低功耗 */ +#endif +} hal_dsi_rx_ctrl_handle_t; + +/** +* @brief DCS command execute entry +*/ +typedef struct hal_dcs_execute_entry_t +{ + uint32_t dcs_command; /* DCS command */ + hal_dsi_rx_ctrl_dcs_execute execute_func; /* command 对应处理函数 */ + bool immediately_func; /* 执行机制:true-在中断里立即执行,false-加入DCS队列异步执行 */ +} hal_dcs_execute_entry_t; + +/** +* @brief 存储 DCS packet 结构体 +*/ +typedef struct hal_dcs_packet_t +{ + uint32_t data_type; /* data type */ + uint32_t dcs_command; /* dcs command */ + uint32_t param_length; /* dcs param length */ + uint8_t *packet_param; /* dcs param */ + const hal_dcs_execute_entry_t *dcs_execute_entry; /* dcs packet 处理函数入口*/ +} hal_dcs_packet_t; + +/** +* @brief dcs command filter select +*/ +typedef enum +{ + HAL_RX_DCS_FILTER_0 = 0, + HAL_RX_DCS_FILTER_1 = 1, + HAL_RX_DCS_FILTER_2 = 2, + HAL_RX_DCS_FILTER_3 = 3, + HAL_RX_DCS_FILTER_4 = 4, + HAL_RX_DCS_FILTER_5 = 5, + HAL_RX_DCS_FILTER_6 = 6, + HAL_RX_DCS_FILTER_7 = 7, + HAL_RX_DCS_FILTER_MAX +} hal_rx_dcs_filter_sel_e; + +/** +* @brief pentile source color format +*/ +typedef enum +{ + PENTILE_SRC_FORMAT_RGB = 0x0, + PENTILE_SRC_FORMAT_BGR = 0x1, + PENTILE_SRC_FORMAT_RGBG_BGRG = 0x8, + PENTILE_SRC_FORMAT_GBGR_GRGB = 0x9, + PENTILE_SRC_FORMAT_BGRG_RGBG = 0xA, + PENTILE_SRC_FORMAT_GRGB_GBGR = 0xB, + PENTILE_SRC_FORMAT_RGBG_RGBG = 0xC, + PENTILE_SRC_FORMAT_GBGR_GBGR = 0xD, + PENTILE_SRC_FORMAT_BGRG_BGRG = 0xE, + PENTILE_SRC_FORMAT_GRGB_GRGB = 0xF, + PENTILE_SRC_FORMAT_MAX +} pentile_src_format_e; + +/** +* @brief pential G0 G1 swap mode +*/ +typedef enum +{ + PENTILE_G0G1 = 0, + PENTILE_G1G0 = 1 +} pentile_g_swap_e; + +/** +* @brief pential R B swap mode +*/ +typedef enum +{ + PENTILE_RGBG_BGRG = 0, + PENTILE_GGRB_RBGG = 1, + PENTILE_GGBR_BRGG = 3 +} pentile_rb_swap_e; + +/** +* @brief TE 信号产生模式 +*/ +typedef enum +{ + TE_HW_MODE = 0, /* TE由硬件产生,频率与输出帧率一致 */ + TE_USER_MODE = 1, /* 底层不产生TE, 由hal_dsi_rx_ctrl_gen_a_tear_signal 接口产生 */ + TE_SOFT_60HZ_MODE = 2, /* 底层软件产生同步60Hz TE */ + TE_SOFT_90HZ_MODE = 4, /* 底层软件产生同步90Hz TE */ + TE_SOFT_120HZ_MODE = 5, /* 底层软件产生同步120Hz TE */ + TE_HW_MAX +} te_mode_e; + +/** +* @brief pq_marginal_type select +*/ +typedef enum +{ + PQ_TYPE_0 = 0x0, + PQ_TYPE_1 = 0x1, + PQ_TYPE_2 = 0x3, + PQ_TYPE_3 = 0x2, + PQ_TYPE_4 = 0xA, + PQ_TYPE_5 = 0xE, + PQ_TYPE_6 = 0xC, + PQ_TYPE_7 = 0x1A, + PQ_TYPE_8 = 0x18, + PQ_TYPE_MAX +} hal_rx_pq_marginal_type_e; + +/** +* @brief 设置RX CLK +*/ +typedef enum +{ + RX_CLK_100M = 0, + RX_CLK_150M = 1, + RX_CLK_200M = 2, + RX_CLK_300M = 3, + RX_CLK_MAX +} hal_rx_clk_e; + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief 创建dsi rx ctrl handle (释放时需调用hal_dsi_rx_ctrl_release_handle) +* @param none +* @retval dsi rx handle +*/ +hal_dsi_rx_ctrl_handle_t *hal_dsi_rx_ctrl_create_handle(void); + +/** +* @brief 释放dsi rx ctrl handle +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_release_handle(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 设置rx ctrl handle 里的 PPS 参数 +* @param rx_ctrl_handle: dsi rx handle +* @param pps: pps 参数 +* @param pps_size: pps 参数长度 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_pre_init_pps(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t pps[], uint32_t pps_size); + +/** +* @brief 初始化dsi rx 模块 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_init(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief dsi rx 模块去初始化 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_deinit(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 启动dsi rx +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_start(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 重新配置dsi rx参数并恢复状态 (debug使用, 重新配置rx_ctrl_handle参数后调用该接口重启) +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_restart(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 停止dsi rx +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_stop(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 手动设置RX clk,一般RX CLK 由底层自动计算,用于特殊video mode场景出现FIFO FULL情况调试使用 +* @param rxbr_clk: rx clk, 需要大于hs_lane_rate/8 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_rx_clk(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, hal_rx_clk_e rxbr_clk); + +/** +* @brief 发送 MIPI HOST的读响应 CMD +* @param rx_ctrl_handle: dsi rx handle +* @param data_type: data type +* @param vc: virtual channel +* @param cmd_count: ack command 的长度 +* @param ... : 需要发送的command(数量与cmd_count 配置一致) +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_send_ack_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, dsi_ack_data_type_e data_type, dsi_virtual_channel_e vc, uint8_t cmd_count, ...); + +/** +* @brief 使用数组方式回复短包,与hal_dsi_rx_ctrl_send_ack_cmd功能一致 +* @param rx_ctrl_handle: dsi rx handle +* @param data_size: 数组长度,固定为4 +* @param data: 回复cmd数据,数据排列有严格规定: +* data[0]:DI(data type) +* data[1]:data 0 +* data[2]:data 1 +* data[3]:内部pkt type,短包固定为0 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_ack_short_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t data_size, uint8_t data[]); + +/** +* @brief 使用数组方式回复长包,与hal_dsi_rx_ctrl_send_ack_cmd功能一致 +* @param rx_ctrl_handle: dsi rx handle +* @param data_size: 数组长度,为Word Count + header长度 (header固定为4) +* @param data: 回复cmd数据,数据排列有严格规定: +* data[0]:DI(data type) +* data[1]:wc 0 (Word Count 低八位) +* data[2]:wc 1 (Word Count 高八位) +* data[3]:内部pkt type,长包固定为1 +* data[N]:长包数据 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_ack_long_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t data_size, uint8_t data[]); + +/** +* @brief 异步处理DSC接口,执行cus_dcs_entry_table里对应DCS immediately_func为false的函数 +* @param rx_ctrl_handle: dsi rx handle +* @retval true - 正常处理1个DSC , false - 无DSC 处理 +*/ +bool hal_dsi_rx_ctrl_dsc_async_handler(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 使用硬件filter丢弃不需要处理的CMD,避免MCU资源被无效CMD占用 +* @param rx_ctrl_handle: dsi rx handle +* @param filter_number: filter 编号(0-7) +* @param cmd_start: 需要丢弃command code起始位 +* @param cmd_end: 需要丢弃command code终止位 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_hw_cmd_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, + hal_rx_dcs_filter_sel_e filter_number, + uint32_t cmd_start, uint32_t cmd_end); + +/** +* @brief 配置输入输出同步行数,用于调整图像撕裂问题 +* @param rx_ctrl_handle: dsi rx handle +* @param line_num: 同步行号,范围1 ~ input height +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_sync_line(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t line_num); + +/** +* @brief 使用内置pattern代替mipi输入(用于测试) +* @param rx_ctrl_handle: dsi rx handle +* @param pg_orient: pattern 方向(0:Vertical mode ; 1:Horizontal mode) +* @param enable: 开启/关闭pattern +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_enable_test_pattern(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t pg_orient, bool enable); + +/** +* @brief 设置TE信号特征 +* @param rx_ctrl_handle: dsi rx handle +* @param inverse_poly: tear信号极性 +* @param te_width: tear信号宽度(0-1023) +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_te_waveform(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, bool inverse_poly, uint32_t te_width); + +/** +* @brief 客制化scld filter配置,用于图像质量调节 +* @param rx_ctrl_handle: dsi rx handle +* @param scld_filter_h: 水平方向filter +* @param scld_filter_v: 垂直方向filter +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_scld_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t scld_filter_h[32][2], uint32_t scld_filter_v[32][2]); + +/** +* @brief 获取AP 配置 BTA回复数据最大size +* @param rx_ctrl_handle: dsi rx handle +* @retval 返回数据大小 +*/ +uint32_t hal_dsi_rx_ctrl_get_max_ret_size(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 获取AP Compression Mode Command配置,默认为0,谨慎使用 +* @param rx_ctrl_handle: dsi rx handle +* @retval AP 配置compressen_en +*/ +bool hal_dsi_rx_ctrl_get_compressen_en(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 生成一个TE信号 +* @param rx_ctrl_handle: dsi rx handle +* @retval none +*/ +bool hal_dsi_rx_ctrl_gen_a_tear_signal(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 输入分辨率切换接口 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_toggle_resolution(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 启动高性能模式,通常为debug使用 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_hight_performan_mode(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 配置TE信号为软件模式 +* @param rx_ctrl_handle: dsi rx handle +* @retval none +*/ +bool hal_dsi_rx_ctrl_set_sw_tear_mode(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 配置TE信号为硬件模式 +* @param rx_ctrl_handle: dsi rx handle +* @retval none +*/ +bool hal_dsi_rx_ctrl_set_hw_tear_mode(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief 配置 pentile格式 +* @param rx_ctrl_handle: dsi rx handle +* @param src_format: pentile format +* @param g_swap: swap G0 G1 +* @param rb_swap: swap R B +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_pentile_format(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, pentile_src_format_e src_format, pentile_g_swap_e g_swap, pentile_rb_swap_e rb_swap); + +/** +* @brief 配置 RX escape clk +* @param rx_ctrl_handle: dsi rx handle +* @param esc_clk: escape clk 单位Hz,10000000时回CMD为10Mhz +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_esc_clk(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t esc_clk); + +/** +* @brief 自动计算并配置硬件filter +* @param rx_ctrl_handle: dsi rx handle +* @param enable: 启动/关闭 硬件filter +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_auto_hw_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, bool enable); + +/* +* @brief 配置DCS cmd 透传模式, Tx init 之后生效 +* @param enable/disable +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_dcs_direct_mode(bool enable); + +/* +* @brief 输入帧率修改(针对video mode) +* @param rx_ctrl_handle: dsi rx handle +* @param frame_rate：frame rate +*/ +bool hal_dsi_rx_ctrl_toggle_input_frame_rate(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, dsi_video_frame_rate_e frame_rate); + +/** +* @brief 配置TE模式扩展接口 +* @param line_num: 同步行号,范围1 ~ input height +建议从最大开始配置,step为100逐步减小,直到完全不出现撕裂 +* @param te_mode: 产生 te 模式,建议使用HW mode +* @retval none +*/ +bool hal_dsi_rx_ctrl_set_tear_mode_ex(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t line_num, te_mode_e te_mode); + +/** +* @brief 输入分辨率切换扩展接口 +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_toggle_resolution_ex(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +#if !defined(ISP_568) && !defined(ISP_368) + /* ISP_518/ISP_308 接口 */ + /** + * @brief 客制化 Channel Gain 配置,用于图像质量调节 + * @param rx_ctrl_handle: dsi rx handle + * @param gain_r: channel gain coefficient for R + * @param gain_g: channel gain coefficient for G + * @param gain_b: channel gain coefficient for B + * @retval true/false + */ + bool hal_dsi_rx_ctrl_set_cus_pq_gain(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, int r_gain, int g_gain, int b_gain); + + /** + * @brief 客制化enhance for luma参数配置,用于图像质量调节 + * @param rx_ctrl_handle: dsi rx handle + * @param enhl_str: Enhance Str + * @param enhl_edgeslope: Enhance Edge Slope + * @retval none + */ + bool hal_dsi_rx_ctrl_set_cus_pq_enh_lum(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t enhl_str, uint32_t enhl_edgeslope); + + /** + * @brief 客制化false color remove for chroma参数配置,用于图像质量调节 + * @param rx_ctrl_handle: dsi rx handle + * @param desatstr: 饱和度调整参数 范围:0-4095 + * @param desatslope: 饱和度调整斜率 范围:0-4095 + * @retval none + */ + bool hal_dsi_rx_ctrl_set_cus_pq_enh_chr(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t desatstr, uint32_t desatslope); + + /** + * @brief 客制化false color remove for chroma参数配置2,用于图像质量调节 + * @param rx_ctrl_handle: dsi rx handle + * @param desatmode: 饱和度调整模式 0-降低饱和度 1-提升饱和度 + * @param fc_final_alpha: 饱和度调整参数 范围:0 - 255 + * @param edge_med_slope: 饱和度调整参数 范围:0 - 4095 + * @retval none + */ + bool hal_dsi_rx_ctrl_set_cus_pq_enh_chr2(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t desatmode, uint32_t fc_final_alpha, uint32_t edge_med_slope); + +#else + /* ISP_568/ISP_368 接口 */ + /** + * @brief 裁剪输入video多余部分，用于部分机型比如mipi输入是900x1792,实际有效部分为828x1792,可用于裁剪右边跟下边 + * @param rx_ctrl_handle: dsi rx handle + * @param crop_width: 需要裁剪的列数 + * @param crop_height: 需要裁剪的行数 + * @retval true/false + */ + bool hal_dsi_rx_ctrl_crop_video(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t crop_width, uint32_t crop_height); + + /* + * @brief 初始化画点模式,全屏赋值 + * @param rx_ctrl_handle: dsi rx handle + * @param red_data: 像素点R分量 + * @param green_data: 像素点G分量 + * @param blue_data: 像素点B分量 + * @retval none + */ + void hal_dsi_rx_ctrl_draw_mode_init(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t red_data, uint8_t green_data, uint8_t blue_data); + + /* + * @brief 配置像素颜色 + * @param rx_ctrl_handle: dsi rx handle + * @param x: 像素点的x 坐标 + * @param y: 像素点的y 坐标 + * @param red_data: 像素点R分量 + * @param green_data: 像素点G分量 + * @param blue_data: 像素点B分量 + * @retval none + */ + void hal_dsi_rx_ctrl_set_pixel_data(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, int x, int y, uint8_t red_data, uint8_t green_data, uint8_t blue_data); + + /* + * @brief 填充颜色矩形 + * @param rx_ctrl_handle: dsi rx handle + * @param x1,y1: 矩形起始点 + * @param x2,y2: 矩形终点 + * @param red_data: 像素点R分量 + * @param green_data: 像素点G分量 + * @param blue_data: 像素点B分量 + * @retval none + */ + void hal_dsi_rx_ctrl_set_rect_pixel_data(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, int x1, int x2, int y1, int y2, uint8_t red_data, uint8_t green_data, uint8_t blue_data); +#endif + +#endif //__HAL_DSI_RX_CTRL_H__ diff --git a/src/sdk/include/hal_dsi_tx_ctrl.h b/src/sdk/include/hal_dsi_tx_ctrl.h new file mode 100644 index 0000000..652b498 --- /dev/null +++ b/src/sdk/include/hal_dsi_tx_ctrl.h @@ -0,0 +1,284 @@ +/******************************************************************************* +* +* +* File: hal_dsi_tx_ctrl.h +* Description: hal mipi dsi tx 头文件 +* Version: V0.1 +* Date: 2021-04-23 +* Author: wuc + *******************************************************************************/ +#ifndef __HAL_DSI_TX_CTRL_H__ +#define __HAL_DSI_TX_CTRL_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "hal_gpio.h" +#include "stdint.h" +#include "stdbool.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/** +* @brief 客制化MIPI TX参数结构体 +*/ +typedef struct +{ + bool used; /* handle使用标志位 */ + uint8_t lane_num; + dsi_virtual_channel_e channel_id; + dsi_video_mode_type_e vid_mode; + dsi_tx_cmd_tx_type_e cmd_tx_type; /* 初始化模式传输命令方式，0:HS; 1:LP */ + uint8_t pclk_offset; /* 增加lane byte clk以增大HFP，适配LONG H的TP */ + uint32_t dpi_vsa; + uint32_t dpi_vbp; + uint32_t dpi_vfp; + uint32_t dpi_hsa; + uint32_t dpi_hbp; + uint32_t dpi_hfp; + dsi_base_trans_info_t base_info; /* mipi video 转换基本信息 */ + uint32_t tx_line_delay; /* tx 发送至屏端显示的延迟行数,由屏端决定,用于分辨率切换时确认切换时间点 */ + float tx_frame_rate; /* 默认60Hz输出,不建议配置为其他,仅作为debug使用 */ + bool tx_clkawayshs; /* 默认为false, 配置为true时video mode消隐行期间clk不进入LP */ + uint8_t blank_rows; /* 默认为0, 针对特殊屏使用，大于0时生效表示向下补黑blank_rows行 */ + uint8_t blank_columns; /* 默认为0, 针对特殊屏使用，大于0时生效表示向右补黑blank_columns列 */ + bool lp_exit_lpdt; /* 每一条LP CMD都退出LPDT */ + bool tx_cmd_mode_sync; /* TX command mode 输出同步 */ +} hal_dsi_tx_ctrl_handle_t; + +/** +* @brief crop parameters +*/ +typedef struct +{ + uint16_t crop_top; + uint16_t crop_bottom; + uint16_t crop_left; + uint16_t crop_right; +} hal_dsi_tx_crop_t; + +/** +* @brief MIPI TX初始化 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval 成功:0 失败:-1 +*/ +bool hal_dsi_tx_ctrl_init(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX反初始化 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval 成功:0 失败:-1 +*/ +bool hal_dsi_tx_ctrl_deinit(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX创建实例 +* @param 无 +* @retval tx_ctrl_handle: MIPI TX实例 +*/ +hal_dsi_tx_ctrl_handle_t *hal_dsi_tx_ctrl_create_handle(void); + +/** +* @brief MIPI TX释放实例 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval 成功:0 失败:-1 +*/ +bool hal_dsi_tx_ctrl_release_handle(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX开始运行 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval 成功:0 失败:-1 +*/ +bool hal_dsi_tx_ctrl_start(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TX停止运行 +* @param tx_ctrl_handle: MIPI TX实例 +* @retval 成功:0 失败:-1 +*/ +bool hal_dsi_tx_ctrl_stop(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief 进入初始化panel +* @param 无 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_enter_init_panel_mode(void); + +/** +* @brief 退出初始化panel +* @param 无 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_exit_init_panel_mode(void); + +/** +* @brief MIPI TX接收命令 +* @param data_type: 数据类型，参考枚举类型dsi_data_type_e +* @param vc: 虚拟通道编号，参考枚举类型dsi_virtual_channel_e +* @param cmd: DCS指令 +* @param size: 读取数据长度 +* @param data: 数据存放地址 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_read_cmd(uint8_t data_type, uint8_t vc, uint8_t cmd, uint8_t size, uint8_t *data); + +/** +* @brief MIPI TX发送命令 +* @param data_type: 数据类型，参考枚举类型dsi_data_type_e +* @param vc: 虚拟通道编号，参考枚举类型dsi_virtual_channel_e +* @param cmd_count: 可变参数个数 +* @param ...: 可变参数 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_write_cmd(uint8_t data_type, uint8_t vc, uint8_t cmd_count, ...); + +/** +* @brief MIPI TX发送命令 +* @param data_type: 数据类型，参考枚举类型dsi_data_type_e +* @param vc: 虚拟通道编号，参考枚举类型dsi_virtual_channel_e +* @param size: data个数 +* @param data: data数组 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_write_array_cmd(uint8_t data_type, uint8_t vc, uint8_t size, const uint8_t *data); + +/** +* @brief 设置TX溢出时钟分频系统 +* @param esc_div: TX溢出时钟分频系数 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_escape_clock_div(uint8_t esc_div); + +/** +* @brief 屏端复位脚操作 +* @param state: Reset脚拉高、拉低 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_panel_reset_pin(gpio_level_e state); + +/** +* @brief 设置部分显示的区域 +* @param st_line: 起始行 +* @param st_col: 起始列 +* @param end_line: 结束行 +* @param end_col: 结束列 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_partial_disp_area(uint32_t st_line, uint32_t st_col, uint32_t end_line, uint32_t end_col); + +/** +* @brief 部分显示功能开关 +* @param pd_en: 开关部分显示功能 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_partial_disp(function_state_e pd_en); + +/** +* @brief 设置复写颜色 +* @param R: RGB的R分量 +* @param G: RGB的G分量 +* @param B: RGB的B分量 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_overwrite_rgb(uint8_t R, uint8_t G, uint8_t B); + +/** +* @brief 全屏复写开关 +* @param ow_en: 开关全屏复写功能 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_overwrite(function_state_e ow_en); + +/** +* @brief 设置RGB或BGR +* @param endianness: 选择RGB或BGR显示 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_endianness(dpi_endianness_type_e endianness); + +/** +* @brief 设置CCM参数 +* @param coef: 客制化参数，参考结构体ccm_coef_t +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_ccm(ccm_coef_t coef); + +/** +* @brief 控制TX VPG的输出 +* @param vpg_en: 使能VPG +* @param style: VPG的样式 +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_vpg(function_state_e vpg_en, dsi_tx_vpg_style_e style); + +/** +* @brief 在video mode下使能LP CMD +* @param lp_en:使能LP CMD +* @retval 无 +*/ +void hal_dsi_tx_ctrl_set_lp_cmd(function_state_e lp_en); + +/** +* @brief 裁剪tx输出的图像 +* @param tx_ctrl_handle: dsi tx handle +* @param crop: 裁剪参数 +* @retval 无 +*/ +void hal_dsi_tx_crop_pic(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, hal_dsi_tx_crop_t *crop); + +#if !defined(ISP_568) && !defined(ISP_368) + /* ISP_518/ISP_308 接口 */ + /** + * @brief 设置水平翻转 + * @param flip_en: 开关水平翻转功能 + * @retval 无 + */ + void hal_dsi_tx_ctrl_set_horizon_flip(function_state_e flip_en); + + /** + * @brief 设置tx 画质filter + * @param tx_ctrl_handle: dsi tx handle + * @param filter_h: 水平方向filter + * @param filter_v: 垂直方向filter + * @retval true/false + */ + bool hal_dsi_tx_ctrl_set_cus_pq_filter(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint32_t filter_h[32][2], uint32_t filter_v[32][2]); + + /** + * @brief 设置tx边缘参数,只在 + * @param tx_ctrl_handle: dsi tx handle + * @param threshold: 边缘增强强度 + * @param slope: 边缘增强范围 + * @retval true/false + */ + bool hal_dsi_tx_ctrl_set_cus_pq_edge(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint8_t threshold, uint16_t slope); +#else + /* ISP_568/ISP_368 接口 */ + /** + * @brief 设置tx 画质filter + * @param tx_ctrl_handle: dsi tx handle + * @param filter: tx filter + * @retval true/false + */ + bool hal_dsi_tx_ctrl_set_cus_pq_filter(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint32_t filter[32]); + + /** + * @brief TX command mode 同步接口,在收到屏端TE信号后调用，防止撕裂 + * @param tx_ctrl_handle: dsi tx handle + * @retval true/false + */ + bool hal_dsi_tx_ctrl_cmd_mode_rcv_te(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); +#endif + +#endif //__HAL_DSI_TX_CTRL_H__ diff --git a/src/sdk/include/hal_gpio.h b/src/sdk/include/hal_gpio.h new file mode 100644 index 0000000..6d69a97 --- /dev/null +++ b/src/sdk/include/hal_gpio.h @@ -0,0 +1,537 @@ +/******************************************************************************* +* +* +* File: hal_gpio.h +* Description： gpio HAL层头文件 +* Version： V0.1 +* Date： 2021-03-17 +* Author： wuc + *******************************************************************************/ +#ifndef __HAL_GPIO_H__ +#define __HAL_GPIO_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +/** +* @brief GPIO pin +*/ +typedef enum +{ + /*以GPIO命名PIN*/ + IO_PAD_GPIO0 = 0, + IO_PAD_GPIO1, + IO_PAD_GPIO2, + IO_PAD_GPIO3, + IO_PAD_GPIO4, + IO_PAD_GPIO5, + IO_PAD_GPIO6, + IO_PAD_RESV, + IO_PAD_GPIO8, + IO_PAD_GPIO9, + IO_PAD_GPIO10, + IO_PAD_GPIO11, + IO_PAD_GPIO12, + IO_PAD_GPIO13, + IO_PAD_GPIO14, + IO_PAD_RESV1, + IO_PAD_RESV2, + IO_PAD_GPIO17, + IO_PAD_GPIO18, + IO_PAD_GPIO19, + IO_PAD_GPIO20, + IO_PAD_GPIO21, + + /*以实际PAD NAME命名PIN*/ + IO_PAD_AP_SPIS_MISO = IO_PAD_GPIO0, + IO_PAD_AP_SPIS_MOSI = IO_PAD_GPIO1, + IO_PAD_AP_INT = IO_PAD_GPIO2, + IO_PAD_AP_TE = IO_PAD_GPIO3, + IO_PAD_AP_SWIRE = IO_PAD_GPIO4, + IO_PAD_TD_SPIM_MISO = IO_PAD_GPIO5, + IO_PAD_TD_SPIM_MOSI = IO_PAD_GPIO6, + IO_PAD_TD_RSTN = IO_PAD_RESV, + IO_PAD_TD_TPRSTN = IO_PAD_GPIO8, + IO_PAD_TD_INT = IO_PAD_GPIO9, + IO_PAD_TD_LEDPWM = IO_PAD_GPIO10, + IO_PAD_TD_FC_CLK = IO_PAD_GPIO11, + IO_PAD_TD_FC_CSN = IO_PAD_GPIO12, + IO_PAD_TD_FC_MISO = IO_PAD_GPIO13, + IO_PAD_TD_FC_MOSI = IO_PAD_GPIO14, + IO_PAD_UART_RX = IO_PAD_GPIO17, + IO_PAD_UART_TX = IO_PAD_GPIO18, + IO_PAD_PWMEN = IO_PAD_GPIO19, + IO_PAD_ADCIN = IO_PAD_GPIO20, + IO_PAD_AP_TPRSTN = IO_PAD_GPIO21, + + IO_PAD_AP_SPIS_CLK, + IO_PAD_AP_SPIS_CSN, + IO_PAD_TD_SPIM_CLK, + IO_PAD_TD_SPIM_CSN, + IO_PAD_SFC_CLK, + IO_PAD_SFC_CSN, + IO_PAD_SFC_IO0, + IO_PAD_SFC_IO1, + + IO_PAD_MAX, + + /*以实际BALL编号命名PIN*/ + IO_PIN_A1 = IO_PAD_TD_TPRSTN, + IO_PIN_A2 = IO_PAD_TD_FC_CSN, + IO_PIN_A3 = IO_PAD_TD_SPIM_MISO, + IO_PIN_A4 = IO_PAD_TD_SPIM_CLK, + IO_PIN_A5 = IO_PAD_PWMEN, + IO_PIN_A6 = IO_PAD_ADCIN, + IO_PIN_A7 = IO_PAD_AP_INT, + IO_PIN_A8 = IO_PAD_AP_SPIS_MOSI, + IO_PIN_B1 = IO_PAD_TD_FC_CLK, + IO_PIN_B2 = IO_PAD_TD_FC_MISO, + IO_PIN_B3 = IO_PAD_TD_SPIM_MOSI, + IO_PIN_B4 = IO_PAD_TD_SPIM_CSN, + IO_PIN_B5 = IO_PAD_AP_SWIRE, + IO_PIN_B7 = IO_PAD_AP_SPIS_MISO, + IO_PIN_B8 = IO_PAD_AP_SPIS_CSN, + IO_PIN_C1 = IO_PAD_TD_FC_MOSI, + IO_PIN_C2 = IO_PAD_TD_LEDPWM, + IO_PIN_C4 = IO_PAD_UART_TX, + IO_PIN_C5 = IO_PAD_UART_RX, + IO_PIN_C6 = IO_PAD_AP_TE, + IO_PIN_D1 = IO_PAD_TD_RSTN, + IO_PIN_D2 = IO_PAD_TD_INT, + IO_PIN_D7 = IO_PAD_AP_TPRSTN, + IO_PIN_D8 = IO_PAD_AP_SPIS_CLK, +} io_pad_e; + +/** +* @brief PAD_AP_SPIS_CLK可选的mode +*/ +typedef enum +{ + IO_MODE_JTAG_TCK = 0, + IO_MODE_SPIS_SCLK = 1, + IO_MODE_I2C0_SCL = 3, +} pad_ap_spis_clk_mode_e; + +/** +* @brief PAD_AP_SPIS_CSN可选的mode +*/ +typedef enum +{ + IO_MODE_JTAG_TRSTN = 0, + IO_MODE_SPIS_CSN = 1, + IO_MODE_I2C0_SDA = 3, +} pad_ap_spis_csn_mode_e; + +/** +* @brief PAD_AP_SPIS_MISO可选的mode +*/ +typedef enum +{ + IO_MODE_JTAG_TDO = 0, + IO_MODE_SPIS_MISO = 1, + IO_MODE_GPIO0 = 2, + IO_MODE_UART_RX_AP = 3, + IO_MODE_SPIM_MISO_AP = 4, +} pad_ap_spis_miso_mode_e; + +/** +* @brief PAD_AP_SPIS_MOSI可选的mode +*/ +typedef enum +{ + IO_MODE_JTAG_TMS = 0, + IO_MODE_SPIS_MOSI = 1, + IO_MODE_GPIO1 = 2, + IO_MODE_UART_TX_AP = 3, + IO_MODE_SPIM_MOSI_AP = 4, +} pad_ap_spis_mosi_mode_e; + +/** +* @brief PAD_AP_TPRSTN可选的mode +*/ +typedef enum +{ + IO_MODE_JTAG_TDI = 0, + IO_MODE_GPIO21 = 2, +} pad_ap_tprstn_mode_e; + +/** +* @brief PAD_AP_INT可选的mode +*/ +typedef enum +{ + IO_MODE_GPIO2 = 2, +} pad_ap_int_mode_e; + +/** +* @brief PAD_AP_TE可选的mode +*/ +typedef enum +{ + IO_MODE_TEAR = 0, + IO_MODE_GPIO3 = 2, +} pad_ap_te_mode_e; + +/** +* @brief PAD_AP_SWIRE可选的mode +*/ +typedef enum +{ + IO_MODE_SWIRE = 0, + IO_MODE_PWMO = 1, + IO_MODE_GPIO4 = 2, +} pad_ap_swire_mode_e; + +/** +* @brief PAD_TD_SPIM_CLK可选的mode +*/ +typedef enum +{ + IO_MODE_SPIM_SCLK = 0, + IO_MODE_I2C1_SCL = 1, +} pad_td_spim_clk_mode_e; + +/** +* @brief PAD_TD_SPIM_CSN可选的mode +*/ +typedef enum +{ + IO_MODE_SPIM_CSN = 0, + IO_MODE_I2C1_SDA = 1, +} pad_td_spim_csn_mode_e; + +/** +* @brief PAD_TD_SPIM_MISO可选的mode +*/ +typedef enum +{ + IO_MODE_SPIM_MISO = 0, +#if defined(ISP_568) || defined(ISP_368) + IO_MODE_PWMO1 = 1, +#endif + IO_MODE_GPIO5 = 2, +} pad_td_spim_miso_mode_e; + +/** +* @brief PAD_TD_SPIM_MOSI可选的mode +*/ +typedef enum +{ + IO_MODE_SPIM_MOSI = 0, + IO_MODE_GPIO6 = 2, +} pad_td_spim_mosi_mode_e; + +/** +* @brief PAD_TD_TPRSTN可选的mode +*/ +typedef enum +{ + IO_MODE_GPIO8 = 2, +} pad_td_tprstn_mode_e; + +/** +* @brief PAD_TD_INT可选的mode +*/ +typedef enum +{ + IO_MODE_GPIO9_FUNC = 0, + IO_MODE_GPIO9 = 2, +} pad_td_int_mode_e; + +/** +* @brief PAD_TD_LEDPWM可选的mode +*/ +typedef enum +{ + IO_MODE_PWMI = 0, +#if defined(ISP_568) || defined(ISP_368) + IO_MODE_PWMO2 = 1, +#endif + IO_MODE_GPIO10 = 2, +} pad_td_ledpwm_mode_e; + +/** +* @brief PAD_TD_FC_CLK可选的mode +*/ +typedef enum +{ + IO_MODE_TSPIS_CLK = 0, + IO_MODE_GPIO11 = 2, +} pad_td_fc_clk_mode_e; + +/** +* @brief PAD_TD_FC_CSN可选的mode +*/ +typedef enum +{ + IO_MODE_TSPIS_CSN = 0, + IO_MODE_GPIO12 = 2, +} pad_td_fc_csn_mode_e; + +/** +* @brief PAD_TD_FC_MISO可选的mode +*/ +typedef enum +{ + IO_MODE_TSPIS_MISO = 0, + IO_MODE_GPIO13 = 2, +} pad_td_fc_miso_mode_e; + +/** +* @brief PAD_TD_FC_MOSI可选的mode +*/ +typedef enum +{ + IO_MODE_TSPIS_MOSI = 0, + IO_MODE_GPIO14 = 2, +} pad_td_fc_mosi_mode_e; + +/** +* @brief PAD_UART_RX可选的mode +*/ +typedef enum +{ + IO_MODE_UART_RX = 0, + IO_MODE_GPIO17 = 2, +} pad_uart_rx_mode_e; + +/** +* @brief PAD_UART_TX可选的mode +*/ +typedef enum +{ + IO_MODE_UART_TX = 0, + IO_MODE_GPIO18 = 2, +} pad_uart_tx_mode_e; + +/** +* @brief PAD_PWMEN可选的mode +*/ +typedef enum +{ + IO_MODE_GPIO19 = 2, +} pad_pwmen_mode_e; + +/** +* @brief PAD_ADCIN可选的mode +*/ +typedef enum +{ + IO_MODE_GPIO20 = 2, +} pad_adcin_mode_e; + +/** +* @brief PAD_SFC_CLK可选的mode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_CLK = 0, + IO_MODE_EXT_FLS_CLK = 1, +} pad_sfc_clk_mode_e; + +/** +* @brief PAD_SFC_CSN可选的mode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_CSN = 0, + IO_MODE_EXT_FLS_CSN = 1, +} pad_sfc_csn_mode_e; + +/** +* @brief PAD_SFC_IO0可选的mode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_IO0 = 0, + IO_MODE_EXT_FLS_MISO = 1, +} pad_sfc_io0_mode_e; + +/** +* @brief PAD_SFC_IO1可选的mode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_IO1 = 0, + IO_MODE_EXT_FLS_MOSI = 1, +} pad_sfc_io1_mode_e; + +/** +* @brief PAD电压转换速率 +*/ +typedef enum +{ + IO_SLEW_RATE_SLOW = 0, + IO_SLEW_RATE_FAST = 1, +} pad_slew_rate_e; + +/******************************************************************************* +* IOE +*******************************************************************************/ +/** +* @brief GPIO io方向 +*/ +typedef enum +{ + IO_IOE_INPUT = 0, + IO_IOE_OUTPUT +} gpio_ioe_direct_e; + +/** +* @brief GPIO level +*/ +typedef enum +{ + IO_LVL_LOW = 0, + IO_LVL_HIGH +} gpio_level_e; + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 配置指定PAD为GPIO mode，方向为input，指定中断触发方式 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param trig：4种中断触发方式，参考枚举类型sys_cfg_trigger_e +* @retval 无 +*/ +void hal_gpio_init_eint(io_pad_e pad, sys_cfg_trigger_e trig); + +/** +* @brief 注册GPIO中断回调函数 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param cb_func：回调函数地址 +* @param data：回调函数参数地址 +* @retval 无 +*/ +void hal_gpio_reg_eint_cb(io_pad_e pad, fcb_type cb_func); + +/** +* @brief 开关GPIO中断 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param state：开关控制 +* @retval 无 +*/ +void hal_gpio_ctrl_eint(io_pad_e pad, function_state_e state); + +/** +* @brief 获取GPIO中断类型 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @retval 无 +*/ +gpio_int_e hal_gpio_get_int_type(io_pad_e pad); + +/** +* @brief 配置指定PAD为GPIO mode，方向为output，指定初始电平 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param lvl：初始电平，参考枚举类型gpio_level_e +* @retval 无 +*/ +void hal_gpio_init_output(io_pad_e pad, gpio_level_e lvl); + +/** +* @brief 封装设置输出接口 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param lvl：初始电平，参考枚举类型gpio_level_e +* @retval 无 +*/ +void hal_gpio_set_output_data(io_pad_e pad, gpio_level_e lvl); + +/** +* @brief 封装设置输出接口扩展，支持同时通知两个IO输出电平 +* @param pad1：GPIO序号，参考枚举类型gpio_pad_e +* @param pad1_lvl：配置电平，参考枚举类型gpio_level_e +* @param pad2：GPIO序号，参考枚举类型gpio_pad_e +* @param pad2_lvl：配置电平，参考枚举类型gpio_level_e +* @retval 无 +*/ +void hal_gpio_set_output_data_ex(io_pad_e pad1, gpio_level_e pad1_lvl, io_pad_e pad2, gpio_level_e pad2_lvl); + +/** +* @brief 配置指定PAD为GPIO mode，方向为input +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @retval 无 +*/ +void hal_gpio_init_input(io_pad_e pad); + +/** +* @brief 读取输入电平 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @retval 无 +*/ +gpio_level_e hal_gpio_get_input_data(io_pad_e pad); + +/** +* @brief 设置io mode +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param mode：工作模式，参考各PAD对应的mode枚举类型 +* @retval 无 +*/ +void hal_gpio_set_mode(io_pad_e pad, uint8_t mode); + +/** +* @brief 获取指定PAD的默认上拉、下拉状态 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param up_enable：默认上拉状态 +* @param down_enable：默认下拉状态 +* @retval 无 +*/ +void hal_gpio_get_pull_state(io_pad_e pad, function_state_e *up_enable, function_state_e *down_enable); + +/** +* @brief 配置指定PAD的默认上拉、下拉状态 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param up_enable：默认上拉状态 +* @param down_enable：默认下拉状态 +* @retval 无 +*/ +void hal_gpio_set_pull_state(io_pad_e pad, function_state_e up_enable, function_state_e down_enable); + +/** +* @brief 配置指定PAD是否为施密特触发 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param st_enable：1为施密特触发，0为正常触发 +* @retval 无 +*/ +void hal_gpio_set_schmitt_trigger(io_pad_e pad, function_state_e st_enable); + +/** +* @brief 配置指定PAD的驱动能力 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param strength：驱动强度，取值为0~3 +* @retval 无 +*/ +void hal_gpio_set_driving_strength(io_pad_e pad, uint8_t strength); + +/** +* @brief 配置指定PAD的电压转换速率 +* @param pad：GPIO序号，参考枚举类型gpio_pad_e +* @param rate：驱动强度，取值为0~3 +* @retval 无 +*/ +void hal_gpio_set_slew_rate(io_pad_e pad, pad_slew_rate_e rate); + +/** +* @brief 配置AP_RSTN引脚中断 +* @param enable: 中断开关 +* @param cb_func：回调函数 +* @param trig：触发模式 +* @retval 无 +*/ +void hal_gpio_set_ap_reset_int(bool enable, fcb_type cb_func, sys_cfg_trigger_e trig); + +#endif /* __HAL_GPIO_H__ */ diff --git a/src/sdk/include/hal_i2c_master.h b/src/sdk/include/hal_i2c_master.h new file mode 100644 index 0000000..94db44b --- /dev/null +++ b/src/sdk/include/hal_i2c_master.h @@ -0,0 +1,80 @@ +/******************************************************************************* +* +* +* File: hal_i2c_master.h +* Description i2c hal file +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ + +#ifndef __HAL_I2C_MASTER_H__ +#define __HAL_I2C_MASTER_H__ + +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +/************************************************************************** +* @name : hal_i2c_m_dma_init +* @brief : i2c master dma 初始化 +* @param[in] : slave_addr：目标从机地址 +* @param[in] : addr_bits：目标从机地址位数 +* @param[in] : i2c_speed_hz: 通信速率 +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_m_dma_init(uint8_t slave_addr, uint8_t addr_bits, uint32_t i2c_speed_hz); + +/************************************************************************** +* @name : hal_i2c_m_dma_write +* @brief : i2c master dma 发送数据 +* @param[in] : txBuffer：发送数据buffer +* @param[in] : data_size：发送数据个数 +* @return : STATUS_SUCCESS：数据已排入 DMA 通道，但不一定全部发送 +* @return : 其它：发送出错，需要重新调用函数发送 +* @retval : +**************************************************************************/ +status_t hal_i2c_m_dma_write(const uint8_t *txBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_m_dma_read +* @brief : i2c master dma 接收数据 +* @param[in] : reg_address：先发送寄存器地址给从机 +* @param[in] : reg_size：地址字节数 +* @param[in] : rxBuffer：接收数据buffer +* @param[in] : data_size：接收数据长度 +* @return : STATUS_SUCCESS：寄存器地址发送成功，并已配置DMA接收通道，但不一定完成接收 +* @return : 其它：接收出错，需要重新调用函数接收 +* @retval : +**************************************************************************/ +status_t hal_i2c_m_dma_read(uint32_t reg_address, size_t reg_size, uint8_t *rxBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_m_transfer_complate +* @brief : 获取 i2c master 发送状态 +* @param[in] : +* @return : true：数据发送完成 +* @return : false：数据还在发送 +* @retval : +**************************************************************************/ +bool hal_i2c_m_transfer_complate(void); + +/************************************************************************** +* @name : hal_i2c_m_set_high_impedance +* @brief : 将 I2C 主机的IO口设置为高阻态 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_m_set_high_impedance(void); +/************************************************************************** +* @name : hal_i2c_m_deinit +* @brief : i2c主机 IP去初始化（关掉使能、外设时钟） +* @param[in] : +* @return : +* @retval : +***************************************************************************/ +void hal_i2c_m_deinit(void); +#endif /* __HAL_I2C_MASTER_H__*/ + diff --git a/src/sdk/include/hal_i2c_slave.h b/src/sdk/include/hal_i2c_slave.h new file mode 100644 index 0000000..6019ae0 --- /dev/null +++ b/src/sdk/include/hal_i2c_slave.h @@ -0,0 +1,179 @@ +/******************************************************************************* +* +* +* File: hal_i2c_slave.h +* Description i2c hal file +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ + +#ifndef __HAL_I2C_SLAVE_H__ +#define __HAL_I2C_SLAVE_H__ + +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +typedef enum +{ + I2C_S_INT_READ = 0, //发生 读请求 中断 + I2C_S_INT_RX, //发生 接收 中断 + I2C_S_INT_STOP //发生 stop 中断 +} e_i2c_s_int_status; + +#if defined(ISP_568) || defined(ISP_368) +typedef enum +{ + I2C_S_0 = 0, + I2C_S_1, + I2C_S_MAX +} i2c_s_index_e; +#endif + +typedef void (*hal_i2c_s_callback_t)(e_i2c_s_int_status int_status, size_t receive_num); + +/************************************************************************** +* @name : hal_i2c_s_init +* @brief : i2c slave 初始化 +* @param[in] : slave_addr：从机地址 +* @param[in] : addr_bits：从机地址位数 +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_init(uint8_t slave_addr, uint8_t addr_bits); + +/************************************************************************** +* @name : hal_i2c_s_dma_write +* @brief : i2c slave dma 发送数据 +* @param[in] : txBuffer：发送数据buffer +* @param[in] : data_size：发送数据个数 +* @return : STATUS_SUCCESS：数据已排入 DMA 通道，但不一定全部发送 +* @return : 其它：发送出错，需要重新调用函数发送 +* @retval : +**************************************************************************/ +status_t hal_i2c_s_dma_write(const uint8_t *txBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_s_nonblocking_read +* @brief : i2c slave 准备接收数据 +* @param[in] : rxBuffer：接收数据buffer +* @param[in] : data_size：接收数据最大个数 +* @return : STATUS_SUCCESS：已配置准备接收，此时通信不一定开始 +* @return : 其它：接收配置出错，需要重新调用函数配置 +* @retval : +**************************************************************************/ +status_t hal_i2c_s_nonblocking_read(uint8_t *rxBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_s_transfer_complate +* @brief : 获取 i2c slave 发送状态 +* @param[in] : +* @return : true：数据发送完成 +* @return : false：数据还在发送 +* @retval : +**************************************************************************/ +bool hal_i2c_s_write_complate(void); + +/************************************************************************** +* @name : hal_i2c_s_read_complate +* @brief : 获取 i2c slave 接收状态 +* @param[in] : +* @return : 数据接收个数 +* @retval : +**************************************************************************/ +uint8_t hal_i2c_s_read_complate(void); + +/************************************************************************** +* @name : hal_i2c_s_read_complate_clear +* @brief : 清除 i2c slave 接收状态 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_read_complate_clear(void); + +/************************************************************************** +* @name : hal_i2c_s_set_dma_tx_cycle +* @brief : 配置 I2C cycle 模式 +* @param[in] : +* @return : ENABLE：cycle模式，DISABLE：非cycle模式 +* @retval : +**************************************************************************/ +void hal_i2c_s_set_dma_tx_cycle(bool enable); + +/************************************************************************** +* @name : hal_i2c_s_set_transfer +* @brief : 配置 i2c 从机数据解析函数 +* @param[in] :hal_tp_transfer_phone_tmp：解析函数指针 +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_set_transfer(hal_i2c_s_callback_t hal_i2c_s_callback_tmp); + +/************************************************************************** +* @name : hal_i2c_s_read_data +* @brief :read data +* @param[in] : rx_data: 接收数据 +* @return : 1: 成功获取数据 +* @return : 0: 接收 fifo 为空 +* @retval : +**************************************************************************/ +status_t hal_i2c_s_read_data(uint8_t *rx_data); + +/************************************************************************** +* @name : hal_i2c_s_write_data +* @brief :write data +* @param[in] : tx_data: 准备发送的数据 +* @return : 1: 配置发送成功 +* @return : 0: 发送 fifo 已满 +* @retval : +**************************************************************************/ +status_t hal_i2c_s_write_data(const uint8_t tx_data); + +/************************************************************************** + * @name : hal_i2c_s_rxfifo_notempty + * @brief : 判断当前 rxfifo 中是否有数据 + * @param[in] : + * @return : true: rxfifo 中有数据 + * @return : false: rxfifo 中没有数据 + * @retval : + **************************************************************************/ +bool hal_i2c_s_rxfifo_notempty(void); + +/************************************************************************** +* @name : hal_i2c_s_set_high_impedance +* @brief : 将 I2C 从机的IO口设置为高阻态 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_set_high_impedance(void); +/************************************************************************** +* @name : hal_i2c_s_get_tx_byte_num +* @brief : 获取I2C从机发送成功字节数 +* @param[in] : +* @return :发送总字节数 +* @retval : +**************************************************************************/ +int hal_i2c_s_get_tx_byte_num(void); +/************************************************************************** +* @name : hal_i2c_s_deinit +* @brief : i2c IP去初始化（关掉使能、外设时钟） +* @param[in] :slave_num 从机序号 +* @return : +* @retval : +***************************************************************************/ +void hal_i2c_s_deinit(void); +#if defined(ISP_568) || defined(ISP_368) + /************************************************************************** + * @name : hal_i2c_s_sel + * @brief : i2c slave 选择 + * @param[in] : slaver：从机编号 + * @return : + * @retval : + **************************************************************************/ + void hal_i2c_s_sel(i2c_s_index_e slaver); +#endif +#endif /* __HAL_I2C_SLAVE_H__*/ + diff --git a/src/sdk/include/hal_pwm.h b/src/sdk/include/hal_pwm.h new file mode 100644 index 0000000..485351d --- /dev/null +++ b/src/sdk/include/hal_pwm.h @@ -0,0 +1,219 @@ +/******************************************************************************* +* +* +* File: hal_pwm.h +* Description： pwm HAL层头文件 +* Version： V0.1 +* Date： 2021-03-17 +* Author： wuc + *******************************************************************************/ +#ifndef __HAL_PWM_H__ +#define __HAL_PWM_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "hal_gpio.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief PWM触发功能的定义 */ +typedef enum _pwm_out_ctrl_e +{ + PWMO_CTRL_KEEP = 0, + PWMO_CTRL_LOW = 1, + PWMO_CTRL_HIGH = 2, + PWMO_CTRL_TOGGLE = 3, + PWMO_CTRL_MAX +} pwm_out_ctrl_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief PWMO初始化 +* @param 无 +* @retval 无 +*/ +void hal_pwm_out_init(void); + +/** +* @brief PWMO反初始化 +* @param 无 +* @retval 无 +*/ +void hal_pwm_out_deinit(void); + +/** +* @brief PWMO输出脉冲暂停、恢复 +* @param state：开关控制 +* @retval 无 +*/ +void hal_pwm_out_pause(function_state_e state); + +/** +* @brief 配置PWMO脉冲并开始输出 +* @param ctl0：到达阈值thr0时的操作，参考枚举类型pwm_out_ctrl_e +* @param ctl1：到达阈值thr1时的操作，参考枚举类型pwm_out_ctrl_e +* @param thr0：阈值0，单位us +* @param thr1：阈值1，单位us +* @param period：一个周期的时间，单位us +* @retval 无 +*/ +void hal_pwm_out_config_all(pwm_out_ctrl_e ctl0, pwm_out_ctrl_e ctl1, uint32_t thr0, uint32_t thr1, uint32_t period); + +/** +* @brief 在同步所有模式下配置PWMO脉冲所有参数 +* @param ctl0：到达阈值thr0时的操作，参考枚举类型pwm_out_ctrl_e +* @param ctl1：到达阈值thr1时的操作，参考枚举类型pwm_out_ctrl_e +* @param thr0：阈值0，单位us +* @param thr1：阈值1，单位us +* @param period：一个周期的时间，单位us +* @retval 无 +*/ +void hal_pwm_out_sync_all(pwm_out_ctrl_e ctl0, pwm_out_ctrl_e ctl1, uint32_t thr0, uint32_t thr1, uint32_t period); + +/** +* @brief 调制pwm输出以控制背光 +* @param polarity: 极性，false:先高后低，true:先低后高 +* @param duty_ratio: 占空比(0-total_ratio) +* @param total_ratio: 可细分总量 +* @param frequency: 频率，单位HZ +* @retval 无 +*/ +void hal_pwm_out_config_duty_ratio(bool polarity, uint16_t duty_ratio, uint16_t total_ratio, uint32_t frequency); + +/** +* @brief 在同步周期模式下配置PWMO脉冲的周期 +* @param period：一个周期的时间，单位us +* @retval 无 +*/ +void hal_pwm_out_sync_period(uint32_t period); + +/** +* @brief 在同步控制模式下配置PWMO脉冲的控制 +* @param ctl0：到达阈值thr0时的操作，参考枚举类型pwm_out_ctrl_e +* @param ctl1：到达阈值thr1时的操作，参考枚举类型pwm_out_ctrl_e +* @retval 无 +*/ +void hal_pwm_out_sync_ctl(pwm_out_ctrl_e ctl0, pwm_out_ctrl_e ctl1); + +/** +* @brief 在同步阈值模式下配置PWMO脉冲的阈值 +* @param thr0：阈值0，单位us +* @param thr1：阈值1，单位us +* @retval 无 +*/ +void hal_pwm_out_sync_thr(uint32_t thr0, uint32_t thr1); + +/** +* @brief 在同步暂停模式下暂停或恢复PWMO脉冲 +* @param pause_state：暂停或恢复 +* @retval 无 +*/ +void hal_pwm_out_sync_pause(function_state_e pause_state); + +/** +* @brief PWMI初始化 +* @param 无 +* @retval 无 +*/ +void hal_pwm_in_init(void); + +/** +* @brief PWMI反初始化 +* @param 无 +* @retval 无 +*/ +void hal_pwm_in_deinit(void); + +/** +* @brief 注册PWMI中断回调函数，回传PWMI中断类型指针，参考pwm_int_type_e +* @param cb_func：回调函数地址 +* @retval 无 +*/ +void hal_pwm_in_register_callback(fcb_type cb_func); + +/** +* @brief 配置PWMI所有中断的开关 +* @param high_overflow_en：high overflow中断使能开关 +* @param low_overflow_en：low overflow中断使能开关 +* @param total_overflow_en：total overflow中断使能开关 +* @param high_done_en：high done中断使能开关 +* @param low_done_en：low done中断使能开关 +* @param total_done_en：total done中断使能开关 +* @retval 无 +*/ +void hal_pwm_in_config_int(function_state_e high_overflow_en, function_state_e low_overflow_en, function_state_e total_overflow_en, + function_state_e high_done_en, function_state_e low_done_en, function_state_e total_done_en); + +/** +* @brief 配置PWMI单个中断的开关 +* @param pwm_int：中断类型，参考枚举类型pwm_int_type_e +* @param enable：控制开关 +* @retval 无 +*/ +void hal_pwm_in_set_int(pwm_int_type_e pwm_int, function_state_e enable); + +/** +* @brief 关闭PWMI所有中断 +* @param 无 +* @retval 无 +*/ +void hal_pwm_in_clear_int(void); + +/** +* @brief 开关PWMI中断 +* @param state：开关控制 +* @retval 无 +*/ +void hal_pwm_in_ctrl_int(function_state_e state); + +/** +* @brief 获取PWMI脉冲周期时长 +* @param 无 +* @retval 周期时长，单位us +*/ +uint32_t hal_pwm_in_get_total_period(void); + +/** +* @brief 获取PWMI脉冲高电平时长 +* @param 无 +* @retval 高电平时长，单位us +*/ +uint32_t hal_pwm_in_get_high_period(void); + +/** +* @brief 获取PWMI脉冲低电平时长 +* @param 无 +* @retval 低电平时长，单位us +*/ +uint32_t hal_pwm_in_get_low_period(void); + +/** +* @brief 获取PWMI上升沿累积个数 +* @param 无 +* @retval 从模块使能到当前时间的上升沿个数，超过32位宽后清零重新计数 +*/ +uint32_t hal_pwm_in_get_current_count(void); + +#if defined(ISP_568) || defined(ISP_368) + /** + * @brief 选择PWMO输出的IO口 + * @param pad: PWMO输出的IO口,默认为IO_PAD_AP_SWIRE,可选通过IO_PAD_TD_SPIM_MISO、IO_PAD_TD_LEDPWM输出 + * @retval 无 + */ + void hal_pwm_out_sel_io(io_pad_e pad); +#endif +#endif /* __HAL_PWM_H__ */ diff --git a/src/sdk/include/hal_spi_master.h b/src/sdk/include/hal_spi_master.h new file mode 100644 index 0000000..bd75c44 --- /dev/null +++ b/src/sdk/include/hal_spi_master.h @@ -0,0 +1,89 @@ +/******************************************************************************* +* +* +* File: hal_spi_touch.h +* Description spi hal file +* Version V0.1 +* Date 2021-10-25 +* Author zhanghz +*******************************************************************************/ + +#ifndef __HAL_SPI_MASTER_H__ +#define __HAL_SPI_MASTER_H__ + +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +/************************************************************************** +* @name : hal_spi_m_dma_init +* @brief : SPIM DMA 初始化 +* @param[in] :speed：配置通信速率 +* @param[in] :cpha: 配置第一个时钟沿或者第二个时钟沿有效 +* @param[in] :cpol: 配置总线空闲时时钟电平 +* @return : +* @retval : +**************************************************************************/ +void hal_spi_m_dma_init(uint32_t speed, uint8_t cpha, uint8_t cpol); + +/************************************************************************** +* @name : hal_spi_m_dma_write +* @brief : 用SPIM 发送数据 +* @param[in] :data_buffer: 发送数据 buffer 头地址 +* @param[in] :data_size: 发送数据 buffer 长度 +* @return :STATUS_SUCCESS: 配置成功，但数据不一定发送完成 +* @return :其它：配置不成功，需要重新配置发送 +* @retval : +**************************************************************************/ +status_t hal_spi_m_dma_write(const uint8_t *data_buffer, size_t data_size); + +/************************************************************************** +* @name : hal_spi_m_dma_read +* @brief : 用SPIM 读取数据 +* @param[in] :cmd: 发送命令 buffer 头地址 +* @param[in] :cmd_size: 发送命令 buffer 长度 +* @param[in] :data_buffer: 读取数据 buffer 头地址 +* @param[in] :data_size: 发送命令 和 读取数据 buffer 长度 +* @return :STATUS_SUCCESS: 配置成功，但数据不一定读取完成 +* @return :其它：配置不成功，需要重新配置发送 +* @retval : +**************************************************************************/ +status_t hal_spi_m_dma_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size); + +/************************************************************************** +* @name : hal_spi_m_get_transfer_complate +* @brief : 获取 SPIM 通信完成状态 +* @param[in] : +* @return :true：通信完成 +* @retval : +**************************************************************************/ +bool hal_spi_m_get_transfer_complate(void); + +/************************************************************************** +* @name : hal_spi_m_clear_rxfifo +* @brief : 清空 rxfifo 中的数据 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_spi_m_clear_rxfifo(void); + +/************************************************************************** +* @name : hal_spi_m_set_high_impedance +* @brief : 将 SPI 主机的IO口设置为高阻态 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_spi_m_set_high_impedance(void); +/************************************************************************** +* @name : hal_spi_m_deinit +* @brief : 将 SPI 主机去初始化(关掉SPIM) +* @param[in] : +* @return :true +* @retval : +**************************************************************************/ +bool hal_spi_m_deinit(void); + +#endif + diff --git a/src/sdk/include/hal_spi_slave.h b/src/sdk/include/hal_spi_slave.h new file mode 100644 index 0000000..6454ab2 --- /dev/null +++ b/src/sdk/include/hal_spi_slave.h @@ -0,0 +1,181 @@ +/******************************************************************************* +* Copyright (C) 2021-2022, All Rights Reserved. +* +* File: hal_spi_slave.h +* Description spi slave hal file +* Version V0.1 +* Date 2021-10-23 +* Author lzy +*******************************************************************************/ +#ifndef __HAL_SPI_SLAVE_H__ +#define __HAL_SPI_SLAVE_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/* +自动模式event eg:rx_buffer_size=8, host发送16个byte数据, +收到前面8byte数据时产生SPI_EVENT_RCV_FULL事件,后续的事件丢弃, +传输完成后host拉高CS,产生SPI_EVENT_RCV_CS_HIGH事件 +*/ +typedef enum +{ + SPI_EVENT_RCV_DATA = 0, /* 手动模式下，SPIS 接受每接收一个数据即产生事件 */ + SPI_EVENT_RCV_FULL, /* 自动模式下 ，SPIS 接收数据等于buffer size后产生事件 */ + SPI_EVENT_RCV_CS_HIGH, /* 自动模式下 ，SPIS 收到CS 拉高的信号 */ +} hal_spis_event_e; + +typedef struct hal_spi_packet_info_t +{ + uint8_t *rx_buffer; /* 接收buffer */ + uint32_t rx_buffer_size; /* 接收buffer size */ + bool rx_circle; /* 接收circle mode */ + const uint8_t *tx_buffer; /* 发送buffer */ + uint32_t tx_buffer_size; /* 发送buffer size */ + bool tx_circle; /* 发送circle mode */ + uint32_t packet_size; /* packet size */ +} hal_spi_packet_info_t; + +typedef void (*hal_spi_slave_cb)(hal_spis_event_e event, hal_spi_packet_info_t *packet_info); + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 初始化spi slave 模块 +* @param cpha: 相位配置 +* @param cpol: 极性配置 +* @param dma: 自动模式下DMA enable +* @retval true/false +*/ +bool hal_spi_slave_init(uint8_t cpha, uint8_t cpol, bool dma); + +/** +* @brief spi slave 模块去初始化 +* @param none +* @retval true/false +*/ +bool hal_spi_slave_deinit(void); + +/** +* @brief spi slave 注册回调函数 +* @param cb：call back +* @retval true/false +*/ +bool hal_spi_slave_register_callback(hal_spi_slave_cb cb); + +/** +* @brief spi slave enable +* @param none +* @retval true/false +*/ +bool hal_spi_slave_enable(void); + +/** +* @brief spi slave disable +* @param none +* @retval true/false +*/ +bool hal_spi_slave_disable(void); + +/** +* @brief spi slave 配置自动接收buffer, 底层自动接收数据后调用callback, buffer为NULL时为自动接收模式 +* @param buffer：自动模式数据接收buffer +* @param size： 自动模式数据接收buffer size +* @param circle：circle mode，packet size 大于buffer size 时从offset 0重新写(暂不支持) +* @retval true/false +*/ +bool hal_spi_slave_set_auto_rx_buffer(uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief spi slave 配置自动发送buffer +* @param buffer：自动模式数据发送buffer, buffer为NULL为切换为自动模式 +* @param size： 自动模式数据发收buffer size +* @param circle：circle mode，重复发送buffer的数据 +* @retval true/false +*/ +bool hal_spi_slave_set_auto_tx_buffer(const uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief spi slave 启动自动传输 +* @param none +* @retval true/false +*/ +bool hal_spi_slave_auto_transfer_start(void); + +/** +* @brief spi slave 停止自动传输(circle mode 下packet结束可使用) +* @param none +* @retval true/false +*/ +bool hal_spi_slave_auto_transfer_abort(void); + +/** +* @brief spi slave flush fifo(circle mode 下packet结束后可使用) +* @param none +* @retval true/false +*/ +bool hal_spi_slave_flush_fifo(void); + +/** +* @brief reset spis tx,在启动spis后重新配置输出数据 +* @param buffer：自动模式数据发送buffer +* @param size： 自动模式数据发收buffer size +* @param circle：circle mode，重复发送buffer的数据 +* @retval true/false +*/ +bool hal_spi_slave_reset_tx(const uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief check spi slave busy(CS status) +* @param none +* @retval true/false +*/ +bool hal_spi_slave_busy(void); + +/** +* @brief 获取rx fifo 非空 +* @param none +* @retval true/false +*/ +bool hal_spi_slave_get_rxfifo_notempty(void); + +/** +* @brief 手动模式下从rx fifo 读取数据 +* @param none +* @retval true/false +*/ +bool hal_spi_slave_read_data(uint32_t *data); + +/** +* @brief 手动模式下往tx fifo 写数据 +* @param none +* @retval true/false +*/ +bool hal_spi_slave_write_data(const uint8_t data); + +/************************************************************************** +* @name : hal_spi_s_set_high_impedance +* @brief : 将 SPI 从机的IO口设置为高阻态 +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_spi_s_set_high_impedance(void); + +#endif /* __HAL_SPI_SLAVE_H__*/ + diff --git a/src/sdk/include/hal_swire.h b/src/sdk/include/hal_swire.h new file mode 100644 index 0000000..de654a4 --- /dev/null +++ b/src/sdk/include/hal_swire.h @@ -0,0 +1,75 @@ +/******************************************************************************* +* +* +* File: hal_swire.h +* Description： swire HAL层头文件 +* Version： V0.1 +* Date： 2021-03-17 +* Author： wuc + *******************************************************************************/ +#ifndef __HAL_SWIRE_H__ +#define __HAL_SWIRE_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief SWIRE初始化 +* @param 无 +* @retval 无 +*/ +void hal_swire_init(void); + +/** +* @brief SWIRE反初始化 +* @param 无 +* @retval 无 +*/ +void hal_swire_deinit(void); + +/** +* @brief 配置SWIRE脉冲并开始输出 +* @param start_time：起始时长，单位us +* @param stop_time：结束时长，单位us，必须大于300us +* @param high_time：高电平时长，单位us +* @param low_time：低电平时长，单位us +* @param pulse：上升沿个数 +* @retval 无 +*/ +void hal_swire_start(uint32_t start_time, uint32_t stop_time, + uint32_t high_time, uint32_t low_time, + uint32_t pulse); + +/** +* @brief 打开或关闭背光 +* @param state：开关控制 +* @retval 无 +*/ +void hal_swire_open(function_state_e state); + +/** +* @brief 注册回调函数 +* @param cb_func：回调函数地址 +* @retval 无 +*/ +void hal_swire_register_callback(fcb_type cb_func); + +#endif /* __HAL_SWIRE_H__ */ diff --git a/src/sdk/include/hal_system.h b/src/sdk/include/hal_system.h new file mode 100644 index 0000000..081663b --- /dev/null +++ b/src/sdk/include/hal_system.h @@ -0,0 +1,167 @@ +/******************************************************************************* +* +* +* File: hal_system.h +* Description hal 通用系统接口头文件 +* Version V0.1 +* Date 2021-05-21 +* Author lzy + *******************************************************************************/ +#ifndef __HAL_SYSTEM_H__ +#define __HAL_SYSTEM_H__ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief system 初始化 +* @param none +* @retval none +*/ +void hal_system_init(uint32_t sysclk); + +/** +* @brief system 初始化 console +* @param baud_rate 波特率 +* @retval none +*/ +void hal_system_init_console(uint32_t baud_rate); + +/** +* @brief mcu进入idle模式,等待中断唤醒 +* @param disable_systick: 进入idle时是否关闭systick(退出idle 恢复systick) +* @retval none +*/ +void hal_system_idle_mode(bool disable_systick); + +/** +* @brief 注册systick回调函数 +* @param cb_func：回调函数地址 +* @retval 无 +*/ +void hal_system_register_systick_cb(fcb_type cb_func); + +/** +* @brief 启动sys tickt +* @param ms: sys tickt 间隔, 范围1-10ms +* @retval true/false +*/ +bool hal_system_enable_systick(uint8_t ms); + +/** +* @brief 获取systickt +* @param none +* @retval 当前systickt值 +*/ +bool hal_system_disable_systick(void); + +/** +* @brief 获取systickt +* @param none +* @retval 当前systickt值 +*/ +uint32_t hal_system_get_tick(void); + +/** +* @brief 进入deep sleep mode 模式, 等待AP_RSTN 唤醒 +* @param polarity true:上升沿唤醒, false:下降沿唤醒 +* @retval none +*/ +void hal_system_deep_sleep_mode(bool polarity); + +/** +* @brief 配置共享flash开关(使用过后注意关闭,常开功耗会增加) +* @param enable:true:可通过F_SPI访问内部flash , false:不可通过F_SPI访问内部flash +* @retval true/false +*/ +bool hal_system_share_flash_mode(bool enable); + +/** +* @brief sleep mode 配置 +* @param enable +* @retval none +*/ +void hal_system_sleep_mode(bool enable); + +/** +* @brief reset chip +* @param none +* @retval none +*/ +void hal_system_reset_chip(void); + +/** +* @brief 开关PVD检测 +* @param none +* @retval none +*/ +void hal_system_set_pvd(bool enable); + +/** +* @brief VCC电源开关， +* 使用场景: VCC掉电，13D与13M使用外灌电源时，关闭内部VCC供电,防止电源倒灌 +* @param enable: true:打开CP, false:关闭CP +* @retval none +*/ +void hal_system_set_vcc(bool enable); + +/** +* @brief 用户字节数组形式从flash读取数据,按页读取，每页1024字节 +* @param *usr_cfg_t_addr(数组首地址), + usr_cfg_t_size(数组大小可以超过1024，可以按页读也可连续跨页读) + flash_page （页0~63） +* @retval bool 无 +*/ +bool hal_system_flash_read(uint8_t *usr_cfg_t_addr, uint16_t usr_cfg_t_size, uint8_t flash_page); + +/** +* @brief 用户字节数组形式存入flash(次数有限，不可频繁写入),按页写入，每页1024字节 +* @param *usr_cfg_t_addr(数组首地址), + usr_cfg_t_size(数组大小可以超过1024，可以按页写也可连续跨页写入)， + 推荐按页顺序写入方式，第一次必须从0页开始写入，后续才可1~63任意页写入 + flash_page （写入页0~63） +* @retval bool 校验size是否超出 +*/ +bool hal_system_flash_write(uint8_t *usr_cfg_t_addr, uint16_t usr_cfg_t_size, uint8_t flash_page); + +#if defined(ISP_568) || defined(ISP_368) + /** + * @brief 控制DPHY内部校准开关 + * @param en: 使能开关 + * @retval none + */ + void hal_system_set_phy_calibration(bool en); +#endif + +/** +* @brief 获取上位机设置的debug state +* @param none +* @retval debug state +*/ +uint32_t hal_system_get_debug_state(void); + +/** +* @brief clear debug state(debug only) +* @param none +* @retval none +*/ +void hal_system_clear_debug_state(void); + +#endif //__HAL_SYSTEM_H__ diff --git a/src/sdk/include/hal_timer.h b/src/sdk/include/hal_timer.h new file mode 100644 index 0000000..f395c19 --- /dev/null +++ b/src/sdk/include/hal_timer.h @@ -0,0 +1,92 @@ +/******************************************************************************* +* +* +* File: hal_timer.h +* Description： timer HAL层头文件 +* Version： V0.1 +* Date： 2021-03-16 +* Author： wuc + *******************************************************************************/ +#ifndef __HAL_TIMER_H__ +#define __HAL_TIMER_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 指定定时器初始化 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval 无 +*/ +void hal_timer_init(timer_num_e index); + +/** +* @brief 指定定时器反初始化 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval 无 +*/ +void hal_timer_deinit(timer_num_e index); + +/** +* @brief 启动指定定时器 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @param ms：超时时间，单位ms。由于应用场景一般是ms级别的，应用开发不需要计数具体时针数， + 故直接输入时间，在接口内部换算成时钟数进行寄存器设置。 +* @param cb_func：回调函数地址，不需要则填NULL +* @param data：回调函数的参数地址，不需要则填NULL +* @retval 无 +*/ +void hal_timer_start(timer_num_e index, uint32_t ms, fcb_type cb_func, void *data); + +/** +* @brief 启动指定定时器 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @param us：超时时间，单位us。由于应用场景一般是us级别的，应用开发不需要计数具体时针数， + 故直接输入时间，在接口内部换算成时钟数进行寄存器设置。 +* @param cb_func：回调函数地址，不需要则填NULL +* @param data：回调函数的参数地址，不需要则填NULL +* @retval 无 +*/ +void hal_timer_start_ex(timer_num_e index, uint32_t us, fcb_type cb_func, void *data); + +/** +* @brief 停止指定定时器 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval 无 +*/ +void hal_timer_stop(timer_num_e index); + +/** +* @brief 设置定时器是否循环超时 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @param bool enable：循环超时使能 +* @retval 无 +*/ +void hal_timer_set_repeat(timer_num_e index, bool repeat); + +/** +* @brief 获取指定指示器状态 +* @param index：实例序号(0~3)，参考枚举类型timer_num_e +* @retval 参考timer_status_e +*/ +timer_status_e hal_timer_get_status(timer_num_e index); + +#endif /* __HAL_TIMER_H__ */ diff --git a/src/sdk/include/hal_uart.h b/src/sdk/include/hal_uart.h new file mode 100644 index 0000000..fcfd17a --- /dev/null +++ b/src/sdk/include/hal_uart.h @@ -0,0 +1,131 @@ +/******************************************************************************* +* +* +* File: hal_uart.h +* Description +* Version V0.1 +* Date 2021-11-24 +* Author kc +*******************************************************************************/ + +#ifndef __HAL_UART_H__ +#define __HAL_UART_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "stdint.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef enum +{ + HAL_UART_STOPBIT_1 = 0, + HAL_UART_STOPBIT_2 = 1 +} hal_uart_stopbit_e; + +typedef enum +{ + HAL_UART_PARITY_NO = 0, + HAL_UART_PARITY_ODD = 0x01, + HAL_UART_PARITY_EVEN = 0x03, +} hal_uart_parity_e; + +typedef enum +{ + HAL_UART_DATAWIDTH_6 = 1, + HAL_UART_DATAWIDTH_7 = 2, + HAL_UART_DATAWIDTH_8 = 3 +} hal_uart_datawidth_e; + + +typedef struct +{ + uint32_t baudrate; + hal_uart_stopbit_e stopbits; + hal_uart_datawidth_e data_width; + hal_uart_parity_e parity; +} hal_uart_config_t; + + +typedef struct _hal_uart_handle_t +{ + hal_uart_config_t uart_config; + void (* txdmacallback)(void); + void (* rxdmacallback)(void); +} hal_uart_handle_t; + + +typedef enum +{ + HAL_UART_OK = 0x00U, + HAL_UART_ERROR = 0x01U, + HAL_UART_BUSY = 0x02U, + HAL_UART_TIMEOUT = 0x03U +} hal_uart_status; + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 初始化设置uart 传输的波特率、位宽等参数 +* @param hal_uart_handle_t +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_init(hal_uart_handle_t *huart); + +/** +* @brief 关闭uart口 +* @param hal_uart_handle_t +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_deinit(hal_uart_handle_t *huart); + +/** +* @brief 阻塞式发送数据 +* @param hal_uart_handle_t +* @param pdata:传输数据指针 +* @param size:传输数据大小 +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_transmit_blocking(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +/** +* @brief 阻塞式接收数据 +* @param hal_uart_handle_t +* @param pdata:传输数据指针 +* @param size:传输数据大小 +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_receive_blocking(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +/** +* @brief 使用DMA发送数据，TX和RX共用一个DMA 通道，所以需要TX/RX传输完后才能进行RX/TX的传输 +* @param hal_uart_handle_t +* @param pdata:传输数据指针 +* @param size:传输数据大小 +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_transmit_dma(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +/** +* @brief 使用DMA发送数据，TX和RX共用一个DMA 通道，所以需要TX/RX传输完后才能进行RX/TX的传输 +* @param hal_uart_handle_t +* @param pdata:传输数据指针 +* @param size:传输数据大小 +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_receive_dma(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +#endif /* __HAL_UART_H__ */ diff --git a/src/sdk/include/hal_wdg.h b/src/sdk/include/hal_wdg.h new file mode 100644 index 0000000..87c9360 --- /dev/null +++ b/src/sdk/include/hal_wdg.h @@ -0,0 +1,94 @@ +/******************************************************************************* +* +* +* File: hal_wdg.h +* Description： wdg HAL层头文件 +* Version： V0.1 +* Date： 2021-03-16 +* Author： wuc + *******************************************************************************/ +#ifndef __HAL_WDG_H__ +#define __HAL_WDG_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! + * @brief watch dog模式 + */ +typedef enum +{ + WDG_MODE_RESET = 0, //复位模式，跑飞复位 + WDG_MODE_INTERRUPT = 1 //中断模式，跑飞进入中断 +} wdg_mode_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief 看门狗初始化 +* @param 无 +* @retval 无 +*/ +void hal_wdg_init(void); + +/** +* @brief 看门狗反初始化 +* @param 无 +* @retval 无 +*/ +void hal_wdg_deinit(void); + +/** +* @brief 启动看门狗 +* @param wdg_mode_e modeSel: 复位或中断模式 +* @param uint32_t load: 超时时间，单位ms +* @retval 无 +*/ +void hal_wdg_start(wdg_mode_e modeSel, uint32_t load); + +/** +* @brief 停止看门狗 +* @param 无 +* @retval 无 +*/ +void hal_wdg_stop(void); + +/** +* @brief 设置WDG是否循环超时 +* @param enable：循环超时使能 +* @retval 无 +*/ +void hal_wdg_set_repeat(bool repeat); + +/** +* @brief 注册中断回调函数 +* @param cb_func：回调函数地址 +* @param data：回调参数地址 +* @retval 无 +*/ +void hal_wdg_register_callback(fcb_type cb_func, void *data); + +/** +* @brief 喂狗 +* @param 无 +* @retval 无 +*/ +void hal_wdg_kick_dog(void); + +#endif /* __HAL_WDG_H__ */ diff --git a/src/sdk/sdk_version.h b/src/sdk/sdk_version.h new file mode 100644 index 0000000..e69de29