diff --git a/project/ISP_368/ISP_368.uvprojx b/project/ISP_368/ISP_368.uvprojx index a0edcbc..a3716f2 100644 --- a/project/ISP_368/ISP_368.uvprojx +++ b/project/ISP_368/ISP_368.uvprojx @@ -50,7 +50,7 @@ 1 .\Objects\ - ISP368_N10Lite_CSOT667_20230619 + ISP368_N10Lite_CSOT667 1 0 1 diff --git a/project/ISP_368/Listings/ISP368_N10Lite_CSOT667.map b/project/ISP_368/Listings/ISP368_N10Lite_CSOT667.map index 3c6fa7a..a9c66c0 100644 --- a/project/ISP_368/Listings/ISP368_N10Lite_CSOT667.map +++ b/project/ISP_368/Listings/ISP368_N10Lite_CSOT667.map @@ -3093,579 +3093,579 @@ Image Symbol Table i.ap_dcs_read 0x00011e10 Section 0 ap_demo.o(i.ap_dcs_read) ap_dcs_read 0x00011e11 Thumb Code 402 ap_demo.o(i.ap_dcs_read) i.ap_demo 0x00011fdc Section 0 ap_demo.o(i.ap_demo) - i.ap_get_reg_53 0x000122a4 Section 0 ap_demo.o(i.ap_get_reg_53) - ap_get_reg_53 0x000122a5 Thumb Code 34 ap_demo.o(i.ap_get_reg_53) - i.ap_get_reg_7A 0x000122d0 Section 0 ap_demo.o(i.ap_get_reg_7A) - ap_get_reg_7A 0x000122d1 Thumb Code 84 ap_demo.o(i.ap_get_reg_7A) - i.ap_get_reg_df 0x00012324 Section 0 ap_demo.o(i.ap_get_reg_df) - ap_get_reg_df 0x00012325 Thumb Code 146 ap_demo.o(i.ap_get_reg_df) - i.ap_get_tp_calibration_status_01 0x000123bc Section 0 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) - i.ap_reset_cb 0x000123dc Section 0 ap_demo.o(i.ap_reset_cb) - ap_reset_cb 0x000123dd Thumb Code 40 ap_demo.o(i.ap_reset_cb) - i.ap_set_backlight_51 0x00012420 Section 0 ap_demo.o(i.ap_set_backlight_51) - ap_set_backlight_51 0x00012421 Thumb Code 62 ap_demo.o(i.ap_set_backlight_51) - i.ap_set_display_off 0x00012464 Section 0 ap_demo.o(i.ap_set_display_off) - ap_set_display_off 0x00012465 Thumb Code 30 ap_demo.o(i.ap_set_display_off) - i.ap_set_display_on 0x000124ac Section 0 ap_demo.o(i.ap_set_display_on) - ap_set_display_on 0x000124ad Thumb Code 18 ap_demo.o(i.ap_set_display_on) - i.ap_set_enter_sleep_mode 0x000124e4 Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) - ap_set_enter_sleep_mode 0x000124e5 Thumb Code 68 ap_demo.o(i.ap_set_enter_sleep_mode) - i.ap_set_exit_sleep_mode 0x0001255c Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) - ap_set_exit_sleep_mode 0x0001255d Thumb Code 22 ap_demo.o(i.ap_set_exit_sleep_mode) - i.ap_set_tp_calibration_04 0x000125a4 Section 0 app_tp_st_touch.o(i.ap_set_tp_calibration_04) - i.ap_tp_st_touch_calibration 0x0001263c Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) - i.ap_tp_st_touch_get_calibration_success_mark 0x000126ec Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) - i.ap_tp_st_touch_scan_point_init 0x00012794 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) - i.ap_tp_st_touch_scan_point_record_event_exec 0x000127b0 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) - i.ap_tp_st_touch_simulate_finger_release_event 0x00012800 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) - i.ap_tp_st_touch_software_reset 0x00012834 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) - i.app_ADC_IRQn_Handler 0x000128e0 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) - i.app_AP_NRESET_IRQn_Handler 0x000128fc Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) - i.app_EXTI_INT0_IRQn_Handler 0x00012920 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) - i.app_EXTI_INT1_IRQn_Handler 0x0001293c Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) - i.app_EXTI_INT2_IRQn_Handler 0x00012958 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) - i.app_EXTI_INT3_IRQn_Handler 0x00012974 Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) - i.app_EXTI_INT4_IRQn_Handler 0x00012990 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) - i.app_EXTI_INT5_IRQn_Handler 0x000129ac Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) - i.app_EXTI_INT6_IRQn_Handler 0x000129c8 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) - i.app_EXTI_INT7_IRQn_Handler 0x000129e4 Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) - i.app_HardFault_Handler 0x00012a00 Section 0 drv_common.o(i.app_HardFault_Handler) - i.app_I2C0_IRQn_Handler 0x00012a48 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) - i.app_I2C1_IRQn_Handler 0x00012a60 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) - i.app_LCDC_IRQn_Handler 0x00012a70 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) - i.app_MEMC_IRQn_Handler 0x00012c14 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) - i.app_MIPI_RX_IRQn_Handler 0x00012c9c Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) - i.app_MIPI_TX_IRQn_Handler 0x00012f34 Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) - i.app_PWMDET_IRQn_Handler 0x00012fd4 Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) - i.app_SPIM_IRQn_Handler 0x0001301c Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) - i.app_SPIS_IRQn_Handler 0x0001304c Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) - i.app_SWIRE_IRQn_Handler 0x0001324c Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) - i.app_SysTick_Handler 0x0001326c Section 0 drv_common.o(i.app_SysTick_Handler) - i.app_TIMER0_IRQn_Handler 0x00013284 Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) - i.app_TIMER1_IRQn_Handler 0x0001328e Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) - i.app_TIMER2_IRQn_Handler 0x00013298 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) - i.app_TIMER3_IRQn_Handler 0x000132a2 Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) - i.app_UART_IRQn_Handler 0x000132ac Section 0 drv_uart.o(i.app_UART_IRQn_Handler) - i.app_VIDC_IRQn_Handler 0x000132b4 Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) - i.app_VPRE_IRQn_Handler 0x000132d0 Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) - i.app_WDG_IRQn_Handler 0x000132ec Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) - i.app_dma_irq_handler 0x00013324 Section 0 drv_dma.o(i.app_dma_irq_handler) - i.app_fls_ctrl_Handler 0x00013334 Section 0 norflash.o(i.app_fls_ctrl_Handler) - i.app_tp_I2C_init 0x00013364 Section 0 app_tp_transfer.o(i.app_tp_I2C_init) - i.app_tp_calibration_exec 0x00013388 Section 0 app_tp_st_touch.o(i.app_tp_calibration_exec) - i.app_tp_i2cs_callback 0x00013430 Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) - app_tp_i2cs_callback 0x00013431 Thumb Code 136 app_tp_transfer.o(i.app_tp_i2cs_callback) - i.app_tp_init 0x000134cc Section 0 app_tp_transfer.o(i.app_tp_init) - i.app_tp_m_read 0x00013510 Section 0 app_tp_transfer.o(i.app_tp_m_read) - i.app_tp_m_write 0x00013530 Section 0 app_tp_transfer.o(i.app_tp_m_write) - i.app_tp_phone_analysis_data 0x00013538 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) - i.app_tp_s_read 0x000139f8 Section 0 app_tp_transfer.o(i.app_tp_s_read) - i.app_tp_s_write 0x00013a00 Section 0 app_tp_transfer.o(i.app_tp_s_write) - i.app_tp_screen_analysis_int 0x00013a08 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) - i.app_tp_screen_init 0x00013e8c Section 0 app_tp_transfer.o(i.app_tp_screen_init) - i.app_tp_screen_int_callback 0x00013ebc Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) - app_tp_screen_int_callback 0x00013ebd Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) - i.app_tp_transfer_screen_const 0x00013ec8 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) - app_tp_transfer_screen_const 0x00013ec9 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) - i.app_tp_transfer_screen_int 0x00013f08 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) - i.app_tp_transfer_screen_start 0x00014014 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) - i.board_Init 0x00014028 Section 0 board.o(i.board_Init) - i.calc_framebuffer_setting 0x0001404c Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) - i.ceil 0x0001453c Section 0 ceil.o(i.ceil) - i.check_mipi_rx_tx_video_info 0x00014604 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) - check_mipi_rx_tx_video_info 0x00014605 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) - i.check_pkt_buf_rev 0x00014630 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) - check_pkt_buf_rev 0x00014631 Thumb Code 90 hal_internal_vsync.o(i.check_pkt_buf_rev) - i.dcs_packet_fifo_alloc 0x000146c4 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) - i.dcs_packet_fifo_init 0x0001471c Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) - i.dcs_packet_free_fifo_header 0x00014734 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) - i.dcs_packet_get_fifo_header 0x00014778 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) - i.dcs_sw_filter 0x0001479c Section 0 hal_internal_vsync.o(i.dcs_sw_filter) - dcs_sw_filter 0x0001479d Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) - i.delayMs 0x000147b8 Section 0 tau_delay.o(i.delayMs) - i.delayUs 0x000147d0 Section 0 tau_delay.o(i.delayUs) - i.drv_ap_rst_trig_edge_detect 0x000147f4 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) - i.drv_chip_info_get_info 0x0001482c Section 0 drv_chip_info.o(i.drv_chip_info_get_info) - i.drv_chip_info_init 0x00014838 Section 0 drv_chip_info.o(i.drv_chip_info_init) - i.drv_chip_rx_info_check 0x00014878 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) - i.drv_chip_rx_init_done 0x00014928 Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) - i.drv_common_enable_systick 0x0001493c Section 0 drv_common.o(i.drv_common_enable_systick) - i.drv_common_system_init 0x00014994 Section 0 drv_common.o(i.drv_common_system_init) - i.drv_crgu_config_reset_modules 0x0001499c Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) - i.drv_crgu_set_ahb_pre_div 0x000149ac Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) - i.drv_crgu_set_ahb_src 0x000149c0 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) - i.drv_crgu_set_clock 0x000149d4 Section 0 drv_crgu.o(i.drv_crgu_set_clock) - i.drv_crgu_set_dpi_mux_src 0x000149f4 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) - i.drv_crgu_set_dpi_pre_div 0x00014a08 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) - i.drv_crgu_set_dpi_pre_src 0x00014a20 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) - i.drv_crgu_set_dsc_core_div 0x00014a34 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) - i.drv_crgu_set_dsco_src 0x00014a48 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) - i.drv_crgu_set_dsco_src_div 0x00014a5c Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) - i.drv_crgu_set_fb_div 0x00014a70 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) - i.drv_crgu_set_fb_src 0x00014a84 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) - i.drv_crgu_set_lcdc_div 0x00014a98 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) - i.drv_crgu_set_lcdc_src 0x00014aac Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) - i.drv_crgu_set_mipi_cfg_src 0x00014ac0 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) - i.drv_crgu_set_mipi_ref_src 0x00014ad4 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) - i.drv_crgu_set_reset 0x00014aec Section 0 drv_crgu.o(i.drv_crgu_set_reset) - i.drv_crgu_set_rxbr_div 0x00014b04 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) - i.drv_crgu_set_rxbr_src 0x00014b18 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) - i.drv_crgu_set_vidc_src 0x00014b2c Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) - i.drv_dma_clear_flag 0x00014b40 Section 0 drv_dma.o(i.drv_dma_clear_flag) - i.drv_dma_create_handle 0x00014b58 Section 0 drv_dma.o(i.drv_dma_create_handle) - i.drv_dma_disenable_channel 0x00014b74 Section 0 drv_dma.o(i.drv_dma_disenable_channel) - i.drv_dma_enable_channel 0x00014b84 Section 0 drv_dma.o(i.drv_dma_enable_channel) - i.drv_dma_enable_channel_interrupts 0x00014b94 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) - i.drv_dma_get_channel_flag 0x00014bb8 Section 0 drv_dma.o(i.drv_dma_get_channel_flag) - i.drv_dma_irq_handler 0x00014bc4 Section 0 drv_dma.o(i.drv_dma_irq_handler) - i.drv_dma_prepar_transfer 0x00014c54 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) - i.drv_dma_set_burst 0x00014c66 Section 0 drv_dma.o(i.drv_dma_set_burst) - i.drv_dma_set_callback 0x00014c80 Section 0 drv_dma.o(i.drv_dma_set_callback) - i.drv_dma_set_transfer 0x00014c88 Section 0 drv_dma.o(i.drv_dma_set_transfer) - i.drv_dsc_dec_convert_pps_rc_parameter 0x00014ccc Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) - i.drv_dsc_dec_disable 0x00014d02 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) - i.drv_dsc_dec_enable 0x00014d10 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) - i.drv_dsc_dec_get_nslc 0x00014d84 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) - i.drv_dsc_dec_set_u8_pps 0x00014d8e Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) - i.drv_dsi_rx_calc_ipi_tx_delay 0x00014db8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) - i.drv_dsi_rx_enable_irq 0x00014ebc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) - i.drv_dsi_rx_get_color_bpp 0x00014efc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) - drv_dsi_rx_get_color_bpp 0x00014efd Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) - i.drv_dsi_rx_get_color_pcc 0x00014f4c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) - drv_dsi_rx_get_color_pcc 0x00014f4d Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) - i.drv_dsi_rx_get_compression_en 0x00014f68 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) - i.drv_dsi_rx_get_max_ret_size 0x00014f70 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) - i.drv_dsi_rx_power_up 0x00014f76 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) - i.drv_dsi_rx_set_ctrl_cfg 0x00014f84 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) - i.drv_dsi_rx_set_ddi_cfg 0x00014fa4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) - i.drv_dsi_rx_set_inten 0x00014fb4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) - i.drv_dsi_rx_set_ipi_cfg 0x00014fb8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) - i.drv_dsi_rx_set_lane_swap 0x00014fc8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) - i.drv_dsi_rx_set_resp_cnt 0x0001500e Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) - i.drv_dsi_rx_set_up_phy 0x00015034 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) - i.drv_dsi_rx_shut_down 0x00015138 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) - i.drv_dsi_tx_command_header 0x00015146 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) - i.drv_dsi_tx_command_mode_cfg 0x0001515a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) - i.drv_dsi_tx_command_put_payload 0x000151c6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) - i.drv_dsi_tx_config_eotp 0x000151ca Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) - i.drv_dsi_tx_config_int 0x000151e2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) - i.drv_dsi_tx_dpi_lpcmd_time 0x000151ea Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) - i.drv_dsi_tx_dpi_mode 0x000151f2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) - i.drv_dsi_tx_dpi_polarity 0x000151fc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) - i.drv_dsi_tx_edpi_cmd_size 0x00015220 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) - i.drv_dsi_tx_get_cmd_status 0x00015224 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) - i.drv_dsi_tx_mode 0x00015228 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) - i.drv_dsi_tx_phy_clock_lane_auto_lp 0x0001522c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) - i.drv_dsi_tx_phy_clock_lane_req_hs 0x00015244 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) - i.drv_dsi_tx_phy_lane_mode 0x0001525e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) - i.drv_dsi_tx_phy_status_ready 0x0001526a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) - i.drv_dsi_tx_phy_status_stopstate 0x000152ce Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) - i.drv_dsi_tx_phy_test_setup 0x0001530c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) - i.drv_dsi_tx_phy_time_cfg 0x00015440 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) - i.drv_dsi_tx_powerup 0x0001545e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) - i.drv_dsi_tx_response_mode 0x00015466 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) - i.drv_dsi_tx_set_bta_ack 0x00015482 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) - i.drv_dsi_tx_set_esc_div 0x0001549a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) - i.drv_dsi_tx_set_int 0x000154a8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) - i.drv_dsi_tx_set_time_out_div 0x000154e8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) - i.drv_dsi_tx_set_video_chunk 0x000154f8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) - i.drv_dsi_tx_set_video_timing 0x00015500 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) - i.drv_dsi_tx_shutdown 0x00015522 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) - i.drv_dsi_tx_timeout_cfg 0x0001552a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) - i.drv_dsi_tx_video_mode_cfg 0x00015550 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) - i.drv_dsi_tx_video_mode_disable_hact_cmd 0x000155fa Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) - i.drv_dsi_tx_video_mode_set_lp_cmd 0x00015610 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) - i.drv_efuse_enter_inactive 0x00015628 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) - i.drv_efuse_int_enable 0x00015656 Section 0 drv_efuse.o(i.drv_efuse_int_enable) - i.drv_efuse_read 0x00015662 Section 0 drv_efuse.o(i.drv_efuse_read) - i.drv_efuse_read_req 0x00015694 Section 0 drv_efuse.o(i.drv_efuse_read_req) - i.drv_gpio_get_input_data 0x000156ac Section 0 drv_gpio.o(i.drv_gpio_get_input_data) - i.drv_gpio_register_ap_reset_callback 0x000156c4 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) - i.drv_gpio_register_callback 0x000156d0 Section 0 drv_gpio.o(i.drv_gpio_register_callback) - i.drv_gpio_set_int 0x000156e4 Section 0 drv_gpio.o(i.drv_gpio_set_int) - i.drv_gpio_set_ioe 0x00015734 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) - i.drv_gpio_set_mode0 0x00015754 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) - i.drv_gpio_set_mode1 0x00015764 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) - i.drv_gpio_set_mode2 0x00015774 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) - i.drv_gpio_set_mode3 0x00015784 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) - i.drv_gpio_set_output_data 0x00015794 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) - drv_gpio_set_output_data 0x00015795 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) - i.drv_gpio_set_pull_state 0x000157b4 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) - i.drv_i2c0_set_callback 0x000158e4 Section 0 drv_i2c_slave.o(i.drv_i2c0_set_callback) - i.drv_i2c1_set_callback 0x000158f0 Section 0 drv_i2c_master.o(i.drv_i2c1_set_callback) - i.drv_i2c_dma_callback 0x000158fc Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) - drv_i2c_dma_callback 0x000158fd Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) - i.drv_i2c_dma_init 0x00015930 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) - i.drv_i2c_enable_rx_dma 0x000159dc Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) - i.drv_i2c_enable_tx_dma 0x000159f6 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) - i.drv_i2c_m_clear_it_pending_bit 0x00015a10 Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) - i.drv_i2c_m_enable 0x00015a70 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) - i.drv_i2c_m_enable_intr 0x00015a80 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) - i.drv_i2c_master_init 0x00015ab8 Section 0 drv_i2c_master.o(i.drv_i2c_master_init) - i.drv_i2c_master_read_dma 0x00015b44 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) - i.drv_i2c_master_write_dma 0x00015ba0 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) - i.drv_i2c_master_write_read_cmd 0x00015bdc Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) - drv_i2c_master_write_read_cmd 0x00015bdd Thumb Code 62 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) - i.drv_i2c_s_clear_it_pending_bit 0x00015c1a Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) - i.drv_i2c_s_config_intr 0x00015c5c Section 0 drv_i2c_slave.o(i.drv_i2c_s_config_intr) - i.drv_i2c_s_enable 0x00015c60 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable) - i.drv_i2c_s_get_fifo_status 0x00015c68 Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) - i.drv_i2c_s_set_intr 0x00015c7c Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_intr) - i.drv_i2c_s_write_data 0x00015ccc Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) - i.drv_i2c_set_dma_irq_callback 0x00015ce8 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) - i.drv_i2c_slave_init 0x00015d40 Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) - i.drv_i2c_slave_write_dma 0x00015d74 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) - i.drv_lcdc_config_bypass 0x00015d8c Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) - i.drv_lcdc_config_ccm 0x00015da4 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) - i.drv_lcdc_config_disp_mode 0x00015dd4 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) - i.drv_lcdc_config_dpi_polarity 0x00015dea Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) - i.drv_lcdc_config_dpi_timing 0x00015e0e Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) - i.drv_lcdc_config_edpi_mode 0x00015e34 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) - i.drv_lcdc_config_endianness 0x00015e4a Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) - i.drv_lcdc_config_input_size 0x00015e60 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) - i.drv_lcdc_config_int 0x00015e6c Section 0 drv_lcdc.o(i.drv_lcdc_config_int) - i.drv_lcdc_config_int_single 0x00015e8a Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) - i.drv_lcdc_config_overwrite 0x00015eac Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) - i.drv_lcdc_config_overwrite_rgb 0x00015ece Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) - i.drv_lcdc_config_partial_display_area 0x00015eda Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) - i.drv_lcdc_config_partial_display_enable 0x00015ef4 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) - i.drv_lcdc_config_scale_up_coef 0x00015f16 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) - i.drv_lcdc_config_scale_up_step 0x00015f30 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) - i.drv_lcdc_config_src_parameter 0x00015f3c Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) - i.drv_lcdc_config_thresh 0x00015f88 Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) - i.drv_lcdc_ctrl_flow 0x00015f8e Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) - i.drv_lcdc_enable_shadow_reg 0x00015fa0 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) - i.drv_lcdc_set_int 0x00015fc0 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) - i.drv_lcdc_set_video_hw_mode 0x00016000 Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) - i.drv_lcdc_start 0x00016014 Section 0 drv_lcdc.o(i.drv_lcdc_start) - i.drv_memc_clear_status 0x00016034 Section 0 drv_memc.o(i.drv_memc_clear_status) - i.drv_memc_enable_irq 0x00016040 Section 0 drv_memc.o(i.drv_memc_enable_irq) - i.drv_memc_gen_a_tear_signal 0x00016080 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) - i.drv_memc_get_status 0x0001608c Section 0 drv_memc.o(i.drv_memc_get_status) - i.drv_memc_rate_transfer_sel 0x0001609e Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) - i.drv_memc_sel_vsync 0x000160ae Section 0 drv_memc.o(i.drv_memc_sel_vsync) - i.drv_memc_set_active_height 0x000160bc Section 0 drv_memc.o(i.drv_memc_set_active_height) - i.drv_memc_set_data_mode 0x000160d0 Section 0 drv_memc.o(i.drv_memc_set_data_mode) - i.drv_memc_set_double_buffer 0x000160dc Section 0 drv_memc.o(i.drv_memc_set_double_buffer) - i.drv_memc_set_double_buffer_reverse 0x000160ec Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) - i.drv_memc_set_fs_en_conditions 0x000160fe Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) - i.drv_memc_set_inten 0x0001610e Section 0 drv_memc.o(i.drv_memc_set_inten) - i.drv_memc_set_lcdc_st_conditions 0x00016124 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) - i.drv_memc_set_ltpo_mode 0x0001613c Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) - i.drv_memc_set_tear_mode 0x00016156 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) - i.drv_memc_set_tear_waveform 0x00016164 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) - i.drv_memc_set_vidc_sync_cnt 0x0001618c Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) - i.drv_param_init_get_ccm 0x0001619c Section 0 drv_param_init.o(i.drv_param_init_get_ccm) - i.drv_param_init_get_scld_filter_h 0x000161a4 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) - i.drv_param_init_get_scld_filter_v 0x000161b8 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) - i.drv_param_init_get_sclu_filter 0x000161cc Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) - i.drv_param_init_set_ccm 0x000161d4 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) - i.drv_param_p2r_filter_init 0x000161e8 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) - i.drv_phy_enable_calibration 0x0001620c Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) - i.drv_phy_get_calibration 0x0001621c Section 0 drv_phy_common.o(i.drv_phy_get_calibration) - i.drv_phy_get_pll_para 0x00016258 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) - i.drv_phy_get_rate_para 0x000162b8 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) - i.drv_phy_test_clear 0x0001630c Section 0 drv_phy_common.o(i.drv_phy_test_clear) - i.drv_phy_test_lock 0x0001631c Section 0 drv_phy_common.o(i.drv_phy_test_lock) - i.drv_phy_test_write_1_byte 0x00016334 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) - i.drv_phy_test_write_2_byte 0x00016354 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) - i.drv_phy_test_write_code 0x0001637a Section 0 drv_phy_common.o(i.drv_phy_test_write_code) - i.drv_phy_test_write_data 0x00016398 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) - drv_phy_test_write_data 0x00016399 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) - i.drv_pwr_set_cp_mode 0x000163b8 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) - i.drv_pwr_set_pvd_mode 0x000163d8 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) - i.drv_pwr_set_system_clk_src 0x000163f0 Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) - i.drv_rx_phy_test_clear 0x00016428 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) - drv_rx_phy_test_clear 0x00016429 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) - i.drv_rx_phy_test_lock 0x00016434 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) - drv_rx_phy_test_lock 0x00016435 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) - i.drv_rx_phy_test_write_1_byte 0x00016444 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) - drv_rx_phy_test_write_1_byte 0x00016445 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) - i.drv_rx_phy_test_write_2_byte 0x00016458 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) - drv_rx_phy_test_write_2_byte 0x00016459 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) - i.drv_rxbr_clear_pkt_buffer 0x0001646e Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) - i.drv_rxbr_clear_status0 0x00016478 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) - i.drv_rxbr_enable_irq 0x0001647c Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) - i.drv_rxbr_frame_drop_cfg 0x000164d8 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) - i.drv_rxbr_get_clk 0x000164ec Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) - i.drv_rxbr_get_col_addr 0x00016550 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) - i.drv_rxbr_get_int_source 0x00016554 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) - drv_rxbr_get_int_source 0x00016555 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) - i.drv_rxbr_get_page_addr 0x00016566 Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) - i.drv_rxbr_get_status0 0x0001656a Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) - drv_rxbr_get_status0 0x0001656b Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) - i.drv_rxbr_hline_rcv0_cfg 0x0001657c Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) - i.drv_rxbr_hline_rcv_cfg 0x00016588 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) - i.drv_rxbr_register_irq0_callback 0x00016590 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) - i.drv_rxbr_register_irq1_callback 0x0001659c Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) - i.drv_rxbr_set_ack_pkt_header 0x000165a8 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) - i.drv_rxbr_set_cmd_filter 0x000165bc Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) - i.drv_rxbr_set_color_format 0x00016688 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) - i.drv_rxbr_set_inten 0x0001669c Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) - i.drv_rxbr_set_ltpo_drop_th 0x000166b0 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) - i.drv_rxbr_set_usr_cfg 0x000166c0 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) - i.drv_rxbr_set_usr_col 0x000166e6 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) - i.drv_rxbr_set_usr_row 0x000166ee Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) - i.drv_spi_m_read_data 0x000166f8 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) - i.drv_swire_enable 0x00016718 Section 0 drv_swire.o(i.drv_swire_enable) - i.drv_swire_set_int 0x00016734 Section 0 drv_swire.o(i.drv_swire_set_int) - i.drv_swire_set_power_down 0x00016788 Section 0 drv_swire.o(i.drv_swire_set_power_down) - i.drv_sys_cfg_clear_all_int 0x000167a4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) - i.drv_sys_cfg_clear_pending 0x000167b0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) - i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x000167d8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) - i.drv_sys_cfg_sel_ap_rst_trig 0x000167f0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) - i.drv_sys_cfg_sel_gpio_group 0x0001680c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) - i.drv_sys_cfg_sel_int_trig 0x00016830 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) - i.drv_sys_cfg_set_dma_rx_req 0x00016854 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) - i.drv_sys_cfg_set_dma_tx_req 0x00016864 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) - i.drv_sys_cfg_set_int 0x00016874 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) - i.drv_timer_clear_status_flags 0x00016898 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) - drv_timer_clear_status_flags 0x00016899 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) - i.drv_timer_enable 0x000168b2 Section 0 drv_timer.o(i.drv_timer_enable) - i.drv_timer_get_instance 0x000168d4 Section 0 drv_timer.o(i.drv_timer_get_instance) - i.drv_timer_get_prescaler 0x000168e4 Section 0 drv_timer.o(i.drv_timer_get_prescaler) - i.drv_timer_handle_interrupt 0x000168f4 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) - drv_timer_handle_interrupt 0x000168f5 Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) - i.drv_timer_register_callback 0x00016938 Section 0 drv_timer.o(i.drv_timer_register_callback) - i.drv_timer_set_compare_val 0x0001694c Section 0 drv_timer.o(i.drv_timer_set_compare_val) - i.drv_timer_set_int 0x0001695c Section 0 drv_timer.o(i.drv_timer_set_int) - i.drv_timer_set_prescaler 0x000169b0 Section 0 drv_timer.o(i.drv_timer_set_prescaler) - i.drv_timer_set_repeat 0x000169d8 Section 0 drv_timer.o(i.drv_timer_set_repeat) - i.drv_tx_phy_test_clear 0x000169e8 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) - drv_tx_phy_test_clear 0x000169e9 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) - i.drv_tx_phy_test_enter 0x000169f2 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) - i.drv_tx_phy_test_exit 0x00016a0e Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) - i.drv_tx_phy_test_write_1_byte 0x00016a2a Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) - drv_tx_phy_test_write_1_byte 0x00016a2b Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) - i.drv_tx_phy_test_write_2_byte 0x00016a3c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) - drv_tx_phy_test_write_2_byte 0x00016a3d Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) - i.drv_tx_phy_test_write_code 0x00016a50 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) - drv_tx_phy_test_write_code 0x00016a51 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) - i.drv_vidc_clear_irq 0x00016a60 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) - i.drv_vidc_enable 0x00016a68 Section 0 drv_vidc.o(i.drv_vidc_enable) - i.drv_vidc_enable_irq 0x00016a80 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) - i.drv_vidc_get_irq_status 0x00016ac0 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) - i.drv_vidc_init_module_enable 0x00016ad4 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) - i.drv_vidc_register_callback 0x00016afc Section 0 drv_vidc.o(i.drv_vidc_register_callback) - i.drv_vidc_reset 0x00016b08 Section 0 drv_vidc.o(i.drv_vidc_reset) - i.drv_vidc_set_dst_parameter 0x00016b0e Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) - i.drv_vidc_set_irqen 0x00016b4a Section 0 drv_vidc.o(i.drv_vidc_set_irqen) - i.drv_vidc_set_mirror 0x00016b5e Section 0 drv_vidc.o(i.drv_vidc_set_mirror) - i.drv_vidc_set_p2r_hcoef0 0x00016b6e Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) - i.drv_vidc_set_p2r_hinitb 0x00016b76 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) - i.drv_vidc_set_p2r_hinitr 0x00016b9c Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) - i.drv_vidc_set_pentile_swap 0x00016bc4 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) - i.drv_vidc_set_pu_ctrl 0x00016bdc Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) - i.drv_vidc_set_rotation 0x00016be6 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) - i.drv_vidc_set_scld_hcoef0 0x00016bf6 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) - i.drv_vidc_set_scld_hcoef1 0x00016c00 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) - i.drv_vidc_set_scld_step 0x00016c0a Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) - i.drv_vidc_set_scld_vcoef0 0x00016c1c Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) - i.drv_vidc_set_scld_vcoef1 0x00016c26 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) - i.drv_vidc_set_src_parameter 0x00016c30 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) - i.drv_wdg_clear_counter 0x00016c48 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) - i.drv_wdg_clear_edge_flag 0x00016c58 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) - drv_wdg_clear_edge_flag 0x00016c59 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) - i.drv_wdg_read_edge_flag 0x00016c68 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) - drv_wdg_read_edge_flag 0x00016c69 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) - i.drv_wdg_set_int 0x00016c78 Section 0 drv_wdg.o(i.drv_wdg_set_int) - i.fls_clr_interrupt_flag 0x00016cb8 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) - i.fputc 0x00016cc2 Section 0 tau_log.o(i.fputc) - i.hal_dsi_rx_ctrl_create_handle 0x00016cd8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) - i.hal_dsi_rx_ctrl_deinit 0x00016d0c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) - i.hal_dsi_rx_ctrl_dsc_async_handler 0x00016da8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) - i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016e2c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) - i.hal_dsi_rx_ctrl_get_max_ret_size 0x00016e54 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) - i.hal_dsi_rx_ctrl_init 0x00016e7c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) - i.hal_dsi_rx_ctrl_init_clk 0x00016edc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) - hal_dsi_rx_ctrl_init_clk 0x00016edd Thumb Code 332 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) - i.hal_dsi_rx_ctrl_init_dsi_rx 0x00017080 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) - hal_dsi_rx_ctrl_init_dsi_rx 0x00017081 Thumb Code 184 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) - i.hal_dsi_rx_ctrl_init_memc 0x00017158 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) - hal_dsi_rx_ctrl_init_memc 0x00017159 Thumb Code 334 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) - i.hal_dsi_rx_ctrl_init_rxbr 0x000172b0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) - hal_dsi_rx_ctrl_init_rxbr 0x000172b1 Thumb Code 312 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) - i.hal_dsi_rx_ctrl_init_vidc 0x000173f8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) - hal_dsi_rx_ctrl_init_vidc 0x000173f9 Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) - i.hal_dsi_rx_ctrl_send_ack_cmd 0x00017624 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) - i.hal_dsi_rx_ctrl_set_cus_sync_line 0x00017714 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) - i.hal_dsi_rx_ctrl_set_hw_tear_mode 0x00017748 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) - i.hal_dsi_rx_ctrl_set_ipi_cfg 0x0001777c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) - hal_dsi_rx_ctrl_set_ipi_cfg 0x0001777d Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) - i.hal_dsi_rx_ctrl_set_rxbr_clk 0x000177b4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) - hal_dsi_rx_ctrl_set_rxbr_clk 0x000177b5 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) - i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017828 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) - i.hal_dsi_rx_ctrl_start 0x0001785c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) - i.hal_dsi_rx_ctrl_stop 0x00017898 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) - i.hal_dsi_rx_ctrl_toggle_resolution 0x000178d4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) - i.hal_dsi_tx_calc_video_chunks 0x000178f4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) - hal_dsi_tx_calc_video_chunks 0x000178f5 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) - i.hal_dsi_tx_config_params_for_lane_rate 0x00017a84 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) - hal_dsi_tx_config_params_for_lane_rate 0x00017a85 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) - i.hal_dsi_tx_count_lane_rate 0x00017ab8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) - hal_dsi_tx_count_lane_rate 0x00017ab9 Thumb Code 1022 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) - i.hal_dsi_tx_crop_pic 0x00017f08 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) - i.hal_dsi_tx_ctrl_create_handle 0x00017f9c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) - i.hal_dsi_tx_ctrl_deinit 0x00017fc8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) - i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x0001804c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) - i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018098 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) - i.hal_dsi_tx_ctrl_init 0x000180c0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) - i.hal_dsi_tx_ctrl_init_clk 0x00018164 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) - hal_dsi_tx_ctrl_init_clk 0x00018165 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) - i.hal_dsi_tx_ctrl_panel_reset_pin 0x00018188 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) - i.hal_dsi_tx_ctrl_set_ccm 0x00018194 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) - i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x000181b4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) - i.hal_dsi_tx_ctrl_set_partial_disp 0x000181c8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) - i.hal_dsi_tx_ctrl_set_partial_disp_area 0x000181d8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) - i.hal_dsi_tx_ctrl_start 0x000181fc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) - i.hal_dsi_tx_ctrl_stop 0x00018298 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) - i.hal_dsi_tx_ctrl_write_array_cmd 0x000182dc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) - i.hal_dsi_tx_ctrl_write_cmd 0x000183b4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) - i.hal_dsi_tx_init_data_mode 0x00018464 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) - hal_dsi_tx_init_data_mode 0x00018465 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) - i.hal_dsi_tx_init_dpi_cfg 0x000184a8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) - hal_dsi_tx_init_dpi_cfg 0x000184a9 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) - i.hal_dsi_tx_init_interrupt 0x000184d8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) - hal_dsi_tx_init_interrupt 0x000184d9 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) - i.hal_dsi_tx_init_phy_cfg 0x000184f8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) - hal_dsi_tx_init_phy_cfg 0x000184f9 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) - i.hal_dsi_tx_init_remains 0x00018518 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) - hal_dsi_tx_init_remains 0x00018519 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) - i.hal_dsi_tx_init_video_mode 0x000185ac Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) - hal_dsi_tx_init_video_mode 0x000185ad Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) - i.hal_dsi_tx_send_cmd 0x00018604 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) - hal_dsi_tx_send_cmd 0x00018605 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) - i.hal_gpio_ctrl_eint 0x00018648 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) - i.hal_gpio_get_input_data 0x00018660 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) - i.hal_gpio_init_eint 0x00018674 Section 0 hal_gpio.o(i.hal_gpio_init_eint) - i.hal_gpio_init_input 0x000186b4 Section 0 hal_gpio.o(i.hal_gpio_init_input) - i.hal_gpio_init_output 0x000186d4 Section 0 hal_gpio.o(i.hal_gpio_init_output) - i.hal_gpio_reg_eint_cb 0x000186fc Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) - i.hal_gpio_set_ap_reset_int 0x00018714 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) - i.hal_gpio_set_mode 0x00018764 Section 0 hal_gpio.o(i.hal_gpio_set_mode) - i.hal_gpio_set_output_data 0x000187c4 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) - i.hal_gpio_set_pull_state 0x000187cc Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) - i.hal_i2c_m_dma_init 0x000187ec Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) - i.hal_i2c_m_dma_read 0x00018858 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) - i.hal_i2c_m_dma_write 0x00018878 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) - i.hal_i2c_m_transfer_complate 0x00018894 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) - i.hal_i2c_master_irq_callback 0x000188a0 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) - hal_i2c_master_irq_callback 0x000188a1 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) - i.hal_i2c_s_dma_user_callback 0x000188c0 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) - hal_i2c_s_dma_user_callback 0x000188c1 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) - i.hal_i2c_s_dma_write 0x000188d0 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) - i.hal_i2c_s_init 0x0001891c Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) - i.hal_i2c_s_nonblocking_read 0x000189e4 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) - i.hal_i2c_s_set_transfer 0x000189f8 Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) - i.hal_i2c_slave_irq_callback 0x00018a04 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) - hal_i2c_slave_irq_callback 0x00018a05 Thumb Code 354 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) - i.hal_internal_init_memc 0x00018b78 Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) - i.hal_internal_sync_get_fb_setting 0x00018c74 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) - i.hal_internal_sync_get_hight_performan_mode 0x00018c84 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) - i.hal_internal_sync_input_resolution_change 0x00018c94 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) - i.hal_internal_update_dpi_param 0x00018ec0 Section 0 hal_internal_vsync.o(i.hal_internal_update_dpi_param) - i.hal_internal_video_mode_auto_sync 0x00018ed0 Section 0 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) - i.hal_internal_vsync_deinit 0x00018fdc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) - i.hal_internal_vsync_get_rx_state 0x00019004 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) - i.hal_internal_vsync_get_sync_line 0x00019010 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) - i.hal_internal_vsync_get_tear_mode 0x00019028 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) - i.hal_internal_vsync_get_tx_state 0x00019034 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) - i.hal_internal_vsync_init_rx 0x00019040 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) - i.hal_internal_vsync_init_tx 0x00019158 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) - i.hal_internal_vsync_set_auto_hw_filter 0x00019208 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) - i.hal_internal_vsync_set_rx_state 0x00019324 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) - i.hal_internal_vsync_set_sync_line 0x00019338 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) - i.hal_internal_vsync_set_tear_mode 0x0001935c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) - i.hal_internal_vsync_set_tx_state 0x000193ac Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) - i.hal_internal_vsync_update_lcdc_addr 0x0001942c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) - i.hal_lcdc_config_ccm 0x0001945c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) - hal_lcdc_config_ccm 0x0001945d Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) - i.hal_lcdc_config_remains 0x00019480 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) - hal_lcdc_config_remains 0x00019481 Thumb Code 84 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) - i.hal_lcdc_config_rgb_to_pentile 0x000194d8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) - hal_lcdc_config_rgb_to_pentile 0x000194d9 Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) - i.hal_lcdc_config_upscaler 0x000194ec Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) - hal_lcdc_config_upscaler 0x000194ed Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) - i.hal_lcdc_init_cfg 0x00019650 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) - hal_lcdc_init_cfg 0x00019651 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) - i.hal_lcdc_init_clk 0x00019690 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) - hal_lcdc_init_clk 0x00019691 Thumb Code 422 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) - i.hal_lcdc_init_interrupt 0x00019840 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) - hal_lcdc_init_interrupt 0x00019841 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) - i.hal_spi_m_clear_rxfifo 0x00019880 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) - i.hal_swire_deinit 0x0001988e Section 0 hal_swire.o(i.hal_swire_deinit) - i.hal_swire_open 0x000198a0 Section 0 hal_swire.o(i.hal_swire_open) - i.hal_system_enable_systick 0x000198b6 Section 0 hal_system.o(i.hal_system_enable_systick) - i.hal_system_init 0x000198c0 Section 0 hal_system.o(i.hal_system_init) - i.hal_system_init_console 0x00019948 Section 0 hal_system.o(i.hal_system_init_console) - i.hal_system_set_phy_calibration 0x00019964 Section 0 hal_system.o(i.hal_system_set_phy_calibration) - i.hal_system_set_pvd 0x0001996c Section 0 hal_system.o(i.hal_system_set_pvd) - i.hal_system_set_vcc 0x00019974 Section 0 hal_system.o(i.hal_system_set_vcc) - i.hal_timer_deinit 0x0001997c Section 0 hal_timer.o(i.hal_timer_deinit) - i.hal_timer_init 0x000199aa Section 0 hal_timer.o(i.hal_timer_init) - i.hal_timer_start 0x000199c4 Section 0 hal_timer.o(i.hal_timer_start) - i.hal_timer_stop 0x00019a0c Section 0 hal_timer.o(i.hal_timer_stop) - i.hal_uart_init 0x00019a34 Section 0 hal_uart.o(i.hal_uart_init) - i.hal_uart_transmit_blocking 0x00019ac0 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) - i.handle_init 0x00019ad0 Section 0 irq_redirect .o(i.handle_init) - i.init_mipi_tx 0x00019be0 Section 0 ap_demo.o(i.init_mipi_tx) - init_mipi_tx 0x00019be1 Thumb Code 110 ap_demo.o(i.init_mipi_tx) - i.init_panel 0x00019c54 Section 0 ap_demo.o(i.init_panel) - init_panel 0x00019c55 Thumb Code 186 ap_demo.o(i.init_panel) - i.main 0x00019d54 Section 0 main.o(i.main) - i.open_mipi_rx 0x00019d60 Section 0 ap_demo.o(i.open_mipi_rx) - open_mipi_rx 0x00019d61 Thumb Code 112 ap_demo.o(i.open_mipi_rx) - i.pps_update_handle 0x00019de4 Section 0 ap_demo.o(i.pps_update_handle) - pps_update_handle 0x00019de5 Thumb Code 80 ap_demo.o(i.pps_update_handle) - i.rx_get_dcs_packet_data 0x00019e60 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) - rx_get_dcs_packet_data 0x00019e61 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) - i.rx_partial_update 0x0001a254 Section 0 hal_internal_vsync.o(i.rx_partial_update) - rx_partial_update 0x0001a255 Thumb Code 358 hal_internal_vsync.o(i.rx_partial_update) - i.rx_receive_packet 0x0001a3cc Section 0 hal_internal_vsync.o(i.rx_receive_packet) - rx_receive_packet 0x0001a3cd Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) - i.rx_receive_pps 0x0001a458 Section 0 hal_internal_vsync.o(i.rx_receive_pps) - rx_receive_pps 0x0001a459 Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) - i.rxbr_irq0_callback 0x0001a5d8 Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) - rxbr_irq0_callback 0x0001a5d9 Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) - i.rxbr_irq1_callback 0x0001a67c Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) - rxbr_irq1_callback 0x0001a67d Thumb Code 316 hal_internal_vsync.o(i.rxbr_irq1_callback) - i.soft_gen_te 0x0001a850 Section 0 hal_internal_vsync.o(i.soft_gen_te) - soft_gen_te 0x0001a851 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te) - i.soft_gen_te_double_buffer 0x0001a914 Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) - soft_gen_te_double_buffer 0x0001a915 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te_double_buffer) - i.soft_te_timer_cb 0x0001a9d4 Section 0 ap_demo.o(i.soft_te_timer_cb) - soft_te_timer_cb 0x0001a9d5 Thumb Code 36 ap_demo.o(i.soft_te_timer_cb) - i.soft_timer3_cb 0x0001aa00 Section 0 ap_demo.o(i.soft_timer3_cb) - soft_timer3_cb 0x0001aa01 Thumb Code 48 ap_demo.o(i.soft_timer3_cb) - i.sqrt 0x0001aa40 Section 0 sqrt.o(i.sqrt) - i.tp_heartbeat_exec 0x0001aa88 Section 0 ap_demo.o(i.tp_heartbeat_exec) - i.vidc_callback 0x0001aaf8 Section 0 hal_internal_vsync.o(i.vidc_callback) - vidc_callback 0x0001aaf9 Thumb Code 232 hal_internal_vsync.o(i.vidc_callback) - i.vpre_err_reset 0x0001ac00 Section 0 hal_internal_vsync.o(i.vpre_err_reset) - vpre_err_reset 0x0001ac01 Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) - i.vsync_set_te_mode 0x0001acd0 Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) - vsync_set_te_mode 0x0001acd1 Thumb Code 300 hal_internal_vsync.o(i.vsync_set_te_mode) - .constdata 0x0001ae9c Section 10564 ap_demo.o(.constdata) - g_cus_rx_dcs_execute_table 0x0001ae9c Data 120 ap_demo.o(.constdata) - .constdata 0x0001d7e0 Section 32 app_tp_st_touch.o(.constdata) - .constdata 0x0001d800 Section 36 hal_dsi_tx_ctrl.o(.constdata) - .constdata 0x0001d824 Section 210 hal_gpio.o(.constdata) - s_gpio_map 0x0001d824 Data 120 hal_gpio.o(.constdata) - s_gpio_perf 0x0001d89c Data 90 hal_gpio.o(.constdata) - .constdata 0x0001d8f8 Section 32 hal_i2c_slave.o(.constdata) - sg_i2c_s_config 0x0001d8f8 Data 32 hal_i2c_slave.o(.constdata) - .constdata 0x0001d918 Section 3417 app_tp_for_custom_s8.o(.constdata) - .constdata 0x0001e671 Section 1 app_tp_for_custom_s8.o(.constdata) - .constdata 0x0001e674 Section 8 drv_param_init.o(.constdata) - .constdata 0x0001e67c Section 390 drv_phy_common.o(.constdata) - phy_para_mapping_h 0x0001e67c Data 184 drv_phy_common.o(.constdata) - phy_para_mapping_l 0x0001e734 Data 128 drv_phy_common.o(.constdata) - phy_data_high_map 0x0001e7b4 Data 48 drv_phy_common.o(.constdata) - phy_data_lp_map 0x0001e7e4 Data 30 drv_phy_common.o(.constdata) - .conststring 0x0001e804 Section 76 ap_demo.o(.conststring) - .conststring 0x0001e850 Section 72 hal_dsi_rx_ctrl.o(.conststring) - .conststring 0x0001e898 Section 67 hal_dsi_tx_ctrl.o(.conststring) - .conststring 0x0001e8dc Section 308 hal_internal_vsync.o(.conststring) + i.ap_get_reg_53 0x000122a0 Section 0 ap_demo.o(i.ap_get_reg_53) + ap_get_reg_53 0x000122a1 Thumb Code 34 ap_demo.o(i.ap_get_reg_53) + i.ap_get_reg_7A 0x000122cc Section 0 ap_demo.o(i.ap_get_reg_7A) + ap_get_reg_7A 0x000122cd Thumb Code 84 ap_demo.o(i.ap_get_reg_7A) + i.ap_get_reg_df 0x00012320 Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x00012321 Thumb Code 190 ap_demo.o(i.ap_get_reg_df) + i.ap_get_tp_calibration_status_01 0x000123e4 Section 0 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + i.ap_reset_cb 0x00012404 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x00012405 Thumb Code 40 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight_51 0x00012448 Section 0 ap_demo.o(i.ap_set_backlight_51) + ap_set_backlight_51 0x00012449 Thumb Code 62 ap_demo.o(i.ap_set_backlight_51) + i.ap_set_display_off 0x0001248c Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x0001248d Thumb Code 30 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x000124d4 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x000124d5 Thumb Code 18 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x0001250c Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x0001250d Thumb Code 68 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x00012584 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x00012585 Thumb Code 22 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x000125cc Section 0 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + i.ap_tp_st_touch_calibration 0x00012664 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + i.ap_tp_st_touch_get_calibration_success_mark 0x00012714 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + i.ap_tp_st_touch_scan_point_init 0x000127bc Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + i.ap_tp_st_touch_scan_point_record_event_exec 0x000127d8 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + i.ap_tp_st_touch_simulate_finger_release_event 0x00012828 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + i.ap_tp_st_touch_software_reset 0x0001285c Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) + i.app_ADC_IRQn_Handler 0x00012908 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x00012924 Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x00012948 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x00012964 Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x00012980 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x0001299c Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x000129b8 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x000129d4 Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x000129f0 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x00012a0c Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x00012a28 Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x00012a70 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x00012a88 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00012a98 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00012c3c Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00012cc4 Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00012f5c Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00012ffc Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00013044 Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x00013074 Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x00013274 Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x00013294 Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x000132ac Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x000132b6 Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x000132c0 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x000132ca Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x000132d4 Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x000132dc Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x000132f8 Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x00013314 Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x0001334c Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x0001335c Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x0001338c Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x000133b0 Section 0 app_tp_st_touch.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x00013458 Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x00013459 Thumb Code 136 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x000134f4 Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x00013538 Section 0 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_write 0x00013558 Section 0 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x00013560 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_s_read 0x00013a20 Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x00013a28 Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x00013a30 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x00013ea4 Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x00013ed4 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00013ed5 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_transfer_screen_const 0x00013ee0 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00013ee1 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00013f20 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x0001402c Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.board_Init 0x00014040 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x00014064 Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x00014554 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x0001461c Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x0001461d Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x00014648 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x00014649 Thumb Code 90 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x000146dc Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x00014734 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x0001474c Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00014790 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x000147b4 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x000147b5 Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x000147d0 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x000147e8 Section 0 tau_delay.o(i.delayUs) + i.drv_ap_rst_trig_edge_detect 0x0001480c Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x00014844 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x00014850 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x00014890 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x00014940 Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x00014954 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x000149ac Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x000149b4 Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x000149c4 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x000149d8 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x000149ec Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x00014a0c Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x00014a20 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x00014a38 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x00014a4c Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x00014a60 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x00014a74 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x00014a88 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x00014a9c Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x00014ab0 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x00014ac4 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x00014ad8 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x00014aec Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x00014b04 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x00014b1c Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x00014b30 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x00014b44 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x00014b58 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x00014b70 Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x00014b8c Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x00014b9c Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00014bac Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x00014bd0 Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00014bdc Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x00014c6c Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x00014c7e Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x00014c98 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x00014ca0 Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00014ce4 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x00014d1a Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00014d28 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00014d9c Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00014da6 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00014dd0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00014ed4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00014f14 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00014f15 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00014f64 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00014f65 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00014f80 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00014f88 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00014f8e Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00014f9c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00014fbc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00014fcc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00014fd0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00014fe0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00015026 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x0001504c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00015150 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x0001515e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00015172 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x000151de Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x000151e2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x000151fa Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00015202 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x0001520a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00015214 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00015238 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x0001523c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00015240 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00015244 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x0001525c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x00015276 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00015282 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x000152e6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x00015324 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00015458 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x00015476 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x0001547e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x0001549a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x000154b2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x000154c0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x00015500 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x00015510 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x00015518 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x0001553a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x00015542 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00015568 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x00015612 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x00015628 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x00015640 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x0001566e Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x0001567a Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x000156ac Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x000156c4 Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x000156dc Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x000156e8 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x000156fc Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x0001574c Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x0001576c Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x0001577c Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x0001578c Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x0001579c Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x000157ac Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x000157ad Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x000157cc Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c0_set_callback 0x000158fc Section 0 drv_i2c_slave.o(i.drv_i2c0_set_callback) + i.drv_i2c1_set_callback 0x00015908 Section 0 drv_i2c_master.o(i.drv_i2c1_set_callback) + i.drv_i2c_dma_callback 0x00015914 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x00015915 Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x00015948 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x000159f4 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x00015a0e Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x00015a28 Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x00015a88 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x00015a98 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_master_init 0x00015ad0 Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x00015b5c Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x00015bb8 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x00015bf4 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x00015bf5 Thumb Code 62 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x00015c32 Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_config_intr 0x00015c74 Section 0 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + i.drv_i2c_s_enable 0x00015c78 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable) + i.drv_i2c_s_get_fifo_status 0x00015c80 Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_intr 0x00015c94 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + i.drv_i2c_s_write_data 0x00015ce4 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x00015d00 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x00015d58 Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x00015d8c Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x00015da4 Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x00015dbc Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x00015dec Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x00015e02 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00015e26 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x00015e4c Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x00015e62 Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x00015e78 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x00015e84 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00015ea2 Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00015ec4 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00015ee6 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x00015ef2 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00015f0c Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x00015f2e Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00015f48 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x00015f54 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00015fa0 Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00015fa6 Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00015fb8 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00015fd8 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_video_hw_mode 0x00016018 Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x0001602c Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x0001604c Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00016058 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00016098 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x000160a4 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x000160b6 Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x000160c6 Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x000160d4 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x000160e8 Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x000160f4 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x00016104 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x00016116 Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x00016126 Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x0001613c Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00016154 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x0001616e Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x0001617c Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x000161a4 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x000161b4 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x000161bc Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x000161d0 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x000161e4 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x000161ec Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_p2r_filter_init 0x00016200 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x00016224 Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x00016234 Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x00016270 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x000162d0 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x00016324 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00016334 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x0001634c Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x0001636c Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x00016392 Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x000163b0 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x000163b1 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x000163d0 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x000163f0 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x00016408 Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x00016440 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x00016441 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x0001644c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x0001644d Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x0001645c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x0001645d Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x00016470 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x00016471 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x00016486 Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00016490 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00016494 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x000164f0 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x00016504 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x00016568 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x0001656c Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x0001656d Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x0001657e Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x00016582 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x00016583 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x00016594 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x000165a0 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x000165a8 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x000165b4 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x000165c0 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x000165d4 Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x000166a0 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x000166b4 Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x000166c8 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x000166d8 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x000166fe Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x00016706 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x00016710 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_enable 0x00016730 Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_set_int 0x0001674c Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x000167a0 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x000167bc Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x000167c8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x000167f0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x00016808 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x00016824 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x00016848 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x0001686c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x0001687c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x0001688c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x000168b0 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x000168b1 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x000168ca Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x000168ec Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x000168fc Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x0001690c Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x0001690d Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x00016950 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x00016964 Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x00016974 Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x000169c8 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x000169f0 Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_clear 0x00016a00 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x00016a01 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x00016a0a Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x00016a26 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x00016a42 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x00016a43 Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x00016a54 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x00016a55 Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x00016a68 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x00016a69 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00016a78 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00016a80 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00016a98 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x00016ad8 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x00016aec Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x00016b14 Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x00016b20 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x00016b26 Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x00016b62 Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00016b76 Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x00016b86 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x00016b8e Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x00016bb4 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x00016bdc Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x00016bf4 Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x00016bfe Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x00016c0e Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00016c18 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x00016c22 Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00016c34 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00016c3e Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00016c48 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x00016c60 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00016c70 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00016c71 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00016c80 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00016c81 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00016c90 Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x00016cd0 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x00016cda Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x00016cf0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x00016d24 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00016dc0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016e44 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00016e6c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00016e94 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00016ef4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00016ef5 Thumb Code 332 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00017098 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00017099 Thumb Code 184 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00017170 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00017171 Thumb Code 334 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x000172c8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x000172c9 Thumb Code 312 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x00017410 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x00017411 Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x0001763c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x0001772c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_hw_tear_mode 0x00017760 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00017794 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00017795 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x000177cc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x000177cd Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017840 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_start 0x00017874 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x000178b0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x000178ec Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_calc_video_chunks 0x0001790c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x0001790d Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x00017a9c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x00017a9d Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x00017ad0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x00017ad1 Thumb Code 1022 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_crop_pic 0x00017f20 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) + i.hal_dsi_tx_ctrl_create_handle 0x00017fb4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00017fe0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018064 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x000180b0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x000180d8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x0001817c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x0001817d Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x000181a0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_ccm 0x000181ac Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x000181cc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x000181e0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x000181f0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x00018214 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x000182b0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x000182f4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x000183cc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x0001847c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x0001847d Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x000184c0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x000184c1 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x000184f0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x000184f1 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x00018510 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00018511 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x00018530 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x00018531 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x000185c4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x000185c5 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x0001861c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x0001861d Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x00018660 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x00018678 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x0001868c Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x000186cc Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x000186ec Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00018714 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x0001872c Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x0001877c Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x000187dc Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x000187e4 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x00018804 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x00018870 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x00018890 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x000188ac Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x000188b8 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x000188b9 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x000188d8 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x000188d9 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x000188e8 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x00018934 Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x000189fc Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x00018a10 Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x00018a1c Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x00018a1d Thumb Code 354 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x00018b90 Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x00018c8c Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_get_hight_performan_mode 0x00018c9c Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change 0x00018cac Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_update_dpi_param 0x00018ed8 Section 0 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + i.hal_internal_video_mode_auto_sync 0x00018ee8 Section 0 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + i.hal_internal_vsync_deinit 0x00018ff4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x0001901c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00019028 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tear_mode 0x00019040 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + i.hal_internal_vsync_get_tx_state 0x0001904c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00019058 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00019170 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x00019220 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x0001933c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x00019350 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x00019374 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x000193c4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_internal_vsync_update_lcdc_addr 0x00019444 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) + i.hal_lcdc_config_ccm 0x00019474 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x00019475 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x00019498 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x00019499 Thumb Code 84 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x000194f0 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x000194f1 Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x00019504 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x00019505 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x00019668 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00019669 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x000196a8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x000196a9 Thumb Code 422 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x00019858 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x00019859 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_m_clear_rxfifo 0x00019898 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_deinit 0x000198a6 Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_open 0x000198b8 Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x000198ce Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x000198d8 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x00019960 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x0001997c Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x00019984 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x0001998c Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_deinit 0x00019994 Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x000199c2 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x000199dc Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x00019a24 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x00019a4c Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x00019ad8 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.handle_init 0x00019ae8 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x00019bf8 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x00019bf9 Thumb Code 110 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x00019c6c Section 0 ap_demo.o(i.init_panel) + init_panel 0x00019c6d Thumb Code 186 ap_demo.o(i.init_panel) + i.main 0x00019d6c Section 0 main.o(i.main) + i.open_mipi_rx 0x00019d78 Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x00019d79 Thumb Code 112 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x00019dfc Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x00019dfd Thumb Code 80 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x00019e78 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x00019e79 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x0001a26c Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x0001a26d Thumb Code 358 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001a3e4 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001a3e5 Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001a470 Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001a471 Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x0001a5f0 Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001a5f1 Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001a694 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001a695 Thumb Code 316 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_gen_te 0x0001a868 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001a869 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x0001a92c Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x0001a92d Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_te_timer_cb 0x0001a9ec Section 0 ap_demo.o(i.soft_te_timer_cb) + soft_te_timer_cb 0x0001a9ed Thumb Code 36 ap_demo.o(i.soft_te_timer_cb) + i.soft_timer3_cb 0x0001aa18 Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001aa19 Thumb Code 48 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001aa58 Section 0 sqrt.o(i.sqrt) + i.tp_heartbeat_exec 0x0001aaa0 Section 0 ap_demo.o(i.tp_heartbeat_exec) + i.vidc_callback 0x0001ab10 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001ab11 Thumb Code 232 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001ac18 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001ac19 Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001ace8 Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001ace9 Thumb Code 300 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001aeb4 Section 9394 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001aeb4 Data 120 ap_demo.o(.constdata) + .constdata 0x0001d366 Section 32 app_tp_st_touch.o(.constdata) + .constdata 0x0001d388 Section 36 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001d3ac Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001d3ac Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001d424 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001d480 Section 32 hal_i2c_slave.o(.constdata) + sg_i2c_s_config 0x0001d480 Data 32 hal_i2c_slave.o(.constdata) + .constdata 0x0001d4a0 Section 97 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001d501 Section 1 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001d504 Section 8 drv_param_init.o(.constdata) + .constdata 0x0001d50c Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001d50c Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001d5c4 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001d644 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001d674 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001d694 Section 76 ap_demo.o(.conststring) + .conststring 0x0001d6e0 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001d728 Section 67 hal_dsi_tx_ctrl.o(.conststring) + .conststring 0x0001d76c Section 308 hal_internal_vsync.o(.conststring) .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) .data 0x000701d0 Section 40 ap_demo.o(.data) start_display_on 0x000701d0 Data 1 ap_demo.o(.data) @@ -3713,88 +3713,88 @@ Image Symbol Table s_receive_count 0x00070270 Data 4 hal_i2c_slave.o(.data) s_tx_buffer_t 0x00070274 Data 4 hal_i2c_slave.o(.data) tx_sum 0x00070278 Data 4 hal_i2c_slave.o(.data) - .data 0x0007027c Section 232 app_tp_for_custom_s8.o(.data) + .data 0x0007027c Section 3552 app_tp_for_custom_s8.o(.data) app_tp_count 0x0007028c Data 1 app_tp_for_custom_s8.o(.data) u16CoordY 0x0007028e Data 2 app_tp_for_custom_s8.o(.data) u16CoordX 0x00070290 Data 2 app_tp_for_custom_s8.o(.data) u16CoordY_back 0x00070292 Data 2 app_tp_for_custom_s8.o(.data) u16CoordX_back 0x00070294 Data 2 app_tp_for_custom_s8.o(.data) enctryptCnt 0x00070298 Data 4 app_tp_for_custom_s8.o(.data) - .data 0x00070364 Section 1 app_tp_for_custom_s8.o(.data) - .data 0x00070365 Section 1 app_tp_for_custom_s8.o(.data) - .data 0x00070366 Section 1 app_tp_for_custom_s8.o(.data) - .data 0x00070367 Section 3 app_tp_for_custom_s8.o(.data) - .data 0x0007036a Section 5 app_tp_for_custom_s8.o(.data) - .data 0x00070370 Section 48 app_tp_for_custom_s8.o(.data) - .data 0x000703a0 Section 18 norflash.o(.data) - tmprg 0x000703a8 Data 4 norflash.o(.data) - .data 0x000703b4 Section 12 drv_common.o(.data) - s_my_tick 0x000703b4 Data 4 drv_common.o(.data) - .data 0x000703c0 Section 4 drv_gpio.o(.data) - g_ap_reset_cb 0x000703c0 Data 4 drv_gpio.o(.data) - .data 0x000703c4 Section 8 drv_i2c_dma.o(.data) - i2c0_dma_callback 0x000703c4 Data 4 drv_i2c_dma.o(.data) - i2c1_dma_callback 0x000703c8 Data 4 drv_i2c_dma.o(.data) - .data 0x000703cc Section 4 drv_i2c_master.o(.data) - i2c1_intr_callback 0x000703cc Data 4 drv_i2c_master.o(.data) - .data 0x000703d0 Section 4 drv_i2c_slave.o(.data) - i2c0_intr_callback 0x000703d0 Data 4 drv_i2c_slave.o(.data) - .data 0x000703d4 Section 1188 drv_param_init.o(.data) - .data 0x00070878 Section 4 drv_spi_master.o(.data) - SPIM_intr_callback 0x00070878 Data 4 drv_spi_master.o(.data) - .data 0x0007087c Section 8 drv_swire.o(.data) - s_swire_cb 0x0007087c Data 8 drv_swire.o(.data) - .data 0x00070884 Section 1 drv_sys_cfg.o(.data) - sg_ap_rstn_trigger_type 0x00070884 Data 1 drv_sys_cfg.o(.data) - .data 0x00070888 Section 80 drv_timer.o(.data) - sg_timer_info 0x00070888 Data 80 drv_timer.o(.data) - .data 0x000708d8 Section 12 hal_internal_vsync.o(.data) - sg_cmd_mode_tx_start 0x000708d8 Data 1 hal_internal_vsync.o(.data) - sg_cur_te_info 0x000708dc Data 4 hal_internal_vsync.o(.data) - .data 0x000708e4 Section 8 drv_rxbr.o(.data) - .data 0x000708ec Section 4 drv_vidc.o(.data) - .data 0x000708f0 Section 1 drv_phy_common.o(.data) - g_phy_calibration 0x000708f0 Data 1 drv_phy_common.o(.data) - .data 0x000708f4 Section 12 drv_chip_info.o(.data) - sg_chip_info 0x000708f4 Data 4 drv_chip_info.o(.data) - sg_chip_function 0x000708f8 Data 4 drv_chip_info.o(.data) - sg_chip_encrypt 0x000708fc Data 4 drv_chip_info.o(.data) - .data 0x00070900 Section 12 drv_pwm.o(.data) - s_pwm_type 0x00070900 Data 1 drv_pwm.o(.data) - s_pwm_cb 0x00070904 Data 8 drv_pwm.o(.data) - .data 0x0007090c Section 8 drv_uart.o(.data) - s_UartFcrReg 0x0007090c Data 4 drv_uart.o(.data) - uart_userData 0x00070910 Data 4 drv_uart.o(.data) - .data 0x00070914 Section 12 drv_wdg.o(.data) - sg_wdg_repeat 0x00070914 Data 1 drv_wdg.o(.data) - sg_wdg_cb 0x00070918 Data 8 drv_wdg.o(.data) - .data 0x00070920 Section 4 stdout.o(.data) - .data 0x00070924 Section 4 errno.o(.data) - _errno 0x00070924 Data 4 errno.o(.data) - .bss 0x00070928 Section 400 app_tp_transfer.o(.bss) - s_screen_read_buffer 0x00070928 Data 200 app_tp_transfer.o(.bss) - s_phone_read_buffer 0x000709f0 Data 200 app_tp_transfer.o(.bss) - .bss 0x00070ab8 Section 12 app_tp_st_touch.o(.bss) - .bss 0x00070ac4 Section 196 hal_dsi_rx_ctrl.o(.bss) - g_rx_ctrl_handle 0x00070ac4 Data 196 hal_dsi_rx_ctrl.o(.bss) - .bss 0x00070b88 Section 76 hal_dsi_tx_ctrl.o(.bss) - g_tx_ctrl_handle 0x00070b88 Data 76 hal_dsi_tx_ctrl.o(.bss) - .bss 0x00070bd4 Section 256 tau_log.o(.bss) - .bss 0x00070cd4 Section 208 hal_uart.o(.bss) - .bss 0x00070da4 Section 28 drv_dma.o(.bss) - s_dma_handle 0x00070da4 Data 28 drv_dma.o(.bss) - .bss 0x00070dc0 Section 64 drv_gpio.o(.bss) - s_gpio_cb 0x00070dc0 Data 64 drv_gpio.o(.bss) - .bss 0x00070e00 Section 320 drv_i2c_dma.o(.bss) - i2c0_dma_slave_handle 0x00070e00 Data 160 drv_i2c_dma.o(.bss) - i2c1_dma_master_handle 0x00070ea0 Data 160 drv_i2c_dma.o(.bss) - .bss 0x00070f40 Section 2436 hal_internal_vsync.o(.bss) - g_imm_buffer 0x000717a4 Data 255 hal_internal_vsync.o(.bss) - sg_te_info 0x000718a4 Data 12 hal_internal_vsync.o(.bss) - g_imm_packet 0x000718b0 Data 20 hal_internal_vsync.o(.bss) - .bss 0x000718c4 Section 4144 dcs_packet_fifo.o(.bss) - .bss 0x000728f4 Section 32 hal_spi_slave.o(.bss) - STACK 0x00072918 Section 4096 startup_armcm0.o(STACK) + .data 0x0007105c Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007105d Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007105e Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007105f Section 3 app_tp_for_custom_s8.o(.data) + .data 0x00071062 Section 5 app_tp_for_custom_s8.o(.data) + .data 0x00071068 Section 48 app_tp_for_custom_s8.o(.data) + .data 0x00071098 Section 18 norflash.o(.data) + tmprg 0x000710a0 Data 4 norflash.o(.data) + .data 0x000710ac Section 12 drv_common.o(.data) + s_my_tick 0x000710ac Data 4 drv_common.o(.data) + .data 0x000710b8 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x000710b8 Data 4 drv_gpio.o(.data) + .data 0x000710bc Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x000710bc Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x000710c0 Data 4 drv_i2c_dma.o(.data) + .data 0x000710c4 Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x000710c4 Data 4 drv_i2c_master.o(.data) + .data 0x000710c8 Section 4 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x000710c8 Data 4 drv_i2c_slave.o(.data) + .data 0x000710cc Section 1188 drv_param_init.o(.data) + .data 0x00071570 Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x00071570 Data 4 drv_spi_master.o(.data) + .data 0x00071574 Section 8 drv_swire.o(.data) + s_swire_cb 0x00071574 Data 8 drv_swire.o(.data) + .data 0x0007157c Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x0007157c Data 1 drv_sys_cfg.o(.data) + .data 0x00071580 Section 80 drv_timer.o(.data) + sg_timer_info 0x00071580 Data 80 drv_timer.o(.data) + .data 0x000715d0 Section 12 hal_internal_vsync.o(.data) + sg_cmd_mode_tx_start 0x000715d0 Data 1 hal_internal_vsync.o(.data) + sg_cur_te_info 0x000715d4 Data 4 hal_internal_vsync.o(.data) + .data 0x000715dc Section 8 drv_rxbr.o(.data) + .data 0x000715e4 Section 4 drv_vidc.o(.data) + .data 0x000715e8 Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x000715e8 Data 1 drv_phy_common.o(.data) + .data 0x000715ec Section 12 drv_chip_info.o(.data) + sg_chip_info 0x000715ec Data 4 drv_chip_info.o(.data) + sg_chip_function 0x000715f0 Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x000715f4 Data 4 drv_chip_info.o(.data) + .data 0x000715f8 Section 12 drv_pwm.o(.data) + s_pwm_type 0x000715f8 Data 1 drv_pwm.o(.data) + s_pwm_cb 0x000715fc Data 8 drv_pwm.o(.data) + .data 0x00071604 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x00071604 Data 4 drv_uart.o(.data) + uart_userData 0x00071608 Data 4 drv_uart.o(.data) + .data 0x0007160c Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x0007160c Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x00071610 Data 8 drv_wdg.o(.data) + .data 0x00071618 Section 4 stdout.o(.data) + .data 0x0007161c Section 4 errno.o(.data) + _errno 0x0007161c Data 4 errno.o(.data) + .bss 0x00071620 Section 400 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x00071620 Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x000716e8 Data 200 app_tp_transfer.o(.bss) + .bss 0x000717b0 Section 12 app_tp_st_touch.o(.bss) + .bss 0x000717bc Section 196 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x000717bc Data 196 hal_dsi_rx_ctrl.o(.bss) + .bss 0x00071880 Section 76 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x00071880 Data 76 hal_dsi_tx_ctrl.o(.bss) + .bss 0x000718cc Section 256 tau_log.o(.bss) + .bss 0x000719cc Section 208 hal_uart.o(.bss) + .bss 0x00071a9c Section 28 drv_dma.o(.bss) + s_dma_handle 0x00071a9c Data 28 drv_dma.o(.bss) + .bss 0x00071ab8 Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00071ab8 Data 64 drv_gpio.o(.bss) + .bss 0x00071af8 Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x00071af8 Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x00071b98 Data 160 drv_i2c_dma.o(.bss) + .bss 0x00071c38 Section 2436 hal_internal_vsync.o(.bss) + g_imm_buffer 0x0007249c Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x0007259c Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x000725a8 Data 20 hal_internal_vsync.o(.bss) + .bss 0x000725bc Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x000735ec Section 32 hal_spi_slave.o(.bss) + STACK 0x00073610 Section 4096 startup_armcm0.o(STACK) Global Symbols @@ -3986,420 +3986,414 @@ Image Symbol Table __scatterload_zeroinit 0x0001153f Thumb Code 14 handlers.o(i.__scatterload_zeroinit) __set_errno 0x0001154d Thumb Code 6 errno.o(i.__set_errno) ap_demo 0x00011fdd Thumb Code 482 ap_demo.o(i.ap_demo) - ap_get_tp_calibration_status_01 0x000123bd Thumb Code 28 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) - ap_set_tp_calibration_04 0x000125a5 Thumb Code 138 app_tp_st_touch.o(i.ap_set_tp_calibration_04) - ap_tp_st_touch_calibration 0x0001263d Thumb Code 170 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) - ap_tp_st_touch_get_calibration_success_mark 0x000126ed Thumb Code 150 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) - ap_tp_st_touch_scan_point_init 0x00012795 Thumb Code 24 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) - ap_tp_st_touch_scan_point_record_event_exec 0x000127b1 Thumb Code 50 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) - ap_tp_st_touch_simulate_finger_release_event 0x00012801 Thumb Code 44 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) - ap_tp_st_touch_software_reset 0x00012835 Thumb Code 118 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) - app_ADC_IRQn_Handler 0x000128e1 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) - app_AP_NRESET_IRQn_Handler 0x000128fd Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) - app_EXTI_INT0_IRQn_Handler 0x00012921 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) - app_EXTI_INT1_IRQn_Handler 0x0001293d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) - app_EXTI_INT2_IRQn_Handler 0x00012959 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) - app_EXTI_INT3_IRQn_Handler 0x00012975 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) - app_EXTI_INT4_IRQn_Handler 0x00012991 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) - app_EXTI_INT5_IRQn_Handler 0x000129ad Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) - app_EXTI_INT6_IRQn_Handler 0x000129c9 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) - app_EXTI_INT7_IRQn_Handler 0x000129e5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) - app_HardFault_Handler 0x00012a01 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) - app_I2C0_IRQn_Handler 0x00012a49 Thumb Code 14 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) - app_I2C1_IRQn_Handler 0x00012a61 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) - app_LCDC_IRQn_Handler 0x00012a71 Thumb Code 208 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) - app_MEMC_IRQn_Handler 0x00012c15 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) - app_MIPI_RX_IRQn_Handler 0x00012c9d Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) - app_MIPI_TX_IRQn_Handler 0x00012f35 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) - app_PWMDET_IRQn_Handler 0x00012fd5 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) - app_SPIM_IRQn_Handler 0x0001301d Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) - app_SPIS_IRQn_Handler 0x0001304d Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) - app_SWIRE_IRQn_Handler 0x0001324d Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) - app_SysTick_Handler 0x0001326d Thumb Code 20 drv_common.o(i.app_SysTick_Handler) - app_TIMER0_IRQn_Handler 0x00013285 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) - app_TIMER1_IRQn_Handler 0x0001328f Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) - app_TIMER2_IRQn_Handler 0x00013299 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) - app_TIMER3_IRQn_Handler 0x000132a3 Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) - app_UART_IRQn_Handler 0x000132ad Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) - app_VIDC_IRQn_Handler 0x000132b5 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) - app_VPRE_IRQn_Handler 0x000132d1 Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) - app_WDG_IRQn_Handler 0x000132ed Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) - app_dma_irq_handler 0x00013325 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) - app_fls_ctrl_Handler 0x00013335 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) - app_tp_I2C_init 0x00013365 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) - app_tp_calibration_exec 0x00013389 Thumb Code 78 app_tp_st_touch.o(i.app_tp_calibration_exec) - app_tp_init 0x000134cd Thumb Code 56 app_tp_transfer.o(i.app_tp_init) - app_tp_m_read 0x00013511 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) - app_tp_m_write 0x00013531 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) - app_tp_phone_analysis_data 0x00013539 Thumb Code 1200 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) - app_tp_s_read 0x000139f9 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) - app_tp_s_write 0x00013a01 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) - app_tp_screen_analysis_int 0x00013a09 Thumb Code 1156 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) - app_tp_screen_init 0x00013e8d Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) - app_tp_transfer_screen_int 0x00013f09 Thumb Code 250 app_tp_transfer.o(i.app_tp_transfer_screen_int) - app_tp_transfer_screen_start 0x00014015 Thumb Code 16 app_tp_transfer.o(i.app_tp_transfer_screen_start) - board_Init 0x00014029 Thumb Code 30 board.o(i.board_Init) - calc_framebuffer_setting 0x0001404d Thumb Code 1258 hal_internal_vsync.o(i.calc_framebuffer_setting) - ceil 0x0001453d Thumb Code 180 ceil.o(i.ceil) - dcs_packet_fifo_alloc 0x000146c5 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) - dcs_packet_fifo_init 0x0001471d Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) - dcs_packet_free_fifo_header 0x00014735 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) - dcs_packet_get_fifo_header 0x00014779 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) - delayMs 0x000147b9 Thumb Code 24 tau_delay.o(i.delayMs) - delayUs 0x000147d1 Thumb Code 34 tau_delay.o(i.delayUs) - drv_ap_rst_trig_edge_detect 0x000147f5 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) - drv_chip_info_get_info 0x0001482d Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) - drv_chip_info_init 0x00014839 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) - drv_chip_rx_info_check 0x00014879 Thumb Code 98 drv_chip_info.o(i.drv_chip_rx_info_check) - drv_chip_rx_init_done 0x00014929 Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) - drv_common_enable_systick 0x0001493d Thumb Code 70 drv_common.o(i.drv_common_enable_systick) - drv_common_system_init 0x00014995 Thumb Code 8 drv_common.o(i.drv_common_system_init) - drv_crgu_config_reset_modules 0x0001499d Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) - drv_crgu_set_ahb_pre_div 0x000149ad Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) - drv_crgu_set_ahb_src 0x000149c1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) - drv_crgu_set_clock 0x000149d5 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) - drv_crgu_set_dpi_mux_src 0x000149f5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) - drv_crgu_set_dpi_pre_div 0x00014a09 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) - drv_crgu_set_dpi_pre_src 0x00014a21 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) - drv_crgu_set_dsc_core_div 0x00014a35 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) - drv_crgu_set_dsco_src 0x00014a49 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) - drv_crgu_set_dsco_src_div 0x00014a5d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) - drv_crgu_set_fb_div 0x00014a71 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) - drv_crgu_set_fb_src 0x00014a85 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) - drv_crgu_set_lcdc_div 0x00014a99 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) - drv_crgu_set_lcdc_src 0x00014aad Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) - drv_crgu_set_mipi_cfg_src 0x00014ac1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) - drv_crgu_set_mipi_ref_src 0x00014ad5 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) - drv_crgu_set_reset 0x00014aed Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) - drv_crgu_set_rxbr_div 0x00014b05 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) - drv_crgu_set_rxbr_src 0x00014b19 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) - drv_crgu_set_vidc_src 0x00014b2d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) - drv_dma_clear_flag 0x00014b41 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) - drv_dma_create_handle 0x00014b59 Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) - drv_dma_disenable_channel 0x00014b75 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) - drv_dma_enable_channel 0x00014b85 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) - drv_dma_enable_channel_interrupts 0x00014b95 Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) - drv_dma_get_channel_flag 0x00014bb9 Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) - drv_dma_irq_handler 0x00014bc5 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) - drv_dma_prepar_transfer 0x00014c55 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) - drv_dma_set_burst 0x00014c67 Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) - drv_dma_set_callback 0x00014c81 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) - drv_dma_set_transfer 0x00014c89 Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) - drv_dsc_dec_convert_pps_rc_parameter 0x00014ccd Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) - drv_dsc_dec_disable 0x00014d03 Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) - drv_dsc_dec_enable 0x00014d11 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) - drv_dsc_dec_get_nslc 0x00014d85 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) - drv_dsc_dec_set_u8_pps 0x00014d8f Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) - drv_dsi_rx_calc_ipi_tx_delay 0x00014db9 Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) - drv_dsi_rx_enable_irq 0x00014ebd Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) - drv_dsi_rx_get_compression_en 0x00014f69 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) - drv_dsi_rx_get_max_ret_size 0x00014f71 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) - drv_dsi_rx_power_up 0x00014f77 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) - drv_dsi_rx_set_ctrl_cfg 0x00014f85 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) - drv_dsi_rx_set_ddi_cfg 0x00014fa5 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) - drv_dsi_rx_set_inten 0x00014fb5 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) - drv_dsi_rx_set_ipi_cfg 0x00014fb9 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) - drv_dsi_rx_set_lane_swap 0x00014fc9 Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) - drv_dsi_rx_set_resp_cnt 0x0001500f Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) - drv_dsi_rx_set_up_phy 0x00015035 Thumb Code 256 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) - drv_dsi_rx_shut_down 0x00015139 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) - drv_dsi_tx_command_header 0x00015147 Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) - drv_dsi_tx_command_mode_cfg 0x0001515b Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) - drv_dsi_tx_command_put_payload 0x000151c7 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) - drv_dsi_tx_config_eotp 0x000151cb Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) - drv_dsi_tx_config_int 0x000151e3 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) - drv_dsi_tx_dpi_lpcmd_time 0x000151eb Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) - drv_dsi_tx_dpi_mode 0x000151f3 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) - drv_dsi_tx_dpi_polarity 0x000151fd Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) - drv_dsi_tx_edpi_cmd_size 0x00015221 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) - drv_dsi_tx_get_cmd_status 0x00015225 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) - drv_dsi_tx_mode 0x00015229 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) - drv_dsi_tx_phy_clock_lane_auto_lp 0x0001522d Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) - drv_dsi_tx_phy_clock_lane_req_hs 0x00015245 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) - drv_dsi_tx_phy_lane_mode 0x0001525f Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) - drv_dsi_tx_phy_status_ready 0x0001526b Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) - drv_dsi_tx_phy_status_stopstate 0x000152cf Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) - drv_dsi_tx_phy_test_setup 0x0001530d Thumb Code 308 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) - drv_dsi_tx_phy_time_cfg 0x00015441 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) - drv_dsi_tx_powerup 0x0001545f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) - drv_dsi_tx_response_mode 0x00015467 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) - drv_dsi_tx_set_bta_ack 0x00015483 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) - drv_dsi_tx_set_esc_div 0x0001549b Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) - drv_dsi_tx_set_int 0x000154a9 Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) - drv_dsi_tx_set_time_out_div 0x000154e9 Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) - drv_dsi_tx_set_video_chunk 0x000154f9 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) - drv_dsi_tx_set_video_timing 0x00015501 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) - drv_dsi_tx_shutdown 0x00015523 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) - drv_dsi_tx_timeout_cfg 0x0001552b Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) - drv_dsi_tx_video_mode_cfg 0x00015551 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) - drv_dsi_tx_video_mode_disable_hact_cmd 0x000155fb Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) - drv_dsi_tx_video_mode_set_lp_cmd 0x00015611 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) - drv_efuse_enter_inactive 0x00015629 Thumb Code 46 drv_efuse.o(i.drv_efuse_enter_inactive) - drv_efuse_int_enable 0x00015657 Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) - drv_efuse_read 0x00015663 Thumb Code 50 drv_efuse.o(i.drv_efuse_read) - drv_efuse_read_req 0x00015695 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) - drv_gpio_get_input_data 0x000156ad Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) - drv_gpio_register_ap_reset_callback 0x000156c5 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) - drv_gpio_register_callback 0x000156d1 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) - drv_gpio_set_int 0x000156e5 Thumb Code 74 drv_gpio.o(i.drv_gpio_set_int) - drv_gpio_set_ioe 0x00015735 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) - drv_gpio_set_mode0 0x00015755 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) - drv_gpio_set_mode1 0x00015765 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) - drv_gpio_set_mode2 0x00015775 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) - drv_gpio_set_mode3 0x00015785 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) - drv_gpio_set_pull_state 0x000157b5 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) - drv_i2c0_set_callback 0x000158e5 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c0_set_callback) - drv_i2c1_set_callback 0x000158f1 Thumb Code 6 drv_i2c_master.o(i.drv_i2c1_set_callback) - drv_i2c_dma_init 0x00015931 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) - drv_i2c_enable_rx_dma 0x000159dd Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) - drv_i2c_enable_tx_dma 0x000159f7 Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) - drv_i2c_m_clear_it_pending_bit 0x00015a11 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) - drv_i2c_m_enable 0x00015a71 Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) - drv_i2c_m_enable_intr 0x00015a81 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) - drv_i2c_master_init 0x00015ab9 Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) - drv_i2c_master_read_dma 0x00015b45 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) - drv_i2c_master_write_dma 0x00015ba1 Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) - drv_i2c_s_clear_it_pending_bit 0x00015c1b Thumb Code 66 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) - drv_i2c_s_config_intr 0x00015c5d Thumb Code 4 drv_i2c_slave.o(i.drv_i2c_s_config_intr) - drv_i2c_s_enable 0x00015c61 Thumb Code 8 drv_i2c_slave.o(i.drv_i2c_s_enable) - drv_i2c_s_get_fifo_status 0x00015c69 Thumb Code 20 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) - drv_i2c_s_set_intr 0x00015c7d Thumb Code 74 drv_i2c_slave.o(i.drv_i2c_s_set_intr) - drv_i2c_s_write_data 0x00015ccd Thumb Code 28 drv_i2c_slave.o(i.drv_i2c_s_write_data) - drv_i2c_set_dma_irq_callback 0x00015ce9 Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) - drv_i2c_slave_init 0x00015d41 Thumb Code 50 drv_i2c_slave.o(i.drv_i2c_slave_init) - drv_i2c_slave_write_dma 0x00015d75 Thumb Code 20 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) - drv_lcdc_config_bypass 0x00015d8d Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) - drv_lcdc_config_ccm 0x00015da5 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) - drv_lcdc_config_disp_mode 0x00015dd5 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) - drv_lcdc_config_dpi_polarity 0x00015deb Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) - drv_lcdc_config_dpi_timing 0x00015e0f Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) - drv_lcdc_config_edpi_mode 0x00015e35 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) - drv_lcdc_config_endianness 0x00015e4b Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) - drv_lcdc_config_input_size 0x00015e61 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) - drv_lcdc_config_int 0x00015e6d Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) - drv_lcdc_config_int_single 0x00015e8b Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) - drv_lcdc_config_overwrite 0x00015ead Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) - drv_lcdc_config_overwrite_rgb 0x00015ecf Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) - drv_lcdc_config_partial_display_area 0x00015edb Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) - drv_lcdc_config_partial_display_enable 0x00015ef5 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) - drv_lcdc_config_scale_up_coef 0x00015f17 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) - drv_lcdc_config_scale_up_step 0x00015f31 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) - drv_lcdc_config_src_parameter 0x00015f3d Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) - drv_lcdc_config_thresh 0x00015f89 Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) - drv_lcdc_ctrl_flow 0x00015f8f Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) - drv_lcdc_enable_shadow_reg 0x00015fa1 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) - drv_lcdc_set_int 0x00015fc1 Thumb Code 58 drv_lcdc.o(i.drv_lcdc_set_int) - drv_lcdc_set_video_hw_mode 0x00016001 Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) - drv_lcdc_start 0x00016015 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) - drv_memc_clear_status 0x00016035 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) - drv_memc_enable_irq 0x00016041 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) - drv_memc_gen_a_tear_signal 0x00016081 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) - drv_memc_get_status 0x0001608d Thumb Code 18 drv_memc.o(i.drv_memc_get_status) - drv_memc_rate_transfer_sel 0x0001609f Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) - drv_memc_sel_vsync 0x000160af Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) - drv_memc_set_active_height 0x000160bd Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) - drv_memc_set_data_mode 0x000160d1 Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) - drv_memc_set_double_buffer 0x000160dd Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) - drv_memc_set_double_buffer_reverse 0x000160ed Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) - drv_memc_set_fs_en_conditions 0x000160ff Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) - drv_memc_set_inten 0x0001610f Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) - drv_memc_set_lcdc_st_conditions 0x00016125 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) - drv_memc_set_ltpo_mode 0x0001613d Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) - drv_memc_set_tear_mode 0x00016157 Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) - drv_memc_set_tear_waveform 0x00016165 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) - drv_memc_set_vidc_sync_cnt 0x0001618d Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) - drv_param_init_get_ccm 0x0001619d Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) - drv_param_init_get_scld_filter_h 0x000161a5 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) - drv_param_init_get_scld_filter_v 0x000161b9 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) - drv_param_init_get_sclu_filter 0x000161cd Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) - drv_param_init_set_ccm 0x000161d5 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) - drv_param_p2r_filter_init 0x000161e9 Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) - drv_phy_enable_calibration 0x0001620d Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) - drv_phy_get_calibration 0x0001621d Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) - drv_phy_get_pll_para 0x00016259 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) - drv_phy_get_rate_para 0x000162b9 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) - drv_phy_test_clear 0x0001630d Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) - drv_phy_test_lock 0x0001631d Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) - drv_phy_test_write_1_byte 0x00016335 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) - drv_phy_test_write_2_byte 0x00016355 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) - drv_phy_test_write_code 0x0001637b Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) - drv_pwr_set_cp_mode 0x000163b9 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) - drv_pwr_set_pvd_mode 0x000163d9 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) - drv_pwr_set_system_clk_src 0x000163f1 Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) - drv_rxbr_clear_pkt_buffer 0x0001646f Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) - drv_rxbr_clear_status0 0x00016479 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) - drv_rxbr_enable_irq 0x0001647d Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) - drv_rxbr_frame_drop_cfg 0x000164d9 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) - drv_rxbr_get_clk 0x000164ed Thumb Code 66 drv_rxbr.o(i.drv_rxbr_get_clk) - drv_rxbr_get_col_addr 0x00016551 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) - drv_rxbr_get_page_addr 0x00016567 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) - drv_rxbr_hline_rcv0_cfg 0x0001657d Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) - drv_rxbr_hline_rcv_cfg 0x00016589 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) - drv_rxbr_register_irq0_callback 0x00016591 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) - drv_rxbr_register_irq1_callback 0x0001659d Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) - drv_rxbr_set_ack_pkt_header 0x000165a9 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) - drv_rxbr_set_cmd_filter 0x000165bd Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) - drv_rxbr_set_color_format 0x00016689 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) - drv_rxbr_set_inten 0x0001669d Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) - drv_rxbr_set_ltpo_drop_th 0x000166b1 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) - drv_rxbr_set_usr_cfg 0x000166c1 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) - drv_rxbr_set_usr_col 0x000166e7 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) - drv_rxbr_set_usr_row 0x000166ef Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) - drv_spi_m_read_data 0x000166f9 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) - drv_swire_enable 0x00016719 Thumb Code 24 drv_swire.o(i.drv_swire_enable) - drv_swire_set_int 0x00016735 Thumb Code 76 drv_swire.o(i.drv_swire_set_int) - drv_swire_set_power_down 0x00016789 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) - drv_sys_cfg_clear_all_int 0x000167a5 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) - drv_sys_cfg_clear_pending 0x000167b1 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) - drv_sys_cfg_sel_ap_rst_lvl_trig 0x000167d9 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) - drv_sys_cfg_sel_ap_rst_trig 0x000167f1 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) - drv_sys_cfg_sel_gpio_group 0x0001680d Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) - drv_sys_cfg_sel_int_trig 0x00016831 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) - drv_sys_cfg_set_dma_rx_req 0x00016855 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) - drv_sys_cfg_set_dma_tx_req 0x00016865 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) - drv_sys_cfg_set_int 0x00016875 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) - drv_timer_enable 0x000168b3 Thumb Code 32 drv_timer.o(i.drv_timer_enable) - drv_timer_get_instance 0x000168d5 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) - drv_timer_get_prescaler 0x000168e5 Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) - drv_timer_register_callback 0x00016939 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) - drv_timer_set_compare_val 0x0001694d Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) - drv_timer_set_int 0x0001695d Thumb Code 80 drv_timer.o(i.drv_timer_set_int) - drv_timer_set_prescaler 0x000169b1 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) - drv_timer_set_repeat 0x000169d9 Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) - drv_tx_phy_test_enter 0x000169f3 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) - drv_tx_phy_test_exit 0x00016a0f Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) - drv_vidc_clear_irq 0x00016a61 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) - drv_vidc_enable 0x00016a69 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) - drv_vidc_enable_irq 0x00016a81 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) - drv_vidc_get_irq_status 0x00016ac1 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) - drv_vidc_init_module_enable 0x00016ad5 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) - drv_vidc_register_callback 0x00016afd Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) - drv_vidc_reset 0x00016b09 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) - drv_vidc_set_dst_parameter 0x00016b0f Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) - drv_vidc_set_irqen 0x00016b4b Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) - drv_vidc_set_mirror 0x00016b5f Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) - drv_vidc_set_p2r_hcoef0 0x00016b6f Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) - drv_vidc_set_p2r_hinitb 0x00016b77 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) - drv_vidc_set_p2r_hinitr 0x00016b9d Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) - drv_vidc_set_pentile_swap 0x00016bc5 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) - drv_vidc_set_pu_ctrl 0x00016bdd Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) - drv_vidc_set_rotation 0x00016be7 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) - drv_vidc_set_scld_hcoef0 0x00016bf7 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) - drv_vidc_set_scld_hcoef1 0x00016c01 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) - drv_vidc_set_scld_step 0x00016c0b Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) - drv_vidc_set_scld_vcoef0 0x00016c1d Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) - drv_vidc_set_scld_vcoef1 0x00016c27 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) - drv_vidc_set_src_parameter 0x00016c31 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) - drv_wdg_clear_counter 0x00016c49 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) - drv_wdg_set_int 0x00016c79 Thumb Code 60 drv_wdg.o(i.drv_wdg_set_int) - fls_clr_interrupt_flag 0x00016cb9 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) - fputc 0x00016cc3 Thumb Code 20 tau_log.o(i.fputc) - hal_dsi_rx_ctrl_create_handle 0x00016cd9 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) - hal_dsi_rx_ctrl_deinit 0x00016d0d Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) - hal_dsi_rx_ctrl_dsc_async_handler 0x00016da9 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) - hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016e2d Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) - hal_dsi_rx_ctrl_get_max_ret_size 0x00016e55 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) - hal_dsi_rx_ctrl_init 0x00016e7d Thumb Code 88 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) - hal_dsi_rx_ctrl_send_ack_cmd 0x00017625 Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) - hal_dsi_rx_ctrl_set_cus_sync_line 0x00017715 Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) - hal_dsi_rx_ctrl_set_hw_tear_mode 0x00017749 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) - hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017829 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) - hal_dsi_rx_ctrl_start 0x0001785d Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) - hal_dsi_rx_ctrl_stop 0x00017899 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) - hal_dsi_rx_ctrl_toggle_resolution 0x000178d5 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) - hal_dsi_tx_crop_pic 0x00017f09 Thumb Code 144 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) - hal_dsi_tx_ctrl_create_handle 0x00017f9d Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) - hal_dsi_tx_ctrl_deinit 0x00017fc9 Thumb Code 118 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) - hal_dsi_tx_ctrl_enter_init_panel_mode 0x0001804d Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) - hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018099 Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) - hal_dsi_tx_ctrl_init 0x000180c1 Thumb Code 154 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) - hal_dsi_tx_ctrl_panel_reset_pin 0x00018189 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) - hal_dsi_tx_ctrl_set_ccm 0x00018195 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) - hal_dsi_tx_ctrl_set_overwrite_rgb 0x000181b5 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) - hal_dsi_tx_ctrl_set_partial_disp 0x000181c9 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) - hal_dsi_tx_ctrl_set_partial_disp_area 0x000181d9 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) - hal_dsi_tx_ctrl_start 0x000181fd Thumb Code 140 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) - hal_dsi_tx_ctrl_stop 0x00018299 Thumb Code 56 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) - hal_dsi_tx_ctrl_write_array_cmd 0x000182dd Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) - hal_dsi_tx_ctrl_write_cmd 0x000183b5 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) - hal_gpio_ctrl_eint 0x00018649 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) - hal_gpio_get_input_data 0x00018661 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) - hal_gpio_init_eint 0x00018675 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) - hal_gpio_init_input 0x000186b5 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) - hal_gpio_init_output 0x000186d5 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) - hal_gpio_reg_eint_cb 0x000186fd Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) - hal_gpio_set_ap_reset_int 0x00018715 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) - hal_gpio_set_mode 0x00018765 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) - hal_gpio_set_output_data 0x000187c5 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) - hal_gpio_set_pull_state 0x000187cd Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) - hal_i2c_m_dma_init 0x000187ed Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) - hal_i2c_m_dma_read 0x00018859 Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) - hal_i2c_m_dma_write 0x00018879 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) - hal_i2c_m_transfer_complate 0x00018895 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) - hal_i2c_s_dma_write 0x000188d1 Thumb Code 62 hal_i2c_slave.o(i.hal_i2c_s_dma_write) - hal_i2c_s_init 0x0001891d Thumb Code 176 hal_i2c_slave.o(i.hal_i2c_s_init) - hal_i2c_s_nonblocking_read 0x000189e5 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) - hal_i2c_s_set_transfer 0x000189f9 Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) - hal_internal_init_memc 0x00018b79 Thumb Code 170 hal_internal_vsync.o(i.hal_internal_init_memc) - hal_internal_sync_get_fb_setting 0x00018c75 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) - hal_internal_sync_get_hight_performan_mode 0x00018c85 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) - hal_internal_sync_input_resolution_change 0x00018c95 Thumb Code 438 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) - hal_internal_update_dpi_param 0x00018ec1 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_update_dpi_param) - hal_internal_video_mode_auto_sync 0x00018ed1 Thumb Code 238 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) - hal_internal_vsync_deinit 0x00018fdd Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_deinit) - hal_internal_vsync_get_rx_state 0x00019005 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) - hal_internal_vsync_get_sync_line 0x00019011 Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) - hal_internal_vsync_get_tear_mode 0x00019029 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) - hal_internal_vsync_get_tx_state 0x00019035 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) - hal_internal_vsync_init_rx 0x00019041 Thumb Code 236 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) - hal_internal_vsync_init_tx 0x00019159 Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) - hal_internal_vsync_set_auto_hw_filter 0x00019209 Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) - hal_internal_vsync_set_rx_state 0x00019325 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) - hal_internal_vsync_set_sync_line 0x00019339 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) - hal_internal_vsync_set_tear_mode 0x0001935d Thumb Code 72 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) - hal_internal_vsync_set_tx_state 0x000193ad Thumb Code 118 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) - hal_internal_vsync_update_lcdc_addr 0x0001942d Thumb Code 42 hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) - hal_spi_m_clear_rxfifo 0x00019881 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) - hal_swire_deinit 0x0001988f Thumb Code 18 hal_swire.o(i.hal_swire_deinit) - hal_swire_open 0x000198a1 Thumb Code 22 hal_swire.o(i.hal_swire_open) - hal_system_enable_systick 0x000198b7 Thumb Code 8 hal_system.o(i.hal_system_enable_systick) - hal_system_init 0x000198c1 Thumb Code 104 hal_system.o(i.hal_system_init) - hal_system_init_console 0x00019949 Thumb Code 28 hal_system.o(i.hal_system_init_console) - hal_system_set_phy_calibration 0x00019965 Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) - hal_system_set_pvd 0x0001996d Thumb Code 8 hal_system.o(i.hal_system_set_pvd) - hal_system_set_vcc 0x00019975 Thumb Code 8 hal_system.o(i.hal_system_set_vcc) - hal_timer_deinit 0x0001997d Thumb Code 46 hal_timer.o(i.hal_timer_deinit) - hal_timer_init 0x000199ab Thumb Code 26 hal_timer.o(i.hal_timer_init) - hal_timer_start 0x000199c5 Thumb Code 66 hal_timer.o(i.hal_timer_start) - hal_timer_stop 0x00019a0d Thumb Code 40 hal_timer.o(i.hal_timer_stop) - hal_uart_init 0x00019a35 Thumb Code 126 hal_uart.o(i.hal_uart_init) - hal_uart_transmit_blocking 0x00019ac1 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) - handle_init 0x00019ad1 Thumb Code 140 irq_redirect .o(i.handle_init) - main 0x00019d55 Thumb Code 10 main.o(i.main) - sqrt 0x0001aa41 Thumb Code 66 sqrt.o(i.sqrt) - tp_heartbeat_exec 0x0001aa89 Thumb Code 60 ap_demo.o(i.tp_heartbeat_exec) - panel_init_code 0x0001af14 Data 10444 ap_demo.o(.constdata) - wCRCTalbeAbs 0x0001d7e0 Data 32 app_tp_st_touch.o(.constdata) - I2C_Ack_arr_0600_00 0x0001d918 Data 1 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_0600_01 0x0001d919 Data 1 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_0A00 0x0001d91a Data 2 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_0204 0x0001d91c Data 4 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_0A20_01 0x0001d920 Data 7 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_0A20_03 0x0001d927 Data 7 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_0A20_14 0x0001d92e Data 7 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_0120 0x0001d935 Data 8 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_0100 0x0001d93d Data 16 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_0A28 0x0001d94d Data 20 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_A019 0x0001d961 Data 24 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_2000_01 0x0001d979 Data 1088 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_2000_14 0x0001ddb9 Data 200 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_2000_1B 0x0001de81 Data 200 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_2000_1C 0x0001df49 Data 200 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_2000_02 0x0001e011 Data 1088 app_tp_for_custom_s8.o(.constdata) - I2C_Ack_arr_2000_03 0x0001e451 Data 544 app_tp_for_custom_s8.o(.constdata) - screen_reg_start_data_size 0x0001e671 Data 1 app_tp_for_custom_s8.o(.constdata) - Region$$Table$$Base 0x0001ea10 Number 0 anon$$obj.o(Region$$Table) - Region$$Table$$Limit 0x0001ea40 Number 0 anon$$obj.o(Region$$Table) + ap_get_tp_calibration_status_01 0x000123e5 Thumb Code 28 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + ap_set_tp_calibration_04 0x000125cd Thumb Code 138 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + ap_tp_st_touch_calibration 0x00012665 Thumb Code 170 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + ap_tp_st_touch_get_calibration_success_mark 0x00012715 Thumb Code 150 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + ap_tp_st_touch_scan_point_init 0x000127bd Thumb Code 24 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + ap_tp_st_touch_scan_point_record_event_exec 0x000127d9 Thumb Code 50 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + ap_tp_st_touch_simulate_finger_release_event 0x00012829 Thumb Code 44 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + ap_tp_st_touch_software_reset 0x0001285d Thumb Code 118 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) + app_ADC_IRQn_Handler 0x00012909 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x00012925 Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x00012949 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x00012965 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x00012981 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x0001299d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x000129b9 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x000129d5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x000129f1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00012a0d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x00012a29 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x00012a71 Thumb Code 14 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00012a89 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00012a99 Thumb Code 208 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00012c3d Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00012cc5 Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00012f5d Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00012ffd Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00013045 Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x00013075 Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x00013275 Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x00013295 Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x000132ad Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x000132b7 Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x000132c1 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x000132cb Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x000132d5 Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x000132dd Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x000132f9 Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x00013315 Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x0001334d Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x0001335d Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x0001338d Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x000133b1 Thumb Code 78 app_tp_st_touch.o(i.app_tp_calibration_exec) + app_tp_init 0x000134f5 Thumb Code 56 app_tp_transfer.o(i.app_tp_init) + app_tp_m_read 0x00013539 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_write 0x00013559 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + app_tp_phone_analysis_data 0x00013561 Thumb Code 1200 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_s_read 0x00013a21 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x00013a29 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x00013a31 Thumb Code 1140 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x00013ea5 Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x00013f21 Thumb Code 250 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x0001402d Thumb Code 16 app_tp_transfer.o(i.app_tp_transfer_screen_start) + board_Init 0x00014041 Thumb Code 30 board.o(i.board_Init) + calc_framebuffer_setting 0x00014065 Thumb Code 1258 hal_internal_vsync.o(i.calc_framebuffer_setting) + ceil 0x00014555 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x000146dd Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x00014735 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x0001474d Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00014791 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x000147d1 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x000147e9 Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x0001480d Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x00014845 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x00014851 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x00014891 Thumb Code 98 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x00014941 Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x00014955 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x000149ad Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x000149b5 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x000149c5 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x000149d9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x000149ed Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x00014a0d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x00014a21 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x00014a39 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x00014a4d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x00014a61 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x00014a75 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x00014a89 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x00014a9d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x00014ab1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x00014ac5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x00014ad9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x00014aed Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x00014b05 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x00014b1d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x00014b31 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x00014b45 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x00014b59 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x00014b71 Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x00014b8d Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x00014b9d Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00014bad Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x00014bd1 Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00014bdd Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x00014c6d Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x00014c7f Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x00014c99 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x00014ca1 Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00014ce5 Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x00014d1b Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00014d29 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00014d9d Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00014da7 Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x00014dd1 Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00014ed5 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00014f81 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00014f89 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00014f8f Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00014f9d Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00014fbd Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00014fcd Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00014fd1 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00014fe1 Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00015027 Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x0001504d Thumb Code 256 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00015151 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x0001515f Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00015173 Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x000151df Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x000151e3 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x000151fb Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00015203 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x0001520b Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00015215 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00015239 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x0001523d Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00015241 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x00015245 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x0001525d Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x00015277 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00015283 Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x000152e7 Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x00015325 Thumb Code 308 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00015459 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x00015477 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x0001547f Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x0001549b Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x000154b3 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x000154c1 Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x00015501 Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x00015511 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x00015519 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x0001553b Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x00015543 Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00015569 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x00015613 Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x00015629 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x00015641 Thumb Code 46 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x0001566f Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x0001567b Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x000156ad Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x000156c5 Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x000156dd Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x000156e9 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x000156fd Thumb Code 74 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x0001574d Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x0001576d Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x0001577d Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x0001578d Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x0001579d Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x000157cd Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c0_set_callback 0x000158fd Thumb Code 6 drv_i2c_slave.o(i.drv_i2c0_set_callback) + drv_i2c1_set_callback 0x00015909 Thumb Code 6 drv_i2c_master.o(i.drv_i2c1_set_callback) + drv_i2c_dma_init 0x00015949 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x000159f5 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x00015a0f Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x00015a29 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x00015a89 Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x00015a99 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_master_init 0x00015ad1 Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x00015b5d Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x00015bb9 Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x00015c33 Thumb Code 66 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_config_intr 0x00015c75 Thumb Code 4 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + drv_i2c_s_enable 0x00015c79 Thumb Code 8 drv_i2c_slave.o(i.drv_i2c_s_enable) + drv_i2c_s_get_fifo_status 0x00015c81 Thumb Code 20 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_intr 0x00015c95 Thumb Code 74 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + drv_i2c_s_write_data 0x00015ce5 Thumb Code 28 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x00015d01 Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x00015d59 Thumb Code 50 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x00015d8d Thumb Code 20 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x00015da5 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x00015dbd Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x00015ded Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x00015e03 Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00015e27 Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x00015e4d Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x00015e63 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x00015e79 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x00015e85 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00015ea3 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00015ec5 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00015ee7 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x00015ef3 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00015f0d Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x00015f2f Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00015f49 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x00015f55 Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00015fa1 Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00015fa7 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00015fb9 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00015fd9 Thumb Code 58 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_video_hw_mode 0x00016019 Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x0001602d Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x0001604d Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00016059 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00016099 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x000160a5 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x000160b7 Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x000160c7 Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x000160d5 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x000160e9 Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x000160f5 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x00016105 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x00016117 Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x00016127 Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x0001613d Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00016155 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x0001616f Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x0001617d Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x000161a5 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x000161b5 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x000161bd Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x000161d1 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x000161e5 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x000161ed Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_p2r_filter_init 0x00016201 Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x00016225 Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x00016235 Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x00016271 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x000162d1 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x00016325 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00016335 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x0001634d Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x0001636d Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x00016393 Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x000163d1 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x000163f1 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x00016409 Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x00016487 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00016491 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00016495 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x000164f1 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x00016505 Thumb Code 66 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x00016569 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x0001657f Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x00016595 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x000165a1 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x000165a9 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x000165b5 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x000165c1 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x000165d5 Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x000166a1 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x000166b5 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x000166c9 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x000166d9 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x000166ff Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x00016707 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x00016711 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_enable 0x00016731 Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_set_int 0x0001674d Thumb Code 76 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x000167a1 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x000167bd Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x000167c9 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x000167f1 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x00016809 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x00016825 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x00016849 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x0001686d Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x0001687d Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x0001688d Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x000168cb Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x000168ed Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x000168fd Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x00016951 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x00016965 Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x00016975 Thumb Code 80 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x000169c9 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x000169f1 Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x00016a0b Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x00016a27 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00016a79 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00016a81 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00016a99 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x00016ad9 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x00016aed Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x00016b15 Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x00016b21 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x00016b27 Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x00016b63 Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00016b77 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x00016b87 Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x00016b8f Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x00016bb5 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x00016bdd Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x00016bf5 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x00016bff Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x00016c0f Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00016c19 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x00016c23 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00016c35 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00016c3f Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00016c49 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x00016c61 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00016c91 Thumb Code 60 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x00016cd1 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x00016cdb Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00016cf1 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x00016d25 Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00016dc1 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016e45 Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x00016e6d Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00016e95 Thumb Code 88 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_send_ack_cmd 0x0001763d Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_sync_line 0x0001772d Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_hw_tear_mode 0x00017761 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017841 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_start 0x00017875 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x000178b1 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x000178ed Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_crop_pic 0x00017f21 Thumb Code 144 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) + hal_dsi_tx_ctrl_create_handle 0x00017fb5 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00017fe1 Thumb Code 118 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018065 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x000180b1 Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x000180d9 Thumb Code 154 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x000181a1 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_ccm 0x000181ad Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x000181cd Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x000181e1 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x000181f1 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x00018215 Thumb Code 140 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x000182b1 Thumb Code 56 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x000182f5 Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x000183cd Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x00018661 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x00018679 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x0001868d Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x000186cd Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x000186ed Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00018715 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x0001872d Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x0001877d Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x000187dd Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x000187e5 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x00018805 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x00018871 Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x00018891 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x000188ad Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x000188e9 Thumb Code 62 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x00018935 Thumb Code 176 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x000189fd Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x00018a11 Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x00018b91 Thumb Code 170 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x00018c8d Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_get_hight_performan_mode 0x00018c9d Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change 0x00018cad Thumb Code 438 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_update_dpi_param 0x00018ed9 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + hal_internal_video_mode_auto_sync 0x00018ee9 Thumb Code 238 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + hal_internal_vsync_deinit 0x00018ff5 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x0001901d Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00019029 Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tear_mode 0x00019041 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + hal_internal_vsync_get_tx_state 0x0001904d Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00019059 Thumb Code 236 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00019171 Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x00019221 Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x0001933d Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x00019351 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x00019375 Thumb Code 72 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x000193c5 Thumb Code 118 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_internal_vsync_update_lcdc_addr 0x00019445 Thumb Code 42 hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) + hal_spi_m_clear_rxfifo 0x00019899 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_deinit 0x000198a7 Thumb Code 18 hal_swire.o(i.hal_swire_deinit) + hal_swire_open 0x000198b9 Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x000198cf Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x000198d9 Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x00019961 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x0001997d Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x00019985 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x0001998d Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_deinit 0x00019995 Thumb Code 46 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x000199c3 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x000199dd Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x00019a25 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x00019a4d Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x00019ad9 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x00019ae9 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x00019d6d Thumb Code 10 main.o(i.main) + sqrt 0x0001aa59 Thumb Code 66 sqrt.o(i.sqrt) + tp_heartbeat_exec 0x0001aaa1 Thumb Code 60 ap_demo.o(i.tp_heartbeat_exec) + panel_init_code 0x0001af2c Data 9274 ap_demo.o(.constdata) + wCRCTalbeAbs 0x0001d366 Data 32 app_tp_st_touch.o(.constdata) + I2C_Ack_arr_0600_00 0x0001d4a0 Data 1 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0600_01 0x0001d4a1 Data 1 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0A00 0x0001d4a2 Data 2 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0204 0x0001d4a4 Data 4 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0A20_01 0x0001d4a8 Data 7 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0A20_03 0x0001d4af Data 7 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0A20_14 0x0001d4b6 Data 7 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0120 0x0001d4bd Data 8 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0100 0x0001d4c5 Data 16 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0A28 0x0001d4d5 Data 20 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_A019 0x0001d4e9 Data 24 app_tp_for_custom_s8.o(.constdata) + screen_reg_start_data_size 0x0001d501 Data 1 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001d8a0 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001d8d0 Number 0 anon$$obj.o(Region$$Table) g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) phone_start_flag 0x000701d8 Data 1 ap_demo.o(.data) phone_DisplayOFF_flag 0x000701d9 Data 1 ap_demo.o(.data) @@ -4450,45 +4444,51 @@ Image Symbol Table send_point 0x00070289 Data 1 app_tp_for_custom_s8.o(.data) fingerprint_flag 0x0007028a Data 1 app_tp_for_custom_s8.o(.data) fingerprint_enable 0x0007028b Data 1 app_tp_for_custom_s8.o(.data) - phone_reg_coord_back 0x0007029c Data 200 app_tp_for_custom_s8.o(.data) - g_screen_input_rst_pad 0x00070364 Data 1 app_tp_for_custom_s8.o(.data) - g_screen_input_int_pad 0x00070365 Data 1 app_tp_for_custom_s8.o(.data) - screen_data_write_1 0x00070366 Data 1 app_tp_for_custom_s8.o(.data) - screen_data_write_2 0x00070367 Data 3 app_tp_for_custom_s8.o(.data) - screen_data_write_3 0x0007036a Data 5 app_tp_for_custom_s8.o(.data) - screen_reg_int_data 0x00070370 Data 48 app_tp_for_custom_s8.o(.data) - g_fls_w_cmd 0x000703a0 Data 1 norflash.o(.data) - g_fls_r_cmd 0x000703a1 Data 1 norflash.o(.data) - g_fls_write_en_status 0x000703a2 Data 1 norflash.o(.data) - isFlsTransferEnd 0x000703a3 Data 1 norflash.o(.data) - isFlsFifoReq 0x000703a4 Data 1 norflash.o(.data) - isNandWriteCompleted 0x000703a5 Data 1 norflash.o(.data) - isNandReadCompleted 0x000703a6 Data 1 norflash.o(.data) - g_fls_error_info 0x000703ac Data 6 norflash.o(.data) - g_systick_cb_func 0x000703b8 Data 4 drv_common.o(.data) - g_system_clock 0x000703bc Data 4 drv_common.o(.data) - g_scld_fhd_filter_h 0x000703d4 Data 256 drv_param_init.o(.data) - g_scld_fhd_filter_v 0x000704d4 Data 256 drv_param_init.o(.data) - g_scld_hd_filter_h 0x000705d4 Data 256 drv_param_init.o(.data) - g_scld_hd_filter_v 0x000706d4 Data 256 drv_param_init.o(.data) - g_sclu_lanczos_filter 0x000707d4 Data 128 drv_param_init.o(.data) - g_ccm_setting 0x00070854 Data 36 drv_param_init.o(.data) - g_sof_gen_te_func 0x000708e0 Data 4 hal_internal_vsync.o(.data) - g_int_rxbr_irq0_cb_func 0x000708e4 Data 4 drv_rxbr.o(.data) - g_int_rxbr_irq1_cb_func 0x000708e8 Data 4 drv_rxbr.o(.data) - g_int_vidc_cb_func 0x000708ec Data 4 drv_vidc.o(.data) - __stdout 0x00070920 Data 4 stdout.o(.data) - tp_scan_data 0x00070ab8 Data 12 app_tp_st_touch.o(.bss) - string 0x00070bd4 Data 256 tau_log.o(.bss) - hal_dmahandle 0x00070cd4 Data 160 hal_uart.o(.bss) - hal_uarthandle_dma 0x00070d74 Data 32 hal_uart.o(.bss) - hal_uart_handle_global 0x00070d94 Data 16 hal_uart.o(.bss) - g_vsync_hande 0x00070f40 Data 100 hal_internal_vsync.o(.bss) - g_dcs_execute_table 0x00070fa4 Data 2048 hal_internal_vsync.o(.bss) - g_packet_fifo 0x000718c4 Data 4144 dcs_packet_fifo.o(.bss) - g_spis_ctrl_handle 0x000728f4 Data 32 hal_spi_slave.o(.bss) - __stack_limit 0x00072918 Data 0 startup_armcm0.o(STACK) - __initial_sp 0x00073918 Data 0 startup_armcm0.o(STACK) + I2C_Ack_arr_2000_01 0x0007029c Data 1088 app_tp_for_custom_s8.o(.data) + I2C_Ack_arr_2000_14 0x000706dc Data 200 app_tp_for_custom_s8.o(.data) + I2C_Ack_arr_2000_1B 0x000707a4 Data 200 app_tp_for_custom_s8.o(.data) + I2C_Ack_arr_2000_1C 0x0007086c Data 200 app_tp_for_custom_s8.o(.data) + I2C_Ack_arr_2000_02 0x00070934 Data 1088 app_tp_for_custom_s8.o(.data) + I2C_Ack_arr_2000_03 0x00070d74 Data 544 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x00070f94 Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x0007105c Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x0007105d Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x0007105e Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x0007105f Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x00071062 Data 5 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x00071068 Data 48 app_tp_for_custom_s8.o(.data) + g_fls_w_cmd 0x00071098 Data 1 norflash.o(.data) + g_fls_r_cmd 0x00071099 Data 1 norflash.o(.data) + g_fls_write_en_status 0x0007109a Data 1 norflash.o(.data) + isFlsTransferEnd 0x0007109b Data 1 norflash.o(.data) + isFlsFifoReq 0x0007109c Data 1 norflash.o(.data) + isNandWriteCompleted 0x0007109d Data 1 norflash.o(.data) + isNandReadCompleted 0x0007109e Data 1 norflash.o(.data) + g_fls_error_info 0x000710a4 Data 6 norflash.o(.data) + g_systick_cb_func 0x000710b0 Data 4 drv_common.o(.data) + g_system_clock 0x000710b4 Data 4 drv_common.o(.data) + g_scld_fhd_filter_h 0x000710cc Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x000711cc Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x000712cc Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x000713cc Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x000714cc Data 128 drv_param_init.o(.data) + g_ccm_setting 0x0007154c Data 36 drv_param_init.o(.data) + g_sof_gen_te_func 0x000715d8 Data 4 hal_internal_vsync.o(.data) + g_int_rxbr_irq0_cb_func 0x000715dc Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x000715e0 Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x000715e4 Data 4 drv_vidc.o(.data) + __stdout 0x00071618 Data 4 stdout.o(.data) + tp_scan_data 0x000717b0 Data 12 app_tp_st_touch.o(.bss) + string 0x000718cc Data 256 tau_log.o(.bss) + hal_dmahandle 0x000719cc Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x00071a6c Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x00071a8c Data 16 hal_uart.o(.bss) + g_vsync_hande 0x00071c38 Data 100 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00071c9c Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x000725bc Data 4144 dcs_packet_fifo.o(.bss) + g_spis_ctrl_handle 0x000735ec Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x00073610 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00074610 Data 0 startup_armcm0.o(STACK) @@ -4498,9 +4498,9 @@ Memory Map of the image Image Entry point : 0x000100c1 - Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000f198, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000ee28]) + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000ed20, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000e708]) - Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000ea40, Max: 0x00010000, ABSOLUTE) + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000d8d0, Max: 0x00010000, ABSOLUTE) Exec Addr Load Addr Size Type Attr Idx E Section Name Object @@ -4620,532 +4620,533 @@ Memory Map of the image 0x00011e04 0x00011e04 0x0000000a Code RO 2943 i._sputc mc_p.l(printfa.o) 0x00011e0e 0x00011e0e 0x00000002 PAD 0x00011e10 0x00011e10 0x000001cc Code RO 87 i.ap_dcs_read ap_demo.o - 0x00011fdc 0x00011fdc 0x000002c8 Code RO 88 i.ap_demo ap_demo.o - 0x000122a4 0x000122a4 0x0000002c Code RO 89 i.ap_get_reg_53 ap_demo.o - 0x000122d0 0x000122d0 0x00000054 Code RO 90 i.ap_get_reg_7A ap_demo.o - 0x00012324 0x00012324 0x00000098 Code RO 91 i.ap_get_reg_df ap_demo.o - 0x000123bc 0x000123bc 0x00000020 Code RO 406 i.ap_get_tp_calibration_status_01 app_tp_st_touch.o - 0x000123dc 0x000123dc 0x00000044 Code RO 92 i.ap_reset_cb ap_demo.o - 0x00012420 0x00012420 0x00000044 Code RO 93 i.ap_set_backlight_51 ap_demo.o - 0x00012464 0x00012464 0x00000048 Code RO 94 i.ap_set_display_off ap_demo.o - 0x000124ac 0x000124ac 0x00000038 Code RO 95 i.ap_set_display_on ap_demo.o - 0x000124e4 0x000124e4 0x00000078 Code RO 96 i.ap_set_enter_sleep_mode ap_demo.o - 0x0001255c 0x0001255c 0x00000048 Code RO 97 i.ap_set_exit_sleep_mode ap_demo.o - 0x000125a4 0x000125a4 0x00000098 Code RO 407 i.ap_set_tp_calibration_04 app_tp_st_touch.o - 0x0001263c 0x0001263c 0x000000b0 Code RO 408 i.ap_tp_st_touch_calibration app_tp_st_touch.o - 0x000126ec 0x000126ec 0x000000a8 Code RO 411 i.ap_tp_st_touch_get_calibration_success_mark app_tp_st_touch.o - 0x00012794 0x00012794 0x0000001c Code RO 413 i.ap_tp_st_touch_scan_point_init app_tp_st_touch.o - 0x000127b0 0x000127b0 0x00000050 Code RO 415 i.ap_tp_st_touch_scan_point_record_event_exec app_tp_st_touch.o - 0x00012800 0x00012800 0x00000034 Code RO 416 i.ap_tp_st_touch_simulate_finger_release_event app_tp_st_touch.o - 0x00012834 0x00012834 0x000000ac Code RO 417 i.ap_tp_st_touch_software_reset app_tp_st_touch.o - 0x000128e0 0x000128e0 0x0000001c Code RO 2136 i.app_ADC_IRQn_Handler CVWL368.lib(drv_rxbr.o) - 0x000128fc 0x000128fc 0x00000024 Code RO 1428 i.app_AP_NRESET_IRQn_Handler CVWL368.lib(drv_gpio.o) - 0x00012920 0x00012920 0x0000001c Code RO 1429 i.app_EXTI_INT0_IRQn_Handler CVWL368.lib(drv_gpio.o) - 0x0001293c 0x0001293c 0x0000001c Code RO 1430 i.app_EXTI_INT1_IRQn_Handler CVWL368.lib(drv_gpio.o) - 0x00012958 0x00012958 0x0000001c Code RO 1431 i.app_EXTI_INT2_IRQn_Handler CVWL368.lib(drv_gpio.o) - 0x00012974 0x00012974 0x0000001c Code RO 1432 i.app_EXTI_INT3_IRQn_Handler CVWL368.lib(drv_gpio.o) - 0x00012990 0x00012990 0x0000001c Code RO 1433 i.app_EXTI_INT4_IRQn_Handler CVWL368.lib(drv_gpio.o) - 0x000129ac 0x000129ac 0x0000001c Code RO 1434 i.app_EXTI_INT5_IRQn_Handler CVWL368.lib(drv_gpio.o) - 0x000129c8 0x000129c8 0x0000001c Code RO 1435 i.app_EXTI_INT6_IRQn_Handler CVWL368.lib(drv_gpio.o) - 0x000129e4 0x000129e4 0x0000001c Code RO 1436 i.app_EXTI_INT7_IRQn_Handler CVWL368.lib(drv_gpio.o) - 0x00012a00 0x00012a00 0x00000048 Code RO 1175 i.app_HardFault_Handler CVWL368.lib(drv_common.o) - 0x00012a48 0x00012a48 0x00000018 Code RO 1539 i.app_I2C0_IRQn_Handler CVWL368.lib(drv_i2c_slave.o) - 0x00012a60 0x00012a60 0x00000010 Code RO 1505 i.app_I2C1_IRQn_Handler CVWL368.lib(drv_i2c_master.o) - 0x00012a70 0x00012a70 0x000001a4 Code RO 1746 i.app_LCDC_IRQn_Handler CVWL368.lib(hal_internal_vsync.o) - 0x00012c14 0x00012c14 0x00000088 Code RO 2078 i.app_MEMC_IRQn_Handler CVWL368.lib(drv_memc.o) - 0x00012c9c 0x00012c9c 0x00000298 Code RO 1850 i.app_MIPI_RX_IRQn_Handler CVWL368.lib(drv_dsi_rx.o) - 0x00012f34 0x00012f34 0x000000a0 Code RO 1906 i.app_MIPI_TX_IRQn_Handler CVWL368.lib(drv_dsi_tx.o) - 0x00012fd4 0x00012fd4 0x00000048 Code RO 2498 i.app_PWMDET_IRQn_Handler CVWL368.lib(drv_pwm.o) - 0x0001301c 0x0001301c 0x00000030 Code RO 1629 i.app_SPIM_IRQn_Handler CVWL368.lib(drv_spi_master.o) - 0x0001304c 0x0001304c 0x00000200 Code RO 2431 i.app_SPIS_IRQn_Handler CVWL368.lib(hal_spi_slave.o) - 0x0001324c 0x0001324c 0x00000020 Code RO 1661 i.app_SWIRE_IRQn_Handler CVWL368.lib(drv_swire.o) - 0x0001326c 0x0001326c 0x00000018 Code RO 1176 i.app_SysTick_Handler CVWL368.lib(drv_common.o) - 0x00013284 0x00013284 0x0000000a Code RO 1711 i.app_TIMER0_IRQn_Handler CVWL368.lib(drv_timer.o) - 0x0001328e 0x0001328e 0x0000000a Code RO 1712 i.app_TIMER1_IRQn_Handler CVWL368.lib(drv_timer.o) - 0x00013298 0x00013298 0x0000000a Code RO 1713 i.app_TIMER2_IRQn_Handler CVWL368.lib(drv_timer.o) - 0x000132a2 0x000132a2 0x0000000a Code RO 1714 i.app_TIMER3_IRQn_Handler CVWL368.lib(drv_timer.o) - 0x000132ac 0x000132ac 0x00000008 Code RO 2591 i.app_UART_IRQn_Handler CVWL368.lib(drv_uart.o) - 0x000132b4 0x000132b4 0x0000001c Code RO 2201 i.app_VIDC_IRQn_Handler CVWL368.lib(drv_vidc.o) - 0x000132d0 0x000132d0 0x0000001c Code RO 2137 i.app_VPRE_IRQn_Handler CVWL368.lib(drv_rxbr.o) - 0x000132ec 0x000132ec 0x00000038 Code RO 2650 i.app_WDG_IRQn_Handler CVWL368.lib(drv_wdg.o) - 0x00013324 0x00013324 0x00000010 Code RO 1290 i.app_dma_irq_handler CVWL368.lib(drv_dma.o) - 0x00013334 0x00013334 0x00000030 Code RO 1091 i.app_fls_ctrl_Handler CVWL368.lib(norflash.o) - 0x00013364 0x00013364 0x00000024 Code RO 254 i.app_tp_I2C_init app_tp_transfer.o - 0x00013388 0x00013388 0x000000a8 Code RO 418 i.app_tp_calibration_exec app_tp_st_touch.o - 0x00013430 0x00013430 0x0000009c Code RO 255 i.app_tp_i2cs_callback app_tp_transfer.o - 0x000134cc 0x000134cc 0x00000044 Code RO 256 i.app_tp_init app_tp_transfer.o - 0x00013510 0x00013510 0x00000020 Code RO 257 i.app_tp_m_read app_tp_transfer.o - 0x00013530 0x00013530 0x00000008 Code RO 259 i.app_tp_m_write app_tp_transfer.o - 0x00013538 0x00013538 0x000004c0 Code RO 953 i.app_tp_phone_analysis_data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) - 0x000139f8 0x000139f8 0x00000008 Code RO 262 i.app_tp_s_read app_tp_transfer.o - 0x00013a00 0x00013a00 0x00000008 Code RO 264 i.app_tp_s_write app_tp_transfer.o - 0x00013a08 0x00013a08 0x00000484 Code RO 955 i.app_tp_screen_analysis_int ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) - 0x00013e8c 0x00013e8c 0x00000030 Code RO 265 i.app_tp_screen_init app_tp_transfer.o - 0x00013ebc 0x00013ebc 0x0000000c Code RO 266 i.app_tp_screen_int_callback app_tp_transfer.o - 0x00013ec8 0x00013ec8 0x00000040 Code RO 267 i.app_tp_transfer_screen_const app_tp_transfer.o - 0x00013f08 0x00013f08 0x0000010c Code RO 268 i.app_tp_transfer_screen_int app_tp_transfer.o - 0x00014014 0x00014014 0x00000014 Code RO 269 i.app_tp_transfer_screen_start app_tp_transfer.o - 0x00014028 0x00014028 0x00000024 Code RO 508 i.board_Init board.o - 0x0001404c 0x0001404c 0x000004f0 Code RO 1747 i.calc_framebuffer_setting CVWL368.lib(hal_internal_vsync.o) - 0x0001453c 0x0001453c 0x000000c8 Code RO 2674 i.ceil m_ps.l(ceil.o) - 0x00014604 0x00014604 0x0000002c Code RO 1748 i.check_mipi_rx_tx_video_info CVWL368.lib(hal_internal_vsync.o) - 0x00014630 0x00014630 0x00000094 Code RO 1749 i.check_pkt_buf_rev CVWL368.lib(hal_internal_vsync.o) - 0x000146c4 0x000146c4 0x00000058 Code RO 1837 i.dcs_packet_fifo_alloc CVWL368.lib(dcs_packet_fifo.o) - 0x0001471c 0x0001471c 0x00000018 Code RO 1838 i.dcs_packet_fifo_init CVWL368.lib(dcs_packet_fifo.o) - 0x00014734 0x00014734 0x00000044 Code RO 1839 i.dcs_packet_free_fifo_header CVWL368.lib(dcs_packet_fifo.o) - 0x00014778 0x00014778 0x00000024 Code RO 1840 i.dcs_packet_get_fifo_header CVWL368.lib(dcs_packet_fifo.o) - 0x0001479c 0x0001479c 0x0000001c Code RO 1750 i.dcs_sw_filter CVWL368.lib(hal_internal_vsync.o) - 0x000147b8 0x000147b8 0x00000018 Code RO 933 i.delayMs CVWL368.lib(tau_delay.o) - 0x000147d0 0x000147d0 0x00000022 Code RO 934 i.delayUs CVWL368.lib(tau_delay.o) - 0x000147f2 0x000147f2 0x00000002 PAD - 0x000147f4 0x000147f4 0x00000038 Code RO 1680 i.drv_ap_rst_trig_edge_detect CVWL368.lib(drv_sys_cfg.o) - 0x0001482c 0x0001482c 0x0000000c Code RO 2401 i.drv_chip_info_get_info CVWL368.lib(drv_chip_info.o) - 0x00014838 0x00014838 0x00000040 Code RO 2402 i.drv_chip_info_init CVWL368.lib(drv_chip_info.o) - 0x00014878 0x00014878 0x000000b0 Code RO 2403 i.drv_chip_rx_info_check CVWL368.lib(drv_chip_info.o) - 0x00014928 0x00014928 0x00000014 Code RO 2404 i.drv_chip_rx_init_done CVWL368.lib(drv_chip_info.o) - 0x0001493c 0x0001493c 0x00000058 Code RO 1178 i.drv_common_enable_systick CVWL368.lib(drv_common.o) - 0x00014994 0x00014994 0x00000008 Code RO 1181 i.drv_common_system_init CVWL368.lib(drv_common.o) - 0x0001499c 0x0001499c 0x00000010 Code RO 1203 i.drv_crgu_config_reset_modules CVWL368.lib(drv_crgu.o) - 0x000149ac 0x000149ac 0x00000014 Code RO 1216 i.drv_crgu_set_ahb_pre_div CVWL368.lib(drv_crgu.o) - 0x000149c0 0x000149c0 0x00000014 Code RO 1217 i.drv_crgu_set_ahb_src CVWL368.lib(drv_crgu.o) - 0x000149d4 0x000149d4 0x00000020 Code RO 1220 i.drv_crgu_set_clock CVWL368.lib(drv_crgu.o) - 0x000149f4 0x000149f4 0x00000014 Code RO 1221 i.drv_crgu_set_dpi_mux_src CVWL368.lib(drv_crgu.o) - 0x00014a08 0x00014a08 0x00000018 Code RO 1222 i.drv_crgu_set_dpi_pre_div CVWL368.lib(drv_crgu.o) - 0x00014a20 0x00014a20 0x00000014 Code RO 1223 i.drv_crgu_set_dpi_pre_src CVWL368.lib(drv_crgu.o) - 0x00014a34 0x00014a34 0x00000014 Code RO 1224 i.drv_crgu_set_dsc_core_div CVWL368.lib(drv_crgu.o) - 0x00014a48 0x00014a48 0x00000014 Code RO 1225 i.drv_crgu_set_dsco_src CVWL368.lib(drv_crgu.o) - 0x00014a5c 0x00014a5c 0x00000014 Code RO 1226 i.drv_crgu_set_dsco_src_div CVWL368.lib(drv_crgu.o) - 0x00014a70 0x00014a70 0x00000014 Code RO 1227 i.drv_crgu_set_fb_div CVWL368.lib(drv_crgu.o) - 0x00014a84 0x00014a84 0x00000014 Code RO 1228 i.drv_crgu_set_fb_src CVWL368.lib(drv_crgu.o) - 0x00014a98 0x00014a98 0x00000014 Code RO 1231 i.drv_crgu_set_lcdc_div CVWL368.lib(drv_crgu.o) - 0x00014aac 0x00014aac 0x00000014 Code RO 1232 i.drv_crgu_set_lcdc_src CVWL368.lib(drv_crgu.o) - 0x00014ac0 0x00014ac0 0x00000014 Code RO 1233 i.drv_crgu_set_mipi_cfg_src CVWL368.lib(drv_crgu.o) - 0x00014ad4 0x00014ad4 0x00000018 Code RO 1234 i.drv_crgu_set_mipi_ref_src CVWL368.lib(drv_crgu.o) - 0x00014aec 0x00014aec 0x00000018 Code RO 1237 i.drv_crgu_set_reset CVWL368.lib(drv_crgu.o) - 0x00014b04 0x00014b04 0x00000014 Code RO 1238 i.drv_crgu_set_rxbr_div CVWL368.lib(drv_crgu.o) - 0x00014b18 0x00014b18 0x00000014 Code RO 1239 i.drv_crgu_set_rxbr_src CVWL368.lib(drv_crgu.o) - 0x00014b2c 0x00014b2c 0x00000014 Code RO 1241 i.drv_crgu_set_vidc_src CVWL368.lib(drv_crgu.o) - 0x00014b40 0x00014b40 0x00000018 Code RO 1294 i.drv_dma_clear_flag CVWL368.lib(drv_dma.o) - 0x00014b58 0x00014b58 0x0000001c Code RO 1295 i.drv_dma_create_handle CVWL368.lib(drv_dma.o) - 0x00014b74 0x00014b74 0x00000010 Code RO 1297 i.drv_dma_disenable_channel CVWL368.lib(drv_dma.o) - 0x00014b84 0x00014b84 0x00000010 Code RO 1299 i.drv_dma_enable_channel CVWL368.lib(drv_dma.o) - 0x00014b94 0x00014b94 0x00000024 Code RO 1300 i.drv_dma_enable_channel_interrupts CVWL368.lib(drv_dma.o) - 0x00014bb8 0x00014bb8 0x0000000c Code RO 1302 i.drv_dma_get_channel_flag CVWL368.lib(drv_dma.o) - 0x00014bc4 0x00014bc4 0x00000090 Code RO 1305 i.drv_dma_irq_handler CVWL368.lib(drv_dma.o) - 0x00014c54 0x00014c54 0x00000012 Code RO 1307 i.drv_dma_prepar_transfer CVWL368.lib(drv_dma.o) - 0x00014c66 0x00014c66 0x0000001a Code RO 1309 i.drv_dma_set_burst CVWL368.lib(drv_dma.o) - 0x00014c80 0x00014c80 0x00000006 Code RO 1310 i.drv_dma_set_callback CVWL368.lib(drv_dma.o) - 0x00014c86 0x00014c86 0x00000002 PAD - 0x00014c88 0x00014c88 0x00000044 Code RO 1312 i.drv_dma_set_transfer CVWL368.lib(drv_dma.o) - 0x00014ccc 0x00014ccc 0x00000036 Code RO 2414 i.drv_dsc_dec_convert_pps_rc_parameter CVWL368.lib(drv_dsc_dec.o) - 0x00014d02 0x00014d02 0x0000000c Code RO 2415 i.drv_dsc_dec_disable CVWL368.lib(drv_dsc_dec.o) - 0x00014d0e 0x00014d0e 0x00000002 PAD - 0x00014d10 0x00014d10 0x00000074 Code RO 2416 i.drv_dsc_dec_enable CVWL368.lib(drv_dsc_dec.o) - 0x00014d84 0x00014d84 0x0000000a Code RO 2417 i.drv_dsc_dec_get_nslc CVWL368.lib(drv_dsc_dec.o) - 0x00014d8e 0x00014d8e 0x00000028 Code RO 2419 i.drv_dsc_dec_set_u8_pps CVWL368.lib(drv_dsc_dec.o) - 0x00014db6 0x00014db6 0x00000002 PAD - 0x00014db8 0x00014db8 0x00000104 Code RO 1851 i.drv_dsi_rx_calc_ipi_tx_delay CVWL368.lib(drv_dsi_rx.o) - 0x00014ebc 0x00014ebc 0x00000040 Code RO 1852 i.drv_dsi_rx_enable_irq CVWL368.lib(drv_dsi_rx.o) - 0x00014efc 0x00014efc 0x00000050 Code RO 1853 i.drv_dsi_rx_get_color_bpp CVWL368.lib(drv_dsi_rx.o) - 0x00014f4c 0x00014f4c 0x0000001c Code RO 1854 i.drv_dsi_rx_get_color_pcc CVWL368.lib(drv_dsi_rx.o) - 0x00014f68 0x00014f68 0x00000008 Code RO 1855 i.drv_dsi_rx_get_compression_en CVWL368.lib(drv_dsi_rx.o) - 0x00014f70 0x00014f70 0x00000006 Code RO 1856 i.drv_dsi_rx_get_max_ret_size CVWL368.lib(drv_dsi_rx.o) - 0x00014f76 0x00014f76 0x0000000e Code RO 1860 i.drv_dsi_rx_power_up CVWL368.lib(drv_dsi_rx.o) - 0x00014f84 0x00014f84 0x00000020 Code RO 1861 i.drv_dsi_rx_set_ctrl_cfg CVWL368.lib(drv_dsi_rx.o) - 0x00014fa4 0x00014fa4 0x00000010 Code RO 1862 i.drv_dsi_rx_set_ddi_cfg CVWL368.lib(drv_dsi_rx.o) - 0x00014fb4 0x00014fb4 0x00000004 Code RO 1864 i.drv_dsi_rx_set_inten CVWL368.lib(drv_dsi_rx.o) - 0x00014fb8 0x00014fb8 0x00000010 Code RO 1865 i.drv_dsi_rx_set_ipi_cfg CVWL368.lib(drv_dsi_rx.o) - 0x00014fc8 0x00014fc8 0x00000046 Code RO 1867 i.drv_dsi_rx_set_lane_swap CVWL368.lib(drv_dsi_rx.o) - 0x0001500e 0x0001500e 0x00000026 Code RO 1868 i.drv_dsi_rx_set_resp_cnt CVWL368.lib(drv_dsi_rx.o) - 0x00015034 0x00015034 0x00000104 Code RO 1869 i.drv_dsi_rx_set_up_phy CVWL368.lib(drv_dsi_rx.o) - 0x00015138 0x00015138 0x0000000e Code RO 1870 i.drv_dsi_rx_shut_down CVWL368.lib(drv_dsi_rx.o) - 0x00015146 0x00015146 0x00000014 Code RO 1908 i.drv_dsi_tx_command_header CVWL368.lib(drv_dsi_tx.o) - 0x0001515a 0x0001515a 0x0000006c Code RO 1909 i.drv_dsi_tx_command_mode_cfg CVWL368.lib(drv_dsi_tx.o) - 0x000151c6 0x000151c6 0x00000004 Code RO 1910 i.drv_dsi_tx_command_put_payload CVWL368.lib(drv_dsi_tx.o) - 0x000151ca 0x000151ca 0x00000018 Code RO 1911 i.drv_dsi_tx_config_eotp CVWL368.lib(drv_dsi_tx.o) - 0x000151e2 0x000151e2 0x00000008 Code RO 1912 i.drv_dsi_tx_config_int CVWL368.lib(drv_dsi_tx.o) - 0x000151ea 0x000151ea 0x00000008 Code RO 1913 i.drv_dsi_tx_dpi_lpcmd_time CVWL368.lib(drv_dsi_tx.o) - 0x000151f2 0x000151f2 0x0000000a Code RO 1914 i.drv_dsi_tx_dpi_mode CVWL368.lib(drv_dsi_tx.o) - 0x000151fc 0x000151fc 0x00000024 Code RO 1915 i.drv_dsi_tx_dpi_polarity CVWL368.lib(drv_dsi_tx.o) - 0x00015220 0x00015220 0x00000004 Code RO 1916 i.drv_dsi_tx_edpi_cmd_size CVWL368.lib(drv_dsi_tx.o) - 0x00015224 0x00015224 0x00000004 Code RO 1918 i.drv_dsi_tx_get_cmd_status CVWL368.lib(drv_dsi_tx.o) - 0x00015228 0x00015228 0x00000004 Code RO 1920 i.drv_dsi_tx_mode CVWL368.lib(drv_dsi_tx.o) - 0x0001522c 0x0001522c 0x00000018 Code RO 1921 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL368.lib(drv_dsi_tx.o) - 0x00015244 0x00015244 0x0000001a Code RO 1922 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL368.lib(drv_dsi_tx.o) - 0x0001525e 0x0001525e 0x0000000c Code RO 1924 i.drv_dsi_tx_phy_lane_mode CVWL368.lib(drv_dsi_tx.o) - 0x0001526a 0x0001526a 0x00000064 Code RO 1928 i.drv_dsi_tx_phy_status_ready CVWL368.lib(drv_dsi_tx.o) - 0x000152ce 0x000152ce 0x0000003e Code RO 1929 i.drv_dsi_tx_phy_status_stopstate CVWL368.lib(drv_dsi_tx.o) - 0x0001530c 0x0001530c 0x00000134 Code RO 1931 i.drv_dsi_tx_phy_test_setup CVWL368.lib(drv_dsi_tx.o) - 0x00015440 0x00015440 0x0000001e Code RO 1932 i.drv_dsi_tx_phy_time_cfg CVWL368.lib(drv_dsi_tx.o) - 0x0001545e 0x0001545e 0x00000008 Code RO 1936 i.drv_dsi_tx_powerup CVWL368.lib(drv_dsi_tx.o) - 0x00015466 0x00015466 0x0000001c Code RO 1937 i.drv_dsi_tx_response_mode CVWL368.lib(drv_dsi_tx.o) - 0x00015482 0x00015482 0x00000018 Code RO 1940 i.drv_dsi_tx_set_bta_ack CVWL368.lib(drv_dsi_tx.o) - 0x0001549a 0x0001549a 0x0000000c Code RO 1941 i.drv_dsi_tx_set_esc_div CVWL368.lib(drv_dsi_tx.o) - 0x000154a6 0x000154a6 0x00000002 PAD - 0x000154a8 0x000154a8 0x00000040 Code RO 1942 i.drv_dsi_tx_set_int CVWL368.lib(drv_dsi_tx.o) - 0x000154e8 0x000154e8 0x00000010 Code RO 1943 i.drv_dsi_tx_set_time_out_div CVWL368.lib(drv_dsi_tx.o) - 0x000154f8 0x000154f8 0x00000008 Code RO 1944 i.drv_dsi_tx_set_video_chunk CVWL368.lib(drv_dsi_tx.o) - 0x00015500 0x00015500 0x00000022 Code RO 1945 i.drv_dsi_tx_set_video_timing CVWL368.lib(drv_dsi_tx.o) - 0x00015522 0x00015522 0x00000008 Code RO 1947 i.drv_dsi_tx_shutdown CVWL368.lib(drv_dsi_tx.o) - 0x0001552a 0x0001552a 0x00000026 Code RO 1948 i.drv_dsi_tx_timeout_cfg CVWL368.lib(drv_dsi_tx.o) - 0x00015550 0x00015550 0x000000aa Code RO 1951 i.drv_dsi_tx_video_mode_cfg CVWL368.lib(drv_dsi_tx.o) - 0x000155fa 0x000155fa 0x00000016 Code RO 1952 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL368.lib(drv_dsi_tx.o) - 0x00015610 0x00015610 0x00000018 Code RO 1953 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL368.lib(drv_dsi_tx.o) - 0x00015628 0x00015628 0x0000002e Code RO 2352 i.drv_efuse_enter_inactive CVWL368.lib(drv_efuse.o) - 0x00015656 0x00015656 0x0000000c Code RO 2355 i.drv_efuse_int_enable CVWL368.lib(drv_efuse.o) - 0x00015662 0x00015662 0x00000032 Code RO 2356 i.drv_efuse_read CVWL368.lib(drv_efuse.o) - 0x00015694 0x00015694 0x00000018 Code RO 2357 i.drv_efuse_read_req CVWL368.lib(drv_efuse.o) - 0x000156ac 0x000156ac 0x00000018 Code RO 1437 i.drv_gpio_get_input_data CVWL368.lib(drv_gpio.o) - 0x000156c4 0x000156c4 0x0000000c Code RO 1439 i.drv_gpio_register_ap_reset_callback CVWL368.lib(drv_gpio.o) - 0x000156d0 0x000156d0 0x00000014 Code RO 1440 i.drv_gpio_register_callback CVWL368.lib(drv_gpio.o) - 0x000156e4 0x000156e4 0x00000050 Code RO 1442 i.drv_gpio_set_int CVWL368.lib(drv_gpio.o) - 0x00015734 0x00015734 0x00000020 Code RO 1443 i.drv_gpio_set_ioe CVWL368.lib(drv_gpio.o) - 0x00015754 0x00015754 0x00000010 Code RO 1444 i.drv_gpio_set_mode0 CVWL368.lib(drv_gpio.o) - 0x00015764 0x00015764 0x00000010 Code RO 1445 i.drv_gpio_set_mode1 CVWL368.lib(drv_gpio.o) - 0x00015774 0x00015774 0x00000010 Code RO 1446 i.drv_gpio_set_mode2 CVWL368.lib(drv_gpio.o) - 0x00015784 0x00015784 0x00000010 Code RO 1447 i.drv_gpio_set_mode3 CVWL368.lib(drv_gpio.o) - 0x00015794 0x00015794 0x00000020 Code RO 734 i.drv_gpio_set_output_data CVWL368.lib(hal_gpio.o) - 0x000157b4 0x000157b4 0x00000130 Code RO 1448 i.drv_gpio_set_pull_state CVWL368.lib(drv_gpio.o) - 0x000158e4 0x000158e4 0x0000000c Code RO 1540 i.drv_i2c0_set_callback CVWL368.lib(drv_i2c_slave.o) - 0x000158f0 0x000158f0 0x0000000c Code RO 1506 i.drv_i2c1_set_callback CVWL368.lib(drv_i2c_master.o) - 0x000158fc 0x000158fc 0x00000034 Code RO 1480 i.drv_i2c_dma_callback CVWL368.lib(drv_i2c_dma.o) - 0x00015930 0x00015930 0x000000ac Code RO 1481 i.drv_i2c_dma_init CVWL368.lib(drv_i2c_dma.o) - 0x000159dc 0x000159dc 0x0000001a Code RO 1482 i.drv_i2c_enable_rx_dma CVWL368.lib(drv_i2c_dma.o) - 0x000159f6 0x000159f6 0x00000018 Code RO 1483 i.drv_i2c_enable_tx_dma CVWL368.lib(drv_i2c_dma.o) - 0x00015a0e 0x00015a0e 0x00000002 PAD - 0x00015a10 0x00015a10 0x00000060 Code RO 1508 i.drv_i2c_m_clear_it_pending_bit CVWL368.lib(drv_i2c_master.o) - 0x00015a70 0x00015a70 0x00000010 Code RO 1511 i.drv_i2c_m_enable CVWL368.lib(drv_i2c_master.o) - 0x00015a80 0x00015a80 0x00000038 Code RO 1512 i.drv_i2c_m_enable_intr CVWL368.lib(drv_i2c_master.o) - 0x00015ab8 0x00015ab8 0x0000008c Code RO 1518 i.drv_i2c_master_init CVWL368.lib(drv_i2c_master.o) - 0x00015b44 0x00015b44 0x0000005c Code RO 1484 i.drv_i2c_master_read_dma CVWL368.lib(drv_i2c_dma.o) - 0x00015ba0 0x00015ba0 0x0000003c Code RO 1485 i.drv_i2c_master_write_dma CVWL368.lib(drv_i2c_dma.o) - 0x00015bdc 0x00015bdc 0x0000003e Code RO 1486 i.drv_i2c_master_write_read_cmd CVWL368.lib(drv_i2c_dma.o) - 0x00015c1a 0x00015c1a 0x00000042 Code RO 1541 i.drv_i2c_s_clear_it_pending_bit CVWL368.lib(drv_i2c_slave.o) - 0x00015c5c 0x00015c5c 0x00000004 Code RO 1542 i.drv_i2c_s_config_intr CVWL368.lib(drv_i2c_slave.o) - 0x00015c60 0x00015c60 0x00000008 Code RO 1543 i.drv_i2c_s_enable CVWL368.lib(drv_i2c_slave.o) - 0x00015c68 0x00015c68 0x00000014 Code RO 1544 i.drv_i2c_s_get_fifo_status CVWL368.lib(drv_i2c_slave.o) - 0x00015c7c 0x00015c7c 0x00000050 Code RO 1547 i.drv_i2c_s_set_intr CVWL368.lib(drv_i2c_slave.o) - 0x00015ccc 0x00015ccc 0x0000001c Code RO 1548 i.drv_i2c_s_write_data CVWL368.lib(drv_i2c_slave.o) - 0x00015ce8 0x00015ce8 0x00000058 Code RO 1487 i.drv_i2c_set_dma_irq_callback CVWL368.lib(drv_i2c_dma.o) - 0x00015d40 0x00015d40 0x00000032 Code RO 1549 i.drv_i2c_slave_init CVWL368.lib(drv_i2c_slave.o) - 0x00015d72 0x00015d72 0x00000002 PAD - 0x00015d74 0x00015d74 0x00000018 Code RO 1488 i.drv_i2c_slave_write_dma CVWL368.lib(drv_i2c_dma.o) - 0x00015d8c 0x00015d8c 0x00000018 Code RO 2020 i.drv_lcdc_config_bypass CVWL368.lib(drv_lcdc.o) - 0x00015da4 0x00015da4 0x00000030 Code RO 2021 i.drv_lcdc_config_ccm CVWL368.lib(drv_lcdc.o) - 0x00015dd4 0x00015dd4 0x00000016 Code RO 2022 i.drv_lcdc_config_disp_mode CVWL368.lib(drv_lcdc.o) - 0x00015dea 0x00015dea 0x00000024 Code RO 2023 i.drv_lcdc_config_dpi_polarity CVWL368.lib(drv_lcdc.o) - 0x00015e0e 0x00015e0e 0x00000026 Code RO 2024 i.drv_lcdc_config_dpi_timing CVWL368.lib(drv_lcdc.o) - 0x00015e34 0x00015e34 0x00000016 Code RO 2025 i.drv_lcdc_config_edpi_mode CVWL368.lib(drv_lcdc.o) - 0x00015e4a 0x00015e4a 0x00000016 Code RO 2026 i.drv_lcdc_config_endianness CVWL368.lib(drv_lcdc.o) - 0x00015e60 0x00015e60 0x0000000c Code RO 2027 i.drv_lcdc_config_input_size CVWL368.lib(drv_lcdc.o) - 0x00015e6c 0x00015e6c 0x0000001e Code RO 2028 i.drv_lcdc_config_int CVWL368.lib(drv_lcdc.o) - 0x00015e8a 0x00015e8a 0x00000022 Code RO 2029 i.drv_lcdc_config_int_single CVWL368.lib(drv_lcdc.o) - 0x00015eac 0x00015eac 0x00000022 Code RO 2030 i.drv_lcdc_config_overwrite CVWL368.lib(drv_lcdc.o) - 0x00015ece 0x00015ece 0x0000000c Code RO 2031 i.drv_lcdc_config_overwrite_rgb CVWL368.lib(drv_lcdc.o) - 0x00015eda 0x00015eda 0x0000001a Code RO 2032 i.drv_lcdc_config_partial_display_area CVWL368.lib(drv_lcdc.o) - 0x00015ef4 0x00015ef4 0x00000022 Code RO 2033 i.drv_lcdc_config_partial_display_enable CVWL368.lib(drv_lcdc.o) - 0x00015f16 0x00015f16 0x0000001a Code RO 2035 i.drv_lcdc_config_scale_up_coef CVWL368.lib(drv_lcdc.o) - 0x00015f30 0x00015f30 0x0000000c Code RO 2036 i.drv_lcdc_config_scale_up_step CVWL368.lib(drv_lcdc.o) - 0x00015f3c 0x00015f3c 0x0000004c Code RO 2037 i.drv_lcdc_config_src_parameter CVWL368.lib(drv_lcdc.o) - 0x00015f88 0x00015f88 0x00000006 Code RO 2038 i.drv_lcdc_config_thresh CVWL368.lib(drv_lcdc.o) - 0x00015f8e 0x00015f8e 0x00000012 Code RO 2039 i.drv_lcdc_ctrl_flow CVWL368.lib(drv_lcdc.o) - 0x00015fa0 0x00015fa0 0x00000020 Code RO 2041 i.drv_lcdc_enable_shadow_reg CVWL368.lib(drv_lcdc.o) - 0x00015fc0 0x00015fc0 0x00000040 Code RO 2042 i.drv_lcdc_set_int CVWL368.lib(drv_lcdc.o) - 0x00016000 0x00016000 0x00000014 Code RO 2044 i.drv_lcdc_set_video_hw_mode CVWL368.lib(drv_lcdc.o) - 0x00016014 0x00016014 0x00000020 Code RO 2045 i.drv_lcdc_start CVWL368.lib(drv_lcdc.o) - 0x00016034 0x00016034 0x0000000c Code RO 2079 i.drv_memc_clear_status CVWL368.lib(drv_memc.o) - 0x00016040 0x00016040 0x00000040 Code RO 2080 i.drv_memc_enable_irq CVWL368.lib(drv_memc.o) - 0x00016080 0x00016080 0x0000000c Code RO 2081 i.drv_memc_gen_a_tear_signal CVWL368.lib(drv_memc.o) - 0x0001608c 0x0001608c 0x00000012 Code RO 2082 i.drv_memc_get_status CVWL368.lib(drv_memc.o) - 0x0001609e 0x0001609e 0x00000010 Code RO 2083 i.drv_memc_rate_transfer_sel CVWL368.lib(drv_memc.o) - 0x000160ae 0x000160ae 0x0000000e Code RO 2084 i.drv_memc_sel_vsync CVWL368.lib(drv_memc.o) - 0x000160bc 0x000160bc 0x00000014 Code RO 2085 i.drv_memc_set_active_height CVWL368.lib(drv_memc.o) - 0x000160d0 0x000160d0 0x0000000c Code RO 2086 i.drv_memc_set_data_mode CVWL368.lib(drv_memc.o) - 0x000160dc 0x000160dc 0x00000010 Code RO 2089 i.drv_memc_set_double_buffer CVWL368.lib(drv_memc.o) - 0x000160ec 0x000160ec 0x00000012 Code RO 2090 i.drv_memc_set_double_buffer_reverse CVWL368.lib(drv_memc.o) - 0x000160fe 0x000160fe 0x00000010 Code RO 2092 i.drv_memc_set_fs_en_conditions CVWL368.lib(drv_memc.o) - 0x0001610e 0x0001610e 0x00000014 Code RO 2093 i.drv_memc_set_inten CVWL368.lib(drv_memc.o) - 0x00016122 0x00016122 0x00000002 PAD - 0x00016124 0x00016124 0x00000018 Code RO 2094 i.drv_memc_set_lcdc_st_conditions CVWL368.lib(drv_memc.o) - 0x0001613c 0x0001613c 0x0000001a Code RO 2095 i.drv_memc_set_ltpo_mode CVWL368.lib(drv_memc.o) - 0x00016156 0x00016156 0x0000000e Code RO 2099 i.drv_memc_set_tear_mode CVWL368.lib(drv_memc.o) - 0x00016164 0x00016164 0x00000028 Code RO 2100 i.drv_memc_set_tear_waveform CVWL368.lib(drv_memc.o) - 0x0001618c 0x0001618c 0x0000000e Code RO 2102 i.drv_memc_set_vidc_sync_cnt CVWL368.lib(drv_memc.o) - 0x0001619a 0x0001619a 0x00000002 PAD - 0x0001619c 0x0001619c 0x00000008 Code RO 1566 i.drv_param_init_get_ccm CVWL368.lib(drv_param_init.o) - 0x000161a4 0x000161a4 0x00000014 Code RO 1567 i.drv_param_init_get_scld_filter_h CVWL368.lib(drv_param_init.o) - 0x000161b8 0x000161b8 0x00000014 Code RO 1568 i.drv_param_init_get_scld_filter_v CVWL368.lib(drv_param_init.o) - 0x000161cc 0x000161cc 0x00000008 Code RO 1569 i.drv_param_init_get_sclu_filter CVWL368.lib(drv_param_init.o) - 0x000161d4 0x000161d4 0x00000014 Code RO 1570 i.drv_param_init_set_ccm CVWL368.lib(drv_param_init.o) - 0x000161e8 0x000161e8 0x00000024 Code RO 1573 i.drv_param_p2r_filter_init CVWL368.lib(drv_param_init.o) - 0x0001620c 0x0001620c 0x00000010 Code RO 2373 i.drv_phy_enable_calibration CVWL368.lib(drv_phy_common.o) - 0x0001621c 0x0001621c 0x0000003c Code RO 2374 i.drv_phy_get_calibration CVWL368.lib(drv_phy_common.o) - 0x00016258 0x00016258 0x00000060 Code RO 2375 i.drv_phy_get_pll_para CVWL368.lib(drv_phy_common.o) - 0x000162b8 0x000162b8 0x00000054 Code RO 2376 i.drv_phy_get_rate_para CVWL368.lib(drv_phy_common.o) - 0x0001630c 0x0001630c 0x00000010 Code RO 2377 i.drv_phy_test_clear CVWL368.lib(drv_phy_common.o) - 0x0001631c 0x0001631c 0x00000018 Code RO 2378 i.drv_phy_test_lock CVWL368.lib(drv_phy_common.o) - 0x00016334 0x00016334 0x00000020 Code RO 2380 i.drv_phy_test_write_1_byte CVWL368.lib(drv_phy_common.o) - 0x00016354 0x00016354 0x00000026 Code RO 2381 i.drv_phy_test_write_2_byte CVWL368.lib(drv_phy_common.o) - 0x0001637a 0x0001637a 0x0000001e Code RO 2382 i.drv_phy_test_write_code CVWL368.lib(drv_phy_common.o) - 0x00016398 0x00016398 0x00000020 Code RO 2383 i.drv_phy_test_write_data CVWL368.lib(drv_phy_common.o) - 0x000163b8 0x000163b8 0x00000020 Code RO 1589 i.drv_pwr_set_cp_mode CVWL368.lib(drv_pwr.o) - 0x000163d8 0x000163d8 0x00000018 Code RO 1591 i.drv_pwr_set_pvd_mode CVWL368.lib(drv_pwr.o) - 0x000163f0 0x000163f0 0x00000038 Code RO 1592 i.drv_pwr_set_system_clk_src CVWL368.lib(drv_pwr.o) - 0x00016428 0x00016428 0x0000000c Code RO 1871 i.drv_rx_phy_test_clear CVWL368.lib(drv_dsi_rx.o) - 0x00016434 0x00016434 0x00000010 Code RO 1872 i.drv_rx_phy_test_lock CVWL368.lib(drv_dsi_rx.o) - 0x00016444 0x00016444 0x00000014 Code RO 1874 i.drv_rx_phy_test_write_1_byte CVWL368.lib(drv_dsi_rx.o) - 0x00016458 0x00016458 0x00000016 Code RO 1875 i.drv_rx_phy_test_write_2_byte CVWL368.lib(drv_dsi_rx.o) - 0x0001646e 0x0001646e 0x0000000a Code RO 2138 i.drv_rxbr_clear_pkt_buffer CVWL368.lib(drv_rxbr.o) - 0x00016478 0x00016478 0x00000004 Code RO 2139 i.drv_rxbr_clear_status0 CVWL368.lib(drv_rxbr.o) - 0x0001647c 0x0001647c 0x0000005a Code RO 2141 i.drv_rxbr_enable_irq CVWL368.lib(drv_rxbr.o) - 0x000164d6 0x000164d6 0x00000002 PAD - 0x000164d8 0x000164d8 0x00000014 Code RO 2142 i.drv_rxbr_frame_drop_cfg CVWL368.lib(drv_rxbr.o) - 0x000164ec 0x000164ec 0x00000064 Code RO 2143 i.drv_rxbr_get_clk CVWL368.lib(drv_rxbr.o) - 0x00016550 0x00016550 0x00000004 Code RO 2144 i.drv_rxbr_get_col_addr CVWL368.lib(drv_rxbr.o) - 0x00016554 0x00016554 0x00000012 Code RO 1751 i.drv_rxbr_get_int_source CVWL368.lib(hal_internal_vsync.o) - 0x00016566 0x00016566 0x00000004 Code RO 2147 i.drv_rxbr_get_page_addr CVWL368.lib(drv_rxbr.o) - 0x0001656a 0x0001656a 0x00000012 Code RO 1752 i.drv_rxbr_get_status0 CVWL368.lib(hal_internal_vsync.o) - 0x0001657c 0x0001657c 0x0000000c Code RO 2149 i.drv_rxbr_hline_rcv0_cfg CVWL368.lib(drv_rxbr.o) - 0x00016588 0x00016588 0x00000008 Code RO 2150 i.drv_rxbr_hline_rcv_cfg CVWL368.lib(drv_rxbr.o) - 0x00016590 0x00016590 0x0000000c Code RO 2151 i.drv_rxbr_register_irq0_callback CVWL368.lib(drv_rxbr.o) - 0x0001659c 0x0001659c 0x0000000c Code RO 2152 i.drv_rxbr_register_irq1_callback CVWL368.lib(drv_rxbr.o) - 0x000165a8 0x000165a8 0x00000014 Code RO 2153 i.drv_rxbr_set_ack_pkt_header CVWL368.lib(drv_rxbr.o) - 0x000165bc 0x000165bc 0x000000cc Code RO 2154 i.drv_rxbr_set_cmd_filter CVWL368.lib(drv_rxbr.o) - 0x00016688 0x00016688 0x00000014 Code RO 2156 i.drv_rxbr_set_color_format CVWL368.lib(drv_rxbr.o) - 0x0001669c 0x0001669c 0x00000014 Code RO 2158 i.drv_rxbr_set_inten CVWL368.lib(drv_rxbr.o) - 0x000166b0 0x000166b0 0x00000010 Code RO 2159 i.drv_rxbr_set_ltpo_drop_th CVWL368.lib(drv_rxbr.o) - 0x000166c0 0x000166c0 0x00000026 Code RO 2161 i.drv_rxbr_set_usr_cfg CVWL368.lib(drv_rxbr.o) - 0x000166e6 0x000166e6 0x00000008 Code RO 2162 i.drv_rxbr_set_usr_col CVWL368.lib(drv_rxbr.o) - 0x000166ee 0x000166ee 0x00000008 Code RO 2163 i.drv_rxbr_set_usr_row CVWL368.lib(drv_rxbr.o) - 0x000166f6 0x000166f6 0x00000002 PAD - 0x000166f8 0x000166f8 0x00000020 Code RO 1637 i.drv_spi_m_read_data CVWL368.lib(drv_spi_master.o) - 0x00016718 0x00016718 0x0000001c Code RO 1662 i.drv_swire_enable CVWL368.lib(drv_swire.o) - 0x00016734 0x00016734 0x00000054 Code RO 1665 i.drv_swire_set_int CVWL368.lib(drv_swire.o) - 0x00016788 0x00016788 0x0000001c Code RO 1666 i.drv_swire_set_power_down CVWL368.lib(drv_swire.o) - 0x000167a4 0x000167a4 0x0000000c Code RO 1681 i.drv_sys_cfg_clear_all_int CVWL368.lib(drv_sys_cfg.o) - 0x000167b0 0x000167b0 0x00000028 Code RO 1682 i.drv_sys_cfg_clear_pending CVWL368.lib(drv_sys_cfg.o) - 0x000167d8 0x000167d8 0x00000018 Code RO 1685 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL368.lib(drv_sys_cfg.o) - 0x000167f0 0x000167f0 0x0000001c Code RO 1686 i.drv_sys_cfg_sel_ap_rst_trig CVWL368.lib(drv_sys_cfg.o) - 0x0001680c 0x0001680c 0x00000024 Code RO 1687 i.drv_sys_cfg_sel_gpio_group CVWL368.lib(drv_sys_cfg.o) - 0x00016830 0x00016830 0x00000024 Code RO 1688 i.drv_sys_cfg_sel_int_trig CVWL368.lib(drv_sys_cfg.o) - 0x00016854 0x00016854 0x00000010 Code RO 1690 i.drv_sys_cfg_set_dma_rx_req CVWL368.lib(drv_sys_cfg.o) - 0x00016864 0x00016864 0x00000010 Code RO 1691 i.drv_sys_cfg_set_dma_tx_req CVWL368.lib(drv_sys_cfg.o) - 0x00016874 0x00016874 0x00000024 Code RO 1692 i.drv_sys_cfg_set_int CVWL368.lib(drv_sys_cfg.o) - 0x00016898 0x00016898 0x0000001a Code RO 1715 i.drv_timer_clear_status_flags CVWL368.lib(drv_timer.o) - 0x000168b2 0x000168b2 0x00000020 Code RO 1716 i.drv_timer_enable CVWL368.lib(drv_timer.o) - 0x000168d2 0x000168d2 0x00000002 PAD - 0x000168d4 0x000168d4 0x00000010 Code RO 1717 i.drv_timer_get_instance CVWL368.lib(drv_timer.o) - 0x000168e4 0x000168e4 0x00000010 Code RO 1718 i.drv_timer_get_prescaler CVWL368.lib(drv_timer.o) - 0x000168f4 0x000168f4 0x00000044 Code RO 1720 i.drv_timer_handle_interrupt CVWL368.lib(drv_timer.o) - 0x00016938 0x00016938 0x00000014 Code RO 1721 i.drv_timer_register_callback CVWL368.lib(drv_timer.o) - 0x0001694c 0x0001694c 0x00000010 Code RO 1722 i.drv_timer_set_compare_val CVWL368.lib(drv_timer.o) - 0x0001695c 0x0001695c 0x00000054 Code RO 1723 i.drv_timer_set_int CVWL368.lib(drv_timer.o) - 0x000169b0 0x000169b0 0x00000028 Code RO 1724 i.drv_timer_set_prescaler CVWL368.lib(drv_timer.o) - 0x000169d8 0x000169d8 0x00000010 Code RO 1725 i.drv_timer_set_repeat CVWL368.lib(drv_timer.o) - 0x000169e8 0x000169e8 0x0000000a Code RO 1954 i.drv_tx_phy_test_clear CVWL368.lib(drv_dsi_tx.o) - 0x000169f2 0x000169f2 0x0000001c Code RO 1955 i.drv_tx_phy_test_enter CVWL368.lib(drv_dsi_tx.o) - 0x00016a0e 0x00016a0e 0x0000001c Code RO 1956 i.drv_tx_phy_test_exit CVWL368.lib(drv_dsi_tx.o) - 0x00016a2a 0x00016a2a 0x00000012 Code RO 1958 i.drv_tx_phy_test_write_1_byte CVWL368.lib(drv_dsi_tx.o) - 0x00016a3c 0x00016a3c 0x00000014 Code RO 1959 i.drv_tx_phy_test_write_2_byte CVWL368.lib(drv_dsi_tx.o) - 0x00016a50 0x00016a50 0x00000010 Code RO 1960 i.drv_tx_phy_test_write_code CVWL368.lib(drv_dsi_tx.o) - 0x00016a60 0x00016a60 0x00000008 Code RO 2202 i.drv_vidc_clear_irq CVWL368.lib(drv_vidc.o) - 0x00016a68 0x00016a68 0x00000018 Code RO 2206 i.drv_vidc_enable CVWL368.lib(drv_vidc.o) - 0x00016a80 0x00016a80 0x00000040 Code RO 2207 i.drv_vidc_enable_irq CVWL368.lib(drv_vidc.o) - 0x00016ac0 0x00016ac0 0x00000012 Code RO 2209 i.drv_vidc_get_irq_status CVWL368.lib(drv_vidc.o) - 0x00016ad2 0x00016ad2 0x00000002 PAD - 0x00016ad4 0x00016ad4 0x00000028 Code RO 2213 i.drv_vidc_init_module_enable CVWL368.lib(drv_vidc.o) - 0x00016afc 0x00016afc 0x0000000c Code RO 2214 i.drv_vidc_register_callback CVWL368.lib(drv_vidc.o) - 0x00016b08 0x00016b08 0x00000006 Code RO 2215 i.drv_vidc_reset CVWL368.lib(drv_vidc.o) - 0x00016b0e 0x00016b0e 0x0000003c Code RO 2217 i.drv_vidc_set_dst_parameter CVWL368.lib(drv_vidc.o) - 0x00016b4a 0x00016b4a 0x00000014 Code RO 2221 i.drv_vidc_set_irqen CVWL368.lib(drv_vidc.o) - 0x00016b5e 0x00016b5e 0x00000010 Code RO 2222 i.drv_vidc_set_mirror CVWL368.lib(drv_vidc.o) - 0x00016b6e 0x00016b6e 0x00000008 Code RO 2225 i.drv_vidc_set_p2r_hcoef0 CVWL368.lib(drv_vidc.o) - 0x00016b76 0x00016b76 0x00000026 Code RO 2226 i.drv_vidc_set_p2r_hinitb CVWL368.lib(drv_vidc.o) - 0x00016b9c 0x00016b9c 0x00000026 Code RO 2227 i.drv_vidc_set_p2r_hinitr CVWL368.lib(drv_vidc.o) - 0x00016bc2 0x00016bc2 0x00000002 PAD - 0x00016bc4 0x00016bc4 0x00000018 Code RO 2228 i.drv_vidc_set_pentile_swap CVWL368.lib(drv_vidc.o) - 0x00016bdc 0x00016bdc 0x0000000a Code RO 2229 i.drv_vidc_set_pu_ctrl CVWL368.lib(drv_vidc.o) - 0x00016be6 0x00016be6 0x00000010 Code RO 2230 i.drv_vidc_set_rotation CVWL368.lib(drv_vidc.o) - 0x00016bf6 0x00016bf6 0x0000000a Code RO 2231 i.drv_vidc_set_scld_hcoef0 CVWL368.lib(drv_vidc.o) - 0x00016c00 0x00016c00 0x0000000a Code RO 2232 i.drv_vidc_set_scld_hcoef1 CVWL368.lib(drv_vidc.o) - 0x00016c0a 0x00016c0a 0x00000012 Code RO 2233 i.drv_vidc_set_scld_step CVWL368.lib(drv_vidc.o) - 0x00016c1c 0x00016c1c 0x0000000a Code RO 2234 i.drv_vidc_set_scld_vcoef0 CVWL368.lib(drv_vidc.o) - 0x00016c26 0x00016c26 0x0000000a Code RO 2235 i.drv_vidc_set_scld_vcoef1 CVWL368.lib(drv_vidc.o) - 0x00016c30 0x00016c30 0x00000016 Code RO 2236 i.drv_vidc_set_src_parameter CVWL368.lib(drv_vidc.o) - 0x00016c46 0x00016c46 0x00000002 PAD - 0x00016c48 0x00016c48 0x00000010 Code RO 2651 i.drv_wdg_clear_counter CVWL368.lib(drv_wdg.o) - 0x00016c58 0x00016c58 0x00000010 Code RO 2652 i.drv_wdg_clear_edge_flag CVWL368.lib(drv_wdg.o) - 0x00016c68 0x00016c68 0x00000010 Code RO 2655 i.drv_wdg_read_edge_flag CVWL368.lib(drv_wdg.o) - 0x00016c78 0x00016c78 0x00000040 Code RO 2658 i.drv_wdg_set_int CVWL368.lib(drv_wdg.o) - 0x00016cb8 0x00016cb8 0x0000000a Code RO 1349 i.fls_clr_interrupt_flag CVWL368.lib(drv_fls.o) - 0x00016cc2 0x00016cc2 0x00000014 Code RO 943 i.fputc CVWL368.lib(tau_log.o) - 0x00016cd6 0x00016cd6 0x00000002 PAD - 0x00016cd8 0x00016cd8 0x00000034 Code RO 537 i.hal_dsi_rx_ctrl_create_handle CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x00016d0c 0x00016d0c 0x0000009c Code RO 539 i.hal_dsi_rx_ctrl_deinit CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x00016da8 0x00016da8 0x00000084 Code RO 541 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x00016e2c 0x00016e2c 0x00000028 Code RO 543 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x00016e54 0x00016e54 0x00000028 Code RO 545 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x00016e7c 0x00016e7c 0x00000060 Code RO 547 i.hal_dsi_rx_ctrl_init CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x00016edc 0x00016edc 0x000001a4 Code RO 548 i.hal_dsi_rx_ctrl_init_clk CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x00017080 0x00017080 0x000000d8 Code RO 549 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x00017158 0x00017158 0x00000158 Code RO 550 i.hal_dsi_rx_ctrl_init_memc CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x000172b0 0x000172b0 0x00000148 Code RO 551 i.hal_dsi_rx_ctrl_init_rxbr CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x000173f8 0x000173f8 0x0000022c Code RO 552 i.hal_dsi_rx_ctrl_init_vidc CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x00017624 0x00017624 0x000000f0 Code RO 556 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x00017714 0x00017714 0x00000034 Code RO 560 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x00017748 0x00017748 0x00000034 Code RO 563 i.hal_dsi_rx_ctrl_set_hw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x0001777c 0x0001777c 0x00000038 Code RO 564 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x000177b4 0x000177b4 0x00000072 Code RO 569 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x00017826 0x00017826 0x00000002 PAD - 0x00017828 0x00017828 0x00000034 Code RO 570 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x0001785c 0x0001785c 0x0000003c Code RO 573 i.hal_dsi_rx_ctrl_start CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x00017898 0x00017898 0x0000003c Code RO 574 i.hal_dsi_rx_ctrl_stop CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x000178d4 0x000178d4 0x00000020 Code RO 576 i.hal_dsi_rx_ctrl_toggle_resolution CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x000178f4 0x000178f4 0x00000190 Code RO 630 i.hal_dsi_tx_calc_video_chunks CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00017a84 0x00017a84 0x00000034 Code RO 631 i.hal_dsi_tx_config_params_for_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00017ab8 0x00017ab8 0x00000450 Code RO 632 i.hal_dsi_tx_count_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00017f08 0x00017f08 0x00000094 Code RO 633 i.hal_dsi_tx_crop_pic CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00017f9c 0x00017f9c 0x0000002c Code RO 635 i.hal_dsi_tx_ctrl_create_handle CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00017fc8 0x00017fc8 0x00000084 Code RO 636 i.hal_dsi_tx_ctrl_deinit CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x0001804c 0x0001804c 0x0000004c Code RO 640 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00018098 0x00018098 0x00000028 Code RO 642 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x000180c0 0x000180c0 0x000000a4 Code RO 644 i.hal_dsi_tx_ctrl_init CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00018164 0x00018164 0x00000024 Code RO 645 i.hal_dsi_tx_ctrl_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00018188 0x00018188 0x0000000c Code RO 646 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00018194 0x00018194 0x00000020 Code RO 649 i.hal_dsi_tx_ctrl_set_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x000181b4 0x000181b4 0x00000014 Code RO 655 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x000181c8 0x000181c8 0x00000010 Code RO 656 i.hal_dsi_tx_ctrl_set_partial_disp CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x000181d8 0x000181d8 0x00000024 Code RO 657 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x000181fc 0x000181fc 0x0000009c Code RO 660 i.hal_dsi_tx_ctrl_start CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00018298 0x00018298 0x00000044 Code RO 661 i.hal_dsi_tx_ctrl_stop CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x000182dc 0x000182dc 0x000000d8 Code RO 662 i.hal_dsi_tx_ctrl_write_array_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x000183b4 0x000183b4 0x000000b0 Code RO 663 i.hal_dsi_tx_ctrl_write_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00018464 0x00018464 0x00000044 Code RO 664 i.hal_dsi_tx_init_data_mode CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x000184a8 0x000184a8 0x00000030 Code RO 665 i.hal_dsi_tx_init_dpi_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x000184d8 0x000184d8 0x00000020 Code RO 666 i.hal_dsi_tx_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x000184f8 0x000184f8 0x00000020 Code RO 667 i.hal_dsi_tx_init_phy_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00018518 0x00018518 0x00000094 Code RO 668 i.hal_dsi_tx_init_remains CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x000185ac 0x000185ac 0x00000058 Code RO 669 i.hal_dsi_tx_init_video_mode CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00018604 0x00018604 0x00000044 Code RO 670 i.hal_dsi_tx_send_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00018648 0x00018648 0x00000018 Code RO 735 i.hal_gpio_ctrl_eint CVWL368.lib(hal_gpio.o) - 0x00018660 0x00018660 0x00000012 Code RO 736 i.hal_gpio_get_input_data CVWL368.lib(hal_gpio.o) - 0x00018672 0x00018672 0x00000002 PAD - 0x00018674 0x00018674 0x00000040 Code RO 739 i.hal_gpio_init_eint CVWL368.lib(hal_gpio.o) - 0x000186b4 0x000186b4 0x00000020 Code RO 740 i.hal_gpio_init_input CVWL368.lib(hal_gpio.o) - 0x000186d4 0x000186d4 0x00000028 Code RO 741 i.hal_gpio_init_output CVWL368.lib(hal_gpio.o) - 0x000186fc 0x000186fc 0x00000018 Code RO 742 i.hal_gpio_reg_eint_cb CVWL368.lib(hal_gpio.o) - 0x00018714 0x00018714 0x00000050 Code RO 743 i.hal_gpio_set_ap_reset_int CVWL368.lib(hal_gpio.o) - 0x00018764 0x00018764 0x00000060 Code RO 745 i.hal_gpio_set_mode CVWL368.lib(hal_gpio.o) - 0x000187c4 0x000187c4 0x00000008 Code RO 746 i.hal_gpio_set_output_data CVWL368.lib(hal_gpio.o) - 0x000187cc 0x000187cc 0x00000020 Code RO 748 i.hal_gpio_set_pull_state CVWL368.lib(hal_gpio.o) - 0x000187ec 0x000187ec 0x0000006c Code RO 774 i.hal_i2c_m_dma_init CVWL368.lib(hal_i2c_master.o) - 0x00018858 0x00018858 0x00000020 Code RO 775 i.hal_i2c_m_dma_read CVWL368.lib(hal_i2c_master.o) - 0x00018878 0x00018878 0x0000001c Code RO 776 i.hal_i2c_m_dma_write CVWL368.lib(hal_i2c_master.o) - 0x00018894 0x00018894 0x0000000c Code RO 778 i.hal_i2c_m_transfer_complate CVWL368.lib(hal_i2c_master.o) - 0x000188a0 0x000188a0 0x00000020 Code RO 779 i.hal_i2c_master_irq_callback CVWL368.lib(hal_i2c_master.o) - 0x000188c0 0x000188c0 0x00000010 Code RO 793 i.hal_i2c_s_dma_user_callback CVWL368.lib(hal_i2c_slave.o) - 0x000188d0 0x000188d0 0x0000004c Code RO 794 i.hal_i2c_s_dma_write CVWL368.lib(hal_i2c_slave.o) - 0x0001891c 0x0001891c 0x000000c8 Code RO 796 i.hal_i2c_s_init CVWL368.lib(hal_i2c_slave.o) - 0x000189e4 0x000189e4 0x00000014 Code RO 797 i.hal_i2c_s_nonblocking_read CVWL368.lib(hal_i2c_slave.o) - 0x000189f8 0x000189f8 0x0000000c Code RO 805 i.hal_i2c_s_set_transfer CVWL368.lib(hal_i2c_slave.o) - 0x00018a04 0x00018a04 0x00000174 Code RO 808 i.hal_i2c_slave_irq_callback CVWL368.lib(hal_i2c_slave.o) - 0x00018b78 0x00018b78 0x000000fc Code RO 1753 i.hal_internal_init_memc CVWL368.lib(hal_internal_vsync.o) - 0x00018c74 0x00018c74 0x00000010 Code RO 1755 i.hal_internal_sync_get_fb_setting CVWL368.lib(hal_internal_vsync.o) - 0x00018c84 0x00018c84 0x00000010 Code RO 1756 i.hal_internal_sync_get_hight_performan_mode CVWL368.lib(hal_internal_vsync.o) - 0x00018c94 0x00018c94 0x0000022c Code RO 1757 i.hal_internal_sync_input_resolution_change CVWL368.lib(hal_internal_vsync.o) - 0x00018ec0 0x00018ec0 0x00000010 Code RO 1760 i.hal_internal_update_dpi_param CVWL368.lib(hal_internal_vsync.o) - 0x00018ed0 0x00018ed0 0x0000010c Code RO 1761 i.hal_internal_video_mode_auto_sync CVWL368.lib(hal_internal_vsync.o) - 0x00018fdc 0x00018fdc 0x00000028 Code RO 1762 i.hal_internal_vsync_deinit CVWL368.lib(hal_internal_vsync.o) - 0x00019004 0x00019004 0x0000000c Code RO 1763 i.hal_internal_vsync_get_rx_state CVWL368.lib(hal_internal_vsync.o) - 0x00019010 0x00019010 0x00000018 Code RO 1764 i.hal_internal_vsync_get_sync_line CVWL368.lib(hal_internal_vsync.o) - 0x00019028 0x00019028 0x0000000c Code RO 1765 i.hal_internal_vsync_get_tear_mode CVWL368.lib(hal_internal_vsync.o) - 0x00019034 0x00019034 0x0000000c Code RO 1766 i.hal_internal_vsync_get_tx_state CVWL368.lib(hal_internal_vsync.o) - 0x00019040 0x00019040 0x00000118 Code RO 1767 i.hal_internal_vsync_init_rx CVWL368.lib(hal_internal_vsync.o) - 0x00019158 0x00019158 0x000000b0 Code RO 1768 i.hal_internal_vsync_init_tx CVWL368.lib(hal_internal_vsync.o) - 0x00019208 0x00019208 0x0000011c Code RO 1769 i.hal_internal_vsync_set_auto_hw_filter CVWL368.lib(hal_internal_vsync.o) - 0x00019324 0x00019324 0x00000014 Code RO 1771 i.hal_internal_vsync_set_rx_state CVWL368.lib(hal_internal_vsync.o) - 0x00019338 0x00019338 0x00000024 Code RO 1772 i.hal_internal_vsync_set_sync_line CVWL368.lib(hal_internal_vsync.o) - 0x0001935c 0x0001935c 0x00000050 Code RO 1773 i.hal_internal_vsync_set_tear_mode CVWL368.lib(hal_internal_vsync.o) - 0x000193ac 0x000193ac 0x00000080 Code RO 1774 i.hal_internal_vsync_set_tx_state CVWL368.lib(hal_internal_vsync.o) - 0x0001942c 0x0001942c 0x00000030 Code RO 1776 i.hal_internal_vsync_update_lcdc_addr CVWL368.lib(hal_internal_vsync.o) - 0x0001945c 0x0001945c 0x00000024 Code RO 671 i.hal_lcdc_config_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00019480 0x00019480 0x00000058 Code RO 672 i.hal_lcdc_config_remains CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x000194d8 0x000194d8 0x00000014 Code RO 673 i.hal_lcdc_config_rgb_to_pentile CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x000194ec 0x000194ec 0x00000164 Code RO 674 i.hal_lcdc_config_upscaler CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00019650 0x00019650 0x00000040 Code RO 675 i.hal_lcdc_init_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00019690 0x00019690 0x000001b0 Code RO 676 i.hal_lcdc_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00019840 0x00019840 0x00000040 Code RO 677 i.hal_lcdc_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00019880 0x00019880 0x0000000e Code RO 833 i.hal_spi_m_clear_rxfifo CVWL368.lib(hal_spi_master.o) - 0x0001988e 0x0001988e 0x00000012 Code RO 857 i.hal_swire_deinit CVWL368.lib(hal_swire.o) - 0x000198a0 0x000198a0 0x00000016 Code RO 859 i.hal_swire_open CVWL368.lib(hal_swire.o) - 0x000198b6 0x000198b6 0x00000008 Code RO 874 i.hal_system_enable_systick CVWL368.lib(hal_system.o) - 0x000198be 0x000198be 0x00000002 PAD - 0x000198c0 0x000198c0 0x00000088 Code RO 882 i.hal_system_init CVWL368.lib(hal_system.o) - 0x00019948 0x00019948 0x0000001c Code RO 883 i.hal_system_init_console CVWL368.lib(hal_system.o) - 0x00019964 0x00019964 0x00000008 Code RO 886 i.hal_system_set_phy_calibration CVWL368.lib(hal_system.o) - 0x0001996c 0x0001996c 0x00000008 Code RO 887 i.hal_system_set_pvd CVWL368.lib(hal_system.o) - 0x00019974 0x00019974 0x00000008 Code RO 888 i.hal_system_set_vcc CVWL368.lib(hal_system.o) - 0x0001997c 0x0001997c 0x0000002e Code RO 915 i.hal_timer_deinit CVWL368.lib(hal_timer.o) - 0x000199aa 0x000199aa 0x0000001a Code RO 917 i.hal_timer_init CVWL368.lib(hal_timer.o) - 0x000199c4 0x000199c4 0x00000048 Code RO 919 i.hal_timer_start CVWL368.lib(hal_timer.o) - 0x00019a0c 0x00019a0c 0x00000028 Code RO 921 i.hal_timer_stop CVWL368.lib(hal_timer.o) - 0x00019a34 0x00019a34 0x0000008c Code RO 1074 i.hal_uart_init CVWL368.lib(hal_uart.o) - 0x00019ac0 0x00019ac0 0x00000010 Code RO 1077 i.hal_uart_transmit_blocking CVWL368.lib(hal_uart.o) - 0x00019ad0 0x00019ad0 0x00000110 Code RO 2312 i.handle_init CVWL368.lib(irq_redirect .o) - 0x00019be0 0x00019be0 0x00000074 Code RO 98 i.init_mipi_tx ap_demo.o - 0x00019c54 0x00019c54 0x00000100 Code RO 99 i.init_panel ap_demo.o - 0x00019d54 0x00019d54 0x0000000a Code RO 3 i.main main.o - 0x00019d5e 0x00019d5e 0x00000002 PAD - 0x00019d60 0x00019d60 0x00000084 Code RO 100 i.open_mipi_rx ap_demo.o - 0x00019de4 0x00019de4 0x0000007c Code RO 101 i.pps_update_handle ap_demo.o - 0x00019e60 0x00019e60 0x000003f4 Code RO 1778 i.rx_get_dcs_packet_data CVWL368.lib(hal_internal_vsync.o) - 0x0001a254 0x0001a254 0x00000178 Code RO 1779 i.rx_partial_update CVWL368.lib(hal_internal_vsync.o) - 0x0001a3cc 0x0001a3cc 0x0000008c Code RO 1780 i.rx_receive_packet CVWL368.lib(hal_internal_vsync.o) - 0x0001a458 0x0001a458 0x00000180 Code RO 1781 i.rx_receive_pps CVWL368.lib(hal_internal_vsync.o) - 0x0001a5d8 0x0001a5d8 0x000000a4 Code RO 1782 i.rxbr_irq0_callback CVWL368.lib(hal_internal_vsync.o) - 0x0001a67c 0x0001a67c 0x000001d4 Code RO 1783 i.rxbr_irq1_callback CVWL368.lib(hal_internal_vsync.o) - 0x0001a850 0x0001a850 0x000000c4 Code RO 1784 i.soft_gen_te CVWL368.lib(hal_internal_vsync.o) - 0x0001a914 0x0001a914 0x000000c0 Code RO 1785 i.soft_gen_te_double_buffer CVWL368.lib(hal_internal_vsync.o) - 0x0001a9d4 0x0001a9d4 0x0000002c Code RO 102 i.soft_te_timer_cb ap_demo.o - 0x0001aa00 0x0001aa00 0x00000040 Code RO 103 i.soft_timer3_cb ap_demo.o - 0x0001aa40 0x0001aa40 0x00000048 Code RO 2678 i.sqrt m_ps.l(sqrt.o) - 0x0001aa88 0x0001aa88 0x00000070 Code RO 104 i.tp_heartbeat_exec ap_demo.o - 0x0001aaf8 0x0001aaf8 0x00000108 Code RO 1786 i.vidc_callback CVWL368.lib(hal_internal_vsync.o) - 0x0001ac00 0x0001ac00 0x000000d0 Code RO 1787 i.vpre_err_reset CVWL368.lib(hal_internal_vsync.o) - 0x0001acd0 0x0001acd0 0x000001cc Code RO 1788 i.vsync_set_te_mode CVWL368.lib(hal_internal_vsync.o) - 0x0001ae9c 0x0001ae9c 0x00002944 Data RO 105 .constdata ap_demo.o - 0x0001d7e0 0x0001d7e0 0x00000020 Data RO 420 .constdata app_tp_st_touch.o - 0x0001d800 0x0001d800 0x00000024 Data RO 679 .constdata CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x0001d824 0x0001d824 0x000000d2 Data RO 751 .constdata CVWL368.lib(hal_gpio.o) - 0x0001d8f6 0x0001d8f6 0x00000002 PAD - 0x0001d8f8 0x0001d8f8 0x00000020 Data RO 809 .constdata CVWL368.lib(hal_i2c_slave.o) - 0x0001d918 0x0001d918 0x00000d59 Data RO 957 .constdata ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) - 0x0001e671 0x0001e671 0x00000001 Data RO 963 .constdata ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) - 0x0001e672 0x0001e672 0x00000002 PAD - 0x0001e674 0x0001e674 0x00000008 Data RO 1574 .constdata CVWL368.lib(drv_param_init.o) - 0x0001e67c 0x0001e67c 0x00000186 Data RO 2384 .constdata CVWL368.lib(drv_phy_common.o) - 0x0001e802 0x0001e802 0x00000002 PAD - 0x0001e804 0x0001e804 0x0000004c Data RO 106 .conststring ap_demo.o - 0x0001e850 0x0001e850 0x00000048 Data RO 579 .conststring CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x0001e898 0x0001e898 0x00000043 Data RO 680 .conststring CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x0001e8db 0x0001e8db 0x00000001 PAD - 0x0001e8dc 0x0001e8dc 0x00000134 Data RO 1790 .conststring CVWL368.lib(hal_internal_vsync.o) - 0x0001ea10 0x0001ea10 0x00000030 Data RO 3040 Region$$Table anon$$obj.o + 0x00011fdc 0x00011fdc 0x000002c4 Code RO 88 i.ap_demo ap_demo.o + 0x000122a0 0x000122a0 0x0000002c Code RO 89 i.ap_get_reg_53 ap_demo.o + 0x000122cc 0x000122cc 0x00000054 Code RO 90 i.ap_get_reg_7A ap_demo.o + 0x00012320 0x00012320 0x000000c4 Code RO 91 i.ap_get_reg_df ap_demo.o + 0x000123e4 0x000123e4 0x00000020 Code RO 406 i.ap_get_tp_calibration_status_01 app_tp_st_touch.o + 0x00012404 0x00012404 0x00000044 Code RO 92 i.ap_reset_cb ap_demo.o + 0x00012448 0x00012448 0x00000044 Code RO 93 i.ap_set_backlight_51 ap_demo.o + 0x0001248c 0x0001248c 0x00000048 Code RO 94 i.ap_set_display_off ap_demo.o + 0x000124d4 0x000124d4 0x00000038 Code RO 95 i.ap_set_display_on ap_demo.o + 0x0001250c 0x0001250c 0x00000078 Code RO 96 i.ap_set_enter_sleep_mode ap_demo.o + 0x00012584 0x00012584 0x00000048 Code RO 97 i.ap_set_exit_sleep_mode ap_demo.o + 0x000125cc 0x000125cc 0x00000098 Code RO 407 i.ap_set_tp_calibration_04 app_tp_st_touch.o + 0x00012664 0x00012664 0x000000b0 Code RO 408 i.ap_tp_st_touch_calibration app_tp_st_touch.o + 0x00012714 0x00012714 0x000000a8 Code RO 411 i.ap_tp_st_touch_get_calibration_success_mark app_tp_st_touch.o + 0x000127bc 0x000127bc 0x0000001c Code RO 413 i.ap_tp_st_touch_scan_point_init app_tp_st_touch.o + 0x000127d8 0x000127d8 0x00000050 Code RO 415 i.ap_tp_st_touch_scan_point_record_event_exec app_tp_st_touch.o + 0x00012828 0x00012828 0x00000034 Code RO 416 i.ap_tp_st_touch_simulate_finger_release_event app_tp_st_touch.o + 0x0001285c 0x0001285c 0x000000ac Code RO 417 i.ap_tp_st_touch_software_reset app_tp_st_touch.o + 0x00012908 0x00012908 0x0000001c Code RO 2136 i.app_ADC_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00012924 0x00012924 0x00000024 Code RO 1428 i.app_AP_NRESET_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012948 0x00012948 0x0000001c Code RO 1429 i.app_EXTI_INT0_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012964 0x00012964 0x0000001c Code RO 1430 i.app_EXTI_INT1_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012980 0x00012980 0x0000001c Code RO 1431 i.app_EXTI_INT2_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x0001299c 0x0001299c 0x0000001c Code RO 1432 i.app_EXTI_INT3_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000129b8 0x000129b8 0x0000001c Code RO 1433 i.app_EXTI_INT4_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000129d4 0x000129d4 0x0000001c Code RO 1434 i.app_EXTI_INT5_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000129f0 0x000129f0 0x0000001c Code RO 1435 i.app_EXTI_INT6_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012a0c 0x00012a0c 0x0000001c Code RO 1436 i.app_EXTI_INT7_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012a28 0x00012a28 0x00000048 Code RO 1175 i.app_HardFault_Handler CVWL368.lib(drv_common.o) + 0x00012a70 0x00012a70 0x00000018 Code RO 1539 i.app_I2C0_IRQn_Handler CVWL368.lib(drv_i2c_slave.o) + 0x00012a88 0x00012a88 0x00000010 Code RO 1505 i.app_I2C1_IRQn_Handler CVWL368.lib(drv_i2c_master.o) + 0x00012a98 0x00012a98 0x000001a4 Code RO 1746 i.app_LCDC_IRQn_Handler CVWL368.lib(hal_internal_vsync.o) + 0x00012c3c 0x00012c3c 0x00000088 Code RO 2078 i.app_MEMC_IRQn_Handler CVWL368.lib(drv_memc.o) + 0x00012cc4 0x00012cc4 0x00000298 Code RO 1850 i.app_MIPI_RX_IRQn_Handler CVWL368.lib(drv_dsi_rx.o) + 0x00012f5c 0x00012f5c 0x000000a0 Code RO 1906 i.app_MIPI_TX_IRQn_Handler CVWL368.lib(drv_dsi_tx.o) + 0x00012ffc 0x00012ffc 0x00000048 Code RO 2498 i.app_PWMDET_IRQn_Handler CVWL368.lib(drv_pwm.o) + 0x00013044 0x00013044 0x00000030 Code RO 1629 i.app_SPIM_IRQn_Handler CVWL368.lib(drv_spi_master.o) + 0x00013074 0x00013074 0x00000200 Code RO 2431 i.app_SPIS_IRQn_Handler CVWL368.lib(hal_spi_slave.o) + 0x00013274 0x00013274 0x00000020 Code RO 1661 i.app_SWIRE_IRQn_Handler CVWL368.lib(drv_swire.o) + 0x00013294 0x00013294 0x00000018 Code RO 1176 i.app_SysTick_Handler CVWL368.lib(drv_common.o) + 0x000132ac 0x000132ac 0x0000000a Code RO 1711 i.app_TIMER0_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000132b6 0x000132b6 0x0000000a Code RO 1712 i.app_TIMER1_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000132c0 0x000132c0 0x0000000a Code RO 1713 i.app_TIMER2_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000132ca 0x000132ca 0x0000000a Code RO 1714 i.app_TIMER3_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000132d4 0x000132d4 0x00000008 Code RO 2591 i.app_UART_IRQn_Handler CVWL368.lib(drv_uart.o) + 0x000132dc 0x000132dc 0x0000001c Code RO 2201 i.app_VIDC_IRQn_Handler CVWL368.lib(drv_vidc.o) + 0x000132f8 0x000132f8 0x0000001c Code RO 2137 i.app_VPRE_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00013314 0x00013314 0x00000038 Code RO 2650 i.app_WDG_IRQn_Handler CVWL368.lib(drv_wdg.o) + 0x0001334c 0x0001334c 0x00000010 Code RO 1290 i.app_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x0001335c 0x0001335c 0x00000030 Code RO 1091 i.app_fls_ctrl_Handler CVWL368.lib(norflash.o) + 0x0001338c 0x0001338c 0x00000024 Code RO 254 i.app_tp_I2C_init app_tp_transfer.o + 0x000133b0 0x000133b0 0x000000a8 Code RO 418 i.app_tp_calibration_exec app_tp_st_touch.o + 0x00013458 0x00013458 0x0000009c Code RO 255 i.app_tp_i2cs_callback app_tp_transfer.o + 0x000134f4 0x000134f4 0x00000044 Code RO 256 i.app_tp_init app_tp_transfer.o + 0x00013538 0x00013538 0x00000020 Code RO 257 i.app_tp_m_read app_tp_transfer.o + 0x00013558 0x00013558 0x00000008 Code RO 259 i.app_tp_m_write app_tp_transfer.o + 0x00013560 0x00013560 0x000004c0 Code RO 953 i.app_tp_phone_analysis_data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00013a20 0x00013a20 0x00000008 Code RO 262 i.app_tp_s_read app_tp_transfer.o + 0x00013a28 0x00013a28 0x00000008 Code RO 264 i.app_tp_s_write app_tp_transfer.o + 0x00013a30 0x00013a30 0x00000474 Code RO 955 i.app_tp_screen_analysis_int ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00013ea4 0x00013ea4 0x00000030 Code RO 265 i.app_tp_screen_init app_tp_transfer.o + 0x00013ed4 0x00013ed4 0x0000000c Code RO 266 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00013ee0 0x00013ee0 0x00000040 Code RO 267 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00013f20 0x00013f20 0x0000010c Code RO 268 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x0001402c 0x0001402c 0x00000014 Code RO 269 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x00014040 0x00014040 0x00000024 Code RO 508 i.board_Init board.o + 0x00014064 0x00014064 0x000004f0 Code RO 1747 i.calc_framebuffer_setting CVWL368.lib(hal_internal_vsync.o) + 0x00014554 0x00014554 0x000000c8 Code RO 2674 i.ceil m_ps.l(ceil.o) + 0x0001461c 0x0001461c 0x0000002c Code RO 1748 i.check_mipi_rx_tx_video_info CVWL368.lib(hal_internal_vsync.o) + 0x00014648 0x00014648 0x00000094 Code RO 1749 i.check_pkt_buf_rev CVWL368.lib(hal_internal_vsync.o) + 0x000146dc 0x000146dc 0x00000058 Code RO 1837 i.dcs_packet_fifo_alloc CVWL368.lib(dcs_packet_fifo.o) + 0x00014734 0x00014734 0x00000018 Code RO 1838 i.dcs_packet_fifo_init CVWL368.lib(dcs_packet_fifo.o) + 0x0001474c 0x0001474c 0x00000044 Code RO 1839 i.dcs_packet_free_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x00014790 0x00014790 0x00000024 Code RO 1840 i.dcs_packet_get_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x000147b4 0x000147b4 0x0000001c Code RO 1750 i.dcs_sw_filter CVWL368.lib(hal_internal_vsync.o) + 0x000147d0 0x000147d0 0x00000018 Code RO 933 i.delayMs CVWL368.lib(tau_delay.o) + 0x000147e8 0x000147e8 0x00000022 Code RO 934 i.delayUs CVWL368.lib(tau_delay.o) + 0x0001480a 0x0001480a 0x00000002 PAD + 0x0001480c 0x0001480c 0x00000038 Code RO 1680 i.drv_ap_rst_trig_edge_detect CVWL368.lib(drv_sys_cfg.o) + 0x00014844 0x00014844 0x0000000c Code RO 2401 i.drv_chip_info_get_info CVWL368.lib(drv_chip_info.o) + 0x00014850 0x00014850 0x00000040 Code RO 2402 i.drv_chip_info_init CVWL368.lib(drv_chip_info.o) + 0x00014890 0x00014890 0x000000b0 Code RO 2403 i.drv_chip_rx_info_check CVWL368.lib(drv_chip_info.o) + 0x00014940 0x00014940 0x00000014 Code RO 2404 i.drv_chip_rx_init_done CVWL368.lib(drv_chip_info.o) + 0x00014954 0x00014954 0x00000058 Code RO 1178 i.drv_common_enable_systick CVWL368.lib(drv_common.o) + 0x000149ac 0x000149ac 0x00000008 Code RO 1181 i.drv_common_system_init CVWL368.lib(drv_common.o) + 0x000149b4 0x000149b4 0x00000010 Code RO 1203 i.drv_crgu_config_reset_modules CVWL368.lib(drv_crgu.o) + 0x000149c4 0x000149c4 0x00000014 Code RO 1216 i.drv_crgu_set_ahb_pre_div CVWL368.lib(drv_crgu.o) + 0x000149d8 0x000149d8 0x00000014 Code RO 1217 i.drv_crgu_set_ahb_src CVWL368.lib(drv_crgu.o) + 0x000149ec 0x000149ec 0x00000020 Code RO 1220 i.drv_crgu_set_clock CVWL368.lib(drv_crgu.o) + 0x00014a0c 0x00014a0c 0x00000014 Code RO 1221 i.drv_crgu_set_dpi_mux_src CVWL368.lib(drv_crgu.o) + 0x00014a20 0x00014a20 0x00000018 Code RO 1222 i.drv_crgu_set_dpi_pre_div CVWL368.lib(drv_crgu.o) + 0x00014a38 0x00014a38 0x00000014 Code RO 1223 i.drv_crgu_set_dpi_pre_src CVWL368.lib(drv_crgu.o) + 0x00014a4c 0x00014a4c 0x00000014 Code RO 1224 i.drv_crgu_set_dsc_core_div CVWL368.lib(drv_crgu.o) + 0x00014a60 0x00014a60 0x00000014 Code RO 1225 i.drv_crgu_set_dsco_src CVWL368.lib(drv_crgu.o) + 0x00014a74 0x00014a74 0x00000014 Code RO 1226 i.drv_crgu_set_dsco_src_div CVWL368.lib(drv_crgu.o) + 0x00014a88 0x00014a88 0x00000014 Code RO 1227 i.drv_crgu_set_fb_div CVWL368.lib(drv_crgu.o) + 0x00014a9c 0x00014a9c 0x00000014 Code RO 1228 i.drv_crgu_set_fb_src CVWL368.lib(drv_crgu.o) + 0x00014ab0 0x00014ab0 0x00000014 Code RO 1231 i.drv_crgu_set_lcdc_div CVWL368.lib(drv_crgu.o) + 0x00014ac4 0x00014ac4 0x00000014 Code RO 1232 i.drv_crgu_set_lcdc_src CVWL368.lib(drv_crgu.o) + 0x00014ad8 0x00014ad8 0x00000014 Code RO 1233 i.drv_crgu_set_mipi_cfg_src CVWL368.lib(drv_crgu.o) + 0x00014aec 0x00014aec 0x00000018 Code RO 1234 i.drv_crgu_set_mipi_ref_src CVWL368.lib(drv_crgu.o) + 0x00014b04 0x00014b04 0x00000018 Code RO 1237 i.drv_crgu_set_reset CVWL368.lib(drv_crgu.o) + 0x00014b1c 0x00014b1c 0x00000014 Code RO 1238 i.drv_crgu_set_rxbr_div CVWL368.lib(drv_crgu.o) + 0x00014b30 0x00014b30 0x00000014 Code RO 1239 i.drv_crgu_set_rxbr_src CVWL368.lib(drv_crgu.o) + 0x00014b44 0x00014b44 0x00000014 Code RO 1241 i.drv_crgu_set_vidc_src CVWL368.lib(drv_crgu.o) + 0x00014b58 0x00014b58 0x00000018 Code RO 1294 i.drv_dma_clear_flag CVWL368.lib(drv_dma.o) + 0x00014b70 0x00014b70 0x0000001c Code RO 1295 i.drv_dma_create_handle CVWL368.lib(drv_dma.o) + 0x00014b8c 0x00014b8c 0x00000010 Code RO 1297 i.drv_dma_disenable_channel CVWL368.lib(drv_dma.o) + 0x00014b9c 0x00014b9c 0x00000010 Code RO 1299 i.drv_dma_enable_channel CVWL368.lib(drv_dma.o) + 0x00014bac 0x00014bac 0x00000024 Code RO 1300 i.drv_dma_enable_channel_interrupts CVWL368.lib(drv_dma.o) + 0x00014bd0 0x00014bd0 0x0000000c Code RO 1302 i.drv_dma_get_channel_flag CVWL368.lib(drv_dma.o) + 0x00014bdc 0x00014bdc 0x00000090 Code RO 1305 i.drv_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00014c6c 0x00014c6c 0x00000012 Code RO 1307 i.drv_dma_prepar_transfer CVWL368.lib(drv_dma.o) + 0x00014c7e 0x00014c7e 0x0000001a Code RO 1309 i.drv_dma_set_burst CVWL368.lib(drv_dma.o) + 0x00014c98 0x00014c98 0x00000006 Code RO 1310 i.drv_dma_set_callback CVWL368.lib(drv_dma.o) + 0x00014c9e 0x00014c9e 0x00000002 PAD + 0x00014ca0 0x00014ca0 0x00000044 Code RO 1312 i.drv_dma_set_transfer CVWL368.lib(drv_dma.o) + 0x00014ce4 0x00014ce4 0x00000036 Code RO 2414 i.drv_dsc_dec_convert_pps_rc_parameter CVWL368.lib(drv_dsc_dec.o) + 0x00014d1a 0x00014d1a 0x0000000c Code RO 2415 i.drv_dsc_dec_disable CVWL368.lib(drv_dsc_dec.o) + 0x00014d26 0x00014d26 0x00000002 PAD + 0x00014d28 0x00014d28 0x00000074 Code RO 2416 i.drv_dsc_dec_enable CVWL368.lib(drv_dsc_dec.o) + 0x00014d9c 0x00014d9c 0x0000000a Code RO 2417 i.drv_dsc_dec_get_nslc CVWL368.lib(drv_dsc_dec.o) + 0x00014da6 0x00014da6 0x00000028 Code RO 2419 i.drv_dsc_dec_set_u8_pps CVWL368.lib(drv_dsc_dec.o) + 0x00014dce 0x00014dce 0x00000002 PAD + 0x00014dd0 0x00014dd0 0x00000104 Code RO 1851 i.drv_dsi_rx_calc_ipi_tx_delay CVWL368.lib(drv_dsi_rx.o) + 0x00014ed4 0x00014ed4 0x00000040 Code RO 1852 i.drv_dsi_rx_enable_irq CVWL368.lib(drv_dsi_rx.o) + 0x00014f14 0x00014f14 0x00000050 Code RO 1853 i.drv_dsi_rx_get_color_bpp CVWL368.lib(drv_dsi_rx.o) + 0x00014f64 0x00014f64 0x0000001c Code RO 1854 i.drv_dsi_rx_get_color_pcc CVWL368.lib(drv_dsi_rx.o) + 0x00014f80 0x00014f80 0x00000008 Code RO 1855 i.drv_dsi_rx_get_compression_en CVWL368.lib(drv_dsi_rx.o) + 0x00014f88 0x00014f88 0x00000006 Code RO 1856 i.drv_dsi_rx_get_max_ret_size CVWL368.lib(drv_dsi_rx.o) + 0x00014f8e 0x00014f8e 0x0000000e Code RO 1860 i.drv_dsi_rx_power_up CVWL368.lib(drv_dsi_rx.o) + 0x00014f9c 0x00014f9c 0x00000020 Code RO 1861 i.drv_dsi_rx_set_ctrl_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014fbc 0x00014fbc 0x00000010 Code RO 1862 i.drv_dsi_rx_set_ddi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014fcc 0x00014fcc 0x00000004 Code RO 1864 i.drv_dsi_rx_set_inten CVWL368.lib(drv_dsi_rx.o) + 0x00014fd0 0x00014fd0 0x00000010 Code RO 1865 i.drv_dsi_rx_set_ipi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014fe0 0x00014fe0 0x00000046 Code RO 1867 i.drv_dsi_rx_set_lane_swap CVWL368.lib(drv_dsi_rx.o) + 0x00015026 0x00015026 0x00000026 Code RO 1868 i.drv_dsi_rx_set_resp_cnt CVWL368.lib(drv_dsi_rx.o) + 0x0001504c 0x0001504c 0x00000104 Code RO 1869 i.drv_dsi_rx_set_up_phy CVWL368.lib(drv_dsi_rx.o) + 0x00015150 0x00015150 0x0000000e Code RO 1870 i.drv_dsi_rx_shut_down CVWL368.lib(drv_dsi_rx.o) + 0x0001515e 0x0001515e 0x00000014 Code RO 1908 i.drv_dsi_tx_command_header CVWL368.lib(drv_dsi_tx.o) + 0x00015172 0x00015172 0x0000006c Code RO 1909 i.drv_dsi_tx_command_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x000151de 0x000151de 0x00000004 Code RO 1910 i.drv_dsi_tx_command_put_payload CVWL368.lib(drv_dsi_tx.o) + 0x000151e2 0x000151e2 0x00000018 Code RO 1911 i.drv_dsi_tx_config_eotp CVWL368.lib(drv_dsi_tx.o) + 0x000151fa 0x000151fa 0x00000008 Code RO 1912 i.drv_dsi_tx_config_int CVWL368.lib(drv_dsi_tx.o) + 0x00015202 0x00015202 0x00000008 Code RO 1913 i.drv_dsi_tx_dpi_lpcmd_time CVWL368.lib(drv_dsi_tx.o) + 0x0001520a 0x0001520a 0x0000000a Code RO 1914 i.drv_dsi_tx_dpi_mode CVWL368.lib(drv_dsi_tx.o) + 0x00015214 0x00015214 0x00000024 Code RO 1915 i.drv_dsi_tx_dpi_polarity CVWL368.lib(drv_dsi_tx.o) + 0x00015238 0x00015238 0x00000004 Code RO 1916 i.drv_dsi_tx_edpi_cmd_size CVWL368.lib(drv_dsi_tx.o) + 0x0001523c 0x0001523c 0x00000004 Code RO 1918 i.drv_dsi_tx_get_cmd_status CVWL368.lib(drv_dsi_tx.o) + 0x00015240 0x00015240 0x00000004 Code RO 1920 i.drv_dsi_tx_mode CVWL368.lib(drv_dsi_tx.o) + 0x00015244 0x00015244 0x00000018 Code RO 1921 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL368.lib(drv_dsi_tx.o) + 0x0001525c 0x0001525c 0x0000001a Code RO 1922 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL368.lib(drv_dsi_tx.o) + 0x00015276 0x00015276 0x0000000c Code RO 1924 i.drv_dsi_tx_phy_lane_mode CVWL368.lib(drv_dsi_tx.o) + 0x00015282 0x00015282 0x00000064 Code RO 1928 i.drv_dsi_tx_phy_status_ready CVWL368.lib(drv_dsi_tx.o) + 0x000152e6 0x000152e6 0x0000003e Code RO 1929 i.drv_dsi_tx_phy_status_stopstate CVWL368.lib(drv_dsi_tx.o) + 0x00015324 0x00015324 0x00000134 Code RO 1931 i.drv_dsi_tx_phy_test_setup CVWL368.lib(drv_dsi_tx.o) + 0x00015458 0x00015458 0x0000001e Code RO 1932 i.drv_dsi_tx_phy_time_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00015476 0x00015476 0x00000008 Code RO 1936 i.drv_dsi_tx_powerup CVWL368.lib(drv_dsi_tx.o) + 0x0001547e 0x0001547e 0x0000001c Code RO 1937 i.drv_dsi_tx_response_mode CVWL368.lib(drv_dsi_tx.o) + 0x0001549a 0x0001549a 0x00000018 Code RO 1940 i.drv_dsi_tx_set_bta_ack CVWL368.lib(drv_dsi_tx.o) + 0x000154b2 0x000154b2 0x0000000c Code RO 1941 i.drv_dsi_tx_set_esc_div CVWL368.lib(drv_dsi_tx.o) + 0x000154be 0x000154be 0x00000002 PAD + 0x000154c0 0x000154c0 0x00000040 Code RO 1942 i.drv_dsi_tx_set_int CVWL368.lib(drv_dsi_tx.o) + 0x00015500 0x00015500 0x00000010 Code RO 1943 i.drv_dsi_tx_set_time_out_div CVWL368.lib(drv_dsi_tx.o) + 0x00015510 0x00015510 0x00000008 Code RO 1944 i.drv_dsi_tx_set_video_chunk CVWL368.lib(drv_dsi_tx.o) + 0x00015518 0x00015518 0x00000022 Code RO 1945 i.drv_dsi_tx_set_video_timing CVWL368.lib(drv_dsi_tx.o) + 0x0001553a 0x0001553a 0x00000008 Code RO 1947 i.drv_dsi_tx_shutdown CVWL368.lib(drv_dsi_tx.o) + 0x00015542 0x00015542 0x00000026 Code RO 1948 i.drv_dsi_tx_timeout_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00015568 0x00015568 0x000000aa Code RO 1951 i.drv_dsi_tx_video_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00015612 0x00015612 0x00000016 Code RO 1952 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL368.lib(drv_dsi_tx.o) + 0x00015628 0x00015628 0x00000018 Code RO 1953 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL368.lib(drv_dsi_tx.o) + 0x00015640 0x00015640 0x0000002e Code RO 2352 i.drv_efuse_enter_inactive CVWL368.lib(drv_efuse.o) + 0x0001566e 0x0001566e 0x0000000c Code RO 2355 i.drv_efuse_int_enable CVWL368.lib(drv_efuse.o) + 0x0001567a 0x0001567a 0x00000032 Code RO 2356 i.drv_efuse_read CVWL368.lib(drv_efuse.o) + 0x000156ac 0x000156ac 0x00000018 Code RO 2357 i.drv_efuse_read_req CVWL368.lib(drv_efuse.o) + 0x000156c4 0x000156c4 0x00000018 Code RO 1437 i.drv_gpio_get_input_data CVWL368.lib(drv_gpio.o) + 0x000156dc 0x000156dc 0x0000000c Code RO 1439 i.drv_gpio_register_ap_reset_callback CVWL368.lib(drv_gpio.o) + 0x000156e8 0x000156e8 0x00000014 Code RO 1440 i.drv_gpio_register_callback CVWL368.lib(drv_gpio.o) + 0x000156fc 0x000156fc 0x00000050 Code RO 1442 i.drv_gpio_set_int CVWL368.lib(drv_gpio.o) + 0x0001574c 0x0001574c 0x00000020 Code RO 1443 i.drv_gpio_set_ioe CVWL368.lib(drv_gpio.o) + 0x0001576c 0x0001576c 0x00000010 Code RO 1444 i.drv_gpio_set_mode0 CVWL368.lib(drv_gpio.o) + 0x0001577c 0x0001577c 0x00000010 Code RO 1445 i.drv_gpio_set_mode1 CVWL368.lib(drv_gpio.o) + 0x0001578c 0x0001578c 0x00000010 Code RO 1446 i.drv_gpio_set_mode2 CVWL368.lib(drv_gpio.o) + 0x0001579c 0x0001579c 0x00000010 Code RO 1447 i.drv_gpio_set_mode3 CVWL368.lib(drv_gpio.o) + 0x000157ac 0x000157ac 0x00000020 Code RO 734 i.drv_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x000157cc 0x000157cc 0x00000130 Code RO 1448 i.drv_gpio_set_pull_state CVWL368.lib(drv_gpio.o) + 0x000158fc 0x000158fc 0x0000000c Code RO 1540 i.drv_i2c0_set_callback CVWL368.lib(drv_i2c_slave.o) + 0x00015908 0x00015908 0x0000000c Code RO 1506 i.drv_i2c1_set_callback CVWL368.lib(drv_i2c_master.o) + 0x00015914 0x00015914 0x00000034 Code RO 1480 i.drv_i2c_dma_callback CVWL368.lib(drv_i2c_dma.o) + 0x00015948 0x00015948 0x000000ac Code RO 1481 i.drv_i2c_dma_init CVWL368.lib(drv_i2c_dma.o) + 0x000159f4 0x000159f4 0x0000001a Code RO 1482 i.drv_i2c_enable_rx_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015a0e 0x00015a0e 0x00000018 Code RO 1483 i.drv_i2c_enable_tx_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015a26 0x00015a26 0x00000002 PAD + 0x00015a28 0x00015a28 0x00000060 Code RO 1508 i.drv_i2c_m_clear_it_pending_bit CVWL368.lib(drv_i2c_master.o) + 0x00015a88 0x00015a88 0x00000010 Code RO 1511 i.drv_i2c_m_enable CVWL368.lib(drv_i2c_master.o) + 0x00015a98 0x00015a98 0x00000038 Code RO 1512 i.drv_i2c_m_enable_intr CVWL368.lib(drv_i2c_master.o) + 0x00015ad0 0x00015ad0 0x0000008c Code RO 1518 i.drv_i2c_master_init CVWL368.lib(drv_i2c_master.o) + 0x00015b5c 0x00015b5c 0x0000005c Code RO 1484 i.drv_i2c_master_read_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015bb8 0x00015bb8 0x0000003c Code RO 1485 i.drv_i2c_master_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015bf4 0x00015bf4 0x0000003e Code RO 1486 i.drv_i2c_master_write_read_cmd CVWL368.lib(drv_i2c_dma.o) + 0x00015c32 0x00015c32 0x00000042 Code RO 1541 i.drv_i2c_s_clear_it_pending_bit CVWL368.lib(drv_i2c_slave.o) + 0x00015c74 0x00015c74 0x00000004 Code RO 1542 i.drv_i2c_s_config_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015c78 0x00015c78 0x00000008 Code RO 1543 i.drv_i2c_s_enable CVWL368.lib(drv_i2c_slave.o) + 0x00015c80 0x00015c80 0x00000014 Code RO 1544 i.drv_i2c_s_get_fifo_status CVWL368.lib(drv_i2c_slave.o) + 0x00015c94 0x00015c94 0x00000050 Code RO 1547 i.drv_i2c_s_set_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015ce4 0x00015ce4 0x0000001c Code RO 1548 i.drv_i2c_s_write_data CVWL368.lib(drv_i2c_slave.o) + 0x00015d00 0x00015d00 0x00000058 Code RO 1487 i.drv_i2c_set_dma_irq_callback CVWL368.lib(drv_i2c_dma.o) + 0x00015d58 0x00015d58 0x00000032 Code RO 1549 i.drv_i2c_slave_init CVWL368.lib(drv_i2c_slave.o) + 0x00015d8a 0x00015d8a 0x00000002 PAD + 0x00015d8c 0x00015d8c 0x00000018 Code RO 1488 i.drv_i2c_slave_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015da4 0x00015da4 0x00000018 Code RO 2020 i.drv_lcdc_config_bypass CVWL368.lib(drv_lcdc.o) + 0x00015dbc 0x00015dbc 0x00000030 Code RO 2021 i.drv_lcdc_config_ccm CVWL368.lib(drv_lcdc.o) + 0x00015dec 0x00015dec 0x00000016 Code RO 2022 i.drv_lcdc_config_disp_mode CVWL368.lib(drv_lcdc.o) + 0x00015e02 0x00015e02 0x00000024 Code RO 2023 i.drv_lcdc_config_dpi_polarity CVWL368.lib(drv_lcdc.o) + 0x00015e26 0x00015e26 0x00000026 Code RO 2024 i.drv_lcdc_config_dpi_timing CVWL368.lib(drv_lcdc.o) + 0x00015e4c 0x00015e4c 0x00000016 Code RO 2025 i.drv_lcdc_config_edpi_mode CVWL368.lib(drv_lcdc.o) + 0x00015e62 0x00015e62 0x00000016 Code RO 2026 i.drv_lcdc_config_endianness CVWL368.lib(drv_lcdc.o) + 0x00015e78 0x00015e78 0x0000000c Code RO 2027 i.drv_lcdc_config_input_size CVWL368.lib(drv_lcdc.o) + 0x00015e84 0x00015e84 0x0000001e Code RO 2028 i.drv_lcdc_config_int CVWL368.lib(drv_lcdc.o) + 0x00015ea2 0x00015ea2 0x00000022 Code RO 2029 i.drv_lcdc_config_int_single CVWL368.lib(drv_lcdc.o) + 0x00015ec4 0x00015ec4 0x00000022 Code RO 2030 i.drv_lcdc_config_overwrite CVWL368.lib(drv_lcdc.o) + 0x00015ee6 0x00015ee6 0x0000000c Code RO 2031 i.drv_lcdc_config_overwrite_rgb CVWL368.lib(drv_lcdc.o) + 0x00015ef2 0x00015ef2 0x0000001a Code RO 2032 i.drv_lcdc_config_partial_display_area CVWL368.lib(drv_lcdc.o) + 0x00015f0c 0x00015f0c 0x00000022 Code RO 2033 i.drv_lcdc_config_partial_display_enable CVWL368.lib(drv_lcdc.o) + 0x00015f2e 0x00015f2e 0x0000001a Code RO 2035 i.drv_lcdc_config_scale_up_coef CVWL368.lib(drv_lcdc.o) + 0x00015f48 0x00015f48 0x0000000c Code RO 2036 i.drv_lcdc_config_scale_up_step CVWL368.lib(drv_lcdc.o) + 0x00015f54 0x00015f54 0x0000004c Code RO 2037 i.drv_lcdc_config_src_parameter CVWL368.lib(drv_lcdc.o) + 0x00015fa0 0x00015fa0 0x00000006 Code RO 2038 i.drv_lcdc_config_thresh CVWL368.lib(drv_lcdc.o) + 0x00015fa6 0x00015fa6 0x00000012 Code RO 2039 i.drv_lcdc_ctrl_flow CVWL368.lib(drv_lcdc.o) + 0x00015fb8 0x00015fb8 0x00000020 Code RO 2041 i.drv_lcdc_enable_shadow_reg CVWL368.lib(drv_lcdc.o) + 0x00015fd8 0x00015fd8 0x00000040 Code RO 2042 i.drv_lcdc_set_int CVWL368.lib(drv_lcdc.o) + 0x00016018 0x00016018 0x00000014 Code RO 2044 i.drv_lcdc_set_video_hw_mode CVWL368.lib(drv_lcdc.o) + 0x0001602c 0x0001602c 0x00000020 Code RO 2045 i.drv_lcdc_start CVWL368.lib(drv_lcdc.o) + 0x0001604c 0x0001604c 0x0000000c Code RO 2079 i.drv_memc_clear_status CVWL368.lib(drv_memc.o) + 0x00016058 0x00016058 0x00000040 Code RO 2080 i.drv_memc_enable_irq CVWL368.lib(drv_memc.o) + 0x00016098 0x00016098 0x0000000c Code RO 2081 i.drv_memc_gen_a_tear_signal CVWL368.lib(drv_memc.o) + 0x000160a4 0x000160a4 0x00000012 Code RO 2082 i.drv_memc_get_status CVWL368.lib(drv_memc.o) + 0x000160b6 0x000160b6 0x00000010 Code RO 2083 i.drv_memc_rate_transfer_sel CVWL368.lib(drv_memc.o) + 0x000160c6 0x000160c6 0x0000000e Code RO 2084 i.drv_memc_sel_vsync CVWL368.lib(drv_memc.o) + 0x000160d4 0x000160d4 0x00000014 Code RO 2085 i.drv_memc_set_active_height CVWL368.lib(drv_memc.o) + 0x000160e8 0x000160e8 0x0000000c Code RO 2086 i.drv_memc_set_data_mode CVWL368.lib(drv_memc.o) + 0x000160f4 0x000160f4 0x00000010 Code RO 2089 i.drv_memc_set_double_buffer CVWL368.lib(drv_memc.o) + 0x00016104 0x00016104 0x00000012 Code RO 2090 i.drv_memc_set_double_buffer_reverse CVWL368.lib(drv_memc.o) + 0x00016116 0x00016116 0x00000010 Code RO 2092 i.drv_memc_set_fs_en_conditions CVWL368.lib(drv_memc.o) + 0x00016126 0x00016126 0x00000014 Code RO 2093 i.drv_memc_set_inten CVWL368.lib(drv_memc.o) + 0x0001613a 0x0001613a 0x00000002 PAD + 0x0001613c 0x0001613c 0x00000018 Code RO 2094 i.drv_memc_set_lcdc_st_conditions CVWL368.lib(drv_memc.o) + 0x00016154 0x00016154 0x0000001a Code RO 2095 i.drv_memc_set_ltpo_mode CVWL368.lib(drv_memc.o) + 0x0001616e 0x0001616e 0x0000000e Code RO 2099 i.drv_memc_set_tear_mode CVWL368.lib(drv_memc.o) + 0x0001617c 0x0001617c 0x00000028 Code RO 2100 i.drv_memc_set_tear_waveform CVWL368.lib(drv_memc.o) + 0x000161a4 0x000161a4 0x0000000e Code RO 2102 i.drv_memc_set_vidc_sync_cnt CVWL368.lib(drv_memc.o) + 0x000161b2 0x000161b2 0x00000002 PAD + 0x000161b4 0x000161b4 0x00000008 Code RO 1566 i.drv_param_init_get_ccm CVWL368.lib(drv_param_init.o) + 0x000161bc 0x000161bc 0x00000014 Code RO 1567 i.drv_param_init_get_scld_filter_h CVWL368.lib(drv_param_init.o) + 0x000161d0 0x000161d0 0x00000014 Code RO 1568 i.drv_param_init_get_scld_filter_v CVWL368.lib(drv_param_init.o) + 0x000161e4 0x000161e4 0x00000008 Code RO 1569 i.drv_param_init_get_sclu_filter CVWL368.lib(drv_param_init.o) + 0x000161ec 0x000161ec 0x00000014 Code RO 1570 i.drv_param_init_set_ccm CVWL368.lib(drv_param_init.o) + 0x00016200 0x00016200 0x00000024 Code RO 1573 i.drv_param_p2r_filter_init CVWL368.lib(drv_param_init.o) + 0x00016224 0x00016224 0x00000010 Code RO 2373 i.drv_phy_enable_calibration CVWL368.lib(drv_phy_common.o) + 0x00016234 0x00016234 0x0000003c Code RO 2374 i.drv_phy_get_calibration CVWL368.lib(drv_phy_common.o) + 0x00016270 0x00016270 0x00000060 Code RO 2375 i.drv_phy_get_pll_para CVWL368.lib(drv_phy_common.o) + 0x000162d0 0x000162d0 0x00000054 Code RO 2376 i.drv_phy_get_rate_para CVWL368.lib(drv_phy_common.o) + 0x00016324 0x00016324 0x00000010 Code RO 2377 i.drv_phy_test_clear CVWL368.lib(drv_phy_common.o) + 0x00016334 0x00016334 0x00000018 Code RO 2378 i.drv_phy_test_lock CVWL368.lib(drv_phy_common.o) + 0x0001634c 0x0001634c 0x00000020 Code RO 2380 i.drv_phy_test_write_1_byte CVWL368.lib(drv_phy_common.o) + 0x0001636c 0x0001636c 0x00000026 Code RO 2381 i.drv_phy_test_write_2_byte CVWL368.lib(drv_phy_common.o) + 0x00016392 0x00016392 0x0000001e Code RO 2382 i.drv_phy_test_write_code CVWL368.lib(drv_phy_common.o) + 0x000163b0 0x000163b0 0x00000020 Code RO 2383 i.drv_phy_test_write_data CVWL368.lib(drv_phy_common.o) + 0x000163d0 0x000163d0 0x00000020 Code RO 1589 i.drv_pwr_set_cp_mode CVWL368.lib(drv_pwr.o) + 0x000163f0 0x000163f0 0x00000018 Code RO 1591 i.drv_pwr_set_pvd_mode CVWL368.lib(drv_pwr.o) + 0x00016408 0x00016408 0x00000038 Code RO 1592 i.drv_pwr_set_system_clk_src CVWL368.lib(drv_pwr.o) + 0x00016440 0x00016440 0x0000000c Code RO 1871 i.drv_rx_phy_test_clear CVWL368.lib(drv_dsi_rx.o) + 0x0001644c 0x0001644c 0x00000010 Code RO 1872 i.drv_rx_phy_test_lock CVWL368.lib(drv_dsi_rx.o) + 0x0001645c 0x0001645c 0x00000014 Code RO 1874 i.drv_rx_phy_test_write_1_byte CVWL368.lib(drv_dsi_rx.o) + 0x00016470 0x00016470 0x00000016 Code RO 1875 i.drv_rx_phy_test_write_2_byte CVWL368.lib(drv_dsi_rx.o) + 0x00016486 0x00016486 0x0000000a Code RO 2138 i.drv_rxbr_clear_pkt_buffer CVWL368.lib(drv_rxbr.o) + 0x00016490 0x00016490 0x00000004 Code RO 2139 i.drv_rxbr_clear_status0 CVWL368.lib(drv_rxbr.o) + 0x00016494 0x00016494 0x0000005a Code RO 2141 i.drv_rxbr_enable_irq CVWL368.lib(drv_rxbr.o) + 0x000164ee 0x000164ee 0x00000002 PAD + 0x000164f0 0x000164f0 0x00000014 Code RO 2142 i.drv_rxbr_frame_drop_cfg CVWL368.lib(drv_rxbr.o) + 0x00016504 0x00016504 0x00000064 Code RO 2143 i.drv_rxbr_get_clk CVWL368.lib(drv_rxbr.o) + 0x00016568 0x00016568 0x00000004 Code RO 2144 i.drv_rxbr_get_col_addr CVWL368.lib(drv_rxbr.o) + 0x0001656c 0x0001656c 0x00000012 Code RO 1751 i.drv_rxbr_get_int_source CVWL368.lib(hal_internal_vsync.o) + 0x0001657e 0x0001657e 0x00000004 Code RO 2147 i.drv_rxbr_get_page_addr CVWL368.lib(drv_rxbr.o) + 0x00016582 0x00016582 0x00000012 Code RO 1752 i.drv_rxbr_get_status0 CVWL368.lib(hal_internal_vsync.o) + 0x00016594 0x00016594 0x0000000c Code RO 2149 i.drv_rxbr_hline_rcv0_cfg CVWL368.lib(drv_rxbr.o) + 0x000165a0 0x000165a0 0x00000008 Code RO 2150 i.drv_rxbr_hline_rcv_cfg CVWL368.lib(drv_rxbr.o) + 0x000165a8 0x000165a8 0x0000000c Code RO 2151 i.drv_rxbr_register_irq0_callback CVWL368.lib(drv_rxbr.o) + 0x000165b4 0x000165b4 0x0000000c Code RO 2152 i.drv_rxbr_register_irq1_callback CVWL368.lib(drv_rxbr.o) + 0x000165c0 0x000165c0 0x00000014 Code RO 2153 i.drv_rxbr_set_ack_pkt_header CVWL368.lib(drv_rxbr.o) + 0x000165d4 0x000165d4 0x000000cc Code RO 2154 i.drv_rxbr_set_cmd_filter CVWL368.lib(drv_rxbr.o) + 0x000166a0 0x000166a0 0x00000014 Code RO 2156 i.drv_rxbr_set_color_format CVWL368.lib(drv_rxbr.o) + 0x000166b4 0x000166b4 0x00000014 Code RO 2158 i.drv_rxbr_set_inten CVWL368.lib(drv_rxbr.o) + 0x000166c8 0x000166c8 0x00000010 Code RO 2159 i.drv_rxbr_set_ltpo_drop_th CVWL368.lib(drv_rxbr.o) + 0x000166d8 0x000166d8 0x00000026 Code RO 2161 i.drv_rxbr_set_usr_cfg CVWL368.lib(drv_rxbr.o) + 0x000166fe 0x000166fe 0x00000008 Code RO 2162 i.drv_rxbr_set_usr_col CVWL368.lib(drv_rxbr.o) + 0x00016706 0x00016706 0x00000008 Code RO 2163 i.drv_rxbr_set_usr_row CVWL368.lib(drv_rxbr.o) + 0x0001670e 0x0001670e 0x00000002 PAD + 0x00016710 0x00016710 0x00000020 Code RO 1637 i.drv_spi_m_read_data CVWL368.lib(drv_spi_master.o) + 0x00016730 0x00016730 0x0000001c Code RO 1662 i.drv_swire_enable CVWL368.lib(drv_swire.o) + 0x0001674c 0x0001674c 0x00000054 Code RO 1665 i.drv_swire_set_int CVWL368.lib(drv_swire.o) + 0x000167a0 0x000167a0 0x0000001c Code RO 1666 i.drv_swire_set_power_down CVWL368.lib(drv_swire.o) + 0x000167bc 0x000167bc 0x0000000c Code RO 1681 i.drv_sys_cfg_clear_all_int CVWL368.lib(drv_sys_cfg.o) + 0x000167c8 0x000167c8 0x00000028 Code RO 1682 i.drv_sys_cfg_clear_pending CVWL368.lib(drv_sys_cfg.o) + 0x000167f0 0x000167f0 0x00000018 Code RO 1685 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL368.lib(drv_sys_cfg.o) + 0x00016808 0x00016808 0x0000001c Code RO 1686 i.drv_sys_cfg_sel_ap_rst_trig CVWL368.lib(drv_sys_cfg.o) + 0x00016824 0x00016824 0x00000024 Code RO 1687 i.drv_sys_cfg_sel_gpio_group CVWL368.lib(drv_sys_cfg.o) + 0x00016848 0x00016848 0x00000024 Code RO 1688 i.drv_sys_cfg_sel_int_trig CVWL368.lib(drv_sys_cfg.o) + 0x0001686c 0x0001686c 0x00000010 Code RO 1690 i.drv_sys_cfg_set_dma_rx_req CVWL368.lib(drv_sys_cfg.o) + 0x0001687c 0x0001687c 0x00000010 Code RO 1691 i.drv_sys_cfg_set_dma_tx_req CVWL368.lib(drv_sys_cfg.o) + 0x0001688c 0x0001688c 0x00000024 Code RO 1692 i.drv_sys_cfg_set_int CVWL368.lib(drv_sys_cfg.o) + 0x000168b0 0x000168b0 0x0000001a Code RO 1715 i.drv_timer_clear_status_flags CVWL368.lib(drv_timer.o) + 0x000168ca 0x000168ca 0x00000020 Code RO 1716 i.drv_timer_enable CVWL368.lib(drv_timer.o) + 0x000168ea 0x000168ea 0x00000002 PAD + 0x000168ec 0x000168ec 0x00000010 Code RO 1717 i.drv_timer_get_instance CVWL368.lib(drv_timer.o) + 0x000168fc 0x000168fc 0x00000010 Code RO 1718 i.drv_timer_get_prescaler CVWL368.lib(drv_timer.o) + 0x0001690c 0x0001690c 0x00000044 Code RO 1720 i.drv_timer_handle_interrupt CVWL368.lib(drv_timer.o) + 0x00016950 0x00016950 0x00000014 Code RO 1721 i.drv_timer_register_callback CVWL368.lib(drv_timer.o) + 0x00016964 0x00016964 0x00000010 Code RO 1722 i.drv_timer_set_compare_val CVWL368.lib(drv_timer.o) + 0x00016974 0x00016974 0x00000054 Code RO 1723 i.drv_timer_set_int CVWL368.lib(drv_timer.o) + 0x000169c8 0x000169c8 0x00000028 Code RO 1724 i.drv_timer_set_prescaler CVWL368.lib(drv_timer.o) + 0x000169f0 0x000169f0 0x00000010 Code RO 1725 i.drv_timer_set_repeat CVWL368.lib(drv_timer.o) + 0x00016a00 0x00016a00 0x0000000a Code RO 1954 i.drv_tx_phy_test_clear CVWL368.lib(drv_dsi_tx.o) + 0x00016a0a 0x00016a0a 0x0000001c Code RO 1955 i.drv_tx_phy_test_enter CVWL368.lib(drv_dsi_tx.o) + 0x00016a26 0x00016a26 0x0000001c Code RO 1956 i.drv_tx_phy_test_exit CVWL368.lib(drv_dsi_tx.o) + 0x00016a42 0x00016a42 0x00000012 Code RO 1958 i.drv_tx_phy_test_write_1_byte CVWL368.lib(drv_dsi_tx.o) + 0x00016a54 0x00016a54 0x00000014 Code RO 1959 i.drv_tx_phy_test_write_2_byte CVWL368.lib(drv_dsi_tx.o) + 0x00016a68 0x00016a68 0x00000010 Code RO 1960 i.drv_tx_phy_test_write_code CVWL368.lib(drv_dsi_tx.o) + 0x00016a78 0x00016a78 0x00000008 Code RO 2202 i.drv_vidc_clear_irq CVWL368.lib(drv_vidc.o) + 0x00016a80 0x00016a80 0x00000018 Code RO 2206 i.drv_vidc_enable CVWL368.lib(drv_vidc.o) + 0x00016a98 0x00016a98 0x00000040 Code RO 2207 i.drv_vidc_enable_irq CVWL368.lib(drv_vidc.o) + 0x00016ad8 0x00016ad8 0x00000012 Code RO 2209 i.drv_vidc_get_irq_status CVWL368.lib(drv_vidc.o) + 0x00016aea 0x00016aea 0x00000002 PAD + 0x00016aec 0x00016aec 0x00000028 Code RO 2213 i.drv_vidc_init_module_enable CVWL368.lib(drv_vidc.o) + 0x00016b14 0x00016b14 0x0000000c Code RO 2214 i.drv_vidc_register_callback CVWL368.lib(drv_vidc.o) + 0x00016b20 0x00016b20 0x00000006 Code RO 2215 i.drv_vidc_reset CVWL368.lib(drv_vidc.o) + 0x00016b26 0x00016b26 0x0000003c Code RO 2217 i.drv_vidc_set_dst_parameter CVWL368.lib(drv_vidc.o) + 0x00016b62 0x00016b62 0x00000014 Code RO 2221 i.drv_vidc_set_irqen CVWL368.lib(drv_vidc.o) + 0x00016b76 0x00016b76 0x00000010 Code RO 2222 i.drv_vidc_set_mirror CVWL368.lib(drv_vidc.o) + 0x00016b86 0x00016b86 0x00000008 Code RO 2225 i.drv_vidc_set_p2r_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016b8e 0x00016b8e 0x00000026 Code RO 2226 i.drv_vidc_set_p2r_hinitb CVWL368.lib(drv_vidc.o) + 0x00016bb4 0x00016bb4 0x00000026 Code RO 2227 i.drv_vidc_set_p2r_hinitr CVWL368.lib(drv_vidc.o) + 0x00016bda 0x00016bda 0x00000002 PAD + 0x00016bdc 0x00016bdc 0x00000018 Code RO 2228 i.drv_vidc_set_pentile_swap CVWL368.lib(drv_vidc.o) + 0x00016bf4 0x00016bf4 0x0000000a Code RO 2229 i.drv_vidc_set_pu_ctrl CVWL368.lib(drv_vidc.o) + 0x00016bfe 0x00016bfe 0x00000010 Code RO 2230 i.drv_vidc_set_rotation CVWL368.lib(drv_vidc.o) + 0x00016c0e 0x00016c0e 0x0000000a Code RO 2231 i.drv_vidc_set_scld_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016c18 0x00016c18 0x0000000a Code RO 2232 i.drv_vidc_set_scld_hcoef1 CVWL368.lib(drv_vidc.o) + 0x00016c22 0x00016c22 0x00000012 Code RO 2233 i.drv_vidc_set_scld_step CVWL368.lib(drv_vidc.o) + 0x00016c34 0x00016c34 0x0000000a Code RO 2234 i.drv_vidc_set_scld_vcoef0 CVWL368.lib(drv_vidc.o) + 0x00016c3e 0x00016c3e 0x0000000a Code RO 2235 i.drv_vidc_set_scld_vcoef1 CVWL368.lib(drv_vidc.o) + 0x00016c48 0x00016c48 0x00000016 Code RO 2236 i.drv_vidc_set_src_parameter CVWL368.lib(drv_vidc.o) + 0x00016c5e 0x00016c5e 0x00000002 PAD + 0x00016c60 0x00016c60 0x00000010 Code RO 2651 i.drv_wdg_clear_counter CVWL368.lib(drv_wdg.o) + 0x00016c70 0x00016c70 0x00000010 Code RO 2652 i.drv_wdg_clear_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016c80 0x00016c80 0x00000010 Code RO 2655 i.drv_wdg_read_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016c90 0x00016c90 0x00000040 Code RO 2658 i.drv_wdg_set_int CVWL368.lib(drv_wdg.o) + 0x00016cd0 0x00016cd0 0x0000000a Code RO 1349 i.fls_clr_interrupt_flag CVWL368.lib(drv_fls.o) + 0x00016cda 0x00016cda 0x00000014 Code RO 943 i.fputc CVWL368.lib(tau_log.o) + 0x00016cee 0x00016cee 0x00000002 PAD + 0x00016cf0 0x00016cf0 0x00000034 Code RO 537 i.hal_dsi_rx_ctrl_create_handle CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016d24 0x00016d24 0x0000009c Code RO 539 i.hal_dsi_rx_ctrl_deinit CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016dc0 0x00016dc0 0x00000084 Code RO 541 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e44 0x00016e44 0x00000028 Code RO 543 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e6c 0x00016e6c 0x00000028 Code RO 545 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e94 0x00016e94 0x00000060 Code RO 547 i.hal_dsi_rx_ctrl_init CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016ef4 0x00016ef4 0x000001a4 Code RO 548 i.hal_dsi_rx_ctrl_init_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017098 0x00017098 0x000000d8 Code RO 549 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017170 0x00017170 0x00000158 Code RO 550 i.hal_dsi_rx_ctrl_init_memc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000172c8 0x000172c8 0x00000148 Code RO 551 i.hal_dsi_rx_ctrl_init_rxbr CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017410 0x00017410 0x0000022c Code RO 552 i.hal_dsi_rx_ctrl_init_vidc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001763c 0x0001763c 0x000000f0 Code RO 556 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001772c 0x0001772c 0x00000034 Code RO 560 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017760 0x00017760 0x00000034 Code RO 563 i.hal_dsi_rx_ctrl_set_hw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017794 0x00017794 0x00000038 Code RO 564 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000177cc 0x000177cc 0x00000072 Code RO 569 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001783e 0x0001783e 0x00000002 PAD + 0x00017840 0x00017840 0x00000034 Code RO 570 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017874 0x00017874 0x0000003c Code RO 573 i.hal_dsi_rx_ctrl_start CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000178b0 0x000178b0 0x0000003c Code RO 574 i.hal_dsi_rx_ctrl_stop CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000178ec 0x000178ec 0x00000020 Code RO 576 i.hal_dsi_rx_ctrl_toggle_resolution CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001790c 0x0001790c 0x00000190 Code RO 630 i.hal_dsi_tx_calc_video_chunks CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017a9c 0x00017a9c 0x00000034 Code RO 631 i.hal_dsi_tx_config_params_for_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017ad0 0x00017ad0 0x00000450 Code RO 632 i.hal_dsi_tx_count_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f20 0x00017f20 0x00000094 Code RO 633 i.hal_dsi_tx_crop_pic CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017fb4 0x00017fb4 0x0000002c Code RO 635 i.hal_dsi_tx_ctrl_create_handle CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017fe0 0x00017fe0 0x00000084 Code RO 636 i.hal_dsi_tx_ctrl_deinit CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018064 0x00018064 0x0000004c Code RO 640 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180b0 0x000180b0 0x00000028 Code RO 642 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180d8 0x000180d8 0x000000a4 Code RO 644 i.hal_dsi_tx_ctrl_init CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001817c 0x0001817c 0x00000024 Code RO 645 i.hal_dsi_tx_ctrl_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181a0 0x000181a0 0x0000000c Code RO 646 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181ac 0x000181ac 0x00000020 Code RO 649 i.hal_dsi_tx_ctrl_set_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181cc 0x000181cc 0x00000014 Code RO 655 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181e0 0x000181e0 0x00000010 Code RO 656 i.hal_dsi_tx_ctrl_set_partial_disp CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181f0 0x000181f0 0x00000024 Code RO 657 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018214 0x00018214 0x0000009c Code RO 660 i.hal_dsi_tx_ctrl_start CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000182b0 0x000182b0 0x00000044 Code RO 661 i.hal_dsi_tx_ctrl_stop CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000182f4 0x000182f4 0x000000d8 Code RO 662 i.hal_dsi_tx_ctrl_write_array_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000183cc 0x000183cc 0x000000b0 Code RO 663 i.hal_dsi_tx_ctrl_write_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001847c 0x0001847c 0x00000044 Code RO 664 i.hal_dsi_tx_init_data_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000184c0 0x000184c0 0x00000030 Code RO 665 i.hal_dsi_tx_init_dpi_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000184f0 0x000184f0 0x00000020 Code RO 666 i.hal_dsi_tx_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018510 0x00018510 0x00000020 Code RO 667 i.hal_dsi_tx_init_phy_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018530 0x00018530 0x00000094 Code RO 668 i.hal_dsi_tx_init_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000185c4 0x000185c4 0x00000058 Code RO 669 i.hal_dsi_tx_init_video_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001861c 0x0001861c 0x00000044 Code RO 670 i.hal_dsi_tx_send_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018660 0x00018660 0x00000018 Code RO 735 i.hal_gpio_ctrl_eint CVWL368.lib(hal_gpio.o) + 0x00018678 0x00018678 0x00000012 Code RO 736 i.hal_gpio_get_input_data CVWL368.lib(hal_gpio.o) + 0x0001868a 0x0001868a 0x00000002 PAD + 0x0001868c 0x0001868c 0x00000040 Code RO 739 i.hal_gpio_init_eint CVWL368.lib(hal_gpio.o) + 0x000186cc 0x000186cc 0x00000020 Code RO 740 i.hal_gpio_init_input CVWL368.lib(hal_gpio.o) + 0x000186ec 0x000186ec 0x00000028 Code RO 741 i.hal_gpio_init_output CVWL368.lib(hal_gpio.o) + 0x00018714 0x00018714 0x00000018 Code RO 742 i.hal_gpio_reg_eint_cb CVWL368.lib(hal_gpio.o) + 0x0001872c 0x0001872c 0x00000050 Code RO 743 i.hal_gpio_set_ap_reset_int CVWL368.lib(hal_gpio.o) + 0x0001877c 0x0001877c 0x00000060 Code RO 745 i.hal_gpio_set_mode CVWL368.lib(hal_gpio.o) + 0x000187dc 0x000187dc 0x00000008 Code RO 746 i.hal_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x000187e4 0x000187e4 0x00000020 Code RO 748 i.hal_gpio_set_pull_state CVWL368.lib(hal_gpio.o) + 0x00018804 0x00018804 0x0000006c Code RO 774 i.hal_i2c_m_dma_init CVWL368.lib(hal_i2c_master.o) + 0x00018870 0x00018870 0x00000020 Code RO 775 i.hal_i2c_m_dma_read CVWL368.lib(hal_i2c_master.o) + 0x00018890 0x00018890 0x0000001c Code RO 776 i.hal_i2c_m_dma_write CVWL368.lib(hal_i2c_master.o) + 0x000188ac 0x000188ac 0x0000000c Code RO 778 i.hal_i2c_m_transfer_complate CVWL368.lib(hal_i2c_master.o) + 0x000188b8 0x000188b8 0x00000020 Code RO 779 i.hal_i2c_master_irq_callback CVWL368.lib(hal_i2c_master.o) + 0x000188d8 0x000188d8 0x00000010 Code RO 793 i.hal_i2c_s_dma_user_callback CVWL368.lib(hal_i2c_slave.o) + 0x000188e8 0x000188e8 0x0000004c Code RO 794 i.hal_i2c_s_dma_write CVWL368.lib(hal_i2c_slave.o) + 0x00018934 0x00018934 0x000000c8 Code RO 796 i.hal_i2c_s_init CVWL368.lib(hal_i2c_slave.o) + 0x000189fc 0x000189fc 0x00000014 Code RO 797 i.hal_i2c_s_nonblocking_read CVWL368.lib(hal_i2c_slave.o) + 0x00018a10 0x00018a10 0x0000000c Code RO 805 i.hal_i2c_s_set_transfer CVWL368.lib(hal_i2c_slave.o) + 0x00018a1c 0x00018a1c 0x00000174 Code RO 808 i.hal_i2c_slave_irq_callback CVWL368.lib(hal_i2c_slave.o) + 0x00018b90 0x00018b90 0x000000fc Code RO 1753 i.hal_internal_init_memc CVWL368.lib(hal_internal_vsync.o) + 0x00018c8c 0x00018c8c 0x00000010 Code RO 1755 i.hal_internal_sync_get_fb_setting CVWL368.lib(hal_internal_vsync.o) + 0x00018c9c 0x00018c9c 0x00000010 Code RO 1756 i.hal_internal_sync_get_hight_performan_mode CVWL368.lib(hal_internal_vsync.o) + 0x00018cac 0x00018cac 0x0000022c Code RO 1757 i.hal_internal_sync_input_resolution_change CVWL368.lib(hal_internal_vsync.o) + 0x00018ed8 0x00018ed8 0x00000010 Code RO 1760 i.hal_internal_update_dpi_param CVWL368.lib(hal_internal_vsync.o) + 0x00018ee8 0x00018ee8 0x0000010c Code RO 1761 i.hal_internal_video_mode_auto_sync CVWL368.lib(hal_internal_vsync.o) + 0x00018ff4 0x00018ff4 0x00000028 Code RO 1762 i.hal_internal_vsync_deinit CVWL368.lib(hal_internal_vsync.o) + 0x0001901c 0x0001901c 0x0000000c Code RO 1763 i.hal_internal_vsync_get_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00019028 0x00019028 0x00000018 Code RO 1764 i.hal_internal_vsync_get_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00019040 0x00019040 0x0000000c Code RO 1765 i.hal_internal_vsync_get_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x0001904c 0x0001904c 0x0000000c Code RO 1766 i.hal_internal_vsync_get_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00019058 0x00019058 0x00000118 Code RO 1767 i.hal_internal_vsync_init_rx CVWL368.lib(hal_internal_vsync.o) + 0x00019170 0x00019170 0x000000b0 Code RO 1768 i.hal_internal_vsync_init_tx CVWL368.lib(hal_internal_vsync.o) + 0x00019220 0x00019220 0x0000011c Code RO 1769 i.hal_internal_vsync_set_auto_hw_filter CVWL368.lib(hal_internal_vsync.o) + 0x0001933c 0x0001933c 0x00000014 Code RO 1771 i.hal_internal_vsync_set_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00019350 0x00019350 0x00000024 Code RO 1772 i.hal_internal_vsync_set_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00019374 0x00019374 0x00000050 Code RO 1773 i.hal_internal_vsync_set_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x000193c4 0x000193c4 0x00000080 Code RO 1774 i.hal_internal_vsync_set_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00019444 0x00019444 0x00000030 Code RO 1776 i.hal_internal_vsync_update_lcdc_addr CVWL368.lib(hal_internal_vsync.o) + 0x00019474 0x00019474 0x00000024 Code RO 671 i.hal_lcdc_config_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019498 0x00019498 0x00000058 Code RO 672 i.hal_lcdc_config_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000194f0 0x000194f0 0x00000014 Code RO 673 i.hal_lcdc_config_rgb_to_pentile CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019504 0x00019504 0x00000164 Code RO 674 i.hal_lcdc_config_upscaler CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019668 0x00019668 0x00000040 Code RO 675 i.hal_lcdc_init_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000196a8 0x000196a8 0x000001b0 Code RO 676 i.hal_lcdc_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019858 0x00019858 0x00000040 Code RO 677 i.hal_lcdc_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019898 0x00019898 0x0000000e Code RO 833 i.hal_spi_m_clear_rxfifo CVWL368.lib(hal_spi_master.o) + 0x000198a6 0x000198a6 0x00000012 Code RO 857 i.hal_swire_deinit CVWL368.lib(hal_swire.o) + 0x000198b8 0x000198b8 0x00000016 Code RO 859 i.hal_swire_open CVWL368.lib(hal_swire.o) + 0x000198ce 0x000198ce 0x00000008 Code RO 874 i.hal_system_enable_systick CVWL368.lib(hal_system.o) + 0x000198d6 0x000198d6 0x00000002 PAD + 0x000198d8 0x000198d8 0x00000088 Code RO 882 i.hal_system_init CVWL368.lib(hal_system.o) + 0x00019960 0x00019960 0x0000001c Code RO 883 i.hal_system_init_console CVWL368.lib(hal_system.o) + 0x0001997c 0x0001997c 0x00000008 Code RO 886 i.hal_system_set_phy_calibration CVWL368.lib(hal_system.o) + 0x00019984 0x00019984 0x00000008 Code RO 887 i.hal_system_set_pvd CVWL368.lib(hal_system.o) + 0x0001998c 0x0001998c 0x00000008 Code RO 888 i.hal_system_set_vcc CVWL368.lib(hal_system.o) + 0x00019994 0x00019994 0x0000002e Code RO 915 i.hal_timer_deinit CVWL368.lib(hal_timer.o) + 0x000199c2 0x000199c2 0x0000001a Code RO 917 i.hal_timer_init CVWL368.lib(hal_timer.o) + 0x000199dc 0x000199dc 0x00000048 Code RO 919 i.hal_timer_start CVWL368.lib(hal_timer.o) + 0x00019a24 0x00019a24 0x00000028 Code RO 921 i.hal_timer_stop CVWL368.lib(hal_timer.o) + 0x00019a4c 0x00019a4c 0x0000008c Code RO 1074 i.hal_uart_init CVWL368.lib(hal_uart.o) + 0x00019ad8 0x00019ad8 0x00000010 Code RO 1077 i.hal_uart_transmit_blocking CVWL368.lib(hal_uart.o) + 0x00019ae8 0x00019ae8 0x00000110 Code RO 2312 i.handle_init CVWL368.lib(irq_redirect .o) + 0x00019bf8 0x00019bf8 0x00000074 Code RO 98 i.init_mipi_tx ap_demo.o + 0x00019c6c 0x00019c6c 0x00000100 Code RO 99 i.init_panel ap_demo.o + 0x00019d6c 0x00019d6c 0x0000000a Code RO 3 i.main main.o + 0x00019d76 0x00019d76 0x00000002 PAD + 0x00019d78 0x00019d78 0x00000084 Code RO 100 i.open_mipi_rx ap_demo.o + 0x00019dfc 0x00019dfc 0x0000007c Code RO 101 i.pps_update_handle ap_demo.o + 0x00019e78 0x00019e78 0x000003f4 Code RO 1778 i.rx_get_dcs_packet_data CVWL368.lib(hal_internal_vsync.o) + 0x0001a26c 0x0001a26c 0x00000178 Code RO 1779 i.rx_partial_update CVWL368.lib(hal_internal_vsync.o) + 0x0001a3e4 0x0001a3e4 0x0000008c Code RO 1780 i.rx_receive_packet CVWL368.lib(hal_internal_vsync.o) + 0x0001a470 0x0001a470 0x00000180 Code RO 1781 i.rx_receive_pps CVWL368.lib(hal_internal_vsync.o) + 0x0001a5f0 0x0001a5f0 0x000000a4 Code RO 1782 i.rxbr_irq0_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a694 0x0001a694 0x000001d4 Code RO 1783 i.rxbr_irq1_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a868 0x0001a868 0x000000c4 Code RO 1784 i.soft_gen_te CVWL368.lib(hal_internal_vsync.o) + 0x0001a92c 0x0001a92c 0x000000c0 Code RO 1785 i.soft_gen_te_double_buffer CVWL368.lib(hal_internal_vsync.o) + 0x0001a9ec 0x0001a9ec 0x0000002c Code RO 102 i.soft_te_timer_cb ap_demo.o + 0x0001aa18 0x0001aa18 0x00000040 Code RO 103 i.soft_timer3_cb ap_demo.o + 0x0001aa58 0x0001aa58 0x00000048 Code RO 2678 i.sqrt m_ps.l(sqrt.o) + 0x0001aaa0 0x0001aaa0 0x00000070 Code RO 104 i.tp_heartbeat_exec ap_demo.o + 0x0001ab10 0x0001ab10 0x00000108 Code RO 1786 i.vidc_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001ac18 0x0001ac18 0x000000d0 Code RO 1787 i.vpre_err_reset CVWL368.lib(hal_internal_vsync.o) + 0x0001ace8 0x0001ace8 0x000001cc Code RO 1788 i.vsync_set_te_mode CVWL368.lib(hal_internal_vsync.o) + 0x0001aeb4 0x0001aeb4 0x000024b2 Data RO 105 .constdata ap_demo.o + 0x0001d366 0x0001d366 0x00000020 Data RO 420 .constdata app_tp_st_touch.o + 0x0001d386 0x0001d386 0x00000002 PAD + 0x0001d388 0x0001d388 0x00000024 Data RO 679 .constdata CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001d3ac 0x0001d3ac 0x000000d2 Data RO 751 .constdata CVWL368.lib(hal_gpio.o) + 0x0001d47e 0x0001d47e 0x00000002 PAD + 0x0001d480 0x0001d480 0x00000020 Data RO 809 .constdata CVWL368.lib(hal_i2c_slave.o) + 0x0001d4a0 0x0001d4a0 0x00000061 Data RO 957 .constdata ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x0001d501 0x0001d501 0x00000001 Data RO 963 .constdata ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x0001d502 0x0001d502 0x00000002 PAD + 0x0001d504 0x0001d504 0x00000008 Data RO 1574 .constdata CVWL368.lib(drv_param_init.o) + 0x0001d50c 0x0001d50c 0x00000186 Data RO 2384 .constdata CVWL368.lib(drv_phy_common.o) + 0x0001d692 0x0001d692 0x00000002 PAD + 0x0001d694 0x0001d694 0x0000004c Data RO 106 .conststring ap_demo.o + 0x0001d6e0 0x0001d6e0 0x00000048 Data RO 579 .conststring CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001d728 0x0001d728 0x00000043 Data RO 680 .conststring CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001d76b 0x0001d76b 0x00000001 PAD + 0x0001d76c 0x0001d76c 0x00000134 Data RO 1790 .conststring CVWL368.lib(hal_internal_vsync.o) + 0x0001d8a0 0x0001d8a0 0x00000030 Data RO 3040 Region$$Table anon$$obj.o - Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001ea40, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001d8d0, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) **** No section assigned to this execution region **** - Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001ea40, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001d8d0, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) Exec Addr Load Addr Size Type Attr Idx E Section Name Object 0x00070100 - 0x000000c0 Zero RW 2313 .ARM.__AT_0x00070100 CVWL368.lib(irq_redirect .o) - Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001ea40, Size: 0x00003748, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x000003e8]) + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001d8d0, Size: 0x00004440, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x00000e38]) Exec Addr Load Addr Size Type Attr Idx E Section Name Object @@ -5157,52 +5158,52 @@ Memory Map of the image 0x00070258 COMPRESSED 0x00000003 Data RW 681 .data CVWL368.lib(hal_dsi_tx_ctrl.o) 0x0007025b COMPRESSED 0x00000001 Data RW 780 .data CVWL368.lib(hal_i2c_master.o) 0x0007025c COMPRESSED 0x00000020 Data RW 810 .data CVWL368.lib(hal_i2c_slave.o) - 0x0007027c COMPRESSED 0x000000e8 Data RW 964 .data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) - 0x00070364 COMPRESSED 0x00000001 Data RW 967 .data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) - 0x00070365 COMPRESSED 0x00000001 Data RW 968 .data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) - 0x00070366 COMPRESSED 0x00000001 Data RW 973 .data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) - 0x00070367 COMPRESSED 0x00000003 Data RW 974 .data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) - 0x0007036a COMPRESSED 0x00000005 Data RW 975 .data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) - 0x0007036f COMPRESSED 0x00000001 PAD - 0x00070370 COMPRESSED 0x00000030 Data RW 987 .data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) - 0x000703a0 COMPRESSED 0x00000012 Data RW 1131 .data CVWL368.lib(norflash.o) - 0x000703b2 COMPRESSED 0x00000002 PAD - 0x000703b4 COMPRESSED 0x0000000c Data RW 1185 .data CVWL368.lib(drv_common.o) - 0x000703c0 COMPRESSED 0x00000004 Data RW 1452 .data CVWL368.lib(drv_gpio.o) - 0x000703c4 COMPRESSED 0x00000008 Data RW 1490 .data CVWL368.lib(drv_i2c_dma.o) - 0x000703cc COMPRESSED 0x00000004 Data RW 1519 .data CVWL368.lib(drv_i2c_master.o) - 0x000703d0 COMPRESSED 0x00000004 Data RW 1550 .data CVWL368.lib(drv_i2c_slave.o) - 0x000703d4 COMPRESSED 0x000004a4 Data RW 1575 .data CVWL368.lib(drv_param_init.o) - 0x00070878 COMPRESSED 0x00000004 Data RW 1642 .data CVWL368.lib(drv_spi_master.o) - 0x0007087c COMPRESSED 0x00000008 Data RW 1668 .data CVWL368.lib(drv_swire.o) - 0x00070884 COMPRESSED 0x00000001 Data RW 1693 .data CVWL368.lib(drv_sys_cfg.o) - 0x00070885 COMPRESSED 0x00000003 PAD - 0x00070888 COMPRESSED 0x00000050 Data RW 1726 .data CVWL368.lib(drv_timer.o) - 0x000708d8 COMPRESSED 0x0000000c Data RW 1791 .data CVWL368.lib(hal_internal_vsync.o) - 0x000708e4 COMPRESSED 0x00000008 Data RW 2165 .data CVWL368.lib(drv_rxbr.o) - 0x000708ec COMPRESSED 0x00000004 Data RW 2238 .data CVWL368.lib(drv_vidc.o) - 0x000708f0 COMPRESSED 0x00000001 Data RW 2385 .data CVWL368.lib(drv_phy_common.o) - 0x000708f1 COMPRESSED 0x00000003 PAD - 0x000708f4 COMPRESSED 0x0000000c Data RW 2405 .data CVWL368.lib(drv_chip_info.o) - 0x00070900 COMPRESSED 0x0000000c Data RW 2515 .data CVWL368.lib(drv_pwm.o) - 0x0007090c COMPRESSED 0x00000008 Data RW 2593 .data CVWL368.lib(drv_uart.o) - 0x00070914 COMPRESSED 0x0000000c Data RW 2660 .data CVWL368.lib(drv_wdg.o) - 0x00070920 COMPRESSED 0x00000004 Data RW 3009 .data mc_p.l(stdout.o) - 0x00070924 COMPRESSED 0x00000004 Data RW 3021 .data mc_p.l(errno.o) - 0x00070928 - 0x00000190 Zero RW 270 .bss app_tp_transfer.o - 0x00070ab8 - 0x0000000c Zero RW 419 .bss app_tp_st_touch.o - 0x00070ac4 - 0x000000c4 Zero RW 578 .bss CVWL368.lib(hal_dsi_rx_ctrl.o) - 0x00070b88 - 0x0000004c Zero RW 678 .bss CVWL368.lib(hal_dsi_tx_ctrl.o) - 0x00070bd4 - 0x00000100 Zero RW 944 .bss CVWL368.lib(tau_log.o) - 0x00070cd4 - 0x000000d0 Zero RW 1079 .bss CVWL368.lib(hal_uart.o) - 0x00070da4 - 0x0000001c Zero RW 1314 .bss CVWL368.lib(drv_dma.o) - 0x00070dc0 - 0x00000040 Zero RW 1451 .bss CVWL368.lib(drv_gpio.o) - 0x00070e00 - 0x00000140 Zero RW 1489 .bss CVWL368.lib(drv_i2c_dma.o) - 0x00070f40 - 0x00000984 Zero RW 1789 .bss CVWL368.lib(hal_internal_vsync.o) - 0x000718c4 - 0x00001030 Zero RW 1842 .bss CVWL368.lib(dcs_packet_fifo.o) - 0x000728f4 - 0x00000020 Zero RW 2449 .bss CVWL368.lib(hal_spi_slave.o) - 0x00072914 COMPRESSED 0x00000004 PAD - 0x00072918 - 0x00001000 Zero RW 526 STACK startup_armcm0.o + 0x0007027c COMPRESSED 0x00000de0 Data RW 964 .data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x0007105c COMPRESSED 0x00000001 Data RW 967 .data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x0007105d COMPRESSED 0x00000001 Data RW 968 .data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x0007105e COMPRESSED 0x00000001 Data RW 973 .data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x0007105f COMPRESSED 0x00000003 Data RW 974 .data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071062 COMPRESSED 0x00000005 Data RW 975 .data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071067 COMPRESSED 0x00000001 PAD + 0x00071068 COMPRESSED 0x00000030 Data RW 987 .data ISP368_N10Lite_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071098 COMPRESSED 0x00000012 Data RW 1131 .data CVWL368.lib(norflash.o) + 0x000710aa COMPRESSED 0x00000002 PAD + 0x000710ac COMPRESSED 0x0000000c Data RW 1185 .data CVWL368.lib(drv_common.o) + 0x000710b8 COMPRESSED 0x00000004 Data RW 1452 .data CVWL368.lib(drv_gpio.o) + 0x000710bc COMPRESSED 0x00000008 Data RW 1490 .data CVWL368.lib(drv_i2c_dma.o) + 0x000710c4 COMPRESSED 0x00000004 Data RW 1519 .data CVWL368.lib(drv_i2c_master.o) + 0x000710c8 COMPRESSED 0x00000004 Data RW 1550 .data CVWL368.lib(drv_i2c_slave.o) + 0x000710cc COMPRESSED 0x000004a4 Data RW 1575 .data CVWL368.lib(drv_param_init.o) + 0x00071570 COMPRESSED 0x00000004 Data RW 1642 .data CVWL368.lib(drv_spi_master.o) + 0x00071574 COMPRESSED 0x00000008 Data RW 1668 .data CVWL368.lib(drv_swire.o) + 0x0007157c COMPRESSED 0x00000001 Data RW 1693 .data CVWL368.lib(drv_sys_cfg.o) + 0x0007157d COMPRESSED 0x00000003 PAD + 0x00071580 COMPRESSED 0x00000050 Data RW 1726 .data CVWL368.lib(drv_timer.o) + 0x000715d0 COMPRESSED 0x0000000c Data RW 1791 .data CVWL368.lib(hal_internal_vsync.o) + 0x000715dc COMPRESSED 0x00000008 Data RW 2165 .data CVWL368.lib(drv_rxbr.o) + 0x000715e4 COMPRESSED 0x00000004 Data RW 2238 .data CVWL368.lib(drv_vidc.o) + 0x000715e8 COMPRESSED 0x00000001 Data RW 2385 .data CVWL368.lib(drv_phy_common.o) + 0x000715e9 COMPRESSED 0x00000003 PAD + 0x000715ec COMPRESSED 0x0000000c Data RW 2405 .data CVWL368.lib(drv_chip_info.o) + 0x000715f8 COMPRESSED 0x0000000c Data RW 2515 .data CVWL368.lib(drv_pwm.o) + 0x00071604 COMPRESSED 0x00000008 Data RW 2593 .data CVWL368.lib(drv_uart.o) + 0x0007160c COMPRESSED 0x0000000c Data RW 2660 .data CVWL368.lib(drv_wdg.o) + 0x00071618 COMPRESSED 0x00000004 Data RW 3009 .data mc_p.l(stdout.o) + 0x0007161c COMPRESSED 0x00000004 Data RW 3021 .data mc_p.l(errno.o) + 0x00071620 - 0x00000190 Zero RW 270 .bss app_tp_transfer.o + 0x000717b0 - 0x0000000c Zero RW 419 .bss app_tp_st_touch.o + 0x000717bc - 0x000000c4 Zero RW 578 .bss CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00071880 - 0x0000004c Zero RW 678 .bss CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000718cc - 0x00000100 Zero RW 944 .bss CVWL368.lib(tau_log.o) + 0x000719cc - 0x000000d0 Zero RW 1079 .bss CVWL368.lib(hal_uart.o) + 0x00071a9c - 0x0000001c Zero RW 1314 .bss CVWL368.lib(drv_dma.o) + 0x00071ab8 - 0x00000040 Zero RW 1451 .bss CVWL368.lib(drv_gpio.o) + 0x00071af8 - 0x00000140 Zero RW 1489 .bss CVWL368.lib(drv_i2c_dma.o) + 0x00071c38 - 0x00000984 Zero RW 1789 .bss CVWL368.lib(hal_internal_vsync.o) + 0x000725bc - 0x00001030 Zero RW 1842 .bss CVWL368.lib(dcs_packet_fifo.o) + 0x000735ec - 0x00000020 Zero RW 2449 .bss CVWL368.lib(hal_spi_slave.o) + 0x0007360c COMPRESSED 0x00000004 PAD + 0x00073610 - 0x00001000 Zero RW 526 STACK startup_armcm0.o ============================================================================== @@ -5212,17 +5213,17 @@ Image component sizes Code (inc. data) RO Data RW Data ZI Data Debug Object Name - 2834 736 10640 40 0 35694 ap_demo.o - 1092 238 32 40 12 9752 app_tp_st_touch.o - 1060 114 0 46 400 12953 app_tp_transfer.o - 36 6 0 0 0 529 board.o - 10 0 0 0 0 7271 main.o - 120 18 192 0 4096 2112 startup_armcm0.o + 2874 732 9470 40 0 35782 ap_demo.o + 1092 238 32 40 12 9776 app_tp_st_touch.o + 1060 114 0 46 400 12989 app_tp_transfer.o + 36 6 0 0 0 533 board.o + 10 0 0 0 0 7279 main.o + 120 18 192 0 4096 2116 startup_armcm0.o ---------------------------------------------------------------------- - 5156 1112 10912 128 4508 68311 Object Totals + 5196 1108 9744 128 4508 68475 Object Totals 0 0 48 0 0 0 (incl. Generated) - 4 0 0 2 0 0 (incl. Padding) + 4 0 2 2 0 0 (incl. Padding) ---------------------------------------------------------------------- @@ -5272,7 +5273,7 @@ Image component sizes 48 10 0 18 0 68 norflash.o 58 0 0 0 0 128 tau_delay.o 60 10 0 0 256 156 tau_log.o - 2408 88 3418 291 0 18528 app_tp_for_custom_s8.o + 2392 90 98 3611 0 18584 app_tp_for_custom_s8.o 200 20 0 0 0 76 ceil.o 72 6 0 0 0 76 sqrt.o 86 0 0 0 0 0 __dczerorl2.o @@ -5322,7 +5323,7 @@ Image component sizes 24 0 0 0 0 60 fscalb.o ---------------------------------------------------------------------- - 39328 4926 4572 1752 7956 53348 Library Totals + 39312 4928 1252 5072 7956 53404 Library Totals 46 0 7 9 4 0 (incl. Padding) ---------------------------------------------------------------------- @@ -5330,13 +5331,13 @@ Image component sizes Code (inc. data) RO Data RW Data ZI Data Debug Library Name 31494 4632 1147 1444 7952 31544 CVWL368.lib - 2408 88 3418 291 0 18528 ISP368_N10Lite_CSOT667_TP.lib + 2392 90 98 3611 0 18584 ISP368_N10Lite_CSOT667_TP.lib 272 26 0 0 0 152 m_ps.l 2838 126 0 8 0 1264 mc_p.l 2270 54 0 0 0 1860 mf_p.l ---------------------------------------------------------------------- - 39328 4926 4572 1752 7956 53348 Library Totals + 39312 4928 1252 5072 7956 53404 Library Totals ---------------------------------------------------------------------- @@ -5345,15 +5346,15 @@ Image component sizes Code (inc. data) RO Data RW Data ZI Data Debug - 44484 6038 15484 1880 12464 97263 Grand Totals - 44484 6038 15484 1000 12464 97263 ELF Image Totals (compressed) - 44484 6038 15484 1000 0 0 ROM Totals + 44508 6036 10996 5200 12464 97483 Grand Totals + 44508 6036 10996 3640 12464 97483 ELF Image Totals (compressed) + 44508 6036 10996 3640 0 0 ROM Totals ============================================================================== - Total RO Size (Code + RO Data) 59968 ( 58.56kB) - Total RW Size (RW Data + ZI Data) 14344 ( 14.01kB) - Total ROM Size (Code + RO Data + RW Data) 60968 ( 59.54kB) + Total RO Size (Code + RO Data) 55504 ( 54.20kB) + Total RW Size (RW Data + ZI Data) 17664 ( 17.25kB) + Total ROM Size (Code + RO Data + RW Data) 59144 ( 57.76kB) ============================================================================== diff --git a/project/ISP_368/Listings/ISP368_N10Lite_CSOT667_20230621.map b/project/ISP_368/Listings/ISP368_N10Lite_CSOT667_20230621.map new file mode 100644 index 0000000..b07f4ae --- /dev/null +++ b/project/ISP_368/Listings/ISP368_N10Lite_CSOT667_20230621.map @@ -0,0 +1,5357 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) for ap_get_tp_calibration_status_01 + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tp_heartbeat_exec) for tp_heartbeat_exec + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) for ap_tp_st_touch_scan_point_record_event_exec + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + ap_demo.o(i.ap_demo) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_53) refers to app_tp_for_custom_s8.o(.data) for fingerprint_flag + ap_demo.o(i.ap_get_reg_53) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_get_reg_7A) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_reset_cb) refers to ap_demo.o(.conststring) for .conststring + ap_demo.o(i.ap_set_backlight_51) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.ap_set_backlight_51) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) for hal_dsi_tx_crop_pic + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.init_panel) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.init_panel) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.init_panel) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.init_panel) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.init_panel) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to ap_demo.o(i.soft_te_timer_cb) for soft_te_timer_cb + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.pps_update_handle) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_te_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) for hal_dsi_rx_ctrl_set_hw_tear_mode + ap_demo.o(i.soft_te_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + ap_demo.o(i.soft_te_timer_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_te_timer_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.tp_heartbeat_exec) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + ap_demo.o(i.tp_heartbeat_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) for ap_tp_st_touch_software_reset + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_transfer.o(.data) for s_screen_init_complate + ap_demo.o(i.tp_heartbeat_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight_51) for ap_set_backlight_51 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_53) for ap_get_reg_53 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_7A) for ap_get_reg_7A + ap_demo.o(.constdata) refers to app_tp_st_touch.o(i.ap_set_tp_calibration_04) for ap_set_tp_calibration_04 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.ap_tp_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.ap_tp_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_for_custom_s8.o(.data) for send_point + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for .data + app_tp_for_custom_s8.o(i.EncryptCheckEx) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(i.EncryptCheckEx) for EncryptCheckEx + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + app_tp_st_touch.o(i.CRC16_2) refers to app_tp_st_touch.o(.constdata) for .constdata + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to printfa.o(i.__0printf) for __2printf + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(i.CRC16_2) for CRC16_2 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) refers to app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) for ap_tp_st_touch_software_reset + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) refers to app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) for ap_tp_st_touch_software_reset + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to printfa.o(i.__0printf) for __2printf + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_calibration) for ap_tp_st_touch_calibration + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) for ap_tp_st_touch_get_calibration_success_mark + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(.data) for .data + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) for hal_internal_vsync_toggle_input_frame_rate + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) for hal_internal_sync_input_resolution_change_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_dsi_tx_ctrl.o(.conststring) for .conststring + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) for hal_internal_vsync_update_lcdc_addr + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te) refers to hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) for hal_internal_sync_cmd_mode_rcv_te + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) for hal_dsi_tx_ctrl_set_rect_pixel_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) for hal_dsi_tx_ctrl_draw_flicker + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) for hal_dsi_tx_ctrl_draw_chessboard + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_update_dpi_param) for hal_internal_update_dpi_param + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_config_intr) for drv_i2c_s_config_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c0_set_callback) for drv_i2c0_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_sel) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_flash_power_down) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_power_down) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_system.o(i.hal_system_flash_read) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_dual_read) for norflash_dual_read + hal_system.o(i.hal_system_flash_release_power_down) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_release_power_down) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_erase_block) for norflash_erase_block + hal_system.o(i.hal_system_flash_write) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_write) for norflash_write + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c1_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c0_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_slave_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_update_dpi_param) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ceil.o(i.ceil) for ceil + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) for hal_internal_video_mode_auto_sync + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.ap_tp_calibration), (176 bytes). + Removing app_tp_transfer.o(i.app_tp_m_transfer_complate), (8 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_clear_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (5 bytes). + Removing app_tp_transfer.o(.data), (6 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (1 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (56 bytes). + Removing app_tp_for_custom_s8.o(.bss), (200 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (11 bytes). + Removing app_tp_for_custom_s8.o(.data), (10 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (16 bytes). + Removing app_tp_for_custom_s8.o(.data), (16 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_st_touch.o(.rev16_text), (4 bytes). + Removing app_tp_st_touch.o(.revsh_text), (4 bytes). + Removing app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3), (26 bytes). + Removing app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF), (32 bytes). + Removing app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset), (196 bytes). + Removing app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event), (156 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (16 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode), (100 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter), (108 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data), (268 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex), (14 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex), (32 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te), (10 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard), (280 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker), (172 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init), (30 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (140 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data), (272 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (80 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (32 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (40 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_sel), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (32 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (108 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_flash_power_down), (20 bytes). + Removing hal_system.o(i.hal_system_flash_read), (52 bytes). + Removing hal_system.o(i.hal_system_flash_release_power_down), (20 bytes). + Removing hal_system.o(i.hal_system_flash_write), (60 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (412 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_clocks), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (24 bytes). + Removing drv_dma.o(i.drv_dma_enable_cycle), (44 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_clear_irq_status), (6 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (130 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (30 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (16 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_scld_filter), (100 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_set_frame_buff_pd), (28 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (108 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (60 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (220 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (88 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (72 bytes). + Removing drv_spi_dma.o(.bss), (480 bytes). + Removing drv_spi_dma.o(.data), (16 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (168 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex), (468 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate), (560 bytes). + Removing hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler), (476 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (6 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_set_prefetch), (24 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (56 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (20 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (64 bytes). + Removing drv_pwm.o(i.drv_pwm_out_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_control), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_threshold), (12 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing dflti.o(.text), (40 bytes). + +580 unused section(s) (total 26602 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../fplib/microlib/fpsqrt.c 0x00000000 Number 0 dsqrt.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt_x.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\internal\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\..\src\app\demo\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\..\src\app\demo\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\..\src\app\demo\app_tp_st_touch.c 0x00000000 Number 0 app_tp_st_touch.o ABSOLUTE + ..\..\src\app\demo\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\internal\\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\\..\\src\\app\\demo\\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_st_touch.c 0x00000000 Number 0 app_tp_st_touch.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdcmple.s 0x00000000 Number 0 cdcmple.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 fadd.o(.text) + .text 0x0001029a Section 0 fmul.o(.text) + .text 0x00010314 Section 0 fdiv.o(.text) + .text 0x00010390 Section 0 fscalb.o(.text) + .text 0x000103a8 Section 0 dadd.o(.text) + .text 0x0001050c Section 0 dmul.o(.text) + .text 0x000105dc Section 0 ddiv.o(.text) + .text 0x000106cc Section 0 fflti.o(.text) + .text 0x000106e2 Section 0 ffltui.o(.text) + .text 0x000106f0 Section 0 dfltui.o(.text) + .text 0x0001070c Section 0 ffixi.o(.text) + .text 0x0001073e Section 0 ffixui.o(.text) + .text 0x00010768 Section 0 dfixi.o(.text) + .text 0x000107b0 Section 0 dfixui.o(.text) + .text 0x000107ec Section 0 f2d.o(.text) + .text 0x00010814 Section 40 cdcmple.o(.text) + .text 0x0001083c Section 20 cfrcmple.o(.text) + .text 0x00010850 Section 0 uldiv.o(.text) + .text 0x000108b0 Section 0 llshl.o(.text) + .text 0x000108d0 Section 0 llushr.o(.text) + .text 0x000108f2 Section 0 llsshr.o(.text) + .text 0x00010918 Section 0 fepilogue.o(.text) + .text 0x00010918 Section 0 iusefp.o(.text) + .text 0x0001099a Section 0 depilogue.o(.text) + .text 0x00010a58 Section 0 dsqrt.o(.text) + .text 0x00010afc Section 0 dfixul.o(.text) + .text 0x00010b3c Section 40 cdrcmple.o(.text) + .text 0x00010b64 Section 36 init.o(.text) + .text 0x00010b88 Section 0 __dczerorl2.o(.text) + i.ADC_IRQn_Handler 0x00010be0 Section 0 irq_redirect .o(i.ADC_IRQn_Handler) + i.AP_NRESET_IRQn_Handler 0x00010bf8 Section 0 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + i.CRC16_2 0x00010c10 Section 0 app_tp_st_touch.o(i.CRC16_2) + i.DMA_IRQn_Handler 0x00010c50 Section 0 irq_redirect .o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010c64 Section 0 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010c80 Section 0 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010c9c Section 0 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010cb8 Section 0 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010cd4 Section 0 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010cf0 Section 0 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010d0c Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010d28 Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.EncryptCheckEx 0x00010d44 Section 0 app_tp_for_custom_s8.o(i.EncryptCheckEx) + i.FLSCTRL_IRQn_Handler 0x00010d68 Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.Gpio_swire_output 0x00010d7c Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00010dcc Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010de0 Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010df8 Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010e10 Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010e28 Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010e50 Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010e68 Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010e80 Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010e98 Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.S20_Start_init 0x00010eb4 Section 0 app_tp_transfer.o(i.S20_Start_init) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.UART_DisableDma 0x00011014 Section 0 drv_uart.o(i.UART_DisableDma) + i.__scatterload_null 0x00011016 Section 2 handlers.o(i.__scatterload_null) + .ARM.__at_0x11018 0x00011018 Section 4 drv_common.o(.ARM.__at_0x11018) + i.SPIM_IRQn_Handler 0x0001101c Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.SPIS_IRQn_Handler 0x00011038 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.SWIRE_IRQn_Handler 0x00011054 Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00011070 Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00011088 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x000110a0 Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x000110b8 Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x000110d0 Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART0_IRQ_Handle 0x000110e8 Section 0 drv_uart.o(i.UART0_IRQ_Handle) + i.UART_GetInstance 0x00011104 Section 0 drv_uart.o(i.UART_GetInstance) + i.UART_IRQn_Handler 0x00011108 Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_ResetRxFIFO 0x00011120 Section 0 drv_uart.o(i.UART_ResetRxFIFO) + i.UART_SetBaudRate 0x00011144 Section 0 drv_uart.o(i.UART_SetBaudRate) + i.UART_SwitchSCLK 0x0001118c Section 0 drv_uart.o(i.UART_SwitchSCLK) + i.UART_TransferHandleIRQ 0x000111a6 Section 0 drv_uart.o(i.UART_TransferHandleIRQ) + i.UART_WriteBlocking 0x000112da Section 0 drv_uart.o(i.UART_WriteBlocking) + i.UART_init 0x000112f4 Section 0 drv_uart.o(i.UART_init) + i.VIDC_IRQn_Handler 0x000113b0 Section 0 irq_redirect .o(i.VIDC_IRQn_Handler) + i.VPRE_IRQn_Handler 0x000113c8 Section 0 irq_redirect .o(i.VPRE_IRQn_Handler) + i.WDG_IRQn_Handler 0x000113e0 Section 0 irq_redirect .o(i.WDG_IRQn_Handler) + i.__0printf 0x000113f8 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x00011418 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x0001143c Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x0001146a Section 0 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + i.__NVIC_ClearPendingIRQ 0x00011484 Section 0 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011485 Thumb Code 18 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x0001149c Section 0 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x0001149d Thumb Code 18 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_DisableIRQ 0x000114b4 Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x000114b5 Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x000114d4 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x000114d5 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__NVIC_SetPriority 0x000114ec Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x000114ed Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_copy 0x00011530 Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_zeroinit 0x0001153e Section 14 handlers.o(i.__scatterload_zeroinit) + i.__set_errno 0x0001154c Section 0 errno.o(i.__set_errno) + i._fp_digits 0x00011558 Section 0 printfa.o(i._fp_digits) + _fp_digits 0x00011559 Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x000116cc Section 0 printfa.o(i._printf_core) + _printf_core 0x000116cd Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011db8 Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011db9 Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011dd8 Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011dd9 Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011e04 Section 0 printfa.o(i._sputc) + _sputc 0x00011e05 Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011e10 Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011e11 Thumb Code 402 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x00011fdc Section 0 ap_demo.o(i.ap_demo) + i.ap_get_reg_53 0x000122a4 Section 0 ap_demo.o(i.ap_get_reg_53) + ap_get_reg_53 0x000122a5 Thumb Code 34 ap_demo.o(i.ap_get_reg_53) + i.ap_get_reg_7A 0x000122d0 Section 0 ap_demo.o(i.ap_get_reg_7A) + ap_get_reg_7A 0x000122d1 Thumb Code 84 ap_demo.o(i.ap_get_reg_7A) + i.ap_get_reg_df 0x00012324 Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x00012325 Thumb Code 190 ap_demo.o(i.ap_get_reg_df) + i.ap_get_tp_calibration_status_01 0x000123e8 Section 0 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + i.ap_reset_cb 0x00012408 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x00012409 Thumb Code 40 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight_51 0x0001244c Section 0 ap_demo.o(i.ap_set_backlight_51) + ap_set_backlight_51 0x0001244d Thumb Code 62 ap_demo.o(i.ap_set_backlight_51) + i.ap_set_display_off 0x00012490 Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x00012491 Thumb Code 30 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x000124d8 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x000124d9 Thumb Code 18 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x00012510 Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x00012511 Thumb Code 68 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x00012588 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x00012589 Thumb Code 22 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x000125d0 Section 0 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + i.ap_tp_st_touch_calibration 0x00012668 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + i.ap_tp_st_touch_get_calibration_success_mark 0x00012718 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + i.ap_tp_st_touch_scan_point_init 0x000127c0 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + i.ap_tp_st_touch_scan_point_record_event_exec 0x000127dc Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + i.ap_tp_st_touch_simulate_finger_release_event 0x0001282c Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + i.ap_tp_st_touch_software_reset 0x00012860 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) + i.app_ADC_IRQn_Handler 0x0001290c Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x00012928 Section 0 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Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00012a9c Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00012c40 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00012cc8 Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00012f60 Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00013000 Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00013048 Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x00013078 Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x00013278 Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x00013298 Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x000132b0 Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x000132ba Section 0 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Thumb Code 136 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x000134f8 Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x0001353c Section 0 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_write 0x0001355c Section 0 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x00013564 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_s_read 0x00013a24 Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x00013a2c Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x00013a34 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x00013ea8 Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x00013ed8 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00013ed9 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_transfer_screen_const 0x00013ee4 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00013ee5 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00013f24 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x00014030 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.board_Init 0x00014044 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x00014068 Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x00014558 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x00014620 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x00014621 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x0001464c Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x0001464d Thumb Code 90 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x000146e0 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x00014738 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x00014750 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00014794 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x000147b8 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x000147b9 Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x000147d4 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x000147ec Section 0 tau_delay.o(i.delayUs) + i.drv_ap_rst_trig_edge_detect 0x00014810 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x00014848 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x00014854 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x00014894 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x00014944 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drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x00014a78 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x00014a8c Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x00014aa0 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x00014ab4 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x00014ac8 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x00014adc Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x00014af0 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x00014b08 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x00014b20 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x00014b34 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x00014b48 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x00014b5c Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x00014b74 Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x00014b90 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x00014ba0 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00014bb0 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x00014bd4 Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00014be0 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x00014c70 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x00014c82 Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x00014c9c Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x00014ca4 Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00014ce8 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x00014d1e Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00014d2c Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00014da0 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00014daa Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00014dd4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00014ed8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00014f18 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00014f19 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00014f68 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00014f69 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00014f84 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00014f8c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00014f92 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00014fa0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00014fc0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00014fd0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00014fd4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00014fe4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x0001502a Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00015050 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00015154 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00015162 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00015176 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x000151e2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x000151e6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x000151fe Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00015206 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x0001520e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00015218 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x0001523c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x00015240 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00015244 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00015248 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x00015260 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x0001527a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00015286 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x000152ea Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x00015328 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x0001545c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x0001547a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00015482 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x0001549e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x000154b6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x000154c4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x00015504 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x00015514 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x0001551c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x0001553e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x00015546 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x0001556c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x00015616 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x0001562c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x00015644 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x00015672 Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x0001567e Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x000156b0 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x000156c8 Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x000156e0 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x000156ec Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00015700 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x00015750 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x00015770 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x00015780 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x00015790 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x000157a0 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x000157b0 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x000157b1 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x000157d0 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c0_set_callback 0x00015900 Section 0 drv_i2c_slave.o(i.drv_i2c0_set_callback) + i.drv_i2c1_set_callback 0x0001590c Section 0 drv_i2c_master.o(i.drv_i2c1_set_callback) + i.drv_i2c_dma_callback 0x00015918 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x00015919 Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x0001594c Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x000159f8 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x00015a12 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x00015a2c Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x00015a8c Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x00015a9c Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_master_init 0x00015ad4 Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x00015b60 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x00015bbc Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x00015bf8 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x00015bf9 Thumb Code 62 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x00015c36 Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_config_intr 0x00015c78 Section 0 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + i.drv_i2c_s_enable 0x00015c7c Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable) + i.drv_i2c_s_get_fifo_status 0x00015c84 Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_intr 0x00015c98 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + i.drv_i2c_s_write_data 0x00015ce8 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x00015d04 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x00015d5c Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x00015d90 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x00015da8 Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x00015dc0 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x00015df0 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x00015e06 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00015e2a Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x00015e50 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x00015e66 Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x00015e7c Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x00015e88 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00015ea6 Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00015ec8 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00015eea Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x00015ef6 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00015f10 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x00015f32 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00015f4c Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x00015f58 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00015fa4 Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00015faa Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00015fbc Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00015fdc Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_video_hw_mode 0x0001601c Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00016030 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x00016050 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x0001605c Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x0001609c Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x000160a8 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x000160ba Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x000160ca Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x000160d8 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x000160ec Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x000160f8 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x00016108 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x0001611a Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x0001612a Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x00016140 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00016158 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x00016172 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00016180 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x000161a8 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x000161b8 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x000161c0 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x000161d4 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x000161e8 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x000161f0 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_p2r_filter_init 0x00016204 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x00016228 Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x00016238 Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x00016274 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x000162d4 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x00016328 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00016338 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x00016350 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x00016370 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x00016396 Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x000163b4 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x000163b5 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x000163d4 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x000163f4 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x0001640c Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x00016444 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x00016445 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x00016450 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x00016451 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x00016460 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x00016461 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x00016474 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x00016475 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x0001648a Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00016494 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00016498 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x000164f4 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x00016508 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x0001656c Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x00016570 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00016571 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x00016582 Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x00016586 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x00016587 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x00016598 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x000165a4 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x000165ac Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x000165b8 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x000165c4 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x000165d8 Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x000166a4 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x000166b8 Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x000166cc Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x000166dc Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x00016702 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x0001670a Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x00016714 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_enable 0x00016734 Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_set_int 0x00016750 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x000167a4 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x000167c0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x000167cc Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x000167f4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x0001680c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x00016828 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x0001684c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x00016870 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x00016880 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x00016890 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x000168b4 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x000168b5 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x000168ce Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x000168f0 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x00016900 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x00016910 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x00016911 Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x00016954 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x00016968 Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x00016978 Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x000169cc Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x000169f4 Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_clear 0x00016a04 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x00016a05 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x00016a0e Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x00016a2a Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x00016a46 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x00016a47 Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x00016a58 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x00016a59 Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x00016a6c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x00016a6d Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00016a7c Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00016a84 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00016a9c Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x00016adc Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x00016af0 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x00016b18 Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x00016b24 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x00016b2a Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x00016b66 Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00016b7a Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x00016b8a Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x00016b92 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x00016bb8 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x00016be0 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x00016bf8 Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x00016c02 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x00016c12 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00016c1c Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x00016c26 Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00016c38 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00016c42 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00016c4c Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x00016c64 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00016c74 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00016c75 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00016c84 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00016c85 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00016c94 Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x00016cd4 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x00016cde Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x00016cf4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x00016d28 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00016dc4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016e48 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00016e70 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00016e98 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00016ef8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00016ef9 Thumb Code 332 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x0001709c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x0001709d Thumb Code 184 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00017174 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00017175 Thumb Code 334 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x000172cc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x000172cd Thumb Code 312 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x00017414 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x00017415 Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00017640 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x00017730 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_hw_tear_mode 0x00017764 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00017798 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00017799 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x000177d0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x000177d1 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017844 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_start 0x00017878 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x000178b4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x000178f0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_calc_video_chunks 0x00017910 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x00017911 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x00017aa0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x00017aa1 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x00017ad4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x00017ad5 Thumb Code 1022 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_crop_pic 0x00017f24 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) + i.hal_dsi_tx_ctrl_create_handle 0x00017fb8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00017fe4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018068 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x000180b4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x000180dc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00018180 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00018181 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x000181a4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_ccm 0x000181b0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x000181d0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x000181e4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x000181f4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x00018218 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x000182b4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x000182f8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x000183d0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x00018480 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x00018481 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x000184c4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x000184c5 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x000184f4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x000184f5 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x00018514 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00018515 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x00018534 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x00018535 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x000185c8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x000185c9 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x00018620 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x00018621 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x00018664 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x0001867c Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x00018690 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x000186d0 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x000186f0 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00018718 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x00018730 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x00018780 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x000187e0 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x000187e8 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x00018808 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x00018874 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x00018894 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x000188b0 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x000188bc Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x000188bd Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x000188dc Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x000188dd Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x000188ec Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x00018938 Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x00018a00 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x00018a14 Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x00018a20 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x00018a21 Thumb Code 354 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x00018b94 Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x00018c90 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_get_hight_performan_mode 0x00018ca0 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change 0x00018cb0 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_update_dpi_param 0x00018edc Section 0 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + i.hal_internal_video_mode_auto_sync 0x00018eec Section 0 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + i.hal_internal_vsync_deinit 0x00018ff8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00019020 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x0001902c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tear_mode 0x00019044 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + i.hal_internal_vsync_get_tx_state 0x00019050 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x0001905c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00019174 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x00019224 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x00019340 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x00019354 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x00019378 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x000193c8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_internal_vsync_update_lcdc_addr 0x00019448 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) + i.hal_lcdc_config_ccm 0x00019478 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x00019479 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x0001949c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x0001949d Thumb Code 84 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x000194f4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x000194f5 Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x00019508 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x00019509 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x0001966c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x0001966d Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x000196ac Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x000196ad Thumb Code 422 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x0001985c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x0001985d Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_m_clear_rxfifo 0x0001989c Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_deinit 0x000198aa Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_open 0x000198bc Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x000198d2 Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x000198dc Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x00019964 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x00019980 Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x00019988 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x00019990 Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_deinit 0x00019998 Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x000199c6 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x000199e0 Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x00019a28 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x00019a50 Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x00019adc Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.handle_init 0x00019aec Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x00019bfc Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x00019bfd Thumb Code 110 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x00019c70 Section 0 ap_demo.o(i.init_panel) + init_panel 0x00019c71 Thumb Code 186 ap_demo.o(i.init_panel) + i.main 0x00019d70 Section 0 main.o(i.main) + i.open_mipi_rx 0x00019d7c Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x00019d7d Thumb Code 112 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x00019e00 Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x00019e01 Thumb Code 80 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x00019e7c Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x00019e7d Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x0001a270 Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x0001a271 Thumb Code 358 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001a3e8 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001a3e9 Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001a474 Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001a475 Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x0001a5f4 Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001a5f5 Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001a698 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001a699 Thumb Code 316 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_gen_te 0x0001a86c Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001a86d Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x0001a930 Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x0001a931 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_te_timer_cb 0x0001a9f0 Section 0 ap_demo.o(i.soft_te_timer_cb) + soft_te_timer_cb 0x0001a9f1 Thumb Code 36 ap_demo.o(i.soft_te_timer_cb) + i.soft_timer3_cb 0x0001aa1c Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001aa1d Thumb Code 48 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001aa5c Section 0 sqrt.o(i.sqrt) + i.tp_heartbeat_exec 0x0001aaa4 Section 0 ap_demo.o(i.tp_heartbeat_exec) + i.vidc_callback 0x0001ab14 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001ab15 Thumb Code 232 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001ac1c Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001ac1d Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001acec Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001aced Thumb Code 300 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001aeb8 Section 9394 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001aeb8 Data 120 ap_demo.o(.constdata) + .constdata 0x0001d36a Section 97 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001d3cb Section 1 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001d3cc Section 32 app_tp_st_touch.o(.constdata) + .constdata 0x0001d3ec Section 36 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001d410 Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001d410 Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001d488 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001d4e4 Section 32 hal_i2c_slave.o(.constdata) + sg_i2c_s_config 0x0001d4e4 Data 32 hal_i2c_slave.o(.constdata) + .constdata 0x0001d504 Section 8 drv_param_init.o(.constdata) + .constdata 0x0001d50c Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001d50c Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001d5c4 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001d644 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001d674 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001d694 Section 76 ap_demo.o(.conststring) + .conststring 0x0001d6e0 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001d728 Section 67 hal_dsi_tx_ctrl.o(.conststring) + .conststring 0x0001d76c Section 308 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 40 ap_demo.o(.data) + start_display_on 0x000701d0 Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701d1 Data 1 ap_demo.o(.data) + panel_display_done 0x000701d2 Data 1 ap_demo.o(.data) + input_compress_flag 0x000701d3 Data 1 ap_demo.o(.data) + enter_hbm_mode_cnt 0x000701d4 Data 1 ap_demo.o(.data) + exit_hbm_mode_cnt 0x000701d5 Data 1 ap_demo.o(.data) + BL_ADJ_flag 0x000701d6 Data 1 ap_demo.o(.data) + phone_off_flag 0x000701d7 Data 1 ap_demo.o(.data) + hbm_mode 0x000701da Data 1 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701db Data 1 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701e8 Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701ec Data 4 ap_demo.o(.data) + value_reg_df 0x000701f0 Data 4 ap_demo.o(.data) + .data 0x000701f8 Section 46 app_tp_transfer.o(.data) + s_spim_write 0x000701f8 Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x000701f9 Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x000701fa Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x000701fb Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x000701fd Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x000701fe Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x000701ff Data 1 app_tp_transfer.o(.data) + .data 0x00070228 Section 3552 app_tp_for_custom_s8.o(.data) + app_tp_count 0x00070238 Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x0007023a Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x0007023c Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x0007023e Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x00070240 Data 2 app_tp_for_custom_s8.o(.data) + enctryptCnt 0x00070244 Data 4 app_tp_for_custom_s8.o(.data) + .data 0x00071008 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00071009 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007100a Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007100b Section 3 app_tp_for_custom_s8.o(.data) + .data 0x0007100e Section 5 app_tp_for_custom_s8.o(.data) + .data 0x00071014 Section 48 app_tp_for_custom_s8.o(.data) + .data 0x00071044 Section 40 app_tp_st_touch.o(.data) + s_calibration_flag 0x00071044 Data 1 app_tp_st_touch.o(.data) + s_calibration_correct_flag 0x00071045 Data 1 app_tp_st_touch.o(.data) + .data 0x0007106c Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x0007106c Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00071070 Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00071074 Section 3 hal_dsi_tx_ctrl.o(.data) + g_tx_vcom_en 0x00071074 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_vpg_en 0x00071075 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x00071076 Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x00071077 Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x00071077 Data 1 hal_i2c_master.o(.data) + .data 0x00071078 Section 32 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00071078 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00071079 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x0007107a Data 1 hal_i2c_slave.o(.data) + sg_i2c_s_index 0x0007107b Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x0007107c Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x00071080 Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x00071084 Data 4 hal_i2c_slave.o(.data) + sg_tx_byte_num 0x00071088 Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x0007108c Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x00071090 Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00071094 Data 4 hal_i2c_slave.o(.data) + .data 0x00071098 Section 18 norflash.o(.data) + tmprg 0x000710a0 Data 4 norflash.o(.data) + .data 0x000710ac Section 12 drv_common.o(.data) + s_my_tick 0x000710ac Data 4 drv_common.o(.data) + .data 0x000710b8 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x000710b8 Data 4 drv_gpio.o(.data) + .data 0x000710bc Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x000710bc Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x000710c0 Data 4 drv_i2c_dma.o(.data) + .data 0x000710c4 Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x000710c4 Data 4 drv_i2c_master.o(.data) + .data 0x000710c8 Section 4 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x000710c8 Data 4 drv_i2c_slave.o(.data) + .data 0x000710cc Section 1188 drv_param_init.o(.data) + .data 0x00071570 Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x00071570 Data 4 drv_spi_master.o(.data) + .data 0x00071574 Section 8 drv_swire.o(.data) + s_swire_cb 0x00071574 Data 8 drv_swire.o(.data) + .data 0x0007157c Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x0007157c Data 1 drv_sys_cfg.o(.data) + .data 0x00071580 Section 80 drv_timer.o(.data) + sg_timer_info 0x00071580 Data 80 drv_timer.o(.data) + .data 0x000715d0 Section 12 hal_internal_vsync.o(.data) + sg_cmd_mode_tx_start 0x000715d0 Data 1 hal_internal_vsync.o(.data) + sg_cur_te_info 0x000715d4 Data 4 hal_internal_vsync.o(.data) + .data 0x000715dc Section 8 drv_rxbr.o(.data) + .data 0x000715e4 Section 4 drv_vidc.o(.data) + .data 0x000715e8 Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x000715e8 Data 1 drv_phy_common.o(.data) + .data 0x000715ec Section 12 drv_chip_info.o(.data) + sg_chip_info 0x000715ec Data 4 drv_chip_info.o(.data) + sg_chip_function 0x000715f0 Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x000715f4 Data 4 drv_chip_info.o(.data) + .data 0x000715f8 Section 12 drv_pwm.o(.data) + s_pwm_type 0x000715f8 Data 1 drv_pwm.o(.data) + s_pwm_cb 0x000715fc Data 8 drv_pwm.o(.data) + .data 0x00071604 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x00071604 Data 4 drv_uart.o(.data) + uart_userData 0x00071608 Data 4 drv_uart.o(.data) + .data 0x0007160c Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x0007160c Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x00071610 Data 8 drv_wdg.o(.data) + .data 0x00071618 Section 4 stdout.o(.data) + .data 0x0007161c Section 4 errno.o(.data) + _errno 0x0007161c Data 4 errno.o(.data) + .bss 0x00071620 Section 400 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x00071620 Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x000716e8 Data 200 app_tp_transfer.o(.bss) + .bss 0x000717b0 Section 12 app_tp_st_touch.o(.bss) + .bss 0x000717bc Section 196 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x000717bc Data 196 hal_dsi_rx_ctrl.o(.bss) + .bss 0x00071880 Section 76 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x00071880 Data 76 hal_dsi_tx_ctrl.o(.bss) + .bss 0x000718cc Section 256 tau_log.o(.bss) + .bss 0x000719cc Section 208 hal_uart.o(.bss) + .bss 0x00071a9c Section 28 drv_dma.o(.bss) + s_dma_handle 0x00071a9c Data 28 drv_dma.o(.bss) + .bss 0x00071ab8 Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00071ab8 Data 64 drv_gpio.o(.bss) + .bss 0x00071af8 Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x00071af8 Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x00071b98 Data 160 drv_i2c_dma.o(.bss) + .bss 0x00071c38 Section 2436 hal_internal_vsync.o(.bss) + g_imm_buffer 0x0007249c Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x0007259c Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x000725a8 Data 20 hal_internal_vsync.o(.bss) + .bss 0x000725bc Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x000735ec Section 32 hal_spi_slave.o(.bss) + STACK 0x00073610 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfrcmple 0x0001083d Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010851 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108b1 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108b1 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108d1 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108d1 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000108f3 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000108f3 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010919 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010919 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010929 Thumb Code 114 fepilogue.o(.text) + _double_round 0x0001099b Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109b5 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a59 Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010afd Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b3d Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b65 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b65 Thumb Code 0 init.o(.text) + __decompress 0x00010b89 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010b89 Thumb Code 86 __dczerorl2.o(.text) + ADC_IRQn_Handler 0x00010be1 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010bf9 Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + CRC16_2 0x00010c11 Thumb Code 54 app_tp_st_touch.o(i.CRC16_2) + DMA_IRQn_Handler 0x00010c51 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c65 Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c81 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010c9d Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010cb9 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010cd5 Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010cf1 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010d0d Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010d29 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + EncryptCheckEx 0x00010d45 Thumb Code 32 app_tp_for_custom_s8.o(i.EncryptCheckEx) + FLSCTRL_IRQn_Handler 0x00010d69 Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010d7d Thumb Code 78 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010dcd Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010de1 Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010df9 Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010e11 Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010e29 Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010e51 Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010e69 Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010e81 Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010e99 Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + S20_Start_init 0x00010eb5 Thumb Code 306 app_tp_transfer.o(i.S20_Start_init) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + UART_DisableDma 0x00011015 Thumb Code 2 drv_uart.o(i.UART_DisableDma) + __scatterload_null 0x00011017 Thumb Code 2 handlers.o(i.__scatterload_null) + s_debug_state 0x00011018 Data 4 drv_common.o(.ARM.__at_0x11018) + SPIM_IRQn_Handler 0x0001101d Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + SPIS_IRQn_Handler 0x00011039 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + SWIRE_IRQn_Handler 0x00011055 Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00011071 Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00011089 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x000110a1 Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x000110b9 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x000110d1 Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x000110e9 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + UART_GetInstance 0x00011105 Thumb Code 4 drv_uart.o(i.UART_GetInstance) + UART_IRQn_Handler 0x00011109 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x00011121 Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SetBaudRate 0x00011145 Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x0001118d Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x000111a7 Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x000112db Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x000112f5 Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x000113b1 Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x000113c9 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x000113e1 Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x000113f9 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x000113f9 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x000113f9 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x000113f9 Thumb Code 0 printfa.o(i.__0printf) + printf 0x000113f9 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x00011419 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x00011419 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x00011419 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x00011419 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x00011419 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x0001143d Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x0001146b Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_copy 0x00011531 Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x0001153f Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x0001154d Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x00011fdd Thumb Code 482 ap_demo.o(i.ap_demo) + ap_get_tp_calibration_status_01 0x000123e9 Thumb Code 28 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + ap_set_tp_calibration_04 0x000125d1 Thumb Code 138 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + ap_tp_st_touch_calibration 0x00012669 Thumb Code 170 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + ap_tp_st_touch_get_calibration_success_mark 0x00012719 Thumb Code 150 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + ap_tp_st_touch_scan_point_init 0x000127c1 Thumb Code 24 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + ap_tp_st_touch_scan_point_record_event_exec 0x000127dd Thumb Code 50 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + ap_tp_st_touch_simulate_finger_release_event 0x0001282d Thumb Code 44 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + ap_tp_st_touch_software_reset 0x00012861 Thumb Code 118 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) + app_ADC_IRQn_Handler 0x0001290d Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x00012929 Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x0001294d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x00012969 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x00012985 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x000129a1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x000129bd Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x000129d9 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x000129f5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00012a11 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x00012a2d Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x00012a75 Thumb Code 14 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00012a8d Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00012a9d Thumb Code 208 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00012c41 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00012cc9 Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00012f61 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00013001 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00013049 Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x00013079 Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x00013279 Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x00013299 Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x000132b1 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x000132bb Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x000132c5 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x000132cf Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x000132d9 Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x000132e1 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x000132fd Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x00013319 Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x00013351 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x00013361 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x00013391 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x000133b5 Thumb Code 78 app_tp_st_touch.o(i.app_tp_calibration_exec) + app_tp_init 0x000134f9 Thumb Code 56 app_tp_transfer.o(i.app_tp_init) + app_tp_m_read 0x0001353d Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_write 0x0001355d Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + app_tp_phone_analysis_data 0x00013565 Thumb Code 1200 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_s_read 0x00013a25 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x00013a2d Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x00013a35 Thumb Code 1140 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x00013ea9 Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x00013f25 Thumb Code 250 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x00014031 Thumb Code 16 app_tp_transfer.o(i.app_tp_transfer_screen_start) + board_Init 0x00014045 Thumb Code 30 board.o(i.board_Init) + calc_framebuffer_setting 0x00014069 Thumb Code 1258 hal_internal_vsync.o(i.calc_framebuffer_setting) + ceil 0x00014559 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x000146e1 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x00014739 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x00014751 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00014795 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x000147d5 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x000147ed Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x00014811 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x00014849 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x00014855 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x00014895 Thumb Code 98 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x00014945 Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x00014959 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x000149b1 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x000149b9 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x000149c9 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x000149dd Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x000149f1 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x00014a11 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x00014a25 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x00014a3d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x00014a51 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x00014a65 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x00014a79 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x00014a8d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x00014aa1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x00014ab5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x00014ac9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x00014add Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x00014af1 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x00014b09 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x00014b21 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x00014b35 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x00014b49 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x00014b5d Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x00014b75 Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x00014b91 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x00014ba1 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00014bb1 Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x00014bd5 Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00014be1 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x00014c71 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x00014c83 Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x00014c9d Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x00014ca5 Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00014ce9 Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x00014d1f Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00014d2d Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00014da1 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00014dab Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x00014dd5 Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00014ed9 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00014f85 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00014f8d Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00014f93 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00014fa1 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00014fc1 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00014fd1 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00014fd5 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00014fe5 Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x0001502b Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00015051 Thumb Code 256 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00015155 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00015163 Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00015177 Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x000151e3 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x000151e7 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x000151ff Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00015207 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x0001520f Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00015219 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x0001523d Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x00015241 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00015245 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x00015249 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x00015261 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x0001527b Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00015287 Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x000152eb Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x00015329 Thumb Code 308 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x0001545d Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x0001547b Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00015483 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x0001549f Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x000154b7 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x000154c5 Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x00015505 Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x00015515 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x0001551d Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x0001553f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x00015547 Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x0001556d Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x00015617 Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x0001562d Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x00015645 Thumb Code 46 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x00015673 Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x0001567f Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x000156b1 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x000156c9 Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x000156e1 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x000156ed Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00015701 Thumb Code 74 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x00015751 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x00015771 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x00015781 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x00015791 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x000157a1 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x000157d1 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c0_set_callback 0x00015901 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c0_set_callback) + drv_i2c1_set_callback 0x0001590d Thumb Code 6 drv_i2c_master.o(i.drv_i2c1_set_callback) + drv_i2c_dma_init 0x0001594d Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x000159f9 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x00015a13 Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x00015a2d Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x00015a8d Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x00015a9d Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_master_init 0x00015ad5 Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x00015b61 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x00015bbd Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x00015c37 Thumb Code 66 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_config_intr 0x00015c79 Thumb Code 4 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + drv_i2c_s_enable 0x00015c7d Thumb Code 8 drv_i2c_slave.o(i.drv_i2c_s_enable) + drv_i2c_s_get_fifo_status 0x00015c85 Thumb Code 20 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_intr 0x00015c99 Thumb Code 74 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + drv_i2c_s_write_data 0x00015ce9 Thumb Code 28 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x00015d05 Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x00015d5d Thumb Code 50 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x00015d91 Thumb Code 20 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x00015da9 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x00015dc1 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x00015df1 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x00015e07 Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00015e2b Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x00015e51 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x00015e67 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x00015e7d Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x00015e89 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00015ea7 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00015ec9 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00015eeb Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x00015ef7 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00015f11 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x00015f33 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00015f4d Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x00015f59 Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00015fa5 Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00015fab Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00015fbd Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00015fdd Thumb Code 58 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_video_hw_mode 0x0001601d Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00016031 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x00016051 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x0001605d Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x0001609d Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x000160a9 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x000160bb Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x000160cb Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x000160d9 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x000160ed Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x000160f9 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x00016109 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x0001611b Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x0001612b Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x00016141 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00016159 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x00016173 Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00016181 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x000161a9 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x000161b9 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x000161c1 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x000161d5 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x000161e9 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x000161f1 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_p2r_filter_init 0x00016205 Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x00016229 Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x00016239 Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x00016275 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x000162d5 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x00016329 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00016339 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x00016351 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x00016371 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x00016397 Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x000163d5 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x000163f5 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x0001640d Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x0001648b Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00016495 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00016499 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x000164f5 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x00016509 Thumb Code 66 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x0001656d Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x00016583 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x00016599 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x000165a5 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x000165ad Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x000165b9 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x000165c5 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x000165d9 Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x000166a5 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x000166b9 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x000166cd Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x000166dd Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x00016703 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x0001670b Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x00016715 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_enable 0x00016735 Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_set_int 0x00016751 Thumb Code 76 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x000167a5 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x000167c1 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x000167cd Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x000167f5 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x0001680d Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x00016829 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x0001684d Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x00016871 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x00016881 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x00016891 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x000168cf Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x000168f1 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x00016901 Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x00016955 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x00016969 Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x00016979 Thumb Code 80 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x000169cd Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x000169f5 Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x00016a0f Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x00016a2b Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00016a7d Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00016a85 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00016a9d Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x00016add Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x00016af1 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x00016b19 Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x00016b25 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x00016b2b Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x00016b67 Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00016b7b Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x00016b8b Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x00016b93 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x00016bb9 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x00016be1 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x00016bf9 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x00016c03 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x00016c13 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00016c1d Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x00016c27 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00016c39 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00016c43 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00016c4d Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x00016c65 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00016c95 Thumb Code 60 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x00016cd5 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x00016cdf Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00016cf5 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x00016d29 Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00016dc5 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016e49 Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x00016e71 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00016e99 Thumb Code 88 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_send_ack_cmd 0x00017641 Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_sync_line 0x00017731 Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_hw_tear_mode 0x00017765 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017845 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_start 0x00017879 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x000178b5 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x000178f1 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_crop_pic 0x00017f25 Thumb Code 144 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) + hal_dsi_tx_ctrl_create_handle 0x00017fb9 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00017fe5 Thumb Code 118 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018069 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x000180b5 Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x000180dd Thumb Code 154 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x000181a5 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_ccm 0x000181b1 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x000181d1 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x000181e5 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x000181f5 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x00018219 Thumb Code 140 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x000182b5 Thumb Code 56 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x000182f9 Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x000183d1 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x00018665 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x0001867d Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x00018691 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x000186d1 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x000186f1 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00018719 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x00018731 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x00018781 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x000187e1 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x000187e9 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x00018809 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x00018875 Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x00018895 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x000188b1 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x000188ed Thumb Code 62 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x00018939 Thumb Code 176 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x00018a01 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x00018a15 Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x00018b95 Thumb Code 170 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x00018c91 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_get_hight_performan_mode 0x00018ca1 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change 0x00018cb1 Thumb Code 438 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_update_dpi_param 0x00018edd Thumb Code 10 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + hal_internal_video_mode_auto_sync 0x00018eed Thumb Code 238 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + hal_internal_vsync_deinit 0x00018ff9 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00019021 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x0001902d Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tear_mode 0x00019045 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + hal_internal_vsync_get_tx_state 0x00019051 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x0001905d Thumb Code 236 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00019175 Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x00019225 Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x00019341 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x00019355 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x00019379 Thumb Code 72 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x000193c9 Thumb Code 118 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_internal_vsync_update_lcdc_addr 0x00019449 Thumb Code 42 hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) + hal_spi_m_clear_rxfifo 0x0001989d Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_deinit 0x000198ab Thumb Code 18 hal_swire.o(i.hal_swire_deinit) + hal_swire_open 0x000198bd Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x000198d3 Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x000198dd Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x00019965 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x00019981 Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x00019989 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x00019991 Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_deinit 0x00019999 Thumb Code 46 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x000199c7 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x000199e1 Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x00019a29 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x00019a51 Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x00019add Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x00019aed Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x00019d71 Thumb Code 10 main.o(i.main) + sqrt 0x0001aa5d Thumb Code 66 sqrt.o(i.sqrt) + tp_heartbeat_exec 0x0001aaa5 Thumb Code 60 ap_demo.o(i.tp_heartbeat_exec) + panel_init_code 0x0001af30 Data 9274 ap_demo.o(.constdata) + I2C_Ack_arr_0600_00 0x0001d36a Data 1 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0600_01 0x0001d36b Data 1 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0A00 0x0001d36c Data 2 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0204 0x0001d36e Data 4 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0A20_01 0x0001d372 Data 7 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0A20_03 0x0001d379 Data 7 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0A20_14 0x0001d380 Data 7 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0120 0x0001d387 Data 8 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0100 0x0001d38f Data 16 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_0A28 0x0001d39f Data 20 app_tp_for_custom_s8.o(.constdata) + I2C_Ack_arr_A019 0x0001d3b3 Data 24 app_tp_for_custom_s8.o(.constdata) + screen_reg_start_data_size 0x0001d3cb Data 1 app_tp_for_custom_s8.o(.constdata) + wCRCTalbeAbs 0x0001d3cc Data 32 app_tp_st_touch.o(.constdata) + Region$$Table$$Base 0x0001d8a0 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001d8d0 Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_start_flag 0x000701d8 Data 1 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701d9 Data 1 ap_demo.o(.data) + panel_mode 0x000701dc Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701de Data 2 ap_demo.o(.data) + rd_51_val2 0x000701e0 Data 2 ap_demo.o(.data) + panel_r 0x000701e2 Data 2 ap_demo.o(.data) + panel_g 0x000701e4 Data 2 ap_demo.o(.data) + panel_b 0x000701e6 Data 2 ap_demo.o(.data) + s_heartbeat 0x000701f4 Data 4 ap_demo.o(.data) + s_screen_init_complate 0x000701fc Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x00070200 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x00070203 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x00070206 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data2 0x00070209 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data3 0x0007020c Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data6 0x0007020f Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data7 0x00070212 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data8 0x00070215 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data4 0x00070218 Data 4 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data5 0x0007021c Data 4 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x00070220 Data 6 app_tp_transfer.o(.data) + tp_flag 0x00070228 Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x00070229 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x0007022a Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x0007022b Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_clk_count 0x0007022c Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x0007022d Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x0007022e Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x0007022f Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x00070230 Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x00070231 Data 1 app_tp_for_custom_s8.o(.data) + Flag_0A10 0x00070232 Data 1 app_tp_for_custom_s8.o(.data) + Flag_0610 0x00070233 Data 1 app_tp_for_custom_s8.o(.data) + Flag_2000 0x00070234 Data 1 app_tp_for_custom_s8.o(.data) + send_point 0x00070235 Data 1 app_tp_for_custom_s8.o(.data) + fingerprint_flag 0x00070236 Data 1 app_tp_for_custom_s8.o(.data) + fingerprint_enable 0x00070237 Data 1 app_tp_for_custom_s8.o(.data) + I2C_Ack_arr_2000_01 0x00070248 Data 1088 app_tp_for_custom_s8.o(.data) + I2C_Ack_arr_2000_14 0x00070688 Data 200 app_tp_for_custom_s8.o(.data) + I2C_Ack_arr_2000_1B 0x00070750 Data 200 app_tp_for_custom_s8.o(.data) + I2C_Ack_arr_2000_1C 0x00070818 Data 200 app_tp_for_custom_s8.o(.data) + I2C_Ack_arr_2000_02 0x000708e0 Data 1088 app_tp_for_custom_s8.o(.data) + I2C_Ack_arr_2000_03 0x00070d20 Data 544 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x00070f40 Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x00071008 Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x00071009 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x0007100a Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x0007100b Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x0007100e Data 5 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x00071014 Data 48 app_tp_for_custom_s8.o(.data) + st_touch_init_sensor_off 0x00071046 Data 3 app_tp_st_touch.o(.data) + st_touch_init_sensor_on 0x00071049 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_reset 0x0007104c Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_FpnlInit 0x0007104f Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_PnlInit 0x00071052 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCfg 0x00071055 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCx 0x00071058 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvPnl 0x0007105b Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clearfifo 0x0007105e Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clkreset 0x00071061 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneM 0x00071064 Data 4 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneS 0x00071068 Data 4 app_tp_st_touch.o(.data) + g_fls_w_cmd 0x00071098 Data 1 norflash.o(.data) + g_fls_r_cmd 0x00071099 Data 1 norflash.o(.data) + g_fls_write_en_status 0x0007109a Data 1 norflash.o(.data) + isFlsTransferEnd 0x0007109b Data 1 norflash.o(.data) + isFlsFifoReq 0x0007109c Data 1 norflash.o(.data) + isNandWriteCompleted 0x0007109d Data 1 norflash.o(.data) + isNandReadCompleted 0x0007109e Data 1 norflash.o(.data) + g_fls_error_info 0x000710a4 Data 6 norflash.o(.data) + g_systick_cb_func 0x000710b0 Data 4 drv_common.o(.data) + g_system_clock 0x000710b4 Data 4 drv_common.o(.data) + g_scld_fhd_filter_h 0x000710cc Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x000711cc Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x000712cc Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x000713cc Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x000714cc Data 128 drv_param_init.o(.data) + g_ccm_setting 0x0007154c Data 36 drv_param_init.o(.data) + g_sof_gen_te_func 0x000715d8 Data 4 hal_internal_vsync.o(.data) + g_int_rxbr_irq0_cb_func 0x000715dc Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x000715e0 Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x000715e4 Data 4 drv_vidc.o(.data) + __stdout 0x00071618 Data 4 stdout.o(.data) + tp_scan_data 0x000717b0 Data 12 app_tp_st_touch.o(.bss) + string 0x000718cc Data 256 tau_log.o(.bss) + hal_dmahandle 0x000719cc Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x00071a6c Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x00071a8c Data 16 hal_uart.o(.bss) + g_vsync_hande 0x00071c38 Data 100 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00071c9c Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x000725bc Data 4144 dcs_packet_fifo.o(.bss) + g_spis_ctrl_handle 0x000735ec Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x00073610 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00074610 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000ed20, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000e71c]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000d8d0, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 617 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2654 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2964 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2967 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2969 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2971 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2972 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2974 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2976 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2965 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 618 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2657 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2659 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2661 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2663 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 2928 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 2930 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 2932 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 2934 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 2936 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 2938 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 2940 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 2942 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 2944 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 2948 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 2950 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 2952 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 2954 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 2956 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 2958 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 2960 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 2962 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 2979 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 2981 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 2983 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 2985 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 2994 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 2995 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 2997 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 3001 .text mf_p.l(dsqrt.o) + 0x00010afa 0x00010afa 0x00000002 PAD + 0x00010afc 0x00010afc 0x00000040 Code RO 3003 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 3005 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 3007 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000056 Code RO 3017 .text mc_p.l(__dczerorl2.o) + 0x00010bde 0x00010bde 0x00000002 PAD + 0x00010be0 0x00010be0 0x00000018 Code RO 2249 i.ADC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010bf8 0x00010bf8 0x00000018 Code RO 2250 i.AP_NRESET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c10 0x00010c10 0x00000040 Code RO 494 i.CRC16_2 app_tp_st_touch.o + 0x00010c50 0x00010c50 0x00000014 Code RO 2251 i.DMA_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c64 0x00010c64 0x0000001c Code RO 2252 i.EXTI_INT0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c80 0x00010c80 0x0000001c Code RO 2253 i.EXTI_INT1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c9c 0x00010c9c 0x0000001c Code RO 2254 i.EXTI_INT2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cb8 0x00010cb8 0x0000001c Code RO 2255 i.EXTI_INT3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cd4 0x00010cd4 0x0000001c Code RO 2256 i.EXTI_INT4_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cf0 0x00010cf0 0x0000001c Code RO 2257 i.EXTI_INT5_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d0c 0x00010d0c 0x0000001c Code RO 2258 i.EXTI_INT6_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d28 0x00010d28 0x0000001c Code RO 2259 i.EXTI_INT7_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d44 0x00010d44 0x00000024 Code RO 405 i.EncryptCheckEx app_tp_for_custom_s8.o + 0x00010d68 0x00010d68 0x00000014 Code RO 2260 i.FLSCTRL_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d7c 0x00010d7c 0x0000004e Code RO 86 i.Gpio_swire_output ap_demo.o + 0x00010dca 0x00010dca 0x00000002 PAD + 0x00010dcc 0x00010dcc 0x00000014 Code RO 2261 i.HardFault_Handler CVWL368.lib(irq_redirect .o) + 0x00010de0 0x00010de0 0x00000018 Code RO 2262 i.I2C0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010df8 0x00010df8 0x00000018 Code RO 2263 i.I2C1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e10 0x00010e10 0x00000018 Code RO 2264 i.LCDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e28 0x00010e28 0x00000028 Code RO 1030 i.LOG_printf CVWL368.lib(tau_log.o) + 0x00010e50 0x00010e50 0x00000018 Code RO 2265 i.MEMC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e68 0x00010e68 0x00000018 Code RO 2266 i.MIPI_RX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e80 0x00010e80 0x00000018 Code RO 2267 i.MIPI_TX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e98 0x00010e98 0x0000001c Code RO 2268 i.PWMDET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010eb4 0x00010eb4 0x0000014c Code RO 252 i.S20_Start_init app_tp_transfer.o + 0x00011000 0x00011000 0x00000014 Data RO 1152 .ARM.__at_0x11000 CVWL368.lib(drv_common.o) + 0x00011014 0x00011014 0x00000002 Code RO 2536 i.UART_DisableDma CVWL368.lib(drv_uart.o) + 0x00011016 0x00011016 0x00000002 Code RO 3012 i.__scatterload_null mc_p.l(handlers.o) + 0x00011018 0x00011018 0x00000004 Data RO 1153 .ARM.__at_0x11018 CVWL368.lib(drv_common.o) + 0x0001101c 0x0001101c 0x0000001c Code RO 2269 i.SPIM_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011038 0x00011038 0x0000001c Code RO 2270 i.SPIS_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011054 0x00011054 0x0000001c Code RO 2271 i.SWIRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011070 0x00011070 0x00000018 Code RO 2272 i.SysTick_Handler CVWL368.lib(irq_redirect .o) + 0x00011088 0x00011088 0x00000018 Code RO 2273 i.TIMER0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110a0 0x000110a0 0x00000018 Code RO 2274 i.TIMER1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110b8 0x000110b8 0x00000018 Code RO 2275 i.TIMER2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110d0 0x000110d0 0x00000018 Code RO 2276 i.TIMER3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110e8 0x000110e8 0x0000001c Code RO 2532 i.UART0_IRQ_Handle CVWL368.lib(drv_uart.o) + 0x00011104 0x00011104 0x00000004 Code RO 2542 i.UART_GetInstance CVWL368.lib(drv_uart.o) + 0x00011108 0x00011108 0x00000018 Code RO 2277 i.UART_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011120 0x00011120 0x00000024 Code RO 2550 i.UART_ResetRxFIFO CVWL368.lib(drv_uart.o) + 0x00011144 0x00011144 0x00000048 Code RO 2553 i.UART_SetBaudRate CVWL368.lib(drv_uart.o) + 0x0001118c 0x0001118c 0x0000001a Code RO 2554 i.UART_SwitchSCLK CVWL368.lib(drv_uart.o) + 0x000111a6 0x000111a6 0x00000134 Code RO 2556 i.UART_TransferHandleIRQ CVWL368.lib(drv_uart.o) + 0x000112da 0x000112da 0x0000001a Code RO 2558 i.UART_WriteBlocking CVWL368.lib(drv_uart.o) + 0x000112f4 0x000112f4 0x000000bc Code RO 2559 i.UART_init CVWL368.lib(drv_uart.o) + 0x000113b0 0x000113b0 0x00000018 Code RO 2278 i.VIDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113c8 0x000113c8 0x00000018 Code RO 2279 i.VPRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113e0 0x000113e0 0x00000018 Code RO 2280 i.WDG_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113f8 0x000113f8 0x00000020 Code RO 2900 i.__0printf mc_p.l(printfa.o) + 0x00011418 0x00011418 0x00000024 Code RO 2906 i.__0vsprintf mc_p.l(printfa.o) + 0x0001143c 0x0001143c 0x0000002e Code RO 2999 i.__ARM_clz mf_p.l(depilogue.o) + 0x0001146a 0x0001146a 0x0000001a Code RO 715 i.__ARM_common_switch8 CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00011484 0x00011484 0x00000018 Code RO 1473 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_i2c_master.o) + 0x0001149c 0x0001149c 0x00000018 Code RO 1597 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_spi_master.o) + 0x000114b4 0x000114b4 0x00000020 Code RO 2103 i.__NVIC_DisableIRQ CVWL368.lib(drv_rxbr.o) + 0x000114d4 0x000114d4 0x00000018 Code RO 2104 i.__NVIC_EnableIRQ CVWL368.lib(drv_rxbr.o) + 0x000114ec 0x000114ec 0x00000044 Code RO 2399 i.__NVIC_SetPriority CVWL368.lib(hal_spi_slave.o) + 0x00011530 0x00011530 0x0000000e Code RO 3011 i.__scatterload_copy mc_p.l(handlers.o) + 0x0001153e 0x0001153e 0x0000000e Code RO 3013 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x0001154c 0x0001154c 0x0000000c Code RO 2989 i.__set_errno mc_p.l(errno.o) + 0x00011558 0x00011558 0x00000174 Code RO 2907 i._fp_digits mc_p.l(printfa.o) + 0x000116cc 0x000116cc 0x000006ec Code RO 2908 i._printf_core mc_p.l(printfa.o) + 0x00011db8 0x00011db8 0x00000020 Code RO 2909 i._printf_post_padding mc_p.l(printfa.o) + 0x00011dd8 0x00011dd8 0x0000002c Code RO 2910 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011e04 0x00011e04 0x0000000a Code RO 2912 i._sputc mc_p.l(printfa.o) + 0x00011e0e 0x00011e0e 0x00000002 PAD + 0x00011e10 0x00011e10 0x000001cc Code RO 87 i.ap_dcs_read ap_demo.o + 0x00011fdc 0x00011fdc 0x000002c8 Code RO 88 i.ap_demo ap_demo.o + 0x000122a4 0x000122a4 0x0000002c Code RO 89 i.ap_get_reg_53 ap_demo.o + 0x000122d0 0x000122d0 0x00000054 Code RO 90 i.ap_get_reg_7A ap_demo.o + 0x00012324 0x00012324 0x000000c4 Code RO 91 i.ap_get_reg_df ap_demo.o + 0x000123e8 0x000123e8 0x00000020 Code RO 495 i.ap_get_tp_calibration_status_01 app_tp_st_touch.o + 0x00012408 0x00012408 0x00000044 Code RO 92 i.ap_reset_cb ap_demo.o + 0x0001244c 0x0001244c 0x00000044 Code RO 93 i.ap_set_backlight_51 ap_demo.o + 0x00012490 0x00012490 0x00000048 Code RO 94 i.ap_set_display_off ap_demo.o + 0x000124d8 0x000124d8 0x00000038 Code RO 95 i.ap_set_display_on ap_demo.o + 0x00012510 0x00012510 0x00000078 Code RO 96 i.ap_set_enter_sleep_mode ap_demo.o + 0x00012588 0x00012588 0x00000048 Code RO 97 i.ap_set_exit_sleep_mode ap_demo.o + 0x000125d0 0x000125d0 0x00000098 Code RO 496 i.ap_set_tp_calibration_04 app_tp_st_touch.o + 0x00012668 0x00012668 0x000000b0 Code RO 497 i.ap_tp_st_touch_calibration app_tp_st_touch.o + 0x00012718 0x00012718 0x000000a8 Code RO 500 i.ap_tp_st_touch_get_calibration_success_mark app_tp_st_touch.o + 0x000127c0 0x000127c0 0x0000001c Code RO 502 i.ap_tp_st_touch_scan_point_init app_tp_st_touch.o + 0x000127dc 0x000127dc 0x00000050 Code RO 504 i.ap_tp_st_touch_scan_point_record_event_exec app_tp_st_touch.o + 0x0001282c 0x0001282c 0x00000034 Code RO 505 i.ap_tp_st_touch_simulate_finger_release_event app_tp_st_touch.o + 0x00012860 0x00012860 0x000000ac Code RO 506 i.ap_tp_st_touch_software_reset app_tp_st_touch.o + 0x0001290c 0x0001290c 0x0000001c Code RO 2105 i.app_ADC_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00012928 0x00012928 0x00000024 Code RO 1397 i.app_AP_NRESET_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x0001294c 0x0001294c 0x0000001c Code RO 1398 i.app_EXTI_INT0_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012968 0x00012968 0x0000001c Code RO 1399 i.app_EXTI_INT1_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012984 0x00012984 0x0000001c Code RO 1400 i.app_EXTI_INT2_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000129a0 0x000129a0 0x0000001c Code RO 1401 i.app_EXTI_INT3_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000129bc 0x000129bc 0x0000001c Code RO 1402 i.app_EXTI_INT4_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000129d8 0x000129d8 0x0000001c Code RO 1403 i.app_EXTI_INT5_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000129f4 0x000129f4 0x0000001c Code RO 1404 i.app_EXTI_INT6_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012a10 0x00012a10 0x0000001c Code RO 1405 i.app_EXTI_INT7_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012a2c 0x00012a2c 0x00000048 Code RO 1144 i.app_HardFault_Handler CVWL368.lib(drv_common.o) + 0x00012a74 0x00012a74 0x00000018 Code RO 1508 i.app_I2C0_IRQn_Handler CVWL368.lib(drv_i2c_slave.o) + 0x00012a8c 0x00012a8c 0x00000010 Code RO 1474 i.app_I2C1_IRQn_Handler CVWL368.lib(drv_i2c_master.o) + 0x00012a9c 0x00012a9c 0x000001a4 Code RO 1715 i.app_LCDC_IRQn_Handler CVWL368.lib(hal_internal_vsync.o) + 0x00012c40 0x00012c40 0x00000088 Code RO 2047 i.app_MEMC_IRQn_Handler CVWL368.lib(drv_memc.o) + 0x00012cc8 0x00012cc8 0x00000298 Code RO 1819 i.app_MIPI_RX_IRQn_Handler CVWL368.lib(drv_dsi_rx.o) + 0x00012f60 0x00012f60 0x000000a0 Code RO 1875 i.app_MIPI_TX_IRQn_Handler CVWL368.lib(drv_dsi_tx.o) + 0x00013000 0x00013000 0x00000048 Code RO 2467 i.app_PWMDET_IRQn_Handler CVWL368.lib(drv_pwm.o) + 0x00013048 0x00013048 0x00000030 Code RO 1598 i.app_SPIM_IRQn_Handler CVWL368.lib(drv_spi_master.o) + 0x00013078 0x00013078 0x00000200 Code RO 2400 i.app_SPIS_IRQn_Handler CVWL368.lib(hal_spi_slave.o) + 0x00013278 0x00013278 0x00000020 Code RO 1630 i.app_SWIRE_IRQn_Handler CVWL368.lib(drv_swire.o) + 0x00013298 0x00013298 0x00000018 Code RO 1145 i.app_SysTick_Handler CVWL368.lib(drv_common.o) + 0x000132b0 0x000132b0 0x0000000a Code RO 1680 i.app_TIMER0_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000132ba 0x000132ba 0x0000000a Code RO 1681 i.app_TIMER1_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000132c4 0x000132c4 0x0000000a Code RO 1682 i.app_TIMER2_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000132ce 0x000132ce 0x0000000a Code RO 1683 i.app_TIMER3_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000132d8 0x000132d8 0x00000008 Code RO 2560 i.app_UART_IRQn_Handler CVWL368.lib(drv_uart.o) + 0x000132e0 0x000132e0 0x0000001c Code RO 2170 i.app_VIDC_IRQn_Handler CVWL368.lib(drv_vidc.o) + 0x000132fc 0x000132fc 0x0000001c Code RO 2106 i.app_VPRE_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00013318 0x00013318 0x00000038 Code RO 2619 i.app_WDG_IRQn_Handler CVWL368.lib(drv_wdg.o) + 0x00013350 0x00013350 0x00000010 Code RO 1259 i.app_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00013360 0x00013360 0x00000030 Code RO 1060 i.app_fls_ctrl_Handler CVWL368.lib(norflash.o) + 0x00013390 0x00013390 0x00000024 Code RO 254 i.app_tp_I2C_init app_tp_transfer.o + 0x000133b4 0x000133b4 0x000000a8 Code RO 507 i.app_tp_calibration_exec app_tp_st_touch.o + 0x0001345c 0x0001345c 0x0000009c Code RO 255 i.app_tp_i2cs_callback app_tp_transfer.o + 0x000134f8 0x000134f8 0x00000044 Code RO 256 i.app_tp_init app_tp_transfer.o + 0x0001353c 0x0001353c 0x00000020 Code RO 257 i.app_tp_m_read app_tp_transfer.o + 0x0001355c 0x0001355c 0x00000008 Code RO 259 i.app_tp_m_write app_tp_transfer.o + 0x00013564 0x00013564 0x000004c0 Code RO 406 i.app_tp_phone_analysis_data app_tp_for_custom_s8.o + 0x00013a24 0x00013a24 0x00000008 Code RO 262 i.app_tp_s_read app_tp_transfer.o + 0x00013a2c 0x00013a2c 0x00000008 Code RO 264 i.app_tp_s_write app_tp_transfer.o + 0x00013a34 0x00013a34 0x00000474 Code RO 408 i.app_tp_screen_analysis_int app_tp_for_custom_s8.o + 0x00013ea8 0x00013ea8 0x00000030 Code RO 265 i.app_tp_screen_init app_tp_transfer.o + 0x00013ed8 0x00013ed8 0x0000000c Code RO 266 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00013ee4 0x00013ee4 0x00000040 Code RO 267 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00013f24 0x00013f24 0x0000010c Code RO 268 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x00014030 0x00014030 0x00000014 Code RO 269 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x00014044 0x00014044 0x00000024 Code RO 597 i.board_Init board.o + 0x00014068 0x00014068 0x000004f0 Code RO 1716 i.calc_framebuffer_setting CVWL368.lib(hal_internal_vsync.o) + 0x00014558 0x00014558 0x000000c8 Code RO 2643 i.ceil m_ps.l(ceil.o) + 0x00014620 0x00014620 0x0000002c Code RO 1717 i.check_mipi_rx_tx_video_info CVWL368.lib(hal_internal_vsync.o) + 0x0001464c 0x0001464c 0x00000094 Code RO 1718 i.check_pkt_buf_rev CVWL368.lib(hal_internal_vsync.o) + 0x000146e0 0x000146e0 0x00000058 Code RO 1806 i.dcs_packet_fifo_alloc CVWL368.lib(dcs_packet_fifo.o) + 0x00014738 0x00014738 0x00000018 Code RO 1807 i.dcs_packet_fifo_init CVWL368.lib(dcs_packet_fifo.o) + 0x00014750 0x00014750 0x00000044 Code RO 1808 i.dcs_packet_free_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x00014794 0x00014794 0x00000024 Code RO 1809 i.dcs_packet_get_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x000147b8 0x000147b8 0x0000001c Code RO 1719 i.dcs_sw_filter CVWL368.lib(hal_internal_vsync.o) + 0x000147d4 0x000147d4 0x00000018 Code RO 1022 i.delayMs CVWL368.lib(tau_delay.o) + 0x000147ec 0x000147ec 0x00000022 Code RO 1023 i.delayUs CVWL368.lib(tau_delay.o) + 0x0001480e 0x0001480e 0x00000002 PAD + 0x00014810 0x00014810 0x00000038 Code RO 1649 i.drv_ap_rst_trig_edge_detect CVWL368.lib(drv_sys_cfg.o) + 0x00014848 0x00014848 0x0000000c Code RO 2370 i.drv_chip_info_get_info CVWL368.lib(drv_chip_info.o) + 0x00014854 0x00014854 0x00000040 Code RO 2371 i.drv_chip_info_init CVWL368.lib(drv_chip_info.o) + 0x00014894 0x00014894 0x000000b0 Code RO 2372 i.drv_chip_rx_info_check CVWL368.lib(drv_chip_info.o) + 0x00014944 0x00014944 0x00000014 Code RO 2373 i.drv_chip_rx_init_done CVWL368.lib(drv_chip_info.o) + 0x00014958 0x00014958 0x00000058 Code RO 1147 i.drv_common_enable_systick CVWL368.lib(drv_common.o) + 0x000149b0 0x000149b0 0x00000008 Code RO 1150 i.drv_common_system_init CVWL368.lib(drv_common.o) + 0x000149b8 0x000149b8 0x00000010 Code RO 1172 i.drv_crgu_config_reset_modules CVWL368.lib(drv_crgu.o) + 0x000149c8 0x000149c8 0x00000014 Code RO 1185 i.drv_crgu_set_ahb_pre_div CVWL368.lib(drv_crgu.o) + 0x000149dc 0x000149dc 0x00000014 Code RO 1186 i.drv_crgu_set_ahb_src CVWL368.lib(drv_crgu.o) + 0x000149f0 0x000149f0 0x00000020 Code RO 1189 i.drv_crgu_set_clock CVWL368.lib(drv_crgu.o) + 0x00014a10 0x00014a10 0x00000014 Code RO 1190 i.drv_crgu_set_dpi_mux_src CVWL368.lib(drv_crgu.o) + 0x00014a24 0x00014a24 0x00000018 Code RO 1191 i.drv_crgu_set_dpi_pre_div CVWL368.lib(drv_crgu.o) + 0x00014a3c 0x00014a3c 0x00000014 Code RO 1192 i.drv_crgu_set_dpi_pre_src CVWL368.lib(drv_crgu.o) + 0x00014a50 0x00014a50 0x00000014 Code RO 1193 i.drv_crgu_set_dsc_core_div CVWL368.lib(drv_crgu.o) + 0x00014a64 0x00014a64 0x00000014 Code RO 1194 i.drv_crgu_set_dsco_src CVWL368.lib(drv_crgu.o) + 0x00014a78 0x00014a78 0x00000014 Code RO 1195 i.drv_crgu_set_dsco_src_div CVWL368.lib(drv_crgu.o) + 0x00014a8c 0x00014a8c 0x00000014 Code RO 1196 i.drv_crgu_set_fb_div CVWL368.lib(drv_crgu.o) + 0x00014aa0 0x00014aa0 0x00000014 Code RO 1197 i.drv_crgu_set_fb_src CVWL368.lib(drv_crgu.o) + 0x00014ab4 0x00014ab4 0x00000014 Code RO 1200 i.drv_crgu_set_lcdc_div CVWL368.lib(drv_crgu.o) + 0x00014ac8 0x00014ac8 0x00000014 Code RO 1201 i.drv_crgu_set_lcdc_src CVWL368.lib(drv_crgu.o) + 0x00014adc 0x00014adc 0x00000014 Code RO 1202 i.drv_crgu_set_mipi_cfg_src CVWL368.lib(drv_crgu.o) + 0x00014af0 0x00014af0 0x00000018 Code RO 1203 i.drv_crgu_set_mipi_ref_src CVWL368.lib(drv_crgu.o) + 0x00014b08 0x00014b08 0x00000018 Code RO 1206 i.drv_crgu_set_reset CVWL368.lib(drv_crgu.o) + 0x00014b20 0x00014b20 0x00000014 Code RO 1207 i.drv_crgu_set_rxbr_div CVWL368.lib(drv_crgu.o) + 0x00014b34 0x00014b34 0x00000014 Code RO 1208 i.drv_crgu_set_rxbr_src CVWL368.lib(drv_crgu.o) + 0x00014b48 0x00014b48 0x00000014 Code RO 1210 i.drv_crgu_set_vidc_src CVWL368.lib(drv_crgu.o) + 0x00014b5c 0x00014b5c 0x00000018 Code RO 1263 i.drv_dma_clear_flag CVWL368.lib(drv_dma.o) + 0x00014b74 0x00014b74 0x0000001c Code RO 1264 i.drv_dma_create_handle CVWL368.lib(drv_dma.o) + 0x00014b90 0x00014b90 0x00000010 Code RO 1266 i.drv_dma_disenable_channel CVWL368.lib(drv_dma.o) + 0x00014ba0 0x00014ba0 0x00000010 Code RO 1268 i.drv_dma_enable_channel CVWL368.lib(drv_dma.o) + 0x00014bb0 0x00014bb0 0x00000024 Code RO 1269 i.drv_dma_enable_channel_interrupts CVWL368.lib(drv_dma.o) + 0x00014bd4 0x00014bd4 0x0000000c Code RO 1271 i.drv_dma_get_channel_flag CVWL368.lib(drv_dma.o) + 0x00014be0 0x00014be0 0x00000090 Code RO 1274 i.drv_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00014c70 0x00014c70 0x00000012 Code RO 1276 i.drv_dma_prepar_transfer CVWL368.lib(drv_dma.o) + 0x00014c82 0x00014c82 0x0000001a Code RO 1278 i.drv_dma_set_burst CVWL368.lib(drv_dma.o) + 0x00014c9c 0x00014c9c 0x00000006 Code RO 1279 i.drv_dma_set_callback CVWL368.lib(drv_dma.o) + 0x00014ca2 0x00014ca2 0x00000002 PAD + 0x00014ca4 0x00014ca4 0x00000044 Code RO 1281 i.drv_dma_set_transfer CVWL368.lib(drv_dma.o) + 0x00014ce8 0x00014ce8 0x00000036 Code RO 2383 i.drv_dsc_dec_convert_pps_rc_parameter CVWL368.lib(drv_dsc_dec.o) + 0x00014d1e 0x00014d1e 0x0000000c Code RO 2384 i.drv_dsc_dec_disable CVWL368.lib(drv_dsc_dec.o) + 0x00014d2a 0x00014d2a 0x00000002 PAD + 0x00014d2c 0x00014d2c 0x00000074 Code RO 2385 i.drv_dsc_dec_enable CVWL368.lib(drv_dsc_dec.o) + 0x00014da0 0x00014da0 0x0000000a Code RO 2386 i.drv_dsc_dec_get_nslc CVWL368.lib(drv_dsc_dec.o) + 0x00014daa 0x00014daa 0x00000028 Code RO 2388 i.drv_dsc_dec_set_u8_pps CVWL368.lib(drv_dsc_dec.o) + 0x00014dd2 0x00014dd2 0x00000002 PAD + 0x00014dd4 0x00014dd4 0x00000104 Code RO 1820 i.drv_dsi_rx_calc_ipi_tx_delay CVWL368.lib(drv_dsi_rx.o) + 0x00014ed8 0x00014ed8 0x00000040 Code RO 1821 i.drv_dsi_rx_enable_irq CVWL368.lib(drv_dsi_rx.o) + 0x00014f18 0x00014f18 0x00000050 Code RO 1822 i.drv_dsi_rx_get_color_bpp CVWL368.lib(drv_dsi_rx.o) + 0x00014f68 0x00014f68 0x0000001c Code RO 1823 i.drv_dsi_rx_get_color_pcc CVWL368.lib(drv_dsi_rx.o) + 0x00014f84 0x00014f84 0x00000008 Code RO 1824 i.drv_dsi_rx_get_compression_en CVWL368.lib(drv_dsi_rx.o) + 0x00014f8c 0x00014f8c 0x00000006 Code RO 1825 i.drv_dsi_rx_get_max_ret_size CVWL368.lib(drv_dsi_rx.o) + 0x00014f92 0x00014f92 0x0000000e Code RO 1829 i.drv_dsi_rx_power_up CVWL368.lib(drv_dsi_rx.o) + 0x00014fa0 0x00014fa0 0x00000020 Code RO 1830 i.drv_dsi_rx_set_ctrl_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014fc0 0x00014fc0 0x00000010 Code RO 1831 i.drv_dsi_rx_set_ddi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014fd0 0x00014fd0 0x00000004 Code RO 1833 i.drv_dsi_rx_set_inten CVWL368.lib(drv_dsi_rx.o) + 0x00014fd4 0x00014fd4 0x00000010 Code RO 1834 i.drv_dsi_rx_set_ipi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014fe4 0x00014fe4 0x00000046 Code RO 1836 i.drv_dsi_rx_set_lane_swap CVWL368.lib(drv_dsi_rx.o) + 0x0001502a 0x0001502a 0x00000026 Code RO 1837 i.drv_dsi_rx_set_resp_cnt CVWL368.lib(drv_dsi_rx.o) + 0x00015050 0x00015050 0x00000104 Code RO 1838 i.drv_dsi_rx_set_up_phy CVWL368.lib(drv_dsi_rx.o) + 0x00015154 0x00015154 0x0000000e Code RO 1839 i.drv_dsi_rx_shut_down CVWL368.lib(drv_dsi_rx.o) + 0x00015162 0x00015162 0x00000014 Code RO 1877 i.drv_dsi_tx_command_header CVWL368.lib(drv_dsi_tx.o) + 0x00015176 0x00015176 0x0000006c Code RO 1878 i.drv_dsi_tx_command_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x000151e2 0x000151e2 0x00000004 Code RO 1879 i.drv_dsi_tx_command_put_payload CVWL368.lib(drv_dsi_tx.o) + 0x000151e6 0x000151e6 0x00000018 Code RO 1880 i.drv_dsi_tx_config_eotp CVWL368.lib(drv_dsi_tx.o) + 0x000151fe 0x000151fe 0x00000008 Code RO 1881 i.drv_dsi_tx_config_int CVWL368.lib(drv_dsi_tx.o) + 0x00015206 0x00015206 0x00000008 Code RO 1882 i.drv_dsi_tx_dpi_lpcmd_time CVWL368.lib(drv_dsi_tx.o) + 0x0001520e 0x0001520e 0x0000000a Code RO 1883 i.drv_dsi_tx_dpi_mode CVWL368.lib(drv_dsi_tx.o) + 0x00015218 0x00015218 0x00000024 Code RO 1884 i.drv_dsi_tx_dpi_polarity CVWL368.lib(drv_dsi_tx.o) + 0x0001523c 0x0001523c 0x00000004 Code RO 1885 i.drv_dsi_tx_edpi_cmd_size CVWL368.lib(drv_dsi_tx.o) + 0x00015240 0x00015240 0x00000004 Code RO 1887 i.drv_dsi_tx_get_cmd_status CVWL368.lib(drv_dsi_tx.o) + 0x00015244 0x00015244 0x00000004 Code RO 1889 i.drv_dsi_tx_mode CVWL368.lib(drv_dsi_tx.o) + 0x00015248 0x00015248 0x00000018 Code RO 1890 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL368.lib(drv_dsi_tx.o) + 0x00015260 0x00015260 0x0000001a Code RO 1891 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL368.lib(drv_dsi_tx.o) + 0x0001527a 0x0001527a 0x0000000c Code RO 1893 i.drv_dsi_tx_phy_lane_mode CVWL368.lib(drv_dsi_tx.o) + 0x00015286 0x00015286 0x00000064 Code RO 1897 i.drv_dsi_tx_phy_status_ready CVWL368.lib(drv_dsi_tx.o) + 0x000152ea 0x000152ea 0x0000003e Code RO 1898 i.drv_dsi_tx_phy_status_stopstate CVWL368.lib(drv_dsi_tx.o) + 0x00015328 0x00015328 0x00000134 Code RO 1900 i.drv_dsi_tx_phy_test_setup CVWL368.lib(drv_dsi_tx.o) + 0x0001545c 0x0001545c 0x0000001e Code RO 1901 i.drv_dsi_tx_phy_time_cfg CVWL368.lib(drv_dsi_tx.o) + 0x0001547a 0x0001547a 0x00000008 Code RO 1905 i.drv_dsi_tx_powerup CVWL368.lib(drv_dsi_tx.o) + 0x00015482 0x00015482 0x0000001c Code RO 1906 i.drv_dsi_tx_response_mode CVWL368.lib(drv_dsi_tx.o) + 0x0001549e 0x0001549e 0x00000018 Code RO 1909 i.drv_dsi_tx_set_bta_ack CVWL368.lib(drv_dsi_tx.o) + 0x000154b6 0x000154b6 0x0000000c Code RO 1910 i.drv_dsi_tx_set_esc_div CVWL368.lib(drv_dsi_tx.o) + 0x000154c2 0x000154c2 0x00000002 PAD + 0x000154c4 0x000154c4 0x00000040 Code RO 1911 i.drv_dsi_tx_set_int CVWL368.lib(drv_dsi_tx.o) + 0x00015504 0x00015504 0x00000010 Code RO 1912 i.drv_dsi_tx_set_time_out_div CVWL368.lib(drv_dsi_tx.o) + 0x00015514 0x00015514 0x00000008 Code RO 1913 i.drv_dsi_tx_set_video_chunk CVWL368.lib(drv_dsi_tx.o) + 0x0001551c 0x0001551c 0x00000022 Code RO 1914 i.drv_dsi_tx_set_video_timing CVWL368.lib(drv_dsi_tx.o) + 0x0001553e 0x0001553e 0x00000008 Code RO 1916 i.drv_dsi_tx_shutdown CVWL368.lib(drv_dsi_tx.o) + 0x00015546 0x00015546 0x00000026 Code RO 1917 i.drv_dsi_tx_timeout_cfg CVWL368.lib(drv_dsi_tx.o) + 0x0001556c 0x0001556c 0x000000aa Code RO 1920 i.drv_dsi_tx_video_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00015616 0x00015616 0x00000016 Code RO 1921 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL368.lib(drv_dsi_tx.o) + 0x0001562c 0x0001562c 0x00000018 Code RO 1922 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL368.lib(drv_dsi_tx.o) + 0x00015644 0x00015644 0x0000002e Code RO 2321 i.drv_efuse_enter_inactive CVWL368.lib(drv_efuse.o) + 0x00015672 0x00015672 0x0000000c Code RO 2324 i.drv_efuse_int_enable CVWL368.lib(drv_efuse.o) + 0x0001567e 0x0001567e 0x00000032 Code RO 2325 i.drv_efuse_read CVWL368.lib(drv_efuse.o) + 0x000156b0 0x000156b0 0x00000018 Code RO 2326 i.drv_efuse_read_req CVWL368.lib(drv_efuse.o) + 0x000156c8 0x000156c8 0x00000018 Code RO 1406 i.drv_gpio_get_input_data CVWL368.lib(drv_gpio.o) + 0x000156e0 0x000156e0 0x0000000c Code RO 1408 i.drv_gpio_register_ap_reset_callback CVWL368.lib(drv_gpio.o) + 0x000156ec 0x000156ec 0x00000014 Code RO 1409 i.drv_gpio_register_callback CVWL368.lib(drv_gpio.o) + 0x00015700 0x00015700 0x00000050 Code RO 1411 i.drv_gpio_set_int CVWL368.lib(drv_gpio.o) + 0x00015750 0x00015750 0x00000020 Code RO 1412 i.drv_gpio_set_ioe CVWL368.lib(drv_gpio.o) + 0x00015770 0x00015770 0x00000010 Code RO 1413 i.drv_gpio_set_mode0 CVWL368.lib(drv_gpio.o) + 0x00015780 0x00015780 0x00000010 Code RO 1414 i.drv_gpio_set_mode1 CVWL368.lib(drv_gpio.o) + 0x00015790 0x00015790 0x00000010 Code RO 1415 i.drv_gpio_set_mode2 CVWL368.lib(drv_gpio.o) + 0x000157a0 0x000157a0 0x00000010 Code RO 1416 i.drv_gpio_set_mode3 CVWL368.lib(drv_gpio.o) + 0x000157b0 0x000157b0 0x00000020 Code RO 823 i.drv_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x000157d0 0x000157d0 0x00000130 Code RO 1417 i.drv_gpio_set_pull_state CVWL368.lib(drv_gpio.o) + 0x00015900 0x00015900 0x0000000c Code RO 1509 i.drv_i2c0_set_callback CVWL368.lib(drv_i2c_slave.o) + 0x0001590c 0x0001590c 0x0000000c Code RO 1475 i.drv_i2c1_set_callback CVWL368.lib(drv_i2c_master.o) + 0x00015918 0x00015918 0x00000034 Code RO 1449 i.drv_i2c_dma_callback CVWL368.lib(drv_i2c_dma.o) + 0x0001594c 0x0001594c 0x000000ac Code RO 1450 i.drv_i2c_dma_init CVWL368.lib(drv_i2c_dma.o) + 0x000159f8 0x000159f8 0x0000001a Code RO 1451 i.drv_i2c_enable_rx_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015a12 0x00015a12 0x00000018 Code RO 1452 i.drv_i2c_enable_tx_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015a2a 0x00015a2a 0x00000002 PAD + 0x00015a2c 0x00015a2c 0x00000060 Code RO 1477 i.drv_i2c_m_clear_it_pending_bit CVWL368.lib(drv_i2c_master.o) + 0x00015a8c 0x00015a8c 0x00000010 Code RO 1480 i.drv_i2c_m_enable CVWL368.lib(drv_i2c_master.o) + 0x00015a9c 0x00015a9c 0x00000038 Code RO 1481 i.drv_i2c_m_enable_intr CVWL368.lib(drv_i2c_master.o) + 0x00015ad4 0x00015ad4 0x0000008c Code RO 1487 i.drv_i2c_master_init CVWL368.lib(drv_i2c_master.o) + 0x00015b60 0x00015b60 0x0000005c Code RO 1453 i.drv_i2c_master_read_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015bbc 0x00015bbc 0x0000003c Code RO 1454 i.drv_i2c_master_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015bf8 0x00015bf8 0x0000003e Code RO 1455 i.drv_i2c_master_write_read_cmd CVWL368.lib(drv_i2c_dma.o) + 0x00015c36 0x00015c36 0x00000042 Code RO 1510 i.drv_i2c_s_clear_it_pending_bit CVWL368.lib(drv_i2c_slave.o) + 0x00015c78 0x00015c78 0x00000004 Code RO 1511 i.drv_i2c_s_config_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015c7c 0x00015c7c 0x00000008 Code RO 1512 i.drv_i2c_s_enable CVWL368.lib(drv_i2c_slave.o) + 0x00015c84 0x00015c84 0x00000014 Code RO 1513 i.drv_i2c_s_get_fifo_status CVWL368.lib(drv_i2c_slave.o) + 0x00015c98 0x00015c98 0x00000050 Code RO 1516 i.drv_i2c_s_set_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015ce8 0x00015ce8 0x0000001c Code RO 1517 i.drv_i2c_s_write_data CVWL368.lib(drv_i2c_slave.o) + 0x00015d04 0x00015d04 0x00000058 Code RO 1456 i.drv_i2c_set_dma_irq_callback CVWL368.lib(drv_i2c_dma.o) + 0x00015d5c 0x00015d5c 0x00000032 Code RO 1518 i.drv_i2c_slave_init CVWL368.lib(drv_i2c_slave.o) + 0x00015d8e 0x00015d8e 0x00000002 PAD + 0x00015d90 0x00015d90 0x00000018 Code RO 1457 i.drv_i2c_slave_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015da8 0x00015da8 0x00000018 Code RO 1989 i.drv_lcdc_config_bypass CVWL368.lib(drv_lcdc.o) + 0x00015dc0 0x00015dc0 0x00000030 Code RO 1990 i.drv_lcdc_config_ccm CVWL368.lib(drv_lcdc.o) + 0x00015df0 0x00015df0 0x00000016 Code RO 1991 i.drv_lcdc_config_disp_mode CVWL368.lib(drv_lcdc.o) + 0x00015e06 0x00015e06 0x00000024 Code RO 1992 i.drv_lcdc_config_dpi_polarity CVWL368.lib(drv_lcdc.o) + 0x00015e2a 0x00015e2a 0x00000026 Code RO 1993 i.drv_lcdc_config_dpi_timing CVWL368.lib(drv_lcdc.o) + 0x00015e50 0x00015e50 0x00000016 Code RO 1994 i.drv_lcdc_config_edpi_mode CVWL368.lib(drv_lcdc.o) + 0x00015e66 0x00015e66 0x00000016 Code RO 1995 i.drv_lcdc_config_endianness CVWL368.lib(drv_lcdc.o) + 0x00015e7c 0x00015e7c 0x0000000c Code RO 1996 i.drv_lcdc_config_input_size CVWL368.lib(drv_lcdc.o) + 0x00015e88 0x00015e88 0x0000001e Code RO 1997 i.drv_lcdc_config_int CVWL368.lib(drv_lcdc.o) + 0x00015ea6 0x00015ea6 0x00000022 Code RO 1998 i.drv_lcdc_config_int_single CVWL368.lib(drv_lcdc.o) + 0x00015ec8 0x00015ec8 0x00000022 Code RO 1999 i.drv_lcdc_config_overwrite CVWL368.lib(drv_lcdc.o) + 0x00015eea 0x00015eea 0x0000000c Code RO 2000 i.drv_lcdc_config_overwrite_rgb CVWL368.lib(drv_lcdc.o) + 0x00015ef6 0x00015ef6 0x0000001a Code RO 2001 i.drv_lcdc_config_partial_display_area CVWL368.lib(drv_lcdc.o) + 0x00015f10 0x00015f10 0x00000022 Code RO 2002 i.drv_lcdc_config_partial_display_enable CVWL368.lib(drv_lcdc.o) + 0x00015f32 0x00015f32 0x0000001a Code RO 2004 i.drv_lcdc_config_scale_up_coef CVWL368.lib(drv_lcdc.o) + 0x00015f4c 0x00015f4c 0x0000000c Code RO 2005 i.drv_lcdc_config_scale_up_step CVWL368.lib(drv_lcdc.o) + 0x00015f58 0x00015f58 0x0000004c Code RO 2006 i.drv_lcdc_config_src_parameter CVWL368.lib(drv_lcdc.o) + 0x00015fa4 0x00015fa4 0x00000006 Code RO 2007 i.drv_lcdc_config_thresh CVWL368.lib(drv_lcdc.o) + 0x00015faa 0x00015faa 0x00000012 Code RO 2008 i.drv_lcdc_ctrl_flow CVWL368.lib(drv_lcdc.o) + 0x00015fbc 0x00015fbc 0x00000020 Code RO 2010 i.drv_lcdc_enable_shadow_reg CVWL368.lib(drv_lcdc.o) + 0x00015fdc 0x00015fdc 0x00000040 Code RO 2011 i.drv_lcdc_set_int CVWL368.lib(drv_lcdc.o) + 0x0001601c 0x0001601c 0x00000014 Code RO 2013 i.drv_lcdc_set_video_hw_mode CVWL368.lib(drv_lcdc.o) + 0x00016030 0x00016030 0x00000020 Code RO 2014 i.drv_lcdc_start CVWL368.lib(drv_lcdc.o) + 0x00016050 0x00016050 0x0000000c Code RO 2048 i.drv_memc_clear_status CVWL368.lib(drv_memc.o) + 0x0001605c 0x0001605c 0x00000040 Code RO 2049 i.drv_memc_enable_irq CVWL368.lib(drv_memc.o) + 0x0001609c 0x0001609c 0x0000000c Code RO 2050 i.drv_memc_gen_a_tear_signal CVWL368.lib(drv_memc.o) + 0x000160a8 0x000160a8 0x00000012 Code RO 2051 i.drv_memc_get_status CVWL368.lib(drv_memc.o) + 0x000160ba 0x000160ba 0x00000010 Code RO 2052 i.drv_memc_rate_transfer_sel CVWL368.lib(drv_memc.o) + 0x000160ca 0x000160ca 0x0000000e Code RO 2053 i.drv_memc_sel_vsync CVWL368.lib(drv_memc.o) + 0x000160d8 0x000160d8 0x00000014 Code RO 2054 i.drv_memc_set_active_height CVWL368.lib(drv_memc.o) + 0x000160ec 0x000160ec 0x0000000c Code RO 2055 i.drv_memc_set_data_mode CVWL368.lib(drv_memc.o) + 0x000160f8 0x000160f8 0x00000010 Code RO 2058 i.drv_memc_set_double_buffer CVWL368.lib(drv_memc.o) + 0x00016108 0x00016108 0x00000012 Code RO 2059 i.drv_memc_set_double_buffer_reverse CVWL368.lib(drv_memc.o) + 0x0001611a 0x0001611a 0x00000010 Code RO 2061 i.drv_memc_set_fs_en_conditions CVWL368.lib(drv_memc.o) + 0x0001612a 0x0001612a 0x00000014 Code RO 2062 i.drv_memc_set_inten CVWL368.lib(drv_memc.o) + 0x0001613e 0x0001613e 0x00000002 PAD + 0x00016140 0x00016140 0x00000018 Code RO 2063 i.drv_memc_set_lcdc_st_conditions CVWL368.lib(drv_memc.o) + 0x00016158 0x00016158 0x0000001a Code RO 2064 i.drv_memc_set_ltpo_mode CVWL368.lib(drv_memc.o) + 0x00016172 0x00016172 0x0000000e Code RO 2068 i.drv_memc_set_tear_mode CVWL368.lib(drv_memc.o) + 0x00016180 0x00016180 0x00000028 Code RO 2069 i.drv_memc_set_tear_waveform CVWL368.lib(drv_memc.o) + 0x000161a8 0x000161a8 0x0000000e Code RO 2071 i.drv_memc_set_vidc_sync_cnt CVWL368.lib(drv_memc.o) + 0x000161b6 0x000161b6 0x00000002 PAD + 0x000161b8 0x000161b8 0x00000008 Code RO 1535 i.drv_param_init_get_ccm CVWL368.lib(drv_param_init.o) + 0x000161c0 0x000161c0 0x00000014 Code RO 1536 i.drv_param_init_get_scld_filter_h CVWL368.lib(drv_param_init.o) + 0x000161d4 0x000161d4 0x00000014 Code RO 1537 i.drv_param_init_get_scld_filter_v CVWL368.lib(drv_param_init.o) + 0x000161e8 0x000161e8 0x00000008 Code RO 1538 i.drv_param_init_get_sclu_filter CVWL368.lib(drv_param_init.o) + 0x000161f0 0x000161f0 0x00000014 Code RO 1539 i.drv_param_init_set_ccm CVWL368.lib(drv_param_init.o) + 0x00016204 0x00016204 0x00000024 Code RO 1542 i.drv_param_p2r_filter_init CVWL368.lib(drv_param_init.o) + 0x00016228 0x00016228 0x00000010 Code RO 2342 i.drv_phy_enable_calibration CVWL368.lib(drv_phy_common.o) + 0x00016238 0x00016238 0x0000003c Code RO 2343 i.drv_phy_get_calibration CVWL368.lib(drv_phy_common.o) + 0x00016274 0x00016274 0x00000060 Code RO 2344 i.drv_phy_get_pll_para CVWL368.lib(drv_phy_common.o) + 0x000162d4 0x000162d4 0x00000054 Code RO 2345 i.drv_phy_get_rate_para CVWL368.lib(drv_phy_common.o) + 0x00016328 0x00016328 0x00000010 Code RO 2346 i.drv_phy_test_clear CVWL368.lib(drv_phy_common.o) + 0x00016338 0x00016338 0x00000018 Code RO 2347 i.drv_phy_test_lock CVWL368.lib(drv_phy_common.o) + 0x00016350 0x00016350 0x00000020 Code RO 2349 i.drv_phy_test_write_1_byte CVWL368.lib(drv_phy_common.o) + 0x00016370 0x00016370 0x00000026 Code RO 2350 i.drv_phy_test_write_2_byte CVWL368.lib(drv_phy_common.o) + 0x00016396 0x00016396 0x0000001e Code RO 2351 i.drv_phy_test_write_code CVWL368.lib(drv_phy_common.o) + 0x000163b4 0x000163b4 0x00000020 Code RO 2352 i.drv_phy_test_write_data CVWL368.lib(drv_phy_common.o) + 0x000163d4 0x000163d4 0x00000020 Code RO 1558 i.drv_pwr_set_cp_mode CVWL368.lib(drv_pwr.o) + 0x000163f4 0x000163f4 0x00000018 Code RO 1560 i.drv_pwr_set_pvd_mode CVWL368.lib(drv_pwr.o) + 0x0001640c 0x0001640c 0x00000038 Code RO 1561 i.drv_pwr_set_system_clk_src CVWL368.lib(drv_pwr.o) + 0x00016444 0x00016444 0x0000000c Code RO 1840 i.drv_rx_phy_test_clear CVWL368.lib(drv_dsi_rx.o) + 0x00016450 0x00016450 0x00000010 Code RO 1841 i.drv_rx_phy_test_lock CVWL368.lib(drv_dsi_rx.o) + 0x00016460 0x00016460 0x00000014 Code RO 1843 i.drv_rx_phy_test_write_1_byte CVWL368.lib(drv_dsi_rx.o) + 0x00016474 0x00016474 0x00000016 Code RO 1844 i.drv_rx_phy_test_write_2_byte CVWL368.lib(drv_dsi_rx.o) + 0x0001648a 0x0001648a 0x0000000a Code RO 2107 i.drv_rxbr_clear_pkt_buffer CVWL368.lib(drv_rxbr.o) + 0x00016494 0x00016494 0x00000004 Code RO 2108 i.drv_rxbr_clear_status0 CVWL368.lib(drv_rxbr.o) + 0x00016498 0x00016498 0x0000005a Code RO 2110 i.drv_rxbr_enable_irq CVWL368.lib(drv_rxbr.o) + 0x000164f2 0x000164f2 0x00000002 PAD + 0x000164f4 0x000164f4 0x00000014 Code RO 2111 i.drv_rxbr_frame_drop_cfg CVWL368.lib(drv_rxbr.o) + 0x00016508 0x00016508 0x00000064 Code RO 2112 i.drv_rxbr_get_clk CVWL368.lib(drv_rxbr.o) + 0x0001656c 0x0001656c 0x00000004 Code RO 2113 i.drv_rxbr_get_col_addr CVWL368.lib(drv_rxbr.o) + 0x00016570 0x00016570 0x00000012 Code RO 1720 i.drv_rxbr_get_int_source CVWL368.lib(hal_internal_vsync.o) + 0x00016582 0x00016582 0x00000004 Code RO 2116 i.drv_rxbr_get_page_addr CVWL368.lib(drv_rxbr.o) + 0x00016586 0x00016586 0x00000012 Code RO 1721 i.drv_rxbr_get_status0 CVWL368.lib(hal_internal_vsync.o) + 0x00016598 0x00016598 0x0000000c Code RO 2118 i.drv_rxbr_hline_rcv0_cfg CVWL368.lib(drv_rxbr.o) + 0x000165a4 0x000165a4 0x00000008 Code RO 2119 i.drv_rxbr_hline_rcv_cfg CVWL368.lib(drv_rxbr.o) + 0x000165ac 0x000165ac 0x0000000c Code RO 2120 i.drv_rxbr_register_irq0_callback CVWL368.lib(drv_rxbr.o) + 0x000165b8 0x000165b8 0x0000000c Code RO 2121 i.drv_rxbr_register_irq1_callback CVWL368.lib(drv_rxbr.o) + 0x000165c4 0x000165c4 0x00000014 Code RO 2122 i.drv_rxbr_set_ack_pkt_header CVWL368.lib(drv_rxbr.o) + 0x000165d8 0x000165d8 0x000000cc Code RO 2123 i.drv_rxbr_set_cmd_filter CVWL368.lib(drv_rxbr.o) + 0x000166a4 0x000166a4 0x00000014 Code RO 2125 i.drv_rxbr_set_color_format CVWL368.lib(drv_rxbr.o) + 0x000166b8 0x000166b8 0x00000014 Code RO 2127 i.drv_rxbr_set_inten CVWL368.lib(drv_rxbr.o) + 0x000166cc 0x000166cc 0x00000010 Code RO 2128 i.drv_rxbr_set_ltpo_drop_th CVWL368.lib(drv_rxbr.o) + 0x000166dc 0x000166dc 0x00000026 Code RO 2130 i.drv_rxbr_set_usr_cfg CVWL368.lib(drv_rxbr.o) + 0x00016702 0x00016702 0x00000008 Code RO 2131 i.drv_rxbr_set_usr_col CVWL368.lib(drv_rxbr.o) + 0x0001670a 0x0001670a 0x00000008 Code RO 2132 i.drv_rxbr_set_usr_row CVWL368.lib(drv_rxbr.o) + 0x00016712 0x00016712 0x00000002 PAD + 0x00016714 0x00016714 0x00000020 Code RO 1606 i.drv_spi_m_read_data CVWL368.lib(drv_spi_master.o) + 0x00016734 0x00016734 0x0000001c Code RO 1631 i.drv_swire_enable CVWL368.lib(drv_swire.o) + 0x00016750 0x00016750 0x00000054 Code RO 1634 i.drv_swire_set_int CVWL368.lib(drv_swire.o) + 0x000167a4 0x000167a4 0x0000001c Code RO 1635 i.drv_swire_set_power_down CVWL368.lib(drv_swire.o) + 0x000167c0 0x000167c0 0x0000000c Code RO 1650 i.drv_sys_cfg_clear_all_int CVWL368.lib(drv_sys_cfg.o) + 0x000167cc 0x000167cc 0x00000028 Code RO 1651 i.drv_sys_cfg_clear_pending CVWL368.lib(drv_sys_cfg.o) + 0x000167f4 0x000167f4 0x00000018 Code RO 1654 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL368.lib(drv_sys_cfg.o) + 0x0001680c 0x0001680c 0x0000001c Code RO 1655 i.drv_sys_cfg_sel_ap_rst_trig CVWL368.lib(drv_sys_cfg.o) + 0x00016828 0x00016828 0x00000024 Code RO 1656 i.drv_sys_cfg_sel_gpio_group CVWL368.lib(drv_sys_cfg.o) + 0x0001684c 0x0001684c 0x00000024 Code RO 1657 i.drv_sys_cfg_sel_int_trig CVWL368.lib(drv_sys_cfg.o) + 0x00016870 0x00016870 0x00000010 Code RO 1659 i.drv_sys_cfg_set_dma_rx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016880 0x00016880 0x00000010 Code RO 1660 i.drv_sys_cfg_set_dma_tx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016890 0x00016890 0x00000024 Code RO 1661 i.drv_sys_cfg_set_int CVWL368.lib(drv_sys_cfg.o) + 0x000168b4 0x000168b4 0x0000001a Code RO 1684 i.drv_timer_clear_status_flags CVWL368.lib(drv_timer.o) + 0x000168ce 0x000168ce 0x00000020 Code RO 1685 i.drv_timer_enable CVWL368.lib(drv_timer.o) + 0x000168ee 0x000168ee 0x00000002 PAD + 0x000168f0 0x000168f0 0x00000010 Code RO 1686 i.drv_timer_get_instance CVWL368.lib(drv_timer.o) + 0x00016900 0x00016900 0x00000010 Code RO 1687 i.drv_timer_get_prescaler CVWL368.lib(drv_timer.o) + 0x00016910 0x00016910 0x00000044 Code RO 1689 i.drv_timer_handle_interrupt CVWL368.lib(drv_timer.o) + 0x00016954 0x00016954 0x00000014 Code RO 1690 i.drv_timer_register_callback CVWL368.lib(drv_timer.o) + 0x00016968 0x00016968 0x00000010 Code RO 1691 i.drv_timer_set_compare_val CVWL368.lib(drv_timer.o) + 0x00016978 0x00016978 0x00000054 Code RO 1692 i.drv_timer_set_int CVWL368.lib(drv_timer.o) + 0x000169cc 0x000169cc 0x00000028 Code RO 1693 i.drv_timer_set_prescaler CVWL368.lib(drv_timer.o) + 0x000169f4 0x000169f4 0x00000010 Code RO 1694 i.drv_timer_set_repeat CVWL368.lib(drv_timer.o) + 0x00016a04 0x00016a04 0x0000000a Code RO 1923 i.drv_tx_phy_test_clear CVWL368.lib(drv_dsi_tx.o) + 0x00016a0e 0x00016a0e 0x0000001c Code RO 1924 i.drv_tx_phy_test_enter CVWL368.lib(drv_dsi_tx.o) + 0x00016a2a 0x00016a2a 0x0000001c Code RO 1925 i.drv_tx_phy_test_exit CVWL368.lib(drv_dsi_tx.o) + 0x00016a46 0x00016a46 0x00000012 Code RO 1927 i.drv_tx_phy_test_write_1_byte CVWL368.lib(drv_dsi_tx.o) + 0x00016a58 0x00016a58 0x00000014 Code RO 1928 i.drv_tx_phy_test_write_2_byte CVWL368.lib(drv_dsi_tx.o) + 0x00016a6c 0x00016a6c 0x00000010 Code RO 1929 i.drv_tx_phy_test_write_code CVWL368.lib(drv_dsi_tx.o) + 0x00016a7c 0x00016a7c 0x00000008 Code RO 2171 i.drv_vidc_clear_irq CVWL368.lib(drv_vidc.o) + 0x00016a84 0x00016a84 0x00000018 Code RO 2175 i.drv_vidc_enable CVWL368.lib(drv_vidc.o) + 0x00016a9c 0x00016a9c 0x00000040 Code RO 2176 i.drv_vidc_enable_irq CVWL368.lib(drv_vidc.o) + 0x00016adc 0x00016adc 0x00000012 Code RO 2178 i.drv_vidc_get_irq_status CVWL368.lib(drv_vidc.o) + 0x00016aee 0x00016aee 0x00000002 PAD + 0x00016af0 0x00016af0 0x00000028 Code RO 2182 i.drv_vidc_init_module_enable CVWL368.lib(drv_vidc.o) + 0x00016b18 0x00016b18 0x0000000c Code RO 2183 i.drv_vidc_register_callback CVWL368.lib(drv_vidc.o) + 0x00016b24 0x00016b24 0x00000006 Code RO 2184 i.drv_vidc_reset CVWL368.lib(drv_vidc.o) + 0x00016b2a 0x00016b2a 0x0000003c Code RO 2186 i.drv_vidc_set_dst_parameter CVWL368.lib(drv_vidc.o) + 0x00016b66 0x00016b66 0x00000014 Code RO 2190 i.drv_vidc_set_irqen CVWL368.lib(drv_vidc.o) + 0x00016b7a 0x00016b7a 0x00000010 Code RO 2191 i.drv_vidc_set_mirror CVWL368.lib(drv_vidc.o) + 0x00016b8a 0x00016b8a 0x00000008 Code RO 2194 i.drv_vidc_set_p2r_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016b92 0x00016b92 0x00000026 Code RO 2195 i.drv_vidc_set_p2r_hinitb CVWL368.lib(drv_vidc.o) + 0x00016bb8 0x00016bb8 0x00000026 Code RO 2196 i.drv_vidc_set_p2r_hinitr CVWL368.lib(drv_vidc.o) + 0x00016bde 0x00016bde 0x00000002 PAD + 0x00016be0 0x00016be0 0x00000018 Code RO 2197 i.drv_vidc_set_pentile_swap CVWL368.lib(drv_vidc.o) + 0x00016bf8 0x00016bf8 0x0000000a Code RO 2198 i.drv_vidc_set_pu_ctrl CVWL368.lib(drv_vidc.o) + 0x00016c02 0x00016c02 0x00000010 Code RO 2199 i.drv_vidc_set_rotation CVWL368.lib(drv_vidc.o) + 0x00016c12 0x00016c12 0x0000000a Code RO 2200 i.drv_vidc_set_scld_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016c1c 0x00016c1c 0x0000000a Code RO 2201 i.drv_vidc_set_scld_hcoef1 CVWL368.lib(drv_vidc.o) + 0x00016c26 0x00016c26 0x00000012 Code RO 2202 i.drv_vidc_set_scld_step CVWL368.lib(drv_vidc.o) + 0x00016c38 0x00016c38 0x0000000a Code RO 2203 i.drv_vidc_set_scld_vcoef0 CVWL368.lib(drv_vidc.o) + 0x00016c42 0x00016c42 0x0000000a Code RO 2204 i.drv_vidc_set_scld_vcoef1 CVWL368.lib(drv_vidc.o) + 0x00016c4c 0x00016c4c 0x00000016 Code RO 2205 i.drv_vidc_set_src_parameter CVWL368.lib(drv_vidc.o) + 0x00016c62 0x00016c62 0x00000002 PAD + 0x00016c64 0x00016c64 0x00000010 Code RO 2620 i.drv_wdg_clear_counter CVWL368.lib(drv_wdg.o) + 0x00016c74 0x00016c74 0x00000010 Code RO 2621 i.drv_wdg_clear_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016c84 0x00016c84 0x00000010 Code RO 2624 i.drv_wdg_read_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016c94 0x00016c94 0x00000040 Code RO 2627 i.drv_wdg_set_int CVWL368.lib(drv_wdg.o) + 0x00016cd4 0x00016cd4 0x0000000a Code RO 1318 i.fls_clr_interrupt_flag CVWL368.lib(drv_fls.o) + 0x00016cde 0x00016cde 0x00000014 Code RO 1032 i.fputc CVWL368.lib(tau_log.o) + 0x00016cf2 0x00016cf2 0x00000002 PAD + 0x00016cf4 0x00016cf4 0x00000034 Code RO 626 i.hal_dsi_rx_ctrl_create_handle CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016d28 0x00016d28 0x0000009c Code RO 628 i.hal_dsi_rx_ctrl_deinit CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016dc4 0x00016dc4 0x00000084 Code RO 630 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e48 0x00016e48 0x00000028 Code RO 632 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e70 0x00016e70 0x00000028 Code RO 634 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e98 0x00016e98 0x00000060 Code RO 636 i.hal_dsi_rx_ctrl_init CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016ef8 0x00016ef8 0x000001a4 Code RO 637 i.hal_dsi_rx_ctrl_init_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001709c 0x0001709c 0x000000d8 Code RO 638 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017174 0x00017174 0x00000158 Code RO 639 i.hal_dsi_rx_ctrl_init_memc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000172cc 0x000172cc 0x00000148 Code RO 640 i.hal_dsi_rx_ctrl_init_rxbr CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017414 0x00017414 0x0000022c Code RO 641 i.hal_dsi_rx_ctrl_init_vidc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017640 0x00017640 0x000000f0 Code RO 645 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017730 0x00017730 0x00000034 Code RO 649 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017764 0x00017764 0x00000034 Code RO 652 i.hal_dsi_rx_ctrl_set_hw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017798 0x00017798 0x00000038 Code RO 653 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000177d0 0x000177d0 0x00000072 Code RO 658 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017842 0x00017842 0x00000002 PAD + 0x00017844 0x00017844 0x00000034 Code RO 659 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017878 0x00017878 0x0000003c Code RO 662 i.hal_dsi_rx_ctrl_start CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000178b4 0x000178b4 0x0000003c Code RO 663 i.hal_dsi_rx_ctrl_stop CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000178f0 0x000178f0 0x00000020 Code RO 665 i.hal_dsi_rx_ctrl_toggle_resolution CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017910 0x00017910 0x00000190 Code RO 719 i.hal_dsi_tx_calc_video_chunks CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017aa0 0x00017aa0 0x00000034 Code RO 720 i.hal_dsi_tx_config_params_for_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017ad4 0x00017ad4 0x00000450 Code RO 721 i.hal_dsi_tx_count_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f24 0x00017f24 0x00000094 Code RO 722 i.hal_dsi_tx_crop_pic CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017fb8 0x00017fb8 0x0000002c Code RO 724 i.hal_dsi_tx_ctrl_create_handle CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017fe4 0x00017fe4 0x00000084 Code RO 725 i.hal_dsi_tx_ctrl_deinit CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018068 0x00018068 0x0000004c Code RO 729 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180b4 0x000180b4 0x00000028 Code RO 731 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180dc 0x000180dc 0x000000a4 Code RO 733 i.hal_dsi_tx_ctrl_init CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018180 0x00018180 0x00000024 Code RO 734 i.hal_dsi_tx_ctrl_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181a4 0x000181a4 0x0000000c Code RO 735 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181b0 0x000181b0 0x00000020 Code RO 738 i.hal_dsi_tx_ctrl_set_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181d0 0x000181d0 0x00000014 Code RO 744 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181e4 0x000181e4 0x00000010 Code RO 745 i.hal_dsi_tx_ctrl_set_partial_disp CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181f4 0x000181f4 0x00000024 Code RO 746 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018218 0x00018218 0x0000009c Code RO 749 i.hal_dsi_tx_ctrl_start CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000182b4 0x000182b4 0x00000044 Code RO 750 i.hal_dsi_tx_ctrl_stop CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000182f8 0x000182f8 0x000000d8 Code RO 751 i.hal_dsi_tx_ctrl_write_array_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000183d0 0x000183d0 0x000000b0 Code RO 752 i.hal_dsi_tx_ctrl_write_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018480 0x00018480 0x00000044 Code RO 753 i.hal_dsi_tx_init_data_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000184c4 0x000184c4 0x00000030 Code RO 754 i.hal_dsi_tx_init_dpi_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000184f4 0x000184f4 0x00000020 Code RO 755 i.hal_dsi_tx_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018514 0x00018514 0x00000020 Code RO 756 i.hal_dsi_tx_init_phy_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018534 0x00018534 0x00000094 Code RO 757 i.hal_dsi_tx_init_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000185c8 0x000185c8 0x00000058 Code RO 758 i.hal_dsi_tx_init_video_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018620 0x00018620 0x00000044 Code RO 759 i.hal_dsi_tx_send_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018664 0x00018664 0x00000018 Code RO 824 i.hal_gpio_ctrl_eint CVWL368.lib(hal_gpio.o) + 0x0001867c 0x0001867c 0x00000012 Code RO 825 i.hal_gpio_get_input_data CVWL368.lib(hal_gpio.o) + 0x0001868e 0x0001868e 0x00000002 PAD + 0x00018690 0x00018690 0x00000040 Code RO 828 i.hal_gpio_init_eint CVWL368.lib(hal_gpio.o) + 0x000186d0 0x000186d0 0x00000020 Code RO 829 i.hal_gpio_init_input CVWL368.lib(hal_gpio.o) + 0x000186f0 0x000186f0 0x00000028 Code RO 830 i.hal_gpio_init_output CVWL368.lib(hal_gpio.o) + 0x00018718 0x00018718 0x00000018 Code RO 831 i.hal_gpio_reg_eint_cb CVWL368.lib(hal_gpio.o) + 0x00018730 0x00018730 0x00000050 Code RO 832 i.hal_gpio_set_ap_reset_int CVWL368.lib(hal_gpio.o) + 0x00018780 0x00018780 0x00000060 Code RO 834 i.hal_gpio_set_mode CVWL368.lib(hal_gpio.o) + 0x000187e0 0x000187e0 0x00000008 Code RO 835 i.hal_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x000187e8 0x000187e8 0x00000020 Code RO 837 i.hal_gpio_set_pull_state CVWL368.lib(hal_gpio.o) + 0x00018808 0x00018808 0x0000006c Code RO 863 i.hal_i2c_m_dma_init CVWL368.lib(hal_i2c_master.o) + 0x00018874 0x00018874 0x00000020 Code RO 864 i.hal_i2c_m_dma_read CVWL368.lib(hal_i2c_master.o) + 0x00018894 0x00018894 0x0000001c Code RO 865 i.hal_i2c_m_dma_write CVWL368.lib(hal_i2c_master.o) + 0x000188b0 0x000188b0 0x0000000c Code RO 867 i.hal_i2c_m_transfer_complate CVWL368.lib(hal_i2c_master.o) + 0x000188bc 0x000188bc 0x00000020 Code RO 868 i.hal_i2c_master_irq_callback CVWL368.lib(hal_i2c_master.o) + 0x000188dc 0x000188dc 0x00000010 Code RO 882 i.hal_i2c_s_dma_user_callback CVWL368.lib(hal_i2c_slave.o) + 0x000188ec 0x000188ec 0x0000004c Code RO 883 i.hal_i2c_s_dma_write CVWL368.lib(hal_i2c_slave.o) + 0x00018938 0x00018938 0x000000c8 Code RO 885 i.hal_i2c_s_init CVWL368.lib(hal_i2c_slave.o) + 0x00018a00 0x00018a00 0x00000014 Code RO 886 i.hal_i2c_s_nonblocking_read CVWL368.lib(hal_i2c_slave.o) + 0x00018a14 0x00018a14 0x0000000c Code RO 894 i.hal_i2c_s_set_transfer CVWL368.lib(hal_i2c_slave.o) + 0x00018a20 0x00018a20 0x00000174 Code RO 897 i.hal_i2c_slave_irq_callback CVWL368.lib(hal_i2c_slave.o) + 0x00018b94 0x00018b94 0x000000fc Code RO 1722 i.hal_internal_init_memc CVWL368.lib(hal_internal_vsync.o) + 0x00018c90 0x00018c90 0x00000010 Code RO 1724 i.hal_internal_sync_get_fb_setting CVWL368.lib(hal_internal_vsync.o) + 0x00018ca0 0x00018ca0 0x00000010 Code RO 1725 i.hal_internal_sync_get_hight_performan_mode CVWL368.lib(hal_internal_vsync.o) + 0x00018cb0 0x00018cb0 0x0000022c Code RO 1726 i.hal_internal_sync_input_resolution_change CVWL368.lib(hal_internal_vsync.o) + 0x00018edc 0x00018edc 0x00000010 Code RO 1729 i.hal_internal_update_dpi_param CVWL368.lib(hal_internal_vsync.o) + 0x00018eec 0x00018eec 0x0000010c Code RO 1730 i.hal_internal_video_mode_auto_sync CVWL368.lib(hal_internal_vsync.o) + 0x00018ff8 0x00018ff8 0x00000028 Code RO 1731 i.hal_internal_vsync_deinit CVWL368.lib(hal_internal_vsync.o) + 0x00019020 0x00019020 0x0000000c Code RO 1732 i.hal_internal_vsync_get_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x0001902c 0x0001902c 0x00000018 Code RO 1733 i.hal_internal_vsync_get_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00019044 0x00019044 0x0000000c Code RO 1734 i.hal_internal_vsync_get_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x00019050 0x00019050 0x0000000c Code RO 1735 i.hal_internal_vsync_get_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x0001905c 0x0001905c 0x00000118 Code RO 1736 i.hal_internal_vsync_init_rx CVWL368.lib(hal_internal_vsync.o) + 0x00019174 0x00019174 0x000000b0 Code RO 1737 i.hal_internal_vsync_init_tx CVWL368.lib(hal_internal_vsync.o) + 0x00019224 0x00019224 0x0000011c Code RO 1738 i.hal_internal_vsync_set_auto_hw_filter CVWL368.lib(hal_internal_vsync.o) + 0x00019340 0x00019340 0x00000014 Code RO 1740 i.hal_internal_vsync_set_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00019354 0x00019354 0x00000024 Code RO 1741 i.hal_internal_vsync_set_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00019378 0x00019378 0x00000050 Code RO 1742 i.hal_internal_vsync_set_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x000193c8 0x000193c8 0x00000080 Code RO 1743 i.hal_internal_vsync_set_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00019448 0x00019448 0x00000030 Code RO 1745 i.hal_internal_vsync_update_lcdc_addr CVWL368.lib(hal_internal_vsync.o) + 0x00019478 0x00019478 0x00000024 Code RO 760 i.hal_lcdc_config_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001949c 0x0001949c 0x00000058 Code RO 761 i.hal_lcdc_config_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000194f4 0x000194f4 0x00000014 Code RO 762 i.hal_lcdc_config_rgb_to_pentile CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019508 0x00019508 0x00000164 Code RO 763 i.hal_lcdc_config_upscaler CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001966c 0x0001966c 0x00000040 Code RO 764 i.hal_lcdc_init_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000196ac 0x000196ac 0x000001b0 Code RO 765 i.hal_lcdc_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001985c 0x0001985c 0x00000040 Code RO 766 i.hal_lcdc_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001989c 0x0001989c 0x0000000e Code RO 922 i.hal_spi_m_clear_rxfifo CVWL368.lib(hal_spi_master.o) + 0x000198aa 0x000198aa 0x00000012 Code RO 946 i.hal_swire_deinit CVWL368.lib(hal_swire.o) + 0x000198bc 0x000198bc 0x00000016 Code RO 948 i.hal_swire_open CVWL368.lib(hal_swire.o) + 0x000198d2 0x000198d2 0x00000008 Code RO 963 i.hal_system_enable_systick CVWL368.lib(hal_system.o) + 0x000198da 0x000198da 0x00000002 PAD + 0x000198dc 0x000198dc 0x00000088 Code RO 971 i.hal_system_init CVWL368.lib(hal_system.o) + 0x00019964 0x00019964 0x0000001c Code RO 972 i.hal_system_init_console CVWL368.lib(hal_system.o) + 0x00019980 0x00019980 0x00000008 Code RO 975 i.hal_system_set_phy_calibration CVWL368.lib(hal_system.o) + 0x00019988 0x00019988 0x00000008 Code RO 976 i.hal_system_set_pvd CVWL368.lib(hal_system.o) + 0x00019990 0x00019990 0x00000008 Code RO 977 i.hal_system_set_vcc CVWL368.lib(hal_system.o) + 0x00019998 0x00019998 0x0000002e Code RO 1004 i.hal_timer_deinit CVWL368.lib(hal_timer.o) + 0x000199c6 0x000199c6 0x0000001a Code RO 1006 i.hal_timer_init CVWL368.lib(hal_timer.o) + 0x000199e0 0x000199e0 0x00000048 Code RO 1008 i.hal_timer_start CVWL368.lib(hal_timer.o) + 0x00019a28 0x00019a28 0x00000028 Code RO 1010 i.hal_timer_stop CVWL368.lib(hal_timer.o) + 0x00019a50 0x00019a50 0x0000008c Code RO 1043 i.hal_uart_init CVWL368.lib(hal_uart.o) + 0x00019adc 0x00019adc 0x00000010 Code RO 1046 i.hal_uart_transmit_blocking CVWL368.lib(hal_uart.o) + 0x00019aec 0x00019aec 0x00000110 Code RO 2281 i.handle_init CVWL368.lib(irq_redirect .o) + 0x00019bfc 0x00019bfc 0x00000074 Code RO 98 i.init_mipi_tx ap_demo.o + 0x00019c70 0x00019c70 0x00000100 Code RO 99 i.init_panel ap_demo.o + 0x00019d70 0x00019d70 0x0000000a Code RO 3 i.main main.o + 0x00019d7a 0x00019d7a 0x00000002 PAD + 0x00019d7c 0x00019d7c 0x00000084 Code RO 100 i.open_mipi_rx ap_demo.o + 0x00019e00 0x00019e00 0x0000007c Code RO 101 i.pps_update_handle ap_demo.o + 0x00019e7c 0x00019e7c 0x000003f4 Code RO 1747 i.rx_get_dcs_packet_data CVWL368.lib(hal_internal_vsync.o) + 0x0001a270 0x0001a270 0x00000178 Code RO 1748 i.rx_partial_update CVWL368.lib(hal_internal_vsync.o) + 0x0001a3e8 0x0001a3e8 0x0000008c Code RO 1749 i.rx_receive_packet CVWL368.lib(hal_internal_vsync.o) + 0x0001a474 0x0001a474 0x00000180 Code RO 1750 i.rx_receive_pps CVWL368.lib(hal_internal_vsync.o) + 0x0001a5f4 0x0001a5f4 0x000000a4 Code RO 1751 i.rxbr_irq0_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a698 0x0001a698 0x000001d4 Code RO 1752 i.rxbr_irq1_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a86c 0x0001a86c 0x000000c4 Code RO 1753 i.soft_gen_te CVWL368.lib(hal_internal_vsync.o) + 0x0001a930 0x0001a930 0x000000c0 Code RO 1754 i.soft_gen_te_double_buffer CVWL368.lib(hal_internal_vsync.o) + 0x0001a9f0 0x0001a9f0 0x0000002c Code RO 102 i.soft_te_timer_cb ap_demo.o + 0x0001aa1c 0x0001aa1c 0x00000040 Code RO 103 i.soft_timer3_cb ap_demo.o + 0x0001aa5c 0x0001aa5c 0x00000048 Code RO 2647 i.sqrt m_ps.l(sqrt.o) + 0x0001aaa4 0x0001aaa4 0x00000070 Code RO 104 i.tp_heartbeat_exec ap_demo.o + 0x0001ab14 0x0001ab14 0x00000108 Code RO 1755 i.vidc_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001ac1c 0x0001ac1c 0x000000d0 Code RO 1756 i.vpre_err_reset CVWL368.lib(hal_internal_vsync.o) + 0x0001acec 0x0001acec 0x000001cc Code RO 1757 i.vsync_set_te_mode CVWL368.lib(hal_internal_vsync.o) + 0x0001aeb8 0x0001aeb8 0x000024b2 Data RO 105 .constdata ap_demo.o + 0x0001d36a 0x0001d36a 0x00000061 Data RO 410 .constdata app_tp_for_custom_s8.o + 0x0001d3cb 0x0001d3cb 0x00000001 Data RO 416 .constdata app_tp_for_custom_s8.o + 0x0001d3cc 0x0001d3cc 0x00000020 Data RO 509 .constdata app_tp_st_touch.o + 0x0001d3ec 0x0001d3ec 0x00000024 Data RO 768 .constdata CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001d410 0x0001d410 0x000000d2 Data RO 840 .constdata CVWL368.lib(hal_gpio.o) + 0x0001d4e2 0x0001d4e2 0x00000002 PAD + 0x0001d4e4 0x0001d4e4 0x00000020 Data RO 898 .constdata CVWL368.lib(hal_i2c_slave.o) + 0x0001d504 0x0001d504 0x00000008 Data RO 1543 .constdata CVWL368.lib(drv_param_init.o) + 0x0001d50c 0x0001d50c 0x00000186 Data RO 2353 .constdata CVWL368.lib(drv_phy_common.o) + 0x0001d692 0x0001d692 0x00000002 PAD + 0x0001d694 0x0001d694 0x0000004c Data RO 106 .conststring ap_demo.o + 0x0001d6e0 0x0001d6e0 0x00000048 Data RO 668 .conststring CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001d728 0x0001d728 0x00000043 Data RO 769 .conststring CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001d76b 0x0001d76b 0x00000001 PAD + 0x0001d76c 0x0001d76c 0x00000134 Data RO 1759 .conststring CVWL368.lib(hal_internal_vsync.o) + 0x0001d8a0 0x0001d8a0 0x00000030 Data RO 3009 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001d8d0, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001d8d0, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2282 .ARM.__AT_0x00070100 CVWL368.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001d8d0, Size: 0x00004440, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x00000e4c]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x00000028 Data RW 107 .data ap_demo.o + 0x000701f8 COMPRESSED 0x0000002e Data RW 271 .data app_tp_transfer.o + 0x00070226 COMPRESSED 0x00000002 PAD + 0x00070228 COMPRESSED 0x00000de0 Data RW 417 .data app_tp_for_custom_s8.o + 0x00071008 COMPRESSED 0x00000001 Data RW 420 .data app_tp_for_custom_s8.o + 0x00071009 COMPRESSED 0x00000001 Data RW 421 .data app_tp_for_custom_s8.o + 0x0007100a COMPRESSED 0x00000001 Data RW 426 .data app_tp_for_custom_s8.o + 0x0007100b COMPRESSED 0x00000003 Data RW 427 .data app_tp_for_custom_s8.o + 0x0007100e COMPRESSED 0x00000005 Data RW 428 .data app_tp_for_custom_s8.o + 0x00071013 COMPRESSED 0x00000001 PAD + 0x00071014 COMPRESSED 0x00000030 Data RW 440 .data app_tp_for_custom_s8.o + 0x00071044 COMPRESSED 0x00000028 Data RW 510 .data app_tp_st_touch.o + 0x0007106c COMPRESSED 0x00000008 Data RW 669 .data CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00071074 COMPRESSED 0x00000003 Data RW 770 .data CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00071077 COMPRESSED 0x00000001 Data RW 869 .data CVWL368.lib(hal_i2c_master.o) + 0x00071078 COMPRESSED 0x00000020 Data RW 899 .data CVWL368.lib(hal_i2c_slave.o) + 0x00071098 COMPRESSED 0x00000012 Data RW 1100 .data CVWL368.lib(norflash.o) + 0x000710aa COMPRESSED 0x00000002 PAD + 0x000710ac COMPRESSED 0x0000000c Data RW 1154 .data CVWL368.lib(drv_common.o) + 0x000710b8 COMPRESSED 0x00000004 Data RW 1421 .data CVWL368.lib(drv_gpio.o) + 0x000710bc COMPRESSED 0x00000008 Data RW 1459 .data CVWL368.lib(drv_i2c_dma.o) + 0x000710c4 COMPRESSED 0x00000004 Data RW 1488 .data CVWL368.lib(drv_i2c_master.o) + 0x000710c8 COMPRESSED 0x00000004 Data RW 1519 .data CVWL368.lib(drv_i2c_slave.o) + 0x000710cc COMPRESSED 0x000004a4 Data RW 1544 .data CVWL368.lib(drv_param_init.o) + 0x00071570 COMPRESSED 0x00000004 Data RW 1611 .data CVWL368.lib(drv_spi_master.o) + 0x00071574 COMPRESSED 0x00000008 Data RW 1637 .data CVWL368.lib(drv_swire.o) + 0x0007157c COMPRESSED 0x00000001 Data RW 1662 .data CVWL368.lib(drv_sys_cfg.o) + 0x0007157d COMPRESSED 0x00000003 PAD + 0x00071580 COMPRESSED 0x00000050 Data RW 1695 .data CVWL368.lib(drv_timer.o) + 0x000715d0 COMPRESSED 0x0000000c Data RW 1760 .data CVWL368.lib(hal_internal_vsync.o) + 0x000715dc COMPRESSED 0x00000008 Data RW 2134 .data CVWL368.lib(drv_rxbr.o) + 0x000715e4 COMPRESSED 0x00000004 Data RW 2207 .data CVWL368.lib(drv_vidc.o) + 0x000715e8 COMPRESSED 0x00000001 Data RW 2354 .data CVWL368.lib(drv_phy_common.o) + 0x000715e9 COMPRESSED 0x00000003 PAD + 0x000715ec COMPRESSED 0x0000000c Data RW 2374 .data CVWL368.lib(drv_chip_info.o) + 0x000715f8 COMPRESSED 0x0000000c Data RW 2484 .data CVWL368.lib(drv_pwm.o) + 0x00071604 COMPRESSED 0x00000008 Data RW 2562 .data CVWL368.lib(drv_uart.o) + 0x0007160c COMPRESSED 0x0000000c Data RW 2629 .data CVWL368.lib(drv_wdg.o) + 0x00071618 COMPRESSED 0x00000004 Data RW 2978 .data mc_p.l(stdout.o) + 0x0007161c COMPRESSED 0x00000004 Data RW 2990 .data mc_p.l(errno.o) + 0x00071620 - 0x00000190 Zero RW 270 .bss app_tp_transfer.o + 0x000717b0 - 0x0000000c Zero RW 508 .bss app_tp_st_touch.o + 0x000717bc - 0x000000c4 Zero RW 667 .bss CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00071880 - 0x0000004c Zero RW 767 .bss CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000718cc - 0x00000100 Zero RW 1033 .bss CVWL368.lib(tau_log.o) + 0x000719cc - 0x000000d0 Zero RW 1048 .bss CVWL368.lib(hal_uart.o) + 0x00071a9c - 0x0000001c Zero RW 1283 .bss CVWL368.lib(drv_dma.o) + 0x00071ab8 - 0x00000040 Zero RW 1420 .bss CVWL368.lib(drv_gpio.o) + 0x00071af8 - 0x00000140 Zero RW 1458 .bss CVWL368.lib(drv_i2c_dma.o) + 0x00071c38 - 0x00000984 Zero RW 1758 .bss CVWL368.lib(hal_internal_vsync.o) + 0x000725bc - 0x00001030 Zero RW 1811 .bss CVWL368.lib(dcs_packet_fifo.o) + 0x000735ec - 0x00000020 Zero RW 2418 .bss CVWL368.lib(hal_spi_slave.o) + 0x0007360c COMPRESSED 0x00000004 PAD + 0x00073610 - 0x00001000 Zero RW 615 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 2878 736 9470 40 0 39438 ap_demo.o + 2392 90 98 3611 0 14596 app_tp_for_custom_s8.o + 1092 238 32 40 12 9608 app_tp_st_touch.o + 1060 114 0 46 400 12761 app_tp_transfer.o + 36 6 0 0 0 517 board.o + 10 0 0 0 0 7247 main.o + 120 18 192 0 4096 2104 startup_armcm0.o + + ---------------------------------------------------------------------- + 7592 1202 9840 3740 4508 86271 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 4 0 0 3 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 272 96 0 12 0 256 drv_chip_info.o + 192 82 24 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 410 28 0 0 28 796 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1644 494 0 0 0 1336 drv_dsi_rx.o + 1528 118 0 0 0 2428 drv_dsi_tx.o + 132 0 0 0 0 256 drv_efuse.o + 10 0 0 0 0 60 drv_fls.o + 796 112 0 4 64 1236 drv_gpio.o + 600 82 0 8 320 624 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 292 36 0 4 0 580 drv_i2c_slave.o + 680 6 0 0 0 1444 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 112 36 8 1188 0 376 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 72 10 0 12 0 76 drv_pwm.o + 112 24 0 0 0 180 drv_pwr.o + 722 84 0 8 0 1456 drv_rxbr.o + 104 24 0 4 0 188 drv_spi_master.o + 172 20 0 8 0 260 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 374 34 0 80 0 932 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 168 22 0 12 0 316 drv_wdg.o + 3124 310 72 8 196 1528 hal_dsi_rx_ctrl.o + 4472 306 103 3 76 2492 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 696 72 32 32 0 408 hal_i2c_slave.o + 8080 1712 308 12 2436 2676 hal_internal_vsync.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 40 0 0 0 0 136 hal_swire.o + 196 32 0 0 0 408 hal_system.o + 184 6 0 0 0 276 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 36920 4838 1152 1460 7956 34820 Library Totals + 46 0 5 8 4 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 31494 4632 1147 1444 7952 31544 CVWL368.lib + 272 26 0 0 0 152 m_ps.l + 2838 126 0 8 0 1264 mc_p.l + 2270 54 0 0 0 1860 mf_p.l + + ---------------------------------------------------------------------- + 36920 4838 1152 1460 7956 34820 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 44512 6040 10992 5200 12464 96695 Grand Totals + 44512 6040 10992 3660 12464 96695 ELF Image Totals (compressed) + 44512 6040 10992 3660 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 55504 ( 54.20kB) + Total RW Size (RW Data + ZI Data) 17664 ( 17.25kB) + Total ROM Size (Code + RO Data + RW Data) 59164 ( 57.78kB) + +============================================================================== + diff --git a/project/ISP_368/Listings/ap_demo.txt b/project/ISP_368/Listings/ap_demo.txt index 8f62d11..482a17c 100644 --- a/project/ISP_368/Listings/ap_demo.txt +++ b/project/ISP_368/Listings/ap_demo.txt @@ -1,5 +1,5 @@ ; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] -; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\ap_demo.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\ap_demo.d --cpu=Cortex-M0 --apcs=interwork --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL368 -I.\RTE\_ISP_368 -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_368 --omf_browse=.\objects\ap_demo.crf ..\..\src\app\demo\ap_demo.c] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\ap_demo.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\ap_demo.d --cpu=Cortex-M0 --apcs=interwork --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL368 -I.\RTE\_ISP_368 -IC:\Users\ASUS\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Users\ASUS\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_368 --omf_browse=.\objects\ap_demo.crf ..\..\src\app\demo\ap_demo.c] THUMB AREA ||i.Gpio_swire_output||, CODE, READONLY, ALIGN=1 @@ -438,7 +438,7 @@ 00001c 2014 MOVS r0,#0x14 00001e f7fffffe BL hal_gpio_init_output ;;;2454 -;;;2455 TAU_LOGD("Note10Lite CSOT667 [%s %s]", __DATE__, __TIME__); +;;;2455 TAU_LOGD("N10Lite CSOT667 [%s %s]", __DATE__, __TIME__); 000022 a070 ADR r0,|L3.484| 000024 9000 STR r0,[sp,#0] 000026 a372 ADR r3,|L3.496| @@ -467,13 +467,13 @@ 000044 f7fffffe BL app_tp_init ;;;2469 #ifdef ADD_TIMER3_FUNCTION ;;;2470 tp_sleep_count=0; -000048 487b LDR r0,|L3.568| +000048 487a LDR r0,|L3.564| 00004a 2400 MOVS r4,#0 00004c 7004 STRB r4,[r0,#0] ;;;2471 tp_sleep_clk_count = 0; -00004e 487b LDR r0,|L3.572| +00004e 487a LDR r0,|L3.568| ;;;2472 phone_DisplayOFF_count=1; -000050 4e7b LDR r6,|L3.576| +000050 4e7a LDR r6,|L3.572| 000052 7004 STRB r4,[r0,#0] ;2471 000054 2501 MOVS r5,#1 000056 81f5 STRH r5,[r6,#0xe] @@ -482,7 +482,7 @@ 00005a f7fffffe BL hal_timer_init ;;;2474 hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); 00005e 2300 MOVS r3,#0 -000060 4a78 LDR r2,|L3.580| +000060 4a77 LDR r2,|L3.576| 000062 210a MOVS r1,#0xa 000064 2003 MOVS r0,#3 000066 f7fffffe BL hal_timer_start @@ -508,16 +508,16 @@ ;;;2494 if (phone_off_flag==0) ;;;2495 { ;;;2496 if(Flag_blacklight_EN) -00006a 4f77 LDR r7,|L3.584| +00006a 4f76 LDR r7,|L3.580| |L3.108| 00006c 7830 LDRB r0,[r6,#0] ;2479 ; start_display_on 00006e 2800 CMP r0,#0 ;2479 000070 d01f BEQ |L3.178| 000072 f7fffffe BL init_panel 000076 4a61 LDR r2,|L3.508| -000078 4974 LDR r1,|L3.588| +000078 4973 LDR r1,|L3.584| 00007a 3a4f SUBS r2,r2,#0x4f ;2479 -00007c a074 ADR r0,|L3.592| +00007c a073 ADR r0,|L3.588| 00007e f7fffffe BL LOG_printf 000082 70b5 STRB r5,[r6,#2] ;2479 000084 69f0 LDR r0,[r6,#0x1c] ;2479 ; g_tx_ctrl_handle @@ -534,7 +534,7 @@ 0000a2 7034 STRB r4,[r6,#0] ;2482 0000a4 f7fffffe BL app_tp_transfer_screen_start 0000a8 2202 MOVS r2,#2 ;2489 -0000aa 496f LDR r1,|L3.616| +0000aa 496e LDR r1,|L3.612| 0000ac 2001 MOVS r0,#1 ;2489 0000ae f7fffffe BL hal_gpio_set_ap_reset_int |L3.178| @@ -567,7 +567,7 @@ 0000d4 4a49 LDR r2,|L3.508| 0000d6 a14a ADR r1,|L3.512| 0000d8 322d ADDS r2,r2,#0x2d ;2500 -0000da a064 ADR r0,|L3.620| +0000da a063 ADR r0,|L3.616| 0000dc e00b B |L3.246| |L3.222| ;;;2506 { @@ -584,7 +584,7 @@ 0000ee 4a43 LDR r2,|L3.508| 0000f0 a143 ADR r1,|L3.512| 0000f2 3236 ADDS r2,r2,#0x36 -0000f4 a064 ADR r0,|L3.648| +0000f4 a063 ADR r0,|L3.644| |L3.246| 0000f6 f7fffffe BL LOG_printf |L3.250| @@ -735,7 +735,7 @@ |L3.410| ;;;2576 { ;;;2577 tp_sleep_in=1; -00019a 4842 LDR r0,|L3.676| +00019a 4841 LDR r0,|L3.672| 00019c 7005 STRB r5,[r0,#0] ;;;2578 // hal_gpio_set_output_data(IO_PAD_TD_LEDPWM, IO_LVL_HIGH); ;;;2579 @@ -772,7 +772,7 @@ 0001d2 2251 MOVS r2,#0x51 0001d4 0152 LSLS r2,r2,#5 0001d6 a10a ADR r1,|L3.512| -0001d8 a033 ADR r0,|L3.680| +0001d8 a032 ADR r0,|L3.676| 0001da f7fffffe BL LOG_printf ;;;2593 g_need_enter_sleep_mode = false; 0001de 72f4 STRB r4,[r6,#0xb] @@ -786,15 +786,15 @@ 0001e2 0000 DCW 0x0000 |L3.484| -0001e4 31353a35 DCB "15:52:33",0 -0001e8 323a3333 +0001e4 31313a33 DCB "11:39:01",0 +0001e8 393a3031 0001ec 00 0001ed 00 DCB 0 0001ee 00 DCB 0 0001ef 00 DCB 0 |L3.496| -0001f0 4a756e20 DCB "Jun 20 2023",0 -0001f4 32302032 +0001f0 4a756c20 DCB "Jul 6 2023",0 +0001f4 20362032 0001f8 30323300 |L3.508| DCD 0x00000997 @@ -804,73 +804,71 @@ 000208 4e543337 00020c 37303100 |L3.528| -000210 5b25735d DCB "[%s] (%04d) Note10Lite CSOT667 [%s %s]",0 +000210 5b25735d DCB "[%s] (%04d) N10Lite CSOT667 [%s %s]",0 000214 20282530 000218 34642920 -00021c 4e6f7465 -000220 31304c69 -000224 74652043 -000228 534f5436 -00022c 3637205b -000230 25732025 -000234 735d00 -000237 00 DCB 0 - |L3.568| +00021c 4e31304c +000220 69746520 +000224 43534f54 +000228 36363720 +00022c 5b257320 +000230 25735d00 + |L3.564| DCD tp_sleep_count - |L3.572| + |L3.568| DCD tp_sleep_clk_count - |L3.576| + |L3.572| DCD ||.data|| - |L3.580| + |L3.576| DCD soft_timer3_cb - |L3.584| + |L3.580| DCD Flag_blacklight_EN - |L3.588| + |L3.584| DCD ||i.init_panel||+0xc8 - |L3.592| -000250 5b25735d DCB "[%s] (%04d) init code",0 -000254 20282530 -000258 34642920 -00025c 696e6974 -000260 20636f64 -000264 6500 -000266 00 DCB 0 -000267 00 DCB 0 - |L3.616| + |L3.588| +00024c 5b25735d DCB "[%s] (%04d) init code",0 +000250 20282530 +000254 34642920 +000258 696e6974 +00025c 20636f64 +000260 6500 +000262 00 DCB 0 +000263 00 DCB 0 + |L3.612| DCD ap_reset_cb - |L3.620| -00026c 5b25735d DCB "[%s] (%04d) Phone off 28",0 -000270 20282530 -000274 34642920 -000278 50686f6e -00027c 65206f66 -000280 66203238 -000284 00 -000285 00 DCB 0 -000286 00 DCB 0 -000287 00 DCB 0 - |L3.648| -000288 5b25735d DCB "[%s] (%04d) Phone off 29",0 -00028c 20282530 -000290 34642920 -000294 50686f6e -000298 65206f66 -00029c 66203239 -0002a0 00 -0002a1 00 DCB 0 -0002a2 00 DCB 0 -0002a3 00 DCB 0 - |L3.676| + |L3.616| +000268 5b25735d DCB "[%s] (%04d) Phone off 28",0 +00026c 20282530 +000270 34642920 +000274 50686f6e +000278 65206f66 +00027c 66203238 +000280 00 +000281 00 DCB 0 +000282 00 DCB 0 +000283 00 DCB 0 + |L3.644| +000284 5b25735d DCB "[%s] (%04d) Phone off 29",0 +000288 20282530 +00028c 34642920 +000290 50686f6e +000294 65206f66 +000298 66203239 +00029c 00 +00029d 00 DCB 0 +00029e 00 DCB 0 +00029f 00 DCB 0 + |L3.672| DCD tp_sleep_in - |L3.680| -0002a8 5b25735d DCB "[%s] (%04d) disable video path\n",0 -0002ac 20282530 -0002b0 34642920 -0002b4 64697361 -0002b8 626c6520 -0002bc 76696465 -0002c0 6f207061 -0002c4 74680a00 + |L3.676| +0002a4 5b25735d DCB "[%s] (%04d) disable video path\n",0 +0002a8 20282530 +0002ac 34642920 +0002b0 64697361 +0002b4 626c6520 +0002b8 76696465 +0002bc 6f207061 +0002c0 74680a00 AREA ||i.ap_get_reg_53||, CODE, READONLY, ALIGN=2 @@ -4792,7 +4790,7 @@ AREA ||.rev16_text||, CODE THUMB EXPORT |__asm___9_ap_demo_c_c64640cd____REV16| -#line 467 "C:\\Keil_v5\\ARM\\PACK\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +#line 467 "C:\\Users\\ASUS\\AppData\\Local\\Arm\\Packs\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" |__asm___9_ap_demo_c_c64640cd____REV16| PROC #line 468 diff --git a/project/ISP_368/Listings/app_tp_for_custom_s8.txt b/project/ISP_368/Listings/app_tp_for_custom_s8.txt index bc83b68..ad5ed87 100644 --- a/project/ISP_368/Listings/app_tp_for_custom_s8.txt +++ b/project/ISP_368/Listings/app_tp_for_custom_s8.txt @@ -511,17 +511,17 @@ 00004a 2322 MOVS r3,#0x22 ;715 00004c 42ba CMP r2,r7 ;623 00004e d079 BEQ |L2.324| -000050 dc46 BGT |L2.224| +000050 dc45 BGT |L2.222| 000052 4fed LDR r7,|L2.1032| 000054 1bd1 SUBS r1,r2,r7 ;623 000056 42ba CMP r2,r7 ;623 000058 d075 BEQ |L2.326| -00005a dc27 BGT |L2.172| +00005a dc26 BGT |L2.170| 00005c 48eb LDR r0,|L2.1036| 00005e 1a11 SUBS r1,r2,r0 ;623 000060 4282 CMP r2,r0 ;623 000062 d071 BEQ |L2.328| -000064 dc0c BGT |L2.128| +000064 dc0b BGT |L2.126| 000066 3aff SUBS r2,r2,#0xff ;623 000068 1e52 SUBS r2,r2,#1 ;623 00006a d06e BEQ |L2.330| @@ -532,89 +532,89 @@ 000074 d06b BEQ |L2.334| 000076 2a0c CMP r2,#0xc ;623 000078 d1e3 BNE |L2.66| -00007a 48e1 LDR r0,|L2.1024| -00007c 3020 ADDS r0,r0,#0x20 ;626 -00007e e0f8 B |L2.626| - |L2.128| -000080 48e3 LDR r0,|L2.1040| -000082 1808 ADDS r0,r1,r0 ;623 -000084 d07a BEQ |L2.380| -000086 2101 MOVS r1,#1 ;623 -000088 0289 LSLS r1,r1,#10 ;623 -00008a 1a40 SUBS r0,r0,r1 ;623 -00008c d077 BEQ |L2.382| -00008e 2820 CMP r0,#0x20 ;623 -000090 d1d7 BNE |L2.66| -000092 7ab1 LDRB r1,[r6,#0xa] ;661 ; Flag_0A10 -000094 2007 MOVS r0,#7 ;664 -000096 2901 CMP r1,#1 ;661 -000098 d072 BEQ |L2.384| -00009a 7ab1 LDRB r1,[r6,#0xa] ;661 ; Flag_0A10 -00009c 2902 CMP r1,#2 ;661 -00009e d06f BEQ |L2.384| -0000a0 7ab1 LDRB r1,[r6,#0xa] ;666 ; Flag_0A10 -0000a2 2903 CMP r1,#3 ;666 -0000a4 d06d BEQ |L2.386| -0000a6 49db LDR r1,|L2.1044| - |L2.168| -0000a8 6029 STR r1,[r5,#0] ;663 -0000aa e0e4 B |L2.630| - |L2.172| -0000ac 27b3 MOVS r7,#0xb3 ;623 -0000ae 017f LSLS r7,r7,#5 ;623 -0000b0 1bca SUBS r2,r1,r7 ;623 -0000b2 42b9 CMP r1,r7 ;623 -0000b4 d072 BEQ |L2.412| -0000b6 dc0a BGT |L2.206| -0000b8 4ad7 LDR r2,|L2.1048| -0000ba 1889 ADDS r1,r1,r2 ;623 -0000bc d06f BEQ |L2.414| -0000be 2922 CMP r1,#0x22 ;623 -0000c0 d06e BEQ |L2.416| -0000c2 2944 CMP r1,#0x44 ;623 -0000c4 d06d BEQ |L2.418| -0000c6 2966 CMP r1,#0x66 ;623 -0000c8 d1bb BNE |L2.66| -0000ca 48d4 LDR r0,|L2.1052| -0000cc e023 B |L2.278| - |L2.206| -0000ce 2a22 CMP r2,#0x22 ;623 -0000d0 d068 BEQ |L2.420| -0000d2 2a44 CMP r2,#0x44 ;623 -0000d4 d067 BEQ |L2.422| -0000d6 2a66 CMP r2,#0x66 ;623 -0000d8 d1b3 BNE |L2.66| -0000da 48d0 LDR r0,|L2.1052| -0000dc 3088 ADDS r0,r0,#0x88 ;946 -0000de e01a B |L2.278| - |L2.224| -0000e0 27ff MOVS r7,#0xff ;623 -0000e2 3755 ADDS r7,r7,#0x55 ;623 -0000e4 1bca SUBS r2,r1,r7 ;623 -0000e6 42b9 CMP r1,r7 ;623 -0000e8 d072 BEQ |L2.464| -0000ea dc31 BGT |L2.336| -0000ec 29aa CMP r1,#0xaa ;623 -0000ee d070 BEQ |L2.466| -0000f0 dc17 BGT |L2.290| -0000f2 2922 CMP r1,#0x22 ;623 -0000f4 d06e BEQ |L2.468| -0000f6 2944 CMP r1,#0x44 ;623 -0000f8 d06d BEQ |L2.470| -0000fa 2966 CMP r1,#0x66 ;623 -0000fc d06c BEQ |L2.472| -0000fe 2988 CMP r1,#0x88 ;623 -000100 d19f BNE |L2.66| -000102 7ab1 LDRB r1,[r6,#0xa] ;804 ; Flag_0A10 -000104 2901 CMP r1,#1 ;804 -000106 d068 BEQ |L2.474| -000108 7ab1 LDRB r1,[r6,#0xa] ;809 ; Flag_0A10 -00010a 2902 CMP r1,#2 ;809 -00010c d070 BEQ |L2.496| -00010e 7ab0 LDRB r0,[r6,#0xa] ;814 ; Flag_0A10 -000110 2803 CMP r0,#3 ;814 -000112 d196 BNE |L2.66| -000114 48c2 LDR r0,|L2.1056| +00007a 48e5 LDR r0,|L2.1040| +00007c e0f9 B |L2.626| + |L2.126| +00007e 48e5 LDR r0,|L2.1044| +000080 1808 ADDS r0,r1,r0 ;623 +000082 d07b BEQ |L2.380| +000084 2101 MOVS r1,#1 ;623 +000086 0289 LSLS r1,r1,#10 ;623 +000088 1a40 SUBS r0,r0,r1 ;623 +00008a d078 BEQ |L2.382| +00008c 2820 CMP r0,#0x20 ;623 +00008e d1d8 BNE |L2.66| +000090 7ab1 LDRB r1,[r6,#0xa] ;661 ; Flag_0A10 +000092 2007 MOVS r0,#7 ;664 +000094 2901 CMP r1,#1 ;661 +000096 d073 BEQ |L2.384| +000098 7ab1 LDRB r1,[r6,#0xa] ;661 ; Flag_0A10 +00009a 2902 CMP r1,#2 ;661 +00009c d070 BEQ |L2.384| +00009e 7ab1 LDRB r1,[r6,#0xa] ;666 ; Flag_0A10 +0000a0 2903 CMP r1,#3 ;666 +0000a2 d06e BEQ |L2.386| +0000a4 49dc LDR r1,|L2.1048| + |L2.166| +0000a6 6029 STR r1,[r5,#0] ;663 +0000a8 e0e5 B |L2.630| + |L2.170| +0000aa 27b3 MOVS r7,#0xb3 ;623 +0000ac 017f LSLS r7,r7,#5 ;623 +0000ae 1bca SUBS r2,r1,r7 ;623 +0000b0 42b9 CMP r1,r7 ;623 +0000b2 d067 BEQ |L2.388| +0000b4 dc0a BGT |L2.204| +0000b6 4ad9 LDR r2,|L2.1052| +0000b8 1889 ADDS r1,r1,r2 ;623 +0000ba d070 BEQ |L2.414| +0000bc 2922 CMP r1,#0x22 ;623 +0000be d06f BEQ |L2.416| +0000c0 2944 CMP r1,#0x44 ;623 +0000c2 d06e BEQ |L2.418| +0000c4 2966 CMP r1,#0x66 ;623 +0000c6 d1bc BNE |L2.66| +0000c8 48d5 LDR r0,|L2.1056| +0000ca e024 B |L2.278| + |L2.204| +0000cc 2a22 CMP r2,#0x22 ;623 +0000ce d069 BEQ |L2.420| +0000d0 2a44 CMP r2,#0x44 ;623 +0000d2 d068 BEQ |L2.422| +0000d4 2a66 CMP r2,#0x66 ;623 +0000d6 d1b4 BNE |L2.66| +0000d8 48d1 LDR r0,|L2.1056| +0000da 3088 ADDS r0,r0,#0x88 ;946 +0000dc e01b B |L2.278| + |L2.222| +0000de 27ff MOVS r7,#0xff ;623 +0000e0 3755 ADDS r7,r7,#0x55 ;623 +0000e2 1bca SUBS r2,r1,r7 ;623 +0000e4 42b9 CMP r1,r7 ;623 +0000e6 d06e BEQ |L2.454| +0000e8 dc32 BGT |L2.336| +0000ea 29aa CMP r1,#0xaa ;623 +0000ec d06c BEQ |L2.456| +0000ee dc18 BGT |L2.290| +0000f0 2922 CMP r1,#0x22 ;623 +0000f2 d06a BEQ |L2.458| +0000f4 2944 CMP r1,#0x44 ;623 +0000f6 d069 BEQ |L2.460| +0000f8 2966 CMP r1,#0x66 ;623 +0000fa d068 BEQ |L2.462| +0000fc 2988 CMP r1,#0x88 ;623 +0000fe d1a0 BNE |L2.66| +000100 7ab1 LDRB r1,[r6,#0xa] ;804 ; Flag_0A10 +000102 2901 CMP r1,#1 ;804 +000104 d073 BEQ |L2.494| +000106 7ab1 LDRB r1,[r6,#0xa] ;809 ; Flag_0A10 +000108 2902 CMP r1,#2 ;809 +00010a d071 BEQ |L2.496| +00010c 7ab0 LDRB r0,[r6,#0xa] ;814 ; Flag_0A10 +00010e 2803 CMP r0,#3 ;814 +000110 d197 BNE |L2.66| +000112 48bf LDR r0,|L2.1040| +000114 3888 SUBS r0,r0,#0x88 ;816 |L2.278| 000116 e001 B |L2.284| |L2.280| @@ -652,18 +652,18 @@ |L2.328| 000148 e02e B |L2.424| |L2.330| -00014a e047 B |L2.476| +00014a e046 B |L2.474| |L2.332| -00014c e03b B |L2.454| +00014c e040 B |L2.464| |L2.334| -00014e e04a B |L2.486| +00014e e049 B |L2.484| |L2.336| 000150 23ff MOVS r3,#0xff ;623 000152 3311 ADDS r3,r3,#0x11 ;623 000154 1ad1 SUBS r1,r2,r3 ;623 000156 429a CMP r2,r3 ;623 000158 d07e BEQ |L2.600| -00015a dc13 BGT |L2.388| +00015a dc14 BGT |L2.390| 00015c 2a44 CMP r2,#0x44 ;623 00015e d07c BEQ |L2.602| 000160 2a88 CMP r2,#0x88 ;623 @@ -690,20 +690,20 @@ |L2.386| 000182 e047 B |L2.532| |L2.388| -000184 2944 CMP r1,#0x44 ;623 -000186 d06b BEQ |L2.608| -000188 2988 CMP r1,#0x88 ;623 -00018a d06a BEQ |L2.610| -00018c 48a6 LDR r0,|L2.1064| -00018e 42c1 CMN r1,r0 ;623 -000190 d1c6 BNE |L2.288| -000192 48a0 LDR r0,|L2.1044| -000194 3033 ADDS r0,r0,#0x33 ;966 -000196 6028 STR r0,[r5,#0] ;967 -000198 2018 MOVS r0,#0x18 ;967 -00019a e06c B |L2.630| - |L2.412| -00019c e087 B |L2.686| +000184 e093 B |L2.686| + |L2.390| +000186 2944 CMP r1,#0x44 ;623 +000188 d06a BEQ |L2.608| +00018a 2988 CMP r1,#0x88 ;623 +00018c d069 BEQ |L2.610| +00018e 48a6 LDR r0,|L2.1064| +000190 42c1 CMN r1,r0 ;623 +000192 d1c5 BNE |L2.288| +000194 48a0 LDR r0,|L2.1048| +000196 3033 ADDS r0,r0,#0x33 ;966 +000198 6028 STR r0,[r5,#0] ;967 +00019a 2018 MOVS r0,#0x18 ;967 +00019c e06b B |L2.630| |L2.414| 00019e e046 B |L2.558| |L2.416| @@ -718,8 +718,8 @@ 0001a8 2101 MOVS r1,#1 ;630 0001aa 2002 MOVS r0,#2 ;630 0001ac f7fffffe BL hal_gpio_set_output_data -0001b0 4893 LDR r0,|L2.1024| -0001b2 3021 ADDS r0,r0,#0x21 ;631 +0001b0 4897 LDR r0,|L2.1040| +0001b2 1c40 ADDS r0,r0,#1 ;631 0001b4 6028 STR r0,[r5,#0] ;632 0001b6 20c8 MOVS r0,#0xc8 ;632 0001b8 6020 STR r0,[r4,#0] ;633 @@ -731,46 +731,46 @@ |L2.452| 0001c4 bdf8 POP {r3-r7,pc} |L2.454| -0001c6 4893 LDR r0,|L2.1044| -0001c8 1dc0 ADDS r0,r0,#7 ;637 -0001ca 6028 STR r0,[r5,#0] ;638 -0001cc 2008 MOVS r0,#8 ;638 -0001ce e052 B |L2.630| +0001c6 e0d9 B |L2.892| + |L2.456| +0001c8 e14b B |L2.1122| + |L2.458| +0001ca e145 B |L2.1112| + |L2.460| +0001cc e0a6 B |L2.796| + |L2.462| +0001ce e145 B |L2.1116| |L2.464| -0001d0 e0d4 B |L2.892| - |L2.466| -0001d2 e146 B |L2.1122| - |L2.468| -0001d4 e140 B |L2.1112| - |L2.470| -0001d6 e0a1 B |L2.796| - |L2.472| -0001d8 e140 B |L2.1116| +0001d0 4891 LDR r0,|L2.1048| +0001d2 1dc0 ADDS r0,r0,#7 ;637 +0001d4 6028 STR r0,[r5,#0] ;638 +0001d6 2008 MOVS r0,#8 ;638 +0001d8 e04d B |L2.630| |L2.474| -0001da e0b2 B |L2.834| - |L2.476| -0001dc 488d LDR r0,|L2.1044| -0001de 300f ADDS r0,r0,#0xf ;641 -0001e0 6028 STR r0,[r5,#0] ;642 -0001e2 2010 MOVS r0,#0x10 ;642 -0001e4 e047 B |L2.630| - |L2.486| -0001e6 488b LDR r0,|L2.1044| -0001e8 3812 SUBS r0,r0,#0x12 ;645 -0001ea 6028 STR r0,[r5,#0] ;646 -0001ec 2004 MOVS r0,#4 ;646 -0001ee e042 B |L2.630| +0001da 488f LDR r0,|L2.1048| +0001dc 300f ADDS r0,r0,#0xf ;641 +0001de 6028 STR r0,[r5,#0] ;642 +0001e0 2010 MOVS r0,#0x10 ;642 +0001e2 e048 B |L2.630| + |L2.484| +0001e4 488c LDR r0,|L2.1048| +0001e6 3812 SUBS r0,r0,#0x12 ;645 +0001e8 6028 STR r0,[r5,#0] ;646 +0001ea 2004 MOVS r0,#4 ;646 +0001ec e043 B |L2.630| + |L2.494| +0001ee e0a8 B |L2.834| |L2.496| 0001f0 e0aa B |L2.840| |L2.498| 0001f2 7af0 LDRB r0,[r6,#0xb] ;649 ; Flag_0610 0001f4 2800 CMP r0,#0 ;649 0001f6 d002 BEQ |L2.510| -0001f8 4886 LDR r0,|L2.1044| +0001f8 4887 LDR r0,|L2.1048| 0001fa 3815 SUBS r0,r0,#0x15 ;651 0001fc e001 B |L2.514| |L2.510| -0001fe 4885 LDR r0,|L2.1044| +0001fe 4886 LDR r0,|L2.1048| 000200 3816 SUBS r0,r0,#0x16 ;656 |L2.514| 000202 6028 STR r0,[r5,#0] ;657 @@ -783,21 +783,21 @@ |L2.524| 00020c e0b3 B |L2.886| |L2.526| -00020e 4981 LDR r1,|L2.1044| +00020e 4982 LDR r1,|L2.1048| 000210 390e SUBS r1,r1,#0xe ;663 -000212 e749 B |L2.168| +000212 e748 B |L2.166| |L2.532| -000214 497f LDR r1,|L2.1044| +000214 4980 LDR r1,|L2.1048| 000216 1fc9 SUBS r1,r1,#7 ;668 -000218 e746 B |L2.168| +000218 e745 B |L2.166| |L2.538| -00021a 487e LDR r0,|L2.1044| +00021a 487f LDR r0,|L2.1048| 00021c 3814 SUBS r0,r0,#0x14 ;678 00021e 6028 STR r0,[r5,#0] ;679 000220 2002 MOVS r0,#2 ;679 000222 e028 B |L2.630| |L2.548| -000224 487b LDR r0,|L2.1044| +000224 487c LDR r0,|L2.1048| 000226 301f ADDS r0,r0,#0x1f ;682 000228 6028 STR r0,[r5,#0] ;683 00022a 2014 MOVS r0,#0x14 ;683 @@ -837,13 +837,13 @@ |L2.610| 000262 e0e7 B |L2.1076| |L2.612| -000264 486d LDR r0,|L2.1052| +000264 486e LDR r0,|L2.1056| 000266 3866 SUBS r0,r0,#0x66 ;714 000268 e755 B |L2.278| |L2.618| -00026a 496a LDR r1,|L2.1044| -00026c 314b ADDS r1,r1,#0x4b ;689 -00026e e71b B |L2.168| +00026a 4965 LDR r1,|L2.1024| +00026c 3120 ADDS r1,r1,#0x20 ;689 +00026e e71a B |L2.166| |L2.624| 000270 486e LDR r0,|L2.1068| |L2.626| @@ -852,7 +852,7 @@ |L2.630| 000276 6020 STR r0,[r4,#0] ;930 |L2.632| -000278 bdf8 POP {r3-r7,pc} +000278 e7a4 B |L2.452| |L2.634| 00027a 486c LDR r0,|L2.1068| 00027c 30c8 ADDS r0,r0,#0xc8 ;699 @@ -863,7 +863,7 @@ 000284 e7f5 B |L2.626| |L2.646| 000286 4967 LDR r1,|L2.1060| -000288 e70e B |L2.168| +000288 e70d B |L2.166| |L2.650| 00028a 7ab1 LDRB r1,[r6,#0xa] ;719 ; Flag_0A10 00028c 2901 CMP r1,#1 ;719 @@ -874,19 +874,19 @@ 000296 7ab0 LDRB r0,[r6,#0xa] ;729 ; Flag_0A10 000298 2803 CMP r0,#3 ;729 |L2.666| -00029a d1ed BNE |L2.632| -00029c 485f LDR r0,|L2.1052| +00029a d193 BNE |L2.452| +00029c 4860 LDR r0,|L2.1056| 00029e 3822 SUBS r0,r0,#0x22 ;731 0002a0 e739 B |L2.278| |L2.674| -0002a2 495c LDR r1,|L2.1044| -0002a4 314b ADDS r1,r1,#0x4b ;721 +0002a2 4957 LDR r1,|L2.1024| +0002a4 3120 ADDS r1,r1,#0x20 ;721 0002a6 e000 B |L2.682| |L2.680| 0002a8 495e LDR r1,|L2.1060| |L2.682| 0002aa 3144 ADDS r1,r1,#0x44 ;726 -0002ac e6fc B |L2.168| +0002ac e6fb B |L2.166| |L2.686| 0002ae 7ab1 LDRB r1,[r6,#0xa] ;736 ; Flag_0A10 0002b0 2901 CMP r1,#1 ;736 @@ -897,19 +897,19 @@ 0002ba 7ab0 LDRB r0,[r6,#0xa] ;746 ; Flag_0A10 0002bc 2803 CMP r0,#3 ;746 |L2.702| -0002be d1db BNE |L2.632| -0002c0 4856 LDR r0,|L2.1052| +0002be d181 BNE |L2.452| +0002c0 4857 LDR r0,|L2.1056| 0002c2 3022 ADDS r0,r0,#0x22 ;748 0002c4 e727 B |L2.278| |L2.710| -0002c6 4953 LDR r1,|L2.1044| -0002c8 314b ADDS r1,r1,#0x4b ;738 +0002c6 494e LDR r1,|L2.1024| +0002c8 3120 ADDS r1,r1,#0x20 ;738 0002ca e000 B |L2.718| |L2.716| 0002cc 4955 LDR r1,|L2.1060| |L2.718| 0002ce 3188 ADDS r1,r1,#0x88 ;743 -0002d0 e6ea B |L2.168| +0002d0 e6e9 B |L2.166| |L2.722| 0002d2 7ab1 LDRB r1,[r6,#0xa] ;753 ; Flag_0A10 0002d4 2901 CMP r1,#1 ;753 @@ -921,18 +921,18 @@ 0002e0 2803 CMP r0,#3 ;763 |L2.738| 0002e2 d1c9 BNE |L2.632| -0002e4 484d LDR r0,|L2.1052| +0002e4 484e LDR r0,|L2.1056| 0002e6 3066 ADDS r0,r0,#0x66 ;765 0002e8 e715 B |L2.278| |L2.746| -0002ea 494a LDR r1,|L2.1044| -0002ec 314b ADDS r1,r1,#0x4b ;755 +0002ea 4945 LDR r1,|L2.1024| +0002ec 3120 ADDS r1,r1,#0x20 ;755 0002ee e000 B |L2.754| |L2.752| 0002f0 494c LDR r1,|L2.1060| |L2.754| 0002f2 31cc ADDS r1,r1,#0xcc ;760 -0002f4 e6d8 B |L2.168| +0002f4 e6d7 B |L2.166| |L2.758| 0002f6 7ab1 LDRB r1,[r6,#0xa] ;770 ; Flag_0A10 0002f8 2901 CMP r1,#1 ;770 @@ -945,18 +945,18 @@ |L2.774| 000306 d1b7 BNE |L2.632| 000308 4845 LDR r0,|L2.1056| -00030a 3888 SUBS r0,r0,#0x88 ;782 +00030a 30aa ADDS r0,r0,#0xaa ;782 00030c e703 B |L2.278| |L2.782| -00030e 4941 LDR r1,|L2.1044| -000310 314b ADDS r1,r1,#0x4b ;772 +00030e 493c LDR r1,|L2.1024| +000310 3120 ADDS r1,r1,#0x20 ;772 000312 e000 B |L2.790| |L2.788| 000314 4943 LDR r1,|L2.1060| |L2.790| 000316 31ff ADDS r1,r1,#0xff ;777 000318 3111 ADDS r1,r1,#0x11 ;777 -00031a e6c5 B |L2.168| +00031a e6c4 B |L2.166| |L2.796| 00031c 7ab1 LDRB r1,[r6,#0xa] ;787 ; Flag_0A10 00031e 2901 CMP r1,#1 ;787 @@ -967,29 +967,29 @@ 000328 7ab1 LDRB r1,[r6,#0xa] ;797 ; Flag_0A10 00032a 2903 CMP r1,#3 ;797 00032c d1a4 BNE |L2.632| -00032e 493b LDR r1,|L2.1052| +00032e 493c LDR r1,|L2.1056| 000330 3966 SUBS r1,r1,#0x66 ;799 000332 e003 B |L2.828| |L2.820| -000334 4937 LDR r1,|L2.1044| -000336 314b ADDS r1,r1,#0x4b ;789 +000334 4932 LDR r1,|L2.1024| +000336 3120 ADDS r1,r1,#0x20 ;789 000338 e000 B |L2.828| |L2.826| 00033a 493a LDR r1,|L2.1060| |L2.828| 00033c 31ff ADDS r1,r1,#0xff ;794 00033e 3155 ADDS r1,r1,#0x55 ;794 -000340 e6b2 B |L2.168| +000340 e6b1 B |L2.166| |L2.834| -000342 4934 LDR r1,|L2.1044| -000344 314b ADDS r1,r1,#0x4b ;806 +000342 492f LDR r1,|L2.1024| +000344 3120 ADDS r1,r1,#0x20 ;806 000346 e000 B |L2.842| |L2.840| 000348 4936 LDR r1,|L2.1060| |L2.842| 00034a 31ff ADDS r1,r1,#0xff ;811 00034c 3199 ADDS r1,r1,#0x99 ;811 -00034e e6ab B |L2.168| +00034e e6aa B |L2.166| |L2.848| 000350 7ab1 LDRB r1,[r6,#0xa] ;821 ; Flag_0A10 000352 2901 CMP r1,#1 ;821 @@ -1001,22 +1001,22 @@ 00035e 2903 CMP r1,#3 ;831 |L2.864| 000360 d18a BNE |L2.632| -000362 492e LDR r1,|L2.1052| +000362 492f LDR r1,|L2.1056| 000364 3966 SUBS r1,r1,#0x66 ;833 000366 e003 B |L2.880| |L2.872| -000368 492a LDR r1,|L2.1044| -00036a 314b ADDS r1,r1,#0x4b ;823 +000368 4925 LDR r1,|L2.1024| +00036a 3120 ADDS r1,r1,#0x20 ;823 00036c e000 B |L2.880| |L2.878| 00036e 492d LDR r1,|L2.1060| |L2.880| 000370 31ff ADDS r1,r1,#0xff ;828 000372 31dd ADDS r1,r1,#0xdd ;828 -000374 e698 B |L2.168| +000374 e697 B |L2.166| |L2.886| -000376 4927 LDR r1,|L2.1044| -000378 314b ADDS r1,r1,#0x4b ;840 +000376 4922 LDR r1,|L2.1024| +000378 3120 ADDS r1,r1,#0x20 ;840 00037a e6e0 B |L2.318| |L2.892| 00037c 7ab1 LDRB r1,[r6,#0xa] ;850 ; Flag_0A10 @@ -1032,8 +1032,8 @@ 00038c 0092 LSLS r2,r2,#2 ;852 00038e e05a B |L2.1094| |L2.912| -000390 4920 LDR r1,|L2.1044| -000392 314b ADDS r1,r1,#0x4b ;852 +000390 491b LDR r1,|L2.1024| +000392 3120 ADDS r1,r1,#0x20 ;852 000394 e7f9 B |L2.906| |L2.918| 000396 7ab1 LDRB r1,[r6,#0xa] ;862 ; Flag_0A10 @@ -1048,8 +1048,8 @@ 0003a6 00d2 LSLS r2,r2,#3 ;864 0003a8 e04d B |L2.1094| |L2.938| -0003aa 491a LDR r1,|L2.1044| -0003ac 314b ADDS r1,r1,#0x4b ;864 +0003aa 4915 LDR r1,|L2.1024| +0003ac 3120 ADDS r1,r1,#0x20 ;864 0003ae e7f9 B |L2.932| |L2.944| 0003b0 7ab1 LDRB r1,[r6,#0xa] ;874 ; Flag_0A10 @@ -1064,12 +1064,12 @@ 0003c0 0092 LSLS r2,r2,#2 ;876 0003c2 e040 B |L2.1094| |L2.964| -0003c4 4913 LDR r1,|L2.1044| -0003c6 314b ADDS r1,r1,#0x4b ;876 +0003c4 490e LDR r1,|L2.1024| +0003c6 3120 ADDS r1,r1,#0x20 ;876 0003c8 e7f9 B |L2.958| |L2.970| -0003ca 4912 LDR r1,|L2.1044| -0003cc 314b ADDS r1,r1,#0x4b ;888 +0003ca 490d LDR r1,|L2.1024| +0003cc 3120 ADDS r1,r1,#0x20 ;888 0003ce e6d2 B |L2.374| |L2.976| 0003d0 7ab1 LDRB r1,[r6,#0xa] ;898 ; Flag_0A10 @@ -1084,8 +1084,8 @@ 0003e0 0092 LSLS r2,r2,#2 ;900 0003e2 e030 B |L2.1094| |L2.996| -0003e4 490b LDR r1,|L2.1044| -0003e6 314b ADDS r1,r1,#0x4b ;900 +0003e4 4906 LDR r1,|L2.1024| +0003e6 3120 ADDS r1,r1,#0x20 ;900 0003e8 e7f9 B |L2.990| |L2.1002| 0003ea 7ab1 LDRB r1,[r6,#0xa] ;910 ; Flag_0A10 @@ -1109,21 +1109,21 @@ |L2.1036| DCD 0x00000211 |L2.1040| - DCD 0xfffffc11 + DCD ||.data||+0xd18 |L2.1044| - DCD ||.constdata||+0x16 + DCD 0xfffffc11 |L2.1048| - DCD 0xffffea28 + DCD ||.constdata||+0x16 |L2.1052| - DCD ||.constdata||+0xb9f + DCD 0xffffea28 |L2.1056| - DCD ||.constdata||+0xcd1 + DCD ||.data||+0xb5e |L2.1060| - DCD ||.constdata||+0x6f9 + DCD ||.data||+0x6b8 |L2.1064| DCD 0xffff835b |L2.1068| - DCD ||.constdata||+0x4a1 + DCD ||.data||+0x460 |L2.1072| 000430 491f LDR r1,|L2.1200| 000432 e7e1 B |L2.1016| @@ -1140,7 +1140,7 @@ 000444 0092 LSLS r2,r2,#2 ;929 |L2.1094| 000446 1889 ADDS r1,r1,r2 ;929 -000448 e62e B |L2.168| +000448 e62d B |L2.166| |L2.1098| 00044a 4919 LDR r1,|L2.1200| 00044c e7f9 B |L2.1090| @@ -1172,7 +1172,7 @@ 000472 7880 LDRB r0,[r0,#2] ;977 000474 72b0 STRB r0,[r6,#0xa] ;977 |L2.1142| -000476 bdf8 POP {r3-r7,pc} +000476 e6a5 B |L2.452| |L2.1144| 000478 2100 MOVS r1,#0 00047a 2b10 CMP r3,#0x10 ;979 @@ -1187,37 +1187,36 @@ 00048c 2801 CMP r0,#1 ;1016 00048e d00c BEQ |L2.1194| 000490 71b1 STRB r1,[r6,#6] ;1022 - |L2.1170| -000492 bdf8 POP {r3-r7,pc} +000492 e697 B |L2.452| |L2.1172| 000494 7331 STRB r1,[r6,#0xc] ;981 |L2.1174| 000496 7880 LDRB r0,[r0,#2] ;1009 000498 2800 CMP r0,#0 ;1009 -00049a d1fa BNE |L2.1170| +00049a d1ec BNE |L2.1142| 00049c 70b1 STRB r1,[r6,#2] ;984 00049e 70f1 STRB r1,[r6,#3] ;985 -0004a0 bdf8 POP {r3-r7,pc} +0004a0 e690 B |L2.452| |L2.1186| 0004a2 7880 LDRB r0,[r0,#2] ;990 0004a4 72f0 STRB r0,[r6,#0xb] ;990 0004a6 7331 STRB r1,[r6,#0xc] ;991 -0004a8 bdf8 POP {r3-r7,pc} +0004a8 e68c B |L2.452| |L2.1194| 0004aa 2001 MOVS r0,#1 ;1018 0004ac 71b0 STRB r0,[r6,#6] ;1018 -0004ae bdf8 POP {r3-r7,pc} +0004ae e689 B |L2.452| ;;;1032 ENDP |L2.1200| - DCD ||.constdata||+0x61 + DCD ||.data||+0x20 |L2.1204| - DCD ||.constdata||+0x6f9 + DCD ||.data||+0x6b8 |L2.1208| - DCD ||.constdata||+0xb5b + DCD ||.data||+0xb1a |L2.1212| - DCD ||.constdata||+0xc6b + DCD ||.data||+0xc2a AREA ||i.app_tp_screen_analysis_const||, CODE, READONLY, ALIGN=2 @@ -1302,7 +1301,7 @@ ;;;273 ;;;274 send_point =0; 000002 2000 MOVS r0,#0 -000004 49fd LDR r1,|L4.1020| +000004 49f8 LDR r1,|L4.1000| 000006 b084 SUB sp,sp,#0x10 ;266 000008 7348 STRB r0,[r1,#0xd] ;;;275 cur_touchnum=0; @@ -1359,7 +1358,7 @@ ;;;297 { ;;;298 temp_len++; ;;;299 send_point++; -000040 4bee LDR r3,|L4.1020| +000040 4be9 LDR r3,|L4.1000| 000042 1c76 ADDS r6,r6,#1 ;296 000044 7b5a LDRB r2,[r3,#0xd] ; send_point 000046 b2f6 UXTB r6,r6 ;298 @@ -1397,30 +1396,29 @@ ;;;310 temp_len--; ;;;311 } ;;;312 phone_reg_coord_back[0] = cur_touchnum; -00006c 49e3 LDR r1,|L4.1020| +00006c 49df LDR r1,|L4.1004| 00006e 9800 LDR r0,[sp,#0] -000070 3120 ADDS r1,r1,#0x20 -000072 7008 STRB r0,[r1,#0] +000070 7008 STRB r0,[r1,#0] ;;;313 k=0; -000074 2600 MOVS r6,#0 +000072 2600 MOVS r6,#0 ;;;314 ;;;315 // TAU_LOGD("send_point=%d fingerprint_enable=%d fingerprint_flag=%d tp_sleep_in=%d temp=%d [%d, %d]", send_point, fingerprint_enable, fingerprint_flag, tp_sleep_in, temp, xx, yy); ;;;316 for(ii =0; ii>4)&0x0f); @@ -1497,286 +1495,282 @@ ;;;393 #endif ;;;394 } ;;;395 else if(temp==0x30) -00008c 2f30 CMP r7,#0x30 -00008e d072 BEQ |L4.374| -000090 e0e5 B |L4.606| - |L4.146| -000092 9905 LDR r1,[sp,#0x14] ;321 -000094 1840 ADDS r0,r0,r1 ;321 -000096 78c1 LDRB r1,[r0,#3] ;321 -000098 7883 LDRB r3,[r0,#2] ;321 -00009a 070a LSLS r2,r1,#28 ;321 -00009c 0d12 LSRS r2,r2,#20 ;321 -00009e 431a ORRS r2,r2,r3 ;321 -0000a0 7903 LDRB r3,[r0,#4] ;322 -0000a2 0909 LSRS r1,r1,#4 ;322 -0000a4 011b LSLS r3,r3,#4 ;322 -0000a6 430b ORRS r3,r3,r1 ;322 -0000a8 7941 LDRB r1,[r0,#5] ;323 -0000aa 9103 STR r1,[sp,#0xc] ;324 -0000ac 7840 LDRB r0,[r0,#1] ;324 -0000ae 2187 MOVS r1,#0x87 ;325 -0000b0 0900 LSRS r0,r0,#4 ;324 -0000b2 9001 STR r0,[sp,#4] ;325 -0000b4 461c MOV r4,r3 ;322 -0000b6 0310 LSLS r0,r2,#12 ;325 -0000b8 00c9 LSLS r1,r1,#3 ;325 -0000ba f7fffffe BL __aeabi_uidivmod -0000be 49d0 LDR r1,|L4.1024| -0000c0 4605 MOV r5,r0 ;325 -0000c2 4288 CMP r0,r1 ;326 -0000c4 d900 BLS |L4.200| -0000c6 460d MOV r5,r1 ;327 - |L4.200| -0000c8 214b MOVS r1,#0x4b ;328 -0000ca 0320 LSLS r0,r4,#12 ;328 -0000cc 0149 LSLS r1,r1,#5 ;328 -0000ce f7fffffe BL __aeabi_uidivmod -0000d2 4604 MOV r4,r0 ;328 -0000d4 48ca LDR r0,|L4.1024| -0000d6 4284 CMP r4,r0 ;329 -0000d8 d900 BLS |L4.220| -0000da 4604 MOV r4,r0 ;330 - |L4.220| -0000dc 48c7 LDR r0,|L4.1020| -0000de 7980 LDRB r0,[r0,#6] ;332 ; Flag_EA_EN -0000e0 2800 CMP r0,#0 ;332 -0000e2 d010 BEQ |L4.262| -0000e4 2019 MOVS r0,#0x19 ;334 -0000e6 0140 LSLS r0,r0,#5 ;334 -0000e8 4284 CMP r4,r0 ;334 -0000ea d203 BCS |L4.244| -0000ec 48c3 LDR r0,|L4.1020| -0000ee 79c1 LDRB r1,[r0,#7] ;336 ; Flag_touch_count -0000f0 1c49 ADDS r1,r1,#1 ;336 -0000f2 71c1 STRB r1,[r0,#7] ;336 - |L4.244| -0000f4 49c1 LDR r1,|L4.1020| -0000f6 79c8 LDRB r0,[r1,#7] ;338 ; Flag_touch_count -0000f8 2801 CMP r0,#1 ;338 -0000fa d904 BLS |L4.262| -0000fc 7a48 LDRB r0,[r1,#9] ;338 ; Flag_blacklight_EN -0000fe 2800 CMP r0,#0 ;338 -000100 d101 BNE |L4.262| -000102 2001 MOVS r0,#1 ;340 -000104 7248 STRB r0,[r1,#9] ;340 - |L4.262| -000106 9801 LDR r0,[sp,#4] ;345 -000108 2f10 CMP r7,#0x10 ;345 -00010a d029 BEQ |L4.352| -00010c 49bb LDR r1,|L4.1020| -00010e 0132 LSLS r2,r6,#4 ;352 -000110 3120 ADDS r1,r1,#0x20 ;352 -000112 0080 LSLS r0,r0,#2 ;352 -000114 1851 ADDS r1,r2,r1 ;352 -000116 3085 ADDS r0,r0,#0x85 ;352 -000118 7048 STRB r0,[r1,#1] ;352 - |L4.282| -00011a 0130 LSLS r0,r6,#4 ;354 -00011c 4bb7 LDR r3,|L4.1020| -00011e 0929 LSRS r1,r5,#4 ;354 -000120 3320 ADDS r3,r3,#0x20 ;354 -000122 18c0 ADDS r0,r0,r3 ;354 -000124 7081 STRB r1,[r0,#2] ;354 -000126 0921 LSRS r1,r4,#4 ;355 -000128 70c1 STRB r1,[r0,#3] ;355 -00012a 0722 LSLS r2,r4,#28 ;356 -00012c 0129 LSLS r1,r5,#4 ;356 -00012e 0f12 LSRS r2,r2,#28 ;356 -000130 4311 ORRS r1,r1,r2 ;356 -000132 7101 STRB r1,[r0,#4] ;356 -000134 210a MOVS r1,#0xa ;357 -000136 7141 STRB r1,[r0,#5] ;357 -000138 2104 MOVS r1,#4 ;358 -00013a 7181 STRB r1,[r0,#6] ;358 -00013c 9903 LDR r1,[sp,#0xc] ;359 -00013e 71c1 STRB r1,[r0,#7] ;359 -000140 2100 MOVS r1,#0 ;360 -000142 7201 STRB r1,[r0,#8] ;360 -000144 2299 MOVS r2,#0x99 ;362 -000146 7241 STRB r1,[r0,#9] ;361 -000148 7282 STRB r2,[r0,#0xa] ;362 -00014a 72c1 STRB r1,[r0,#0xb] ;363 -00014c 7301 STRB r1,[r0,#0xc] ;364 -00014e 7341 STRB r1,[r0,#0xd] ;365 -000150 7381 STRB r1,[r0,#0xe] ;366 -000152 1c76 ADDS r6,r6,#1 ;368 -000154 73c1 STRB r1,[r0,#0xf] ;367 -000156 7401 STRB r1,[r0,#0x10] ;368 -000158 b2f6 UXTB r6,r6 ;369 -00015a 2f20 CMP r7,#0x20 ;372 -00015c d00c BEQ |L4.376| -00015e e07e B |L4.606| - |L4.352| -000160 49a6 LDR r1,|L4.1020| -000162 0132 LSLS r2,r6,#4 ;347 -000164 3120 ADDS r1,r1,#0x20 ;347 -000166 0080 LSLS r0,r0,#2 ;347 -000168 1851 ADDS r1,r2,r1 ;347 -00016a 3045 ADDS r0,r0,#0x45 ;347 -00016c 7048 STRB r0,[r1,#1] ;347 -00016e 49a3 LDR r1,|L4.1020| -000170 2000 MOVS r0,#0 ;348 -000172 7108 STRB r0,[r1,#4] ;348 -000174 e7d1 B |L4.282| - |L4.374| -000176 e030 B |L4.474| - |L4.376| -000178 48a0 LDR r0,|L4.1020| -00017a 7bc2 LDRB r2,[r0,#0xf] ;372 ; fingerprint_enable -00017c 2a00 CMP r2,#0 ;372 -00017e d16e BNE |L4.606| -000180 7b42 LDRB r2,[r0,#0xd] ;372 ; send_point -000182 2a01 CMP r2,#1 ;372 -000184 d16b BNE |L4.606| -000186 7b80 LDRB r0,[r0,#0xe] ;372 ; fingerprint_flag -000188 2801 CMP r0,#1 ;372 -00018a d168 BNE |L4.606| -00018c 489d LDR r0,|L4.1028| -00018e 182a ADDS r2,r5,r0 ;374 -000190 20ff MOVS r0,#0xff ;374 -000192 30cc ADDS r0,r0,#0xcc ;374 -000194 4282 CMP r2,r0 ;374 -000196 d262 BCS |L4.606| -000198 489b LDR r0,|L4.1032| +00008a 2f30 CMP r7,#0x30 +00008c d06f BEQ |L4.366| +00008e e0e1 B |L4.596| + |L4.144| +000090 9905 LDR r1,[sp,#0x14] ;321 +000092 1840 ADDS r0,r0,r1 ;321 +000094 78c1 LDRB r1,[r0,#3] ;321 +000096 7883 LDRB r3,[r0,#2] ;321 +000098 070a LSLS r2,r1,#28 ;321 +00009a 0d12 LSRS r2,r2,#20 ;321 +00009c 431a ORRS r2,r2,r3 ;321 +00009e 7903 LDRB r3,[r0,#4] ;322 +0000a0 0909 LSRS r1,r1,#4 ;322 +0000a2 011b LSLS r3,r3,#4 ;322 +0000a4 430b ORRS r3,r3,r1 ;322 +0000a6 7941 LDRB r1,[r0,#5] ;323 +0000a8 9103 STR r1,[sp,#0xc] ;324 +0000aa 7840 LDRB r0,[r0,#1] ;324 +0000ac 2187 MOVS r1,#0x87 ;325 +0000ae 0900 LSRS r0,r0,#4 ;324 +0000b0 9001 STR r0,[sp,#4] ;325 +0000b2 461c MOV r4,r3 ;322 +0000b4 0310 LSLS r0,r2,#12 ;325 +0000b6 00c9 LSLS r1,r1,#3 ;325 +0000b8 f7fffffe BL __aeabi_uidivmod +0000bc 49cc LDR r1,|L4.1008| +0000be 4605 MOV r5,r0 ;325 +0000c0 4288 CMP r0,r1 ;326 +0000c2 d900 BLS |L4.198| +0000c4 460d MOV r5,r1 ;327 + |L4.198| +0000c6 214b MOVS r1,#0x4b ;328 +0000c8 0320 LSLS r0,r4,#12 ;328 +0000ca 0149 LSLS r1,r1,#5 ;328 +0000cc f7fffffe BL __aeabi_uidivmod +0000d0 4604 MOV r4,r0 ;328 +0000d2 48c7 LDR r0,|L4.1008| +0000d4 4284 CMP r4,r0 ;329 +0000d6 d900 BLS |L4.218| +0000d8 4604 MOV r4,r0 ;330 + |L4.218| +0000da 48c3 LDR r0,|L4.1000| +0000dc 7980 LDRB r0,[r0,#6] ;332 ; Flag_EA_EN +0000de 2800 CMP r0,#0 ;332 +0000e0 d010 BEQ |L4.260| +0000e2 2019 MOVS r0,#0x19 ;334 +0000e4 0140 LSLS r0,r0,#5 ;334 +0000e6 4284 CMP r4,r0 ;334 +0000e8 d203 BCS |L4.242| +0000ea 48bf LDR r0,|L4.1000| +0000ec 79c1 LDRB r1,[r0,#7] ;336 ; Flag_touch_count +0000ee 1c49 ADDS r1,r1,#1 ;336 +0000f0 71c1 STRB r1,[r0,#7] ;336 + |L4.242| +0000f2 49bd LDR r1,|L4.1000| +0000f4 79c8 LDRB r0,[r1,#7] ;338 ; Flag_touch_count +0000f6 2801 CMP r0,#1 ;338 +0000f8 d904 BLS |L4.260| +0000fa 7a48 LDRB r0,[r1,#9] ;338 ; Flag_blacklight_EN +0000fc 2800 CMP r0,#0 ;338 +0000fe d101 BNE |L4.260| +000100 2001 MOVS r0,#1 ;340 +000102 7248 STRB r0,[r1,#9] ;340 + |L4.260| +000104 9801 LDR r0,[sp,#4] ;345 +000106 2f10 CMP r7,#0x10 ;345 +000108 d027 BEQ |L4.346| +00010a 49b8 LDR r1,|L4.1004| +00010c 0132 LSLS r2,r6,#4 ;352 +00010e 0080 LSLS r0,r0,#2 ;352 +000110 1851 ADDS r1,r2,r1 ;352 +000112 3085 ADDS r0,r0,#0x85 ;352 +000114 7048 STRB r0,[r1,#1] ;352 + |L4.278| +000116 0130 LSLS r0,r6,#4 ;354 +000118 4bb4 LDR r3,|L4.1004| +00011a 0929 LSRS r1,r5,#4 ;354 +00011c 18c0 ADDS r0,r0,r3 ;354 +00011e 7081 STRB r1,[r0,#2] ;354 +000120 0921 LSRS r1,r4,#4 ;355 +000122 70c1 STRB r1,[r0,#3] ;355 +000124 0722 LSLS r2,r4,#28 ;356 +000126 0129 LSLS r1,r5,#4 ;356 +000128 0f12 LSRS r2,r2,#28 ;356 +00012a 4311 ORRS r1,r1,r2 ;356 +00012c 7101 STRB r1,[r0,#4] ;356 +00012e 210a MOVS r1,#0xa ;357 +000130 7141 STRB r1,[r0,#5] ;357 +000132 2104 MOVS r1,#4 ;358 +000134 7181 STRB r1,[r0,#6] ;358 +000136 9903 LDR r1,[sp,#0xc] ;359 +000138 71c1 STRB r1,[r0,#7] ;359 +00013a 2100 MOVS r1,#0 ;360 +00013c 7201 STRB r1,[r0,#8] ;360 +00013e 2299 MOVS r2,#0x99 ;362 +000140 7241 STRB r1,[r0,#9] ;361 +000142 7282 STRB r2,[r0,#0xa] ;362 +000144 72c1 STRB r1,[r0,#0xb] ;363 +000146 7301 STRB r1,[r0,#0xc] ;364 +000148 7341 STRB r1,[r0,#0xd] ;365 +00014a 7381 STRB r1,[r0,#0xe] ;366 +00014c 1c76 ADDS r6,r6,#1 ;368 +00014e 73c1 STRB r1,[r0,#0xf] ;367 +000150 7401 STRB r1,[r0,#0x10] ;368 +000152 b2f6 UXTB r6,r6 ;369 +000154 2f20 CMP r7,#0x20 ;372 +000156 d00b BEQ |L4.368| +000158 e07c B |L4.596| + |L4.346| +00015a 49a4 LDR r1,|L4.1004| +00015c 0132 LSLS r2,r6,#4 ;347 +00015e 0080 LSLS r0,r0,#2 ;347 +000160 1851 ADDS r1,r2,r1 ;347 +000162 3045 ADDS r0,r0,#0x45 ;347 +000164 7048 STRB r0,[r1,#1] ;347 +000166 49a0 LDR r1,|L4.1000| +000168 2000 MOVS r0,#0 ;348 +00016a 7108 STRB r0,[r1,#4] ;348 +00016c e7d3 B |L4.278| + |L4.366| +00016e e030 B |L4.466| + |L4.368| +000170 489d LDR r0,|L4.1000| +000172 7bc2 LDRB r2,[r0,#0xf] ;372 ; fingerprint_enable +000174 2a00 CMP r2,#0 ;372 +000176 d16d BNE |L4.596| +000178 7b42 LDRB r2,[r0,#0xd] ;372 ; send_point +00017a 2a01 CMP r2,#1 ;372 +00017c d16a BNE |L4.596| +00017e 7b80 LDRB r0,[r0,#0xe] ;372 ; fingerprint_flag +000180 2801 CMP r0,#1 ;372 +000182 d167 BNE |L4.596| +000184 489b LDR r0,|L4.1012| +000186 182a ADDS r2,r5,r0 ;374 +000188 20ff MOVS r0,#0xff ;374 +00018a 30cc ADDS r0,r0,#0xcc ;374 +00018c 4282 CMP r2,r0 ;374 +00018e d261 BCS |L4.596| +000190 4899 LDR r0,|L4.1016| +000192 4284 CMP r4,r0 ;374 +000194 d95e BLS |L4.596| +000196 4896 LDR r0,|L4.1008| +000198 38eb SUBS r0,r0,#0xeb ;374 00019a 4284 CMP r4,r0 ;374 -00019c d95f BLS |L4.606| -00019e 4898 LDR r0,|L4.1024| -0001a0 38eb SUBS r0,r0,#0xeb ;374 -0001a2 4284 CMP r4,r0 ;374 -0001a4 d25b BCS |L4.606| -0001a6 208c MOVS r0,#0x8c ;376 -0001a8 7018 STRB r0,[r3,#0] ;376 -0001aa 20f1 MOVS r0,#0xf1 ;377 -0001ac 7058 STRB r0,[r3,#1] ;377 -0001ae 2002 MOVS r0,#2 ;378 -0001b0 7098 STRB r0,[r3,#2] ;378 -0001b2 204e MOVS r0,#0x4e ;379 -0001b4 70d8 STRB r0,[r3,#3] ;379 -0001b6 2001 MOVS r0,#1 ;380 -0001b8 7118 STRB r0,[r3,#4] ;380 -0001ba 2221 MOVS r2,#0x21 ;381 -0001bc 715a STRB r2,[r3,#5] ;381 -0001be 2285 MOVS r2,#0x85 ;382 -0001c0 719a STRB r2,[r3,#6] ;382 -0001c2 2230 MOVS r2,#0x30 ;383 -0001c4 71da STRB r2,[r3,#7] ;383 -0001c6 7219 STRB r1,[r3,#8] ;384 -0001c8 7259 STRB r1,[r3,#9] ;385 -0001ca 7299 STRB r1,[r3,#0xa] ;386 -0001cc 21fe MOVS r1,#0xfe ;387 -0001ce 72d9 STRB r1,[r3,#0xb] ;387 -0001d0 2122 MOVS r1,#0x22 ;388 -0001d2 7319 STRB r1,[r3,#0xc] ;388 -0001d4 4989 LDR r1,|L4.1020| -0001d6 73c8 STRB r0,[r1,#0xf] ;389 -0001d8 e041 B |L4.606| - |L4.474| +00019c d25a BCS |L4.596| +00019e 208c MOVS r0,#0x8c ;376 +0001a0 7018 STRB r0,[r3,#0] ;376 +0001a2 20f1 MOVS r0,#0xf1 ;377 +0001a4 7058 STRB r0,[r3,#1] ;377 +0001a6 2002 MOVS r0,#2 ;378 +0001a8 7098 STRB r0,[r3,#2] ;378 +0001aa 204e MOVS r0,#0x4e ;379 +0001ac 70d8 STRB r0,[r3,#3] ;379 +0001ae 2001 MOVS r0,#1 ;380 +0001b0 7118 STRB r0,[r3,#4] ;380 +0001b2 2221 MOVS r2,#0x21 ;381 +0001b4 715a STRB r2,[r3,#5] ;381 +0001b6 2285 MOVS r2,#0x85 ;382 +0001b8 719a STRB r2,[r3,#6] ;382 +0001ba 2230 MOVS r2,#0x30 ;383 +0001bc 71da STRB r2,[r3,#7] ;383 +0001be 7219 STRB r1,[r3,#8] ;384 +0001c0 7259 STRB r1,[r3,#9] ;385 +0001c2 7299 STRB r1,[r3,#0xa] ;386 +0001c4 21fe MOVS r1,#0xfe ;387 +0001c6 72d9 STRB r1,[r3,#0xb] ;387 +0001c8 2122 MOVS r1,#0x22 ;388 +0001ca 7319 STRB r1,[r3,#0xc] ;388 +0001cc 4986 LDR r1,|L4.1000| +0001ce 73c8 STRB r0,[r1,#0xf] ;389 +0001d0 e040 B |L4.596| + |L4.466| ;;;396 { ;;;397 xx = ((rxbuffer[8*ii+3]&0x0f) << 8) | (rxbuffer[8*ii+2]); -0001da 9905 LDR r1,[sp,#0x14] -0001dc 1840 ADDS r0,r0,r1 -0001de 78c1 LDRB r1,[r0,#3] -0001e0 7883 LDRB r3,[r0,#2] -0001e2 070a LSLS r2,r1,#28 -0001e4 0d12 LSRS r2,r2,#20 -0001e6 431a ORRS r2,r2,r3 +0001d2 9905 LDR r1,[sp,#0x14] +0001d4 1840 ADDS r0,r0,r1 +0001d6 78c1 LDRB r1,[r0,#3] +0001d8 7883 LDRB r3,[r0,#2] +0001da 070a LSLS r2,r1,#28 +0001dc 0d12 LSRS r2,r2,#20 +0001de 431a ORRS r2,r2,r3 ;;;398 yy = (rxbuffer[8*ii+4] << 4) | ((rxbuffer[8*ii+3]>>4)&0x0f); -0001e8 7903 LDRB r3,[r0,#4] +0001e0 7903 LDRB r3,[r0,#4] ;;;399 zz = rxbuffer[8*ii+5]; ;;;400 touch_id=rxbuffer[8*ii+1]>>4; -0001ea 7840 LDRB r0,[r0,#1] -0001ec 011c LSLS r4,r3,#4 ;398 -0001ee 0909 LSRS r1,r1,#4 ;398 -0001f0 430c ORRS r4,r4,r1 ;398 -0001f2 0900 LSRS r0,r0,#4 +0001e2 7840 LDRB r0,[r0,#1] +0001e4 011c LSLS r4,r3,#4 ;398 +0001e6 0909 LSRS r1,r1,#4 ;398 +0001e8 430c ORRS r4,r4,r1 ;398 +0001ea 0900 LSRS r0,r0,#4 ;;;401 xx = xx * 4096 / OUTPUT_WIDTH_VALUE; -0001f4 9001 STR r0,[sp,#4] -0001f6 2187 MOVS r1,#0x87 -0001f8 0310 LSLS r0,r2,#12 -0001fa 00c9 LSLS r1,r1,#3 -0001fc f7fffffe BL __aeabi_uidivmod +0001ec 9001 STR r0,[sp,#4] +0001ee 2187 MOVS r1,#0x87 +0001f0 0310 LSLS r0,r2,#12 +0001f2 00c9 LSLS r1,r1,#3 +0001f4 f7fffffe BL __aeabi_uidivmod ;;;402 if(xx >4095) -000200 497f LDR r1,|L4.1024| -000202 4605 MOV r5,r0 ;401 -000204 4288 CMP r0,r1 -000206 d900 BLS |L4.522| +0001f8 497d LDR r1,|L4.1008| +0001fa 4605 MOV r5,r0 ;401 +0001fc 4288 CMP r0,r1 +0001fe d900 BLS |L4.514| ;;;403 xx =4095; -000208 460d MOV r5,r1 - |L4.522| +000200 460d MOV r5,r1 + |L4.514| ;;;404 yy = yy * 4096 / OUTPUT_HEIGHT_VALUE; -00020a 214b MOVS r1,#0x4b -00020c 0320 LSLS r0,r4,#12 -00020e 0149 LSLS r1,r1,#5 -000210 f7fffffe BL __aeabi_uidivmod -000214 4604 MOV r4,r0 +000202 214b MOVS r1,#0x4b +000204 0320 LSLS r0,r4,#12 +000206 0149 LSLS r1,r1,#5 +000208 f7fffffe BL __aeabi_uidivmod +00020c 4604 MOV r4,r0 ;;;405 if(yy >4095) -000216 487a LDR r0,|L4.1024| -000218 4284 CMP r4,r0 -00021a d900 BLS |L4.542| +00020e 4878 LDR r0,|L4.1008| +000210 4284 CMP r4,r0 +000212 d900 BLS |L4.534| ;;;406 yy =4095; -00021c 4604 MOV r4,r0 - |L4.542| +000214 4604 MOV r4,r0 + |L4.534| ;;;407 phone_reg_coord_back[16*k+1] = 0xC5+(touch_id*4); -00021e 9801 LDR r0,[sp,#4] -000220 0132 LSLS r2,r6,#4 -000222 0081 LSLS r1,r0,#2 -000224 4875 LDR r0,|L4.1020| -000226 31c5 ADDS r1,r1,#0xc5 -000228 3020 ADDS r0,r0,#0x20 -00022a 1810 ADDS r0,r2,r0 -00022c 7041 STRB r1,[r0,#1] +000216 9801 LDR r0,[sp,#4] +000218 0132 LSLS r2,r6,#4 +00021a 0081 LSLS r1,r0,#2 +00021c 4873 LDR r0,|L4.1004| +00021e 31c5 ADDS r1,r1,#0xc5 +000220 1810 ADDS r0,r2,r0 +000222 7041 STRB r1,[r0,#1] ;;;408 phone_reg_coord_back[16*k+2] = (uint8_t)((xx>>4) & 0xFF); //x ¸ß°Ëλ -00022e 0929 LSRS r1,r5,#4 -000230 7081 STRB r1,[r0,#2] +000224 0929 LSRS r1,r5,#4 +000226 7081 STRB r1,[r0,#2] ;;;409 phone_reg_coord_back[16*k+3] = (uint8_t)((yy>>4) & 0xFF); //y ¸ß°Ëλ -000232 0921 LSRS r1,r4,#4 -000234 70c1 STRB r1,[r0,#3] +000228 0921 LSRS r1,r4,#4 +00022a 70c1 STRB r1,[r0,#3] ;;;410 phone_reg_coord_back[16*k+4] = ((xx & 0x0F) << 4) | (yy & 0x0F); //bit0-bit3:yµÍËÄλ;bit4-bit7:xµÍËÄλ; -000236 0722 LSLS r2,r4,#28 -000238 0129 LSLS r1,r5,#4 -00023a 0f12 LSRS r2,r2,#28 -00023c 4311 ORRS r1,r1,r2 -00023e 7101 STRB r1,[r0,#4] +00022c 0722 LSLS r2,r4,#28 +00022e 0129 LSLS r1,r5,#4 +000230 0f12 LSRS r2,r2,#28 +000232 4311 ORRS r1,r1,r2 +000234 7101 STRB r1,[r0,#4] ;;;411 phone_reg_coord_back[16*k+5] = 0x00; -000240 2100 MOVS r1,#0 -000242 7141 STRB r1,[r0,#5] +000236 2100 MOVS r1,#0 +000238 7141 STRB r1,[r0,#5] ;;;412 phone_reg_coord_back[16*k+6] = 0x00; -000244 7181 STRB r1,[r0,#6] +00023a 7181 STRB r1,[r0,#6] ;;;413 phone_reg_coord_back[16*k+7] = 0x00; -000246 71c1 STRB r1,[r0,#7] +00023c 71c1 STRB r1,[r0,#7] ;;;414 phone_reg_coord_back[16*k+8] = 0x00; -000248 7201 STRB r1,[r0,#8] +00023e 7201 STRB r1,[r0,#8] ;;;415 phone_reg_coord_back[16*k+9] = 0x00; -00024a 7241 STRB r1,[r0,#9] +000240 7241 STRB r1,[r0,#9] ;;;416 phone_reg_coord_back[16*k+10] = 0x00; -00024c 7281 STRB r1,[r0,#0xa] +000242 7281 STRB r1,[r0,#0xa] ;;;417 phone_reg_coord_back[16*k+11] = 0x00; -00024e 72c1 STRB r1,[r0,#0xb] +000244 72c1 STRB r1,[r0,#0xb] ;;;418 phone_reg_coord_back[16*k+12] = 0x00; -000250 7301 STRB r1,[r0,#0xc] +000246 7301 STRB r1,[r0,#0xc] ;;;419 phone_reg_coord_back[16*k+13] = 0x00; -000252 7341 STRB r1,[r0,#0xd] +000248 7341 STRB r1,[r0,#0xd] ;;;420 phone_reg_coord_back[16*k+14] = 0x00; -000254 7381 STRB r1,[r0,#0xe] +00024a 7381 STRB r1,[r0,#0xe] ;;;421 phone_reg_coord_back[16*k+15] = 0x00; -000256 73c1 STRB r1,[r0,#0xf] +00024c 73c1 STRB r1,[r0,#0xf] ;;;422 phone_reg_coord_back[16*k+16] = 0x00; -000258 1c76 ADDS r6,r6,#1 -00025a 7401 STRB r1,[r0,#0x10] +00024e 1c76 ADDS r6,r6,#1 +000250 7401 STRB r1,[r0,#0x10] ;;;423 k++; -00025c b2f6 UXTB r6,r6 - |L4.606| -00025e 9802 LDR r0,[sp,#8] ;316 -000260 1c40 ADDS r0,r0,#1 ;316 -000262 b2c0 UXTB r0,r0 ;316 +000252 b2f6 UXTB r6,r6 + |L4.596| +000254 9802 LDR r0,[sp,#8] ;316 +000256 1c40 ADDS r0,r0,#1 ;316 +000258 b2c0 UXTB r0,r0 ;316 + |L4.602| +00025a 9900 LDR r1,[sp,#0] ;316 +00025c 9002 STR r0,[sp,#8] ;316 +00025e 4288 CMP r0,r1 ;316 +000260 d200 BCS |L4.612| +000262 e709 B |L4.120| |L4.612| -000264 9900 LDR r1,[sp,#0] ;316 -000266 9002 STR r0,[sp,#8] ;316 -000268 4288 CMP r0,r1 ;316 -00026a d200 BCS |L4.622| -00026c e705 B |L4.122| - |L4.622| ;;;424 // TAU_LOGD("2 temp=%d", temp); ;;;425 // fingerprint_enable=0; ;;;426 } @@ -1803,16 +1797,16 @@ ;;;447 ;;;448 #ifdef ENABLE_TP_SLEEP ;;;449 if(tp_sleep_in) -00026e 4e63 LDR r6,|L4.1020| -000270 78b0 LDRB r0,[r6,#2] ; tp_sleep_in -000272 2800 CMP r0,#0 -000274 d07e BEQ |L4.884| +000264 4e60 LDR r6,|L4.1000| +000266 78b0 LDRB r0,[r6,#2] ; tp_sleep_in +000268 2800 CMP r0,#0 +00026a d07d BEQ |L4.872| ;;;450 { ;;;451 #ifdef ADD_FINGERPRINT_FUNC ;;;452 if(send_point==1) -000276 7b70 LDRB r0,[r6,#0xd] ; send_point -000278 2801 CMP r0,#1 -00027a d002 BEQ |L4.642| +00026c 7b70 LDRB r0,[r6,#0xd] ; send_point +00026e 2801 CMP r0,#1 +000270 d002 BEQ |L4.632| ;;;453 { ;;;454 if( (xx>FINGER_X_MIN) &&(xxFINGER_Y_MIN) &&(yy1) -00027c 2800 CMP r0,#0 -00027e d042 BEQ |L4.774| - |L4.640| -000280 e0f0 B |L4.1124| - |L4.642| -000282 4860 LDR r0,|L4.1028| -000284 1829 ADDS r1,r5,r0 ;454 -000286 20ff MOVS r0,#0xff ;454 -000288 30cc ADDS r0,r0,#0xcc ;454 -00028a 4281 CMP r1,r0 ;454 -00028c d2f8 BCS |L4.640| -00028e 485e LDR r0,|L4.1032| -000290 4284 CMP r4,r0 ;454 -000292 d9f5 BLS |L4.640| -000294 485a LDR r0,|L4.1024| -000296 38eb SUBS r0,r0,#0xeb ;454 -000298 4284 CMP r4,r0 ;454 -00029a d2f1 BCS |L4.640| -00029c 7bf0 LDRB r0,[r6,#0xf] ;456 ; fingerprint_enable -00029e 28ee CMP r0,#0xee ;456 -0002a0 d21a BCS |L4.728| -0002a2 4856 LDR r0,|L4.1020| -0002a4 218c MOVS r1,#0x8c ;458 -0002a6 3020 ADDS r0,r0,#0x20 ;458 -0002a8 7001 STRB r1,[r0,#0] ;458 -0002aa 21f1 MOVS r1,#0xf1 ;459 -0002ac 7041 STRB r1,[r0,#1] ;459 -0002ae 2102 MOVS r1,#2 ;460 -0002b0 7081 STRB r1,[r0,#2] ;460 -0002b2 214e MOVS r1,#0x4e ;461 -0002b4 70c1 STRB r1,[r0,#3] ;461 -0002b6 2100 MOVS r1,#0 ;462 -0002b8 7101 STRB r1,[r0,#4] ;462 -0002ba 2221 MOVS r2,#0x21 ;463 -0002bc 7142 STRB r2,[r0,#5] ;463 -0002be 2285 MOVS r2,#0x85 ;464 -0002c0 7182 STRB r2,[r0,#6] ;464 -0002c2 2230 MOVS r2,#0x30 ;465 -0002c4 71c2 STRB r2,[r0,#7] ;465 -0002c6 7201 STRB r1,[r0,#8] ;466 -0002c8 7241 STRB r1,[r0,#9] ;467 -0002ca 7281 STRB r1,[r0,#0xa] ;468 -0002cc 21fe MOVS r1,#0xfe ;469 -0002ce 72c1 STRB r1,[r0,#0xb] ;469 -0002d0 2122 MOVS r1,#0x22 ;470 -0002d2 7301 STRB r1,[r0,#0xc] ;470 -0002d4 20e0 MOVS r0,#0xe0 ;471 -0002d6 e040 B |L4.858| - |L4.728| -0002d8 28ef CMP r0,#0xef ;475 -0002da d27d BCS |L4.984| -0002dc 4847 LDR r0,|L4.1020| -0002de 2182 MOVS r1,#0x82 ;477 -0002e0 3020 ADDS r0,r0,#0x20 ;477 -0002e2 7001 STRB r1,[r0,#0] ;477 -0002e4 2109 MOVS r1,#9 ;478 -0002e6 7041 STRB r1,[r0,#1] ;478 -0002e8 2104 MOVS r1,#4 ;479 -0002ea 7081 STRB r1,[r0,#2] ;479 -0002ec 2100 MOVS r1,#0 ;480 -0002ee 70c1 STRB r1,[r0,#3] ;480 -0002f0 7101 STRB r1,[r0,#4] ;481 -0002f2 7141 STRB r1,[r0,#5] ;482 -0002f4 7181 STRB r1,[r0,#6] ;483 -0002f6 71c1 STRB r1,[r0,#7] ;484 -0002f8 7201 STRB r1,[r0,#8] ;485 -0002fa 7241 STRB r1,[r0,#9] ;486 -0002fc 7281 STRB r1,[r0,#0xa] ;487 -0002fe 72c1 STRB r1,[r0,#0xb] ;488 -000300 7301 STRB r1,[r0,#0xc] ;489 -000302 20ef MOVS r0,#0xef ;490 -000304 e029 B |L4.858| - |L4.774| -000306 7bf0 LDRB r0,[r6,#0xf] ; fingerprint_enable -000308 2801 CMP r0,#1 -00030a d92e BLS |L4.874| +000272 2800 CMP r0,#0 +000274 d040 BEQ |L4.760| + |L4.630| +000276 e0ed B |L4.1108| + |L4.632| +000278 485e LDR r0,|L4.1012| +00027a 1829 ADDS r1,r5,r0 ;454 +00027c 20ff MOVS r0,#0xff ;454 +00027e 30cc ADDS r0,r0,#0xcc ;454 +000280 4281 CMP r1,r0 ;454 +000282 d2f8 BCS |L4.630| +000284 485c LDR r0,|L4.1016| +000286 4284 CMP r4,r0 ;454 +000288 d9f5 BLS |L4.630| +00028a 4859 LDR r0,|L4.1008| +00028c 38eb SUBS r0,r0,#0xeb ;454 +00028e 4284 CMP r4,r0 ;454 +000290 d2f1 BCS |L4.630| +000292 7bf0 LDRB r0,[r6,#0xf] ;456 ; fingerprint_enable +000294 28ee CMP r0,#0xee ;456 +000296 d219 BCS |L4.716| +000298 4854 LDR r0,|L4.1004| +00029a 218c MOVS r1,#0x8c ;458 +00029c 7001 STRB r1,[r0,#0] ;458 +00029e 21f1 MOVS r1,#0xf1 ;459 +0002a0 7041 STRB r1,[r0,#1] ;459 +0002a2 2102 MOVS r1,#2 ;460 +0002a4 7081 STRB r1,[r0,#2] ;460 +0002a6 214e MOVS r1,#0x4e ;461 +0002a8 70c1 STRB r1,[r0,#3] ;461 +0002aa 2100 MOVS r1,#0 ;462 +0002ac 7101 STRB r1,[r0,#4] ;462 +0002ae 2221 MOVS r2,#0x21 ;463 +0002b0 7142 STRB r2,[r0,#5] ;463 +0002b2 2285 MOVS r2,#0x85 ;464 +0002b4 7182 STRB r2,[r0,#6] ;464 +0002b6 2230 MOVS r2,#0x30 ;465 +0002b8 71c2 STRB r2,[r0,#7] ;465 +0002ba 7201 STRB r1,[r0,#8] ;466 +0002bc 7241 STRB r1,[r0,#9] ;467 +0002be 7281 STRB r1,[r0,#0xa] ;468 +0002c0 21fe MOVS r1,#0xfe ;469 +0002c2 72c1 STRB r1,[r0,#0xb] ;469 +0002c4 2122 MOVS r1,#0x22 ;470 +0002c6 7301 STRB r1,[r0,#0xc] ;470 +0002c8 20e0 MOVS r0,#0xe0 ;471 +0002ca e03e B |L4.842| + |L4.716| +0002cc 28ef CMP r0,#0xef ;475 +0002ce d27d BCS |L4.972| +0002d0 4846 LDR r0,|L4.1004| +0002d2 2182 MOVS r1,#0x82 ;477 +0002d4 7001 STRB r1,[r0,#0] ;477 +0002d6 2109 MOVS r1,#9 ;478 +0002d8 7041 STRB r1,[r0,#1] ;478 +0002da 2104 MOVS r1,#4 ;479 +0002dc 7081 STRB r1,[r0,#2] ;479 +0002de 2100 MOVS r1,#0 ;480 +0002e0 70c1 STRB r1,[r0,#3] ;480 +0002e2 7101 STRB r1,[r0,#4] ;481 +0002e4 7141 STRB r1,[r0,#5] ;482 +0002e6 7181 STRB r1,[r0,#6] ;483 +0002e8 71c1 STRB r1,[r0,#7] ;484 +0002ea 7201 STRB r1,[r0,#8] ;485 +0002ec 7241 STRB r1,[r0,#9] ;486 +0002ee 7281 STRB r1,[r0,#0xa] ;487 +0002f0 72c1 STRB r1,[r0,#0xb] ;488 +0002f2 7301 STRB r1,[r0,#0xc] ;489 +0002f4 20ef MOVS r0,#0xef ;490 +0002f6 e028 B |L4.842| + |L4.760| +0002f8 7bf0 LDRB r0,[r6,#0xf] ; fingerprint_enable +0002fa 2801 CMP r0,#1 +0002fc d92d BLS |L4.858| ;;;497 { ;;;498 if( (xx>FINGER_X_MIN) &&(xxFINGER_Y_MIN) &&(yy>4)&0x0f); -00036e 4823 LDR r0,|L4.1020| -000370 3020 ADDS r0,r0,#0x20 -000372 e000 B |L4.886| - |L4.884| -000374 e070 B |L4.1112| - |L4.886| -000376 7902 LDRB r2,[r0,#4] ; phone_reg_coord_back -000378 7881 LDRB r1,[r0,#2] ; phone_reg_coord_back -00037a 0913 LSRS r3,r2,#4 -00037c 0109 LSLS r1,r1,#4 -00037e 18c9 ADDS r1,r1,r3 -000380 82b1 STRH r1,[r6,#0x14] +00035e 4823 LDR r0,|L4.1004| +000360 7881 LDRB r1,[r0,#2] ; phone_reg_coord_back +000362 7902 LDRB r2,[r0,#4] ; phone_reg_coord_back +000364 0109 LSLS r1,r1,#4 +000366 e000 B |L4.874| + |L4.872| +000368 e06e B |L4.1096| + |L4.874| +00036a 0913 LSRS r3,r2,#4 +00036c 18c9 ADDS r1,r1,r3 +00036e 82b1 STRH r1,[r6,#0x14] ;;;524 u16CoordY = (phone_reg_coord_back[3]<<4)+(phone_reg_coord_back[4]&0x0f); -000382 78c3 LDRB r3,[r0,#3] ; phone_reg_coord_back -000384 0712 LSLS r2,r2,#28 -000386 011b LSLS r3,r3,#4 -000388 0f12 LSRS r2,r2,#28 -00038a 189a ADDS r2,r3,r2 -00038c 8272 STRH r2,[r6,#0x12] +000370 78c3 LDRB r3,[r0,#3] ; phone_reg_coord_back +000372 0712 LSLS r2,r2,#28 +000374 011b LSLS r3,r3,#4 +000376 0f12 LSRS r2,r2,#28 +000378 189a ADDS r2,r3,r2 +00037a 8272 STRH r2,[r6,#0x12] ;;;525 if((tp_sleep_count>5)&&(tp_sleep_count<60)) //((rxbuffer[0]&0xf0)==0x30)) -00038e 78f3 LDRB r3,[r6,#3] ; tp_sleep_count -000390 1f9b SUBS r3,r3,#6 -000392 2b36 CMP r3,#0x36 -000394 d23a BCS |L4.1036| +00037c 78f3 LDRB r3,[r6,#3] ; tp_sleep_count +00037e 1f9b SUBS r3,r3,#6 +000380 2b36 CMP r3,#0x36 +000382 d23b BCS |L4.1020| ;;;526 { ;;;527 if (u16CoordX > u16CoordX_back) -000396 8b33 LDRH r3,[r6,#0x18] ; u16CoordX_back -000398 4299 CMP r1,r3 -00039a d901 BLS |L4.928| +000384 8b33 LDRH r3,[r6,#0x18] ; u16CoordX_back +000386 4299 CMP r1,r3 +000388 d901 BLS |L4.910| ;;;528 u16CoordX_back = u16CoordX-u16CoordX_back; -00039c 1ac9 SUBS r1,r1,r3 -00039e e000 B |L4.930| - |L4.928| +00038a 1ac9 SUBS r1,r1,r3 +00038c e000 B |L4.912| + |L4.910| ;;;529 else ;;;530 u16CoordX_back = u16CoordX_back-u16CoordX; -0003a0 1a59 SUBS r1,r3,r1 - |L4.930| -0003a2 8331 STRH r1,[r6,#0x18] +00038e 1a59 SUBS r1,r3,r1 + |L4.912| +000390 8331 STRH r1,[r6,#0x18] ;;;531 ;;;532 if (u16CoordY > u16CoordY_back) -0003a4 8af1 LDRH r1,[r6,#0x16] ; u16CoordY_back -0003a6 428a CMP r2,r1 -0003a8 d901 BLS |L4.942| +000392 8af1 LDRH r1,[r6,#0x16] ; u16CoordY_back +000394 428a CMP r2,r1 +000396 d901 BLS |L4.924| ;;;533 u16CoordY_back = u16CoordY-u16CoordY_back; -0003aa 1a51 SUBS r1,r2,r1 -0003ac e000 B |L4.944| - |L4.942| +000398 1a51 SUBS r1,r2,r1 +00039a e000 B |L4.926| + |L4.924| ;;;534 else ;;;535 u16CoordY_back = u16CoordY_back-u16CoordY; -0003ae 1a89 SUBS r1,r1,r2 - |L4.944| -0003b0 82f1 STRH r1,[r6,#0x16] +00039c 1a89 SUBS r1,r1,r2 + |L4.926| +00039e 82f1 STRH r1,[r6,#0x16] ;;;536 ;;;537 if ( (u16CoordX_back < 360) && (u16CoordY_back < 360)) //ÉèÖÃÁ½´Î´¥µãµÄ·¶Î§ -0003b2 8b32 LDRH r2,[r6,#0x18] ; u16CoordX_back -0003b4 21ff MOVS r1,#0xff -0003b6 3169 ADDS r1,r1,#0x69 -0003b8 428a CMP r2,r1 -0003ba d245 BCS |L4.1096| -0003bc 8af2 LDRH r2,[r6,#0x16] ; u16CoordY_back -0003be 428a CMP r2,r1 -0003c0 d242 BCS |L4.1096| +0003a0 8b32 LDRH r2,[r6,#0x18] ; u16CoordX_back +0003a2 21ff MOVS r1,#0xff +0003a4 3169 ADDS r1,r1,#0x69 +0003a6 428a CMP r2,r1 +0003a8 d246 BCS |L4.1080| +0003aa 8af2 LDRH r2,[r6,#0x16] ; u16CoordY_back +0003ac 428a CMP r2,r1 +0003ae d243 BCS |L4.1080| ;;;538 { ;;;539 //TAU_LOGD("tp_sleep_in!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! \n"); ;;;540 phone_reg_coord_back[0]=0x8C; -0003c2 218c MOVS r1,#0x8c -0003c4 7001 STRB r1,[r0,#0] +0003b0 218c MOVS r1,#0x8c +0003b2 7001 STRB r1,[r0,#0] ;;;541 phone_reg_coord_back[1]=0xF1; -0003c6 21f1 MOVS r1,#0xf1 -0003c8 7041 STRB r1,[r0,#1] +0003b4 21f1 MOVS r1,#0xf1 +0003b6 7041 STRB r1,[r0,#1] ;;;542 phone_reg_coord_back[2]=0x02; -0003ca 2102 MOVS r1,#2 -0003cc 7081 STRB r1,[r0,#2] +0003b8 2102 MOVS r1,#2 +0003ba 7081 STRB r1,[r0,#2] ;;;543 phone_reg_coord_back[3]=0x46; -0003ce 2146 MOVS r1,#0x46 -0003d0 70c1 STRB r1,[r0,#3] +0003bc 2146 MOVS r1,#0x46 +0003be 70c1 STRB r1,[r0,#3] ;;;544 phone_reg_coord_back[4]=0x01; -0003d2 2201 MOVS r2,#1 -0003d4 7102 STRB r2,[r0,#4] +0003c0 2201 MOVS r2,#1 +0003c2 7102 STRB r2,[r0,#4] ;;;545 phone_reg_coord_back[8]=0x26; -0003d6 e000 B |L4.986| - |L4.984| -0003d8 e044 B |L4.1124| - |L4.986| -0003da 2126 MOVS r1,#0x26 -0003dc 7201 STRB r1,[r0,#8] +0003c4 2126 MOVS r1,#0x26 +0003c6 7201 STRB r1,[r0,#8] ;;;546 phone_reg_coord_back[9]=0x53; -0003de 2153 MOVS r1,#0x53 -0003e0 7241 STRB r1,[r0,#9] +0003c8 2153 MOVS r1,#0x53 +0003ca e000 B |L4.974| + |L4.972| +0003cc e042 B |L4.1108| + |L4.974| +0003ce 7241 STRB r1,[r0,#9] ;;;547 phone_reg_coord_back[11]=0x1A; -0003e2 211a MOVS r1,#0x1a -0003e4 72c1 STRB r1,[r0,#0xb] +0003d0 211a MOVS r1,#0x1a +0003d2 72c1 STRB r1,[r0,#0xb] ;;;548 phone_reg_coord_back[12]=0x00; -0003e6 2100 MOVS r1,#0 -0003e8 7301 STRB r1,[r0,#0xc] +0003d4 2100 MOVS r1,#0 +0003d6 7301 STRB r1,[r0,#0xc] ;;;549 phone_reg_coord_back[13]=0x00; -0003ea 7341 STRB r1,[r0,#0xd] +0003d8 7341 STRB r1,[r0,#0xd] ;;;550 phone_reg_coord_back[14]=0x00; -0003ec 7381 STRB r1,[r0,#0xe] +0003da 7381 STRB r1,[r0,#0xe] ;;;551 phone_reg_coord_back[15]=0xFE; -0003ee 21fe MOVS r1,#0xfe -0003f0 73c1 STRB r1,[r0,#0xf] +0003dc 21fe MOVS r1,#0xfe +0003de 73c1 STRB r1,[r0,#0xf] ;;;552 phone_reg_coord_back[16]=0x22; -0003f2 2122 MOVS r1,#0x22 -0003f4 7401 STRB r1,[r0,#0x10] +0003e0 2122 MOVS r1,#0x22 +0003e2 7401 STRB r1,[r0,#0x10] ;;;553 sleep_double_EN=1; -0003f6 7172 STRB r2,[r6,#5] +0003e4 7172 STRB r2,[r6,#5] ;;;554 hal_gpio_set_output_data(g_phone_output_int_pad, IO_LVL_LOW); -0003f8 e022 B |L4.1088| -0003fa 0000 DCW 0x0000 - |L4.1020| +0003e6 e023 B |L4.1072| + |L4.1000| DCD ||.data|| - |L4.1024| + |L4.1004| + DCD ||.data||+0xd18 + |L4.1008| DCD 0x00000fff - |L4.1028| + |L4.1012| DCD 0xfffff90b - |L4.1032| + |L4.1016| DCD 0x00000d48 - |L4.1036| + |L4.1020| ;;;555 } ;;;556 } ;;;557 ;;;558 //µ¥»÷ÏÔʾÐÝÃßʱÖÓ ;;;559 else if (3