commit 70c5c996be2d3fb735fa72a23a339e9d1392dad3 Author: “苏飞源” Date: Fri Jul 14 13:42:20 2023 +0800 1、首次提交 2、博创给过来最新的代码 20230714 diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..243d6b9 --- /dev/null +++ b/.gitignore @@ -0,0 +1,85 @@ +# A .gitignore for Keil projects. +# Taken mostly from http://www.keil.com/support/man/docs/uv4/uv4_b_filetypes.htm + +# User-specific uVision files +*.opt +*.uvopt +*.uvoptx +*.uvgui +*.uvgui.* +*.uvguix.* + +# Listing files +#*.cod +#*.map +#*.m51 +#*.m66 +*._ip +*.i +*.lst +*/Listings/*.txt + +# define exception below if needed +*.scr + +# Object and HEX files +*.axf +*.b[0-3][0-9] +*.hex +*.d +*.crf +*.elf +*.hex +*.h86 +*.obj +*.o +*.sbr +*.htm + +# Build files +# define exception below if needed +*.bat +*._ia +*.__i +*._ii + +# Generated output files +/Listings/* +/Objects/* + +# Debugger files +# define exception below if needed +*.ini + +# Other files +*.build_log.htm +*.cdb +*.dep +*.ic +*.lin +*.lnp +*.orc +# define exception below if needed +*.pack +# define exception below if needed +*.pdsc +*.plg +# define exception below if needed +*.sct +*.sfd +*.sfr + +# Miscellaneous +*.tra +*.fed +*.l1p +*.l2p +*.iex + + +/si/ +!*.bin +!*.map + +# To explicitly override the above, define any exceptions here; e.g.: +# !my_customized_scatter_file.sct diff --git a/project/ISP_368/ISP_368.uvprojx b/project/ISP_368/ISP_368.uvprojx new file mode 100644 index 0000000..4cf2200 --- /dev/null +++ b/project/ISP_368/ISP_368.uvprojx @@ -0,0 +1,527 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ISP_368 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM0 + ARM + ARM.CMSIS.5.5.1 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + 0 + $$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h + + + + + + + + + + $$Device:ARMCM0$Device\ARM\SVD\ARMCM0.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Objects\ + WL368_NOTE20_CSOT667 + 1 + 0 + 1 + 1 + 1 + .\Listings\ + 1 + 0 + 1 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin -o .\Objects\@L.bin .\Objects\@L.axf + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 16 + 1 + 1 + 0 + 0 + 4 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x2000 + + + 1 + 0x10000 + 0x10000 + + + 0 + 0x70000 + 0xf0 + + + 0 + 0x70100 + 0xd0 + + + 0 + 0x701d0 + 0x7e30 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 4 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + ISP_368 + + ..\..\src;..\..\src\board;..\..\src\common;..\..\src\sdk\include;..\..\src\app\demo;..\..\src\sdk\include\M0;..\..\src\app;..\..\src\app\module_demo;..\..\src\app\touch;..\..\src\app\S8;..\..\src\app\S9;..\CVWL368 + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + app + + + main.c + 1 + ..\..\src\app\main.c + + + ap_demo.c + 1 + ..\..\src\app\demo\ap_demo.c + + + app_tp_transfer.c + 1 + ..\..\src\app\demo\app_tp_transfer.c + + + app_tp_for_custom_s8.c + 1 + ..\..\src\app\demo\app_tp_for_custom_s8.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + + + driver + + + CVWL368.lib + 4 + ..\..\src\sdk\CVWL368\lib\CVWL368.lib + + + WL368_NOTE20_CSOT667_TP.lib + 4 + ..\..\src\sdk\CVWL368\lib\WL368_NOTE20_CSOT667_TP.lib + + + + + board + + + board.c + 1 + ..\..\src\board\board.c + + + + + startup + + + startup_ARMCM0.s + 2 + ..\..\src\board\startup\startup_ARMCM0.s + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + RTE\Device\ARMCM0\startup_ARMCM0.s + + + + + + RTE\Device\ARMCM0\system_ARMCM0.c + + + + + + + + diff --git a/project/ISP_368/Listings/ISP_368.map b/project/ISP_368/Listings/ISP_368.map new file mode 100644 index 0000000..9133ba4 --- /dev/null +++ b/project/ISP_368/Listings/ISP_368.map @@ -0,0 +1,5230 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.PWM_Task) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.PWM_Task) refers to ap_demo.o(.data) for read_bl_data + ap_demo.o(i.PWM_init) refers to hal_pwm.o(i.hal_pwm_out_init) for hal_pwm_out_init + ap_demo.o(i.PWM_init) refers to hal_pwm.o(i.hal_pwm_out_config_all) for hal_pwm_out_config_all + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for phone_DisplayOFF_flag + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.PWM_init) for PWM_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_te_timer_init) for soft_te_timer_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tx_display_on) for tx_display_on + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_phone_clear_reset_on) for app_tp_phone_clear_reset_on + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.PWM_Task) for PWM_Task + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + ap_demo.o(i.ap_demo) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_in + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for phone_DisplayOFF_count + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_ca) refers to ap_demo.o(i.translate_data) for translate_data + ap_demo.o(i.ap_get_reg_ca) refers to ap_demo.o(.data) for value_reg_ca + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for value_reg_df + ap_demo.o(i.ap_reset_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(i.translate_data) for translate_data + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(.data) for value_reg_b1 + ap_demo.o(i.ap_set_display_off) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for g_rx_ctrl_handle + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for g_exit_sleep_mode + ap_demo.o(i.ap_set_tp_calibration_04) refers to ap_demo.o(.data) for g_calibration_flag + ap_demo.o(i.app_tp_calibration_exec) refers to app_tp_transfer.o(i.ap_tp_calibration) for ap_tp_calibration + ap_demo.o(i.app_tp_calibration_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.app_tp_calibration_exec) refers to ap_demo.o(.data) for g_calibration_flag + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for g_tx_ctrl_handle + ap_demo.o(i.init_panel) refers to ap_demo.o(i.tx_panel_reset) for tx_panel_reset + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(i.send_panel_init_code) for send_panel_init_code + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(.constdata) for panel_init_code + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) for hal_dsi_rx_ctrl_set_cus_esc_clk + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for g_rx_ctrl_handle + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for g_cus_rx_dcs_execute_table + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.pps_update_handle) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for g_rx_ctrl_handle + ap_demo.o(i.send_panel_init_code) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.send_panel_init_code) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.soft_te_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + ap_demo.o(i.soft_te_timer_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_te_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) for hal_dsi_rx_ctrl_set_hw_tear_mode + ap_demo.o(i.soft_te_timer_cb) refers to ap_demo.o(.data) for panel_display_done + ap_demo.o(i.soft_te_timer_init) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.soft_te_timer_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.soft_te_timer_init) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.soft_te_timer_init) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_te_timer_init) refers to ap_demo.o(.data) for g_rx_ctrl_handle + ap_demo.o(i.soft_te_timer_init) refers to ap_demo.o(i.soft_te_timer_cb) for soft_te_timer_cb + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for phone_DisplayOFF_count + ap_demo.o(i.translate_data) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.translate_data) refers to ap_demo.o(.data) for value_reg_b1 + ap_demo.o(i.tx_display_on) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.tx_display_on) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.tx_display_on) refers to ap_demo.o(.data) for g_tx_ctrl_handle + ap_demo.o(i.tx_panel_reset) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.tx_panel_reset) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_ca) for ap_get_reg_ca + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight) for ap_set_backlight + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_tp_calibration_04) for ap_set_tp_calibration_04 + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_init) for app_tp_screen_int_init + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for s_screen_read_buffer + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for MI10_PRO_screen_init_data1 + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.ap_tp_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.ap_tp_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(.data) for MI10_PRO_TP_Tuning_data2 + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for s_phone_read_buffer + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_transfer_phone) for app_tp_transfer_phone + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for s_phone_reset_flag + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for s_phone_reset_flag + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for s_screen_int_flag + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.app_tp_screen_int_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_screen_int_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(.bss) for s_phone_read_buffer + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.app_tp_m_transfer_complate) for app_tp_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for s_screen_const_transfer_count + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_screen_int_lvl_low) for app_tp_screen_int_lvl_low + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_transfer_complate) for app_tp_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for s_screen_init_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for s_screen_read_buffer + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for s_screen_init_complate + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fsub + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_set_callback) for drv_i2c_m_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_deinit) for drv_i2c_s_deinit + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num) for drv_i2c_s_get_tx_byte_num + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_callback) for drv_i2c_s_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable_intr) for drv_i2c_s_enable_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(.data) for tx_byte_num + hal_pwm.o(i.hal_pwm_in_clear_int) refers to drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all) for drv_pwm_in_clear_pwm_int_all + hal_pwm.o(i.hal_pwm_in_config_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_in_ctrl_int) refers to drv_pwm.o(i.drv_pwm_in_set_sys_int) for drv_pwm_in_set_sys_int + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_get_current_count) refers to drv_pwm.o(i.drv_pwm_in_get_current_count) for drv_pwm_in_get_current_count + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_pwm.o(i.drv_pwm_in_get_high_period) for drv_pwm_in_get_high_period + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_pwm.o(i.drv_pwm_in_get_low_period) for drv_pwm_in_get_low_period + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_pwm.o(i.drv_pwm_in_get_counter_period) for drv_pwm_in_get_counter_period + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_in_init) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_register_callback) refers to drv_pwm.o(i.drv_pwm_in_register_callback) for drv_pwm_in_register_callback + hal_pwm.o(i.hal_pwm_in_set_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_out_config_all) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_config_all) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_config_all) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_config_all) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_config_all) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_config_all) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sel_io) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_sync_all) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_pwm.o(i.drv_pwm_out_get_sync_flag) for drv_pwm_out_get_sync_flag + hal_pwm.o(i.hal_pwm_out_sync_all) refers to tau_delay.o(i.delayUs) for delayUs + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_common.o(.data) for g_system_clock + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_system.o(i.hal_system_flash_read) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_dual_read) for norflash_dual_read + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_erase_block) for norflash_erase_block + hal_system.o(i.hal_system_flash_write) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_write) for norflash_write + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_disable_intr) for drv_i2c_s_disable_intr + drv_i2c_slave.o(i.drv_i2c_s_enable_intr) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_set_sys_mask) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_iniernal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_iniernal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (16 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode), (128 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter), (108 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex), (14 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (112 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (144 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (140 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (24 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (24 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (20 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (8 bytes). + Removing hal_pwm.o(.rev16_text), (4 bytes). + Removing hal_pwm.o(.revsh_text), (4 bytes). + Removing hal_pwm.o(i.hal_pwm_in_clear_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_config_int), (60 bytes). + Removing hal_pwm.o(i.hal_pwm_in_ctrl_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_deinit), (18 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_current_count), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_high_period), (40 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_low_period), (40 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_total_period), (40 bytes). + Removing hal_pwm.o(i.hal_pwm_in_init), (26 bytes). + Removing hal_pwm.o(i.hal_pwm_in_register_callback), (10 bytes). + Removing hal_pwm.o(i.hal_pwm_in_set_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_deinit), (18 bytes). + Removing hal_pwm.o(i.hal_pwm_out_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sel_io), (38 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_all), (124 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_ctl), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_pause), (28 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_period), (52 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_thr), (72 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (112 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_flash_read), (56 bytes). + Removing hal_system.o(i.hal_system_flash_write), (58 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (156 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (37 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (288 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (620 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (11 bytes). + Removing app_tp_for_custom_s8.o(.data), (10 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (412 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (24 bytes). + Removing drv_dma.o(i.drv_dma_enable_cycle), (44 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_clear_irq_status), (6 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (130 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_bus_init), (36 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_deinit), (44 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_disable_intr), (16 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_enable), (16 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num), (12 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (32 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (24 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_sys_mask), (48 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_scld_filter), (100 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (52 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (108 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (60 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (220 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (88 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (72 bytes). + Removing drv_spi_dma.o(.bss), (480 bytes). + Removing drv_spi_dma.o(.data), (16 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_iniernal_vsync_deinit), (20 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (26 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_set_prefetch), (24 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (56 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (20 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing dflti.o(.text), (40 bytes). + +571 unused section(s) (total 24762 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../fplib/microlib/fpsqrt.c 0x00000000 Number 0 dsqrt.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt_x.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_pwm.c 0x00000000 Number 0 hal_pwm.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\internal\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\..\src\app\demo\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\..\src\app\demo\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_pwm.c 0x00000000 Number 0 hal_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\internal\\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\\..\\src\\app\\demo\\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\\src\\app\\demo\\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\src\app\demo\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + cdcmple.s 0x00000000 Number 0 cdcmple.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 fadd.o(.text) + .text 0x0001029a Section 0 fmul.o(.text) + .text 0x00010314 Section 0 fdiv.o(.text) + .text 0x00010390 Section 0 fscalb.o(.text) + .text 0x000103a8 Section 0 dadd.o(.text) + .text 0x0001050c Section 0 dmul.o(.text) + .text 0x000105dc Section 0 ddiv.o(.text) + .text 0x000106cc Section 0 fflti.o(.text) + .text 0x000106e2 Section 0 ffltui.o(.text) + .text 0x000106f0 Section 0 dfltui.o(.text) + .text 0x0001070c Section 0 ffixi.o(.text) + .text 0x0001073e Section 0 ffixui.o(.text) + .text 0x00010768 Section 0 dfixi.o(.text) + .text 0x000107b0 Section 0 dfixui.o(.text) + .text 0x000107ec Section 0 f2d.o(.text) + .text 0x00010814 Section 40 cdcmple.o(.text) + .text 0x0001083c Section 20 cfrcmple.o(.text) + .text 0x00010850 Section 0 uldiv.o(.text) + .text 0x000108b0 Section 0 llshl.o(.text) + .text 0x000108d0 Section 0 llushr.o(.text) + .text 0x000108f2 Section 0 llsshr.o(.text) + .text 0x00010918 Section 0 fepilogue.o(.text) + .text 0x00010918 Section 0 iusefp.o(.text) + .text 0x0001099a Section 0 depilogue.o(.text) + .text 0x00010a58 Section 0 dsqrt.o(.text) + .text 0x00010afc Section 0 dfixul.o(.text) + .text 0x00010b3c Section 40 cdrcmple.o(.text) + .text 0x00010b64 Section 36 init.o(.text) + .text 0x00010b88 Section 0 __dczerorl2.o(.text) + i.ADC_IRQn_Handler 0x00010be0 Section 0 irq_redirect .o(i.ADC_IRQn_Handler) + i.AP_NRESET_IRQn_Handler 0x00010bf8 Section 0 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + i.DMA_IRQn_Handler 0x00010c10 Section 0 irq_redirect .o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010c24 Section 0 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010c40 Section 0 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010c5c Section 0 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010c78 Section 0 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010c94 Section 0 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010cb0 Section 0 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010ccc Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010ce8 Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.FLSCTRL_IRQn_Handler 0x00010d04 Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.Gpio_swire_output 0x00010d18 Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00010d68 Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010d7c Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010d94 Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010dac Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010dc4 Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010dec Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010e04 Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010e1c Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010e34 Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.PWM_Task 0x00010e50 Section 0 ap_demo.o(i.PWM_Task) + i.PWM_init 0x00010e94 Section 0 ap_demo.o(i.PWM_init) + PWM_init 0x00010e95 Thumb Code 26 ap_demo.o(i.PWM_init) + i.S20_Start_init 0x00010eb0 Section 0 app_tp_transfer.o(i.S20_Start_init) + i.SPIM_IRQn_Handler 0x00010fe0 Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.UART_DisableDma 0x00010ffc Section 0 drv_uart.o(i.UART_DisableDma) + i.__scatterload_null 0x00010ffe Section 2 handlers.o(i.__scatterload_null) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.SPIS_IRQn_Handler 0x00011014 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.SWIRE_IRQn_Handler 0x00011030 Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x0001104c Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00011064 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x0001107c Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00011094 Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x000110ac Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART0_IRQ_Handle 0x000110c4 Section 0 drv_uart.o(i.UART0_IRQ_Handle) + i.UART_GetInstance 0x000110e0 Section 0 drv_uart.o(i.UART_GetInstance) + i.UART_IRQn_Handler 0x000110e4 Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_ResetRxFIFO 0x000110fc Section 0 drv_uart.o(i.UART_ResetRxFIFO) + i.UART_SetBaudRate 0x00011120 Section 0 drv_uart.o(i.UART_SetBaudRate) + i.UART_SwitchSCLK 0x00011168 Section 0 drv_uart.o(i.UART_SwitchSCLK) + i.UART_TransferHandleIRQ 0x00011182 Section 0 drv_uart.o(i.UART_TransferHandleIRQ) + i.UART_WriteBlocking 0x000112b6 Section 0 drv_uart.o(i.UART_WriteBlocking) + i.UART_init 0x000112d0 Section 0 drv_uart.o(i.UART_init) + i.VIDC_IRQn_Handler 0x0001138c Section 0 irq_redirect .o(i.VIDC_IRQn_Handler) + i.VPRE_IRQn_Handler 0x000113a4 Section 0 irq_redirect .o(i.VPRE_IRQn_Handler) + i.WDG_IRQn_Handler 0x000113bc Section 0 irq_redirect .o(i.WDG_IRQn_Handler) + i.__0printf 0x000113d4 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x000113f4 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x00011418 Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x00011446 Section 0 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + i.__NVIC_ClearPendingIRQ 0x00011460 Section 0 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011461 Thumb Code 18 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x00011478 Section 0 drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011479 Thumb Code 18 drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x00011490 Section 0 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011491 Thumb Code 18 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_DisableIRQ 0x000114a8 Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x000114a9 Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x000114c8 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x000114c9 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__NVIC_SetPriority 0x000114e0 Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x000114e1 Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_copy 0x00011524 Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_zeroinit 0x00011532 Section 14 handlers.o(i.__scatterload_zeroinit) + i.__set_errno 0x00011540 Section 0 errno.o(i.__set_errno) + i._fp_digits 0x0001154c Section 0 printfa.o(i._fp_digits) + _fp_digits 0x0001154d Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x000116c0 Section 0 printfa.o(i._printf_core) + _printf_core 0x000116c1 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011dac Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011dad Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011dcc Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011dcd Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011df8 Section 0 printfa.o(i._sputc) + _sputc 0x00011df9 Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011e04 Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011e05 Thumb Code 2168 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x0001267c Section 0 ap_demo.o(i.ap_demo) + i.ap_get_reg_ca 0x00012894 Section 0 ap_demo.o(i.ap_get_reg_ca) + ap_get_reg_ca 0x00012895 Thumb Code 68 ap_demo.o(i.ap_get_reg_ca) + i.ap_get_reg_df 0x000128e4 Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x000128e5 Thumb Code 236 ap_demo.o(i.ap_get_reg_df) + i.ap_reset_cb 0x000129e4 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x000129e5 Thumb Code 74 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight 0x00012a68 Section 0 ap_demo.o(i.ap_set_backlight) + ap_set_backlight 0x00012a69 Thumb Code 68 ap_demo.o(i.ap_set_backlight) + i.ap_set_display_off 0x00012ab8 Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x00012ab9 Thumb Code 36 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x00012b00 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x00012b01 Thumb Code 24 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x00012b38 Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x00012b39 Thumb Code 96 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x00012bd0 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x00012bd1 Thumb Code 28 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x00012c18 Section 0 ap_demo.o(i.ap_set_tp_calibration_04) + ap_set_tp_calibration_04 0x00012c19 Thumb Code 34 ap_demo.o(i.ap_set_tp_calibration_04) + i.ap_tp_calibration 0x00012c40 Section 0 app_tp_transfer.o(i.ap_tp_calibration) + i.app_ADC_IRQn_Handler 0x00012d08 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x00012d24 Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x00012d48 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x00012d64 Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x00012d80 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x00012d9c Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x00012db8 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x00012dd4 Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x00012df0 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x00012e0c Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x00012e28 Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x00012e70 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x00012e80 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00012e90 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00012f70 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00012ff8 Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00013290 Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00013330 Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00013378 Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x000133a8 Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x000135a8 Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x000135c8 Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x000135e0 Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x000135ea Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x000135f4 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x000135fe Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x00013608 Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x00013610 Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x0001362c Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x00013648 Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x00013680 Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x00013690 Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x000136c0 Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x000136e4 Section 0 ap_demo.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x0001374c Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x0001374d Thumb Code 14 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x0001375c Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x000137b0 Section 0 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_read 0x000137b1 Thumb Code 48 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_transfer_complate 0x000137e0 Section 0 app_tp_transfer.o(i.app_tp_m_transfer_complate) + i.app_tp_m_write 0x000137e8 Section 0 app_tp_transfer.o(i.app_tp_m_write) + app_tp_m_write 0x000137e9 Thumb Code 16 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x000137f8 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_phone_clear_reset_on 0x00013b60 Section 0 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + i.app_tp_s_read 0x00013b6c Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x00013b7c Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x00013b8c Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x00013e5c Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x00013e90 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00013e91 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_screen_int_init 0x00013e9c Section 0 app_tp_transfer.o(i.app_tp_screen_int_init) + app_tp_screen_int_init 0x00013e9d Thumb Code 56 app_tp_transfer.o(i.app_tp_screen_int_init) + i.app_tp_screen_int_lvl_low 0x00013edc Section 0 app_tp_transfer.o(i.app_tp_screen_int_lvl_low) + app_tp_screen_int_lvl_low 0x00013edd Thumb Code 4 app_tp_transfer.o(i.app_tp_screen_int_lvl_low) + i.app_tp_transfer_phone 0x00013ee0 Section 0 app_tp_transfer.o(i.app_tp_transfer_phone) + app_tp_transfer_phone 0x00013ee1 Thumb Code 48 app_tp_transfer.o(i.app_tp_transfer_phone) + i.app_tp_transfer_screen_const 0x00013f14 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00013f15 Thumb Code 54 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00013f5c Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x000140c4 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.board_Init 0x000140e8 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x0001410c Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + calc_framebuffer_setting 0x0001410d Thumb Code 962 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x00014518 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x000145e0 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x000145e1 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x0001460c Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x0001460d Thumb Code 92 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x0001469c Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x000146f4 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x0001470c Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00014750 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x00014774 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x00014775 Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x00014790 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x000147a8 Section 0 tau_delay.o(i.delayUs) + i.drv_ap_rst_trig_edge_detect 0x000147cc Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x00014804 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x00014810 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x00014850 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x00014918 Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x0001492c Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x00014984 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x0001498c Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x0001499c Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x000149b0 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x000149c4 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x000149e4 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x000149f8 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x00014a10 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x00014a24 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x00014a38 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x00014a4c Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x00014a60 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x00014a74 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x00014a88 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x00014a9c Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x00014ab0 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x00014ac4 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x00014adc Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x00014af4 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x00014b08 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x00014b1c Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x00014b30 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x00014b48 Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x00014b64 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x00014b74 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00014b84 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x00014ba8 Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00014bb4 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x00014c44 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x00014c56 Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x00014c70 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x00014c78 Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00014cbc Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x00014cf2 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00014d00 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00014d74 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00014d7e Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00014da8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00014eac Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00014eec Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00014eed Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00014f3c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00014f3d Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00014f58 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00014f60 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00014f66 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00014f74 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00014f94 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00014fa4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00014fa8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00014fb8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00014ffe Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00015024 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00015130 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x0001513e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00015152 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x000151be Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x000151c2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x000151da Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x000151e2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x000151ea Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x000151f4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00015218 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x0001521c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00015220 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00015224 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x0001523c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x00015256 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00015262 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x000152c6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x00015304 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00015410 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x0001542e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00015436 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x00015452 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x0001546a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x00015478 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x000154ac Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x000154bc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x000154c4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x000154e6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x000154ee Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00015514 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x000155be Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x000155d4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x000155ec Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x0001560c Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x00015618 Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x0001564a Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x00015664 Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x0001567c Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x00015688 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x0001569c Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x000156e0 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x00015700 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x00015710 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x00015720 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x00015730 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00015740 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00015741 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x00015760 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c_dma_callback 0x00015890 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x00015891 Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x000158c4 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x00015970 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x0001598a Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x000159a4 Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x00015a04 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x00015a14 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_m_set_callback 0x00015a4c Section 0 drv_i2c_master.o(i.drv_i2c_m_set_callback) + i.drv_i2c_master_init 0x00015a58 Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x00015ae4 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x00015b40 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x00015b7c Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x00015b7d Thumb Code 46 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x00015bac Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_enable_intr 0x00015c08 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) + i.drv_i2c_s_get_fifo_status 0x00015c3c Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_callback 0x00015c58 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_callback) + i.drv_i2c_s_write_data 0x00015c64 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x00015c84 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x00015cdc Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x00015d20 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x00015d3c Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x00015d54 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x00015d84 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x00015d9a Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00015dbe Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x00015de4 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x00015dfa Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x00015e10 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x00015e1c Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00015e3a Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00015e5c Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00015e7e Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x00015e8a Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00015ea4 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x00015ec6 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00015ee0 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x00015eec Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00015f38 Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00015f3e Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00015f50 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00015f70 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_video_hw_mode 0x00015fa4 Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00015fb8 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x00015fd8 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00015fe4 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00016024 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00016030 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x00016042 Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00016052 Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00016060 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x00016074 Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00016080 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x00016090 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x000160a2 Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x000160b2 Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x000160c8 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x000160e0 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x000160fa Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00016108 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00016130 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x00016140 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x00016148 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x0001615c Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x00016170 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x00016178 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_p2r_filter_init 0x0001618c Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x000161b0 Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x000161c0 Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x000161fc Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x0001625c Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x000162b0 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x000162c0 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x000162d8 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x000162f8 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x0001631e Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x0001633c Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x0001633d Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwm_out_enable 0x0001635c Section 0 drv_pwm.o(i.drv_pwm_out_enable) + i.drv_pwm_out_set_control 0x0001637c Section 0 drv_pwm.o(i.drv_pwm_out_set_control) + i.drv_pwm_out_set_period 0x00016388 Section 0 drv_pwm.o(i.drv_pwm_out_set_period) + i.drv_pwm_out_set_threshold 0x00016394 Section 0 drv_pwm.o(i.drv_pwm_out_set_threshold) + i.drv_pwr_set_cp_mode 0x000163a0 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x000163c0 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x000163d8 Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x00016410 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x00016411 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x0001641c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x0001641d Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x0001642c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x0001642d Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x00016440 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x00016441 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x00016456 Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00016460 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00016464 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x000164c0 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x000164d4 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x00016510 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x00016514 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00016515 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x00016526 Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x0001652a Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x0001652b Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x0001653c Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00016548 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x00016550 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x0001655c Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x00016568 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x0001657c Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x00016648 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x0001665c Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x00016670 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x00016680 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x000166a6 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x000166ae Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x000166b8 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_enable 0x000166d8 Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_set_int 0x000166f4 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x0001673c Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x00016758 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00016764 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x0001678c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x000167a4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x000167c0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x000167e4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x00016808 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x00016818 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x00016828 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x0001684c Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x0001684d Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x00016866 Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x00016888 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x00016898 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x000168a8 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x000168a9 Thumb Code 54 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x000168e4 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x000168f8 Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x00016908 Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x00016950 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x00016978 Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_clear 0x00016988 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x00016989 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x00016992 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x000169ae Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x000169ca Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x000169cb Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x000169dc Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x000169dd Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x000169f0 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x000169f1 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00016a00 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00016a08 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00016a20 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x00016a60 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x00016a74 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x00016a9c Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x00016aa8 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x00016aae Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x00016aea Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00016afe Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x00016b0e Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x00016b16 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x00016b3c Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x00016b64 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x00016b7c Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x00016b86 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x00016b96 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00016ba0 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x00016baa Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00016bbc Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00016bc6 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00016bd0 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x00016be8 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00016bf8 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00016bf9 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00016c08 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00016c09 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00016c18 Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x00016c4c Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x00016c56 Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x00016c6c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x00016c9c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00016d38 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016dbc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00016de4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00016e0c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00016e6c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00016e6d Thumb Code 232 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00016f9c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00016f9d Thumb Code 180 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00017070 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00017071 Thumb Code 308 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x000171ac Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x000171ad Thumb Code 288 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x000172dc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x000172dd Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x00017508 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00017524 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_esc_clk 0x00017614 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x00017640 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_hw_tear_mode 0x00017674 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x000176a8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x000176a9 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x000176e0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x000176e1 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017754 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_start 0x00017788 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x000177c4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x00017800 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_calc_video_chunks 0x00017820 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x00017821 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x000179b0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x000179b1 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x000179e4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x000179e5 Thumb Code 1160 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x00017eb4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00017ee0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00017f28 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017f74 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x00017f9c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00018060 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00018061 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x00018084 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_ccm 0x00018090 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x000180b0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x000180c4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x000180d4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x000180f8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00018164 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x000181a8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00018280 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x00018330 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x00018331 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x00018374 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x00018375 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x000183a4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x000183a5 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x000183c4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x000183c5 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x000183e4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x000183e5 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x00018478 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x00018479 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x000184d0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x000184d1 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x00018514 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x0001852c Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x00018540 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x00018580 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x000185a0 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x000185c8 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x000185e0 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x00018630 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x00018690 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x00018698 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x000186b8 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x00018724 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x00018744 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x00018760 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x0001876c Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x0001876d Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x0001878c Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x0001878d Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x0001879c Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x000187d4 Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x00018840 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x00018854 Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x00018860 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x00018861 Thumb Code 304 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x000189ac Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x00018a90 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_input_resolution_change 0x00018aa0 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_vsync_deinit 0x00018cb4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00018cd0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00018cdc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tx_state 0x00018cf4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00018d00 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00018dfc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x00018eac Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x00018fc8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x00018fdc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x00018ff8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00019040 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x00019080 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x00019081 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x000190a4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x000190a5 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x000190ec Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x000190ed Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x00019100 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x00019101 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x00019264 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00019265 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x000192a4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x000192a5 Thumb Code 376 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x00019424 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x00019425 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_pwm_out_config_all 0x00019464 Section 0 hal_pwm.o(i.hal_pwm_out_config_all) + i.hal_pwm_out_init 0x000194cc Section 0 hal_pwm.o(i.hal_pwm_out_init) + i.hal_spi_m_clear_rxfifo 0x000194d8 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_deinit 0x000194e6 Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_open 0x000194f8 Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x0001950e Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x00019518 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x000195a0 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x000195bc Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x000195c4 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x000195cc Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_deinit 0x000195d4 Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x00019602 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x0001961c Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x00019664 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x0001968c Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x00019718 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.handle_init 0x00019728 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x00019838 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x00019839 Thumb Code 200 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x0001990c Section 0 ap_demo.o(i.init_panel) + init_panel 0x0001990d Thumb Code 88 ap_demo.o(i.init_panel) + i.main 0x0001996c Section 0 main.o(i.main) + i.open_mipi_rx 0x0001997c Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x0001997d Thumb Code 236 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x00019a88 Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x00019a89 Thumb Code 98 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x00019b18 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x00019b19 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x00019f0c Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x00019f0d Thumb Code 340 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001a070 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001a071 Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001a0fc Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001a0fd Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x0001a27c Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001a27d Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001a320 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001a321 Thumb Code 222 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.send_panel_init_code 0x0001a490 Section 0 ap_demo.o(i.send_panel_init_code) + send_panel_init_code 0x0001a491 Thumb Code 58 ap_demo.o(i.send_panel_init_code) + i.soft_gen_te 0x0001a4cc Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001a4cd Thumb Code 116 hal_internal_vsync.o(i.soft_gen_te) + i.soft_te_timer_cb 0x0001a558 Section 0 ap_demo.o(i.soft_te_timer_cb) + soft_te_timer_cb 0x0001a559 Thumb Code 44 ap_demo.o(i.soft_te_timer_cb) + i.soft_te_timer_init 0x0001a590 Section 0 ap_demo.o(i.soft_te_timer_init) + soft_te_timer_init 0x0001a591 Thumb Code 44 ap_demo.o(i.soft_te_timer_init) + i.soft_timer3_cb 0x0001a5f0 Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001a5f1 Thumb Code 46 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001a62c Section 0 sqrt.o(i.sqrt) + i.translate_data 0x0001a674 Section 0 ap_demo.o(i.translate_data) + i.tx_display_on 0x0001ad4c Section 0 ap_demo.o(i.tx_display_on) + tx_display_on 0x0001ad4d Thumb Code 22 ap_demo.o(i.tx_display_on) + i.tx_panel_reset 0x0001ad6c Section 0 ap_demo.o(i.tx_panel_reset) + tx_panel_reset 0x0001ad6d Thumb Code 40 ap_demo.o(i.tx_panel_reset) + i.vidc_callback 0x0001ad94 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001ad95 Thumb Code 194 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001ae7c Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001ae7d Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001af4c Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001af4d Thumb Code 254 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001b0e8 Section 9396 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001b0e8 Data 108 ap_demo.o(.constdata) + .constdata 0x0001d59c Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001d59c Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001d614 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001d66e Section 8158 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001f64c Section 1 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001f650 Section 8 drv_param_init.o(.constdata) + .constdata 0x0001f658 Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001f658 Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001f710 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001f790 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001f7c0 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001f7e0 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001f828 Section 308 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 56 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701d0 Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701d4 Data 4 ap_demo.o(.data) + g_calibration_flag 0x000701d8 Data 1 ap_demo.o(.data) + start_display_on 0x000701d9 Data 1 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701da Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701db Data 1 ap_demo.o(.data) + panel_display_done 0x000701dc Data 1 ap_demo.o(.data) + g_resolution_change 0x000701dd Data 1 ap_demo.o(.data) + read_bl_data 0x000701e4 Data 2 ap_demo.o(.data) + read_bl_data_bak 0x000701e6 Data 2 ap_demo.o(.data) + value_reg_df 0x000701ec Data 4 ap_demo.o(.data) + value_blue 0x000701f0 Data 1 ap_demo.o(.data) + blue_flag 0x000701f1 Data 1 ap_demo.o(.data) + flag_b1 0x000701f2 Data 1 ap_demo.o(.data) + flag_ca 0x000701f3 Data 1 ap_demo.o(.data) + s20_power_on_flag 0x000701f4 Data 4 ap_demo.o(.data) + b3_read_flag 0x00070204 Data 1 ap_demo.o(.data) + c8_read_flag 0x00070205 Data 1 ap_demo.o(.data) + c9_read_flag 0x00070206 Data 1 ap_demo.o(.data) + read_flag_5a 0x00070207 Data 1 ap_demo.o(.data) + .data 0x00070208 Section 73 app_tp_transfer.o(.data) + s_spim_write 0x0007020d Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x0007020e Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x0007020f Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x00070210 Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x00070212 Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x0007024f Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x00070250 Data 1 app_tp_transfer.o(.data) + .data 0x00070254 Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00070254 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00070258 Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x0007025c Section 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x0007025c Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x0007025d Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x0007025d Data 1 hal_i2c_master.o(.data) + .data 0x00070260 Section 28 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00070260 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00070261 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x00070262 Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x00070264 Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x00070268 Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x0007026c Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x00070270 Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x00070274 Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00070278 Data 4 hal_i2c_slave.o(.data) + .data 0x0007027c Section 230 app_tp_for_custom_s8.o(.data) + app_tp_count 0x00070286 Data 1 app_tp_for_custom_s8.o(.data) + phone_85_flag 0x00070287 Data 1 app_tp_for_custom_s8.o(.data) + phone_F6_flag 0x00070288 Data 1 app_tp_for_custom_s8.o(.data) + phone_E4_flag 0x00070289 Data 1 app_tp_for_custom_s8.o(.data) + phone_72_flag 0x0007028a Data 1 app_tp_for_custom_s8.o(.data) + phone_75_flag 0x0007028b Data 1 app_tp_for_custom_s8.o(.data) + phone_92_flag 0x0007028c Data 1 app_tp_for_custom_s8.o(.data) + phone_74_flag 0x0007028d Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x00070292 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x00070294 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x00070296 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x00070298 Data 2 app_tp_for_custom_s8.o(.data) + .data 0x00070362 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00070363 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00070364 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00070365 Section 3 app_tp_for_custom_s8.o(.data) + .data 0x00070368 Section 5 app_tp_for_custom_s8.o(.data) + .data 0x00070370 Section 48 app_tp_for_custom_s8.o(.data) + .data 0x000703a0 Section 18 norflash.o(.data) + tmprg 0x000703a8 Data 4 norflash.o(.data) + .data 0x000703b4 Section 12 drv_common.o(.data) + s_my_tick 0x000703b4 Data 4 drv_common.o(.data) + .data 0x000703c0 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x000703c0 Data 4 drv_gpio.o(.data) + .data 0x000703c4 Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x000703c4 Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x000703c8 Data 4 drv_i2c_dma.o(.data) + .data 0x000703cc Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x000703cc Data 4 drv_i2c_master.o(.data) + .data 0x000703d0 Section 8 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x000703d0 Data 4 drv_i2c_slave.o(.data) + .data 0x000703d8 Section 1188 drv_param_init.o(.data) + .data 0x0007087c Section 12 drv_pwm.o(.data) + s_pwm_type 0x0007087c Data 1 drv_pwm.o(.data) + s_pwm_cb 0x00070880 Data 8 drv_pwm.o(.data) + .data 0x00070888 Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x00070888 Data 4 drv_spi_master.o(.data) + .data 0x0007088c Section 8 drv_swire.o(.data) + s_swire_cb 0x0007088c Data 8 drv_swire.o(.data) + .data 0x00070894 Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x00070894 Data 1 drv_sys_cfg.o(.data) + .data 0x00070898 Section 80 drv_timer.o(.data) + sg_timer_info 0x00070898 Data 80 drv_timer.o(.data) + .data 0x000708e8 Section 4 hal_internal_vsync.o(.data) + sg_cur_te_info 0x000708e8 Data 4 hal_internal_vsync.o(.data) + .data 0x000708ec Section 8 drv_rxbr.o(.data) + .data 0x000708f4 Section 4 drv_vidc.o(.data) + .data 0x000708f8 Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x000708f8 Data 1 drv_phy_common.o(.data) + .data 0x000708fc Section 12 drv_chip_info.o(.data) + sg_chip_info 0x000708fc Data 4 drv_chip_info.o(.data) + sg_chip_function 0x00070900 Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x00070904 Data 4 drv_chip_info.o(.data) + .data 0x00070908 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x00070908 Data 4 drv_uart.o(.data) + uart_userData 0x0007090c Data 4 drv_uart.o(.data) + .data 0x00070910 Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x00070910 Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x00070914 Data 8 drv_wdg.o(.data) + .data 0x0007091c Section 4 stdout.o(.data) + .data 0x00070920 Section 4 errno.o(.data) + _errno 0x00070920 Data 4 errno.o(.data) + .bss 0x00070924 Section 400 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x00070924 Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x000709ec Data 200 app_tp_transfer.o(.bss) + .bss 0x00070ab4 Section 192 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x00070ab4 Data 192 hal_dsi_rx_ctrl.o(.bss) + .bss 0x00070b74 Section 72 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x00070b74 Data 72 hal_dsi_tx_ctrl.o(.bss) + .bss 0x00070bbc Section 256 tau_log.o(.bss) + .bss 0x00070cbc Section 208 hal_uart.o(.bss) + .bss 0x00070d8c Section 28 drv_dma.o(.bss) + s_dma_handle 0x00070d8c Data 28 drv_dma.o(.bss) + .bss 0x00070da8 Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00070da8 Data 64 drv_gpio.o(.bss) + .bss 0x00070de8 Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x00070de8 Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x00070e88 Data 160 drv_i2c_dma.o(.bss) + .bss 0x00070f28 Section 2392 hal_internal_vsync.o(.bss) + g_imm_buffer 0x00071760 Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x00071860 Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x0007186c Data 20 hal_internal_vsync.o(.bss) + .bss 0x00071880 Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x000728b0 Section 32 hal_spi_slave.o(.bss) + STACK 0x000728d0 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfrcmple 0x0001083d Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010851 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108b1 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108b1 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108d1 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108d1 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000108f3 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000108f3 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010919 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010919 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010929 Thumb Code 114 fepilogue.o(.text) + _double_round 0x0001099b Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109b5 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a59 Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010afd Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b3d Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b65 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b65 Thumb Code 0 init.o(.text) + __decompress 0x00010b89 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010b89 Thumb Code 86 __dczerorl2.o(.text) + ADC_IRQn_Handler 0x00010be1 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010bf9 Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010c11 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c25 Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c41 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010c5d Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010c79 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010c95 Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010cb1 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010ccd Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010ce9 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + FLSCTRL_IRQn_Handler 0x00010d05 Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010d19 Thumb Code 80 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010d69 Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010d7d Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010d95 Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010dad Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010dc5 Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010ded Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010e05 Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010e1d Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010e35 Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + PWM_Task 0x00010e51 Thumb Code 60 ap_demo.o(i.PWM_Task) + S20_Start_init 0x00010eb1 Thumb Code 268 app_tp_transfer.o(i.S20_Start_init) + SPIM_IRQn_Handler 0x00010fe1 Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + UART_DisableDma 0x00010ffd Thumb Code 2 drv_uart.o(i.UART_DisableDma) + __scatterload_null 0x00010fff Thumb Code 2 handlers.o(i.__scatterload_null) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + SPIS_IRQn_Handler 0x00011015 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + SWIRE_IRQn_Handler 0x00011031 Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x0001104d Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00011065 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x0001107d Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00011095 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x000110ad Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x000110c5 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + UART_GetInstance 0x000110e1 Thumb Code 4 drv_uart.o(i.UART_GetInstance) + UART_IRQn_Handler 0x000110e5 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x000110fd Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SetBaudRate 0x00011121 Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x00011169 Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x00011183 Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x000112b7 Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x000112d1 Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x0001138d Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x000113a5 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x000113bd Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x000113d5 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x000113d5 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x000113d5 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x000113d5 Thumb Code 0 printfa.o(i.__0printf) + printf 0x000113d5 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x000113f5 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x000113f5 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x000113f5 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x000113f5 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x000113f5 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x00011419 Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x00011447 Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_copy 0x00011525 Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x00011533 Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x00011541 Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x0001267d Thumb Code 354 ap_demo.o(i.ap_demo) + ap_tp_calibration 0x00012c41 Thumb Code 172 app_tp_transfer.o(i.ap_tp_calibration) + app_ADC_IRQn_Handler 0x00012d09 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x00012d25 Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x00012d49 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x00012d65 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x00012d81 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x00012d9d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x00012db9 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x00012dd5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x00012df1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00012e0d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x00012e29 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x00012e71 Thumb Code 8 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00012e81 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00012e91 Thumb Code 98 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00012f71 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00012ff9 Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00013291 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00013331 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00013379 Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x000133a9 Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x000135a9 Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x000135c9 Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x000135e1 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x000135eb Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x000135f5 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x000135ff Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x00013609 Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x00013611 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x0001362d Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x00013649 Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x00013681 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x00013691 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x000136c1 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x000136e5 Thumb Code 44 ap_demo.o(i.app_tp_calibration_exec) + app_tp_init 0x0001375d Thumb Code 66 app_tp_transfer.o(i.app_tp_init) + app_tp_m_transfer_complate 0x000137e1 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_transfer_complate) + app_tp_phone_analysis_data 0x000137f9 Thumb Code 820 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_phone_clear_reset_on 0x00013b61 Thumb Code 8 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + app_tp_s_read 0x00013b6d Thumb Code 16 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x00013b7d Thumb Code 16 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x00013b8d Thumb Code 710 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x00013e5d Thumb Code 46 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x00013f5d Thumb Code 324 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x000140c5 Thumb Code 24 app_tp_transfer.o(i.app_tp_transfer_screen_start) + board_Init 0x000140e9 Thumb Code 30 board.o(i.board_Init) + ceil 0x00014519 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x0001469d Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x000146f5 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x0001470d Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00014751 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x00014791 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x000147a9 Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x000147cd Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x00014805 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x00014811 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x00014851 Thumb Code 122 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x00014919 Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x0001492d Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x00014985 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x0001498d Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x0001499d Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x000149b1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x000149c5 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x000149e5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x000149f9 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x00014a11 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x00014a25 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x00014a39 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x00014a4d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x00014a61 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x00014a75 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x00014a89 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x00014a9d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x00014ab1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x00014ac5 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x00014add Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x00014af5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x00014b09 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x00014b1d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x00014b31 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x00014b49 Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x00014b65 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x00014b75 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00014b85 Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x00014ba9 Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00014bb5 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x00014c45 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x00014c57 Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x00014c71 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x00014c79 Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00014cbd Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x00014cf3 Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00014d01 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00014d75 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00014d7f Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x00014da9 Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00014ead Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00014f59 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00014f61 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00014f67 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00014f75 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00014f95 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00014fa5 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00014fa9 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00014fb9 Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00014fff Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00015025 Thumb Code 258 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00015131 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x0001513f Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00015153 Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x000151bf Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x000151c3 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x000151db Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x000151e3 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x000151eb Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x000151f5 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00015219 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x0001521d Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00015221 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x00015225 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x0001523d Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x00015257 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00015263 Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x000152c7 Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x00015305 Thumb Code 268 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00015411 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x0001542f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00015437 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x00015453 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x0001546b Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x00015479 Thumb Code 46 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x000154ad Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x000154bd Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x000154c5 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x000154e7 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x000154ef Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00015515 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x000155bf Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x000155d5 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x000155ed Thumb Code 32 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x0001560d Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x00015619 Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x0001564b Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x00015665 Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x0001567d Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x00015689 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x0001569d Thumb Code 62 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x000156e1 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x00015701 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x00015711 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x00015721 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x00015731 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x00015761 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c_dma_init 0x000158c5 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x00015971 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x0001598b Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x000159a5 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x00015a05 Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x00015a15 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_m_set_callback 0x00015a4d Thumb Code 6 drv_i2c_master.o(i.drv_i2c_m_set_callback) + drv_i2c_master_init 0x00015a59 Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x00015ae5 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x00015b41 Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x00015bad Thumb Code 84 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_enable_intr 0x00015c09 Thumb Code 40 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) + drv_i2c_s_get_fifo_status 0x00015c3d Thumb Code 22 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_callback 0x00015c59 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c_s_set_callback) + drv_i2c_s_write_data 0x00015c65 Thumb Code 26 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x00015c85 Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x00015cdd Thumb Code 60 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x00015d21 Thumb Code 18 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x00015d3d Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x00015d55 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x00015d85 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x00015d9b Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00015dbf Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x00015de5 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x00015dfb Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x00015e11 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x00015e1d Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00015e3b Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00015e5d Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00015e7f Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x00015e8b Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00015ea5 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x00015ec7 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00015ee1 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x00015eed Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00015f39 Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00015f3f Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00015f51 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00015f71 Thumb Code 46 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_video_hw_mode 0x00015fa5 Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00015fb9 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x00015fd9 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00015fe5 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00016025 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00016031 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x00016043 Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00016053 Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00016061 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x00016075 Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00016081 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x00016091 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x000160a3 Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x000160b3 Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x000160c9 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x000160e1 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x000160fb Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00016109 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00016131 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x00016141 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x00016149 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x0001615d Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x00016171 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x00016179 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_p2r_filter_init 0x0001618d Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x000161b1 Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x000161c1 Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x000161fd Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x0001625d Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x000162b1 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x000162c1 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x000162d9 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x000162f9 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x0001631f Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwm_out_enable 0x0001635d Thumb Code 26 drv_pwm.o(i.drv_pwm_out_enable) + drv_pwm_out_set_control 0x0001637d Thumb Code 6 drv_pwm.o(i.drv_pwm_out_set_control) + drv_pwm_out_set_period 0x00016389 Thumb Code 6 drv_pwm.o(i.drv_pwm_out_set_period) + drv_pwm_out_set_threshold 0x00016395 Thumb Code 8 drv_pwm.o(i.drv_pwm_out_set_threshold) + drv_pwr_set_cp_mode 0x000163a1 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x000163c1 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x000163d9 Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x00016457 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00016461 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00016465 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x000164c1 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x000164d5 Thumb Code 44 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x00016511 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x00016527 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x0001653d Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x00016549 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x00016551 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x0001655d Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x00016569 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x0001657d Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x00016649 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x0001665d Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x00016671 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x00016681 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x000166a7 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x000166af Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x000166b9 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_enable 0x000166d9 Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_set_int 0x000166f5 Thumb Code 64 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x0001673d Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x00016759 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00016765 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x0001678d Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x000167a5 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x000167c1 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x000167e5 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x00016809 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x00016819 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x00016829 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x00016867 Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x00016889 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x00016899 Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x000168e5 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x000168f9 Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x00016909 Thumb Code 68 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x00016951 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x00016979 Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x00016993 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x000169af Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00016a01 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00016a09 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00016a21 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x00016a61 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x00016a75 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x00016a9d Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x00016aa9 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x00016aaf Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x00016aeb Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00016aff Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x00016b0f Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x00016b17 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x00016b3d Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x00016b65 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x00016b7d Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x00016b87 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x00016b97 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00016ba1 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x00016bab Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00016bbd Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00016bc7 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00016bd1 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x00016be9 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00016c19 Thumb Code 48 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x00016c4d Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x00016c57 Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00016c6d Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x00016c9d Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00016d39 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016dbd Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x00016de5 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00016e0d Thumb Code 88 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x00017509 Thumb Code 24 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_send_ack_cmd 0x00017525 Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_esc_clk 0x00017615 Thumb Code 34 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) + hal_dsi_rx_ctrl_set_cus_sync_line 0x00017641 Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_hw_tear_mode 0x00017675 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017755 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_start 0x00017789 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x000177c5 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x00017801 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x00017eb5 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00017ee1 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x00017f29 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017f75 Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x00017f9d Thumb Code 188 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x00018085 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_ccm 0x00018091 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x000180b1 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x000180c5 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x000180d5 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x000180f9 Thumb Code 94 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00018165 Thumb Code 54 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x000181a9 Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00018281 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x00018515 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x0001852d Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x00018541 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x00018581 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x000185a1 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x000185c9 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x000185e1 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x00018631 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x00018691 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x00018699 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x000186b9 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x00018725 Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x00018745 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x00018761 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x0001879d Thumb Code 46 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x000187d5 Thumb Code 86 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x00018841 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x00018855 Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x000189ad Thumb Code 146 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x00018a91 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_input_resolution_change 0x00018aa1 Thumb Code 418 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_vsync_deinit 0x00018cb5 Thumb Code 24 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00018cd1 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00018cdd Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tx_state 0x00018cf5 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00018d01 Thumb Code 220 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00018dfd Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x00018ead Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x00018fc9 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x00018fdd Thumb Code 22 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x00018ff9 Thumb Code 64 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00019041 Thumb Code 54 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_pwm_out_config_all 0x00019465 Thumb Code 100 hal_pwm.o(i.hal_pwm_out_config_all) + hal_pwm_out_init 0x000194cd Thumb Code 12 hal_pwm.o(i.hal_pwm_out_init) + hal_spi_m_clear_rxfifo 0x000194d9 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_deinit 0x000194e7 Thumb Code 18 hal_swire.o(i.hal_swire_deinit) + hal_swire_open 0x000194f9 Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x0001950f Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x00019519 Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x000195a1 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x000195bd Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x000195c5 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x000195cd Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_deinit 0x000195d5 Thumb Code 46 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x00019603 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x0001961d Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x00019665 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x0001968d Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x00019719 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x00019729 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x0001996d Thumb Code 16 main.o(i.main) + sqrt 0x0001a62d Thumb Code 66 sqrt.o(i.sqrt) + translate_data 0x0001a675 Thumb Code 1734 ap_demo.o(i.translate_data) + panel_init_code 0x0001b154 Data 9160 ap_demo.o(.constdata) + phone_data_21 0x0001d66e Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001d66f Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_0 0x0001d670 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_92_1 0x0001d671 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_1 0x0001d672 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_2 0x0001d673 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_3 0x0001d674 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_4 0x0001d675 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001d676 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_92_3 0x0001d679 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001d67c Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001d680 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001d684 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001d688 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001d68c Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001d690 Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_92_2 0x0001d695 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_1 0x0001d69b Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_2 0x0001d6a1 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_3 0x0001d6a7 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_4 0x0001d6ad Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001d6b3 Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001d6c3 Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_2 0x0001d6ce Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001d6ea Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_3 0x0001d6f4 Data 1224 app_tp_for_custom_s8.o(.constdata) + phone_data_72_5 0x0001dbbc Data 1224 app_tp_for_custom_s8.o(.constdata) + phone_data_72_13 0x0001e084 Data 1224 app_tp_for_custom_s8.o(.constdata) + phone_data_75_1 0x0001e54c Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_00 0x0001e7b8 Data 660 app_tp_for_custom_s8.o(.constdata) + phone_data_75_FF 0x0001ea4c Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_3 0x0001eb6c Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_6 0x0001edd8 Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7 0x0001f044 Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_08 0x0001f2b0 Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_11 0x0001f3d0 Data 620 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001f63c Data 16 app_tp_for_custom_s8.o(.constdata) + screen_reg_start_data_size 0x0001f64c Data 1 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001f95c Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001f98c Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_start_flag 0x000701de Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701e0 Data 2 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701e2 Data 1 ap_demo.o(.data) + value_reg_b1 0x000701e8 Data 2 ap_demo.o(.data) + value_reg_ca 0x000701ea Data 2 ap_demo.o(.data) + value_reg_ca_bak 0x000701f8 Data 2 ap_demo.o(.data) + value_reg_b1_bak 0x000701fa Data 2 ap_demo.o(.data) + panel_mode 0x000701fc Data 1 ap_demo.o(.data) + panel_r 0x000701fe Data 2 ap_demo.o(.data) + panel_g 0x00070200 Data 2 ap_demo.o(.data) + panel_b 0x00070202 Data 2 ap_demo.o(.data) + read_point 0x00070208 Data 1 app_tp_transfer.o(.data) + s_screen_number 0x00070209 Data 2 app_tp_transfer.o(.data) + s_screen_temp 0x0007020b Data 2 app_tp_transfer.o(.data) + s_screen_init_complate 0x00070211 Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x00070213 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x00070216 Data 6 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x0007021c Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x0007021f Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data5 0x00070222 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data6 0x00070225 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data7 0x00070228 Data 5 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data8 0x0007022d Data 6 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data9 0x00070233 Data 2 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data10 0x00070235 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data2 0x00070238 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data3 0x0007023b Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data4 0x0007023e Data 4 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data5 0x00070242 Data 4 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data6 0x00070246 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data7 0x00070249 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data8 0x0007024c Data 3 app_tp_transfer.o(.data) + phone_data_E4 0x0007027c Data 1 app_tp_for_custom_s8.o(.data) + tp_flag 0x0007027d Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x0007027e Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x0007027f Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x00070280 Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x00070281 Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x00070282 Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x00070283 Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x00070284 Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x00070285 Data 1 app_tp_for_custom_s8.o(.data) + phone_data_B1 0x0007028e Data 2 app_tp_for_custom_s8.o(.data) + phone_data_30 0x00070290 Data 2 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x0007029a Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x00070362 Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x00070363 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x00070364 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x00070365 Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x00070368 Data 5 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x00070370 Data 48 app_tp_for_custom_s8.o(.data) + g_fls_w_cmd 0x000703a0 Data 1 norflash.o(.data) + g_fls_r_cmd 0x000703a1 Data 1 norflash.o(.data) + g_fls_write_en_status 0x000703a2 Data 1 norflash.o(.data) + isFlsTransferEnd 0x000703a3 Data 1 norflash.o(.data) + isFlsFifoReq 0x000703a4 Data 1 norflash.o(.data) + isNandWriteCompleted 0x000703a5 Data 1 norflash.o(.data) + isNandReadCompleted 0x000703a6 Data 1 norflash.o(.data) + g_fls_error_info 0x000703ac Data 6 norflash.o(.data) + g_systick_cb_func 0x000703b8 Data 4 drv_common.o(.data) + g_system_clock 0x000703bc Data 4 drv_common.o(.data) + tx_byte_num 0x000703d4 Data 4 drv_i2c_slave.o(.data) + g_scld_fhd_filter_h 0x000703d8 Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x000704d8 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x000705d8 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x000706d8 Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x000707d8 Data 128 drv_param_init.o(.data) + g_ccm_setting 0x00070858 Data 36 drv_param_init.o(.data) + g_int_rxbr_irq0_cb_func 0x000708ec Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x000708f0 Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x000708f4 Data 4 drv_vidc.o(.data) + __stdout 0x0007091c Data 4 stdout.o(.data) + string 0x00070bbc Data 256 tau_log.o(.bss) + hal_dmahandle 0x00070cbc Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x00070d5c Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x00070d7c Data 16 hal_uart.o(.bss) + g_vsync_hande 0x00070f28 Data 56 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00070f60 Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x00071880 Data 4144 dcs_packet_fifo.o(.bss) + g_spis_ctrl_handle 0x000728b0 Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x000728d0 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x000738d0 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x000100e0, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000fd80]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000f98c, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 461 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2636 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2946 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2949 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2951 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2953 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2954 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2956 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2958 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2947 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 462 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2639 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2641 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2643 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2645 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 2910 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 2912 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 2914 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 2916 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 2918 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 2920 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 2922 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 2924 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 2926 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 2930 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 2932 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 2934 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 2936 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 2938 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 2940 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 2942 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 2944 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 2961 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 2963 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 2965 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 2967 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 2976 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 2977 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 2979 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 2983 .text mf_p.l(dsqrt.o) + 0x00010afa 0x00010afa 0x00000002 PAD + 0x00010afc 0x00010afc 0x00000040 Code RO 2985 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 2987 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 2989 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000056 Code RO 2999 .text mc_p.l(__dczerorl2.o) + 0x00010bde 0x00010bde 0x00000002 PAD + 0x00010be0 0x00010be0 0x00000018 Code RO 2270 i.ADC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010bf8 0x00010bf8 0x00000018 Code RO 2271 i.AP_NRESET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c10 0x00010c10 0x00000014 Code RO 2272 i.DMA_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c24 0x00010c24 0x0000001c Code RO 2273 i.EXTI_INT0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c40 0x00010c40 0x0000001c Code RO 2274 i.EXTI_INT1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c5c 0x00010c5c 0x0000001c Code RO 2275 i.EXTI_INT2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c78 0x00010c78 0x0000001c Code RO 2276 i.EXTI_INT3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c94 0x00010c94 0x0000001c Code RO 2277 i.EXTI_INT4_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cb0 0x00010cb0 0x0000001c Code RO 2278 i.EXTI_INT5_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ccc 0x00010ccc 0x0000001c Code RO 2279 i.EXTI_INT6_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ce8 0x00010ce8 0x0000001c Code RO 2280 i.EXTI_INT7_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d04 0x00010d04 0x00000014 Code RO 2281 i.FLSCTRL_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d18 0x00010d18 0x00000050 Code RO 99 i.Gpio_swire_output ap_demo.o + 0x00010d68 0x00010d68 0x00000014 Code RO 2282 i.HardFault_Handler CVWL368.lib(irq_redirect .o) + 0x00010d7c 0x00010d7c 0x00000018 Code RO 2283 i.I2C0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d94 0x00010d94 0x00000018 Code RO 2284 i.I2C1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010dac 0x00010dac 0x00000018 Code RO 2285 i.LCDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010dc4 0x00010dc4 0x00000028 Code RO 893 i.LOG_printf CVWL368.lib(tau_log.o) + 0x00010dec 0x00010dec 0x00000018 Code RO 2286 i.MEMC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e04 0x00010e04 0x00000018 Code RO 2287 i.MIPI_RX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e1c 0x00010e1c 0x00000018 Code RO 2288 i.MIPI_TX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e34 0x00010e34 0x0000001c Code RO 2289 i.PWMDET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e50 0x00010e50 0x00000044 Code RO 100 i.PWM_Task ap_demo.o + 0x00010e94 0x00010e94 0x0000001a Code RO 101 i.PWM_init ap_demo.o + 0x00010eae 0x00010eae 0x00000002 PAD + 0x00010eb0 0x00010eb0 0x00000130 Code RO 289 i.S20_Start_init app_tp_transfer.o + 0x00010fe0 0x00010fe0 0x0000001c Code RO 2290 i.SPIM_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ffc 0x00010ffc 0x00000002 Code RO 2496 i.UART_DisableDma CVWL368.lib(drv_uart.o) + 0x00010ffe 0x00010ffe 0x00000002 Code RO 2994 i.__scatterload_null mc_p.l(handlers.o) + 0x00011000 0x00011000 0x00000014 Data RO 1147 .ARM.__at_0x11000 CVWL368.lib(drv_common.o) + 0x00011014 0x00011014 0x0000001c Code RO 2291 i.SPIS_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011030 0x00011030 0x0000001c Code RO 2292 i.SWIRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001104c 0x0001104c 0x00000018 Code RO 2293 i.SysTick_Handler CVWL368.lib(irq_redirect .o) + 0x00011064 0x00011064 0x00000018 Code RO 2294 i.TIMER0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001107c 0x0001107c 0x00000018 Code RO 2295 i.TIMER1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011094 0x00011094 0x00000018 Code RO 2296 i.TIMER2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110ac 0x000110ac 0x00000018 Code RO 2297 i.TIMER3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110c4 0x000110c4 0x0000001c Code RO 2492 i.UART0_IRQ_Handle CVWL368.lib(drv_uart.o) + 0x000110e0 0x000110e0 0x00000004 Code RO 2502 i.UART_GetInstance CVWL368.lib(drv_uart.o) + 0x000110e4 0x000110e4 0x00000018 Code RO 2298 i.UART_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110fc 0x000110fc 0x00000024 Code RO 2510 i.UART_ResetRxFIFO CVWL368.lib(drv_uart.o) + 0x00011120 0x00011120 0x00000048 Code RO 2513 i.UART_SetBaudRate CVWL368.lib(drv_uart.o) + 0x00011168 0x00011168 0x0000001a Code RO 2514 i.UART_SwitchSCLK CVWL368.lib(drv_uart.o) + 0x00011182 0x00011182 0x00000134 Code RO 2516 i.UART_TransferHandleIRQ CVWL368.lib(drv_uart.o) + 0x000112b6 0x000112b6 0x0000001a Code RO 2518 i.UART_WriteBlocking CVWL368.lib(drv_uart.o) + 0x000112d0 0x000112d0 0x000000bc Code RO 2519 i.UART_init CVWL368.lib(drv_uart.o) + 0x0001138c 0x0001138c 0x00000018 Code RO 2299 i.VIDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113a4 0x000113a4 0x00000018 Code RO 2300 i.VPRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113bc 0x000113bc 0x00000018 Code RO 2301 i.WDG_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113d4 0x000113d4 0x00000020 Code RO 2882 i.__0printf mc_p.l(printfa.o) + 0x000113f4 0x000113f4 0x00000024 Code RO 2888 i.__0vsprintf mc_p.l(printfa.o) + 0x00011418 0x00011418 0x0000002e Code RO 2981 i.__ARM_clz mf_p.l(depilogue.o) + 0x00011446 0x00011446 0x0000001a Code RO 555 i.__ARM_common_switch8 CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00011460 0x00011460 0x00000018 Code RO 1465 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_i2c_master.o) + 0x00011478 0x00011478 0x00000018 Code RO 1500 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_i2c_slave.o) + 0x00011490 0x00011490 0x00000018 Code RO 1636 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_spi_master.o) + 0x000114a8 0x000114a8 0x00000020 Code RO 2124 i.__NVIC_DisableIRQ CVWL368.lib(drv_rxbr.o) + 0x000114c8 0x000114c8 0x00000018 Code RO 2125 i.__NVIC_EnableIRQ CVWL368.lib(drv_rxbr.o) + 0x000114e0 0x000114e0 0x00000044 Code RO 2398 i.__NVIC_SetPriority CVWL368.lib(hal_spi_slave.o) + 0x00011524 0x00011524 0x0000000e Code RO 2993 i.__scatterload_copy mc_p.l(handlers.o) + 0x00011532 0x00011532 0x0000000e Code RO 2995 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x00011540 0x00011540 0x0000000c Code RO 2971 i.__set_errno mc_p.l(errno.o) + 0x0001154c 0x0001154c 0x00000174 Code RO 2889 i._fp_digits mc_p.l(printfa.o) + 0x000116c0 0x000116c0 0x000006ec Code RO 2890 i._printf_core mc_p.l(printfa.o) + 0x00011dac 0x00011dac 0x00000020 Code RO 2891 i._printf_post_padding mc_p.l(printfa.o) + 0x00011dcc 0x00011dcc 0x0000002c Code RO 2892 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011df8 0x00011df8 0x0000000a Code RO 2894 i._sputc mc_p.l(printfa.o) + 0x00011e02 0x00011e02 0x00000002 PAD + 0x00011e04 0x00011e04 0x00000878 Code RO 102 i.ap_dcs_read ap_demo.o + 0x0001267c 0x0001267c 0x00000218 Code RO 103 i.ap_demo ap_demo.o + 0x00012894 0x00012894 0x00000050 Code RO 104 i.ap_get_reg_ca ap_demo.o + 0x000128e4 0x000128e4 0x00000100 Code RO 105 i.ap_get_reg_df ap_demo.o + 0x000129e4 0x000129e4 0x00000084 Code RO 106 i.ap_reset_cb ap_demo.o + 0x00012a68 0x00012a68 0x00000050 Code RO 107 i.ap_set_backlight ap_demo.o + 0x00012ab8 0x00012ab8 0x00000048 Code RO 108 i.ap_set_display_off ap_demo.o + 0x00012b00 0x00012b00 0x00000038 Code RO 109 i.ap_set_display_on ap_demo.o + 0x00012b38 0x00012b38 0x00000098 Code RO 110 i.ap_set_enter_sleep_mode ap_demo.o + 0x00012bd0 0x00012bd0 0x00000048 Code RO 111 i.ap_set_exit_sleep_mode ap_demo.o + 0x00012c18 0x00012c18 0x00000028 Code RO 112 i.ap_set_tp_calibration_04 ap_demo.o + 0x00012c40 0x00012c40 0x000000c8 Code RO 290 i.ap_tp_calibration app_tp_transfer.o + 0x00012d08 0x00012d08 0x0000001c Code RO 2126 i.app_ADC_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00012d24 0x00012d24 0x00000024 Code RO 1389 i.app_AP_NRESET_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012d48 0x00012d48 0x0000001c Code RO 1390 i.app_EXTI_INT0_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012d64 0x00012d64 0x0000001c Code RO 1391 i.app_EXTI_INT1_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012d80 0x00012d80 0x0000001c Code RO 1392 i.app_EXTI_INT2_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012d9c 0x00012d9c 0x0000001c Code RO 1393 i.app_EXTI_INT3_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012db8 0x00012db8 0x0000001c Code RO 1394 i.app_EXTI_INT4_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012dd4 0x00012dd4 0x0000001c Code RO 1395 i.app_EXTI_INT5_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012df0 0x00012df0 0x0000001c Code RO 1396 i.app_EXTI_INT6_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012e0c 0x00012e0c 0x0000001c Code RO 1397 i.app_EXTI_INT7_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012e28 0x00012e28 0x00000048 Code RO 1139 i.app_HardFault_Handler CVWL368.lib(drv_common.o) + 0x00012e70 0x00012e70 0x00000010 Code RO 1501 i.app_I2C0_IRQn_Handler CVWL368.lib(drv_i2c_slave.o) + 0x00012e80 0x00012e80 0x00000010 Code RO 1466 i.app_I2C1_IRQn_Handler CVWL368.lib(drv_i2c_master.o) + 0x00012e90 0x00012e90 0x000000e0 Code RO 1754 i.app_LCDC_IRQn_Handler CVWL368.lib(hal_internal_vsync.o) + 0x00012f70 0x00012f70 0x00000088 Code RO 2068 i.app_MEMC_IRQn_Handler CVWL368.lib(drv_memc.o) + 0x00012ff8 0x00012ff8 0x00000298 Code RO 1840 i.app_MIPI_RX_IRQn_Handler CVWL368.lib(drv_dsi_rx.o) + 0x00013290 0x00013290 0x000000a0 Code RO 1896 i.app_MIPI_TX_IRQn_Handler CVWL368.lib(drv_dsi_tx.o) + 0x00013330 0x00013330 0x00000048 Code RO 1559 i.app_PWMDET_IRQn_Handler CVWL368.lib(drv_pwm.o) + 0x00013378 0x00013378 0x00000030 Code RO 1637 i.app_SPIM_IRQn_Handler CVWL368.lib(drv_spi_master.o) + 0x000133a8 0x000133a8 0x00000200 Code RO 2399 i.app_SPIS_IRQn_Handler CVWL368.lib(hal_spi_slave.o) + 0x000135a8 0x000135a8 0x00000020 Code RO 1669 i.app_SWIRE_IRQn_Handler CVWL368.lib(drv_swire.o) + 0x000135c8 0x000135c8 0x00000018 Code RO 1140 i.app_SysTick_Handler CVWL368.lib(drv_common.o) + 0x000135e0 0x000135e0 0x0000000a Code RO 1719 i.app_TIMER0_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000135ea 0x000135ea 0x0000000a Code RO 1720 i.app_TIMER1_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000135f4 0x000135f4 0x0000000a Code RO 1721 i.app_TIMER2_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000135fe 0x000135fe 0x0000000a Code RO 1722 i.app_TIMER3_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x00013608 0x00013608 0x00000008 Code RO 2520 i.app_UART_IRQn_Handler CVWL368.lib(drv_uart.o) + 0x00013610 0x00013610 0x0000001c Code RO 2191 i.app_VIDC_IRQn_Handler CVWL368.lib(drv_vidc.o) + 0x0001362c 0x0001362c 0x0000001c Code RO 2127 i.app_VPRE_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00013648 0x00013648 0x00000038 Code RO 2579 i.app_WDG_IRQn_Handler CVWL368.lib(drv_wdg.o) + 0x00013680 0x00013680 0x00000010 Code RO 1251 i.app_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00013690 0x00013690 0x00000030 Code RO 1055 i.app_fls_ctrl_Handler CVWL368.lib(norflash.o) + 0x000136c0 0x000136c0 0x00000024 Code RO 291 i.app_tp_I2C_init app_tp_transfer.o + 0x000136e4 0x000136e4 0x00000068 Code RO 113 i.app_tp_calibration_exec ap_demo.o + 0x0001374c 0x0001374c 0x0000000e Code RO 292 i.app_tp_i2cs_callback app_tp_transfer.o + 0x0001375a 0x0001375a 0x00000002 PAD + 0x0001375c 0x0001375c 0x00000054 Code RO 293 i.app_tp_init app_tp_transfer.o + 0x000137b0 0x000137b0 0x00000030 Code RO 294 i.app_tp_m_read app_tp_transfer.o + 0x000137e0 0x000137e0 0x00000008 Code RO 295 i.app_tp_m_transfer_complate app_tp_transfer.o + 0x000137e8 0x000137e8 0x00000010 Code RO 296 i.app_tp_m_write app_tp_transfer.o + 0x000137f8 0x000137f8 0x00000368 Code RO 904 i.app_tp_phone_analysis_data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x00013b60 0x00013b60 0x0000000c Code RO 297 i.app_tp_phone_clear_reset_on app_tp_transfer.o + 0x00013b6c 0x00013b6c 0x00000010 Code RO 299 i.app_tp_s_read app_tp_transfer.o + 0x00013b7c 0x00013b7c 0x00000010 Code RO 301 i.app_tp_s_write app_tp_transfer.o + 0x00013b8c 0x00013b8c 0x000002d0 Code RO 906 i.app_tp_screen_analysis_int CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x00013e5c 0x00013e5c 0x00000034 Code RO 302 i.app_tp_screen_init app_tp_transfer.o + 0x00013e90 0x00013e90 0x0000000c Code RO 303 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00013e9c 0x00013e9c 0x00000040 Code RO 304 i.app_tp_screen_int_init app_tp_transfer.o + 0x00013edc 0x00013edc 0x00000004 Code RO 305 i.app_tp_screen_int_lvl_low app_tp_transfer.o + 0x00013ee0 0x00013ee0 0x00000034 Code RO 306 i.app_tp_transfer_phone app_tp_transfer.o + 0x00013f14 0x00013f14 0x00000048 Code RO 307 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00013f5c 0x00013f5c 0x00000168 Code RO 308 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x000140c4 0x000140c4 0x00000024 Code RO 309 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x000140e8 0x000140e8 0x00000024 Code RO 441 i.board_Init board.o + 0x0001410c 0x0001410c 0x0000040c Code RO 1755 i.calc_framebuffer_setting CVWL368.lib(hal_internal_vsync.o) + 0x00014518 0x00014518 0x000000c8 Code RO 2625 i.ceil m_ps.l(ceil.o) + 0x000145e0 0x000145e0 0x0000002c Code RO 1756 i.check_mipi_rx_tx_video_info CVWL368.lib(hal_internal_vsync.o) + 0x0001460c 0x0001460c 0x00000090 Code RO 1757 i.check_pkt_buf_rev CVWL368.lib(hal_internal_vsync.o) + 0x0001469c 0x0001469c 0x00000058 Code RO 1827 i.dcs_packet_fifo_alloc CVWL368.lib(dcs_packet_fifo.o) + 0x000146f4 0x000146f4 0x00000018 Code RO 1828 i.dcs_packet_fifo_init CVWL368.lib(dcs_packet_fifo.o) + 0x0001470c 0x0001470c 0x00000044 Code RO 1829 i.dcs_packet_free_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x00014750 0x00014750 0x00000024 Code RO 1830 i.dcs_packet_get_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x00014774 0x00014774 0x0000001c Code RO 1758 i.dcs_sw_filter CVWL368.lib(hal_internal_vsync.o) + 0x00014790 0x00014790 0x00000018 Code RO 885 i.delayMs CVWL368.lib(tau_delay.o) + 0x000147a8 0x000147a8 0x00000022 Code RO 886 i.delayUs CVWL368.lib(tau_delay.o) + 0x000147ca 0x000147ca 0x00000002 PAD + 0x000147cc 0x000147cc 0x00000038 Code RO 1688 i.drv_ap_rst_trig_edge_detect CVWL368.lib(drv_sys_cfg.o) + 0x00014804 0x00014804 0x0000000c Code RO 2369 i.drv_chip_info_get_info CVWL368.lib(drv_chip_info.o) + 0x00014810 0x00014810 0x00000040 Code RO 2370 i.drv_chip_info_init CVWL368.lib(drv_chip_info.o) + 0x00014850 0x00014850 0x000000c8 Code RO 2371 i.drv_chip_rx_info_check CVWL368.lib(drv_chip_info.o) + 0x00014918 0x00014918 0x00000014 Code RO 2372 i.drv_chip_rx_init_done CVWL368.lib(drv_chip_info.o) + 0x0001492c 0x0001492c 0x00000058 Code RO 1142 i.drv_common_enable_systick CVWL368.lib(drv_common.o) + 0x00014984 0x00014984 0x00000008 Code RO 1145 i.drv_common_system_init CVWL368.lib(drv_common.o) + 0x0001498c 0x0001498c 0x00000010 Code RO 1166 i.drv_crgu_config_reset_modules CVWL368.lib(drv_crgu.o) + 0x0001499c 0x0001499c 0x00000014 Code RO 1178 i.drv_crgu_set_ahb_pre_div CVWL368.lib(drv_crgu.o) + 0x000149b0 0x000149b0 0x00000014 Code RO 1179 i.drv_crgu_set_ahb_src CVWL368.lib(drv_crgu.o) + 0x000149c4 0x000149c4 0x00000020 Code RO 1182 i.drv_crgu_set_clock CVWL368.lib(drv_crgu.o) + 0x000149e4 0x000149e4 0x00000014 Code RO 1183 i.drv_crgu_set_dpi_mux_src CVWL368.lib(drv_crgu.o) + 0x000149f8 0x000149f8 0x00000018 Code RO 1184 i.drv_crgu_set_dpi_pre_div CVWL368.lib(drv_crgu.o) + 0x00014a10 0x00014a10 0x00000014 Code RO 1185 i.drv_crgu_set_dpi_pre_src CVWL368.lib(drv_crgu.o) + 0x00014a24 0x00014a24 0x00000014 Code RO 1186 i.drv_crgu_set_dsc_core_div CVWL368.lib(drv_crgu.o) + 0x00014a38 0x00014a38 0x00000014 Code RO 1187 i.drv_crgu_set_dsco_src CVWL368.lib(drv_crgu.o) + 0x00014a4c 0x00014a4c 0x00000014 Code RO 1188 i.drv_crgu_set_dsco_src_div CVWL368.lib(drv_crgu.o) + 0x00014a60 0x00014a60 0x00000014 Code RO 1189 i.drv_crgu_set_fb_div CVWL368.lib(drv_crgu.o) + 0x00014a74 0x00014a74 0x00000014 Code RO 1190 i.drv_crgu_set_fb_src CVWL368.lib(drv_crgu.o) + 0x00014a88 0x00014a88 0x00000014 Code RO 1193 i.drv_crgu_set_lcdc_div CVWL368.lib(drv_crgu.o) + 0x00014a9c 0x00014a9c 0x00000014 Code RO 1194 i.drv_crgu_set_lcdc_src CVWL368.lib(drv_crgu.o) + 0x00014ab0 0x00014ab0 0x00000014 Code RO 1195 i.drv_crgu_set_mipi_cfg_src CVWL368.lib(drv_crgu.o) + 0x00014ac4 0x00014ac4 0x00000018 Code RO 1196 i.drv_crgu_set_mipi_ref_src CVWL368.lib(drv_crgu.o) + 0x00014adc 0x00014adc 0x00000018 Code RO 1199 i.drv_crgu_set_reset CVWL368.lib(drv_crgu.o) + 0x00014af4 0x00014af4 0x00000014 Code RO 1200 i.drv_crgu_set_rxbr_div CVWL368.lib(drv_crgu.o) + 0x00014b08 0x00014b08 0x00000014 Code RO 1201 i.drv_crgu_set_rxbr_src CVWL368.lib(drv_crgu.o) + 0x00014b1c 0x00014b1c 0x00000014 Code RO 1203 i.drv_crgu_set_vidc_src CVWL368.lib(drv_crgu.o) + 0x00014b30 0x00014b30 0x00000018 Code RO 1255 i.drv_dma_clear_flag CVWL368.lib(drv_dma.o) + 0x00014b48 0x00014b48 0x0000001c Code RO 1256 i.drv_dma_create_handle CVWL368.lib(drv_dma.o) + 0x00014b64 0x00014b64 0x00000010 Code RO 1258 i.drv_dma_disenable_channel CVWL368.lib(drv_dma.o) + 0x00014b74 0x00014b74 0x00000010 Code RO 1260 i.drv_dma_enable_channel CVWL368.lib(drv_dma.o) + 0x00014b84 0x00014b84 0x00000024 Code RO 1261 i.drv_dma_enable_channel_interrupts CVWL368.lib(drv_dma.o) + 0x00014ba8 0x00014ba8 0x0000000c Code RO 1263 i.drv_dma_get_channel_flag CVWL368.lib(drv_dma.o) + 0x00014bb4 0x00014bb4 0x00000090 Code RO 1266 i.drv_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00014c44 0x00014c44 0x00000012 Code RO 1268 i.drv_dma_prepar_transfer CVWL368.lib(drv_dma.o) + 0x00014c56 0x00014c56 0x0000001a Code RO 1270 i.drv_dma_set_burst CVWL368.lib(drv_dma.o) + 0x00014c70 0x00014c70 0x00000006 Code RO 1271 i.drv_dma_set_callback CVWL368.lib(drv_dma.o) + 0x00014c76 0x00014c76 0x00000002 PAD + 0x00014c78 0x00014c78 0x00000044 Code RO 1273 i.drv_dma_set_transfer CVWL368.lib(drv_dma.o) + 0x00014cbc 0x00014cbc 0x00000036 Code RO 2382 i.drv_dsc_dec_convert_pps_rc_parameter CVWL368.lib(drv_dsc_dec.o) + 0x00014cf2 0x00014cf2 0x0000000c Code RO 2383 i.drv_dsc_dec_disable CVWL368.lib(drv_dsc_dec.o) + 0x00014cfe 0x00014cfe 0x00000002 PAD + 0x00014d00 0x00014d00 0x00000074 Code RO 2384 i.drv_dsc_dec_enable CVWL368.lib(drv_dsc_dec.o) + 0x00014d74 0x00014d74 0x0000000a Code RO 2385 i.drv_dsc_dec_get_nslc CVWL368.lib(drv_dsc_dec.o) + 0x00014d7e 0x00014d7e 0x00000028 Code RO 2387 i.drv_dsc_dec_set_u8_pps CVWL368.lib(drv_dsc_dec.o) + 0x00014da6 0x00014da6 0x00000002 PAD + 0x00014da8 0x00014da8 0x00000104 Code RO 1841 i.drv_dsi_rx_calc_ipi_tx_delay CVWL368.lib(drv_dsi_rx.o) + 0x00014eac 0x00014eac 0x00000040 Code RO 1842 i.drv_dsi_rx_enable_irq CVWL368.lib(drv_dsi_rx.o) + 0x00014eec 0x00014eec 0x00000050 Code RO 1843 i.drv_dsi_rx_get_color_bpp CVWL368.lib(drv_dsi_rx.o) + 0x00014f3c 0x00014f3c 0x0000001c Code RO 1844 i.drv_dsi_rx_get_color_pcc CVWL368.lib(drv_dsi_rx.o) + 0x00014f58 0x00014f58 0x00000008 Code RO 1845 i.drv_dsi_rx_get_compression_en CVWL368.lib(drv_dsi_rx.o) + 0x00014f60 0x00014f60 0x00000006 Code RO 1846 i.drv_dsi_rx_get_max_ret_size CVWL368.lib(drv_dsi_rx.o) + 0x00014f66 0x00014f66 0x0000000e Code RO 1850 i.drv_dsi_rx_power_up CVWL368.lib(drv_dsi_rx.o) + 0x00014f74 0x00014f74 0x00000020 Code RO 1851 i.drv_dsi_rx_set_ctrl_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014f94 0x00014f94 0x00000010 Code RO 1852 i.drv_dsi_rx_set_ddi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014fa4 0x00014fa4 0x00000004 Code RO 1854 i.drv_dsi_rx_set_inten CVWL368.lib(drv_dsi_rx.o) + 0x00014fa8 0x00014fa8 0x00000010 Code RO 1855 i.drv_dsi_rx_set_ipi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014fb8 0x00014fb8 0x00000046 Code RO 1857 i.drv_dsi_rx_set_lane_swap CVWL368.lib(drv_dsi_rx.o) + 0x00014ffe 0x00014ffe 0x00000026 Code RO 1858 i.drv_dsi_rx_set_resp_cnt CVWL368.lib(drv_dsi_rx.o) + 0x00015024 0x00015024 0x0000010c Code RO 1859 i.drv_dsi_rx_set_up_phy CVWL368.lib(drv_dsi_rx.o) + 0x00015130 0x00015130 0x0000000e Code RO 1860 i.drv_dsi_rx_shut_down CVWL368.lib(drv_dsi_rx.o) + 0x0001513e 0x0001513e 0x00000014 Code RO 1898 i.drv_dsi_tx_command_header CVWL368.lib(drv_dsi_tx.o) + 0x00015152 0x00015152 0x0000006c Code RO 1899 i.drv_dsi_tx_command_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x000151be 0x000151be 0x00000004 Code RO 1900 i.drv_dsi_tx_command_put_payload CVWL368.lib(drv_dsi_tx.o) + 0x000151c2 0x000151c2 0x00000018 Code RO 1901 i.drv_dsi_tx_config_eotp CVWL368.lib(drv_dsi_tx.o) + 0x000151da 0x000151da 0x00000008 Code RO 1902 i.drv_dsi_tx_config_int CVWL368.lib(drv_dsi_tx.o) + 0x000151e2 0x000151e2 0x00000008 Code RO 1903 i.drv_dsi_tx_dpi_lpcmd_time CVWL368.lib(drv_dsi_tx.o) + 0x000151ea 0x000151ea 0x0000000a Code RO 1904 i.drv_dsi_tx_dpi_mode CVWL368.lib(drv_dsi_tx.o) + 0x000151f4 0x000151f4 0x00000024 Code RO 1905 i.drv_dsi_tx_dpi_polarity CVWL368.lib(drv_dsi_tx.o) + 0x00015218 0x00015218 0x00000004 Code RO 1906 i.drv_dsi_tx_edpi_cmd_size CVWL368.lib(drv_dsi_tx.o) + 0x0001521c 0x0001521c 0x00000004 Code RO 1908 i.drv_dsi_tx_get_cmd_status CVWL368.lib(drv_dsi_tx.o) + 0x00015220 0x00015220 0x00000004 Code RO 1910 i.drv_dsi_tx_mode CVWL368.lib(drv_dsi_tx.o) + 0x00015224 0x00015224 0x00000018 Code RO 1911 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL368.lib(drv_dsi_tx.o) + 0x0001523c 0x0001523c 0x0000001a Code RO 1912 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL368.lib(drv_dsi_tx.o) + 0x00015256 0x00015256 0x0000000c Code RO 1914 i.drv_dsi_tx_phy_lane_mode CVWL368.lib(drv_dsi_tx.o) + 0x00015262 0x00015262 0x00000064 Code RO 1918 i.drv_dsi_tx_phy_status_ready CVWL368.lib(drv_dsi_tx.o) + 0x000152c6 0x000152c6 0x0000003e Code RO 1919 i.drv_dsi_tx_phy_status_stopstate CVWL368.lib(drv_dsi_tx.o) + 0x00015304 0x00015304 0x0000010c Code RO 1921 i.drv_dsi_tx_phy_test_setup CVWL368.lib(drv_dsi_tx.o) + 0x00015410 0x00015410 0x0000001e Code RO 1922 i.drv_dsi_tx_phy_time_cfg CVWL368.lib(drv_dsi_tx.o) + 0x0001542e 0x0001542e 0x00000008 Code RO 1926 i.drv_dsi_tx_powerup CVWL368.lib(drv_dsi_tx.o) + 0x00015436 0x00015436 0x0000001c Code RO 1927 i.drv_dsi_tx_response_mode CVWL368.lib(drv_dsi_tx.o) + 0x00015452 0x00015452 0x00000018 Code RO 1930 i.drv_dsi_tx_set_bta_ack CVWL368.lib(drv_dsi_tx.o) + 0x0001546a 0x0001546a 0x0000000c Code RO 1931 i.drv_dsi_tx_set_esc_div CVWL368.lib(drv_dsi_tx.o) + 0x00015476 0x00015476 0x00000002 PAD + 0x00015478 0x00015478 0x00000034 Code RO 1932 i.drv_dsi_tx_set_int CVWL368.lib(drv_dsi_tx.o) + 0x000154ac 0x000154ac 0x00000010 Code RO 1933 i.drv_dsi_tx_set_time_out_div CVWL368.lib(drv_dsi_tx.o) + 0x000154bc 0x000154bc 0x00000008 Code RO 1934 i.drv_dsi_tx_set_video_chunk CVWL368.lib(drv_dsi_tx.o) + 0x000154c4 0x000154c4 0x00000022 Code RO 1935 i.drv_dsi_tx_set_video_timing CVWL368.lib(drv_dsi_tx.o) + 0x000154e6 0x000154e6 0x00000008 Code RO 1937 i.drv_dsi_tx_shutdown CVWL368.lib(drv_dsi_tx.o) + 0x000154ee 0x000154ee 0x00000026 Code RO 1938 i.drv_dsi_tx_timeout_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00015514 0x00015514 0x000000aa Code RO 1941 i.drv_dsi_tx_video_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x000155be 0x000155be 0x00000016 Code RO 1942 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL368.lib(drv_dsi_tx.o) + 0x000155d4 0x000155d4 0x00000018 Code RO 1943 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL368.lib(drv_dsi_tx.o) + 0x000155ec 0x000155ec 0x00000020 Code RO 2605 i.drv_efuse_enter_inactive CVWL368.lib(drv_efuse.o) + 0x0001560c 0x0001560c 0x0000000c Code RO 2608 i.drv_efuse_int_enable CVWL368.lib(drv_efuse.o) + 0x00015618 0x00015618 0x00000032 Code RO 2609 i.drv_efuse_read CVWL368.lib(drv_efuse.o) + 0x0001564a 0x0001564a 0x00000018 Code RO 2610 i.drv_efuse_read_req CVWL368.lib(drv_efuse.o) + 0x00015662 0x00015662 0x00000002 PAD + 0x00015664 0x00015664 0x00000018 Code RO 1398 i.drv_gpio_get_input_data CVWL368.lib(drv_gpio.o) + 0x0001567c 0x0001567c 0x0000000c Code RO 1400 i.drv_gpio_register_ap_reset_callback CVWL368.lib(drv_gpio.o) + 0x00015688 0x00015688 0x00000014 Code RO 1401 i.drv_gpio_register_callback CVWL368.lib(drv_gpio.o) + 0x0001569c 0x0001569c 0x00000044 Code RO 1403 i.drv_gpio_set_int CVWL368.lib(drv_gpio.o) + 0x000156e0 0x000156e0 0x00000020 Code RO 1404 i.drv_gpio_set_ioe CVWL368.lib(drv_gpio.o) + 0x00015700 0x00015700 0x00000010 Code RO 1405 i.drv_gpio_set_mode0 CVWL368.lib(drv_gpio.o) + 0x00015710 0x00015710 0x00000010 Code RO 1406 i.drv_gpio_set_mode1 CVWL368.lib(drv_gpio.o) + 0x00015720 0x00015720 0x00000010 Code RO 1407 i.drv_gpio_set_mode2 CVWL368.lib(drv_gpio.o) + 0x00015730 0x00015730 0x00000010 Code RO 1408 i.drv_gpio_set_mode3 CVWL368.lib(drv_gpio.o) + 0x00015740 0x00015740 0x00000020 Code RO 651 i.drv_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x00015760 0x00015760 0x00000130 Code RO 1409 i.drv_gpio_set_pull_state CVWL368.lib(drv_gpio.o) + 0x00015890 0x00015890 0x00000034 Code RO 1441 i.drv_i2c_dma_callback CVWL368.lib(drv_i2c_dma.o) + 0x000158c4 0x000158c4 0x000000ac Code RO 1442 i.drv_i2c_dma_init CVWL368.lib(drv_i2c_dma.o) + 0x00015970 0x00015970 0x0000001a Code RO 1443 i.drv_i2c_enable_rx_dma CVWL368.lib(drv_i2c_dma.o) + 0x0001598a 0x0001598a 0x00000018 Code RO 1444 i.drv_i2c_enable_tx_dma CVWL368.lib(drv_i2c_dma.o) + 0x000159a2 0x000159a2 0x00000002 PAD + 0x000159a4 0x000159a4 0x00000060 Code RO 1468 i.drv_i2c_m_clear_it_pending_bit CVWL368.lib(drv_i2c_master.o) + 0x00015a04 0x00015a04 0x00000010 Code RO 1471 i.drv_i2c_m_enable CVWL368.lib(drv_i2c_master.o) + 0x00015a14 0x00015a14 0x00000038 Code RO 1472 i.drv_i2c_m_enable_intr CVWL368.lib(drv_i2c_master.o) + 0x00015a4c 0x00015a4c 0x0000000c Code RO 1475 i.drv_i2c_m_set_callback CVWL368.lib(drv_i2c_master.o) + 0x00015a58 0x00015a58 0x0000008c Code RO 1479 i.drv_i2c_master_init CVWL368.lib(drv_i2c_master.o) + 0x00015ae4 0x00015ae4 0x0000005c Code RO 1445 i.drv_i2c_master_read_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015b40 0x00015b40 0x0000003c Code RO 1446 i.drv_i2c_master_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015b7c 0x00015b7c 0x0000002e Code RO 1447 i.drv_i2c_master_write_read_cmd CVWL368.lib(drv_i2c_dma.o) + 0x00015baa 0x00015baa 0x00000002 PAD + 0x00015bac 0x00015bac 0x0000005c Code RO 1503 i.drv_i2c_s_clear_it_pending_bit CVWL368.lib(drv_i2c_slave.o) + 0x00015c08 0x00015c08 0x00000034 Code RO 1507 i.drv_i2c_s_enable_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015c3c 0x00015c3c 0x0000001c Code RO 1508 i.drv_i2c_s_get_fifo_status CVWL368.lib(drv_i2c_slave.o) + 0x00015c58 0x00015c58 0x0000000c Code RO 1511 i.drv_i2c_s_set_callback CVWL368.lib(drv_i2c_slave.o) + 0x00015c64 0x00015c64 0x00000020 Code RO 1514 i.drv_i2c_s_write_data CVWL368.lib(drv_i2c_slave.o) + 0x00015c84 0x00015c84 0x00000058 Code RO 1448 i.drv_i2c_set_dma_irq_callback CVWL368.lib(drv_i2c_dma.o) + 0x00015cdc 0x00015cdc 0x00000044 Code RO 1515 i.drv_i2c_slave_init CVWL368.lib(drv_i2c_slave.o) + 0x00015d20 0x00015d20 0x0000001c Code RO 1449 i.drv_i2c_slave_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015d3c 0x00015d3c 0x00000018 Code RO 2010 i.drv_lcdc_config_bypass CVWL368.lib(drv_lcdc.o) + 0x00015d54 0x00015d54 0x00000030 Code RO 2011 i.drv_lcdc_config_ccm CVWL368.lib(drv_lcdc.o) + 0x00015d84 0x00015d84 0x00000016 Code RO 2012 i.drv_lcdc_config_disp_mode CVWL368.lib(drv_lcdc.o) + 0x00015d9a 0x00015d9a 0x00000024 Code RO 2013 i.drv_lcdc_config_dpi_polarity CVWL368.lib(drv_lcdc.o) + 0x00015dbe 0x00015dbe 0x00000026 Code RO 2014 i.drv_lcdc_config_dpi_timing CVWL368.lib(drv_lcdc.o) + 0x00015de4 0x00015de4 0x00000016 Code RO 2015 i.drv_lcdc_config_edpi_mode CVWL368.lib(drv_lcdc.o) + 0x00015dfa 0x00015dfa 0x00000016 Code RO 2016 i.drv_lcdc_config_endianness CVWL368.lib(drv_lcdc.o) + 0x00015e10 0x00015e10 0x0000000c Code RO 2017 i.drv_lcdc_config_input_size CVWL368.lib(drv_lcdc.o) + 0x00015e1c 0x00015e1c 0x0000001e Code RO 2018 i.drv_lcdc_config_int CVWL368.lib(drv_lcdc.o) + 0x00015e3a 0x00015e3a 0x00000022 Code RO 2019 i.drv_lcdc_config_int_single CVWL368.lib(drv_lcdc.o) + 0x00015e5c 0x00015e5c 0x00000022 Code RO 2020 i.drv_lcdc_config_overwrite CVWL368.lib(drv_lcdc.o) + 0x00015e7e 0x00015e7e 0x0000000c Code RO 2021 i.drv_lcdc_config_overwrite_rgb CVWL368.lib(drv_lcdc.o) + 0x00015e8a 0x00015e8a 0x0000001a Code RO 2022 i.drv_lcdc_config_partial_display_area CVWL368.lib(drv_lcdc.o) + 0x00015ea4 0x00015ea4 0x00000022 Code RO 2023 i.drv_lcdc_config_partial_display_enable CVWL368.lib(drv_lcdc.o) + 0x00015ec6 0x00015ec6 0x0000001a Code RO 2025 i.drv_lcdc_config_scale_up_coef CVWL368.lib(drv_lcdc.o) + 0x00015ee0 0x00015ee0 0x0000000c Code RO 2026 i.drv_lcdc_config_scale_up_step CVWL368.lib(drv_lcdc.o) + 0x00015eec 0x00015eec 0x0000004c Code RO 2027 i.drv_lcdc_config_src_parameter CVWL368.lib(drv_lcdc.o) + 0x00015f38 0x00015f38 0x00000006 Code RO 2028 i.drv_lcdc_config_thresh CVWL368.lib(drv_lcdc.o) + 0x00015f3e 0x00015f3e 0x00000012 Code RO 2029 i.drv_lcdc_ctrl_flow CVWL368.lib(drv_lcdc.o) + 0x00015f50 0x00015f50 0x00000020 Code RO 2031 i.drv_lcdc_enable_shadow_reg CVWL368.lib(drv_lcdc.o) + 0x00015f70 0x00015f70 0x00000034 Code RO 2032 i.drv_lcdc_set_int CVWL368.lib(drv_lcdc.o) + 0x00015fa4 0x00015fa4 0x00000014 Code RO 2034 i.drv_lcdc_set_video_hw_mode CVWL368.lib(drv_lcdc.o) + 0x00015fb8 0x00015fb8 0x00000020 Code RO 2035 i.drv_lcdc_start CVWL368.lib(drv_lcdc.o) + 0x00015fd8 0x00015fd8 0x0000000c Code RO 2069 i.drv_memc_clear_status CVWL368.lib(drv_memc.o) + 0x00015fe4 0x00015fe4 0x00000040 Code RO 2070 i.drv_memc_enable_irq CVWL368.lib(drv_memc.o) + 0x00016024 0x00016024 0x0000000c Code RO 2071 i.drv_memc_gen_a_tear_signal CVWL368.lib(drv_memc.o) + 0x00016030 0x00016030 0x00000012 Code RO 2072 i.drv_memc_get_status CVWL368.lib(drv_memc.o) + 0x00016042 0x00016042 0x00000010 Code RO 2073 i.drv_memc_rate_transfer_sel CVWL368.lib(drv_memc.o) + 0x00016052 0x00016052 0x0000000e Code RO 2074 i.drv_memc_sel_vsync CVWL368.lib(drv_memc.o) + 0x00016060 0x00016060 0x00000014 Code RO 2075 i.drv_memc_set_active_height CVWL368.lib(drv_memc.o) + 0x00016074 0x00016074 0x0000000c Code RO 2076 i.drv_memc_set_data_mode CVWL368.lib(drv_memc.o) + 0x00016080 0x00016080 0x00000010 Code RO 2079 i.drv_memc_set_double_buffer CVWL368.lib(drv_memc.o) + 0x00016090 0x00016090 0x00000012 Code RO 2080 i.drv_memc_set_double_buffer_reverse CVWL368.lib(drv_memc.o) + 0x000160a2 0x000160a2 0x00000010 Code RO 2082 i.drv_memc_set_fs_en_conditions CVWL368.lib(drv_memc.o) + 0x000160b2 0x000160b2 0x00000014 Code RO 2083 i.drv_memc_set_inten CVWL368.lib(drv_memc.o) + 0x000160c6 0x000160c6 0x00000002 PAD + 0x000160c8 0x000160c8 0x00000018 Code RO 2084 i.drv_memc_set_lcdc_st_conditions CVWL368.lib(drv_memc.o) + 0x000160e0 0x000160e0 0x0000001a Code RO 2085 i.drv_memc_set_ltpo_mode CVWL368.lib(drv_memc.o) + 0x000160fa 0x000160fa 0x0000000e Code RO 2089 i.drv_memc_set_tear_mode CVWL368.lib(drv_memc.o) + 0x00016108 0x00016108 0x00000028 Code RO 2090 i.drv_memc_set_tear_waveform CVWL368.lib(drv_memc.o) + 0x00016130 0x00016130 0x0000000e Code RO 2092 i.drv_memc_set_vidc_sync_cnt CVWL368.lib(drv_memc.o) + 0x0001613e 0x0001613e 0x00000002 PAD + 0x00016140 0x00016140 0x00000008 Code RO 1537 i.drv_param_init_get_ccm CVWL368.lib(drv_param_init.o) + 0x00016148 0x00016148 0x00000014 Code RO 1538 i.drv_param_init_get_scld_filter_h CVWL368.lib(drv_param_init.o) + 0x0001615c 0x0001615c 0x00000014 Code RO 1539 i.drv_param_init_get_scld_filter_v CVWL368.lib(drv_param_init.o) + 0x00016170 0x00016170 0x00000008 Code RO 1540 i.drv_param_init_get_sclu_filter CVWL368.lib(drv_param_init.o) + 0x00016178 0x00016178 0x00000014 Code RO 1541 i.drv_param_init_set_ccm CVWL368.lib(drv_param_init.o) + 0x0001618c 0x0001618c 0x00000024 Code RO 1544 i.drv_param_p2r_filter_init CVWL368.lib(drv_param_init.o) + 0x000161b0 0x000161b0 0x00000010 Code RO 2341 i.drv_phy_enable_calibration CVWL368.lib(drv_phy_common.o) + 0x000161c0 0x000161c0 0x0000003c Code RO 2342 i.drv_phy_get_calibration CVWL368.lib(drv_phy_common.o) + 0x000161fc 0x000161fc 0x00000060 Code RO 2343 i.drv_phy_get_pll_para CVWL368.lib(drv_phy_common.o) + 0x0001625c 0x0001625c 0x00000054 Code RO 2344 i.drv_phy_get_rate_para CVWL368.lib(drv_phy_common.o) + 0x000162b0 0x000162b0 0x00000010 Code RO 2345 i.drv_phy_test_clear CVWL368.lib(drv_phy_common.o) + 0x000162c0 0x000162c0 0x00000018 Code RO 2346 i.drv_phy_test_lock CVWL368.lib(drv_phy_common.o) + 0x000162d8 0x000162d8 0x00000020 Code RO 2348 i.drv_phy_test_write_1_byte CVWL368.lib(drv_phy_common.o) + 0x000162f8 0x000162f8 0x00000026 Code RO 2349 i.drv_phy_test_write_2_byte CVWL368.lib(drv_phy_common.o) + 0x0001631e 0x0001631e 0x0000001e Code RO 2350 i.drv_phy_test_write_code CVWL368.lib(drv_phy_common.o) + 0x0001633c 0x0001633c 0x00000020 Code RO 2351 i.drv_phy_test_write_data CVWL368.lib(drv_phy_common.o) + 0x0001635c 0x0001635c 0x00000020 Code RO 1569 i.drv_pwm_out_enable CVWL368.lib(drv_pwm.o) + 0x0001637c 0x0001637c 0x0000000c Code RO 1572 i.drv_pwm_out_set_control CVWL368.lib(drv_pwm.o) + 0x00016388 0x00016388 0x0000000c Code RO 1573 i.drv_pwm_out_set_period CVWL368.lib(drv_pwm.o) + 0x00016394 0x00016394 0x0000000c Code RO 1575 i.drv_pwm_out_set_threshold CVWL368.lib(drv_pwm.o) + 0x000163a0 0x000163a0 0x00000020 Code RO 1599 i.drv_pwr_set_cp_mode CVWL368.lib(drv_pwr.o) + 0x000163c0 0x000163c0 0x00000018 Code RO 1600 i.drv_pwr_set_pvd_mode CVWL368.lib(drv_pwr.o) + 0x000163d8 0x000163d8 0x00000038 Code RO 1601 i.drv_pwr_set_system_clk_src CVWL368.lib(drv_pwr.o) + 0x00016410 0x00016410 0x0000000c Code RO 1861 i.drv_rx_phy_test_clear CVWL368.lib(drv_dsi_rx.o) + 0x0001641c 0x0001641c 0x00000010 Code RO 1862 i.drv_rx_phy_test_lock CVWL368.lib(drv_dsi_rx.o) + 0x0001642c 0x0001642c 0x00000014 Code RO 1864 i.drv_rx_phy_test_write_1_byte CVWL368.lib(drv_dsi_rx.o) + 0x00016440 0x00016440 0x00000016 Code RO 1865 i.drv_rx_phy_test_write_2_byte CVWL368.lib(drv_dsi_rx.o) + 0x00016456 0x00016456 0x0000000a Code RO 2128 i.drv_rxbr_clear_pkt_buffer CVWL368.lib(drv_rxbr.o) + 0x00016460 0x00016460 0x00000004 Code RO 2129 i.drv_rxbr_clear_status0 CVWL368.lib(drv_rxbr.o) + 0x00016464 0x00016464 0x0000005a Code RO 2131 i.drv_rxbr_enable_irq CVWL368.lib(drv_rxbr.o) + 0x000164be 0x000164be 0x00000002 PAD + 0x000164c0 0x000164c0 0x00000014 Code RO 2132 i.drv_rxbr_frame_drop_cfg CVWL368.lib(drv_rxbr.o) + 0x000164d4 0x000164d4 0x0000003c Code RO 2133 i.drv_rxbr_get_clk CVWL368.lib(drv_rxbr.o) + 0x00016510 0x00016510 0x00000004 Code RO 2134 i.drv_rxbr_get_col_addr CVWL368.lib(drv_rxbr.o) + 0x00016514 0x00016514 0x00000012 Code RO 1759 i.drv_rxbr_get_int_source CVWL368.lib(hal_internal_vsync.o) + 0x00016526 0x00016526 0x00000004 Code RO 2137 i.drv_rxbr_get_page_addr CVWL368.lib(drv_rxbr.o) + 0x0001652a 0x0001652a 0x00000012 Code RO 1760 i.drv_rxbr_get_status0 CVWL368.lib(hal_internal_vsync.o) + 0x0001653c 0x0001653c 0x0000000c Code RO 2139 i.drv_rxbr_hline_rcv0_cfg CVWL368.lib(drv_rxbr.o) + 0x00016548 0x00016548 0x00000008 Code RO 2140 i.drv_rxbr_hline_rcv_cfg CVWL368.lib(drv_rxbr.o) + 0x00016550 0x00016550 0x0000000c Code RO 2141 i.drv_rxbr_register_irq0_callback CVWL368.lib(drv_rxbr.o) + 0x0001655c 0x0001655c 0x0000000c Code RO 2142 i.drv_rxbr_register_irq1_callback CVWL368.lib(drv_rxbr.o) + 0x00016568 0x00016568 0x00000014 Code RO 2143 i.drv_rxbr_set_ack_pkt_header CVWL368.lib(drv_rxbr.o) + 0x0001657c 0x0001657c 0x000000cc Code RO 2144 i.drv_rxbr_set_cmd_filter CVWL368.lib(drv_rxbr.o) + 0x00016648 0x00016648 0x00000014 Code RO 2146 i.drv_rxbr_set_color_format CVWL368.lib(drv_rxbr.o) + 0x0001665c 0x0001665c 0x00000014 Code RO 2148 i.drv_rxbr_set_inten CVWL368.lib(drv_rxbr.o) + 0x00016670 0x00016670 0x00000010 Code RO 2149 i.drv_rxbr_set_ltpo_drop_th CVWL368.lib(drv_rxbr.o) + 0x00016680 0x00016680 0x00000026 Code RO 2151 i.drv_rxbr_set_usr_cfg CVWL368.lib(drv_rxbr.o) + 0x000166a6 0x000166a6 0x00000008 Code RO 2152 i.drv_rxbr_set_usr_col CVWL368.lib(drv_rxbr.o) + 0x000166ae 0x000166ae 0x00000008 Code RO 2153 i.drv_rxbr_set_usr_row CVWL368.lib(drv_rxbr.o) + 0x000166b6 0x000166b6 0x00000002 PAD + 0x000166b8 0x000166b8 0x00000020 Code RO 1645 i.drv_spi_m_read_data CVWL368.lib(drv_spi_master.o) + 0x000166d8 0x000166d8 0x0000001c Code RO 1670 i.drv_swire_enable CVWL368.lib(drv_swire.o) + 0x000166f4 0x000166f4 0x00000048 Code RO 1673 i.drv_swire_set_int CVWL368.lib(drv_swire.o) + 0x0001673c 0x0001673c 0x0000001c Code RO 1674 i.drv_swire_set_power_down CVWL368.lib(drv_swire.o) + 0x00016758 0x00016758 0x0000000c Code RO 1689 i.drv_sys_cfg_clear_all_int CVWL368.lib(drv_sys_cfg.o) + 0x00016764 0x00016764 0x00000028 Code RO 1690 i.drv_sys_cfg_clear_pending CVWL368.lib(drv_sys_cfg.o) + 0x0001678c 0x0001678c 0x00000018 Code RO 1693 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL368.lib(drv_sys_cfg.o) + 0x000167a4 0x000167a4 0x0000001c Code RO 1694 i.drv_sys_cfg_sel_ap_rst_trig CVWL368.lib(drv_sys_cfg.o) + 0x000167c0 0x000167c0 0x00000024 Code RO 1695 i.drv_sys_cfg_sel_gpio_group CVWL368.lib(drv_sys_cfg.o) + 0x000167e4 0x000167e4 0x00000024 Code RO 1696 i.drv_sys_cfg_sel_int_trig CVWL368.lib(drv_sys_cfg.o) + 0x00016808 0x00016808 0x00000010 Code RO 1698 i.drv_sys_cfg_set_dma_rx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016818 0x00016818 0x00000010 Code RO 1699 i.drv_sys_cfg_set_dma_tx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016828 0x00016828 0x00000024 Code RO 1700 i.drv_sys_cfg_set_int CVWL368.lib(drv_sys_cfg.o) + 0x0001684c 0x0001684c 0x0000001a Code RO 1723 i.drv_timer_clear_status_flags CVWL368.lib(drv_timer.o) + 0x00016866 0x00016866 0x00000020 Code RO 1724 i.drv_timer_enable CVWL368.lib(drv_timer.o) + 0x00016886 0x00016886 0x00000002 PAD + 0x00016888 0x00016888 0x00000010 Code RO 1725 i.drv_timer_get_instance CVWL368.lib(drv_timer.o) + 0x00016898 0x00016898 0x00000010 Code RO 1726 i.drv_timer_get_prescaler CVWL368.lib(drv_timer.o) + 0x000168a8 0x000168a8 0x0000003c Code RO 1728 i.drv_timer_handle_interrupt CVWL368.lib(drv_timer.o) + 0x000168e4 0x000168e4 0x00000014 Code RO 1729 i.drv_timer_register_callback CVWL368.lib(drv_timer.o) + 0x000168f8 0x000168f8 0x00000010 Code RO 1730 i.drv_timer_set_compare_val CVWL368.lib(drv_timer.o) + 0x00016908 0x00016908 0x00000048 Code RO 1731 i.drv_timer_set_int CVWL368.lib(drv_timer.o) + 0x00016950 0x00016950 0x00000028 Code RO 1732 i.drv_timer_set_prescaler CVWL368.lib(drv_timer.o) + 0x00016978 0x00016978 0x00000010 Code RO 1733 i.drv_timer_set_repeat CVWL368.lib(drv_timer.o) + 0x00016988 0x00016988 0x0000000a Code RO 1944 i.drv_tx_phy_test_clear CVWL368.lib(drv_dsi_tx.o) + 0x00016992 0x00016992 0x0000001c Code RO 1945 i.drv_tx_phy_test_enter CVWL368.lib(drv_dsi_tx.o) + 0x000169ae 0x000169ae 0x0000001c Code RO 1946 i.drv_tx_phy_test_exit CVWL368.lib(drv_dsi_tx.o) + 0x000169ca 0x000169ca 0x00000012 Code RO 1948 i.drv_tx_phy_test_write_1_byte CVWL368.lib(drv_dsi_tx.o) + 0x000169dc 0x000169dc 0x00000014 Code RO 1949 i.drv_tx_phy_test_write_2_byte CVWL368.lib(drv_dsi_tx.o) + 0x000169f0 0x000169f0 0x00000010 Code RO 1950 i.drv_tx_phy_test_write_code CVWL368.lib(drv_dsi_tx.o) + 0x00016a00 0x00016a00 0x00000008 Code RO 2192 i.drv_vidc_clear_irq CVWL368.lib(drv_vidc.o) + 0x00016a08 0x00016a08 0x00000018 Code RO 2196 i.drv_vidc_enable CVWL368.lib(drv_vidc.o) + 0x00016a20 0x00016a20 0x00000040 Code RO 2197 i.drv_vidc_enable_irq CVWL368.lib(drv_vidc.o) + 0x00016a60 0x00016a60 0x00000012 Code RO 2199 i.drv_vidc_get_irq_status CVWL368.lib(drv_vidc.o) + 0x00016a72 0x00016a72 0x00000002 PAD + 0x00016a74 0x00016a74 0x00000028 Code RO 2203 i.drv_vidc_init_module_enable CVWL368.lib(drv_vidc.o) + 0x00016a9c 0x00016a9c 0x0000000c Code RO 2204 i.drv_vidc_register_callback CVWL368.lib(drv_vidc.o) + 0x00016aa8 0x00016aa8 0x00000006 Code RO 2205 i.drv_vidc_reset CVWL368.lib(drv_vidc.o) + 0x00016aae 0x00016aae 0x0000003c Code RO 2207 i.drv_vidc_set_dst_parameter CVWL368.lib(drv_vidc.o) + 0x00016aea 0x00016aea 0x00000014 Code RO 2211 i.drv_vidc_set_irqen CVWL368.lib(drv_vidc.o) + 0x00016afe 0x00016afe 0x00000010 Code RO 2212 i.drv_vidc_set_mirror CVWL368.lib(drv_vidc.o) + 0x00016b0e 0x00016b0e 0x00000008 Code RO 2215 i.drv_vidc_set_p2r_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016b16 0x00016b16 0x00000026 Code RO 2216 i.drv_vidc_set_p2r_hinitb CVWL368.lib(drv_vidc.o) + 0x00016b3c 0x00016b3c 0x00000026 Code RO 2217 i.drv_vidc_set_p2r_hinitr CVWL368.lib(drv_vidc.o) + 0x00016b62 0x00016b62 0x00000002 PAD + 0x00016b64 0x00016b64 0x00000018 Code RO 2218 i.drv_vidc_set_pentile_swap CVWL368.lib(drv_vidc.o) + 0x00016b7c 0x00016b7c 0x0000000a Code RO 2219 i.drv_vidc_set_pu_ctrl CVWL368.lib(drv_vidc.o) + 0x00016b86 0x00016b86 0x00000010 Code RO 2220 i.drv_vidc_set_rotation CVWL368.lib(drv_vidc.o) + 0x00016b96 0x00016b96 0x0000000a Code RO 2221 i.drv_vidc_set_scld_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016ba0 0x00016ba0 0x0000000a Code RO 2222 i.drv_vidc_set_scld_hcoef1 CVWL368.lib(drv_vidc.o) + 0x00016baa 0x00016baa 0x00000012 Code RO 2223 i.drv_vidc_set_scld_step CVWL368.lib(drv_vidc.o) + 0x00016bbc 0x00016bbc 0x0000000a Code RO 2224 i.drv_vidc_set_scld_vcoef0 CVWL368.lib(drv_vidc.o) + 0x00016bc6 0x00016bc6 0x0000000a Code RO 2225 i.drv_vidc_set_scld_vcoef1 CVWL368.lib(drv_vidc.o) + 0x00016bd0 0x00016bd0 0x00000016 Code RO 2226 i.drv_vidc_set_src_parameter CVWL368.lib(drv_vidc.o) + 0x00016be6 0x00016be6 0x00000002 PAD + 0x00016be8 0x00016be8 0x00000010 Code RO 2580 i.drv_wdg_clear_counter CVWL368.lib(drv_wdg.o) + 0x00016bf8 0x00016bf8 0x00000010 Code RO 2581 i.drv_wdg_clear_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016c08 0x00016c08 0x00000010 Code RO 2584 i.drv_wdg_read_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016c18 0x00016c18 0x00000034 Code RO 2587 i.drv_wdg_set_int CVWL368.lib(drv_wdg.o) + 0x00016c4c 0x00016c4c 0x0000000a Code RO 1310 i.fls_clr_interrupt_flag CVWL368.lib(drv_fls.o) + 0x00016c56 0x00016c56 0x00000014 Code RO 895 i.fputc CVWL368.lib(tau_log.o) + 0x00016c6a 0x00016c6a 0x00000002 PAD + 0x00016c6c 0x00016c6c 0x00000030 Code RO 470 i.hal_dsi_rx_ctrl_create_handle CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016c9c 0x00016c9c 0x0000009c Code RO 472 i.hal_dsi_rx_ctrl_deinit CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016d38 0x00016d38 0x00000084 Code RO 474 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016dbc 0x00016dbc 0x00000028 Code RO 476 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016de4 0x00016de4 0x00000028 Code RO 478 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e0c 0x00016e0c 0x00000060 Code RO 480 i.hal_dsi_rx_ctrl_init CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e6c 0x00016e6c 0x00000130 Code RO 481 i.hal_dsi_rx_ctrl_init_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016f9c 0x00016f9c 0x000000d4 Code RO 482 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017070 0x00017070 0x0000013c Code RO 483 i.hal_dsi_rx_ctrl_init_memc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000171ac 0x000171ac 0x00000130 Code RO 484 i.hal_dsi_rx_ctrl_init_rxbr CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000172dc 0x000172dc 0x0000022c Code RO 485 i.hal_dsi_rx_ctrl_init_vidc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017508 0x00017508 0x0000001c Code RO 486 i.hal_dsi_rx_ctrl_pre_init_pps CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017524 0x00017524 0x000000f0 Code RO 489 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017614 0x00017614 0x0000002c Code RO 491 i.hal_dsi_rx_ctrl_set_cus_esc_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017640 0x00017640 0x00000034 Code RO 493 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017674 0x00017674 0x00000034 Code RO 496 i.hal_dsi_rx_ctrl_set_hw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000176a8 0x000176a8 0x00000038 Code RO 497 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000176e0 0x000176e0 0x00000072 Code RO 501 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017752 0x00017752 0x00000002 PAD + 0x00017754 0x00017754 0x00000034 Code RO 502 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017788 0x00017788 0x0000003c Code RO 505 i.hal_dsi_rx_ctrl_start CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000177c4 0x000177c4 0x0000003c Code RO 506 i.hal_dsi_rx_ctrl_stop CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017800 0x00017800 0x00000020 Code RO 508 i.hal_dsi_rx_ctrl_toggle_resolution CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017820 0x00017820 0x00000190 Code RO 559 i.hal_dsi_tx_calc_video_chunks CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000179b0 0x000179b0 0x00000034 Code RO 560 i.hal_dsi_tx_config_params_for_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000179e4 0x000179e4 0x000004d0 Code RO 561 i.hal_dsi_tx_count_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017eb4 0x00017eb4 0x0000002c Code RO 563 i.hal_dsi_tx_ctrl_create_handle CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017ee0 0x00017ee0 0x00000048 Code RO 564 i.hal_dsi_tx_ctrl_deinit CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f28 0x00017f28 0x0000004c Code RO 565 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f74 0x00017f74 0x00000028 Code RO 567 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f9c 0x00017f9c 0x000000c4 Code RO 569 i.hal_dsi_tx_ctrl_init CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018060 0x00018060 0x00000024 Code RO 570 i.hal_dsi_tx_ctrl_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018084 0x00018084 0x0000000c Code RO 571 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018090 0x00018090 0x00000020 Code RO 574 i.hal_dsi_tx_ctrl_set_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180b0 0x000180b0 0x00000014 Code RO 580 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180c4 0x000180c4 0x00000010 Code RO 581 i.hal_dsi_tx_ctrl_set_partial_disp CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180d4 0x000180d4 0x00000024 Code RO 582 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180f8 0x000180f8 0x0000006c Code RO 584 i.hal_dsi_tx_ctrl_start CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018164 0x00018164 0x00000044 Code RO 585 i.hal_dsi_tx_ctrl_stop CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181a8 0x000181a8 0x000000d8 Code RO 586 i.hal_dsi_tx_ctrl_write_array_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018280 0x00018280 0x000000b0 Code RO 587 i.hal_dsi_tx_ctrl_write_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018330 0x00018330 0x00000044 Code RO 588 i.hal_dsi_tx_init_data_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018374 0x00018374 0x00000030 Code RO 589 i.hal_dsi_tx_init_dpi_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000183a4 0x000183a4 0x00000020 Code RO 590 i.hal_dsi_tx_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000183c4 0x000183c4 0x00000020 Code RO 591 i.hal_dsi_tx_init_phy_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000183e4 0x000183e4 0x00000094 Code RO 592 i.hal_dsi_tx_init_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018478 0x00018478 0x00000058 Code RO 593 i.hal_dsi_tx_init_video_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000184d0 0x000184d0 0x00000044 Code RO 594 i.hal_dsi_tx_send_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018514 0x00018514 0x00000018 Code RO 652 i.hal_gpio_ctrl_eint CVWL368.lib(hal_gpio.o) + 0x0001852c 0x0001852c 0x00000012 Code RO 653 i.hal_gpio_get_input_data CVWL368.lib(hal_gpio.o) + 0x0001853e 0x0001853e 0x00000002 PAD + 0x00018540 0x00018540 0x00000040 Code RO 656 i.hal_gpio_init_eint CVWL368.lib(hal_gpio.o) + 0x00018580 0x00018580 0x00000020 Code RO 657 i.hal_gpio_init_input CVWL368.lib(hal_gpio.o) + 0x000185a0 0x000185a0 0x00000028 Code RO 658 i.hal_gpio_init_output CVWL368.lib(hal_gpio.o) + 0x000185c8 0x000185c8 0x00000018 Code RO 659 i.hal_gpio_reg_eint_cb CVWL368.lib(hal_gpio.o) + 0x000185e0 0x000185e0 0x00000050 Code RO 660 i.hal_gpio_set_ap_reset_int CVWL368.lib(hal_gpio.o) + 0x00018630 0x00018630 0x00000060 Code RO 662 i.hal_gpio_set_mode CVWL368.lib(hal_gpio.o) + 0x00018690 0x00018690 0x00000008 Code RO 663 i.hal_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x00018698 0x00018698 0x00000020 Code RO 665 i.hal_gpio_set_pull_state CVWL368.lib(hal_gpio.o) + 0x000186b8 0x000186b8 0x0000006c Code RO 691 i.hal_i2c_m_dma_init CVWL368.lib(hal_i2c_master.o) + 0x00018724 0x00018724 0x00000020 Code RO 692 i.hal_i2c_m_dma_read CVWL368.lib(hal_i2c_master.o) + 0x00018744 0x00018744 0x0000001c Code RO 693 i.hal_i2c_m_dma_write CVWL368.lib(hal_i2c_master.o) + 0x00018760 0x00018760 0x0000000c Code RO 695 i.hal_i2c_m_transfer_complate CVWL368.lib(hal_i2c_master.o) + 0x0001876c 0x0001876c 0x00000020 Code RO 696 i.hal_i2c_master_irq_callback CVWL368.lib(hal_i2c_master.o) + 0x0001878c 0x0001878c 0x00000010 Code RO 710 i.hal_i2c_s_dma_user_callback CVWL368.lib(hal_i2c_slave.o) + 0x0001879c 0x0001879c 0x00000038 Code RO 711 i.hal_i2c_s_dma_write CVWL368.lib(hal_i2c_slave.o) + 0x000187d4 0x000187d4 0x0000006c Code RO 713 i.hal_i2c_s_init CVWL368.lib(hal_i2c_slave.o) + 0x00018840 0x00018840 0x00000014 Code RO 714 i.hal_i2c_s_nonblocking_read CVWL368.lib(hal_i2c_slave.o) + 0x00018854 0x00018854 0x0000000c Code RO 721 i.hal_i2c_s_set_transfer CVWL368.lib(hal_i2c_slave.o) + 0x00018860 0x00018860 0x0000014c Code RO 724 i.hal_i2c_slave_irq_callback CVWL368.lib(hal_i2c_slave.o) + 0x000189ac 0x000189ac 0x000000e4 Code RO 1762 i.hal_internal_init_memc CVWL368.lib(hal_internal_vsync.o) + 0x00018a90 0x00018a90 0x00000010 Code RO 1763 i.hal_internal_sync_get_fb_setting CVWL368.lib(hal_internal_vsync.o) + 0x00018aa0 0x00018aa0 0x00000214 Code RO 1764 i.hal_internal_sync_input_resolution_change CVWL368.lib(hal_internal_vsync.o) + 0x00018cb4 0x00018cb4 0x0000001c Code RO 1766 i.hal_internal_vsync_deinit CVWL368.lib(hal_internal_vsync.o) + 0x00018cd0 0x00018cd0 0x0000000c Code RO 1767 i.hal_internal_vsync_get_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018cdc 0x00018cdc 0x00000018 Code RO 1768 i.hal_internal_vsync_get_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00018cf4 0x00018cf4 0x0000000c Code RO 1769 i.hal_internal_vsync_get_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018d00 0x00018d00 0x000000fc Code RO 1770 i.hal_internal_vsync_init_rx CVWL368.lib(hal_internal_vsync.o) + 0x00018dfc 0x00018dfc 0x000000b0 Code RO 1771 i.hal_internal_vsync_init_tx CVWL368.lib(hal_internal_vsync.o) + 0x00018eac 0x00018eac 0x0000011c Code RO 1772 i.hal_internal_vsync_set_auto_hw_filter CVWL368.lib(hal_internal_vsync.o) + 0x00018fc8 0x00018fc8 0x00000014 Code RO 1774 i.hal_internal_vsync_set_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018fdc 0x00018fdc 0x0000001c Code RO 1775 i.hal_internal_vsync_set_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00018ff8 0x00018ff8 0x00000048 Code RO 1776 i.hal_internal_vsync_set_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x00019040 0x00019040 0x00000040 Code RO 1777 i.hal_internal_vsync_set_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00019080 0x00019080 0x00000024 Code RO 595 i.hal_lcdc_config_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000190a4 0x000190a4 0x00000048 Code RO 596 i.hal_lcdc_config_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000190ec 0x000190ec 0x00000014 Code RO 597 i.hal_lcdc_config_rgb_to_pentile CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019100 0x00019100 0x00000164 Code RO 598 i.hal_lcdc_config_upscaler CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019264 0x00019264 0x00000040 Code RO 599 i.hal_lcdc_init_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000192a4 0x000192a4 0x00000180 Code RO 600 i.hal_lcdc_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019424 0x00019424 0x00000040 Code RO 601 i.hal_lcdc_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019464 0x00019464 0x00000068 Code RO 757 i.hal_pwm_out_config_all CVWL368.lib(hal_pwm.o) + 0x000194cc 0x000194cc 0x0000000c Code RO 759 i.hal_pwm_out_init CVWL368.lib(hal_pwm.o) + 0x000194d8 0x000194d8 0x0000000e Code RO 793 i.hal_spi_m_clear_rxfifo CVWL368.lib(hal_spi_master.o) + 0x000194e6 0x000194e6 0x00000012 Code RO 817 i.hal_swire_deinit CVWL368.lib(hal_swire.o) + 0x000194f8 0x000194f8 0x00000016 Code RO 819 i.hal_swire_open CVWL368.lib(hal_swire.o) + 0x0001950e 0x0001950e 0x00000008 Code RO 833 i.hal_system_enable_systick CVWL368.lib(hal_system.o) + 0x00019516 0x00019516 0x00000002 PAD + 0x00019518 0x00019518 0x00000088 Code RO 838 i.hal_system_init CVWL368.lib(hal_system.o) + 0x000195a0 0x000195a0 0x0000001c Code RO 839 i.hal_system_init_console CVWL368.lib(hal_system.o) + 0x000195bc 0x000195bc 0x00000008 Code RO 842 i.hal_system_set_phy_calibration CVWL368.lib(hal_system.o) + 0x000195c4 0x000195c4 0x00000008 Code RO 843 i.hal_system_set_pvd CVWL368.lib(hal_system.o) + 0x000195cc 0x000195cc 0x00000008 Code RO 844 i.hal_system_set_vcc CVWL368.lib(hal_system.o) + 0x000195d4 0x000195d4 0x0000002e Code RO 867 i.hal_timer_deinit CVWL368.lib(hal_timer.o) + 0x00019602 0x00019602 0x0000001a Code RO 869 i.hal_timer_init CVWL368.lib(hal_timer.o) + 0x0001961c 0x0001961c 0x00000048 Code RO 871 i.hal_timer_start CVWL368.lib(hal_timer.o) + 0x00019664 0x00019664 0x00000028 Code RO 873 i.hal_timer_stop CVWL368.lib(hal_timer.o) + 0x0001968c 0x0001968c 0x0000008c Code RO 1038 i.hal_uart_init CVWL368.lib(hal_uart.o) + 0x00019718 0x00019718 0x00000010 Code RO 1041 i.hal_uart_transmit_blocking CVWL368.lib(hal_uart.o) + 0x00019728 0x00019728 0x00000110 Code RO 2302 i.handle_init CVWL368.lib(irq_redirect .o) + 0x00019838 0x00019838 0x000000d4 Code RO 114 i.init_mipi_tx ap_demo.o + 0x0001990c 0x0001990c 0x00000060 Code RO 115 i.init_panel ap_demo.o + 0x0001996c 0x0001996c 0x00000010 Code RO 3 i.main main.o + 0x0001997c 0x0001997c 0x0000010c Code RO 116 i.open_mipi_rx ap_demo.o + 0x00019a88 0x00019a88 0x00000090 Code RO 117 i.pps_update_handle ap_demo.o + 0x00019b18 0x00019b18 0x000003f4 Code RO 1778 i.rx_get_dcs_packet_data CVWL368.lib(hal_internal_vsync.o) + 0x00019f0c 0x00019f0c 0x00000164 Code RO 1779 i.rx_partial_update CVWL368.lib(hal_internal_vsync.o) + 0x0001a070 0x0001a070 0x0000008c Code RO 1780 i.rx_receive_packet CVWL368.lib(hal_internal_vsync.o) + 0x0001a0fc 0x0001a0fc 0x00000180 Code RO 1781 i.rx_receive_pps CVWL368.lib(hal_internal_vsync.o) + 0x0001a27c 0x0001a27c 0x000000a4 Code RO 1782 i.rxbr_irq0_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a320 0x0001a320 0x00000170 Code RO 1783 i.rxbr_irq1_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a490 0x0001a490 0x0000003a Code RO 118 i.send_panel_init_code ap_demo.o + 0x0001a4ca 0x0001a4ca 0x00000002 PAD + 0x0001a4cc 0x0001a4cc 0x0000008c Code RO 1784 i.soft_gen_te CVWL368.lib(hal_internal_vsync.o) + 0x0001a558 0x0001a558 0x00000038 Code RO 119 i.soft_te_timer_cb ap_demo.o + 0x0001a590 0x0001a590 0x00000060 Code RO 120 i.soft_te_timer_init ap_demo.o + 0x0001a5f0 0x0001a5f0 0x0000003c Code RO 121 i.soft_timer3_cb ap_demo.o + 0x0001a62c 0x0001a62c 0x00000048 Code RO 2629 i.sqrt m_ps.l(sqrt.o) + 0x0001a674 0x0001a674 0x000006d8 Code RO 122 i.translate_data ap_demo.o + 0x0001ad4c 0x0001ad4c 0x00000020 Code RO 123 i.tx_display_on ap_demo.o + 0x0001ad6c 0x0001ad6c 0x00000028 Code RO 124 i.tx_panel_reset ap_demo.o + 0x0001ad94 0x0001ad94 0x000000e8 Code RO 1785 i.vidc_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001ae7c 0x0001ae7c 0x000000d0 Code RO 1786 i.vpre_err_reset CVWL368.lib(hal_internal_vsync.o) + 0x0001af4c 0x0001af4c 0x0000019c Code RO 1787 i.vsync_set_te_mode CVWL368.lib(hal_internal_vsync.o) + 0x0001b0e8 0x0001b0e8 0x000024b4 Data RO 125 .constdata ap_demo.o + 0x0001d59c 0x0001d59c 0x000000d2 Data RO 668 .constdata CVWL368.lib(hal_gpio.o) + 0x0001d66e 0x0001d66e 0x00001fde Data RO 907 .constdata CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x0001f64c 0x0001f64c 0x00000001 Data RO 922 .constdata CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x0001f64d 0x0001f64d 0x00000003 PAD + 0x0001f650 0x0001f650 0x00000008 Data RO 1545 .constdata CVWL368.lib(drv_param_init.o) + 0x0001f658 0x0001f658 0x00000186 Data RO 2352 .constdata CVWL368.lib(drv_phy_common.o) + 0x0001f7de 0x0001f7de 0x00000002 PAD + 0x0001f7e0 0x0001f7e0 0x00000048 Data RO 510 .conststring CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001f828 0x0001f828 0x00000134 Data RO 1789 .conststring CVWL368.lib(hal_internal_vsync.o) + 0x0001f95c 0x0001f95c 0x00000030 Data RO 2991 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001f98c, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001f98c, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2303 .ARM.__AT_0x00070100 CVWL368.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001f98c, Size: 0x00003700, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x000003f4]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x00000038 Data RW 126 .data ap_demo.o + 0x00070208 COMPRESSED 0x00000049 Data RW 311 .data app_tp_transfer.o + 0x00070251 COMPRESSED 0x00000003 PAD + 0x00070254 COMPRESSED 0x00000008 Data RW 511 .data CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0007025c COMPRESSED 0x00000001 Data RW 603 .data CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0007025d COMPRESSED 0x00000001 Data RW 697 .data CVWL368.lib(hal_i2c_master.o) + 0x0007025e COMPRESSED 0x00000002 PAD + 0x00070260 COMPRESSED 0x0000001c Data RW 725 .data CVWL368.lib(hal_i2c_slave.o) + 0x0007027c COMPRESSED 0x000000e6 Data RW 923 .data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x00070362 COMPRESSED 0x00000001 Data RW 926 .data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x00070363 COMPRESSED 0x00000001 Data RW 927 .data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x00070364 COMPRESSED 0x00000001 Data RW 932 .data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x00070365 COMPRESSED 0x00000003 Data RW 933 .data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x00070368 COMPRESSED 0x00000005 Data RW 934 .data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x0007036d COMPRESSED 0x00000003 PAD + 0x00070370 COMPRESSED 0x00000030 Data RW 944 .data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x000703a0 COMPRESSED 0x00000012 Data RW 1095 .data CVWL368.lib(norflash.o) + 0x000703b2 COMPRESSED 0x00000002 PAD + 0x000703b4 COMPRESSED 0x0000000c Data RW 1148 .data CVWL368.lib(drv_common.o) + 0x000703c0 COMPRESSED 0x00000004 Data RW 1413 .data CVWL368.lib(drv_gpio.o) + 0x000703c4 COMPRESSED 0x00000008 Data RW 1451 .data CVWL368.lib(drv_i2c_dma.o) + 0x000703cc COMPRESSED 0x00000004 Data RW 1480 .data CVWL368.lib(drv_i2c_master.o) + 0x000703d0 COMPRESSED 0x00000008 Data RW 1516 .data CVWL368.lib(drv_i2c_slave.o) + 0x000703d8 COMPRESSED 0x000004a4 Data RW 1546 .data CVWL368.lib(drv_param_init.o) + 0x0007087c COMPRESSED 0x0000000c Data RW 1576 .data CVWL368.lib(drv_pwm.o) + 0x00070888 COMPRESSED 0x00000004 Data RW 1650 .data CVWL368.lib(drv_spi_master.o) + 0x0007088c COMPRESSED 0x00000008 Data RW 1676 .data CVWL368.lib(drv_swire.o) + 0x00070894 COMPRESSED 0x00000001 Data RW 1701 .data CVWL368.lib(drv_sys_cfg.o) + 0x00070895 COMPRESSED 0x00000003 PAD + 0x00070898 COMPRESSED 0x00000050 Data RW 1734 .data CVWL368.lib(drv_timer.o) + 0x000708e8 COMPRESSED 0x00000004 Data RW 1790 .data CVWL368.lib(hal_internal_vsync.o) + 0x000708ec COMPRESSED 0x00000008 Data RW 2155 .data CVWL368.lib(drv_rxbr.o) + 0x000708f4 COMPRESSED 0x00000004 Data RW 2228 .data CVWL368.lib(drv_vidc.o) + 0x000708f8 COMPRESSED 0x00000001 Data RW 2353 .data CVWL368.lib(drv_phy_common.o) + 0x000708f9 COMPRESSED 0x00000003 PAD + 0x000708fc COMPRESSED 0x0000000c Data RW 2373 .data CVWL368.lib(drv_chip_info.o) + 0x00070908 COMPRESSED 0x00000008 Data RW 2522 .data CVWL368.lib(drv_uart.o) + 0x00070910 COMPRESSED 0x0000000c Data RW 2589 .data CVWL368.lib(drv_wdg.o) + 0x0007091c COMPRESSED 0x00000004 Data RW 2960 .data mc_p.l(stdout.o) + 0x00070920 COMPRESSED 0x00000004 Data RW 2972 .data mc_p.l(errno.o) + 0x00070924 - 0x00000190 Zero RW 310 .bss app_tp_transfer.o + 0x00070ab4 - 0x000000c0 Zero RW 509 .bss CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00070b74 - 0x00000048 Zero RW 602 .bss CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00070bbc - 0x00000100 Zero RW 896 .bss CVWL368.lib(tau_log.o) + 0x00070cbc - 0x000000d0 Zero RW 1043 .bss CVWL368.lib(hal_uart.o) + 0x00070d8c - 0x0000001c Zero RW 1275 .bss CVWL368.lib(drv_dma.o) + 0x00070da8 - 0x00000040 Zero RW 1412 .bss CVWL368.lib(drv_gpio.o) + 0x00070de8 - 0x00000140 Zero RW 1450 .bss CVWL368.lib(drv_i2c_dma.o) + 0x00070f28 - 0x00000958 Zero RW 1788 .bss CVWL368.lib(hal_internal_vsync.o) + 0x00071880 - 0x00001030 Zero RW 1832 .bss CVWL368.lib(dcs_packet_fifo.o) + 0x000728b0 - 0x00000020 Zero RW 2417 .bss CVWL368.lib(hal_spi_slave.o) + 0x000728d0 - 0x00001000 Zero RW 459 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 6736 874 9396 56 0 41211 ap_demo.o + 1406 184 0 73 400 15766 app_tp_transfer.o + 36 6 0 0 0 533 board.o + 16 0 0 0 0 5691 main.o + 120 18 192 0 4096 2096 startup_armcm0.o + + ---------------------------------------------------------------------- + 8320 1082 9636 132 4496 65297 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 6 0 0 3 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 296 96 0 12 0 256 drv_chip_info.o + 192 82 20 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 410 28 0 0 28 796 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1652 500 0 0 0 1332 drv_dsi_rx.o + 1476 118 0 0 0 2428 drv_dsi_tx.o + 118 0 0 0 0 256 drv_efuse.o + 10 0 0 0 0 60 drv_fls.o + 784 112 0 4 64 1236 drv_gpio.o + 588 88 0 8 320 624 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 324 74 0 8 0 516 drv_i2c_slave.o + 668 6 0 0 0 1444 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 112 36 8 1188 0 376 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 140 32 0 12 0 316 drv_pwm.o + 112 24 0 0 0 180 drv_pwr.o + 682 66 0 8 0 1448 drv_rxbr.o + 104 24 0 4 0 188 drv_spi_master.o + 160 20 0 8 0 260 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 354 34 0 80 0 932 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 156 22 0 12 0 316 drv_wdg.o + 3020 308 72 8 192 1660 hal_dsi_rx_ctrl.o + 4312 278 0 1 72 2384 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 544 76 0 28 0 400 hal_i2c_slave.o + 6676 1502 308 4 2392 2264 hal_internal_vsync.o + 116 4 0 0 0 148 hal_pwm.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 40 0 0 0 0 136 hal_swire.o + 196 32 0 0 0 408 hal_system.o + 184 6 0 0 0 276 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 1592 62 8159 289 0 17708 app_tp_for_custom_s8.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 36756 4722 9172 1744 7900 52444 Library Totals + 48 0 5 13 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 29736 4454 1008 1434 7900 31460 CVWL368.lib + 1592 62 8159 289 0 17708 CVWL368_NOTE10_TP.lib + 272 26 0 0 0 152 m_ps.l + 2838 126 0 8 0 1264 mc_p.l + 2270 54 0 0 0 1860 mf_p.l + + ---------------------------------------------------------------------- + 36756 4722 9172 1744 7900 52444 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 45076 5804 18808 1876 12396 93257 Grand Totals + 45076 5804 18808 1012 12396 93257 ELF Image Totals (compressed) + 45076 5804 18808 1012 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 63884 ( 62.39kB) + Total RW Size (RW Data + ZI Data) 14272 ( 13.94kB) + Total ROM Size (Code + RO Data + RW Data) 64896 ( 63.38kB) + +============================================================================== + diff --git a/project/ISP_368/Listings/ISP_368_0109.map b/project/ISP_368/Listings/ISP_368_0109.map new file mode 100644 index 0000000..5156f12 --- /dev/null +++ b/project/ISP_368/Listings/ISP_368_0109.map @@ -0,0 +1,5230 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.PWM_Task) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.PWM_Task) refers to ap_demo.o(.data) for read_bl_data + ap_demo.o(i.PWM_init) refers to hal_pwm.o(i.hal_pwm_out_init) for hal_pwm_out_init + ap_demo.o(i.PWM_init) refers to hal_pwm.o(i.hal_pwm_out_config_all) for hal_pwm_out_config_all + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for phone_DisplayOFF_flag + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.PWM_init) for PWM_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_te_timer_init) for soft_te_timer_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tx_display_on) for tx_display_on + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_phone_clear_reset_on) for app_tp_phone_clear_reset_on + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.PWM_Task) for PWM_Task + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + ap_demo.o(i.ap_demo) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_in + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for phone_DisplayOFF_count + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_ca) refers to ap_demo.o(i.translate_data) for translate_data + ap_demo.o(i.ap_get_reg_ca) refers to ap_demo.o(.data) for value_reg_ca + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for value_reg_df + ap_demo.o(i.ap_reset_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(i.translate_data) for translate_data + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(.data) for value_reg_b1 + ap_demo.o(i.ap_set_display_off) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for g_rx_ctrl_handle + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for g_exit_sleep_mode + ap_demo.o(i.ap_set_tp_calibration_04) refers to ap_demo.o(.data) for g_calibration_flag + ap_demo.o(i.app_tp_calibration_exec) refers to app_tp_transfer.o(i.ap_tp_calibration) for ap_tp_calibration + ap_demo.o(i.app_tp_calibration_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.app_tp_calibration_exec) refers to ap_demo.o(.data) for g_calibration_flag + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for g_tx_ctrl_handle + ap_demo.o(i.init_panel) refers to ap_demo.o(i.tx_panel_reset) for tx_panel_reset + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(i.send_panel_init_code) for send_panel_init_code + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(.constdata) for panel_init_code + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) for hal_dsi_rx_ctrl_pre_init_pps + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) for hal_dsi_rx_ctrl_set_cus_esc_clk + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for g_rx_ctrl_handle + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for g_cus_rx_dcs_execute_table + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.pps_update_handle) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for g_rx_ctrl_handle + ap_demo.o(i.send_panel_init_code) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.send_panel_init_code) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.soft_te_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + ap_demo.o(i.soft_te_timer_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_te_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) for hal_dsi_rx_ctrl_set_hw_tear_mode + ap_demo.o(i.soft_te_timer_cb) refers to ap_demo.o(.data) for panel_display_done + ap_demo.o(i.soft_te_timer_init) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.soft_te_timer_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.soft_te_timer_init) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.soft_te_timer_init) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_te_timer_init) refers to ap_demo.o(.data) for g_rx_ctrl_handle + ap_demo.o(i.soft_te_timer_init) refers to ap_demo.o(i.soft_te_timer_cb) for soft_te_timer_cb + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for phone_DisplayOFF_count + ap_demo.o(i.translate_data) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.translate_data) refers to ap_demo.o(.data) for value_reg_b1 + ap_demo.o(i.tx_display_on) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.tx_display_on) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.tx_display_on) refers to ap_demo.o(.data) for g_tx_ctrl_handle + ap_demo.o(i.tx_panel_reset) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.tx_panel_reset) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_ca) for ap_get_reg_ca + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight) for ap_set_backlight + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_tp_calibration_04) for ap_set_tp_calibration_04 + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_init) for app_tp_screen_int_init + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for s_screen_read_buffer + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for MI10_PRO_screen_init_data1 + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.ap_tp_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.ap_tp_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(.data) for MI10_PRO_TP_Tuning_data2 + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for s_phone_read_buffer + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_transfer_phone) for app_tp_transfer_phone + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for s_phone_reset_flag + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for s_phone_reset_flag + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for s_screen_int_flag + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.app_tp_screen_int_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_screen_int_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(.bss) for s_phone_read_buffer + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.app_tp_m_transfer_complate) for app_tp_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for s_screen_const_transfer_count + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_screen_int_lvl_low) for app_tp_screen_int_lvl_low + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_transfer_complate) for app_tp_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for s_screen_init_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for s_screen_read_buffer + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for s_screen_init_complate + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fsub + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_set_callback) for drv_i2c_m_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_deinit) for drv_i2c_s_deinit + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num) for drv_i2c_s_get_tx_byte_num + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_callback) for drv_i2c_s_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable_intr) for drv_i2c_s_enable_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(.data) for tx_byte_num + hal_pwm.o(i.hal_pwm_in_clear_int) refers to drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all) for drv_pwm_in_clear_pwm_int_all + hal_pwm.o(i.hal_pwm_in_config_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_in_ctrl_int) refers to drv_pwm.o(i.drv_pwm_in_set_sys_int) for drv_pwm_in_set_sys_int + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_get_current_count) refers to drv_pwm.o(i.drv_pwm_in_get_current_count) for drv_pwm_in_get_current_count + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_pwm.o(i.drv_pwm_in_get_high_period) for drv_pwm_in_get_high_period + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_pwm.o(i.drv_pwm_in_get_low_period) for drv_pwm_in_get_low_period + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_pwm.o(i.drv_pwm_in_get_counter_period) for drv_pwm_in_get_counter_period + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_in_init) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_register_callback) refers to drv_pwm.o(i.drv_pwm_in_register_callback) for drv_pwm_in_register_callback + hal_pwm.o(i.hal_pwm_in_set_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_out_config_all) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_config_all) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_config_all) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_config_all) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_config_all) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_config_all) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sel_io) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_sync_all) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_pwm.o(i.drv_pwm_out_get_sync_flag) for drv_pwm_out_get_sync_flag + hal_pwm.o(i.hal_pwm_out_sync_all) refers to tau_delay.o(i.delayUs) for delayUs + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_common.o(.data) for g_system_clock + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_system.o(i.hal_system_flash_read) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_dual_read) for norflash_dual_read + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_erase_block) for norflash_erase_block + hal_system.o(i.hal_system_flash_write) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_write) for norflash_write + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_disable_intr) for drv_i2c_s_disable_intr + drv_i2c_slave.o(i.drv_i2c_s_enable_intr) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_set_sys_mask) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_iniernal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_iniernal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (16 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode), (128 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter), (108 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex), (14 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (112 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (144 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (140 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (24 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (24 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (20 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (8 bytes). + Removing hal_pwm.o(.rev16_text), (4 bytes). + Removing hal_pwm.o(.revsh_text), (4 bytes). + Removing hal_pwm.o(i.hal_pwm_in_clear_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_config_int), (60 bytes). + Removing hal_pwm.o(i.hal_pwm_in_ctrl_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_deinit), (18 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_current_count), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_high_period), (40 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_low_period), (40 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_total_period), (40 bytes). + Removing hal_pwm.o(i.hal_pwm_in_init), (26 bytes). + Removing hal_pwm.o(i.hal_pwm_in_register_callback), (10 bytes). + Removing hal_pwm.o(i.hal_pwm_in_set_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_deinit), (18 bytes). + Removing hal_pwm.o(i.hal_pwm_out_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sel_io), (38 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_all), (124 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_ctl), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_pause), (28 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_period), (52 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_thr), (72 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (112 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_flash_read), (56 bytes). + Removing hal_system.o(i.hal_system_flash_write), (58 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (156 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (37 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (288 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (620 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (11 bytes). + Removing app_tp_for_custom_s8.o(.data), (10 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (412 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (24 bytes). + Removing drv_dma.o(i.drv_dma_enable_cycle), (44 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_clear_irq_status), (6 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (130 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_bus_init), (36 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_deinit), (44 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_disable_intr), (16 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_enable), (16 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num), (12 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (32 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (24 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_sys_mask), (48 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_scld_filter), (100 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (52 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (108 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (60 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (220 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (88 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (72 bytes). + Removing drv_spi_dma.o(.bss), (480 bytes). + Removing drv_spi_dma.o(.data), (16 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_iniernal_vsync_deinit), (20 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (26 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_set_prefetch), (24 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (56 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (20 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing dflti.o(.text), (40 bytes). + +571 unused section(s) (total 24762 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../fplib/microlib/fpsqrt.c 0x00000000 Number 0 dsqrt.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt_x.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_pwm.c 0x00000000 Number 0 hal_pwm.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\internal\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\..\src\app\demo\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\..\src\app\demo\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_pwm.c 0x00000000 Number 0 hal_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\internal\\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\\..\\src\\app\\demo\\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\\src\\app\\demo\\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\src\app\demo\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + cdcmple.s 0x00000000 Number 0 cdcmple.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 fadd.o(.text) + .text 0x0001029a Section 0 fmul.o(.text) + .text 0x00010314 Section 0 fdiv.o(.text) + .text 0x00010390 Section 0 fscalb.o(.text) + .text 0x000103a8 Section 0 dadd.o(.text) + .text 0x0001050c Section 0 dmul.o(.text) + .text 0x000105dc Section 0 ddiv.o(.text) + .text 0x000106cc Section 0 fflti.o(.text) + .text 0x000106e2 Section 0 ffltui.o(.text) + .text 0x000106f0 Section 0 dfltui.o(.text) + .text 0x0001070c Section 0 ffixi.o(.text) + .text 0x0001073e Section 0 ffixui.o(.text) + .text 0x00010768 Section 0 dfixi.o(.text) + .text 0x000107b0 Section 0 dfixui.o(.text) + .text 0x000107ec Section 0 f2d.o(.text) + .text 0x00010814 Section 40 cdcmple.o(.text) + .text 0x0001083c Section 20 cfrcmple.o(.text) + .text 0x00010850 Section 0 uldiv.o(.text) + .text 0x000108b0 Section 0 llshl.o(.text) + .text 0x000108d0 Section 0 llushr.o(.text) + .text 0x000108f2 Section 0 llsshr.o(.text) + .text 0x00010918 Section 0 fepilogue.o(.text) + .text 0x00010918 Section 0 iusefp.o(.text) + .text 0x0001099a Section 0 depilogue.o(.text) + .text 0x00010a58 Section 0 dsqrt.o(.text) + .text 0x00010afc Section 0 dfixul.o(.text) + .text 0x00010b3c Section 40 cdrcmple.o(.text) + .text 0x00010b64 Section 36 init.o(.text) + .text 0x00010b88 Section 0 __dczerorl2.o(.text) + i.ADC_IRQn_Handler 0x00010be0 Section 0 irq_redirect .o(i.ADC_IRQn_Handler) + i.AP_NRESET_IRQn_Handler 0x00010bf8 Section 0 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + i.DMA_IRQn_Handler 0x00010c10 Section 0 irq_redirect .o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010c24 Section 0 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010c40 Section 0 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010c5c Section 0 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010c78 Section 0 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010c94 Section 0 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010cb0 Section 0 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010ccc Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010ce8 Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.FLSCTRL_IRQn_Handler 0x00010d04 Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.Gpio_swire_output 0x00010d18 Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00010d68 Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010d7c Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010d94 Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010dac Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010dc4 Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010dec Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010e04 Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010e1c Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010e34 Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.PWM_Task 0x00010e50 Section 0 ap_demo.o(i.PWM_Task) + i.PWM_init 0x00010e94 Section 0 ap_demo.o(i.PWM_init) + PWM_init 0x00010e95 Thumb Code 26 ap_demo.o(i.PWM_init) + i.S20_Start_init 0x00010eb0 Section 0 app_tp_transfer.o(i.S20_Start_init) + i.SPIM_IRQn_Handler 0x00010fe0 Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.UART_DisableDma 0x00010ffc Section 0 drv_uart.o(i.UART_DisableDma) + i.__scatterload_null 0x00010ffe Section 2 handlers.o(i.__scatterload_null) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.SPIS_IRQn_Handler 0x00011014 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.SWIRE_IRQn_Handler 0x00011030 Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x0001104c Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00011064 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x0001107c Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00011094 Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x000110ac Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART0_IRQ_Handle 0x000110c4 Section 0 drv_uart.o(i.UART0_IRQ_Handle) + i.UART_GetInstance 0x000110e0 Section 0 drv_uart.o(i.UART_GetInstance) + i.UART_IRQn_Handler 0x000110e4 Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_ResetRxFIFO 0x000110fc Section 0 drv_uart.o(i.UART_ResetRxFIFO) + i.UART_SetBaudRate 0x00011120 Section 0 drv_uart.o(i.UART_SetBaudRate) + i.UART_SwitchSCLK 0x00011168 Section 0 drv_uart.o(i.UART_SwitchSCLK) + i.UART_TransferHandleIRQ 0x00011182 Section 0 drv_uart.o(i.UART_TransferHandleIRQ) + i.UART_WriteBlocking 0x000112b6 Section 0 drv_uart.o(i.UART_WriteBlocking) + i.UART_init 0x000112d0 Section 0 drv_uart.o(i.UART_init) + i.VIDC_IRQn_Handler 0x0001138c Section 0 irq_redirect .o(i.VIDC_IRQn_Handler) + i.VPRE_IRQn_Handler 0x000113a4 Section 0 irq_redirect .o(i.VPRE_IRQn_Handler) + i.WDG_IRQn_Handler 0x000113bc Section 0 irq_redirect .o(i.WDG_IRQn_Handler) + i.__0printf 0x000113d4 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x000113f4 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x00011418 Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x00011446 Section 0 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + i.__NVIC_ClearPendingIRQ 0x00011460 Section 0 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011461 Thumb Code 18 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x00011478 Section 0 drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011479 Thumb Code 18 drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x00011490 Section 0 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011491 Thumb Code 18 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_DisableIRQ 0x000114a8 Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x000114a9 Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x000114c8 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x000114c9 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__NVIC_SetPriority 0x000114e0 Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x000114e1 Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_copy 0x00011524 Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_zeroinit 0x00011532 Section 14 handlers.o(i.__scatterload_zeroinit) + i.__set_errno 0x00011540 Section 0 errno.o(i.__set_errno) + i._fp_digits 0x0001154c Section 0 printfa.o(i._fp_digits) + _fp_digits 0x0001154d Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x000116c0 Section 0 printfa.o(i._printf_core) + _printf_core 0x000116c1 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011dac Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011dad Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011dcc Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011dcd Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011df8 Section 0 printfa.o(i._sputc) + _sputc 0x00011df9 Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011e04 Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011e05 Thumb Code 2168 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x0001267c Section 0 ap_demo.o(i.ap_demo) + i.ap_get_reg_ca 0x00012894 Section 0 ap_demo.o(i.ap_get_reg_ca) + ap_get_reg_ca 0x00012895 Thumb Code 68 ap_demo.o(i.ap_get_reg_ca) + i.ap_get_reg_df 0x000128e4 Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x000128e5 Thumb Code 236 ap_demo.o(i.ap_get_reg_df) + i.ap_reset_cb 0x000129e4 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x000129e5 Thumb Code 74 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight 0x00012a68 Section 0 ap_demo.o(i.ap_set_backlight) + ap_set_backlight 0x00012a69 Thumb Code 68 ap_demo.o(i.ap_set_backlight) + i.ap_set_display_off 0x00012ab8 Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x00012ab9 Thumb Code 36 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x00012b00 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x00012b01 Thumb Code 24 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x00012b38 Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x00012b39 Thumb Code 96 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x00012bd0 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x00012bd1 Thumb Code 28 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x00012c18 Section 0 ap_demo.o(i.ap_set_tp_calibration_04) + ap_set_tp_calibration_04 0x00012c19 Thumb Code 34 ap_demo.o(i.ap_set_tp_calibration_04) + i.ap_tp_calibration 0x00012c40 Section 0 app_tp_transfer.o(i.ap_tp_calibration) + i.app_ADC_IRQn_Handler 0x00012d08 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x00012d24 Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x00012d48 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x00012d64 Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x00012d80 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x00012d9c Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x00012db8 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x00012dd4 Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x00012df0 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x00012e0c Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x00012e28 Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x00012e70 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x00012e80 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00012e90 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00012f70 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00012ff8 Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00013290 Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00013330 Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00013378 Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x000133a8 Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x000135a8 Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x000135c8 Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x000135e0 Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x000135ea Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x000135f4 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x000135fe Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x00013608 Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x00013610 Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x0001362c Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x00013648 Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x00013680 Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x00013690 Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x000136c0 Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x000136e4 Section 0 ap_demo.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x0001374c Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x0001374d Thumb Code 14 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x0001375c Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x000137b0 Section 0 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_read 0x000137b1 Thumb Code 48 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_transfer_complate 0x000137e0 Section 0 app_tp_transfer.o(i.app_tp_m_transfer_complate) + i.app_tp_m_write 0x000137e8 Section 0 app_tp_transfer.o(i.app_tp_m_write) + app_tp_m_write 0x000137e9 Thumb Code 16 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x000137f8 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_phone_clear_reset_on 0x00013b60 Section 0 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + i.app_tp_s_read 0x00013b6c Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x00013b7c Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x00013b8c Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x00013e5c Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x00013e90 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00013e91 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_screen_int_init 0x00013e9c Section 0 app_tp_transfer.o(i.app_tp_screen_int_init) + app_tp_screen_int_init 0x00013e9d Thumb Code 56 app_tp_transfer.o(i.app_tp_screen_int_init) + i.app_tp_screen_int_lvl_low 0x00013edc Section 0 app_tp_transfer.o(i.app_tp_screen_int_lvl_low) + app_tp_screen_int_lvl_low 0x00013edd Thumb Code 4 app_tp_transfer.o(i.app_tp_screen_int_lvl_low) + i.app_tp_transfer_phone 0x00013ee0 Section 0 app_tp_transfer.o(i.app_tp_transfer_phone) + app_tp_transfer_phone 0x00013ee1 Thumb Code 48 app_tp_transfer.o(i.app_tp_transfer_phone) + i.app_tp_transfer_screen_const 0x00013f14 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00013f15 Thumb Code 54 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00013f5c Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x000140c4 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.board_Init 0x000140e8 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x0001410c Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + calc_framebuffer_setting 0x0001410d Thumb Code 962 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x00014518 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x000145e0 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x000145e1 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x0001460c Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x0001460d Thumb Code 92 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x0001469c Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x000146f4 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x0001470c Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00014750 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x00014774 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x00014775 Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x00014790 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x000147a8 Section 0 tau_delay.o(i.delayUs) + i.drv_ap_rst_trig_edge_detect 0x000147cc Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x00014804 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x00014810 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x00014850 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x00014918 Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x0001492c Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x00014984 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x0001498c Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x0001499c Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x000149b0 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x000149c4 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x000149e4 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x000149f8 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x00014a10 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x00014a24 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x00014a38 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x00014a4c Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x00014a60 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x00014a74 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x00014a88 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x00014a9c Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x00014ab0 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x00014ac4 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x00014adc Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x00014af4 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x00014b08 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x00014b1c Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x00014b30 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x00014b48 Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x00014b64 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x00014b74 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00014b84 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x00014ba8 Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00014bb4 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x00014c44 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x00014c56 Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x00014c70 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x00014c78 Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00014cbc Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x00014cf2 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00014d00 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00014d74 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00014d7e Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00014da8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00014eac Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00014eec Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00014eed Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00014f3c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00014f3d Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00014f58 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00014f60 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00014f66 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00014f74 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00014f94 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00014fa4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00014fa8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00014fb8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00014ffe Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00015024 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00015130 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x0001513e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00015152 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x000151be Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x000151c2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x000151da Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x000151e2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x000151ea Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x000151f4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00015218 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x0001521c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00015220 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00015224 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x0001523c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x00015256 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00015262 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x000152c6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x00015304 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00015410 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x0001542e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00015436 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x00015452 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x0001546a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x00015478 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x000154ac Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x000154bc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x000154c4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x000154e6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x000154ee Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00015514 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x000155be Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x000155d4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x000155ec Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x0001560c Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x00015618 Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x0001564a Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x00015664 Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x0001567c Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x00015688 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x0001569c Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x000156e0 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x00015700 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x00015710 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x00015720 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x00015730 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00015740 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00015741 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x00015760 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c_dma_callback 0x00015890 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x00015891 Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x000158c4 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x00015970 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x0001598a Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x000159a4 Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x00015a04 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x00015a14 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_m_set_callback 0x00015a4c Section 0 drv_i2c_master.o(i.drv_i2c_m_set_callback) + i.drv_i2c_master_init 0x00015a58 Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x00015ae4 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x00015b40 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x00015b7c Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x00015b7d Thumb Code 46 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x00015bac Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_enable_intr 0x00015c08 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) + i.drv_i2c_s_get_fifo_status 0x00015c3c Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_callback 0x00015c58 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_callback) + i.drv_i2c_s_write_data 0x00015c64 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x00015c84 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x00015cdc Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x00015d20 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x00015d3c Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x00015d54 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x00015d84 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x00015d9a Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00015dbe Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x00015de4 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x00015dfa Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x00015e10 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x00015e1c Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00015e3a Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00015e5c Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00015e7e Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x00015e8a Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00015ea4 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x00015ec6 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00015ee0 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x00015eec Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00015f38 Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00015f3e Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00015f50 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00015f70 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_video_hw_mode 0x00015fa4 Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00015fb8 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x00015fd8 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00015fe4 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00016024 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00016030 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x00016042 Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00016052 Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00016060 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x00016074 Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00016080 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x00016090 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x000160a2 Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x000160b2 Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x000160c8 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x000160e0 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x000160fa Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00016108 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00016130 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x00016140 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x00016148 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x0001615c Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x00016170 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x00016178 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_p2r_filter_init 0x0001618c Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x000161b0 Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x000161c0 Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x000161fc Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x0001625c Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x000162b0 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x000162c0 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x000162d8 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x000162f8 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x0001631e Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x0001633c Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x0001633d Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwm_out_enable 0x0001635c Section 0 drv_pwm.o(i.drv_pwm_out_enable) + i.drv_pwm_out_set_control 0x0001637c Section 0 drv_pwm.o(i.drv_pwm_out_set_control) + i.drv_pwm_out_set_period 0x00016388 Section 0 drv_pwm.o(i.drv_pwm_out_set_period) + i.drv_pwm_out_set_threshold 0x00016394 Section 0 drv_pwm.o(i.drv_pwm_out_set_threshold) + i.drv_pwr_set_cp_mode 0x000163a0 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x000163c0 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x000163d8 Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x00016410 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x00016411 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x0001641c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x0001641d Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x0001642c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x0001642d Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x00016440 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x00016441 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x00016456 Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00016460 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00016464 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x000164c0 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x000164d4 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x00016510 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x00016514 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00016515 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x00016526 Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x0001652a Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x0001652b Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x0001653c Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00016548 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x00016550 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x0001655c Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x00016568 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x0001657c Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x00016648 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x0001665c Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x00016670 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x00016680 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x000166a6 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x000166ae Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x000166b8 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_enable 0x000166d8 Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_set_int 0x000166f4 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x0001673c Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x00016758 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00016764 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x0001678c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x000167a4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x000167c0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x000167e4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x00016808 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x00016818 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x00016828 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x0001684c Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x0001684d Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x00016866 Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x00016888 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x00016898 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x000168a8 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x000168a9 Thumb Code 54 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x000168e4 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x000168f8 Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x00016908 Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x00016950 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x00016978 Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_clear 0x00016988 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x00016989 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x00016992 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x000169ae Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x000169ca Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x000169cb Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x000169dc Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x000169dd Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x000169f0 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x000169f1 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00016a00 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00016a08 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00016a20 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x00016a60 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x00016a74 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x00016a9c Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x00016aa8 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x00016aae Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x00016aea Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00016afe Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x00016b0e Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x00016b16 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x00016b3c Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x00016b64 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x00016b7c Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x00016b86 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x00016b96 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00016ba0 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x00016baa Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00016bbc Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00016bc6 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00016bd0 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x00016be8 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00016bf8 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00016bf9 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00016c08 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00016c09 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00016c18 Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x00016c4c Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x00016c56 Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x00016c6c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x00016c9c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00016d38 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016dbc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00016de4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00016e0c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00016e6c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00016e6d Thumb Code 232 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00016f9c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00016f9d Thumb Code 180 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00017070 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00017071 Thumb Code 308 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x000171ac Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x000171ad Thumb Code 288 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x000172dc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x000172dd Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_pre_init_pps 0x00017508 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00017524 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_esc_clk 0x00017614 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x00017640 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_hw_tear_mode 0x00017674 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x000176a8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x000176a9 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x000176e0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x000176e1 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017754 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_start 0x00017788 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x000177c4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x00017800 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_calc_video_chunks 0x00017820 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x00017821 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x000179b0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x000179b1 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x000179e4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x000179e5 Thumb Code 1160 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x00017eb4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00017ee0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00017f28 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017f74 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x00017f9c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00018060 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00018061 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x00018084 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_ccm 0x00018090 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x000180b0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x000180c4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x000180d4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x000180f8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00018164 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x000181a8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00018280 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x00018330 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x00018331 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x00018374 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x00018375 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x000183a4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x000183a5 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x000183c4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x000183c5 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x000183e4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x000183e5 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x00018478 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x00018479 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x000184d0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x000184d1 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x00018514 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x0001852c Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x00018540 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x00018580 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x000185a0 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x000185c8 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x000185e0 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x00018630 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x00018690 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x00018698 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x000186b8 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x00018724 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x00018744 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x00018760 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x0001876c Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x0001876d Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x0001878c Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x0001878d Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x0001879c Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x000187d4 Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x00018840 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x00018854 Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x00018860 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x00018861 Thumb Code 304 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x000189ac Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x00018a90 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_input_resolution_change 0x00018aa0 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_vsync_deinit 0x00018cb4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00018cd0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00018cdc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tx_state 0x00018cf4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00018d00 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00018dfc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x00018eac Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x00018fc8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x00018fdc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x00018ff8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00019040 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x00019080 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x00019081 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x000190a4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x000190a5 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x000190ec Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x000190ed Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x00019100 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x00019101 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x00019264 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00019265 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x000192a4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x000192a5 Thumb Code 376 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x00019424 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x00019425 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_pwm_out_config_all 0x00019464 Section 0 hal_pwm.o(i.hal_pwm_out_config_all) + i.hal_pwm_out_init 0x000194cc Section 0 hal_pwm.o(i.hal_pwm_out_init) + i.hal_spi_m_clear_rxfifo 0x000194d8 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_deinit 0x000194e6 Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_open 0x000194f8 Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x0001950e Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x00019518 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x000195a0 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x000195bc Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x000195c4 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x000195cc Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_deinit 0x000195d4 Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x00019602 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x0001961c Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x00019664 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x0001968c Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x00019718 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.handle_init 0x00019728 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x00019838 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x00019839 Thumb Code 200 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x0001990c Section 0 ap_demo.o(i.init_panel) + init_panel 0x0001990d Thumb Code 88 ap_demo.o(i.init_panel) + i.main 0x0001996c Section 0 main.o(i.main) + i.open_mipi_rx 0x0001997c Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x0001997d Thumb Code 236 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x00019a88 Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x00019a89 Thumb Code 98 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x00019b18 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x00019b19 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x00019f0c Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x00019f0d Thumb Code 340 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001a070 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001a071 Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001a0fc Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001a0fd Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x0001a27c Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001a27d Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001a320 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001a321 Thumb Code 222 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.send_panel_init_code 0x0001a490 Section 0 ap_demo.o(i.send_panel_init_code) + send_panel_init_code 0x0001a491 Thumb Code 58 ap_demo.o(i.send_panel_init_code) + i.soft_gen_te 0x0001a4cc Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001a4cd Thumb Code 116 hal_internal_vsync.o(i.soft_gen_te) + i.soft_te_timer_cb 0x0001a558 Section 0 ap_demo.o(i.soft_te_timer_cb) + soft_te_timer_cb 0x0001a559 Thumb Code 44 ap_demo.o(i.soft_te_timer_cb) + i.soft_te_timer_init 0x0001a590 Section 0 ap_demo.o(i.soft_te_timer_init) + soft_te_timer_init 0x0001a591 Thumb Code 44 ap_demo.o(i.soft_te_timer_init) + i.soft_timer3_cb 0x0001a5f0 Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001a5f1 Thumb Code 46 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001a62c Section 0 sqrt.o(i.sqrt) + i.translate_data 0x0001a674 Section 0 ap_demo.o(i.translate_data) + i.tx_display_on 0x0001ad4c Section 0 ap_demo.o(i.tx_display_on) + tx_display_on 0x0001ad4d Thumb Code 22 ap_demo.o(i.tx_display_on) + i.tx_panel_reset 0x0001ad6c Section 0 ap_demo.o(i.tx_panel_reset) + tx_panel_reset 0x0001ad6d Thumb Code 40 ap_demo.o(i.tx_panel_reset) + i.vidc_callback 0x0001ad94 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001ad95 Thumb Code 194 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001ae7c Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001ae7d Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001af4c Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001af4d Thumb Code 254 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001b0e8 Section 9396 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001b0e8 Data 108 ap_demo.o(.constdata) + .constdata 0x0001d59c Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001d59c Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001d614 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001d66e Section 8158 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001f64c Section 1 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001f650 Section 8 drv_param_init.o(.constdata) + .constdata 0x0001f658 Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001f658 Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001f710 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001f790 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001f7c0 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001f7e0 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001f828 Section 308 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 56 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701d0 Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701d4 Data 4 ap_demo.o(.data) + g_calibration_flag 0x000701d8 Data 1 ap_demo.o(.data) + start_display_on 0x000701d9 Data 1 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701da Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701db Data 1 ap_demo.o(.data) + panel_display_done 0x000701dc Data 1 ap_demo.o(.data) + g_resolution_change 0x000701dd Data 1 ap_demo.o(.data) + read_bl_data 0x000701e4 Data 2 ap_demo.o(.data) + read_bl_data_bak 0x000701e6 Data 2 ap_demo.o(.data) + value_reg_df 0x000701ec Data 4 ap_demo.o(.data) + value_blue 0x000701f0 Data 1 ap_demo.o(.data) + blue_flag 0x000701f1 Data 1 ap_demo.o(.data) + flag_b1 0x000701f2 Data 1 ap_demo.o(.data) + flag_ca 0x000701f3 Data 1 ap_demo.o(.data) + s20_power_on_flag 0x000701f4 Data 4 ap_demo.o(.data) + b3_read_flag 0x00070204 Data 1 ap_demo.o(.data) + c8_read_flag 0x00070205 Data 1 ap_demo.o(.data) + c9_read_flag 0x00070206 Data 1 ap_demo.o(.data) + read_flag_5a 0x00070207 Data 1 ap_demo.o(.data) + .data 0x00070208 Section 73 app_tp_transfer.o(.data) + s_spim_write 0x0007020d Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x0007020e Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x0007020f Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x00070210 Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x00070212 Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x0007024f Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x00070250 Data 1 app_tp_transfer.o(.data) + .data 0x00070254 Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00070254 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00070258 Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x0007025c Section 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x0007025c Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x0007025d Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x0007025d Data 1 hal_i2c_master.o(.data) + .data 0x00070260 Section 28 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00070260 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00070261 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x00070262 Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x00070264 Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x00070268 Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x0007026c Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x00070270 Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x00070274 Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00070278 Data 4 hal_i2c_slave.o(.data) + .data 0x0007027c Section 230 app_tp_for_custom_s8.o(.data) + app_tp_count 0x00070286 Data 1 app_tp_for_custom_s8.o(.data) + phone_85_flag 0x00070287 Data 1 app_tp_for_custom_s8.o(.data) + phone_F6_flag 0x00070288 Data 1 app_tp_for_custom_s8.o(.data) + phone_E4_flag 0x00070289 Data 1 app_tp_for_custom_s8.o(.data) + phone_72_flag 0x0007028a Data 1 app_tp_for_custom_s8.o(.data) + phone_75_flag 0x0007028b Data 1 app_tp_for_custom_s8.o(.data) + phone_92_flag 0x0007028c Data 1 app_tp_for_custom_s8.o(.data) + phone_74_flag 0x0007028d Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x00070292 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x00070294 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x00070296 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x00070298 Data 2 app_tp_for_custom_s8.o(.data) + .data 0x00070362 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00070363 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00070364 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00070365 Section 3 app_tp_for_custom_s8.o(.data) + .data 0x00070368 Section 5 app_tp_for_custom_s8.o(.data) + .data 0x00070370 Section 48 app_tp_for_custom_s8.o(.data) + .data 0x000703a0 Section 18 norflash.o(.data) + tmprg 0x000703a8 Data 4 norflash.o(.data) + .data 0x000703b4 Section 12 drv_common.o(.data) + s_my_tick 0x000703b4 Data 4 drv_common.o(.data) + .data 0x000703c0 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x000703c0 Data 4 drv_gpio.o(.data) + .data 0x000703c4 Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x000703c4 Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x000703c8 Data 4 drv_i2c_dma.o(.data) + .data 0x000703cc Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x000703cc Data 4 drv_i2c_master.o(.data) + .data 0x000703d0 Section 8 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x000703d0 Data 4 drv_i2c_slave.o(.data) + .data 0x000703d8 Section 1188 drv_param_init.o(.data) + .data 0x0007087c Section 12 drv_pwm.o(.data) + s_pwm_type 0x0007087c Data 1 drv_pwm.o(.data) + s_pwm_cb 0x00070880 Data 8 drv_pwm.o(.data) + .data 0x00070888 Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x00070888 Data 4 drv_spi_master.o(.data) + .data 0x0007088c Section 8 drv_swire.o(.data) + s_swire_cb 0x0007088c Data 8 drv_swire.o(.data) + .data 0x00070894 Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x00070894 Data 1 drv_sys_cfg.o(.data) + .data 0x00070898 Section 80 drv_timer.o(.data) + sg_timer_info 0x00070898 Data 80 drv_timer.o(.data) + .data 0x000708e8 Section 4 hal_internal_vsync.o(.data) + sg_cur_te_info 0x000708e8 Data 4 hal_internal_vsync.o(.data) + .data 0x000708ec Section 8 drv_rxbr.o(.data) + .data 0x000708f4 Section 4 drv_vidc.o(.data) + .data 0x000708f8 Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x000708f8 Data 1 drv_phy_common.o(.data) + .data 0x000708fc Section 12 drv_chip_info.o(.data) + sg_chip_info 0x000708fc Data 4 drv_chip_info.o(.data) + sg_chip_function 0x00070900 Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x00070904 Data 4 drv_chip_info.o(.data) + .data 0x00070908 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x00070908 Data 4 drv_uart.o(.data) + uart_userData 0x0007090c Data 4 drv_uart.o(.data) + .data 0x00070910 Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x00070910 Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x00070914 Data 8 drv_wdg.o(.data) + .data 0x0007091c Section 4 stdout.o(.data) + .data 0x00070920 Section 4 errno.o(.data) + _errno 0x00070920 Data 4 errno.o(.data) + .bss 0x00070924 Section 400 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x00070924 Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x000709ec Data 200 app_tp_transfer.o(.bss) + .bss 0x00070ab4 Section 192 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x00070ab4 Data 192 hal_dsi_rx_ctrl.o(.bss) + .bss 0x00070b74 Section 72 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x00070b74 Data 72 hal_dsi_tx_ctrl.o(.bss) + .bss 0x00070bbc Section 256 tau_log.o(.bss) + .bss 0x00070cbc Section 208 hal_uart.o(.bss) + .bss 0x00070d8c Section 28 drv_dma.o(.bss) + s_dma_handle 0x00070d8c Data 28 drv_dma.o(.bss) + .bss 0x00070da8 Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00070da8 Data 64 drv_gpio.o(.bss) + .bss 0x00070de8 Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x00070de8 Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x00070e88 Data 160 drv_i2c_dma.o(.bss) + .bss 0x00070f28 Section 2392 hal_internal_vsync.o(.bss) + g_imm_buffer 0x00071760 Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x00071860 Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x0007186c Data 20 hal_internal_vsync.o(.bss) + .bss 0x00071880 Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x000728b0 Section 32 hal_spi_slave.o(.bss) + STACK 0x000728d0 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfrcmple 0x0001083d Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010851 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108b1 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108b1 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108d1 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108d1 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000108f3 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000108f3 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010919 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010919 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010929 Thumb Code 114 fepilogue.o(.text) + _double_round 0x0001099b Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109b5 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a59 Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010afd Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b3d Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b65 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b65 Thumb Code 0 init.o(.text) + __decompress 0x00010b89 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010b89 Thumb Code 86 __dczerorl2.o(.text) + ADC_IRQn_Handler 0x00010be1 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010bf9 Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010c11 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c25 Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c41 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010c5d Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010c79 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010c95 Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010cb1 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010ccd Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010ce9 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + FLSCTRL_IRQn_Handler 0x00010d05 Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010d19 Thumb Code 80 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010d69 Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010d7d Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010d95 Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010dad Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010dc5 Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010ded Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010e05 Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010e1d Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010e35 Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + PWM_Task 0x00010e51 Thumb Code 60 ap_demo.o(i.PWM_Task) + S20_Start_init 0x00010eb1 Thumb Code 268 app_tp_transfer.o(i.S20_Start_init) + SPIM_IRQn_Handler 0x00010fe1 Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + UART_DisableDma 0x00010ffd Thumb Code 2 drv_uart.o(i.UART_DisableDma) + __scatterload_null 0x00010fff Thumb Code 2 handlers.o(i.__scatterload_null) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + SPIS_IRQn_Handler 0x00011015 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + SWIRE_IRQn_Handler 0x00011031 Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x0001104d Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00011065 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x0001107d Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00011095 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x000110ad Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x000110c5 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + UART_GetInstance 0x000110e1 Thumb Code 4 drv_uart.o(i.UART_GetInstance) + UART_IRQn_Handler 0x000110e5 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x000110fd Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SetBaudRate 0x00011121 Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x00011169 Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x00011183 Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x000112b7 Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x000112d1 Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x0001138d Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x000113a5 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x000113bd Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x000113d5 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x000113d5 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x000113d5 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x000113d5 Thumb Code 0 printfa.o(i.__0printf) + printf 0x000113d5 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x000113f5 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x000113f5 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x000113f5 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x000113f5 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x000113f5 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x00011419 Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x00011447 Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_copy 0x00011525 Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x00011533 Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x00011541 Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x0001267d Thumb Code 354 ap_demo.o(i.ap_demo) + ap_tp_calibration 0x00012c41 Thumb Code 172 app_tp_transfer.o(i.ap_tp_calibration) + app_ADC_IRQn_Handler 0x00012d09 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x00012d25 Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x00012d49 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x00012d65 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x00012d81 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x00012d9d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x00012db9 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x00012dd5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x00012df1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00012e0d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x00012e29 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x00012e71 Thumb Code 8 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00012e81 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00012e91 Thumb Code 98 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00012f71 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00012ff9 Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00013291 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00013331 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00013379 Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x000133a9 Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x000135a9 Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x000135c9 Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x000135e1 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x000135eb Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x000135f5 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x000135ff Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x00013609 Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x00013611 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x0001362d Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x00013649 Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x00013681 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x00013691 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x000136c1 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x000136e5 Thumb Code 44 ap_demo.o(i.app_tp_calibration_exec) + app_tp_init 0x0001375d Thumb Code 66 app_tp_transfer.o(i.app_tp_init) + app_tp_m_transfer_complate 0x000137e1 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_transfer_complate) + app_tp_phone_analysis_data 0x000137f9 Thumb Code 820 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_phone_clear_reset_on 0x00013b61 Thumb Code 8 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + app_tp_s_read 0x00013b6d Thumb Code 16 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x00013b7d Thumb Code 16 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x00013b8d Thumb Code 710 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x00013e5d Thumb Code 46 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x00013f5d Thumb Code 324 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x000140c5 Thumb Code 24 app_tp_transfer.o(i.app_tp_transfer_screen_start) + board_Init 0x000140e9 Thumb Code 30 board.o(i.board_Init) + ceil 0x00014519 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x0001469d Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x000146f5 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x0001470d Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00014751 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x00014791 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x000147a9 Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x000147cd Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x00014805 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x00014811 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x00014851 Thumb Code 122 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x00014919 Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x0001492d Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x00014985 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x0001498d Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x0001499d Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x000149b1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x000149c5 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x000149e5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x000149f9 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x00014a11 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x00014a25 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x00014a39 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x00014a4d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x00014a61 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x00014a75 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x00014a89 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x00014a9d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x00014ab1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x00014ac5 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x00014add Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x00014af5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x00014b09 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x00014b1d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x00014b31 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x00014b49 Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x00014b65 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x00014b75 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00014b85 Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x00014ba9 Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00014bb5 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x00014c45 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x00014c57 Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x00014c71 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x00014c79 Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00014cbd Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x00014cf3 Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00014d01 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00014d75 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00014d7f Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x00014da9 Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00014ead Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00014f59 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00014f61 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00014f67 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00014f75 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00014f95 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00014fa5 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00014fa9 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00014fb9 Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00014fff Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00015025 Thumb Code 258 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00015131 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x0001513f Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00015153 Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x000151bf Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x000151c3 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x000151db Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x000151e3 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x000151eb Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x000151f5 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00015219 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x0001521d Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00015221 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x00015225 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x0001523d Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x00015257 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00015263 Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x000152c7 Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x00015305 Thumb Code 268 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00015411 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x0001542f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00015437 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x00015453 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x0001546b Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x00015479 Thumb Code 46 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x000154ad Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x000154bd Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x000154c5 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x000154e7 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x000154ef Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00015515 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x000155bf Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x000155d5 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x000155ed Thumb Code 32 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x0001560d Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x00015619 Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x0001564b Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x00015665 Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x0001567d Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x00015689 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x0001569d Thumb Code 62 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x000156e1 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x00015701 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x00015711 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x00015721 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x00015731 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x00015761 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c_dma_init 0x000158c5 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x00015971 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x0001598b Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x000159a5 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x00015a05 Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x00015a15 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_m_set_callback 0x00015a4d Thumb Code 6 drv_i2c_master.o(i.drv_i2c_m_set_callback) + drv_i2c_master_init 0x00015a59 Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x00015ae5 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x00015b41 Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x00015bad Thumb Code 84 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_enable_intr 0x00015c09 Thumb Code 40 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) + drv_i2c_s_get_fifo_status 0x00015c3d Thumb Code 22 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_callback 0x00015c59 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c_s_set_callback) + drv_i2c_s_write_data 0x00015c65 Thumb Code 26 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x00015c85 Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x00015cdd Thumb Code 60 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x00015d21 Thumb Code 18 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x00015d3d Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x00015d55 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x00015d85 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x00015d9b Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00015dbf Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x00015de5 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x00015dfb Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x00015e11 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x00015e1d Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00015e3b Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00015e5d Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00015e7f Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x00015e8b Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00015ea5 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x00015ec7 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00015ee1 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x00015eed Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00015f39 Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00015f3f Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00015f51 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00015f71 Thumb Code 46 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_video_hw_mode 0x00015fa5 Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00015fb9 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x00015fd9 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00015fe5 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00016025 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00016031 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x00016043 Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00016053 Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00016061 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x00016075 Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00016081 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x00016091 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x000160a3 Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x000160b3 Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x000160c9 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x000160e1 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x000160fb Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00016109 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00016131 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x00016141 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x00016149 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x0001615d Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x00016171 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x00016179 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_p2r_filter_init 0x0001618d Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x000161b1 Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x000161c1 Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x000161fd Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x0001625d Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x000162b1 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x000162c1 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x000162d9 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x000162f9 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x0001631f Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwm_out_enable 0x0001635d Thumb Code 26 drv_pwm.o(i.drv_pwm_out_enable) + drv_pwm_out_set_control 0x0001637d Thumb Code 6 drv_pwm.o(i.drv_pwm_out_set_control) + drv_pwm_out_set_period 0x00016389 Thumb Code 6 drv_pwm.o(i.drv_pwm_out_set_period) + drv_pwm_out_set_threshold 0x00016395 Thumb Code 8 drv_pwm.o(i.drv_pwm_out_set_threshold) + drv_pwr_set_cp_mode 0x000163a1 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x000163c1 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x000163d9 Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x00016457 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00016461 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00016465 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x000164c1 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x000164d5 Thumb Code 44 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x00016511 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x00016527 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x0001653d Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x00016549 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x00016551 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x0001655d Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x00016569 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x0001657d Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x00016649 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x0001665d Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x00016671 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x00016681 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x000166a7 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x000166af Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x000166b9 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_enable 0x000166d9 Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_set_int 0x000166f5 Thumb Code 64 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x0001673d Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x00016759 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00016765 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x0001678d Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x000167a5 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x000167c1 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x000167e5 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x00016809 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x00016819 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x00016829 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x00016867 Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x00016889 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x00016899 Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x000168e5 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x000168f9 Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x00016909 Thumb Code 68 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x00016951 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x00016979 Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x00016993 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x000169af Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00016a01 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00016a09 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00016a21 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x00016a61 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x00016a75 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x00016a9d Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x00016aa9 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x00016aaf Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x00016aeb Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00016aff Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x00016b0f Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x00016b17 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x00016b3d Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x00016b65 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x00016b7d Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x00016b87 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x00016b97 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00016ba1 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x00016bab Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00016bbd Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00016bc7 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00016bd1 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x00016be9 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00016c19 Thumb Code 48 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x00016c4d Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x00016c57 Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00016c6d Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x00016c9d Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00016d39 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016dbd Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x00016de5 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00016e0d Thumb Code 88 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_pre_init_pps 0x00017509 Thumb Code 24 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) + hal_dsi_rx_ctrl_send_ack_cmd 0x00017525 Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_esc_clk 0x00017615 Thumb Code 34 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) + hal_dsi_rx_ctrl_set_cus_sync_line 0x00017641 Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_hw_tear_mode 0x00017675 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017755 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_start 0x00017789 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x000177c5 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x00017801 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x00017eb5 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00017ee1 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x00017f29 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017f75 Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x00017f9d Thumb Code 188 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x00018085 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_ccm 0x00018091 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x000180b1 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x000180c5 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x000180d5 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x000180f9 Thumb Code 94 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00018165 Thumb Code 54 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x000181a9 Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00018281 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x00018515 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x0001852d Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x00018541 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x00018581 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x000185a1 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x000185c9 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x000185e1 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x00018631 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x00018691 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x00018699 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x000186b9 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x00018725 Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x00018745 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x00018761 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x0001879d Thumb Code 46 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x000187d5 Thumb Code 86 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x00018841 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x00018855 Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x000189ad Thumb Code 146 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x00018a91 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_input_resolution_change 0x00018aa1 Thumb Code 418 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_vsync_deinit 0x00018cb5 Thumb Code 24 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00018cd1 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00018cdd Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tx_state 0x00018cf5 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00018d01 Thumb Code 220 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00018dfd Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x00018ead Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x00018fc9 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x00018fdd Thumb Code 22 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x00018ff9 Thumb Code 64 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00019041 Thumb Code 54 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_pwm_out_config_all 0x00019465 Thumb Code 100 hal_pwm.o(i.hal_pwm_out_config_all) + hal_pwm_out_init 0x000194cd Thumb Code 12 hal_pwm.o(i.hal_pwm_out_init) + hal_spi_m_clear_rxfifo 0x000194d9 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_deinit 0x000194e7 Thumb Code 18 hal_swire.o(i.hal_swire_deinit) + hal_swire_open 0x000194f9 Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x0001950f Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x00019519 Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x000195a1 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x000195bd Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x000195c5 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x000195cd Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_deinit 0x000195d5 Thumb Code 46 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x00019603 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x0001961d Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x00019665 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x0001968d Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x00019719 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x00019729 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x0001996d Thumb Code 16 main.o(i.main) + sqrt 0x0001a62d Thumb Code 66 sqrt.o(i.sqrt) + translate_data 0x0001a675 Thumb Code 1734 ap_demo.o(i.translate_data) + panel_init_code 0x0001b154 Data 9160 ap_demo.o(.constdata) + phone_data_21 0x0001d66e Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001d66f Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_0 0x0001d670 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_92_1 0x0001d671 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_1 0x0001d672 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_2 0x0001d673 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_3 0x0001d674 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_4 0x0001d675 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001d676 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_92_3 0x0001d679 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001d67c Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001d680 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001d684 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001d688 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001d68c Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001d690 Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_92_2 0x0001d695 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_1 0x0001d69b Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_2 0x0001d6a1 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_3 0x0001d6a7 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_4 0x0001d6ad Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001d6b3 Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001d6c3 Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_2 0x0001d6ce Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001d6ea Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_3 0x0001d6f4 Data 1224 app_tp_for_custom_s8.o(.constdata) + phone_data_72_5 0x0001dbbc Data 1224 app_tp_for_custom_s8.o(.constdata) + phone_data_72_13 0x0001e084 Data 1224 app_tp_for_custom_s8.o(.constdata) + phone_data_75_1 0x0001e54c Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_00 0x0001e7b8 Data 660 app_tp_for_custom_s8.o(.constdata) + phone_data_75_FF 0x0001ea4c Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_3 0x0001eb6c Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_6 0x0001edd8 Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7 0x0001f044 Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_08 0x0001f2b0 Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_11 0x0001f3d0 Data 620 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001f63c Data 16 app_tp_for_custom_s8.o(.constdata) + screen_reg_start_data_size 0x0001f64c Data 1 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001f95c Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001f98c Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_start_flag 0x000701de Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701e0 Data 2 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701e2 Data 1 ap_demo.o(.data) + value_reg_b1 0x000701e8 Data 2 ap_demo.o(.data) + value_reg_ca 0x000701ea Data 2 ap_demo.o(.data) + value_reg_ca_bak 0x000701f8 Data 2 ap_demo.o(.data) + value_reg_b1_bak 0x000701fa Data 2 ap_demo.o(.data) + panel_mode 0x000701fc Data 1 ap_demo.o(.data) + panel_r 0x000701fe Data 2 ap_demo.o(.data) + panel_g 0x00070200 Data 2 ap_demo.o(.data) + panel_b 0x00070202 Data 2 ap_demo.o(.data) + read_point 0x00070208 Data 1 app_tp_transfer.o(.data) + s_screen_number 0x00070209 Data 2 app_tp_transfer.o(.data) + s_screen_temp 0x0007020b Data 2 app_tp_transfer.o(.data) + s_screen_init_complate 0x00070211 Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x00070213 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x00070216 Data 6 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x0007021c Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x0007021f Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data5 0x00070222 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data6 0x00070225 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data7 0x00070228 Data 5 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data8 0x0007022d Data 6 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data9 0x00070233 Data 2 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data10 0x00070235 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data2 0x00070238 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data3 0x0007023b Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data4 0x0007023e Data 4 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data5 0x00070242 Data 4 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data6 0x00070246 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data7 0x00070249 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data8 0x0007024c Data 3 app_tp_transfer.o(.data) + phone_data_E4 0x0007027c Data 1 app_tp_for_custom_s8.o(.data) + tp_flag 0x0007027d Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x0007027e Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x0007027f Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x00070280 Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x00070281 Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x00070282 Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x00070283 Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x00070284 Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x00070285 Data 1 app_tp_for_custom_s8.o(.data) + phone_data_B1 0x0007028e Data 2 app_tp_for_custom_s8.o(.data) + phone_data_30 0x00070290 Data 2 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x0007029a Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x00070362 Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x00070363 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x00070364 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x00070365 Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x00070368 Data 5 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x00070370 Data 48 app_tp_for_custom_s8.o(.data) + g_fls_w_cmd 0x000703a0 Data 1 norflash.o(.data) + g_fls_r_cmd 0x000703a1 Data 1 norflash.o(.data) + g_fls_write_en_status 0x000703a2 Data 1 norflash.o(.data) + isFlsTransferEnd 0x000703a3 Data 1 norflash.o(.data) + isFlsFifoReq 0x000703a4 Data 1 norflash.o(.data) + isNandWriteCompleted 0x000703a5 Data 1 norflash.o(.data) + isNandReadCompleted 0x000703a6 Data 1 norflash.o(.data) + g_fls_error_info 0x000703ac Data 6 norflash.o(.data) + g_systick_cb_func 0x000703b8 Data 4 drv_common.o(.data) + g_system_clock 0x000703bc Data 4 drv_common.o(.data) + tx_byte_num 0x000703d4 Data 4 drv_i2c_slave.o(.data) + g_scld_fhd_filter_h 0x000703d8 Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x000704d8 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x000705d8 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x000706d8 Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x000707d8 Data 128 drv_param_init.o(.data) + g_ccm_setting 0x00070858 Data 36 drv_param_init.o(.data) + g_int_rxbr_irq0_cb_func 0x000708ec Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x000708f0 Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x000708f4 Data 4 drv_vidc.o(.data) + __stdout 0x0007091c Data 4 stdout.o(.data) + string 0x00070bbc Data 256 tau_log.o(.bss) + hal_dmahandle 0x00070cbc Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x00070d5c Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x00070d7c Data 16 hal_uart.o(.bss) + g_vsync_hande 0x00070f28 Data 56 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00070f60 Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x00071880 Data 4144 dcs_packet_fifo.o(.bss) + g_spis_ctrl_handle 0x000728b0 Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x000728d0 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x000738d0 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x000100e0, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000fd80]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000f98c, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 461 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2636 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2946 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2949 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2951 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2953 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2954 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2956 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2958 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2947 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 462 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2639 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2641 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2643 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2645 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 2910 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 2912 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 2914 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 2916 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 2918 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 2920 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 2922 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 2924 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 2926 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 2930 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 2932 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 2934 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 2936 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 2938 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 2940 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 2942 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 2944 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 2961 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 2963 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 2965 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 2967 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 2976 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 2977 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 2979 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 2983 .text mf_p.l(dsqrt.o) + 0x00010afa 0x00010afa 0x00000002 PAD + 0x00010afc 0x00010afc 0x00000040 Code RO 2985 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 2987 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 2989 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000056 Code RO 2999 .text mc_p.l(__dczerorl2.o) + 0x00010bde 0x00010bde 0x00000002 PAD + 0x00010be0 0x00010be0 0x00000018 Code RO 2270 i.ADC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010bf8 0x00010bf8 0x00000018 Code RO 2271 i.AP_NRESET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c10 0x00010c10 0x00000014 Code RO 2272 i.DMA_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c24 0x00010c24 0x0000001c Code RO 2273 i.EXTI_INT0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c40 0x00010c40 0x0000001c Code RO 2274 i.EXTI_INT1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c5c 0x00010c5c 0x0000001c Code RO 2275 i.EXTI_INT2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c78 0x00010c78 0x0000001c Code RO 2276 i.EXTI_INT3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c94 0x00010c94 0x0000001c Code RO 2277 i.EXTI_INT4_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cb0 0x00010cb0 0x0000001c Code RO 2278 i.EXTI_INT5_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ccc 0x00010ccc 0x0000001c Code RO 2279 i.EXTI_INT6_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ce8 0x00010ce8 0x0000001c Code RO 2280 i.EXTI_INT7_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d04 0x00010d04 0x00000014 Code RO 2281 i.FLSCTRL_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d18 0x00010d18 0x00000050 Code RO 99 i.Gpio_swire_output ap_demo.o + 0x00010d68 0x00010d68 0x00000014 Code RO 2282 i.HardFault_Handler CVWL368.lib(irq_redirect .o) + 0x00010d7c 0x00010d7c 0x00000018 Code RO 2283 i.I2C0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d94 0x00010d94 0x00000018 Code RO 2284 i.I2C1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010dac 0x00010dac 0x00000018 Code RO 2285 i.LCDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010dc4 0x00010dc4 0x00000028 Code RO 893 i.LOG_printf CVWL368.lib(tau_log.o) + 0x00010dec 0x00010dec 0x00000018 Code RO 2286 i.MEMC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e04 0x00010e04 0x00000018 Code RO 2287 i.MIPI_RX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e1c 0x00010e1c 0x00000018 Code RO 2288 i.MIPI_TX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e34 0x00010e34 0x0000001c Code RO 2289 i.PWMDET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e50 0x00010e50 0x00000044 Code RO 100 i.PWM_Task ap_demo.o + 0x00010e94 0x00010e94 0x0000001a Code RO 101 i.PWM_init ap_demo.o + 0x00010eae 0x00010eae 0x00000002 PAD + 0x00010eb0 0x00010eb0 0x00000130 Code RO 289 i.S20_Start_init app_tp_transfer.o + 0x00010fe0 0x00010fe0 0x0000001c Code RO 2290 i.SPIM_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ffc 0x00010ffc 0x00000002 Code RO 2496 i.UART_DisableDma CVWL368.lib(drv_uart.o) + 0x00010ffe 0x00010ffe 0x00000002 Code RO 2994 i.__scatterload_null mc_p.l(handlers.o) + 0x00011000 0x00011000 0x00000014 Data RO 1147 .ARM.__at_0x11000 CVWL368.lib(drv_common.o) + 0x00011014 0x00011014 0x0000001c Code RO 2291 i.SPIS_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011030 0x00011030 0x0000001c Code RO 2292 i.SWIRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001104c 0x0001104c 0x00000018 Code RO 2293 i.SysTick_Handler CVWL368.lib(irq_redirect .o) + 0x00011064 0x00011064 0x00000018 Code RO 2294 i.TIMER0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001107c 0x0001107c 0x00000018 Code RO 2295 i.TIMER1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011094 0x00011094 0x00000018 Code RO 2296 i.TIMER2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110ac 0x000110ac 0x00000018 Code RO 2297 i.TIMER3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110c4 0x000110c4 0x0000001c Code RO 2492 i.UART0_IRQ_Handle CVWL368.lib(drv_uart.o) + 0x000110e0 0x000110e0 0x00000004 Code RO 2502 i.UART_GetInstance CVWL368.lib(drv_uart.o) + 0x000110e4 0x000110e4 0x00000018 Code RO 2298 i.UART_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110fc 0x000110fc 0x00000024 Code RO 2510 i.UART_ResetRxFIFO CVWL368.lib(drv_uart.o) + 0x00011120 0x00011120 0x00000048 Code RO 2513 i.UART_SetBaudRate CVWL368.lib(drv_uart.o) + 0x00011168 0x00011168 0x0000001a Code RO 2514 i.UART_SwitchSCLK CVWL368.lib(drv_uart.o) + 0x00011182 0x00011182 0x00000134 Code RO 2516 i.UART_TransferHandleIRQ CVWL368.lib(drv_uart.o) + 0x000112b6 0x000112b6 0x0000001a Code RO 2518 i.UART_WriteBlocking CVWL368.lib(drv_uart.o) + 0x000112d0 0x000112d0 0x000000bc Code RO 2519 i.UART_init CVWL368.lib(drv_uart.o) + 0x0001138c 0x0001138c 0x00000018 Code RO 2299 i.VIDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113a4 0x000113a4 0x00000018 Code RO 2300 i.VPRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113bc 0x000113bc 0x00000018 Code RO 2301 i.WDG_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113d4 0x000113d4 0x00000020 Code RO 2882 i.__0printf mc_p.l(printfa.o) + 0x000113f4 0x000113f4 0x00000024 Code RO 2888 i.__0vsprintf mc_p.l(printfa.o) + 0x00011418 0x00011418 0x0000002e Code RO 2981 i.__ARM_clz mf_p.l(depilogue.o) + 0x00011446 0x00011446 0x0000001a Code RO 555 i.__ARM_common_switch8 CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00011460 0x00011460 0x00000018 Code RO 1465 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_i2c_master.o) + 0x00011478 0x00011478 0x00000018 Code RO 1500 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_i2c_slave.o) + 0x00011490 0x00011490 0x00000018 Code RO 1636 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_spi_master.o) + 0x000114a8 0x000114a8 0x00000020 Code RO 2124 i.__NVIC_DisableIRQ CVWL368.lib(drv_rxbr.o) + 0x000114c8 0x000114c8 0x00000018 Code RO 2125 i.__NVIC_EnableIRQ CVWL368.lib(drv_rxbr.o) + 0x000114e0 0x000114e0 0x00000044 Code RO 2398 i.__NVIC_SetPriority CVWL368.lib(hal_spi_slave.o) + 0x00011524 0x00011524 0x0000000e Code RO 2993 i.__scatterload_copy mc_p.l(handlers.o) + 0x00011532 0x00011532 0x0000000e Code RO 2995 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x00011540 0x00011540 0x0000000c Code RO 2971 i.__set_errno mc_p.l(errno.o) + 0x0001154c 0x0001154c 0x00000174 Code RO 2889 i._fp_digits mc_p.l(printfa.o) + 0x000116c0 0x000116c0 0x000006ec Code RO 2890 i._printf_core mc_p.l(printfa.o) + 0x00011dac 0x00011dac 0x00000020 Code RO 2891 i._printf_post_padding mc_p.l(printfa.o) + 0x00011dcc 0x00011dcc 0x0000002c Code RO 2892 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011df8 0x00011df8 0x0000000a Code RO 2894 i._sputc mc_p.l(printfa.o) + 0x00011e02 0x00011e02 0x00000002 PAD + 0x00011e04 0x00011e04 0x00000878 Code RO 102 i.ap_dcs_read ap_demo.o + 0x0001267c 0x0001267c 0x00000218 Code RO 103 i.ap_demo ap_demo.o + 0x00012894 0x00012894 0x00000050 Code RO 104 i.ap_get_reg_ca ap_demo.o + 0x000128e4 0x000128e4 0x00000100 Code RO 105 i.ap_get_reg_df ap_demo.o + 0x000129e4 0x000129e4 0x00000084 Code RO 106 i.ap_reset_cb ap_demo.o + 0x00012a68 0x00012a68 0x00000050 Code RO 107 i.ap_set_backlight ap_demo.o + 0x00012ab8 0x00012ab8 0x00000048 Code RO 108 i.ap_set_display_off ap_demo.o + 0x00012b00 0x00012b00 0x00000038 Code RO 109 i.ap_set_display_on ap_demo.o + 0x00012b38 0x00012b38 0x00000098 Code RO 110 i.ap_set_enter_sleep_mode ap_demo.o + 0x00012bd0 0x00012bd0 0x00000048 Code RO 111 i.ap_set_exit_sleep_mode ap_demo.o + 0x00012c18 0x00012c18 0x00000028 Code RO 112 i.ap_set_tp_calibration_04 ap_demo.o + 0x00012c40 0x00012c40 0x000000c8 Code RO 290 i.ap_tp_calibration app_tp_transfer.o + 0x00012d08 0x00012d08 0x0000001c Code RO 2126 i.app_ADC_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00012d24 0x00012d24 0x00000024 Code RO 1389 i.app_AP_NRESET_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012d48 0x00012d48 0x0000001c Code RO 1390 i.app_EXTI_INT0_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012d64 0x00012d64 0x0000001c Code RO 1391 i.app_EXTI_INT1_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012d80 0x00012d80 0x0000001c Code RO 1392 i.app_EXTI_INT2_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012d9c 0x00012d9c 0x0000001c Code RO 1393 i.app_EXTI_INT3_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012db8 0x00012db8 0x0000001c Code RO 1394 i.app_EXTI_INT4_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012dd4 0x00012dd4 0x0000001c Code RO 1395 i.app_EXTI_INT5_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012df0 0x00012df0 0x0000001c Code RO 1396 i.app_EXTI_INT6_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012e0c 0x00012e0c 0x0000001c Code RO 1397 i.app_EXTI_INT7_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012e28 0x00012e28 0x00000048 Code RO 1139 i.app_HardFault_Handler CVWL368.lib(drv_common.o) + 0x00012e70 0x00012e70 0x00000010 Code RO 1501 i.app_I2C0_IRQn_Handler CVWL368.lib(drv_i2c_slave.o) + 0x00012e80 0x00012e80 0x00000010 Code RO 1466 i.app_I2C1_IRQn_Handler CVWL368.lib(drv_i2c_master.o) + 0x00012e90 0x00012e90 0x000000e0 Code RO 1754 i.app_LCDC_IRQn_Handler CVWL368.lib(hal_internal_vsync.o) + 0x00012f70 0x00012f70 0x00000088 Code RO 2068 i.app_MEMC_IRQn_Handler CVWL368.lib(drv_memc.o) + 0x00012ff8 0x00012ff8 0x00000298 Code RO 1840 i.app_MIPI_RX_IRQn_Handler CVWL368.lib(drv_dsi_rx.o) + 0x00013290 0x00013290 0x000000a0 Code RO 1896 i.app_MIPI_TX_IRQn_Handler CVWL368.lib(drv_dsi_tx.o) + 0x00013330 0x00013330 0x00000048 Code RO 1559 i.app_PWMDET_IRQn_Handler CVWL368.lib(drv_pwm.o) + 0x00013378 0x00013378 0x00000030 Code RO 1637 i.app_SPIM_IRQn_Handler CVWL368.lib(drv_spi_master.o) + 0x000133a8 0x000133a8 0x00000200 Code RO 2399 i.app_SPIS_IRQn_Handler CVWL368.lib(hal_spi_slave.o) + 0x000135a8 0x000135a8 0x00000020 Code RO 1669 i.app_SWIRE_IRQn_Handler CVWL368.lib(drv_swire.o) + 0x000135c8 0x000135c8 0x00000018 Code RO 1140 i.app_SysTick_Handler CVWL368.lib(drv_common.o) + 0x000135e0 0x000135e0 0x0000000a Code RO 1719 i.app_TIMER0_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000135ea 0x000135ea 0x0000000a Code RO 1720 i.app_TIMER1_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000135f4 0x000135f4 0x0000000a Code RO 1721 i.app_TIMER2_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000135fe 0x000135fe 0x0000000a Code RO 1722 i.app_TIMER3_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x00013608 0x00013608 0x00000008 Code RO 2520 i.app_UART_IRQn_Handler CVWL368.lib(drv_uart.o) + 0x00013610 0x00013610 0x0000001c Code RO 2191 i.app_VIDC_IRQn_Handler CVWL368.lib(drv_vidc.o) + 0x0001362c 0x0001362c 0x0000001c Code RO 2127 i.app_VPRE_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00013648 0x00013648 0x00000038 Code RO 2579 i.app_WDG_IRQn_Handler CVWL368.lib(drv_wdg.o) + 0x00013680 0x00013680 0x00000010 Code RO 1251 i.app_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00013690 0x00013690 0x00000030 Code RO 1055 i.app_fls_ctrl_Handler CVWL368.lib(norflash.o) + 0x000136c0 0x000136c0 0x00000024 Code RO 291 i.app_tp_I2C_init app_tp_transfer.o + 0x000136e4 0x000136e4 0x00000068 Code RO 113 i.app_tp_calibration_exec ap_demo.o + 0x0001374c 0x0001374c 0x0000000e Code RO 292 i.app_tp_i2cs_callback app_tp_transfer.o + 0x0001375a 0x0001375a 0x00000002 PAD + 0x0001375c 0x0001375c 0x00000054 Code RO 293 i.app_tp_init app_tp_transfer.o + 0x000137b0 0x000137b0 0x00000030 Code RO 294 i.app_tp_m_read app_tp_transfer.o + 0x000137e0 0x000137e0 0x00000008 Code RO 295 i.app_tp_m_transfer_complate app_tp_transfer.o + 0x000137e8 0x000137e8 0x00000010 Code RO 296 i.app_tp_m_write app_tp_transfer.o + 0x000137f8 0x000137f8 0x00000368 Code RO 904 i.app_tp_phone_analysis_data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x00013b60 0x00013b60 0x0000000c Code RO 297 i.app_tp_phone_clear_reset_on app_tp_transfer.o + 0x00013b6c 0x00013b6c 0x00000010 Code RO 299 i.app_tp_s_read app_tp_transfer.o + 0x00013b7c 0x00013b7c 0x00000010 Code RO 301 i.app_tp_s_write app_tp_transfer.o + 0x00013b8c 0x00013b8c 0x000002d0 Code RO 906 i.app_tp_screen_analysis_int CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x00013e5c 0x00013e5c 0x00000034 Code RO 302 i.app_tp_screen_init app_tp_transfer.o + 0x00013e90 0x00013e90 0x0000000c Code RO 303 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00013e9c 0x00013e9c 0x00000040 Code RO 304 i.app_tp_screen_int_init app_tp_transfer.o + 0x00013edc 0x00013edc 0x00000004 Code RO 305 i.app_tp_screen_int_lvl_low app_tp_transfer.o + 0x00013ee0 0x00013ee0 0x00000034 Code RO 306 i.app_tp_transfer_phone app_tp_transfer.o + 0x00013f14 0x00013f14 0x00000048 Code RO 307 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00013f5c 0x00013f5c 0x00000168 Code RO 308 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x000140c4 0x000140c4 0x00000024 Code RO 309 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x000140e8 0x000140e8 0x00000024 Code RO 441 i.board_Init board.o + 0x0001410c 0x0001410c 0x0000040c Code RO 1755 i.calc_framebuffer_setting CVWL368.lib(hal_internal_vsync.o) + 0x00014518 0x00014518 0x000000c8 Code RO 2625 i.ceil m_ps.l(ceil.o) + 0x000145e0 0x000145e0 0x0000002c Code RO 1756 i.check_mipi_rx_tx_video_info CVWL368.lib(hal_internal_vsync.o) + 0x0001460c 0x0001460c 0x00000090 Code RO 1757 i.check_pkt_buf_rev CVWL368.lib(hal_internal_vsync.o) + 0x0001469c 0x0001469c 0x00000058 Code RO 1827 i.dcs_packet_fifo_alloc CVWL368.lib(dcs_packet_fifo.o) + 0x000146f4 0x000146f4 0x00000018 Code RO 1828 i.dcs_packet_fifo_init CVWL368.lib(dcs_packet_fifo.o) + 0x0001470c 0x0001470c 0x00000044 Code RO 1829 i.dcs_packet_free_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x00014750 0x00014750 0x00000024 Code RO 1830 i.dcs_packet_get_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x00014774 0x00014774 0x0000001c Code RO 1758 i.dcs_sw_filter CVWL368.lib(hal_internal_vsync.o) + 0x00014790 0x00014790 0x00000018 Code RO 885 i.delayMs CVWL368.lib(tau_delay.o) + 0x000147a8 0x000147a8 0x00000022 Code RO 886 i.delayUs CVWL368.lib(tau_delay.o) + 0x000147ca 0x000147ca 0x00000002 PAD + 0x000147cc 0x000147cc 0x00000038 Code RO 1688 i.drv_ap_rst_trig_edge_detect CVWL368.lib(drv_sys_cfg.o) + 0x00014804 0x00014804 0x0000000c Code RO 2369 i.drv_chip_info_get_info CVWL368.lib(drv_chip_info.o) + 0x00014810 0x00014810 0x00000040 Code RO 2370 i.drv_chip_info_init CVWL368.lib(drv_chip_info.o) + 0x00014850 0x00014850 0x000000c8 Code RO 2371 i.drv_chip_rx_info_check CVWL368.lib(drv_chip_info.o) + 0x00014918 0x00014918 0x00000014 Code RO 2372 i.drv_chip_rx_init_done CVWL368.lib(drv_chip_info.o) + 0x0001492c 0x0001492c 0x00000058 Code RO 1142 i.drv_common_enable_systick CVWL368.lib(drv_common.o) + 0x00014984 0x00014984 0x00000008 Code RO 1145 i.drv_common_system_init CVWL368.lib(drv_common.o) + 0x0001498c 0x0001498c 0x00000010 Code RO 1166 i.drv_crgu_config_reset_modules CVWL368.lib(drv_crgu.o) + 0x0001499c 0x0001499c 0x00000014 Code RO 1178 i.drv_crgu_set_ahb_pre_div CVWL368.lib(drv_crgu.o) + 0x000149b0 0x000149b0 0x00000014 Code RO 1179 i.drv_crgu_set_ahb_src CVWL368.lib(drv_crgu.o) + 0x000149c4 0x000149c4 0x00000020 Code RO 1182 i.drv_crgu_set_clock CVWL368.lib(drv_crgu.o) + 0x000149e4 0x000149e4 0x00000014 Code RO 1183 i.drv_crgu_set_dpi_mux_src CVWL368.lib(drv_crgu.o) + 0x000149f8 0x000149f8 0x00000018 Code RO 1184 i.drv_crgu_set_dpi_pre_div CVWL368.lib(drv_crgu.o) + 0x00014a10 0x00014a10 0x00000014 Code RO 1185 i.drv_crgu_set_dpi_pre_src CVWL368.lib(drv_crgu.o) + 0x00014a24 0x00014a24 0x00000014 Code RO 1186 i.drv_crgu_set_dsc_core_div CVWL368.lib(drv_crgu.o) + 0x00014a38 0x00014a38 0x00000014 Code RO 1187 i.drv_crgu_set_dsco_src CVWL368.lib(drv_crgu.o) + 0x00014a4c 0x00014a4c 0x00000014 Code RO 1188 i.drv_crgu_set_dsco_src_div CVWL368.lib(drv_crgu.o) + 0x00014a60 0x00014a60 0x00000014 Code RO 1189 i.drv_crgu_set_fb_div CVWL368.lib(drv_crgu.o) + 0x00014a74 0x00014a74 0x00000014 Code RO 1190 i.drv_crgu_set_fb_src CVWL368.lib(drv_crgu.o) + 0x00014a88 0x00014a88 0x00000014 Code RO 1193 i.drv_crgu_set_lcdc_div CVWL368.lib(drv_crgu.o) + 0x00014a9c 0x00014a9c 0x00000014 Code RO 1194 i.drv_crgu_set_lcdc_src CVWL368.lib(drv_crgu.o) + 0x00014ab0 0x00014ab0 0x00000014 Code RO 1195 i.drv_crgu_set_mipi_cfg_src CVWL368.lib(drv_crgu.o) + 0x00014ac4 0x00014ac4 0x00000018 Code RO 1196 i.drv_crgu_set_mipi_ref_src CVWL368.lib(drv_crgu.o) + 0x00014adc 0x00014adc 0x00000018 Code RO 1199 i.drv_crgu_set_reset CVWL368.lib(drv_crgu.o) + 0x00014af4 0x00014af4 0x00000014 Code RO 1200 i.drv_crgu_set_rxbr_div CVWL368.lib(drv_crgu.o) + 0x00014b08 0x00014b08 0x00000014 Code RO 1201 i.drv_crgu_set_rxbr_src CVWL368.lib(drv_crgu.o) + 0x00014b1c 0x00014b1c 0x00000014 Code RO 1203 i.drv_crgu_set_vidc_src CVWL368.lib(drv_crgu.o) + 0x00014b30 0x00014b30 0x00000018 Code RO 1255 i.drv_dma_clear_flag CVWL368.lib(drv_dma.o) + 0x00014b48 0x00014b48 0x0000001c Code RO 1256 i.drv_dma_create_handle CVWL368.lib(drv_dma.o) + 0x00014b64 0x00014b64 0x00000010 Code RO 1258 i.drv_dma_disenable_channel CVWL368.lib(drv_dma.o) + 0x00014b74 0x00014b74 0x00000010 Code RO 1260 i.drv_dma_enable_channel CVWL368.lib(drv_dma.o) + 0x00014b84 0x00014b84 0x00000024 Code RO 1261 i.drv_dma_enable_channel_interrupts CVWL368.lib(drv_dma.o) + 0x00014ba8 0x00014ba8 0x0000000c Code RO 1263 i.drv_dma_get_channel_flag CVWL368.lib(drv_dma.o) + 0x00014bb4 0x00014bb4 0x00000090 Code RO 1266 i.drv_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00014c44 0x00014c44 0x00000012 Code RO 1268 i.drv_dma_prepar_transfer CVWL368.lib(drv_dma.o) + 0x00014c56 0x00014c56 0x0000001a Code RO 1270 i.drv_dma_set_burst CVWL368.lib(drv_dma.o) + 0x00014c70 0x00014c70 0x00000006 Code RO 1271 i.drv_dma_set_callback CVWL368.lib(drv_dma.o) + 0x00014c76 0x00014c76 0x00000002 PAD + 0x00014c78 0x00014c78 0x00000044 Code RO 1273 i.drv_dma_set_transfer CVWL368.lib(drv_dma.o) + 0x00014cbc 0x00014cbc 0x00000036 Code RO 2382 i.drv_dsc_dec_convert_pps_rc_parameter CVWL368.lib(drv_dsc_dec.o) + 0x00014cf2 0x00014cf2 0x0000000c Code RO 2383 i.drv_dsc_dec_disable CVWL368.lib(drv_dsc_dec.o) + 0x00014cfe 0x00014cfe 0x00000002 PAD + 0x00014d00 0x00014d00 0x00000074 Code RO 2384 i.drv_dsc_dec_enable CVWL368.lib(drv_dsc_dec.o) + 0x00014d74 0x00014d74 0x0000000a Code RO 2385 i.drv_dsc_dec_get_nslc CVWL368.lib(drv_dsc_dec.o) + 0x00014d7e 0x00014d7e 0x00000028 Code RO 2387 i.drv_dsc_dec_set_u8_pps CVWL368.lib(drv_dsc_dec.o) + 0x00014da6 0x00014da6 0x00000002 PAD + 0x00014da8 0x00014da8 0x00000104 Code RO 1841 i.drv_dsi_rx_calc_ipi_tx_delay CVWL368.lib(drv_dsi_rx.o) + 0x00014eac 0x00014eac 0x00000040 Code RO 1842 i.drv_dsi_rx_enable_irq CVWL368.lib(drv_dsi_rx.o) + 0x00014eec 0x00014eec 0x00000050 Code RO 1843 i.drv_dsi_rx_get_color_bpp CVWL368.lib(drv_dsi_rx.o) + 0x00014f3c 0x00014f3c 0x0000001c Code RO 1844 i.drv_dsi_rx_get_color_pcc CVWL368.lib(drv_dsi_rx.o) + 0x00014f58 0x00014f58 0x00000008 Code RO 1845 i.drv_dsi_rx_get_compression_en CVWL368.lib(drv_dsi_rx.o) + 0x00014f60 0x00014f60 0x00000006 Code RO 1846 i.drv_dsi_rx_get_max_ret_size CVWL368.lib(drv_dsi_rx.o) + 0x00014f66 0x00014f66 0x0000000e Code RO 1850 i.drv_dsi_rx_power_up CVWL368.lib(drv_dsi_rx.o) + 0x00014f74 0x00014f74 0x00000020 Code RO 1851 i.drv_dsi_rx_set_ctrl_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014f94 0x00014f94 0x00000010 Code RO 1852 i.drv_dsi_rx_set_ddi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014fa4 0x00014fa4 0x00000004 Code RO 1854 i.drv_dsi_rx_set_inten CVWL368.lib(drv_dsi_rx.o) + 0x00014fa8 0x00014fa8 0x00000010 Code RO 1855 i.drv_dsi_rx_set_ipi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014fb8 0x00014fb8 0x00000046 Code RO 1857 i.drv_dsi_rx_set_lane_swap CVWL368.lib(drv_dsi_rx.o) + 0x00014ffe 0x00014ffe 0x00000026 Code RO 1858 i.drv_dsi_rx_set_resp_cnt CVWL368.lib(drv_dsi_rx.o) + 0x00015024 0x00015024 0x0000010c Code RO 1859 i.drv_dsi_rx_set_up_phy CVWL368.lib(drv_dsi_rx.o) + 0x00015130 0x00015130 0x0000000e Code RO 1860 i.drv_dsi_rx_shut_down CVWL368.lib(drv_dsi_rx.o) + 0x0001513e 0x0001513e 0x00000014 Code RO 1898 i.drv_dsi_tx_command_header CVWL368.lib(drv_dsi_tx.o) + 0x00015152 0x00015152 0x0000006c Code RO 1899 i.drv_dsi_tx_command_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x000151be 0x000151be 0x00000004 Code RO 1900 i.drv_dsi_tx_command_put_payload CVWL368.lib(drv_dsi_tx.o) + 0x000151c2 0x000151c2 0x00000018 Code RO 1901 i.drv_dsi_tx_config_eotp CVWL368.lib(drv_dsi_tx.o) + 0x000151da 0x000151da 0x00000008 Code RO 1902 i.drv_dsi_tx_config_int CVWL368.lib(drv_dsi_tx.o) + 0x000151e2 0x000151e2 0x00000008 Code RO 1903 i.drv_dsi_tx_dpi_lpcmd_time CVWL368.lib(drv_dsi_tx.o) + 0x000151ea 0x000151ea 0x0000000a Code RO 1904 i.drv_dsi_tx_dpi_mode CVWL368.lib(drv_dsi_tx.o) + 0x000151f4 0x000151f4 0x00000024 Code RO 1905 i.drv_dsi_tx_dpi_polarity CVWL368.lib(drv_dsi_tx.o) + 0x00015218 0x00015218 0x00000004 Code RO 1906 i.drv_dsi_tx_edpi_cmd_size CVWL368.lib(drv_dsi_tx.o) + 0x0001521c 0x0001521c 0x00000004 Code RO 1908 i.drv_dsi_tx_get_cmd_status CVWL368.lib(drv_dsi_tx.o) + 0x00015220 0x00015220 0x00000004 Code RO 1910 i.drv_dsi_tx_mode CVWL368.lib(drv_dsi_tx.o) + 0x00015224 0x00015224 0x00000018 Code RO 1911 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL368.lib(drv_dsi_tx.o) + 0x0001523c 0x0001523c 0x0000001a Code RO 1912 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL368.lib(drv_dsi_tx.o) + 0x00015256 0x00015256 0x0000000c Code RO 1914 i.drv_dsi_tx_phy_lane_mode CVWL368.lib(drv_dsi_tx.o) + 0x00015262 0x00015262 0x00000064 Code RO 1918 i.drv_dsi_tx_phy_status_ready CVWL368.lib(drv_dsi_tx.o) + 0x000152c6 0x000152c6 0x0000003e Code RO 1919 i.drv_dsi_tx_phy_status_stopstate CVWL368.lib(drv_dsi_tx.o) + 0x00015304 0x00015304 0x0000010c Code RO 1921 i.drv_dsi_tx_phy_test_setup CVWL368.lib(drv_dsi_tx.o) + 0x00015410 0x00015410 0x0000001e Code RO 1922 i.drv_dsi_tx_phy_time_cfg CVWL368.lib(drv_dsi_tx.o) + 0x0001542e 0x0001542e 0x00000008 Code RO 1926 i.drv_dsi_tx_powerup CVWL368.lib(drv_dsi_tx.o) + 0x00015436 0x00015436 0x0000001c Code RO 1927 i.drv_dsi_tx_response_mode CVWL368.lib(drv_dsi_tx.o) + 0x00015452 0x00015452 0x00000018 Code RO 1930 i.drv_dsi_tx_set_bta_ack CVWL368.lib(drv_dsi_tx.o) + 0x0001546a 0x0001546a 0x0000000c Code RO 1931 i.drv_dsi_tx_set_esc_div CVWL368.lib(drv_dsi_tx.o) + 0x00015476 0x00015476 0x00000002 PAD + 0x00015478 0x00015478 0x00000034 Code RO 1932 i.drv_dsi_tx_set_int CVWL368.lib(drv_dsi_tx.o) + 0x000154ac 0x000154ac 0x00000010 Code RO 1933 i.drv_dsi_tx_set_time_out_div CVWL368.lib(drv_dsi_tx.o) + 0x000154bc 0x000154bc 0x00000008 Code RO 1934 i.drv_dsi_tx_set_video_chunk CVWL368.lib(drv_dsi_tx.o) + 0x000154c4 0x000154c4 0x00000022 Code RO 1935 i.drv_dsi_tx_set_video_timing CVWL368.lib(drv_dsi_tx.o) + 0x000154e6 0x000154e6 0x00000008 Code RO 1937 i.drv_dsi_tx_shutdown CVWL368.lib(drv_dsi_tx.o) + 0x000154ee 0x000154ee 0x00000026 Code RO 1938 i.drv_dsi_tx_timeout_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00015514 0x00015514 0x000000aa Code RO 1941 i.drv_dsi_tx_video_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x000155be 0x000155be 0x00000016 Code RO 1942 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL368.lib(drv_dsi_tx.o) + 0x000155d4 0x000155d4 0x00000018 Code RO 1943 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL368.lib(drv_dsi_tx.o) + 0x000155ec 0x000155ec 0x00000020 Code RO 2605 i.drv_efuse_enter_inactive CVWL368.lib(drv_efuse.o) + 0x0001560c 0x0001560c 0x0000000c Code RO 2608 i.drv_efuse_int_enable CVWL368.lib(drv_efuse.o) + 0x00015618 0x00015618 0x00000032 Code RO 2609 i.drv_efuse_read CVWL368.lib(drv_efuse.o) + 0x0001564a 0x0001564a 0x00000018 Code RO 2610 i.drv_efuse_read_req CVWL368.lib(drv_efuse.o) + 0x00015662 0x00015662 0x00000002 PAD + 0x00015664 0x00015664 0x00000018 Code RO 1398 i.drv_gpio_get_input_data CVWL368.lib(drv_gpio.o) + 0x0001567c 0x0001567c 0x0000000c Code RO 1400 i.drv_gpio_register_ap_reset_callback CVWL368.lib(drv_gpio.o) + 0x00015688 0x00015688 0x00000014 Code RO 1401 i.drv_gpio_register_callback CVWL368.lib(drv_gpio.o) + 0x0001569c 0x0001569c 0x00000044 Code RO 1403 i.drv_gpio_set_int CVWL368.lib(drv_gpio.o) + 0x000156e0 0x000156e0 0x00000020 Code RO 1404 i.drv_gpio_set_ioe CVWL368.lib(drv_gpio.o) + 0x00015700 0x00015700 0x00000010 Code RO 1405 i.drv_gpio_set_mode0 CVWL368.lib(drv_gpio.o) + 0x00015710 0x00015710 0x00000010 Code RO 1406 i.drv_gpio_set_mode1 CVWL368.lib(drv_gpio.o) + 0x00015720 0x00015720 0x00000010 Code RO 1407 i.drv_gpio_set_mode2 CVWL368.lib(drv_gpio.o) + 0x00015730 0x00015730 0x00000010 Code RO 1408 i.drv_gpio_set_mode3 CVWL368.lib(drv_gpio.o) + 0x00015740 0x00015740 0x00000020 Code RO 651 i.drv_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x00015760 0x00015760 0x00000130 Code RO 1409 i.drv_gpio_set_pull_state CVWL368.lib(drv_gpio.o) + 0x00015890 0x00015890 0x00000034 Code RO 1441 i.drv_i2c_dma_callback CVWL368.lib(drv_i2c_dma.o) + 0x000158c4 0x000158c4 0x000000ac Code RO 1442 i.drv_i2c_dma_init CVWL368.lib(drv_i2c_dma.o) + 0x00015970 0x00015970 0x0000001a Code RO 1443 i.drv_i2c_enable_rx_dma CVWL368.lib(drv_i2c_dma.o) + 0x0001598a 0x0001598a 0x00000018 Code RO 1444 i.drv_i2c_enable_tx_dma CVWL368.lib(drv_i2c_dma.o) + 0x000159a2 0x000159a2 0x00000002 PAD + 0x000159a4 0x000159a4 0x00000060 Code RO 1468 i.drv_i2c_m_clear_it_pending_bit CVWL368.lib(drv_i2c_master.o) + 0x00015a04 0x00015a04 0x00000010 Code RO 1471 i.drv_i2c_m_enable CVWL368.lib(drv_i2c_master.o) + 0x00015a14 0x00015a14 0x00000038 Code RO 1472 i.drv_i2c_m_enable_intr CVWL368.lib(drv_i2c_master.o) + 0x00015a4c 0x00015a4c 0x0000000c Code RO 1475 i.drv_i2c_m_set_callback CVWL368.lib(drv_i2c_master.o) + 0x00015a58 0x00015a58 0x0000008c Code RO 1479 i.drv_i2c_master_init CVWL368.lib(drv_i2c_master.o) + 0x00015ae4 0x00015ae4 0x0000005c Code RO 1445 i.drv_i2c_master_read_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015b40 0x00015b40 0x0000003c Code RO 1446 i.drv_i2c_master_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015b7c 0x00015b7c 0x0000002e Code RO 1447 i.drv_i2c_master_write_read_cmd CVWL368.lib(drv_i2c_dma.o) + 0x00015baa 0x00015baa 0x00000002 PAD + 0x00015bac 0x00015bac 0x0000005c Code RO 1503 i.drv_i2c_s_clear_it_pending_bit CVWL368.lib(drv_i2c_slave.o) + 0x00015c08 0x00015c08 0x00000034 Code RO 1507 i.drv_i2c_s_enable_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015c3c 0x00015c3c 0x0000001c Code RO 1508 i.drv_i2c_s_get_fifo_status CVWL368.lib(drv_i2c_slave.o) + 0x00015c58 0x00015c58 0x0000000c Code RO 1511 i.drv_i2c_s_set_callback CVWL368.lib(drv_i2c_slave.o) + 0x00015c64 0x00015c64 0x00000020 Code RO 1514 i.drv_i2c_s_write_data CVWL368.lib(drv_i2c_slave.o) + 0x00015c84 0x00015c84 0x00000058 Code RO 1448 i.drv_i2c_set_dma_irq_callback CVWL368.lib(drv_i2c_dma.o) + 0x00015cdc 0x00015cdc 0x00000044 Code RO 1515 i.drv_i2c_slave_init CVWL368.lib(drv_i2c_slave.o) + 0x00015d20 0x00015d20 0x0000001c Code RO 1449 i.drv_i2c_slave_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015d3c 0x00015d3c 0x00000018 Code RO 2010 i.drv_lcdc_config_bypass CVWL368.lib(drv_lcdc.o) + 0x00015d54 0x00015d54 0x00000030 Code RO 2011 i.drv_lcdc_config_ccm CVWL368.lib(drv_lcdc.o) + 0x00015d84 0x00015d84 0x00000016 Code RO 2012 i.drv_lcdc_config_disp_mode CVWL368.lib(drv_lcdc.o) + 0x00015d9a 0x00015d9a 0x00000024 Code RO 2013 i.drv_lcdc_config_dpi_polarity CVWL368.lib(drv_lcdc.o) + 0x00015dbe 0x00015dbe 0x00000026 Code RO 2014 i.drv_lcdc_config_dpi_timing CVWL368.lib(drv_lcdc.o) + 0x00015de4 0x00015de4 0x00000016 Code RO 2015 i.drv_lcdc_config_edpi_mode CVWL368.lib(drv_lcdc.o) + 0x00015dfa 0x00015dfa 0x00000016 Code RO 2016 i.drv_lcdc_config_endianness CVWL368.lib(drv_lcdc.o) + 0x00015e10 0x00015e10 0x0000000c Code RO 2017 i.drv_lcdc_config_input_size CVWL368.lib(drv_lcdc.o) + 0x00015e1c 0x00015e1c 0x0000001e Code RO 2018 i.drv_lcdc_config_int CVWL368.lib(drv_lcdc.o) + 0x00015e3a 0x00015e3a 0x00000022 Code RO 2019 i.drv_lcdc_config_int_single CVWL368.lib(drv_lcdc.o) + 0x00015e5c 0x00015e5c 0x00000022 Code RO 2020 i.drv_lcdc_config_overwrite CVWL368.lib(drv_lcdc.o) + 0x00015e7e 0x00015e7e 0x0000000c Code RO 2021 i.drv_lcdc_config_overwrite_rgb CVWL368.lib(drv_lcdc.o) + 0x00015e8a 0x00015e8a 0x0000001a Code RO 2022 i.drv_lcdc_config_partial_display_area CVWL368.lib(drv_lcdc.o) + 0x00015ea4 0x00015ea4 0x00000022 Code RO 2023 i.drv_lcdc_config_partial_display_enable CVWL368.lib(drv_lcdc.o) + 0x00015ec6 0x00015ec6 0x0000001a Code RO 2025 i.drv_lcdc_config_scale_up_coef CVWL368.lib(drv_lcdc.o) + 0x00015ee0 0x00015ee0 0x0000000c Code RO 2026 i.drv_lcdc_config_scale_up_step CVWL368.lib(drv_lcdc.o) + 0x00015eec 0x00015eec 0x0000004c Code RO 2027 i.drv_lcdc_config_src_parameter CVWL368.lib(drv_lcdc.o) + 0x00015f38 0x00015f38 0x00000006 Code RO 2028 i.drv_lcdc_config_thresh CVWL368.lib(drv_lcdc.o) + 0x00015f3e 0x00015f3e 0x00000012 Code RO 2029 i.drv_lcdc_ctrl_flow CVWL368.lib(drv_lcdc.o) + 0x00015f50 0x00015f50 0x00000020 Code RO 2031 i.drv_lcdc_enable_shadow_reg CVWL368.lib(drv_lcdc.o) + 0x00015f70 0x00015f70 0x00000034 Code RO 2032 i.drv_lcdc_set_int CVWL368.lib(drv_lcdc.o) + 0x00015fa4 0x00015fa4 0x00000014 Code RO 2034 i.drv_lcdc_set_video_hw_mode CVWL368.lib(drv_lcdc.o) + 0x00015fb8 0x00015fb8 0x00000020 Code RO 2035 i.drv_lcdc_start CVWL368.lib(drv_lcdc.o) + 0x00015fd8 0x00015fd8 0x0000000c Code RO 2069 i.drv_memc_clear_status CVWL368.lib(drv_memc.o) + 0x00015fe4 0x00015fe4 0x00000040 Code RO 2070 i.drv_memc_enable_irq CVWL368.lib(drv_memc.o) + 0x00016024 0x00016024 0x0000000c Code RO 2071 i.drv_memc_gen_a_tear_signal CVWL368.lib(drv_memc.o) + 0x00016030 0x00016030 0x00000012 Code RO 2072 i.drv_memc_get_status CVWL368.lib(drv_memc.o) + 0x00016042 0x00016042 0x00000010 Code RO 2073 i.drv_memc_rate_transfer_sel CVWL368.lib(drv_memc.o) + 0x00016052 0x00016052 0x0000000e Code RO 2074 i.drv_memc_sel_vsync CVWL368.lib(drv_memc.o) + 0x00016060 0x00016060 0x00000014 Code RO 2075 i.drv_memc_set_active_height CVWL368.lib(drv_memc.o) + 0x00016074 0x00016074 0x0000000c Code RO 2076 i.drv_memc_set_data_mode CVWL368.lib(drv_memc.o) + 0x00016080 0x00016080 0x00000010 Code RO 2079 i.drv_memc_set_double_buffer CVWL368.lib(drv_memc.o) + 0x00016090 0x00016090 0x00000012 Code RO 2080 i.drv_memc_set_double_buffer_reverse CVWL368.lib(drv_memc.o) + 0x000160a2 0x000160a2 0x00000010 Code RO 2082 i.drv_memc_set_fs_en_conditions CVWL368.lib(drv_memc.o) + 0x000160b2 0x000160b2 0x00000014 Code RO 2083 i.drv_memc_set_inten CVWL368.lib(drv_memc.o) + 0x000160c6 0x000160c6 0x00000002 PAD + 0x000160c8 0x000160c8 0x00000018 Code RO 2084 i.drv_memc_set_lcdc_st_conditions CVWL368.lib(drv_memc.o) + 0x000160e0 0x000160e0 0x0000001a Code RO 2085 i.drv_memc_set_ltpo_mode CVWL368.lib(drv_memc.o) + 0x000160fa 0x000160fa 0x0000000e Code RO 2089 i.drv_memc_set_tear_mode CVWL368.lib(drv_memc.o) + 0x00016108 0x00016108 0x00000028 Code RO 2090 i.drv_memc_set_tear_waveform CVWL368.lib(drv_memc.o) + 0x00016130 0x00016130 0x0000000e Code RO 2092 i.drv_memc_set_vidc_sync_cnt CVWL368.lib(drv_memc.o) + 0x0001613e 0x0001613e 0x00000002 PAD + 0x00016140 0x00016140 0x00000008 Code RO 1537 i.drv_param_init_get_ccm CVWL368.lib(drv_param_init.o) + 0x00016148 0x00016148 0x00000014 Code RO 1538 i.drv_param_init_get_scld_filter_h CVWL368.lib(drv_param_init.o) + 0x0001615c 0x0001615c 0x00000014 Code RO 1539 i.drv_param_init_get_scld_filter_v CVWL368.lib(drv_param_init.o) + 0x00016170 0x00016170 0x00000008 Code RO 1540 i.drv_param_init_get_sclu_filter CVWL368.lib(drv_param_init.o) + 0x00016178 0x00016178 0x00000014 Code RO 1541 i.drv_param_init_set_ccm CVWL368.lib(drv_param_init.o) + 0x0001618c 0x0001618c 0x00000024 Code RO 1544 i.drv_param_p2r_filter_init CVWL368.lib(drv_param_init.o) + 0x000161b0 0x000161b0 0x00000010 Code RO 2341 i.drv_phy_enable_calibration CVWL368.lib(drv_phy_common.o) + 0x000161c0 0x000161c0 0x0000003c Code RO 2342 i.drv_phy_get_calibration CVWL368.lib(drv_phy_common.o) + 0x000161fc 0x000161fc 0x00000060 Code RO 2343 i.drv_phy_get_pll_para CVWL368.lib(drv_phy_common.o) + 0x0001625c 0x0001625c 0x00000054 Code RO 2344 i.drv_phy_get_rate_para CVWL368.lib(drv_phy_common.o) + 0x000162b0 0x000162b0 0x00000010 Code RO 2345 i.drv_phy_test_clear CVWL368.lib(drv_phy_common.o) + 0x000162c0 0x000162c0 0x00000018 Code RO 2346 i.drv_phy_test_lock CVWL368.lib(drv_phy_common.o) + 0x000162d8 0x000162d8 0x00000020 Code RO 2348 i.drv_phy_test_write_1_byte CVWL368.lib(drv_phy_common.o) + 0x000162f8 0x000162f8 0x00000026 Code RO 2349 i.drv_phy_test_write_2_byte CVWL368.lib(drv_phy_common.o) + 0x0001631e 0x0001631e 0x0000001e Code RO 2350 i.drv_phy_test_write_code CVWL368.lib(drv_phy_common.o) + 0x0001633c 0x0001633c 0x00000020 Code RO 2351 i.drv_phy_test_write_data CVWL368.lib(drv_phy_common.o) + 0x0001635c 0x0001635c 0x00000020 Code RO 1569 i.drv_pwm_out_enable CVWL368.lib(drv_pwm.o) + 0x0001637c 0x0001637c 0x0000000c Code RO 1572 i.drv_pwm_out_set_control CVWL368.lib(drv_pwm.o) + 0x00016388 0x00016388 0x0000000c Code RO 1573 i.drv_pwm_out_set_period CVWL368.lib(drv_pwm.o) + 0x00016394 0x00016394 0x0000000c Code RO 1575 i.drv_pwm_out_set_threshold CVWL368.lib(drv_pwm.o) + 0x000163a0 0x000163a0 0x00000020 Code RO 1599 i.drv_pwr_set_cp_mode CVWL368.lib(drv_pwr.o) + 0x000163c0 0x000163c0 0x00000018 Code RO 1600 i.drv_pwr_set_pvd_mode CVWL368.lib(drv_pwr.o) + 0x000163d8 0x000163d8 0x00000038 Code RO 1601 i.drv_pwr_set_system_clk_src CVWL368.lib(drv_pwr.o) + 0x00016410 0x00016410 0x0000000c Code RO 1861 i.drv_rx_phy_test_clear CVWL368.lib(drv_dsi_rx.o) + 0x0001641c 0x0001641c 0x00000010 Code RO 1862 i.drv_rx_phy_test_lock CVWL368.lib(drv_dsi_rx.o) + 0x0001642c 0x0001642c 0x00000014 Code RO 1864 i.drv_rx_phy_test_write_1_byte CVWL368.lib(drv_dsi_rx.o) + 0x00016440 0x00016440 0x00000016 Code RO 1865 i.drv_rx_phy_test_write_2_byte CVWL368.lib(drv_dsi_rx.o) + 0x00016456 0x00016456 0x0000000a Code RO 2128 i.drv_rxbr_clear_pkt_buffer CVWL368.lib(drv_rxbr.o) + 0x00016460 0x00016460 0x00000004 Code RO 2129 i.drv_rxbr_clear_status0 CVWL368.lib(drv_rxbr.o) + 0x00016464 0x00016464 0x0000005a Code RO 2131 i.drv_rxbr_enable_irq CVWL368.lib(drv_rxbr.o) + 0x000164be 0x000164be 0x00000002 PAD + 0x000164c0 0x000164c0 0x00000014 Code RO 2132 i.drv_rxbr_frame_drop_cfg CVWL368.lib(drv_rxbr.o) + 0x000164d4 0x000164d4 0x0000003c Code RO 2133 i.drv_rxbr_get_clk CVWL368.lib(drv_rxbr.o) + 0x00016510 0x00016510 0x00000004 Code RO 2134 i.drv_rxbr_get_col_addr CVWL368.lib(drv_rxbr.o) + 0x00016514 0x00016514 0x00000012 Code RO 1759 i.drv_rxbr_get_int_source CVWL368.lib(hal_internal_vsync.o) + 0x00016526 0x00016526 0x00000004 Code RO 2137 i.drv_rxbr_get_page_addr CVWL368.lib(drv_rxbr.o) + 0x0001652a 0x0001652a 0x00000012 Code RO 1760 i.drv_rxbr_get_status0 CVWL368.lib(hal_internal_vsync.o) + 0x0001653c 0x0001653c 0x0000000c Code RO 2139 i.drv_rxbr_hline_rcv0_cfg CVWL368.lib(drv_rxbr.o) + 0x00016548 0x00016548 0x00000008 Code RO 2140 i.drv_rxbr_hline_rcv_cfg CVWL368.lib(drv_rxbr.o) + 0x00016550 0x00016550 0x0000000c Code RO 2141 i.drv_rxbr_register_irq0_callback CVWL368.lib(drv_rxbr.o) + 0x0001655c 0x0001655c 0x0000000c Code RO 2142 i.drv_rxbr_register_irq1_callback CVWL368.lib(drv_rxbr.o) + 0x00016568 0x00016568 0x00000014 Code RO 2143 i.drv_rxbr_set_ack_pkt_header CVWL368.lib(drv_rxbr.o) + 0x0001657c 0x0001657c 0x000000cc Code RO 2144 i.drv_rxbr_set_cmd_filter CVWL368.lib(drv_rxbr.o) + 0x00016648 0x00016648 0x00000014 Code RO 2146 i.drv_rxbr_set_color_format CVWL368.lib(drv_rxbr.o) + 0x0001665c 0x0001665c 0x00000014 Code RO 2148 i.drv_rxbr_set_inten CVWL368.lib(drv_rxbr.o) + 0x00016670 0x00016670 0x00000010 Code RO 2149 i.drv_rxbr_set_ltpo_drop_th CVWL368.lib(drv_rxbr.o) + 0x00016680 0x00016680 0x00000026 Code RO 2151 i.drv_rxbr_set_usr_cfg CVWL368.lib(drv_rxbr.o) + 0x000166a6 0x000166a6 0x00000008 Code RO 2152 i.drv_rxbr_set_usr_col CVWL368.lib(drv_rxbr.o) + 0x000166ae 0x000166ae 0x00000008 Code RO 2153 i.drv_rxbr_set_usr_row CVWL368.lib(drv_rxbr.o) + 0x000166b6 0x000166b6 0x00000002 PAD + 0x000166b8 0x000166b8 0x00000020 Code RO 1645 i.drv_spi_m_read_data CVWL368.lib(drv_spi_master.o) + 0x000166d8 0x000166d8 0x0000001c Code RO 1670 i.drv_swire_enable CVWL368.lib(drv_swire.o) + 0x000166f4 0x000166f4 0x00000048 Code RO 1673 i.drv_swire_set_int CVWL368.lib(drv_swire.o) + 0x0001673c 0x0001673c 0x0000001c Code RO 1674 i.drv_swire_set_power_down CVWL368.lib(drv_swire.o) + 0x00016758 0x00016758 0x0000000c Code RO 1689 i.drv_sys_cfg_clear_all_int CVWL368.lib(drv_sys_cfg.o) + 0x00016764 0x00016764 0x00000028 Code RO 1690 i.drv_sys_cfg_clear_pending CVWL368.lib(drv_sys_cfg.o) + 0x0001678c 0x0001678c 0x00000018 Code RO 1693 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL368.lib(drv_sys_cfg.o) + 0x000167a4 0x000167a4 0x0000001c Code RO 1694 i.drv_sys_cfg_sel_ap_rst_trig CVWL368.lib(drv_sys_cfg.o) + 0x000167c0 0x000167c0 0x00000024 Code RO 1695 i.drv_sys_cfg_sel_gpio_group CVWL368.lib(drv_sys_cfg.o) + 0x000167e4 0x000167e4 0x00000024 Code RO 1696 i.drv_sys_cfg_sel_int_trig CVWL368.lib(drv_sys_cfg.o) + 0x00016808 0x00016808 0x00000010 Code RO 1698 i.drv_sys_cfg_set_dma_rx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016818 0x00016818 0x00000010 Code RO 1699 i.drv_sys_cfg_set_dma_tx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016828 0x00016828 0x00000024 Code RO 1700 i.drv_sys_cfg_set_int CVWL368.lib(drv_sys_cfg.o) + 0x0001684c 0x0001684c 0x0000001a Code RO 1723 i.drv_timer_clear_status_flags CVWL368.lib(drv_timer.o) + 0x00016866 0x00016866 0x00000020 Code RO 1724 i.drv_timer_enable CVWL368.lib(drv_timer.o) + 0x00016886 0x00016886 0x00000002 PAD + 0x00016888 0x00016888 0x00000010 Code RO 1725 i.drv_timer_get_instance CVWL368.lib(drv_timer.o) + 0x00016898 0x00016898 0x00000010 Code RO 1726 i.drv_timer_get_prescaler CVWL368.lib(drv_timer.o) + 0x000168a8 0x000168a8 0x0000003c Code RO 1728 i.drv_timer_handle_interrupt CVWL368.lib(drv_timer.o) + 0x000168e4 0x000168e4 0x00000014 Code RO 1729 i.drv_timer_register_callback CVWL368.lib(drv_timer.o) + 0x000168f8 0x000168f8 0x00000010 Code RO 1730 i.drv_timer_set_compare_val CVWL368.lib(drv_timer.o) + 0x00016908 0x00016908 0x00000048 Code RO 1731 i.drv_timer_set_int CVWL368.lib(drv_timer.o) + 0x00016950 0x00016950 0x00000028 Code RO 1732 i.drv_timer_set_prescaler CVWL368.lib(drv_timer.o) + 0x00016978 0x00016978 0x00000010 Code RO 1733 i.drv_timer_set_repeat CVWL368.lib(drv_timer.o) + 0x00016988 0x00016988 0x0000000a Code RO 1944 i.drv_tx_phy_test_clear CVWL368.lib(drv_dsi_tx.o) + 0x00016992 0x00016992 0x0000001c Code RO 1945 i.drv_tx_phy_test_enter CVWL368.lib(drv_dsi_tx.o) + 0x000169ae 0x000169ae 0x0000001c Code RO 1946 i.drv_tx_phy_test_exit CVWL368.lib(drv_dsi_tx.o) + 0x000169ca 0x000169ca 0x00000012 Code RO 1948 i.drv_tx_phy_test_write_1_byte CVWL368.lib(drv_dsi_tx.o) + 0x000169dc 0x000169dc 0x00000014 Code RO 1949 i.drv_tx_phy_test_write_2_byte CVWL368.lib(drv_dsi_tx.o) + 0x000169f0 0x000169f0 0x00000010 Code RO 1950 i.drv_tx_phy_test_write_code CVWL368.lib(drv_dsi_tx.o) + 0x00016a00 0x00016a00 0x00000008 Code RO 2192 i.drv_vidc_clear_irq CVWL368.lib(drv_vidc.o) + 0x00016a08 0x00016a08 0x00000018 Code RO 2196 i.drv_vidc_enable CVWL368.lib(drv_vidc.o) + 0x00016a20 0x00016a20 0x00000040 Code RO 2197 i.drv_vidc_enable_irq CVWL368.lib(drv_vidc.o) + 0x00016a60 0x00016a60 0x00000012 Code RO 2199 i.drv_vidc_get_irq_status CVWL368.lib(drv_vidc.o) + 0x00016a72 0x00016a72 0x00000002 PAD + 0x00016a74 0x00016a74 0x00000028 Code RO 2203 i.drv_vidc_init_module_enable CVWL368.lib(drv_vidc.o) + 0x00016a9c 0x00016a9c 0x0000000c Code RO 2204 i.drv_vidc_register_callback CVWL368.lib(drv_vidc.o) + 0x00016aa8 0x00016aa8 0x00000006 Code RO 2205 i.drv_vidc_reset CVWL368.lib(drv_vidc.o) + 0x00016aae 0x00016aae 0x0000003c Code RO 2207 i.drv_vidc_set_dst_parameter CVWL368.lib(drv_vidc.o) + 0x00016aea 0x00016aea 0x00000014 Code RO 2211 i.drv_vidc_set_irqen CVWL368.lib(drv_vidc.o) + 0x00016afe 0x00016afe 0x00000010 Code RO 2212 i.drv_vidc_set_mirror CVWL368.lib(drv_vidc.o) + 0x00016b0e 0x00016b0e 0x00000008 Code RO 2215 i.drv_vidc_set_p2r_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016b16 0x00016b16 0x00000026 Code RO 2216 i.drv_vidc_set_p2r_hinitb CVWL368.lib(drv_vidc.o) + 0x00016b3c 0x00016b3c 0x00000026 Code RO 2217 i.drv_vidc_set_p2r_hinitr CVWL368.lib(drv_vidc.o) + 0x00016b62 0x00016b62 0x00000002 PAD + 0x00016b64 0x00016b64 0x00000018 Code RO 2218 i.drv_vidc_set_pentile_swap CVWL368.lib(drv_vidc.o) + 0x00016b7c 0x00016b7c 0x0000000a Code RO 2219 i.drv_vidc_set_pu_ctrl CVWL368.lib(drv_vidc.o) + 0x00016b86 0x00016b86 0x00000010 Code RO 2220 i.drv_vidc_set_rotation CVWL368.lib(drv_vidc.o) + 0x00016b96 0x00016b96 0x0000000a Code RO 2221 i.drv_vidc_set_scld_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016ba0 0x00016ba0 0x0000000a Code RO 2222 i.drv_vidc_set_scld_hcoef1 CVWL368.lib(drv_vidc.o) + 0x00016baa 0x00016baa 0x00000012 Code RO 2223 i.drv_vidc_set_scld_step CVWL368.lib(drv_vidc.o) + 0x00016bbc 0x00016bbc 0x0000000a Code RO 2224 i.drv_vidc_set_scld_vcoef0 CVWL368.lib(drv_vidc.o) + 0x00016bc6 0x00016bc6 0x0000000a Code RO 2225 i.drv_vidc_set_scld_vcoef1 CVWL368.lib(drv_vidc.o) + 0x00016bd0 0x00016bd0 0x00000016 Code RO 2226 i.drv_vidc_set_src_parameter CVWL368.lib(drv_vidc.o) + 0x00016be6 0x00016be6 0x00000002 PAD + 0x00016be8 0x00016be8 0x00000010 Code RO 2580 i.drv_wdg_clear_counter CVWL368.lib(drv_wdg.o) + 0x00016bf8 0x00016bf8 0x00000010 Code RO 2581 i.drv_wdg_clear_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016c08 0x00016c08 0x00000010 Code RO 2584 i.drv_wdg_read_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016c18 0x00016c18 0x00000034 Code RO 2587 i.drv_wdg_set_int CVWL368.lib(drv_wdg.o) + 0x00016c4c 0x00016c4c 0x0000000a Code RO 1310 i.fls_clr_interrupt_flag CVWL368.lib(drv_fls.o) + 0x00016c56 0x00016c56 0x00000014 Code RO 895 i.fputc CVWL368.lib(tau_log.o) + 0x00016c6a 0x00016c6a 0x00000002 PAD + 0x00016c6c 0x00016c6c 0x00000030 Code RO 470 i.hal_dsi_rx_ctrl_create_handle CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016c9c 0x00016c9c 0x0000009c Code RO 472 i.hal_dsi_rx_ctrl_deinit CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016d38 0x00016d38 0x00000084 Code RO 474 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016dbc 0x00016dbc 0x00000028 Code RO 476 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016de4 0x00016de4 0x00000028 Code RO 478 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e0c 0x00016e0c 0x00000060 Code RO 480 i.hal_dsi_rx_ctrl_init CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e6c 0x00016e6c 0x00000130 Code RO 481 i.hal_dsi_rx_ctrl_init_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016f9c 0x00016f9c 0x000000d4 Code RO 482 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017070 0x00017070 0x0000013c Code RO 483 i.hal_dsi_rx_ctrl_init_memc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000171ac 0x000171ac 0x00000130 Code RO 484 i.hal_dsi_rx_ctrl_init_rxbr CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000172dc 0x000172dc 0x0000022c Code RO 485 i.hal_dsi_rx_ctrl_init_vidc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017508 0x00017508 0x0000001c Code RO 486 i.hal_dsi_rx_ctrl_pre_init_pps CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017524 0x00017524 0x000000f0 Code RO 489 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017614 0x00017614 0x0000002c Code RO 491 i.hal_dsi_rx_ctrl_set_cus_esc_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017640 0x00017640 0x00000034 Code RO 493 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017674 0x00017674 0x00000034 Code RO 496 i.hal_dsi_rx_ctrl_set_hw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000176a8 0x000176a8 0x00000038 Code RO 497 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000176e0 0x000176e0 0x00000072 Code RO 501 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017752 0x00017752 0x00000002 PAD + 0x00017754 0x00017754 0x00000034 Code RO 502 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017788 0x00017788 0x0000003c Code RO 505 i.hal_dsi_rx_ctrl_start CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000177c4 0x000177c4 0x0000003c Code RO 506 i.hal_dsi_rx_ctrl_stop CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017800 0x00017800 0x00000020 Code RO 508 i.hal_dsi_rx_ctrl_toggle_resolution CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017820 0x00017820 0x00000190 Code RO 559 i.hal_dsi_tx_calc_video_chunks CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000179b0 0x000179b0 0x00000034 Code RO 560 i.hal_dsi_tx_config_params_for_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000179e4 0x000179e4 0x000004d0 Code RO 561 i.hal_dsi_tx_count_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017eb4 0x00017eb4 0x0000002c Code RO 563 i.hal_dsi_tx_ctrl_create_handle CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017ee0 0x00017ee0 0x00000048 Code RO 564 i.hal_dsi_tx_ctrl_deinit CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f28 0x00017f28 0x0000004c Code RO 565 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f74 0x00017f74 0x00000028 Code RO 567 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f9c 0x00017f9c 0x000000c4 Code RO 569 i.hal_dsi_tx_ctrl_init CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018060 0x00018060 0x00000024 Code RO 570 i.hal_dsi_tx_ctrl_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018084 0x00018084 0x0000000c Code RO 571 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018090 0x00018090 0x00000020 Code RO 574 i.hal_dsi_tx_ctrl_set_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180b0 0x000180b0 0x00000014 Code RO 580 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180c4 0x000180c4 0x00000010 Code RO 581 i.hal_dsi_tx_ctrl_set_partial_disp CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180d4 0x000180d4 0x00000024 Code RO 582 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180f8 0x000180f8 0x0000006c Code RO 584 i.hal_dsi_tx_ctrl_start CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018164 0x00018164 0x00000044 Code RO 585 i.hal_dsi_tx_ctrl_stop CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181a8 0x000181a8 0x000000d8 Code RO 586 i.hal_dsi_tx_ctrl_write_array_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018280 0x00018280 0x000000b0 Code RO 587 i.hal_dsi_tx_ctrl_write_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018330 0x00018330 0x00000044 Code RO 588 i.hal_dsi_tx_init_data_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018374 0x00018374 0x00000030 Code RO 589 i.hal_dsi_tx_init_dpi_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000183a4 0x000183a4 0x00000020 Code RO 590 i.hal_dsi_tx_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000183c4 0x000183c4 0x00000020 Code RO 591 i.hal_dsi_tx_init_phy_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000183e4 0x000183e4 0x00000094 Code RO 592 i.hal_dsi_tx_init_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018478 0x00018478 0x00000058 Code RO 593 i.hal_dsi_tx_init_video_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000184d0 0x000184d0 0x00000044 Code RO 594 i.hal_dsi_tx_send_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018514 0x00018514 0x00000018 Code RO 652 i.hal_gpio_ctrl_eint CVWL368.lib(hal_gpio.o) + 0x0001852c 0x0001852c 0x00000012 Code RO 653 i.hal_gpio_get_input_data CVWL368.lib(hal_gpio.o) + 0x0001853e 0x0001853e 0x00000002 PAD + 0x00018540 0x00018540 0x00000040 Code RO 656 i.hal_gpio_init_eint CVWL368.lib(hal_gpio.o) + 0x00018580 0x00018580 0x00000020 Code RO 657 i.hal_gpio_init_input CVWL368.lib(hal_gpio.o) + 0x000185a0 0x000185a0 0x00000028 Code RO 658 i.hal_gpio_init_output CVWL368.lib(hal_gpio.o) + 0x000185c8 0x000185c8 0x00000018 Code RO 659 i.hal_gpio_reg_eint_cb CVWL368.lib(hal_gpio.o) + 0x000185e0 0x000185e0 0x00000050 Code RO 660 i.hal_gpio_set_ap_reset_int CVWL368.lib(hal_gpio.o) + 0x00018630 0x00018630 0x00000060 Code RO 662 i.hal_gpio_set_mode CVWL368.lib(hal_gpio.o) + 0x00018690 0x00018690 0x00000008 Code RO 663 i.hal_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x00018698 0x00018698 0x00000020 Code RO 665 i.hal_gpio_set_pull_state CVWL368.lib(hal_gpio.o) + 0x000186b8 0x000186b8 0x0000006c Code RO 691 i.hal_i2c_m_dma_init CVWL368.lib(hal_i2c_master.o) + 0x00018724 0x00018724 0x00000020 Code RO 692 i.hal_i2c_m_dma_read CVWL368.lib(hal_i2c_master.o) + 0x00018744 0x00018744 0x0000001c Code RO 693 i.hal_i2c_m_dma_write CVWL368.lib(hal_i2c_master.o) + 0x00018760 0x00018760 0x0000000c Code RO 695 i.hal_i2c_m_transfer_complate CVWL368.lib(hal_i2c_master.o) + 0x0001876c 0x0001876c 0x00000020 Code RO 696 i.hal_i2c_master_irq_callback CVWL368.lib(hal_i2c_master.o) + 0x0001878c 0x0001878c 0x00000010 Code RO 710 i.hal_i2c_s_dma_user_callback CVWL368.lib(hal_i2c_slave.o) + 0x0001879c 0x0001879c 0x00000038 Code RO 711 i.hal_i2c_s_dma_write CVWL368.lib(hal_i2c_slave.o) + 0x000187d4 0x000187d4 0x0000006c Code RO 713 i.hal_i2c_s_init CVWL368.lib(hal_i2c_slave.o) + 0x00018840 0x00018840 0x00000014 Code RO 714 i.hal_i2c_s_nonblocking_read CVWL368.lib(hal_i2c_slave.o) + 0x00018854 0x00018854 0x0000000c Code RO 721 i.hal_i2c_s_set_transfer CVWL368.lib(hal_i2c_slave.o) + 0x00018860 0x00018860 0x0000014c Code RO 724 i.hal_i2c_slave_irq_callback CVWL368.lib(hal_i2c_slave.o) + 0x000189ac 0x000189ac 0x000000e4 Code RO 1762 i.hal_internal_init_memc CVWL368.lib(hal_internal_vsync.o) + 0x00018a90 0x00018a90 0x00000010 Code RO 1763 i.hal_internal_sync_get_fb_setting CVWL368.lib(hal_internal_vsync.o) + 0x00018aa0 0x00018aa0 0x00000214 Code RO 1764 i.hal_internal_sync_input_resolution_change CVWL368.lib(hal_internal_vsync.o) + 0x00018cb4 0x00018cb4 0x0000001c Code RO 1766 i.hal_internal_vsync_deinit CVWL368.lib(hal_internal_vsync.o) + 0x00018cd0 0x00018cd0 0x0000000c Code RO 1767 i.hal_internal_vsync_get_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018cdc 0x00018cdc 0x00000018 Code RO 1768 i.hal_internal_vsync_get_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00018cf4 0x00018cf4 0x0000000c Code RO 1769 i.hal_internal_vsync_get_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018d00 0x00018d00 0x000000fc Code RO 1770 i.hal_internal_vsync_init_rx CVWL368.lib(hal_internal_vsync.o) + 0x00018dfc 0x00018dfc 0x000000b0 Code RO 1771 i.hal_internal_vsync_init_tx CVWL368.lib(hal_internal_vsync.o) + 0x00018eac 0x00018eac 0x0000011c Code RO 1772 i.hal_internal_vsync_set_auto_hw_filter CVWL368.lib(hal_internal_vsync.o) + 0x00018fc8 0x00018fc8 0x00000014 Code RO 1774 i.hal_internal_vsync_set_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018fdc 0x00018fdc 0x0000001c Code RO 1775 i.hal_internal_vsync_set_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00018ff8 0x00018ff8 0x00000048 Code RO 1776 i.hal_internal_vsync_set_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x00019040 0x00019040 0x00000040 Code RO 1777 i.hal_internal_vsync_set_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00019080 0x00019080 0x00000024 Code RO 595 i.hal_lcdc_config_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000190a4 0x000190a4 0x00000048 Code RO 596 i.hal_lcdc_config_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000190ec 0x000190ec 0x00000014 Code RO 597 i.hal_lcdc_config_rgb_to_pentile CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019100 0x00019100 0x00000164 Code RO 598 i.hal_lcdc_config_upscaler CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019264 0x00019264 0x00000040 Code RO 599 i.hal_lcdc_init_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000192a4 0x000192a4 0x00000180 Code RO 600 i.hal_lcdc_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019424 0x00019424 0x00000040 Code RO 601 i.hal_lcdc_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019464 0x00019464 0x00000068 Code RO 757 i.hal_pwm_out_config_all CVWL368.lib(hal_pwm.o) + 0x000194cc 0x000194cc 0x0000000c Code RO 759 i.hal_pwm_out_init CVWL368.lib(hal_pwm.o) + 0x000194d8 0x000194d8 0x0000000e Code RO 793 i.hal_spi_m_clear_rxfifo CVWL368.lib(hal_spi_master.o) + 0x000194e6 0x000194e6 0x00000012 Code RO 817 i.hal_swire_deinit CVWL368.lib(hal_swire.o) + 0x000194f8 0x000194f8 0x00000016 Code RO 819 i.hal_swire_open CVWL368.lib(hal_swire.o) + 0x0001950e 0x0001950e 0x00000008 Code RO 833 i.hal_system_enable_systick CVWL368.lib(hal_system.o) + 0x00019516 0x00019516 0x00000002 PAD + 0x00019518 0x00019518 0x00000088 Code RO 838 i.hal_system_init CVWL368.lib(hal_system.o) + 0x000195a0 0x000195a0 0x0000001c Code RO 839 i.hal_system_init_console CVWL368.lib(hal_system.o) + 0x000195bc 0x000195bc 0x00000008 Code RO 842 i.hal_system_set_phy_calibration CVWL368.lib(hal_system.o) + 0x000195c4 0x000195c4 0x00000008 Code RO 843 i.hal_system_set_pvd CVWL368.lib(hal_system.o) + 0x000195cc 0x000195cc 0x00000008 Code RO 844 i.hal_system_set_vcc CVWL368.lib(hal_system.o) + 0x000195d4 0x000195d4 0x0000002e Code RO 867 i.hal_timer_deinit CVWL368.lib(hal_timer.o) + 0x00019602 0x00019602 0x0000001a Code RO 869 i.hal_timer_init CVWL368.lib(hal_timer.o) + 0x0001961c 0x0001961c 0x00000048 Code RO 871 i.hal_timer_start CVWL368.lib(hal_timer.o) + 0x00019664 0x00019664 0x00000028 Code RO 873 i.hal_timer_stop CVWL368.lib(hal_timer.o) + 0x0001968c 0x0001968c 0x0000008c Code RO 1038 i.hal_uart_init CVWL368.lib(hal_uart.o) + 0x00019718 0x00019718 0x00000010 Code RO 1041 i.hal_uart_transmit_blocking CVWL368.lib(hal_uart.o) + 0x00019728 0x00019728 0x00000110 Code RO 2302 i.handle_init CVWL368.lib(irq_redirect .o) + 0x00019838 0x00019838 0x000000d4 Code RO 114 i.init_mipi_tx ap_demo.o + 0x0001990c 0x0001990c 0x00000060 Code RO 115 i.init_panel ap_demo.o + 0x0001996c 0x0001996c 0x00000010 Code RO 3 i.main main.o + 0x0001997c 0x0001997c 0x0000010c Code RO 116 i.open_mipi_rx ap_demo.o + 0x00019a88 0x00019a88 0x00000090 Code RO 117 i.pps_update_handle ap_demo.o + 0x00019b18 0x00019b18 0x000003f4 Code RO 1778 i.rx_get_dcs_packet_data CVWL368.lib(hal_internal_vsync.o) + 0x00019f0c 0x00019f0c 0x00000164 Code RO 1779 i.rx_partial_update CVWL368.lib(hal_internal_vsync.o) + 0x0001a070 0x0001a070 0x0000008c Code RO 1780 i.rx_receive_packet CVWL368.lib(hal_internal_vsync.o) + 0x0001a0fc 0x0001a0fc 0x00000180 Code RO 1781 i.rx_receive_pps CVWL368.lib(hal_internal_vsync.o) + 0x0001a27c 0x0001a27c 0x000000a4 Code RO 1782 i.rxbr_irq0_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a320 0x0001a320 0x00000170 Code RO 1783 i.rxbr_irq1_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a490 0x0001a490 0x0000003a Code RO 118 i.send_panel_init_code ap_demo.o + 0x0001a4ca 0x0001a4ca 0x00000002 PAD + 0x0001a4cc 0x0001a4cc 0x0000008c Code RO 1784 i.soft_gen_te CVWL368.lib(hal_internal_vsync.o) + 0x0001a558 0x0001a558 0x00000038 Code RO 119 i.soft_te_timer_cb ap_demo.o + 0x0001a590 0x0001a590 0x00000060 Code RO 120 i.soft_te_timer_init ap_demo.o + 0x0001a5f0 0x0001a5f0 0x0000003c Code RO 121 i.soft_timer3_cb ap_demo.o + 0x0001a62c 0x0001a62c 0x00000048 Code RO 2629 i.sqrt m_ps.l(sqrt.o) + 0x0001a674 0x0001a674 0x000006d8 Code RO 122 i.translate_data ap_demo.o + 0x0001ad4c 0x0001ad4c 0x00000020 Code RO 123 i.tx_display_on ap_demo.o + 0x0001ad6c 0x0001ad6c 0x00000028 Code RO 124 i.tx_panel_reset ap_demo.o + 0x0001ad94 0x0001ad94 0x000000e8 Code RO 1785 i.vidc_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001ae7c 0x0001ae7c 0x000000d0 Code RO 1786 i.vpre_err_reset CVWL368.lib(hal_internal_vsync.o) + 0x0001af4c 0x0001af4c 0x0000019c Code RO 1787 i.vsync_set_te_mode CVWL368.lib(hal_internal_vsync.o) + 0x0001b0e8 0x0001b0e8 0x000024b4 Data RO 125 .constdata ap_demo.o + 0x0001d59c 0x0001d59c 0x000000d2 Data RO 668 .constdata CVWL368.lib(hal_gpio.o) + 0x0001d66e 0x0001d66e 0x00001fde Data RO 907 .constdata CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x0001f64c 0x0001f64c 0x00000001 Data RO 922 .constdata CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x0001f64d 0x0001f64d 0x00000003 PAD + 0x0001f650 0x0001f650 0x00000008 Data RO 1545 .constdata CVWL368.lib(drv_param_init.o) + 0x0001f658 0x0001f658 0x00000186 Data RO 2352 .constdata CVWL368.lib(drv_phy_common.o) + 0x0001f7de 0x0001f7de 0x00000002 PAD + 0x0001f7e0 0x0001f7e0 0x00000048 Data RO 510 .conststring CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001f828 0x0001f828 0x00000134 Data RO 1789 .conststring CVWL368.lib(hal_internal_vsync.o) + 0x0001f95c 0x0001f95c 0x00000030 Data RO 2991 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001f98c, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001f98c, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2303 .ARM.__AT_0x00070100 CVWL368.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001f98c, Size: 0x00003700, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x000003f4]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x00000038 Data RW 126 .data ap_demo.o + 0x00070208 COMPRESSED 0x00000049 Data RW 311 .data app_tp_transfer.o + 0x00070251 COMPRESSED 0x00000003 PAD + 0x00070254 COMPRESSED 0x00000008 Data RW 511 .data CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0007025c COMPRESSED 0x00000001 Data RW 603 .data CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0007025d COMPRESSED 0x00000001 Data RW 697 .data CVWL368.lib(hal_i2c_master.o) + 0x0007025e COMPRESSED 0x00000002 PAD + 0x00070260 COMPRESSED 0x0000001c Data RW 725 .data CVWL368.lib(hal_i2c_slave.o) + 0x0007027c COMPRESSED 0x000000e6 Data RW 923 .data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x00070362 COMPRESSED 0x00000001 Data RW 926 .data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x00070363 COMPRESSED 0x00000001 Data RW 927 .data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x00070364 COMPRESSED 0x00000001 Data RW 932 .data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x00070365 COMPRESSED 0x00000003 Data RW 933 .data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x00070368 COMPRESSED 0x00000005 Data RW 934 .data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x0007036d COMPRESSED 0x00000003 PAD + 0x00070370 COMPRESSED 0x00000030 Data RW 944 .data CVWL368_NOTE10_TP.lib(app_tp_for_custom_s8.o) + 0x000703a0 COMPRESSED 0x00000012 Data RW 1095 .data CVWL368.lib(norflash.o) + 0x000703b2 COMPRESSED 0x00000002 PAD + 0x000703b4 COMPRESSED 0x0000000c Data RW 1148 .data CVWL368.lib(drv_common.o) + 0x000703c0 COMPRESSED 0x00000004 Data RW 1413 .data CVWL368.lib(drv_gpio.o) + 0x000703c4 COMPRESSED 0x00000008 Data RW 1451 .data CVWL368.lib(drv_i2c_dma.o) + 0x000703cc COMPRESSED 0x00000004 Data RW 1480 .data CVWL368.lib(drv_i2c_master.o) + 0x000703d0 COMPRESSED 0x00000008 Data RW 1516 .data CVWL368.lib(drv_i2c_slave.o) + 0x000703d8 COMPRESSED 0x000004a4 Data RW 1546 .data CVWL368.lib(drv_param_init.o) + 0x0007087c COMPRESSED 0x0000000c Data RW 1576 .data CVWL368.lib(drv_pwm.o) + 0x00070888 COMPRESSED 0x00000004 Data RW 1650 .data CVWL368.lib(drv_spi_master.o) + 0x0007088c COMPRESSED 0x00000008 Data RW 1676 .data CVWL368.lib(drv_swire.o) + 0x00070894 COMPRESSED 0x00000001 Data RW 1701 .data CVWL368.lib(drv_sys_cfg.o) + 0x00070895 COMPRESSED 0x00000003 PAD + 0x00070898 COMPRESSED 0x00000050 Data RW 1734 .data CVWL368.lib(drv_timer.o) + 0x000708e8 COMPRESSED 0x00000004 Data RW 1790 .data CVWL368.lib(hal_internal_vsync.o) + 0x000708ec COMPRESSED 0x00000008 Data RW 2155 .data CVWL368.lib(drv_rxbr.o) + 0x000708f4 COMPRESSED 0x00000004 Data RW 2228 .data CVWL368.lib(drv_vidc.o) + 0x000708f8 COMPRESSED 0x00000001 Data RW 2353 .data CVWL368.lib(drv_phy_common.o) + 0x000708f9 COMPRESSED 0x00000003 PAD + 0x000708fc COMPRESSED 0x0000000c Data RW 2373 .data CVWL368.lib(drv_chip_info.o) + 0x00070908 COMPRESSED 0x00000008 Data RW 2522 .data CVWL368.lib(drv_uart.o) + 0x00070910 COMPRESSED 0x0000000c Data RW 2589 .data CVWL368.lib(drv_wdg.o) + 0x0007091c COMPRESSED 0x00000004 Data RW 2960 .data mc_p.l(stdout.o) + 0x00070920 COMPRESSED 0x00000004 Data RW 2972 .data mc_p.l(errno.o) + 0x00070924 - 0x00000190 Zero RW 310 .bss app_tp_transfer.o + 0x00070ab4 - 0x000000c0 Zero RW 509 .bss CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00070b74 - 0x00000048 Zero RW 602 .bss CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00070bbc - 0x00000100 Zero RW 896 .bss CVWL368.lib(tau_log.o) + 0x00070cbc - 0x000000d0 Zero RW 1043 .bss CVWL368.lib(hal_uart.o) + 0x00070d8c - 0x0000001c Zero RW 1275 .bss CVWL368.lib(drv_dma.o) + 0x00070da8 - 0x00000040 Zero RW 1412 .bss CVWL368.lib(drv_gpio.o) + 0x00070de8 - 0x00000140 Zero RW 1450 .bss CVWL368.lib(drv_i2c_dma.o) + 0x00070f28 - 0x00000958 Zero RW 1788 .bss CVWL368.lib(hal_internal_vsync.o) + 0x00071880 - 0x00001030 Zero RW 1832 .bss CVWL368.lib(dcs_packet_fifo.o) + 0x000728b0 - 0x00000020 Zero RW 2417 .bss CVWL368.lib(hal_spi_slave.o) + 0x000728d0 - 0x00001000 Zero RW 459 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 6736 874 9396 56 0 37571 ap_demo.o + 1406 184 0 73 400 13814 app_tp_transfer.o + 36 6 0 0 0 445 board.o + 16 0 0 0 0 5603 main.o + 120 18 192 0 4096 2028 startup_armcm0.o + + ---------------------------------------------------------------------- + 8320 1082 9636 132 4496 59461 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 6 0 0 3 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 296 96 0 12 0 256 drv_chip_info.o + 192 82 20 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 410 28 0 0 28 796 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1652 500 0 0 0 1332 drv_dsi_rx.o + 1476 118 0 0 0 2428 drv_dsi_tx.o + 118 0 0 0 0 256 drv_efuse.o + 10 0 0 0 0 60 drv_fls.o + 784 112 0 4 64 1236 drv_gpio.o + 588 88 0 8 320 624 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 324 74 0 8 0 516 drv_i2c_slave.o + 668 6 0 0 0 1444 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 112 36 8 1188 0 376 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 140 32 0 12 0 316 drv_pwm.o + 112 24 0 0 0 180 drv_pwr.o + 682 66 0 8 0 1448 drv_rxbr.o + 104 24 0 4 0 188 drv_spi_master.o + 160 20 0 8 0 260 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 354 34 0 80 0 932 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 156 22 0 12 0 316 drv_wdg.o + 3020 308 72 8 192 1660 hal_dsi_rx_ctrl.o + 4312 278 0 1 72 2384 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 544 76 0 28 0 400 hal_i2c_slave.o + 6676 1502 308 4 2392 2264 hal_internal_vsync.o + 116 4 0 0 0 148 hal_pwm.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 40 0 0 0 0 136 hal_swire.o + 196 32 0 0 0 408 hal_system.o + 184 6 0 0 0 276 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 1592 62 8159 289 0 17708 app_tp_for_custom_s8.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 36756 4722 9172 1744 7900 52444 Library Totals + 48 0 5 13 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 29736 4454 1008 1434 7900 31460 CVWL368.lib + 1592 62 8159 289 0 17708 CVWL368_NOTE10_TP.lib + 272 26 0 0 0 152 m_ps.l + 2838 126 0 8 0 1264 mc_p.l + 2270 54 0 0 0 1860 mf_p.l + + ---------------------------------------------------------------------- + 36756 4722 9172 1744 7900 52444 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 45076 5804 18808 1876 12396 87421 Grand Totals + 45076 5804 18808 1012 12396 87421 ELF Image Totals (compressed) + 45076 5804 18808 1012 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 63884 ( 62.39kB) + Total RW Size (RW Data + ZI Data) 14272 ( 13.94kB) + Total ROM Size (Code + RO Data + RW Data) 64896 ( 63.38kB) + +============================================================================== + diff --git a/project/ISP_368/Listings/WL368_NOTE10_HX628.map b/project/ISP_368/Listings/WL368_NOTE10_HX628.map new file mode 100644 index 0000000..cb1c532 --- /dev/null +++ b/project/ISP_368/Listings/WL368_NOTE10_HX628.map @@ -0,0 +1,5382 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.PWM_Task) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.PWM_Task) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_demo) refers to hal_pwm.o(i.hal_pwm_out_init) for hal_pwm_out_init + ap_demo.o(i.ap_demo) refers to hal_pwm.o(i.hal_pwm_out_config_all) for hal_pwm_out_config_all + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_phone_clear_reset_on) for app_tp_phone_clear_reset_on + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.PWM_Task) for PWM_Task + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + ap_demo.o(i.ap_demo) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_in + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_te_timer_cb) for soft_te_timer_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_ca) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_get_reg_ca) refers to ap_demo.o(i.translate_data) for translate_data + ap_demo.o(i.ap_get_reg_ca) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(i.translate_data) for translate_data + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_backlight_51) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_backlight_51) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_tp_calibration_04) refers to ap_demo.o(.data) for .data + ap_demo.o(i.app_tp_calibration_exec) refers to app_tp_transfer.o(i.ap_tp_calibration) for ap_tp_calibration + ap_demo.o(i.app_tp_calibration_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.app_tp_calibration_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.init_panel) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.pps_update_handle) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_te_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) for hal_dsi_rx_ctrl_set_hw_tear_mode + ap_demo.o(i.soft_te_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + ap_demo.o(i.soft_te_timer_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_te_timer_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.translate_data) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.translate_data) refers to ap_demo.o(.data) for .data + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_ca) for ap_get_reg_ca + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight) for ap_set_backlight + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight_51) for ap_set_backlight_51 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_tp_calibration_04) for ap_set_tp_calibration_04 + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.ap_tp_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.ap_tp_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) for hal_internal_vsync_toggle_input_frame_rate + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) for hal_internal_sync_input_resolution_change_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_dsi_tx_ctrl.o(.conststring) for .conststring + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) for hal_internal_vsync_update_lcdc_addr + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te) refers to hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) for hal_internal_sync_cmd_mode_rcv_te + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) for hal_dsi_tx_ctrl_set_rect_pixel_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) for hal_dsi_tx_ctrl_draw_flicker + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) for hal_dsi_tx_ctrl_draw_chessboard + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_update_dpi_param) for hal_internal_update_dpi_param + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_config_intr) for drv_i2c_s_config_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c0_set_callback) for drv_i2c0_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_sel) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_pwm.o(i.hal_pwm_in_clear_int) refers to drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all) for drv_pwm_in_clear_pwm_int_all + hal_pwm.o(i.hal_pwm_in_config_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_in_ctrl_int) refers to drv_pwm.o(i.drv_pwm_in_set_sys_int) for drv_pwm_in_set_sys_int + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_get_current_count) refers to drv_pwm.o(i.drv_pwm_in_get_current_count) for drv_pwm_in_get_current_count + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_pwm.o(i.drv_pwm_in_get_high_period) for drv_pwm_in_get_high_period + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_pwm.o(i.drv_pwm_in_get_low_period) for drv_pwm_in_get_low_period + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_pwm.o(i.drv_pwm_in_get_counter_period) for drv_pwm_in_get_counter_period + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_in_init) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_register_callback) refers to drv_pwm.o(i.drv_pwm_in_register_callback) for drv_pwm_in_register_callback + hal_pwm.o(i.hal_pwm_in_set_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_config_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(i.hal_pwm_out_common_config) for hal_pwm_out_common_config + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_deinit) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sel_io) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_out_sync_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sync_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_common.o(.data) for g_system_clock + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_flash_power_down) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_power_down) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_system.o(i.hal_system_flash_read) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_dual_read) for norflash_dual_read + hal_system.o(i.hal_system_flash_release_power_down) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_release_power_down) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_erase_block) for norflash_erase_block + hal_system.o(i.hal_system_flash_write) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_write) for norflash_write + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c1_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c0_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_slave_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_update_dpi_param) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ceil.o(i.ceil) for ceil + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) for hal_internal_video_mode_auto_sync + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.app_tp_m_transfer_complate), (8 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (5 bytes). + Removing app_tp_transfer.o(.data), (6 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (1 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (156 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (37 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (288 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (620 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (11 bytes). + Removing app_tp_for_custom_s8.o(.data), (10 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (16 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode), (100 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter), (108 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data), (268 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex), (14 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex), (32 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (148 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te), (10 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard), (280 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker), (172 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init), (30 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (140 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data), (272 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (80 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (32 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (40 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_sel), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (32 bytes). + Removing hal_pwm.o(.rev16_text), (4 bytes). + Removing hal_pwm.o(.revsh_text), (4 bytes). + Removing hal_pwm.o(i.hal_pwm_in_clear_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_config_int), (60 bytes). + Removing hal_pwm.o(i.hal_pwm_in_ctrl_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_deinit), (18 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_current_count), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_high_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_low_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_total_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_init), (26 bytes). + Removing hal_pwm.o(i.hal_pwm_in_register_callback), (10 bytes). + Removing hal_pwm.o(i.hal_pwm_in_set_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_config_duty_ratio), (76 bytes). + Removing hal_pwm.o(i.hal_pwm_out_deinit), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sel_io), (38 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_all), (16 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_ctl), (12 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_period), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_thr), (48 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (108 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_flash_power_down), (20 bytes). + Removing hal_system.o(i.hal_system_flash_read), (52 bytes). + Removing hal_system.o(i.hal_system_flash_release_power_down), (20 bytes). + Removing hal_system.o(i.hal_system_flash_write), (60 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (412 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_clocks), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (24 bytes). + Removing drv_dma.o(i.drv_dma_enable_cycle), (44 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_clear_irq_status), (6 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (130 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (30 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (16 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_scld_filter), (100 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (64 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_set_frame_buff_pd), (28 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (108 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (60 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (220 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (88 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (72 bytes). + Removing drv_spi_dma.o(.bss), (480 bytes). + Removing drv_spi_dma.o(.data), (16 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (168 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex), (468 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate), (560 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr), (48 bytes). + Removing hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler), (476 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (6 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_set_prefetch), (24 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (56 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (20 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing dflti.o(.text), (40 bytes). + +597 unused section(s) (total 27533 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../fplib/microlib/fpsqrt.c 0x00000000 Number 0 dsqrt.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt_x.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_pwm.c 0x00000000 Number 0 hal_pwm.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\internal\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\..\src\app\demo\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\..\src\app\demo\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\..\src\app\demo\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_pwm.c 0x00000000 Number 0 hal_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\internal\\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\\..\\src\\app\\demo\\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdcmple.s 0x00000000 Number 0 cdcmple.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 fadd.o(.text) + .text 0x0001029a Section 0 fmul.o(.text) + .text 0x00010314 Section 0 fdiv.o(.text) + .text 0x00010390 Section 0 fscalb.o(.text) + .text 0x000103a8 Section 0 dadd.o(.text) + .text 0x0001050c Section 0 dmul.o(.text) + .text 0x000105dc Section 0 ddiv.o(.text) + .text 0x000106cc Section 0 fflti.o(.text) + .text 0x000106e2 Section 0 ffltui.o(.text) + .text 0x000106f0 Section 0 dfltui.o(.text) + .text 0x0001070c Section 0 ffixi.o(.text) + .text 0x0001073e Section 0 ffixui.o(.text) + .text 0x00010768 Section 0 dfixi.o(.text) + .text 0x000107b0 Section 0 dfixui.o(.text) + .text 0x000107ec Section 0 f2d.o(.text) + .text 0x00010814 Section 40 cdcmple.o(.text) + .text 0x0001083c Section 20 cfrcmple.o(.text) + .text 0x00010850 Section 0 uldiv.o(.text) + .text 0x000108b0 Section 0 llshl.o(.text) + .text 0x000108d0 Section 0 llushr.o(.text) + .text 0x000108f2 Section 0 llsshr.o(.text) + .text 0x00010918 Section 0 iusefp.o(.text) + .text 0x00010918 Section 0 fepilogue.o(.text) + .text 0x0001099a Section 0 depilogue.o(.text) + .text 0x00010a58 Section 0 dsqrt.o(.text) + .text 0x00010afc Section 0 dfixul.o(.text) + .text 0x00010b3c Section 40 cdrcmple.o(.text) + .text 0x00010b64 Section 36 init.o(.text) + .text 0x00010b88 Section 0 __dczerorl2.o(.text) + i.ADC_IRQn_Handler 0x00010be0 Section 0 irq_redirect .o(i.ADC_IRQn_Handler) + i.AP_NRESET_IRQn_Handler 0x00010bf8 Section 0 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + i.DMA_IRQn_Handler 0x00010c10 Section 0 irq_redirect .o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010c24 Section 0 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010c40 Section 0 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010c5c Section 0 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010c78 Section 0 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010c94 Section 0 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010cb0 Section 0 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010ccc Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010ce8 Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.FLSCTRL_IRQn_Handler 0x00010d04 Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.Gpio_swire_output 0x00010d18 Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00010d68 Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010d7c Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010d94 Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010dac Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010dc4 Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010dec Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010e04 Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010e1c Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010e34 Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.PWM_Task 0x00010e50 Section 0 ap_demo.o(i.PWM_Task) + i.S20_Start_init 0x00010e80 Section 0 app_tp_transfer.o(i.S20_Start_init) + i.SPIM_IRQn_Handler 0x00010fb4 Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.SPIS_IRQn_Handler 0x00010fd0 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.UART_DisableDma 0x00010fec Section 0 drv_uart.o(i.UART_DisableDma) + i.UART_GetInstance 0x00010fee Section 0 drv_uart.o(i.UART_GetInstance) + i.__scatterload_copy 0x00010ff2 Section 14 handlers.o(i.__scatterload_copy) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.__scatterload_null 0x00011014 Section 2 handlers.o(i.__scatterload_null) + .constdata 0x00011016 Section 1 app_tp_for_custom_s8.o(.constdata) + .ARM.__at_0x11018 0x00011018 Section 4 drv_common.o(.ARM.__at_0x11018) + i.SWIRE_IRQn_Handler 0x0001101c Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00011038 Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00011050 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x00011068 Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00011080 Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x00011098 Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART0_IRQ_Handle 0x000110b0 Section 0 drv_uart.o(i.UART0_IRQ_Handle) + i.UART_IRQn_Handler 0x000110cc Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_ResetRxFIFO 0x000110e4 Section 0 drv_uart.o(i.UART_ResetRxFIFO) + i.UART_SetBaudRate 0x00011108 Section 0 drv_uart.o(i.UART_SetBaudRate) + i.UART_SwitchSCLK 0x00011150 Section 0 drv_uart.o(i.UART_SwitchSCLK) + i.UART_TransferHandleIRQ 0x0001116a Section 0 drv_uart.o(i.UART_TransferHandleIRQ) + i.UART_WriteBlocking 0x0001129e Section 0 drv_uart.o(i.UART_WriteBlocking) + i.UART_init 0x000112b8 Section 0 drv_uart.o(i.UART_init) + i.VIDC_IRQn_Handler 0x00011374 Section 0 irq_redirect .o(i.VIDC_IRQn_Handler) + i.VPRE_IRQn_Handler 0x0001138c Section 0 irq_redirect .o(i.VPRE_IRQn_Handler) + i.WDG_IRQn_Handler 0x000113a4 Section 0 irq_redirect .o(i.WDG_IRQn_Handler) + i.__0printf 0x000113bc Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x000113dc Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x00011400 Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x0001142e Section 0 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + i.__NVIC_ClearPendingIRQ 0x00011448 Section 0 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011449 Thumb Code 18 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x00011460 Section 0 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011461 Thumb Code 18 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_DisableIRQ 0x00011478 Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x00011479 Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x00011498 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x00011499 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__NVIC_SetPriority 0x000114b0 Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x000114b1 Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_zeroinit 0x000114f4 Section 14 handlers.o(i.__scatterload_zeroinit) + i.__set_errno 0x00011504 Section 0 errno.o(i.__set_errno) + i._fp_digits 0x00011510 Section 0 printfa.o(i._fp_digits) + _fp_digits 0x00011511 Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x00011684 Section 0 printfa.o(i._printf_core) + _printf_core 0x00011685 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011d70 Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011d71 Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011d90 Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011d91 Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011dbc Section 0 printfa.o(i._sputc) + _sputc 0x00011dbd Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011dc8 Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011dc9 Thumb Code 666 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x000120ac Section 0 ap_demo.o(i.ap_demo) + i.ap_get_reg_ca 0x000122dc Section 0 ap_demo.o(i.ap_get_reg_ca) + ap_get_reg_ca 0x000122dd Thumb Code 62 ap_demo.o(i.ap_get_reg_ca) + i.ap_get_reg_df 0x00012348 Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x00012349 Thumb Code 134 ap_demo.o(i.ap_get_reg_df) + i.ap_reset_cb 0x000123d4 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x000123d5 Thumb Code 40 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight 0x00012448 Section 0 ap_demo.o(i.ap_set_backlight) + ap_set_backlight 0x00012449 Thumb Code 62 ap_demo.o(i.ap_set_backlight) + i.ap_set_backlight_51 0x000124b4 Section 0 ap_demo.o(i.ap_set_backlight_51) + ap_set_backlight_51 0x000124b5 Thumb Code 46 ap_demo.o(i.ap_set_backlight_51) + i.ap_set_display_off 0x00012508 Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x00012509 Thumb Code 30 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x00012548 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x00012549 Thumb Code 18 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x00012578 Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x00012579 Thumb Code 86 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x000125fc Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x000125fd Thumb Code 22 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x0001263c Section 0 ap_demo.o(i.ap_set_tp_calibration_04) + ap_set_tp_calibration_04 0x0001263d Thumb Code 22 ap_demo.o(i.ap_set_tp_calibration_04) + i.ap_tp_calibration 0x00012658 Section 0 app_tp_transfer.o(i.ap_tp_calibration) + i.app_ADC_IRQn_Handler 0x00012708 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x00012724 Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x00012748 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x00012764 Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x00012780 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x0001279c Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x000127b8 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x000127d4 Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x000127f0 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x0001280c Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x00012828 Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x00012870 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x00012888 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00012898 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00012a3c Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00012ac4 Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00012d5c Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00012dfc Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00012e44 Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x00012e74 Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x00013074 Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x00013094 Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x000130ac Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x000130b6 Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x000130c0 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x000130ca Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x000130d4 Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x000130dc Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x000130f8 Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x00013114 Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x0001314c Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x0001315c Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x0001318c Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x000131b0 Section 0 ap_demo.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x0001320c Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x0001320d Thumb Code 42 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x0001323c Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x00013290 Section 0 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_read 0x00013291 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_write 0x000132b0 Section 0 app_tp_transfer.o(i.app_tp_m_write) + app_tp_m_write 0x000132b1 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x000132b8 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_phone_clear_reset_on 0x00013620 Section 0 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + i.app_tp_s_read 0x0001362c Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x00013634 Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x0001363c Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x00013928 Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x00013958 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00013959 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_transfer_screen_const 0x00013964 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00013965 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x000139a4 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x00013a98 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.board_Init 0x00013aac Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x00013ad0 Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x00013fc0 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x00014088 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x00014089 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x000140b4 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x000140b5 Thumb Code 90 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x00014148 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x000141a0 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x000141b8 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x000141fc Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x00014220 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x00014221 Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x0001423c Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x00014254 Section 0 tau_delay.o(i.delayUs) + i.drv_ap_rst_trig_edge_detect 0x00014278 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x000142b0 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x000142bc Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x000142fc Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x000143ac Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x000143c0 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x00014418 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x00014420 Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x00014430 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x00014444 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x00014458 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x00014478 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x0001448c Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x000144a4 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x000144b8 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x000144cc Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x000144e0 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x000144f4 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x00014508 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x0001451c Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x00014530 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x00014544 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x00014558 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x00014570 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x00014588 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x0001459c Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x000145b0 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x000145c4 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x000145dc Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x000145f8 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x00014608 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00014618 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x0001463c Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00014648 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x000146d8 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x000146ea Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x00014704 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x0001470c Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00014750 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x00014786 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00014794 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00014808 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00014812 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x0001483c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00014940 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00014980 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00014981 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x000149d0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x000149d1 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x000149ec Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x000149f4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x000149fa Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00014a08 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00014a28 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00014a38 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00014a3c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00014a4c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00014a92 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00014ab8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00014bbc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00014bca Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00014bde Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00014c4a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x00014c4e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00014c66 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00014c6e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00014c76 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00014c80 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00014ca4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x00014ca8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00014cac Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00014cb0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x00014cc8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x00014ce2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00014cee Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x00014d52 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x00014d90 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00014ec4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x00014ee2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00014eea Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x00014f06 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x00014f1e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x00014f2c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x00014f6c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x00014f7c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x00014f84 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00014fa6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x00014fae Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00014fd4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x0001507e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x00015094 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x000150ac Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x000150da Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x000150e6 Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x00015118 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x00015130 Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x00015148 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x00015154 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00015168 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x000151b8 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x000151d8 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x000151e8 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x000151f8 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x00015208 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00015218 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00015219 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x00015238 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c0_set_callback 0x00015368 Section 0 drv_i2c_slave.o(i.drv_i2c0_set_callback) + i.drv_i2c1_set_callback 0x00015374 Section 0 drv_i2c_master.o(i.drv_i2c1_set_callback) + i.drv_i2c_dma_callback 0x00015380 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x00015381 Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x000153b4 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x00015460 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x0001547a Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x00015494 Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x000154f4 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x00015504 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_master_init 0x0001553c Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x000155c8 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x00015624 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x00015660 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x00015661 Thumb Code 62 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x0001569e Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_config_intr 0x000156e0 Section 0 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + i.drv_i2c_s_enable 0x000156e4 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable) + i.drv_i2c_s_get_fifo_status 0x000156ec Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_intr 0x00015700 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + i.drv_i2c_s_write_data 0x00015750 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x0001576c Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x000157c4 Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x000157f8 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x00015810 Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x00015828 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x00015858 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x0001586e Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00015892 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x000158b8 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x000158ce Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x000158e4 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x000158f0 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x0001590e Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00015930 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00015952 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x0001595e Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00015978 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x0001599a Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x000159b4 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x000159c0 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00015a0c Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00015a12 Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00015a24 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00015a44 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_video_hw_mode 0x00015a84 Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00015a98 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x00015ab8 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00015ac4 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00015b04 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00015b10 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x00015b22 Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00015b32 Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00015b40 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x00015b54 Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00015b60 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x00015b70 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x00015b82 Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x00015b92 Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x00015ba8 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00015bc0 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x00015bda Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00015be8 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00015c10 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x00015c20 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x00015c28 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x00015c3c Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x00015c50 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x00015c58 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_p2r_filter_init 0x00015c6c Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x00015c90 Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x00015ca0 Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x00015cdc Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x00015d3c Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x00015d90 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00015da0 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x00015db8 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x00015dd8 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x00015dfe Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x00015e1c Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x00015e1d Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwm_out_enable 0x00015e3c Section 0 drv_pwm.o(i.drv_pwm_out_enable) + i.drv_pwm_out_set_control 0x00015e5c Section 0 drv_pwm.o(i.drv_pwm_out_set_control) + i.drv_pwm_out_set_period 0x00015e68 Section 0 drv_pwm.o(i.drv_pwm_out_set_period) + i.drv_pwm_out_set_sync_mode 0x00015e74 Section 0 drv_pwm.o(i.drv_pwm_out_set_sync_mode) + i.drv_pwm_out_set_threshold 0x00015e94 Section 0 drv_pwm.o(i.drv_pwm_out_set_threshold) + i.drv_pwr_set_cp_mode 0x00015ea0 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x00015ec0 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x00015ed8 Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x00015f10 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x00015f11 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x00015f1c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x00015f1d Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x00015f2c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x00015f2d Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x00015f40 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x00015f41 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x00015f56 Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00015f60 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00015f64 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x00015fc0 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x00015fd4 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x00016038 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x0001603c Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x0001603d Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x0001604e Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x00016052 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x00016053 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x00016064 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00016070 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x00016078 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x00016084 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x00016090 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x000160a4 Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x00016170 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x00016184 Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x00016198 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x000161a8 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x000161ce Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x000161d6 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x000161e0 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_enable 0x00016200 Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_set_int 0x0001621c Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x00016270 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x0001628c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00016298 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x000162c0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x000162d8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x000162f4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x00016318 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x0001633c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x0001634c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x0001635c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x00016380 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x00016381 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x0001639a Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x000163bc Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x000163cc Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x000163dc Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x000163dd Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x00016420 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x00016434 Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x00016444 Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x00016498 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x000164c0 Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_clear 0x000164d0 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x000164d1 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x000164da Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x000164f6 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x00016512 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x00016513 Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x00016524 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x00016525 Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x00016538 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x00016539 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00016548 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00016550 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00016568 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x000165a8 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x000165bc Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x000165e4 Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x000165f0 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x000165f6 Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x00016632 Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00016646 Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x00016656 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x0001665e Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x00016684 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x000166ac Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x000166c4 Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x000166ce Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x000166de Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x000166e8 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x000166f2 Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00016704 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x0001670e Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00016718 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x00016730 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00016740 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00016741 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00016750 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00016751 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00016760 Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x000167a0 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x000167aa Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x000167c0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x000167f4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00016890 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016914 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x0001693c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00016964 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x000169c4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x000169c5 Thumb Code 332 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00016b68 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00016b69 Thumb Code 184 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00016c40 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00016c41 Thumb Code 334 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x00016d98 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x00016d99 Thumb Code 312 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x00016ee0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x00016ee1 Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x0001710c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x000171fc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_hw_tear_mode 0x00017230 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00017264 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00017265 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x0001729c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x0001729d Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017310 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_start 0x00017344 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x00017380 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x000173bc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_calc_video_chunks 0x000173dc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x000173dd Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x0001756c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x0001756d Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x000175a0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x000175a1 Thumb Code 1022 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x000179f0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00017a1c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00017aa0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017aec Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x00017b14 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00017bb8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00017bb9 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x00017bdc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_ccm 0x00017be8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00017c08 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x00017c1c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x00017c2c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x00017c50 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00017cec Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00017d30 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00017e08 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x00017eb8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x00017eb9 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x00017efc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x00017efd Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x00017f2c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x00017f2d Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x00017f4c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00017f4d Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x00017f6c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x00017f6d Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x00018000 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x00018001 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x00018058 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x00018059 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x0001809c Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x000180b4 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x000180c8 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x00018108 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x00018128 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00018150 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x00018168 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x000181b8 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x00018218 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x00018220 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x00018240 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x000182ac Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x000182cc Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x000182e8 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x000182f4 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x000182f5 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x00018314 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x00018315 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x00018324 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x00018370 Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x00018438 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x0001844c Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x00018458 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x00018459 Thumb Code 354 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x000185cc Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x000186c8 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_get_hight_performan_mode 0x000186d8 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change 0x000186e8 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_update_dpi_param 0x00018914 Section 0 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + i.hal_internal_video_mode_auto_sync 0x00018924 Section 0 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + i.hal_internal_vsync_deinit 0x00018a30 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00018a58 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00018a64 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tear_mode 0x00018a7c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + i.hal_internal_vsync_get_tx_state 0x00018a88 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00018a94 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00018bac Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x00018c5c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x00018d78 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x00018d8c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x00018db0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00018e00 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x00018e80 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x00018e81 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x00018ea4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x00018ea5 Thumb Code 84 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x00018efc Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x00018efd Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x00018f10 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x00018f11 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x00019074 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00019075 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x000190b4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x000190b5 Thumb Code 422 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x00019264 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x00019265 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_pwm_out_common_config 0x000192a4 Section 0 hal_pwm.o(i.hal_pwm_out_common_config) + hal_pwm_out_common_config 0x000192a5 Thumb Code 32 hal_pwm.o(i.hal_pwm_out_common_config) + i.hal_pwm_out_config_all 0x000192c4 Section 0 hal_pwm.o(i.hal_pwm_out_config_all) + i.hal_pwm_out_convert_time 0x000192d4 Section 0 hal_pwm.o(i.hal_pwm_out_convert_time) + hal_pwm_out_convert_time 0x000192d5 Thumb Code 124 hal_pwm.o(i.hal_pwm_out_convert_time) + i.hal_pwm_out_init 0x0001935c Section 0 hal_pwm.o(i.hal_pwm_out_init) + i.hal_spi_m_clear_rxfifo 0x00019368 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_deinit 0x00019376 Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_open 0x00019388 Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x0001939e Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x000193a8 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x00019430 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x0001944c Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x00019454 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x0001945c Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_deinit 0x00019464 Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x00019492 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x000194ac Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x000194f4 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x0001951c Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x000195a8 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.handle_init 0x000195b8 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x000196c8 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x000196c9 Thumb Code 106 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x0001973c Section 0 ap_demo.o(i.init_panel) + init_panel 0x0001973d Thumb Code 160 ap_demo.o(i.init_panel) + i.main 0x00019808 Section 0 main.o(i.main) + i.open_mipi_rx 0x00019814 Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x00019815 Thumb Code 112 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x0001989c Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x0001989d Thumb Code 64 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x00019900 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x00019901 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x00019cf4 Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x00019cf5 Thumb Code 358 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x00019e6c Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x00019e6d Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x00019ef8 Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x00019ef9 Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x0001a078 Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001a079 Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001a11c Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001a11d Thumb Code 316 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_gen_te 0x0001a2f0 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001a2f1 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x0001a3b4 Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x0001a3b5 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_te_timer_cb 0x0001a474 Section 0 ap_demo.o(i.soft_te_timer_cb) + soft_te_timer_cb 0x0001a475 Thumb Code 36 ap_demo.o(i.soft_te_timer_cb) + i.soft_timer3_cb 0x0001a4a0 Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001a4a1 Thumb Code 36 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001a4d0 Section 0 sqrt.o(i.sqrt) + i.translate_data 0x0001a518 Section 0 ap_demo.o(i.translate_data) + i.vidc_callback 0x0001a884 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001a885 Thumb Code 232 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001a98c Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001a98d Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001aa5c Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001aa5d Thumb Code 300 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001ac28 Section 10087 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001ac28 Data 120 ap_demo.o(.constdata) + .constdata 0x0001d38f Section 8158 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001f370 Section 36 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001f394 Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001f394 Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001f40c Data 90 hal_gpio.o(.constdata) + .constdata 0x0001f468 Section 32 hal_i2c_slave.o(.constdata) + sg_i2c_s_config 0x0001f468 Data 32 hal_i2c_slave.o(.constdata) + .constdata 0x0001f488 Section 8 drv_param_init.o(.constdata) + .constdata 0x0001f490 Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001f490 Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001f548 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001f5c8 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001f5f8 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001f618 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001f660 Section 67 hal_dsi_tx_ctrl.o(.conststring) + .conststring 0x0001f6a4 Section 308 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 40 ap_demo.o(.data) + g_calibration_flag 0x000701d0 Data 1 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701d1 Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701d2 Data 1 ap_demo.o(.data) + panel_display_done 0x000701d3 Data 1 ap_demo.o(.data) + flag_b1 0x000701d6 Data 1 ap_demo.o(.data) + flag_ca 0x000701d7 Data 1 ap_demo.o(.data) + cmd_0a_flag 0x000701d9 Data 1 ap_demo.o(.data) + read_bl_data 0x000701dc Data 2 ap_demo.o(.data) + read_bl_data_bak 0x000701de Data 2 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701ec Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701f0 Data 4 ap_demo.o(.data) + value_reg_df 0x000701f4 Data 4 ap_demo.o(.data) + .data 0x000701f8 Section 46 app_tp_transfer.o(.data) + s_spim_write 0x000701f8 Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x000701f9 Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x000701fa Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x000701fb Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x000701fd Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x000701fe Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x000701ff Data 1 app_tp_transfer.o(.data) + .data 0x00070226 Section 230 app_tp_for_custom_s8.o(.data) + app_tp_count 0x00070230 Data 1 app_tp_for_custom_s8.o(.data) + phone_85_flag 0x00070231 Data 1 app_tp_for_custom_s8.o(.data) + phone_F6_flag 0x00070232 Data 1 app_tp_for_custom_s8.o(.data) + phone_E4_flag 0x00070233 Data 1 app_tp_for_custom_s8.o(.data) + phone_72_flag 0x00070234 Data 1 app_tp_for_custom_s8.o(.data) + phone_75_flag 0x00070235 Data 1 app_tp_for_custom_s8.o(.data) + phone_92_flag 0x00070236 Data 1 app_tp_for_custom_s8.o(.data) + phone_74_flag 0x00070237 Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x0007023c Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x0007023e Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x00070240 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x00070242 Data 2 app_tp_for_custom_s8.o(.data) + .data 0x0007030c Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007030d Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007030e Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007030f Section 3 app_tp_for_custom_s8.o(.data) + .data 0x00070312 Section 5 app_tp_for_custom_s8.o(.data) + .data 0x00070318 Section 48 app_tp_for_custom_s8.o(.data) + .data 0x00070348 Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00070348 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x0007034c Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00070350 Section 3 hal_dsi_tx_ctrl.o(.data) + g_tx_vcom_en 0x00070350 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_vpg_en 0x00070351 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x00070352 Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x00070353 Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x00070353 Data 1 hal_i2c_master.o(.data) + .data 0x00070354 Section 32 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00070354 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00070355 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x00070356 Data 1 hal_i2c_slave.o(.data) + sg_i2c_s_index 0x00070357 Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x00070358 Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x0007035c Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x00070360 Data 4 hal_i2c_slave.o(.data) + sg_tx_byte_num 0x00070364 Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x00070368 Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x0007036c Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00070370 Data 4 hal_i2c_slave.o(.data) + .data 0x00070374 Section 1 hal_pwm.o(.data) + sg_pwm_run 0x00070374 Data 1 hal_pwm.o(.data) + .data 0x00070378 Section 18 norflash.o(.data) + tmprg 0x00070380 Data 4 norflash.o(.data) + .data 0x0007038c Section 12 drv_common.o(.data) + s_my_tick 0x0007038c Data 4 drv_common.o(.data) + .data 0x00070398 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x00070398 Data 4 drv_gpio.o(.data) + .data 0x0007039c Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x0007039c Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x000703a0 Data 4 drv_i2c_dma.o(.data) + .data 0x000703a4 Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x000703a4 Data 4 drv_i2c_master.o(.data) + .data 0x000703a8 Section 4 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x000703a8 Data 4 drv_i2c_slave.o(.data) + .data 0x000703ac Section 1188 drv_param_init.o(.data) + .data 0x00070850 Section 12 drv_pwm.o(.data) + s_pwm_type 0x00070850 Data 1 drv_pwm.o(.data) + s_pwm_cb 0x00070854 Data 8 drv_pwm.o(.data) + .data 0x0007085c Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x0007085c Data 4 drv_spi_master.o(.data) + .data 0x00070860 Section 8 drv_swire.o(.data) + s_swire_cb 0x00070860 Data 8 drv_swire.o(.data) + .data 0x00070868 Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x00070868 Data 1 drv_sys_cfg.o(.data) + .data 0x0007086c Section 80 drv_timer.o(.data) + sg_timer_info 0x0007086c Data 80 drv_timer.o(.data) + .data 0x000708bc Section 12 hal_internal_vsync.o(.data) + sg_cmd_mode_tx_start 0x000708bc Data 1 hal_internal_vsync.o(.data) + sg_cur_te_info 0x000708c0 Data 4 hal_internal_vsync.o(.data) + .data 0x000708c8 Section 8 drv_rxbr.o(.data) + .data 0x000708d0 Section 4 drv_vidc.o(.data) + .data 0x000708d4 Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x000708d4 Data 1 drv_phy_common.o(.data) + .data 0x000708d8 Section 12 drv_chip_info.o(.data) + sg_chip_info 0x000708d8 Data 4 drv_chip_info.o(.data) + sg_chip_function 0x000708dc Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x000708e0 Data 4 drv_chip_info.o(.data) + .data 0x000708e4 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x000708e4 Data 4 drv_uart.o(.data) + uart_userData 0x000708e8 Data 4 drv_uart.o(.data) + .data 0x000708ec Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x000708ec Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x000708f0 Data 8 drv_wdg.o(.data) + .data 0x000708f8 Section 4 stdout.o(.data) + .data 0x000708fc Section 4 errno.o(.data) + _errno 0x000708fc Data 4 errno.o(.data) + .bss 0x00070900 Section 400 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x00070900 Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x000709c8 Data 200 app_tp_transfer.o(.bss) + .bss 0x00070a90 Section 196 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x00070a90 Data 196 hal_dsi_rx_ctrl.o(.bss) + .bss 0x00070b54 Section 76 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x00070b54 Data 76 hal_dsi_tx_ctrl.o(.bss) + .bss 0x00070ba0 Section 256 tau_log.o(.bss) + .bss 0x00070ca0 Section 208 hal_uart.o(.bss) + .bss 0x00070d70 Section 28 drv_dma.o(.bss) + s_dma_handle 0x00070d70 Data 28 drv_dma.o(.bss) + .bss 0x00070d8c Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00070d8c Data 64 drv_gpio.o(.bss) + .bss 0x00070dcc Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x00070dcc Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x00070e6c Data 160 drv_i2c_dma.o(.bss) + .bss 0x00070f0c Section 2436 hal_internal_vsync.o(.bss) + g_imm_buffer 0x00071770 Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x00071870 Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x0007187c Data 20 hal_internal_vsync.o(.bss) + .bss 0x00071890 Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x000728c0 Section 32 hal_spi_slave.o(.bss) + STACK 0x000728e0 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfrcmple 0x0001083d Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010851 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108b1 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108b1 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108d1 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108d1 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000108f3 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000108f3 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010919 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010919 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010929 Thumb Code 114 fepilogue.o(.text) + _double_round 0x0001099b Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109b5 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a59 Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010afd Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b3d Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b65 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b65 Thumb Code 0 init.o(.text) + __decompress 0x00010b89 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010b89 Thumb Code 86 __dczerorl2.o(.text) + ADC_IRQn_Handler 0x00010be1 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010bf9 Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010c11 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c25 Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c41 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010c5d Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010c79 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010c95 Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010cb1 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010ccd Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010ce9 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + FLSCTRL_IRQn_Handler 0x00010d05 Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010d19 Thumb Code 78 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010d69 Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010d7d Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010d95 Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010dad Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010dc5 Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010ded Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010e05 Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010e1d Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010e35 Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + PWM_Task 0x00010e51 Thumb Code 44 ap_demo.o(i.PWM_Task) + S20_Start_init 0x00010e81 Thumb Code 282 app_tp_transfer.o(i.S20_Start_init) + SPIM_IRQn_Handler 0x00010fb5 Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + SPIS_IRQn_Handler 0x00010fd1 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + UART_DisableDma 0x00010fed Thumb Code 2 drv_uart.o(i.UART_DisableDma) + UART_GetInstance 0x00010fef Thumb Code 4 drv_uart.o(i.UART_GetInstance) + __scatterload_copy 0x00010ff3 Thumb Code 14 handlers.o(i.__scatterload_copy) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + __scatterload_null 0x00011015 Thumb Code 2 handlers.o(i.__scatterload_null) + screen_reg_start_data_size 0x00011016 Data 1 app_tp_for_custom_s8.o(.constdata) + s_debug_state 0x00011018 Data 4 drv_common.o(.ARM.__at_0x11018) + SWIRE_IRQn_Handler 0x0001101d Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00011039 Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00011051 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x00011069 Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00011081 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x00011099 Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x000110b1 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + UART_IRQn_Handler 0x000110cd Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x000110e5 Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SetBaudRate 0x00011109 Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x00011151 Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x0001116b Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x0001129f Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x000112b9 Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x00011375 Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x0001138d Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x000113a5 Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x000113bd Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x000113bd Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x000113bd Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x000113bd Thumb Code 0 printfa.o(i.__0printf) + printf 0x000113bd Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x000113dd Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x000113dd Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x000113dd Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x000113dd Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x000113dd Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x00011401 Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x0001142f Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_zeroinit 0x000114f5 Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x00011505 Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x000120ad Thumb Code 358 ap_demo.o(i.ap_demo) + ap_tp_calibration 0x00012659 Thumb Code 170 app_tp_transfer.o(i.ap_tp_calibration) + app_ADC_IRQn_Handler 0x00012709 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x00012725 Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x00012749 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x00012765 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x00012781 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x0001279d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x000127b9 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x000127d5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x000127f1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x0001280d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x00012829 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x00012871 Thumb Code 14 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00012889 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00012899 Thumb Code 208 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00012a3d Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00012ac5 Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00012d5d Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00012dfd Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00012e45 Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x00012e75 Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x00013075 Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x00013095 Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x000130ad Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x000130b7 Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x000130c1 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x000130cb Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x000130d5 Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x000130dd Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x000130f9 Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x00013115 Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x0001314d Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x0001315d Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x0001318d Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x000131b1 Thumb Code 36 ap_demo.o(i.app_tp_calibration_exec) + app_tp_init 0x0001323d Thumb Code 66 app_tp_transfer.o(i.app_tp_init) + app_tp_phone_analysis_data 0x000132b9 Thumb Code 820 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_phone_clear_reset_on 0x00013621 Thumb Code 8 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + app_tp_s_read 0x0001362d Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x00013635 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x0001363d Thumb Code 738 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x00013929 Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x000139a5 Thumb Code 228 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x00013a99 Thumb Code 14 app_tp_transfer.o(i.app_tp_transfer_screen_start) + board_Init 0x00013aad Thumb Code 30 board.o(i.board_Init) + calc_framebuffer_setting 0x00013ad1 Thumb Code 1258 hal_internal_vsync.o(i.calc_framebuffer_setting) + ceil 0x00013fc1 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x00014149 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x000141a1 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x000141b9 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x000141fd Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x0001423d Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x00014255 Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x00014279 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x000142b1 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x000142bd Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x000142fd Thumb Code 98 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x000143ad Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x000143c1 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x00014419 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x00014421 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x00014431 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x00014445 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x00014459 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x00014479 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x0001448d Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x000144a5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x000144b9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x000144cd Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x000144e1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x000144f5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x00014509 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x0001451d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x00014531 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x00014545 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x00014559 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x00014571 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x00014589 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x0001459d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x000145b1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x000145c5 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x000145dd Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x000145f9 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x00014609 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00014619 Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x0001463d Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00014649 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x000146d9 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x000146eb Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x00014705 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x0001470d Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00014751 Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x00014787 Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00014795 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00014809 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00014813 Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x0001483d Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00014941 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x000149ed Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x000149f5 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x000149fb Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00014a09 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00014a29 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00014a39 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00014a3d Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00014a4d Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00014a93 Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00014ab9 Thumb Code 256 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00014bbd Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00014bcb Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00014bdf Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00014c4b Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x00014c4f Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00014c67 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00014c6f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00014c77 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00014c81 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00014ca5 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x00014ca9 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00014cad Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x00014cb1 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x00014cc9 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x00014ce3 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00014cef Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x00014d53 Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x00014d91 Thumb Code 308 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00014ec5 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x00014ee3 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00014eeb Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x00014f07 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x00014f1f Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x00014f2d Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x00014f6d Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x00014f7d Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x00014f85 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00014fa7 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x00014faf Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00014fd5 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x0001507f Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x00015095 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x000150ad Thumb Code 46 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x000150db Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x000150e7 Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x00015119 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x00015131 Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x00015149 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x00015155 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00015169 Thumb Code 74 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x000151b9 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x000151d9 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x000151e9 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x000151f9 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x00015209 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x00015239 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c0_set_callback 0x00015369 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c0_set_callback) + drv_i2c1_set_callback 0x00015375 Thumb Code 6 drv_i2c_master.o(i.drv_i2c1_set_callback) + drv_i2c_dma_init 0x000153b5 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x00015461 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x0001547b Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x00015495 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x000154f5 Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x00015505 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_master_init 0x0001553d Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x000155c9 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x00015625 Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x0001569f Thumb Code 66 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_config_intr 0x000156e1 Thumb Code 4 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + drv_i2c_s_enable 0x000156e5 Thumb Code 8 drv_i2c_slave.o(i.drv_i2c_s_enable) + drv_i2c_s_get_fifo_status 0x000156ed Thumb Code 20 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_intr 0x00015701 Thumb Code 74 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + drv_i2c_s_write_data 0x00015751 Thumb Code 28 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x0001576d Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x000157c5 Thumb Code 50 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x000157f9 Thumb Code 20 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x00015811 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x00015829 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x00015859 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x0001586f Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00015893 Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x000158b9 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x000158cf Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x000158e5 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x000158f1 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x0001590f Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00015931 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00015953 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x0001595f Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00015979 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x0001599b Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x000159b5 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x000159c1 Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00015a0d Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00015a13 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00015a25 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00015a45 Thumb Code 58 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_video_hw_mode 0x00015a85 Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00015a99 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x00015ab9 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00015ac5 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00015b05 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00015b11 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x00015b23 Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00015b33 Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00015b41 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x00015b55 Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00015b61 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x00015b71 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x00015b83 Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x00015b93 Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x00015ba9 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00015bc1 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x00015bdb Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00015be9 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00015c11 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x00015c21 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x00015c29 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x00015c3d Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x00015c51 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x00015c59 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_p2r_filter_init 0x00015c6d Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x00015c91 Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x00015ca1 Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x00015cdd Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x00015d3d Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x00015d91 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00015da1 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x00015db9 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x00015dd9 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x00015dff Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwm_out_enable 0x00015e3d Thumb Code 26 drv_pwm.o(i.drv_pwm_out_enable) + drv_pwm_out_set_control 0x00015e5d Thumb Code 6 drv_pwm.o(i.drv_pwm_out_set_control) + drv_pwm_out_set_period 0x00015e69 Thumb Code 6 drv_pwm.o(i.drv_pwm_out_set_period) + drv_pwm_out_set_sync_mode 0x00015e75 Thumb Code 26 drv_pwm.o(i.drv_pwm_out_set_sync_mode) + drv_pwm_out_set_threshold 0x00015e95 Thumb Code 8 drv_pwm.o(i.drv_pwm_out_set_threshold) + drv_pwr_set_cp_mode 0x00015ea1 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x00015ec1 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x00015ed9 Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x00015f57 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00015f61 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00015f65 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x00015fc1 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x00015fd5 Thumb Code 66 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x00016039 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x0001604f Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x00016065 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x00016071 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x00016079 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x00016085 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x00016091 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x000160a5 Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x00016171 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x00016185 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x00016199 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x000161a9 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x000161cf Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x000161d7 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x000161e1 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_enable 0x00016201 Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_set_int 0x0001621d Thumb Code 76 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x00016271 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x0001628d Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00016299 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x000162c1 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x000162d9 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x000162f5 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x00016319 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x0001633d Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x0001634d Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x0001635d Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x0001639b Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x000163bd Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x000163cd Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x00016421 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x00016435 Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x00016445 Thumb Code 80 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x00016499 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x000164c1 Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x000164db Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x000164f7 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00016549 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00016551 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00016569 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x000165a9 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x000165bd Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x000165e5 Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x000165f1 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x000165f7 Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x00016633 Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00016647 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x00016657 Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x0001665f Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x00016685 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x000166ad Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x000166c5 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x000166cf Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x000166df Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x000166e9 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x000166f3 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00016705 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x0001670f Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00016719 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x00016731 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00016761 Thumb Code 60 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x000167a1 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x000167ab Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x000167c1 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x000167f5 Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00016891 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016915 Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x0001693d Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00016965 Thumb Code 88 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_send_ack_cmd 0x0001710d Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_sync_line 0x000171fd Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_hw_tear_mode 0x00017231 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017311 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_start 0x00017345 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x00017381 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x000173bd Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x000179f1 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00017a1d Thumb Code 118 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x00017aa1 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017aed Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x00017b15 Thumb Code 154 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x00017bdd Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_ccm 0x00017be9 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00017c09 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x00017c1d Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x00017c2d Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x00017c51 Thumb Code 140 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00017ced Thumb Code 56 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00017d31 Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00017e09 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x0001809d Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x000180b5 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x000180c9 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x00018109 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x00018129 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00018151 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x00018169 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x000181b9 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x00018219 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x00018221 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x00018241 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x000182ad Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x000182cd Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x000182e9 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x00018325 Thumb Code 62 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x00018371 Thumb Code 176 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x00018439 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x0001844d Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x000185cd Thumb Code 170 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x000186c9 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_get_hight_performan_mode 0x000186d9 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change 0x000186e9 Thumb Code 438 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_update_dpi_param 0x00018915 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + hal_internal_video_mode_auto_sync 0x00018925 Thumb Code 238 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + hal_internal_vsync_deinit 0x00018a31 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00018a59 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00018a65 Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tear_mode 0x00018a7d Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + hal_internal_vsync_get_tx_state 0x00018a89 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00018a95 Thumb Code 236 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00018bad Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x00018c5d Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x00018d79 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x00018d8d Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x00018db1 Thumb Code 72 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00018e01 Thumb Code 118 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_pwm_out_config_all 0x000192c5 Thumb Code 16 hal_pwm.o(i.hal_pwm_out_config_all) + hal_pwm_out_init 0x0001935d Thumb Code 12 hal_pwm.o(i.hal_pwm_out_init) + hal_spi_m_clear_rxfifo 0x00019369 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_deinit 0x00019377 Thumb Code 18 hal_swire.o(i.hal_swire_deinit) + hal_swire_open 0x00019389 Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x0001939f Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x000193a9 Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x00019431 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x0001944d Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x00019455 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x0001945d Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_deinit 0x00019465 Thumb Code 46 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x00019493 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x000194ad Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x000194f5 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x0001951d Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x000195a9 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x000195b9 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x00019809 Thumb Code 10 main.o(i.main) + sqrt 0x0001a4d1 Thumb Code 66 sqrt.o(i.sqrt) + translate_data 0x0001a519 Thumb Code 858 ap_demo.o(i.translate_data) + panel_init_code 0x0001aca0 Data 9967 ap_demo.o(.constdata) + phone_data_21 0x0001d38f Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001d390 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_0 0x0001d391 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_92_1 0x0001d392 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_1 0x0001d393 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_2 0x0001d394 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_3 0x0001d395 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_4 0x0001d396 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001d397 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_92_3 0x0001d39a Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001d39d Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001d3a1 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001d3a5 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001d3a9 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001d3ad Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001d3b1 Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_92_2 0x0001d3b6 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_1 0x0001d3bc Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_2 0x0001d3c2 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_3 0x0001d3c8 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_4 0x0001d3ce Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001d3d4 Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001d3e4 Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_2 0x0001d3ef Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001d40b Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_3 0x0001d415 Data 1224 app_tp_for_custom_s8.o(.constdata) + phone_data_72_5 0x0001d8dd Data 1224 app_tp_for_custom_s8.o(.constdata) + phone_data_72_13 0x0001dda5 Data 1224 app_tp_for_custom_s8.o(.constdata) + phone_data_75_1 0x0001e26d Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_00 0x0001e4d9 Data 660 app_tp_for_custom_s8.o(.constdata) + phone_data_75_FF 0x0001e76d Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_3 0x0001e88d Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_6 0x0001eaf9 Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7 0x0001ed65 Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_08 0x0001efd1 Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_11 0x0001f0f1 Data 620 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001f35d Data 16 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001f7d8 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001f808 Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_start_flag 0x000701d4 Data 1 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701d5 Data 1 ap_demo.o(.data) + panel_mode 0x000701d8 Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701da Data 2 ap_demo.o(.data) + value_reg_b1 0x000701e0 Data 2 ap_demo.o(.data) + value_reg_ca 0x000701e2 Data 2 ap_demo.o(.data) + panel_r 0x000701e4 Data 2 ap_demo.o(.data) + panel_g 0x000701e6 Data 2 ap_demo.o(.data) + panel_b 0x000701e8 Data 2 ap_demo.o(.data) + s_screen_init_complate 0x000701fc Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x00070200 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x00070203 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x00070206 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data2 0x00070209 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data3 0x0007020c Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data6 0x0007020f Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data7 0x00070212 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data8 0x00070215 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data4 0x00070218 Data 4 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data5 0x0007021c Data 4 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x00070220 Data 6 app_tp_transfer.o(.data) + phone_data_E4 0x00070226 Data 1 app_tp_for_custom_s8.o(.data) + tp_flag 0x00070227 Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x00070228 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x00070229 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x0007022a Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x0007022b Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x0007022c Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x0007022d Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x0007022e Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x0007022f Data 1 app_tp_for_custom_s8.o(.data) + phone_data_B1 0x00070238 Data 2 app_tp_for_custom_s8.o(.data) + phone_data_30 0x0007023a Data 2 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x00070244 Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x0007030c Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x0007030d Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x0007030e Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x0007030f Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x00070312 Data 5 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x00070318 Data 48 app_tp_for_custom_s8.o(.data) + g_fls_w_cmd 0x00070378 Data 1 norflash.o(.data) + g_fls_r_cmd 0x00070379 Data 1 norflash.o(.data) + g_fls_write_en_status 0x0007037a Data 1 norflash.o(.data) + isFlsTransferEnd 0x0007037b Data 1 norflash.o(.data) + isFlsFifoReq 0x0007037c Data 1 norflash.o(.data) + isNandWriteCompleted 0x0007037d Data 1 norflash.o(.data) + isNandReadCompleted 0x0007037e Data 1 norflash.o(.data) + g_fls_error_info 0x00070384 Data 6 norflash.o(.data) + g_systick_cb_func 0x00070390 Data 4 drv_common.o(.data) + g_system_clock 0x00070394 Data 4 drv_common.o(.data) + g_scld_fhd_filter_h 0x000703ac Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x000704ac Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x000705ac Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x000706ac Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x000707ac Data 128 drv_param_init.o(.data) + g_ccm_setting 0x0007082c Data 36 drv_param_init.o(.data) + g_sof_gen_te_func 0x000708c4 Data 4 hal_internal_vsync.o(.data) + g_int_rxbr_irq0_cb_func 0x000708c8 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x000708cc Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x000708d0 Data 4 drv_vidc.o(.data) + __stdout 0x000708f8 Data 4 stdout.o(.data) + string 0x00070ba0 Data 256 tau_log.o(.bss) + hal_dmahandle 0x00070ca0 Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x00070d40 Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x00070d60 Data 16 hal_uart.o(.bss) + g_vsync_hande 0x00070f0c Data 100 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00070f70 Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x00071890 Data 4144 dcs_packet_fifo.o(.bss) + g_spis_ctrl_handle 0x000728c0 Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x000728e0 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x000738e0 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000ff38, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000fbe8]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000f808, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 524 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2614 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2924 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2927 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2929 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2931 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2932 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2934 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2936 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2925 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 525 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2617 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2619 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2621 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2623 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 2888 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 2890 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 2892 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 2894 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 2896 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 2898 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 2900 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 2902 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 2904 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 2908 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 2910 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 2912 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 2914 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 2916 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 2918 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 2920 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 2922 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 2939 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 2941 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 2943 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 2945 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 2954 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 2955 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 2957 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 2961 .text mf_p.l(dsqrt.o) + 0x00010afa 0x00010afa 0x00000002 PAD + 0x00010afc 0x00010afc 0x00000040 Code RO 2963 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 2965 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 2967 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000056 Code RO 2977 .text mc_p.l(__dczerorl2.o) + 0x00010bde 0x00010bde 0x00000002 PAD + 0x00010be0 0x00010be0 0x00000018 Code RO 2248 i.ADC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010bf8 0x00010bf8 0x00000018 Code RO 2249 i.AP_NRESET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c10 0x00010c10 0x00000014 Code RO 2250 i.DMA_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c24 0x00010c24 0x0000001c Code RO 2251 i.EXTI_INT0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c40 0x00010c40 0x0000001c Code RO 2252 i.EXTI_INT1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c5c 0x00010c5c 0x0000001c Code RO 2253 i.EXTI_INT2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c78 0x00010c78 0x0000001c Code RO 2254 i.EXTI_INT3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c94 0x00010c94 0x0000001c Code RO 2255 i.EXTI_INT4_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cb0 0x00010cb0 0x0000001c Code RO 2256 i.EXTI_INT5_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ccc 0x00010ccc 0x0000001c Code RO 2257 i.EXTI_INT6_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ce8 0x00010ce8 0x0000001c Code RO 2258 i.EXTI_INT7_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d04 0x00010d04 0x00000014 Code RO 2259 i.FLSCTRL_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d18 0x00010d18 0x0000004e Code RO 99 i.Gpio_swire_output ap_demo.o + 0x00010d66 0x00010d66 0x00000002 PAD + 0x00010d68 0x00010d68 0x00000014 Code RO 2260 i.HardFault_Handler CVWL368.lib(irq_redirect .o) + 0x00010d7c 0x00010d7c 0x00000018 Code RO 2261 i.I2C0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d94 0x00010d94 0x00000018 Code RO 2262 i.I2C1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010dac 0x00010dac 0x00000018 Code RO 2263 i.LCDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010dc4 0x00010dc4 0x00000028 Code RO 990 i.LOG_printf CVWL368.lib(tau_log.o) + 0x00010dec 0x00010dec 0x00000018 Code RO 2264 i.MEMC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e04 0x00010e04 0x00000018 Code RO 2265 i.MIPI_RX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e1c 0x00010e1c 0x00000018 Code RO 2266 i.MIPI_TX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e34 0x00010e34 0x0000001c Code RO 2267 i.PWMDET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e50 0x00010e50 0x00000030 Code RO 100 i.PWM_Task ap_demo.o + 0x00010e80 0x00010e80 0x00000134 Code RO 271 i.S20_Start_init app_tp_transfer.o + 0x00010fb4 0x00010fb4 0x0000001c Code RO 2268 i.SPIM_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010fd0 0x00010fd0 0x0000001c Code RO 2269 i.SPIS_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010fec 0x00010fec 0x00000002 Code RO 2496 i.UART_DisableDma CVWL368.lib(drv_uart.o) + 0x00010fee 0x00010fee 0x00000004 Code RO 2502 i.UART_GetInstance CVWL368.lib(drv_uart.o) + 0x00010ff2 0x00010ff2 0x0000000e Code RO 2971 i.__scatterload_copy mc_p.l(handlers.o) + 0x00011000 0x00011000 0x00000014 Data RO 1112 .ARM.__at_0x11000 CVWL368.lib(drv_common.o) + 0x00011014 0x00011014 0x00000002 Code RO 2972 i.__scatterload_null mc_p.l(handlers.o) + 0x00011016 0x00011016 0x00000001 Data RO 433 .constdata app_tp_for_custom_s8.o + 0x00011017 0x00011017 0x00000001 PAD + 0x00011018 0x00011018 0x00000004 Data RO 1113 .ARM.__at_0x11018 CVWL368.lib(drv_common.o) + 0x0001101c 0x0001101c 0x0000001c Code RO 2270 i.SWIRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011038 0x00011038 0x00000018 Code RO 2271 i.SysTick_Handler CVWL368.lib(irq_redirect .o) + 0x00011050 0x00011050 0x00000018 Code RO 2272 i.TIMER0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011068 0x00011068 0x00000018 Code RO 2273 i.TIMER1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011080 0x00011080 0x00000018 Code RO 2274 i.TIMER2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011098 0x00011098 0x00000018 Code RO 2275 i.TIMER3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110b0 0x000110b0 0x0000001c Code RO 2492 i.UART0_IRQ_Handle CVWL368.lib(drv_uart.o) + 0x000110cc 0x000110cc 0x00000018 Code RO 2276 i.UART_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110e4 0x000110e4 0x00000024 Code RO 2510 i.UART_ResetRxFIFO CVWL368.lib(drv_uart.o) + 0x00011108 0x00011108 0x00000048 Code RO 2513 i.UART_SetBaudRate CVWL368.lib(drv_uart.o) + 0x00011150 0x00011150 0x0000001a Code RO 2514 i.UART_SwitchSCLK CVWL368.lib(drv_uart.o) + 0x0001116a 0x0001116a 0x00000134 Code RO 2516 i.UART_TransferHandleIRQ CVWL368.lib(drv_uart.o) + 0x0001129e 0x0001129e 0x0000001a Code RO 2518 i.UART_WriteBlocking CVWL368.lib(drv_uart.o) + 0x000112b8 0x000112b8 0x000000bc Code RO 2519 i.UART_init CVWL368.lib(drv_uart.o) + 0x00011374 0x00011374 0x00000018 Code RO 2277 i.VIDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001138c 0x0001138c 0x00000018 Code RO 2278 i.VPRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113a4 0x000113a4 0x00000018 Code RO 2279 i.WDG_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113bc 0x000113bc 0x00000020 Code RO 2860 i.__0printf mc_p.l(printfa.o) + 0x000113dc 0x000113dc 0x00000024 Code RO 2866 i.__0vsprintf mc_p.l(printfa.o) + 0x00011400 0x00011400 0x0000002e Code RO 2959 i.__ARM_clz mf_p.l(depilogue.o) + 0x0001142e 0x0001142e 0x0000001a Code RO 622 i.__ARM_common_switch8 CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00011448 0x00011448 0x00000018 Code RO 1433 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_i2c_master.o) + 0x00011460 0x00011460 0x00000018 Code RO 1596 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_spi_master.o) + 0x00011478 0x00011478 0x00000020 Code RO 2102 i.__NVIC_DisableIRQ CVWL368.lib(drv_rxbr.o) + 0x00011498 0x00011498 0x00000018 Code RO 2103 i.__NVIC_EnableIRQ CVWL368.lib(drv_rxbr.o) + 0x000114b0 0x000114b0 0x00000044 Code RO 2398 i.__NVIC_SetPriority CVWL368.lib(hal_spi_slave.o) + 0x000114f4 0x000114f4 0x0000000e Code RO 2973 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x00011502 0x00011502 0x00000002 PAD + 0x00011504 0x00011504 0x0000000c Code RO 2949 i.__set_errno mc_p.l(errno.o) + 0x00011510 0x00011510 0x00000174 Code RO 2867 i._fp_digits mc_p.l(printfa.o) + 0x00011684 0x00011684 0x000006ec Code RO 2868 i._printf_core mc_p.l(printfa.o) + 0x00011d70 0x00011d70 0x00000020 Code RO 2869 i._printf_post_padding mc_p.l(printfa.o) + 0x00011d90 0x00011d90 0x0000002c Code RO 2870 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011dbc 0x00011dbc 0x0000000a Code RO 2872 i._sputc mc_p.l(printfa.o) + 0x00011dc6 0x00011dc6 0x00000002 PAD + 0x00011dc8 0x00011dc8 0x000002e4 Code RO 101 i.ap_dcs_read ap_demo.o + 0x000120ac 0x000120ac 0x00000230 Code RO 102 i.ap_demo ap_demo.o + 0x000122dc 0x000122dc 0x0000006c Code RO 103 i.ap_get_reg_ca ap_demo.o + 0x00012348 0x00012348 0x0000008c Code RO 104 i.ap_get_reg_df ap_demo.o + 0x000123d4 0x000123d4 0x00000074 Code RO 105 i.ap_reset_cb ap_demo.o + 0x00012448 0x00012448 0x0000006c Code RO 106 i.ap_set_backlight ap_demo.o + 0x000124b4 0x000124b4 0x00000054 Code RO 107 i.ap_set_backlight_51 ap_demo.o + 0x00012508 0x00012508 0x00000040 Code RO 108 i.ap_set_display_off ap_demo.o + 0x00012548 0x00012548 0x00000030 Code RO 109 i.ap_set_display_on ap_demo.o + 0x00012578 0x00012578 0x00000084 Code RO 110 i.ap_set_enter_sleep_mode ap_demo.o + 0x000125fc 0x000125fc 0x00000040 Code RO 111 i.ap_set_exit_sleep_mode ap_demo.o + 0x0001263c 0x0001263c 0x0000001c Code RO 112 i.ap_set_tp_calibration_04 ap_demo.o + 0x00012658 0x00012658 0x000000b0 Code RO 272 i.ap_tp_calibration app_tp_transfer.o + 0x00012708 0x00012708 0x0000001c Code RO 2104 i.app_ADC_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00012724 0x00012724 0x00000024 Code RO 1357 i.app_AP_NRESET_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012748 0x00012748 0x0000001c Code RO 1358 i.app_EXTI_INT0_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012764 0x00012764 0x0000001c Code RO 1359 i.app_EXTI_INT1_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012780 0x00012780 0x0000001c Code RO 1360 i.app_EXTI_INT2_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x0001279c 0x0001279c 0x0000001c Code RO 1361 i.app_EXTI_INT3_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000127b8 0x000127b8 0x0000001c Code RO 1362 i.app_EXTI_INT4_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000127d4 0x000127d4 0x0000001c Code RO 1363 i.app_EXTI_INT5_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000127f0 0x000127f0 0x0000001c Code RO 1364 i.app_EXTI_INT6_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x0001280c 0x0001280c 0x0000001c Code RO 1365 i.app_EXTI_INT7_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012828 0x00012828 0x00000048 Code RO 1104 i.app_HardFault_Handler CVWL368.lib(drv_common.o) + 0x00012870 0x00012870 0x00000018 Code RO 1468 i.app_I2C0_IRQn_Handler CVWL368.lib(drv_i2c_slave.o) + 0x00012888 0x00012888 0x00000010 Code RO 1434 i.app_I2C1_IRQn_Handler CVWL368.lib(drv_i2c_master.o) + 0x00012898 0x00012898 0x000001a4 Code RO 1714 i.app_LCDC_IRQn_Handler CVWL368.lib(hal_internal_vsync.o) + 0x00012a3c 0x00012a3c 0x00000088 Code RO 2046 i.app_MEMC_IRQn_Handler CVWL368.lib(drv_memc.o) + 0x00012ac4 0x00012ac4 0x00000298 Code RO 1818 i.app_MIPI_RX_IRQn_Handler CVWL368.lib(drv_dsi_rx.o) + 0x00012d5c 0x00012d5c 0x000000a0 Code RO 1874 i.app_MIPI_TX_IRQn_Handler CVWL368.lib(drv_dsi_tx.o) + 0x00012dfc 0x00012dfc 0x00000048 Code RO 1517 i.app_PWMDET_IRQn_Handler CVWL368.lib(drv_pwm.o) + 0x00012e44 0x00012e44 0x00000030 Code RO 1597 i.app_SPIM_IRQn_Handler CVWL368.lib(drv_spi_master.o) + 0x00012e74 0x00012e74 0x00000200 Code RO 2399 i.app_SPIS_IRQn_Handler CVWL368.lib(hal_spi_slave.o) + 0x00013074 0x00013074 0x00000020 Code RO 1629 i.app_SWIRE_IRQn_Handler CVWL368.lib(drv_swire.o) + 0x00013094 0x00013094 0x00000018 Code RO 1105 i.app_SysTick_Handler CVWL368.lib(drv_common.o) + 0x000130ac 0x000130ac 0x0000000a Code RO 1679 i.app_TIMER0_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000130b6 0x000130b6 0x0000000a Code RO 1680 i.app_TIMER1_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000130c0 0x000130c0 0x0000000a Code RO 1681 i.app_TIMER2_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000130ca 0x000130ca 0x0000000a Code RO 1682 i.app_TIMER3_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000130d4 0x000130d4 0x00000008 Code RO 2520 i.app_UART_IRQn_Handler CVWL368.lib(drv_uart.o) + 0x000130dc 0x000130dc 0x0000001c Code RO 2169 i.app_VIDC_IRQn_Handler CVWL368.lib(drv_vidc.o) + 0x000130f8 0x000130f8 0x0000001c Code RO 2105 i.app_VPRE_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00013114 0x00013114 0x00000038 Code RO 2579 i.app_WDG_IRQn_Handler CVWL368.lib(drv_wdg.o) + 0x0001314c 0x0001314c 0x00000010 Code RO 1219 i.app_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x0001315c 0x0001315c 0x00000030 Code RO 1020 i.app_fls_ctrl_Handler CVWL368.lib(norflash.o) + 0x0001318c 0x0001318c 0x00000024 Code RO 273 i.app_tp_I2C_init app_tp_transfer.o + 0x000131b0 0x000131b0 0x0000005c Code RO 113 i.app_tp_calibration_exec ap_demo.o + 0x0001320c 0x0001320c 0x00000030 Code RO 274 i.app_tp_i2cs_callback app_tp_transfer.o + 0x0001323c 0x0001323c 0x00000054 Code RO 275 i.app_tp_init app_tp_transfer.o + 0x00013290 0x00013290 0x00000020 Code RO 276 i.app_tp_m_read app_tp_transfer.o + 0x000132b0 0x000132b0 0x00000008 Code RO 278 i.app_tp_m_write app_tp_transfer.o + 0x000132b8 0x000132b8 0x00000368 Code RO 415 i.app_tp_phone_analysis_data app_tp_for_custom_s8.o + 0x00013620 0x00013620 0x0000000c Code RO 279 i.app_tp_phone_clear_reset_on app_tp_transfer.o + 0x0001362c 0x0001362c 0x00000008 Code RO 281 i.app_tp_s_read app_tp_transfer.o + 0x00013634 0x00013634 0x00000008 Code RO 283 i.app_tp_s_write app_tp_transfer.o + 0x0001363c 0x0001363c 0x000002ec Code RO 417 i.app_tp_screen_analysis_int app_tp_for_custom_s8.o + 0x00013928 0x00013928 0x00000030 Code RO 284 i.app_tp_screen_init app_tp_transfer.o + 0x00013958 0x00013958 0x0000000c Code RO 285 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00013964 0x00013964 0x00000040 Code RO 286 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x000139a4 0x000139a4 0x000000f4 Code RO 287 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x00013a98 0x00013a98 0x00000014 Code RO 288 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x00013aac 0x00013aac 0x00000024 Code RO 504 i.board_Init board.o + 0x00013ad0 0x00013ad0 0x000004f0 Code RO 1715 i.calc_framebuffer_setting CVWL368.lib(hal_internal_vsync.o) + 0x00013fc0 0x00013fc0 0x000000c8 Code RO 2603 i.ceil m_ps.l(ceil.o) + 0x00014088 0x00014088 0x0000002c Code RO 1716 i.check_mipi_rx_tx_video_info CVWL368.lib(hal_internal_vsync.o) + 0x000140b4 0x000140b4 0x00000094 Code RO 1717 i.check_pkt_buf_rev CVWL368.lib(hal_internal_vsync.o) + 0x00014148 0x00014148 0x00000058 Code RO 1805 i.dcs_packet_fifo_alloc CVWL368.lib(dcs_packet_fifo.o) + 0x000141a0 0x000141a0 0x00000018 Code RO 1806 i.dcs_packet_fifo_init CVWL368.lib(dcs_packet_fifo.o) + 0x000141b8 0x000141b8 0x00000044 Code RO 1807 i.dcs_packet_free_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x000141fc 0x000141fc 0x00000024 Code RO 1808 i.dcs_packet_get_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x00014220 0x00014220 0x0000001c Code RO 1718 i.dcs_sw_filter CVWL368.lib(hal_internal_vsync.o) + 0x0001423c 0x0001423c 0x00000018 Code RO 982 i.delayMs CVWL368.lib(tau_delay.o) + 0x00014254 0x00014254 0x00000022 Code RO 983 i.delayUs CVWL368.lib(tau_delay.o) + 0x00014276 0x00014276 0x00000002 PAD + 0x00014278 0x00014278 0x00000038 Code RO 1648 i.drv_ap_rst_trig_edge_detect CVWL368.lib(drv_sys_cfg.o) + 0x000142b0 0x000142b0 0x0000000c Code RO 2369 i.drv_chip_info_get_info CVWL368.lib(drv_chip_info.o) + 0x000142bc 0x000142bc 0x00000040 Code RO 2370 i.drv_chip_info_init CVWL368.lib(drv_chip_info.o) + 0x000142fc 0x000142fc 0x000000b0 Code RO 2371 i.drv_chip_rx_info_check CVWL368.lib(drv_chip_info.o) + 0x000143ac 0x000143ac 0x00000014 Code RO 2372 i.drv_chip_rx_init_done CVWL368.lib(drv_chip_info.o) + 0x000143c0 0x000143c0 0x00000058 Code RO 1107 i.drv_common_enable_systick CVWL368.lib(drv_common.o) + 0x00014418 0x00014418 0x00000008 Code RO 1110 i.drv_common_system_init CVWL368.lib(drv_common.o) + 0x00014420 0x00014420 0x00000010 Code RO 1132 i.drv_crgu_config_reset_modules CVWL368.lib(drv_crgu.o) + 0x00014430 0x00014430 0x00000014 Code RO 1145 i.drv_crgu_set_ahb_pre_div CVWL368.lib(drv_crgu.o) + 0x00014444 0x00014444 0x00000014 Code RO 1146 i.drv_crgu_set_ahb_src CVWL368.lib(drv_crgu.o) + 0x00014458 0x00014458 0x00000020 Code RO 1149 i.drv_crgu_set_clock CVWL368.lib(drv_crgu.o) + 0x00014478 0x00014478 0x00000014 Code RO 1150 i.drv_crgu_set_dpi_mux_src CVWL368.lib(drv_crgu.o) + 0x0001448c 0x0001448c 0x00000018 Code RO 1151 i.drv_crgu_set_dpi_pre_div CVWL368.lib(drv_crgu.o) + 0x000144a4 0x000144a4 0x00000014 Code RO 1152 i.drv_crgu_set_dpi_pre_src CVWL368.lib(drv_crgu.o) + 0x000144b8 0x000144b8 0x00000014 Code RO 1153 i.drv_crgu_set_dsc_core_div CVWL368.lib(drv_crgu.o) + 0x000144cc 0x000144cc 0x00000014 Code RO 1154 i.drv_crgu_set_dsco_src CVWL368.lib(drv_crgu.o) + 0x000144e0 0x000144e0 0x00000014 Code RO 1155 i.drv_crgu_set_dsco_src_div CVWL368.lib(drv_crgu.o) + 0x000144f4 0x000144f4 0x00000014 Code RO 1156 i.drv_crgu_set_fb_div CVWL368.lib(drv_crgu.o) + 0x00014508 0x00014508 0x00000014 Code RO 1157 i.drv_crgu_set_fb_src CVWL368.lib(drv_crgu.o) + 0x0001451c 0x0001451c 0x00000014 Code RO 1160 i.drv_crgu_set_lcdc_div CVWL368.lib(drv_crgu.o) + 0x00014530 0x00014530 0x00000014 Code RO 1161 i.drv_crgu_set_lcdc_src CVWL368.lib(drv_crgu.o) + 0x00014544 0x00014544 0x00000014 Code RO 1162 i.drv_crgu_set_mipi_cfg_src CVWL368.lib(drv_crgu.o) + 0x00014558 0x00014558 0x00000018 Code RO 1163 i.drv_crgu_set_mipi_ref_src CVWL368.lib(drv_crgu.o) + 0x00014570 0x00014570 0x00000018 Code RO 1166 i.drv_crgu_set_reset CVWL368.lib(drv_crgu.o) + 0x00014588 0x00014588 0x00000014 Code RO 1167 i.drv_crgu_set_rxbr_div CVWL368.lib(drv_crgu.o) + 0x0001459c 0x0001459c 0x00000014 Code RO 1168 i.drv_crgu_set_rxbr_src CVWL368.lib(drv_crgu.o) + 0x000145b0 0x000145b0 0x00000014 Code RO 1170 i.drv_crgu_set_vidc_src CVWL368.lib(drv_crgu.o) + 0x000145c4 0x000145c4 0x00000018 Code RO 1223 i.drv_dma_clear_flag CVWL368.lib(drv_dma.o) + 0x000145dc 0x000145dc 0x0000001c Code RO 1224 i.drv_dma_create_handle CVWL368.lib(drv_dma.o) + 0x000145f8 0x000145f8 0x00000010 Code RO 1226 i.drv_dma_disenable_channel CVWL368.lib(drv_dma.o) + 0x00014608 0x00014608 0x00000010 Code RO 1228 i.drv_dma_enable_channel CVWL368.lib(drv_dma.o) + 0x00014618 0x00014618 0x00000024 Code RO 1229 i.drv_dma_enable_channel_interrupts CVWL368.lib(drv_dma.o) + 0x0001463c 0x0001463c 0x0000000c Code RO 1231 i.drv_dma_get_channel_flag CVWL368.lib(drv_dma.o) + 0x00014648 0x00014648 0x00000090 Code RO 1234 i.drv_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x000146d8 0x000146d8 0x00000012 Code RO 1236 i.drv_dma_prepar_transfer CVWL368.lib(drv_dma.o) + 0x000146ea 0x000146ea 0x0000001a Code RO 1238 i.drv_dma_set_burst CVWL368.lib(drv_dma.o) + 0x00014704 0x00014704 0x00000006 Code RO 1239 i.drv_dma_set_callback CVWL368.lib(drv_dma.o) + 0x0001470a 0x0001470a 0x00000002 PAD + 0x0001470c 0x0001470c 0x00000044 Code RO 1241 i.drv_dma_set_transfer CVWL368.lib(drv_dma.o) + 0x00014750 0x00014750 0x00000036 Code RO 2382 i.drv_dsc_dec_convert_pps_rc_parameter CVWL368.lib(drv_dsc_dec.o) + 0x00014786 0x00014786 0x0000000c Code RO 2383 i.drv_dsc_dec_disable CVWL368.lib(drv_dsc_dec.o) + 0x00014792 0x00014792 0x00000002 PAD + 0x00014794 0x00014794 0x00000074 Code RO 2384 i.drv_dsc_dec_enable CVWL368.lib(drv_dsc_dec.o) + 0x00014808 0x00014808 0x0000000a Code RO 2385 i.drv_dsc_dec_get_nslc CVWL368.lib(drv_dsc_dec.o) + 0x00014812 0x00014812 0x00000028 Code RO 2387 i.drv_dsc_dec_set_u8_pps CVWL368.lib(drv_dsc_dec.o) + 0x0001483a 0x0001483a 0x00000002 PAD + 0x0001483c 0x0001483c 0x00000104 Code RO 1819 i.drv_dsi_rx_calc_ipi_tx_delay CVWL368.lib(drv_dsi_rx.o) + 0x00014940 0x00014940 0x00000040 Code RO 1820 i.drv_dsi_rx_enable_irq CVWL368.lib(drv_dsi_rx.o) + 0x00014980 0x00014980 0x00000050 Code RO 1821 i.drv_dsi_rx_get_color_bpp CVWL368.lib(drv_dsi_rx.o) + 0x000149d0 0x000149d0 0x0000001c Code RO 1822 i.drv_dsi_rx_get_color_pcc CVWL368.lib(drv_dsi_rx.o) + 0x000149ec 0x000149ec 0x00000008 Code RO 1823 i.drv_dsi_rx_get_compression_en CVWL368.lib(drv_dsi_rx.o) + 0x000149f4 0x000149f4 0x00000006 Code RO 1824 i.drv_dsi_rx_get_max_ret_size CVWL368.lib(drv_dsi_rx.o) + 0x000149fa 0x000149fa 0x0000000e Code RO 1828 i.drv_dsi_rx_power_up CVWL368.lib(drv_dsi_rx.o) + 0x00014a08 0x00014a08 0x00000020 Code RO 1829 i.drv_dsi_rx_set_ctrl_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014a28 0x00014a28 0x00000010 Code RO 1830 i.drv_dsi_rx_set_ddi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014a38 0x00014a38 0x00000004 Code RO 1832 i.drv_dsi_rx_set_inten CVWL368.lib(drv_dsi_rx.o) + 0x00014a3c 0x00014a3c 0x00000010 Code RO 1833 i.drv_dsi_rx_set_ipi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014a4c 0x00014a4c 0x00000046 Code RO 1835 i.drv_dsi_rx_set_lane_swap CVWL368.lib(drv_dsi_rx.o) + 0x00014a92 0x00014a92 0x00000026 Code RO 1836 i.drv_dsi_rx_set_resp_cnt CVWL368.lib(drv_dsi_rx.o) + 0x00014ab8 0x00014ab8 0x00000104 Code RO 1837 i.drv_dsi_rx_set_up_phy CVWL368.lib(drv_dsi_rx.o) + 0x00014bbc 0x00014bbc 0x0000000e Code RO 1838 i.drv_dsi_rx_shut_down CVWL368.lib(drv_dsi_rx.o) + 0x00014bca 0x00014bca 0x00000014 Code RO 1876 i.drv_dsi_tx_command_header CVWL368.lib(drv_dsi_tx.o) + 0x00014bde 0x00014bde 0x0000006c Code RO 1877 i.drv_dsi_tx_command_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00014c4a 0x00014c4a 0x00000004 Code RO 1878 i.drv_dsi_tx_command_put_payload CVWL368.lib(drv_dsi_tx.o) + 0x00014c4e 0x00014c4e 0x00000018 Code RO 1879 i.drv_dsi_tx_config_eotp CVWL368.lib(drv_dsi_tx.o) + 0x00014c66 0x00014c66 0x00000008 Code RO 1880 i.drv_dsi_tx_config_int CVWL368.lib(drv_dsi_tx.o) + 0x00014c6e 0x00014c6e 0x00000008 Code RO 1881 i.drv_dsi_tx_dpi_lpcmd_time CVWL368.lib(drv_dsi_tx.o) + 0x00014c76 0x00014c76 0x0000000a Code RO 1882 i.drv_dsi_tx_dpi_mode CVWL368.lib(drv_dsi_tx.o) + 0x00014c80 0x00014c80 0x00000024 Code RO 1883 i.drv_dsi_tx_dpi_polarity CVWL368.lib(drv_dsi_tx.o) + 0x00014ca4 0x00014ca4 0x00000004 Code RO 1884 i.drv_dsi_tx_edpi_cmd_size CVWL368.lib(drv_dsi_tx.o) + 0x00014ca8 0x00014ca8 0x00000004 Code RO 1886 i.drv_dsi_tx_get_cmd_status CVWL368.lib(drv_dsi_tx.o) + 0x00014cac 0x00014cac 0x00000004 Code RO 1888 i.drv_dsi_tx_mode CVWL368.lib(drv_dsi_tx.o) + 0x00014cb0 0x00014cb0 0x00000018 Code RO 1889 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL368.lib(drv_dsi_tx.o) + 0x00014cc8 0x00014cc8 0x0000001a Code RO 1890 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL368.lib(drv_dsi_tx.o) + 0x00014ce2 0x00014ce2 0x0000000c Code RO 1892 i.drv_dsi_tx_phy_lane_mode CVWL368.lib(drv_dsi_tx.o) + 0x00014cee 0x00014cee 0x00000064 Code RO 1896 i.drv_dsi_tx_phy_status_ready CVWL368.lib(drv_dsi_tx.o) + 0x00014d52 0x00014d52 0x0000003e Code RO 1897 i.drv_dsi_tx_phy_status_stopstate CVWL368.lib(drv_dsi_tx.o) + 0x00014d90 0x00014d90 0x00000134 Code RO 1899 i.drv_dsi_tx_phy_test_setup CVWL368.lib(drv_dsi_tx.o) + 0x00014ec4 0x00014ec4 0x0000001e Code RO 1900 i.drv_dsi_tx_phy_time_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00014ee2 0x00014ee2 0x00000008 Code RO 1904 i.drv_dsi_tx_powerup CVWL368.lib(drv_dsi_tx.o) + 0x00014eea 0x00014eea 0x0000001c Code RO 1905 i.drv_dsi_tx_response_mode CVWL368.lib(drv_dsi_tx.o) + 0x00014f06 0x00014f06 0x00000018 Code RO 1908 i.drv_dsi_tx_set_bta_ack CVWL368.lib(drv_dsi_tx.o) + 0x00014f1e 0x00014f1e 0x0000000c Code RO 1909 i.drv_dsi_tx_set_esc_div CVWL368.lib(drv_dsi_tx.o) + 0x00014f2a 0x00014f2a 0x00000002 PAD + 0x00014f2c 0x00014f2c 0x00000040 Code RO 1910 i.drv_dsi_tx_set_int CVWL368.lib(drv_dsi_tx.o) + 0x00014f6c 0x00014f6c 0x00000010 Code RO 1911 i.drv_dsi_tx_set_time_out_div CVWL368.lib(drv_dsi_tx.o) + 0x00014f7c 0x00014f7c 0x00000008 Code RO 1912 i.drv_dsi_tx_set_video_chunk CVWL368.lib(drv_dsi_tx.o) + 0x00014f84 0x00014f84 0x00000022 Code RO 1913 i.drv_dsi_tx_set_video_timing CVWL368.lib(drv_dsi_tx.o) + 0x00014fa6 0x00014fa6 0x00000008 Code RO 1915 i.drv_dsi_tx_shutdown CVWL368.lib(drv_dsi_tx.o) + 0x00014fae 0x00014fae 0x00000026 Code RO 1916 i.drv_dsi_tx_timeout_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00014fd4 0x00014fd4 0x000000aa Code RO 1919 i.drv_dsi_tx_video_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x0001507e 0x0001507e 0x00000016 Code RO 1920 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL368.lib(drv_dsi_tx.o) + 0x00015094 0x00015094 0x00000018 Code RO 1921 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL368.lib(drv_dsi_tx.o) + 0x000150ac 0x000150ac 0x0000002e Code RO 2320 i.drv_efuse_enter_inactive CVWL368.lib(drv_efuse.o) + 0x000150da 0x000150da 0x0000000c Code RO 2323 i.drv_efuse_int_enable CVWL368.lib(drv_efuse.o) + 0x000150e6 0x000150e6 0x00000032 Code RO 2324 i.drv_efuse_read CVWL368.lib(drv_efuse.o) + 0x00015118 0x00015118 0x00000018 Code RO 2325 i.drv_efuse_read_req CVWL368.lib(drv_efuse.o) + 0x00015130 0x00015130 0x00000018 Code RO 1366 i.drv_gpio_get_input_data CVWL368.lib(drv_gpio.o) + 0x00015148 0x00015148 0x0000000c Code RO 1368 i.drv_gpio_register_ap_reset_callback CVWL368.lib(drv_gpio.o) + 0x00015154 0x00015154 0x00000014 Code RO 1369 i.drv_gpio_register_callback CVWL368.lib(drv_gpio.o) + 0x00015168 0x00015168 0x00000050 Code RO 1371 i.drv_gpio_set_int CVWL368.lib(drv_gpio.o) + 0x000151b8 0x000151b8 0x00000020 Code RO 1372 i.drv_gpio_set_ioe CVWL368.lib(drv_gpio.o) + 0x000151d8 0x000151d8 0x00000010 Code RO 1373 i.drv_gpio_set_mode0 CVWL368.lib(drv_gpio.o) + 0x000151e8 0x000151e8 0x00000010 Code RO 1374 i.drv_gpio_set_mode1 CVWL368.lib(drv_gpio.o) + 0x000151f8 0x000151f8 0x00000010 Code RO 1375 i.drv_gpio_set_mode2 CVWL368.lib(drv_gpio.o) + 0x00015208 0x00015208 0x00000010 Code RO 1376 i.drv_gpio_set_mode3 CVWL368.lib(drv_gpio.o) + 0x00015218 0x00015218 0x00000020 Code RO 730 i.drv_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x00015238 0x00015238 0x00000130 Code RO 1377 i.drv_gpio_set_pull_state CVWL368.lib(drv_gpio.o) + 0x00015368 0x00015368 0x0000000c Code RO 1469 i.drv_i2c0_set_callback CVWL368.lib(drv_i2c_slave.o) + 0x00015374 0x00015374 0x0000000c Code RO 1435 i.drv_i2c1_set_callback CVWL368.lib(drv_i2c_master.o) + 0x00015380 0x00015380 0x00000034 Code RO 1409 i.drv_i2c_dma_callback CVWL368.lib(drv_i2c_dma.o) + 0x000153b4 0x000153b4 0x000000ac Code RO 1410 i.drv_i2c_dma_init CVWL368.lib(drv_i2c_dma.o) + 0x00015460 0x00015460 0x0000001a Code RO 1411 i.drv_i2c_enable_rx_dma CVWL368.lib(drv_i2c_dma.o) + 0x0001547a 0x0001547a 0x00000018 Code RO 1412 i.drv_i2c_enable_tx_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015492 0x00015492 0x00000002 PAD + 0x00015494 0x00015494 0x00000060 Code RO 1437 i.drv_i2c_m_clear_it_pending_bit CVWL368.lib(drv_i2c_master.o) + 0x000154f4 0x000154f4 0x00000010 Code RO 1440 i.drv_i2c_m_enable CVWL368.lib(drv_i2c_master.o) + 0x00015504 0x00015504 0x00000038 Code RO 1441 i.drv_i2c_m_enable_intr CVWL368.lib(drv_i2c_master.o) + 0x0001553c 0x0001553c 0x0000008c Code RO 1447 i.drv_i2c_master_init CVWL368.lib(drv_i2c_master.o) + 0x000155c8 0x000155c8 0x0000005c Code RO 1413 i.drv_i2c_master_read_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015624 0x00015624 0x0000003c Code RO 1414 i.drv_i2c_master_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015660 0x00015660 0x0000003e Code RO 1415 i.drv_i2c_master_write_read_cmd CVWL368.lib(drv_i2c_dma.o) + 0x0001569e 0x0001569e 0x00000042 Code RO 1470 i.drv_i2c_s_clear_it_pending_bit CVWL368.lib(drv_i2c_slave.o) + 0x000156e0 0x000156e0 0x00000004 Code RO 1471 i.drv_i2c_s_config_intr CVWL368.lib(drv_i2c_slave.o) + 0x000156e4 0x000156e4 0x00000008 Code RO 1472 i.drv_i2c_s_enable CVWL368.lib(drv_i2c_slave.o) + 0x000156ec 0x000156ec 0x00000014 Code RO 1473 i.drv_i2c_s_get_fifo_status CVWL368.lib(drv_i2c_slave.o) + 0x00015700 0x00015700 0x00000050 Code RO 1476 i.drv_i2c_s_set_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015750 0x00015750 0x0000001c Code RO 1477 i.drv_i2c_s_write_data CVWL368.lib(drv_i2c_slave.o) + 0x0001576c 0x0001576c 0x00000058 Code RO 1416 i.drv_i2c_set_dma_irq_callback CVWL368.lib(drv_i2c_dma.o) + 0x000157c4 0x000157c4 0x00000032 Code RO 1478 i.drv_i2c_slave_init CVWL368.lib(drv_i2c_slave.o) + 0x000157f6 0x000157f6 0x00000002 PAD + 0x000157f8 0x000157f8 0x00000018 Code RO 1417 i.drv_i2c_slave_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015810 0x00015810 0x00000018 Code RO 1988 i.drv_lcdc_config_bypass CVWL368.lib(drv_lcdc.o) + 0x00015828 0x00015828 0x00000030 Code RO 1989 i.drv_lcdc_config_ccm CVWL368.lib(drv_lcdc.o) + 0x00015858 0x00015858 0x00000016 Code RO 1990 i.drv_lcdc_config_disp_mode CVWL368.lib(drv_lcdc.o) + 0x0001586e 0x0001586e 0x00000024 Code RO 1991 i.drv_lcdc_config_dpi_polarity CVWL368.lib(drv_lcdc.o) + 0x00015892 0x00015892 0x00000026 Code RO 1992 i.drv_lcdc_config_dpi_timing CVWL368.lib(drv_lcdc.o) + 0x000158b8 0x000158b8 0x00000016 Code RO 1993 i.drv_lcdc_config_edpi_mode CVWL368.lib(drv_lcdc.o) + 0x000158ce 0x000158ce 0x00000016 Code RO 1994 i.drv_lcdc_config_endianness CVWL368.lib(drv_lcdc.o) + 0x000158e4 0x000158e4 0x0000000c Code RO 1995 i.drv_lcdc_config_input_size CVWL368.lib(drv_lcdc.o) + 0x000158f0 0x000158f0 0x0000001e Code RO 1996 i.drv_lcdc_config_int CVWL368.lib(drv_lcdc.o) + 0x0001590e 0x0001590e 0x00000022 Code RO 1997 i.drv_lcdc_config_int_single CVWL368.lib(drv_lcdc.o) + 0x00015930 0x00015930 0x00000022 Code RO 1998 i.drv_lcdc_config_overwrite CVWL368.lib(drv_lcdc.o) + 0x00015952 0x00015952 0x0000000c Code RO 1999 i.drv_lcdc_config_overwrite_rgb CVWL368.lib(drv_lcdc.o) + 0x0001595e 0x0001595e 0x0000001a Code RO 2000 i.drv_lcdc_config_partial_display_area CVWL368.lib(drv_lcdc.o) + 0x00015978 0x00015978 0x00000022 Code RO 2001 i.drv_lcdc_config_partial_display_enable CVWL368.lib(drv_lcdc.o) + 0x0001599a 0x0001599a 0x0000001a Code RO 2003 i.drv_lcdc_config_scale_up_coef CVWL368.lib(drv_lcdc.o) + 0x000159b4 0x000159b4 0x0000000c Code RO 2004 i.drv_lcdc_config_scale_up_step CVWL368.lib(drv_lcdc.o) + 0x000159c0 0x000159c0 0x0000004c Code RO 2005 i.drv_lcdc_config_src_parameter CVWL368.lib(drv_lcdc.o) + 0x00015a0c 0x00015a0c 0x00000006 Code RO 2006 i.drv_lcdc_config_thresh CVWL368.lib(drv_lcdc.o) + 0x00015a12 0x00015a12 0x00000012 Code RO 2007 i.drv_lcdc_ctrl_flow CVWL368.lib(drv_lcdc.o) + 0x00015a24 0x00015a24 0x00000020 Code RO 2009 i.drv_lcdc_enable_shadow_reg CVWL368.lib(drv_lcdc.o) + 0x00015a44 0x00015a44 0x00000040 Code RO 2010 i.drv_lcdc_set_int CVWL368.lib(drv_lcdc.o) + 0x00015a84 0x00015a84 0x00000014 Code RO 2012 i.drv_lcdc_set_video_hw_mode CVWL368.lib(drv_lcdc.o) + 0x00015a98 0x00015a98 0x00000020 Code RO 2013 i.drv_lcdc_start CVWL368.lib(drv_lcdc.o) + 0x00015ab8 0x00015ab8 0x0000000c Code RO 2047 i.drv_memc_clear_status CVWL368.lib(drv_memc.o) + 0x00015ac4 0x00015ac4 0x00000040 Code RO 2048 i.drv_memc_enable_irq CVWL368.lib(drv_memc.o) + 0x00015b04 0x00015b04 0x0000000c Code RO 2049 i.drv_memc_gen_a_tear_signal CVWL368.lib(drv_memc.o) + 0x00015b10 0x00015b10 0x00000012 Code RO 2050 i.drv_memc_get_status CVWL368.lib(drv_memc.o) + 0x00015b22 0x00015b22 0x00000010 Code RO 2051 i.drv_memc_rate_transfer_sel CVWL368.lib(drv_memc.o) + 0x00015b32 0x00015b32 0x0000000e Code RO 2052 i.drv_memc_sel_vsync CVWL368.lib(drv_memc.o) + 0x00015b40 0x00015b40 0x00000014 Code RO 2053 i.drv_memc_set_active_height CVWL368.lib(drv_memc.o) + 0x00015b54 0x00015b54 0x0000000c Code RO 2054 i.drv_memc_set_data_mode CVWL368.lib(drv_memc.o) + 0x00015b60 0x00015b60 0x00000010 Code RO 2057 i.drv_memc_set_double_buffer CVWL368.lib(drv_memc.o) + 0x00015b70 0x00015b70 0x00000012 Code RO 2058 i.drv_memc_set_double_buffer_reverse CVWL368.lib(drv_memc.o) + 0x00015b82 0x00015b82 0x00000010 Code RO 2060 i.drv_memc_set_fs_en_conditions CVWL368.lib(drv_memc.o) + 0x00015b92 0x00015b92 0x00000014 Code RO 2061 i.drv_memc_set_inten CVWL368.lib(drv_memc.o) + 0x00015ba6 0x00015ba6 0x00000002 PAD + 0x00015ba8 0x00015ba8 0x00000018 Code RO 2062 i.drv_memc_set_lcdc_st_conditions CVWL368.lib(drv_memc.o) + 0x00015bc0 0x00015bc0 0x0000001a Code RO 2063 i.drv_memc_set_ltpo_mode CVWL368.lib(drv_memc.o) + 0x00015bda 0x00015bda 0x0000000e Code RO 2067 i.drv_memc_set_tear_mode CVWL368.lib(drv_memc.o) + 0x00015be8 0x00015be8 0x00000028 Code RO 2068 i.drv_memc_set_tear_waveform CVWL368.lib(drv_memc.o) + 0x00015c10 0x00015c10 0x0000000e Code RO 2070 i.drv_memc_set_vidc_sync_cnt CVWL368.lib(drv_memc.o) + 0x00015c1e 0x00015c1e 0x00000002 PAD + 0x00015c20 0x00015c20 0x00000008 Code RO 1495 i.drv_param_init_get_ccm CVWL368.lib(drv_param_init.o) + 0x00015c28 0x00015c28 0x00000014 Code RO 1496 i.drv_param_init_get_scld_filter_h CVWL368.lib(drv_param_init.o) + 0x00015c3c 0x00015c3c 0x00000014 Code RO 1497 i.drv_param_init_get_scld_filter_v CVWL368.lib(drv_param_init.o) + 0x00015c50 0x00015c50 0x00000008 Code RO 1498 i.drv_param_init_get_sclu_filter CVWL368.lib(drv_param_init.o) + 0x00015c58 0x00015c58 0x00000014 Code RO 1499 i.drv_param_init_set_ccm CVWL368.lib(drv_param_init.o) + 0x00015c6c 0x00015c6c 0x00000024 Code RO 1502 i.drv_param_p2r_filter_init CVWL368.lib(drv_param_init.o) + 0x00015c90 0x00015c90 0x00000010 Code RO 2341 i.drv_phy_enable_calibration CVWL368.lib(drv_phy_common.o) + 0x00015ca0 0x00015ca0 0x0000003c Code RO 2342 i.drv_phy_get_calibration CVWL368.lib(drv_phy_common.o) + 0x00015cdc 0x00015cdc 0x00000060 Code RO 2343 i.drv_phy_get_pll_para CVWL368.lib(drv_phy_common.o) + 0x00015d3c 0x00015d3c 0x00000054 Code RO 2344 i.drv_phy_get_rate_para CVWL368.lib(drv_phy_common.o) + 0x00015d90 0x00015d90 0x00000010 Code RO 2345 i.drv_phy_test_clear CVWL368.lib(drv_phy_common.o) + 0x00015da0 0x00015da0 0x00000018 Code RO 2346 i.drv_phy_test_lock CVWL368.lib(drv_phy_common.o) + 0x00015db8 0x00015db8 0x00000020 Code RO 2348 i.drv_phy_test_write_1_byte CVWL368.lib(drv_phy_common.o) + 0x00015dd8 0x00015dd8 0x00000026 Code RO 2349 i.drv_phy_test_write_2_byte CVWL368.lib(drv_phy_common.o) + 0x00015dfe 0x00015dfe 0x0000001e Code RO 2350 i.drv_phy_test_write_code CVWL368.lib(drv_phy_common.o) + 0x00015e1c 0x00015e1c 0x00000020 Code RO 2351 i.drv_phy_test_write_data CVWL368.lib(drv_phy_common.o) + 0x00015e3c 0x00015e3c 0x00000020 Code RO 1527 i.drv_pwm_out_enable CVWL368.lib(drv_pwm.o) + 0x00015e5c 0x00015e5c 0x0000000c Code RO 1530 i.drv_pwm_out_set_control CVWL368.lib(drv_pwm.o) + 0x00015e68 0x00015e68 0x0000000c Code RO 1531 i.drv_pwm_out_set_period CVWL368.lib(drv_pwm.o) + 0x00015e74 0x00015e74 0x00000020 Code RO 1532 i.drv_pwm_out_set_sync_mode CVWL368.lib(drv_pwm.o) + 0x00015e94 0x00015e94 0x0000000c Code RO 1533 i.drv_pwm_out_set_threshold CVWL368.lib(drv_pwm.o) + 0x00015ea0 0x00015ea0 0x00000020 Code RO 1557 i.drv_pwr_set_cp_mode CVWL368.lib(drv_pwr.o) + 0x00015ec0 0x00015ec0 0x00000018 Code RO 1559 i.drv_pwr_set_pvd_mode CVWL368.lib(drv_pwr.o) + 0x00015ed8 0x00015ed8 0x00000038 Code RO 1560 i.drv_pwr_set_system_clk_src CVWL368.lib(drv_pwr.o) + 0x00015f10 0x00015f10 0x0000000c Code RO 1839 i.drv_rx_phy_test_clear CVWL368.lib(drv_dsi_rx.o) + 0x00015f1c 0x00015f1c 0x00000010 Code RO 1840 i.drv_rx_phy_test_lock CVWL368.lib(drv_dsi_rx.o) + 0x00015f2c 0x00015f2c 0x00000014 Code RO 1842 i.drv_rx_phy_test_write_1_byte CVWL368.lib(drv_dsi_rx.o) + 0x00015f40 0x00015f40 0x00000016 Code RO 1843 i.drv_rx_phy_test_write_2_byte CVWL368.lib(drv_dsi_rx.o) + 0x00015f56 0x00015f56 0x0000000a Code RO 2106 i.drv_rxbr_clear_pkt_buffer CVWL368.lib(drv_rxbr.o) + 0x00015f60 0x00015f60 0x00000004 Code RO 2107 i.drv_rxbr_clear_status0 CVWL368.lib(drv_rxbr.o) + 0x00015f64 0x00015f64 0x0000005a Code RO 2109 i.drv_rxbr_enable_irq CVWL368.lib(drv_rxbr.o) + 0x00015fbe 0x00015fbe 0x00000002 PAD + 0x00015fc0 0x00015fc0 0x00000014 Code RO 2110 i.drv_rxbr_frame_drop_cfg CVWL368.lib(drv_rxbr.o) + 0x00015fd4 0x00015fd4 0x00000064 Code RO 2111 i.drv_rxbr_get_clk CVWL368.lib(drv_rxbr.o) + 0x00016038 0x00016038 0x00000004 Code RO 2112 i.drv_rxbr_get_col_addr CVWL368.lib(drv_rxbr.o) + 0x0001603c 0x0001603c 0x00000012 Code RO 1719 i.drv_rxbr_get_int_source CVWL368.lib(hal_internal_vsync.o) + 0x0001604e 0x0001604e 0x00000004 Code RO 2115 i.drv_rxbr_get_page_addr CVWL368.lib(drv_rxbr.o) + 0x00016052 0x00016052 0x00000012 Code RO 1720 i.drv_rxbr_get_status0 CVWL368.lib(hal_internal_vsync.o) + 0x00016064 0x00016064 0x0000000c Code RO 2117 i.drv_rxbr_hline_rcv0_cfg CVWL368.lib(drv_rxbr.o) + 0x00016070 0x00016070 0x00000008 Code RO 2118 i.drv_rxbr_hline_rcv_cfg CVWL368.lib(drv_rxbr.o) + 0x00016078 0x00016078 0x0000000c Code RO 2119 i.drv_rxbr_register_irq0_callback CVWL368.lib(drv_rxbr.o) + 0x00016084 0x00016084 0x0000000c Code RO 2120 i.drv_rxbr_register_irq1_callback CVWL368.lib(drv_rxbr.o) + 0x00016090 0x00016090 0x00000014 Code RO 2121 i.drv_rxbr_set_ack_pkt_header CVWL368.lib(drv_rxbr.o) + 0x000160a4 0x000160a4 0x000000cc Code RO 2122 i.drv_rxbr_set_cmd_filter CVWL368.lib(drv_rxbr.o) + 0x00016170 0x00016170 0x00000014 Code RO 2124 i.drv_rxbr_set_color_format CVWL368.lib(drv_rxbr.o) + 0x00016184 0x00016184 0x00000014 Code RO 2126 i.drv_rxbr_set_inten CVWL368.lib(drv_rxbr.o) + 0x00016198 0x00016198 0x00000010 Code RO 2127 i.drv_rxbr_set_ltpo_drop_th CVWL368.lib(drv_rxbr.o) + 0x000161a8 0x000161a8 0x00000026 Code RO 2129 i.drv_rxbr_set_usr_cfg CVWL368.lib(drv_rxbr.o) + 0x000161ce 0x000161ce 0x00000008 Code RO 2130 i.drv_rxbr_set_usr_col CVWL368.lib(drv_rxbr.o) + 0x000161d6 0x000161d6 0x00000008 Code RO 2131 i.drv_rxbr_set_usr_row CVWL368.lib(drv_rxbr.o) + 0x000161de 0x000161de 0x00000002 PAD + 0x000161e0 0x000161e0 0x00000020 Code RO 1605 i.drv_spi_m_read_data CVWL368.lib(drv_spi_master.o) + 0x00016200 0x00016200 0x0000001c Code RO 1630 i.drv_swire_enable CVWL368.lib(drv_swire.o) + 0x0001621c 0x0001621c 0x00000054 Code RO 1633 i.drv_swire_set_int CVWL368.lib(drv_swire.o) + 0x00016270 0x00016270 0x0000001c Code RO 1634 i.drv_swire_set_power_down CVWL368.lib(drv_swire.o) + 0x0001628c 0x0001628c 0x0000000c Code RO 1649 i.drv_sys_cfg_clear_all_int CVWL368.lib(drv_sys_cfg.o) + 0x00016298 0x00016298 0x00000028 Code RO 1650 i.drv_sys_cfg_clear_pending CVWL368.lib(drv_sys_cfg.o) + 0x000162c0 0x000162c0 0x00000018 Code RO 1653 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL368.lib(drv_sys_cfg.o) + 0x000162d8 0x000162d8 0x0000001c Code RO 1654 i.drv_sys_cfg_sel_ap_rst_trig CVWL368.lib(drv_sys_cfg.o) + 0x000162f4 0x000162f4 0x00000024 Code RO 1655 i.drv_sys_cfg_sel_gpio_group CVWL368.lib(drv_sys_cfg.o) + 0x00016318 0x00016318 0x00000024 Code RO 1656 i.drv_sys_cfg_sel_int_trig CVWL368.lib(drv_sys_cfg.o) + 0x0001633c 0x0001633c 0x00000010 Code RO 1658 i.drv_sys_cfg_set_dma_rx_req CVWL368.lib(drv_sys_cfg.o) + 0x0001634c 0x0001634c 0x00000010 Code RO 1659 i.drv_sys_cfg_set_dma_tx_req CVWL368.lib(drv_sys_cfg.o) + 0x0001635c 0x0001635c 0x00000024 Code RO 1660 i.drv_sys_cfg_set_int CVWL368.lib(drv_sys_cfg.o) + 0x00016380 0x00016380 0x0000001a Code RO 1683 i.drv_timer_clear_status_flags CVWL368.lib(drv_timer.o) + 0x0001639a 0x0001639a 0x00000020 Code RO 1684 i.drv_timer_enable CVWL368.lib(drv_timer.o) + 0x000163ba 0x000163ba 0x00000002 PAD + 0x000163bc 0x000163bc 0x00000010 Code RO 1685 i.drv_timer_get_instance CVWL368.lib(drv_timer.o) + 0x000163cc 0x000163cc 0x00000010 Code RO 1686 i.drv_timer_get_prescaler CVWL368.lib(drv_timer.o) + 0x000163dc 0x000163dc 0x00000044 Code RO 1688 i.drv_timer_handle_interrupt CVWL368.lib(drv_timer.o) + 0x00016420 0x00016420 0x00000014 Code RO 1689 i.drv_timer_register_callback CVWL368.lib(drv_timer.o) + 0x00016434 0x00016434 0x00000010 Code RO 1690 i.drv_timer_set_compare_val CVWL368.lib(drv_timer.o) + 0x00016444 0x00016444 0x00000054 Code RO 1691 i.drv_timer_set_int CVWL368.lib(drv_timer.o) + 0x00016498 0x00016498 0x00000028 Code RO 1692 i.drv_timer_set_prescaler CVWL368.lib(drv_timer.o) + 0x000164c0 0x000164c0 0x00000010 Code RO 1693 i.drv_timer_set_repeat CVWL368.lib(drv_timer.o) + 0x000164d0 0x000164d0 0x0000000a Code RO 1922 i.drv_tx_phy_test_clear CVWL368.lib(drv_dsi_tx.o) + 0x000164da 0x000164da 0x0000001c Code RO 1923 i.drv_tx_phy_test_enter CVWL368.lib(drv_dsi_tx.o) + 0x000164f6 0x000164f6 0x0000001c Code RO 1924 i.drv_tx_phy_test_exit CVWL368.lib(drv_dsi_tx.o) + 0x00016512 0x00016512 0x00000012 Code RO 1926 i.drv_tx_phy_test_write_1_byte CVWL368.lib(drv_dsi_tx.o) + 0x00016524 0x00016524 0x00000014 Code RO 1927 i.drv_tx_phy_test_write_2_byte CVWL368.lib(drv_dsi_tx.o) + 0x00016538 0x00016538 0x00000010 Code RO 1928 i.drv_tx_phy_test_write_code CVWL368.lib(drv_dsi_tx.o) + 0x00016548 0x00016548 0x00000008 Code RO 2170 i.drv_vidc_clear_irq CVWL368.lib(drv_vidc.o) + 0x00016550 0x00016550 0x00000018 Code RO 2174 i.drv_vidc_enable CVWL368.lib(drv_vidc.o) + 0x00016568 0x00016568 0x00000040 Code RO 2175 i.drv_vidc_enable_irq CVWL368.lib(drv_vidc.o) + 0x000165a8 0x000165a8 0x00000012 Code RO 2177 i.drv_vidc_get_irq_status CVWL368.lib(drv_vidc.o) + 0x000165ba 0x000165ba 0x00000002 PAD + 0x000165bc 0x000165bc 0x00000028 Code RO 2181 i.drv_vidc_init_module_enable CVWL368.lib(drv_vidc.o) + 0x000165e4 0x000165e4 0x0000000c Code RO 2182 i.drv_vidc_register_callback CVWL368.lib(drv_vidc.o) + 0x000165f0 0x000165f0 0x00000006 Code RO 2183 i.drv_vidc_reset CVWL368.lib(drv_vidc.o) + 0x000165f6 0x000165f6 0x0000003c Code RO 2185 i.drv_vidc_set_dst_parameter CVWL368.lib(drv_vidc.o) + 0x00016632 0x00016632 0x00000014 Code RO 2189 i.drv_vidc_set_irqen CVWL368.lib(drv_vidc.o) + 0x00016646 0x00016646 0x00000010 Code RO 2190 i.drv_vidc_set_mirror CVWL368.lib(drv_vidc.o) + 0x00016656 0x00016656 0x00000008 Code RO 2193 i.drv_vidc_set_p2r_hcoef0 CVWL368.lib(drv_vidc.o) + 0x0001665e 0x0001665e 0x00000026 Code RO 2194 i.drv_vidc_set_p2r_hinitb CVWL368.lib(drv_vidc.o) + 0x00016684 0x00016684 0x00000026 Code RO 2195 i.drv_vidc_set_p2r_hinitr CVWL368.lib(drv_vidc.o) + 0x000166aa 0x000166aa 0x00000002 PAD + 0x000166ac 0x000166ac 0x00000018 Code RO 2196 i.drv_vidc_set_pentile_swap CVWL368.lib(drv_vidc.o) + 0x000166c4 0x000166c4 0x0000000a Code RO 2197 i.drv_vidc_set_pu_ctrl CVWL368.lib(drv_vidc.o) + 0x000166ce 0x000166ce 0x00000010 Code RO 2198 i.drv_vidc_set_rotation CVWL368.lib(drv_vidc.o) + 0x000166de 0x000166de 0x0000000a Code RO 2199 i.drv_vidc_set_scld_hcoef0 CVWL368.lib(drv_vidc.o) + 0x000166e8 0x000166e8 0x0000000a Code RO 2200 i.drv_vidc_set_scld_hcoef1 CVWL368.lib(drv_vidc.o) + 0x000166f2 0x000166f2 0x00000012 Code RO 2201 i.drv_vidc_set_scld_step CVWL368.lib(drv_vidc.o) + 0x00016704 0x00016704 0x0000000a Code RO 2202 i.drv_vidc_set_scld_vcoef0 CVWL368.lib(drv_vidc.o) + 0x0001670e 0x0001670e 0x0000000a Code RO 2203 i.drv_vidc_set_scld_vcoef1 CVWL368.lib(drv_vidc.o) + 0x00016718 0x00016718 0x00000016 Code RO 2204 i.drv_vidc_set_src_parameter CVWL368.lib(drv_vidc.o) + 0x0001672e 0x0001672e 0x00000002 PAD + 0x00016730 0x00016730 0x00000010 Code RO 2580 i.drv_wdg_clear_counter CVWL368.lib(drv_wdg.o) + 0x00016740 0x00016740 0x00000010 Code RO 2581 i.drv_wdg_clear_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016750 0x00016750 0x00000010 Code RO 2584 i.drv_wdg_read_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016760 0x00016760 0x00000040 Code RO 2587 i.drv_wdg_set_int CVWL368.lib(drv_wdg.o) + 0x000167a0 0x000167a0 0x0000000a Code RO 1278 i.fls_clr_interrupt_flag CVWL368.lib(drv_fls.o) + 0x000167aa 0x000167aa 0x00000014 Code RO 992 i.fputc CVWL368.lib(tau_log.o) + 0x000167be 0x000167be 0x00000002 PAD + 0x000167c0 0x000167c0 0x00000034 Code RO 533 i.hal_dsi_rx_ctrl_create_handle CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000167f4 0x000167f4 0x0000009c Code RO 535 i.hal_dsi_rx_ctrl_deinit CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016890 0x00016890 0x00000084 Code RO 537 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016914 0x00016914 0x00000028 Code RO 539 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001693c 0x0001693c 0x00000028 Code RO 541 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016964 0x00016964 0x00000060 Code RO 543 i.hal_dsi_rx_ctrl_init CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000169c4 0x000169c4 0x000001a4 Code RO 544 i.hal_dsi_rx_ctrl_init_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016b68 0x00016b68 0x000000d8 Code RO 545 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016c40 0x00016c40 0x00000158 Code RO 546 i.hal_dsi_rx_ctrl_init_memc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016d98 0x00016d98 0x00000148 Code RO 547 i.hal_dsi_rx_ctrl_init_rxbr CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016ee0 0x00016ee0 0x0000022c Code RO 548 i.hal_dsi_rx_ctrl_init_vidc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001710c 0x0001710c 0x000000f0 Code RO 552 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000171fc 0x000171fc 0x00000034 Code RO 556 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017230 0x00017230 0x00000034 Code RO 559 i.hal_dsi_rx_ctrl_set_hw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017264 0x00017264 0x00000038 Code RO 560 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001729c 0x0001729c 0x00000072 Code RO 565 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001730e 0x0001730e 0x00000002 PAD + 0x00017310 0x00017310 0x00000034 Code RO 566 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017344 0x00017344 0x0000003c Code RO 569 i.hal_dsi_rx_ctrl_start CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017380 0x00017380 0x0000003c Code RO 570 i.hal_dsi_rx_ctrl_stop CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000173bc 0x000173bc 0x00000020 Code RO 572 i.hal_dsi_rx_ctrl_toggle_resolution CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000173dc 0x000173dc 0x00000190 Code RO 626 i.hal_dsi_tx_calc_video_chunks CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001756c 0x0001756c 0x00000034 Code RO 627 i.hal_dsi_tx_config_params_for_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000175a0 0x000175a0 0x00000450 Code RO 628 i.hal_dsi_tx_count_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000179f0 0x000179f0 0x0000002c Code RO 631 i.hal_dsi_tx_ctrl_create_handle CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017a1c 0x00017a1c 0x00000084 Code RO 632 i.hal_dsi_tx_ctrl_deinit CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017aa0 0x00017aa0 0x0000004c Code RO 636 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017aec 0x00017aec 0x00000028 Code RO 638 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017b14 0x00017b14 0x000000a4 Code RO 640 i.hal_dsi_tx_ctrl_init CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017bb8 0x00017bb8 0x00000024 Code RO 641 i.hal_dsi_tx_ctrl_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017bdc 0x00017bdc 0x0000000c Code RO 642 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017be8 0x00017be8 0x00000020 Code RO 645 i.hal_dsi_tx_ctrl_set_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017c08 0x00017c08 0x00000014 Code RO 651 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017c1c 0x00017c1c 0x00000010 Code RO 652 i.hal_dsi_tx_ctrl_set_partial_disp CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017c2c 0x00017c2c 0x00000024 Code RO 653 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017c50 0x00017c50 0x0000009c Code RO 656 i.hal_dsi_tx_ctrl_start CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017cec 0x00017cec 0x00000044 Code RO 657 i.hal_dsi_tx_ctrl_stop CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017d30 0x00017d30 0x000000d8 Code RO 658 i.hal_dsi_tx_ctrl_write_array_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017e08 0x00017e08 0x000000b0 Code RO 659 i.hal_dsi_tx_ctrl_write_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017eb8 0x00017eb8 0x00000044 Code RO 660 i.hal_dsi_tx_init_data_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017efc 0x00017efc 0x00000030 Code RO 661 i.hal_dsi_tx_init_dpi_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f2c 0x00017f2c 0x00000020 Code RO 662 i.hal_dsi_tx_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f4c 0x00017f4c 0x00000020 Code RO 663 i.hal_dsi_tx_init_phy_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f6c 0x00017f6c 0x00000094 Code RO 664 i.hal_dsi_tx_init_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018000 0x00018000 0x00000058 Code RO 665 i.hal_dsi_tx_init_video_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018058 0x00018058 0x00000044 Code RO 666 i.hal_dsi_tx_send_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001809c 0x0001809c 0x00000018 Code RO 731 i.hal_gpio_ctrl_eint CVWL368.lib(hal_gpio.o) + 0x000180b4 0x000180b4 0x00000012 Code RO 732 i.hal_gpio_get_input_data CVWL368.lib(hal_gpio.o) + 0x000180c6 0x000180c6 0x00000002 PAD + 0x000180c8 0x000180c8 0x00000040 Code RO 735 i.hal_gpio_init_eint CVWL368.lib(hal_gpio.o) + 0x00018108 0x00018108 0x00000020 Code RO 736 i.hal_gpio_init_input CVWL368.lib(hal_gpio.o) + 0x00018128 0x00018128 0x00000028 Code RO 737 i.hal_gpio_init_output CVWL368.lib(hal_gpio.o) + 0x00018150 0x00018150 0x00000018 Code RO 738 i.hal_gpio_reg_eint_cb CVWL368.lib(hal_gpio.o) + 0x00018168 0x00018168 0x00000050 Code RO 739 i.hal_gpio_set_ap_reset_int CVWL368.lib(hal_gpio.o) + 0x000181b8 0x000181b8 0x00000060 Code RO 741 i.hal_gpio_set_mode CVWL368.lib(hal_gpio.o) + 0x00018218 0x00018218 0x00000008 Code RO 742 i.hal_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x00018220 0x00018220 0x00000020 Code RO 744 i.hal_gpio_set_pull_state CVWL368.lib(hal_gpio.o) + 0x00018240 0x00018240 0x0000006c Code RO 770 i.hal_i2c_m_dma_init CVWL368.lib(hal_i2c_master.o) + 0x000182ac 0x000182ac 0x00000020 Code RO 771 i.hal_i2c_m_dma_read CVWL368.lib(hal_i2c_master.o) + 0x000182cc 0x000182cc 0x0000001c Code RO 772 i.hal_i2c_m_dma_write CVWL368.lib(hal_i2c_master.o) + 0x000182e8 0x000182e8 0x0000000c Code RO 774 i.hal_i2c_m_transfer_complate CVWL368.lib(hal_i2c_master.o) + 0x000182f4 0x000182f4 0x00000020 Code RO 775 i.hal_i2c_master_irq_callback CVWL368.lib(hal_i2c_master.o) + 0x00018314 0x00018314 0x00000010 Code RO 789 i.hal_i2c_s_dma_user_callback CVWL368.lib(hal_i2c_slave.o) + 0x00018324 0x00018324 0x0000004c Code RO 790 i.hal_i2c_s_dma_write CVWL368.lib(hal_i2c_slave.o) + 0x00018370 0x00018370 0x000000c8 Code RO 792 i.hal_i2c_s_init CVWL368.lib(hal_i2c_slave.o) + 0x00018438 0x00018438 0x00000014 Code RO 793 i.hal_i2c_s_nonblocking_read CVWL368.lib(hal_i2c_slave.o) + 0x0001844c 0x0001844c 0x0000000c Code RO 801 i.hal_i2c_s_set_transfer CVWL368.lib(hal_i2c_slave.o) + 0x00018458 0x00018458 0x00000174 Code RO 804 i.hal_i2c_slave_irq_callback CVWL368.lib(hal_i2c_slave.o) + 0x000185cc 0x000185cc 0x000000fc Code RO 1721 i.hal_internal_init_memc CVWL368.lib(hal_internal_vsync.o) + 0x000186c8 0x000186c8 0x00000010 Code RO 1723 i.hal_internal_sync_get_fb_setting CVWL368.lib(hal_internal_vsync.o) + 0x000186d8 0x000186d8 0x00000010 Code RO 1724 i.hal_internal_sync_get_hight_performan_mode CVWL368.lib(hal_internal_vsync.o) + 0x000186e8 0x000186e8 0x0000022c Code RO 1725 i.hal_internal_sync_input_resolution_change CVWL368.lib(hal_internal_vsync.o) + 0x00018914 0x00018914 0x00000010 Code RO 1728 i.hal_internal_update_dpi_param CVWL368.lib(hal_internal_vsync.o) + 0x00018924 0x00018924 0x0000010c Code RO 1729 i.hal_internal_video_mode_auto_sync CVWL368.lib(hal_internal_vsync.o) + 0x00018a30 0x00018a30 0x00000028 Code RO 1730 i.hal_internal_vsync_deinit CVWL368.lib(hal_internal_vsync.o) + 0x00018a58 0x00018a58 0x0000000c Code RO 1731 i.hal_internal_vsync_get_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018a64 0x00018a64 0x00000018 Code RO 1732 i.hal_internal_vsync_get_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00018a7c 0x00018a7c 0x0000000c Code RO 1733 i.hal_internal_vsync_get_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x00018a88 0x00018a88 0x0000000c Code RO 1734 i.hal_internal_vsync_get_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018a94 0x00018a94 0x00000118 Code RO 1735 i.hal_internal_vsync_init_rx CVWL368.lib(hal_internal_vsync.o) + 0x00018bac 0x00018bac 0x000000b0 Code RO 1736 i.hal_internal_vsync_init_tx CVWL368.lib(hal_internal_vsync.o) + 0x00018c5c 0x00018c5c 0x0000011c Code RO 1737 i.hal_internal_vsync_set_auto_hw_filter CVWL368.lib(hal_internal_vsync.o) + 0x00018d78 0x00018d78 0x00000014 Code RO 1739 i.hal_internal_vsync_set_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018d8c 0x00018d8c 0x00000024 Code RO 1740 i.hal_internal_vsync_set_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00018db0 0x00018db0 0x00000050 Code RO 1741 i.hal_internal_vsync_set_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x00018e00 0x00018e00 0x00000080 Code RO 1742 i.hal_internal_vsync_set_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018e80 0x00018e80 0x00000024 Code RO 667 i.hal_lcdc_config_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018ea4 0x00018ea4 0x00000058 Code RO 668 i.hal_lcdc_config_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018efc 0x00018efc 0x00000014 Code RO 669 i.hal_lcdc_config_rgb_to_pentile CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018f10 0x00018f10 0x00000164 Code RO 670 i.hal_lcdc_config_upscaler CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019074 0x00019074 0x00000040 Code RO 671 i.hal_lcdc_init_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000190b4 0x000190b4 0x000001b0 Code RO 672 i.hal_lcdc_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019264 0x00019264 0x00000040 Code RO 673 i.hal_lcdc_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000192a4 0x000192a4 0x00000020 Code RO 839 i.hal_pwm_out_common_config CVWL368.lib(hal_pwm.o) + 0x000192c4 0x000192c4 0x00000010 Code RO 840 i.hal_pwm_out_config_all CVWL368.lib(hal_pwm.o) + 0x000192d4 0x000192d4 0x00000088 Code RO 842 i.hal_pwm_out_convert_time CVWL368.lib(hal_pwm.o) + 0x0001935c 0x0001935c 0x0000000c Code RO 844 i.hal_pwm_out_init CVWL368.lib(hal_pwm.o) + 0x00019368 0x00019368 0x0000000e Code RO 882 i.hal_spi_m_clear_rxfifo CVWL368.lib(hal_spi_master.o) + 0x00019376 0x00019376 0x00000012 Code RO 906 i.hal_swire_deinit CVWL368.lib(hal_swire.o) + 0x00019388 0x00019388 0x00000016 Code RO 908 i.hal_swire_open CVWL368.lib(hal_swire.o) + 0x0001939e 0x0001939e 0x00000008 Code RO 923 i.hal_system_enable_systick CVWL368.lib(hal_system.o) + 0x000193a6 0x000193a6 0x00000002 PAD + 0x000193a8 0x000193a8 0x00000088 Code RO 931 i.hal_system_init CVWL368.lib(hal_system.o) + 0x00019430 0x00019430 0x0000001c Code RO 932 i.hal_system_init_console CVWL368.lib(hal_system.o) + 0x0001944c 0x0001944c 0x00000008 Code RO 935 i.hal_system_set_phy_calibration CVWL368.lib(hal_system.o) + 0x00019454 0x00019454 0x00000008 Code RO 936 i.hal_system_set_pvd CVWL368.lib(hal_system.o) + 0x0001945c 0x0001945c 0x00000008 Code RO 937 i.hal_system_set_vcc CVWL368.lib(hal_system.o) + 0x00019464 0x00019464 0x0000002e Code RO 964 i.hal_timer_deinit CVWL368.lib(hal_timer.o) + 0x00019492 0x00019492 0x0000001a Code RO 966 i.hal_timer_init CVWL368.lib(hal_timer.o) + 0x000194ac 0x000194ac 0x00000048 Code RO 968 i.hal_timer_start CVWL368.lib(hal_timer.o) + 0x000194f4 0x000194f4 0x00000028 Code RO 970 i.hal_timer_stop CVWL368.lib(hal_timer.o) + 0x0001951c 0x0001951c 0x0000008c Code RO 1003 i.hal_uart_init CVWL368.lib(hal_uart.o) + 0x000195a8 0x000195a8 0x00000010 Code RO 1006 i.hal_uart_transmit_blocking CVWL368.lib(hal_uart.o) + 0x000195b8 0x000195b8 0x00000110 Code RO 2280 i.handle_init CVWL368.lib(irq_redirect .o) + 0x000196c8 0x000196c8 0x00000074 Code RO 114 i.init_mipi_tx ap_demo.o + 0x0001973c 0x0001973c 0x000000cc Code RO 115 i.init_panel ap_demo.o + 0x00019808 0x00019808 0x0000000a Code RO 3 i.main main.o + 0x00019812 0x00019812 0x00000002 PAD + 0x00019814 0x00019814 0x00000088 Code RO 116 i.open_mipi_rx ap_demo.o + 0x0001989c 0x0001989c 0x00000064 Code RO 117 i.pps_update_handle ap_demo.o + 0x00019900 0x00019900 0x000003f4 Code RO 1746 i.rx_get_dcs_packet_data CVWL368.lib(hal_internal_vsync.o) + 0x00019cf4 0x00019cf4 0x00000178 Code RO 1747 i.rx_partial_update CVWL368.lib(hal_internal_vsync.o) + 0x00019e6c 0x00019e6c 0x0000008c Code RO 1748 i.rx_receive_packet CVWL368.lib(hal_internal_vsync.o) + 0x00019ef8 0x00019ef8 0x00000180 Code RO 1749 i.rx_receive_pps CVWL368.lib(hal_internal_vsync.o) + 0x0001a078 0x0001a078 0x000000a4 Code RO 1750 i.rxbr_irq0_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a11c 0x0001a11c 0x000001d4 Code RO 1751 i.rxbr_irq1_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a2f0 0x0001a2f0 0x000000c4 Code RO 1752 i.soft_gen_te CVWL368.lib(hal_internal_vsync.o) + 0x0001a3b4 0x0001a3b4 0x000000c0 Code RO 1753 i.soft_gen_te_double_buffer CVWL368.lib(hal_internal_vsync.o) + 0x0001a474 0x0001a474 0x0000002c Code RO 118 i.soft_te_timer_cb ap_demo.o + 0x0001a4a0 0x0001a4a0 0x00000030 Code RO 119 i.soft_timer3_cb ap_demo.o + 0x0001a4d0 0x0001a4d0 0x00000048 Code RO 2607 i.sqrt m_ps.l(sqrt.o) + 0x0001a518 0x0001a518 0x0000036c Code RO 120 i.translate_data ap_demo.o + 0x0001a884 0x0001a884 0x00000108 Code RO 1754 i.vidc_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a98c 0x0001a98c 0x000000d0 Code RO 1755 i.vpre_err_reset CVWL368.lib(hal_internal_vsync.o) + 0x0001aa5c 0x0001aa5c 0x000001cc Code RO 1756 i.vsync_set_te_mode CVWL368.lib(hal_internal_vsync.o) + 0x0001ac28 0x0001ac28 0x00002767 Data RO 121 .constdata ap_demo.o + 0x0001d38f 0x0001d38f 0x00001fde Data RO 418 .constdata app_tp_for_custom_s8.o + 0x0001f36d 0x0001f36d 0x00000003 PAD + 0x0001f370 0x0001f370 0x00000024 Data RO 675 .constdata CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001f394 0x0001f394 0x000000d2 Data RO 747 .constdata CVWL368.lib(hal_gpio.o) + 0x0001f466 0x0001f466 0x00000002 PAD + 0x0001f468 0x0001f468 0x00000020 Data RO 805 .constdata CVWL368.lib(hal_i2c_slave.o) + 0x0001f488 0x0001f488 0x00000008 Data RO 1503 .constdata CVWL368.lib(drv_param_init.o) + 0x0001f490 0x0001f490 0x00000186 Data RO 2352 .constdata CVWL368.lib(drv_phy_common.o) + 0x0001f616 0x0001f616 0x00000002 PAD + 0x0001f618 0x0001f618 0x00000048 Data RO 575 .conststring CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001f660 0x0001f660 0x00000043 Data RO 676 .conststring CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001f6a3 0x0001f6a3 0x00000001 PAD + 0x0001f6a4 0x0001f6a4 0x00000134 Data RO 1758 .conststring CVWL368.lib(hal_internal_vsync.o) + 0x0001f7d8 0x0001f7d8 0x00000030 Data RO 2969 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001f808, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001f808, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2281 .ARM.__AT_0x00070100 CVWL368.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001f808, Size: 0x00003710, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x000003e0]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x00000028 Data RW 122 .data ap_demo.o + 0x000701f8 COMPRESSED 0x0000002e Data RW 290 .data app_tp_transfer.o + 0x00070226 COMPRESSED 0x000000e6 Data RW 434 .data app_tp_for_custom_s8.o + 0x0007030c COMPRESSED 0x00000001 Data RW 437 .data app_tp_for_custom_s8.o + 0x0007030d COMPRESSED 0x00000001 Data RW 438 .data app_tp_for_custom_s8.o + 0x0007030e COMPRESSED 0x00000001 Data RW 443 .data app_tp_for_custom_s8.o + 0x0007030f COMPRESSED 0x00000003 Data RW 444 .data app_tp_for_custom_s8.o + 0x00070312 COMPRESSED 0x00000005 Data RW 445 .data app_tp_for_custom_s8.o + 0x00070317 COMPRESSED 0x00000001 PAD + 0x00070318 COMPRESSED 0x00000030 Data RW 455 .data app_tp_for_custom_s8.o + 0x00070348 COMPRESSED 0x00000008 Data RW 576 .data CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00070350 COMPRESSED 0x00000003 Data RW 677 .data CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00070353 COMPRESSED 0x00000001 Data RW 776 .data CVWL368.lib(hal_i2c_master.o) + 0x00070354 COMPRESSED 0x00000020 Data RW 806 .data CVWL368.lib(hal_i2c_slave.o) + 0x00070374 COMPRESSED 0x00000001 Data RW 852 .data CVWL368.lib(hal_pwm.o) + 0x00070375 COMPRESSED 0x00000003 PAD + 0x00070378 COMPRESSED 0x00000012 Data RW 1060 .data CVWL368.lib(norflash.o) + 0x0007038a COMPRESSED 0x00000002 PAD + 0x0007038c COMPRESSED 0x0000000c Data RW 1114 .data CVWL368.lib(drv_common.o) + 0x00070398 COMPRESSED 0x00000004 Data RW 1381 .data CVWL368.lib(drv_gpio.o) + 0x0007039c COMPRESSED 0x00000008 Data RW 1419 .data CVWL368.lib(drv_i2c_dma.o) + 0x000703a4 COMPRESSED 0x00000004 Data RW 1448 .data CVWL368.lib(drv_i2c_master.o) + 0x000703a8 COMPRESSED 0x00000004 Data RW 1479 .data CVWL368.lib(drv_i2c_slave.o) + 0x000703ac COMPRESSED 0x000004a4 Data RW 1504 .data CVWL368.lib(drv_param_init.o) + 0x00070850 COMPRESSED 0x0000000c Data RW 1534 .data CVWL368.lib(drv_pwm.o) + 0x0007085c COMPRESSED 0x00000004 Data RW 1610 .data CVWL368.lib(drv_spi_master.o) + 0x00070860 COMPRESSED 0x00000008 Data RW 1636 .data CVWL368.lib(drv_swire.o) + 0x00070868 COMPRESSED 0x00000001 Data RW 1661 .data CVWL368.lib(drv_sys_cfg.o) + 0x00070869 COMPRESSED 0x00000003 PAD + 0x0007086c COMPRESSED 0x00000050 Data RW 1694 .data CVWL368.lib(drv_timer.o) + 0x000708bc COMPRESSED 0x0000000c Data RW 1759 .data CVWL368.lib(hal_internal_vsync.o) + 0x000708c8 COMPRESSED 0x00000008 Data RW 2133 .data CVWL368.lib(drv_rxbr.o) + 0x000708d0 COMPRESSED 0x00000004 Data RW 2206 .data CVWL368.lib(drv_vidc.o) + 0x000708d4 COMPRESSED 0x00000001 Data RW 2353 .data CVWL368.lib(drv_phy_common.o) + 0x000708d5 COMPRESSED 0x00000003 PAD + 0x000708d8 COMPRESSED 0x0000000c Data RW 2373 .data CVWL368.lib(drv_chip_info.o) + 0x000708e4 COMPRESSED 0x00000008 Data RW 2522 .data CVWL368.lib(drv_uart.o) + 0x000708ec COMPRESSED 0x0000000c Data RW 2589 .data CVWL368.lib(drv_wdg.o) + 0x000708f8 COMPRESSED 0x00000004 Data RW 2938 .data mc_p.l(stdout.o) + 0x000708fc COMPRESSED 0x00000004 Data RW 2950 .data mc_p.l(errno.o) + 0x00070900 - 0x00000190 Zero RW 289 .bss app_tp_transfer.o + 0x00070a90 - 0x000000c4 Zero RW 574 .bss CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00070b54 - 0x0000004c Zero RW 674 .bss CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00070ba0 - 0x00000100 Zero RW 993 .bss CVWL368.lib(tau_log.o) + 0x00070ca0 - 0x000000d0 Zero RW 1008 .bss CVWL368.lib(hal_uart.o) + 0x00070d70 - 0x0000001c Zero RW 1243 .bss CVWL368.lib(drv_dma.o) + 0x00070d8c - 0x00000040 Zero RW 1380 .bss CVWL368.lib(drv_gpio.o) + 0x00070dcc - 0x00000140 Zero RW 1418 .bss CVWL368.lib(drv_i2c_dma.o) + 0x00070f0c - 0x00000984 Zero RW 1757 .bss CVWL368.lib(hal_internal_vsync.o) + 0x00071890 - 0x00001030 Zero RW 1810 .bss CVWL368.lib(dcs_packet_fifo.o) + 0x000728c0 - 0x00000020 Zero RW 2417 .bss CVWL368.lib(hal_spi_slave.o) + 0x000728e0 - 0x00001000 Zero RW 522 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 3934 858 10087 40 0 36919 ap_demo.o + 1620 62 8159 289 0 14244 app_tp_for_custom_s8.o + 1108 116 0 46 400 13366 app_tp_transfer.o + 36 6 0 0 0 509 board.o + 10 0 0 0 0 9639 main.o + 120 18 192 0 4096 2096 startup_armcm0.o + + ---------------------------------------------------------------------- + 6832 1060 18490 376 4496 76773 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 4 0 4 1 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 272 96 0 12 0 256 drv_chip_info.o + 192 82 24 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 410 28 0 0 28 796 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1644 494 0 0 0 1336 drv_dsi_rx.o + 1528 118 0 0 0 2428 drv_dsi_tx.o + 132 0 0 0 0 256 drv_efuse.o + 10 0 0 0 0 60 drv_fls.o + 796 112 0 4 64 1236 drv_gpio.o + 600 82 0 8 320 624 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 292 36 0 4 0 580 drv_i2c_slave.o + 680 6 0 0 0 1444 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 112 36 8 1188 0 376 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 172 38 0 12 0 376 drv_pwm.o + 112 24 0 0 0 180 drv_pwr.o + 722 84 0 8 0 1456 drv_rxbr.o + 104 24 0 4 0 188 drv_spi_master.o + 172 20 0 8 0 260 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 374 34 0 80 0 932 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 168 22 0 12 0 316 drv_wdg.o + 3124 310 72 8 196 1528 hal_dsi_rx_ctrl.o + 4324 302 103 3 76 2408 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 696 72 32 32 0 408 hal_i2c_slave.o + 8032 1706 308 12 2436 2616 hal_internal_vsync.o + 196 12 0 1 0 296 hal_pwm.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 40 0 0 0 0 136 hal_swire.o + 196 32 0 0 0 408 hal_system.o + 184 6 0 0 0 276 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 37022 4868 1152 1464 7952 35272 Library Totals + 48 0 5 11 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 31594 4662 1147 1445 7952 31996 CVWL368.lib + 272 26 0 0 0 152 m_ps.l + 2838 126 0 8 0 1264 mc_p.l + 2270 54 0 0 0 1860 mf_p.l + + ---------------------------------------------------------------------- + 37022 4868 1152 1464 7952 35272 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 43854 5928 19642 1840 12448 87605 Grand Totals + 43854 5928 19642 992 12448 87605 ELF Image Totals (compressed) + 43854 5928 19642 992 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 63496 ( 62.01kB) + Total RW Size (RW Data + ZI Data) 14288 ( 13.95kB) + Total ROM Size (Code + RO Data + RW Data) 64488 ( 62.98kB) + +============================================================================== + diff --git a/project/ISP_368/Listings/WL368_NOTE10_HX628_CA.map b/project/ISP_368/Listings/WL368_NOTE10_HX628_CA.map new file mode 100644 index 0000000..bd91e38 --- /dev/null +++ b/project/ISP_368/Listings/WL368_NOTE10_HX628_CA.map @@ -0,0 +1,5179 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.PWM_Task) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.PWM_Task) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_demo) refers to hal_pwm.o(i.hal_pwm_out_init) for hal_pwm_out_init + ap_demo.o(i.ap_demo) refers to hal_pwm.o(i.hal_pwm_out_config_all) for hal_pwm_out_config_all + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_phone_clear_reset_on) for app_tp_phone_clear_reset_on + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.PWM_Task) for PWM_Task + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + ap_demo.o(i.ap_demo) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_in + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_te_timer_cb) for soft_te_timer_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_ca) refers to ap_demo.o(i.translate_data) for translate_data + ap_demo.o(i.ap_get_reg_ca) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(i.translate_data) for translate_data + ap_demo.o(i.ap_set_backlight) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_off) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_tp_calibration_04) refers to ap_demo.o(.data) for .data + ap_demo.o(i.app_tp_calibration_exec) refers to app_tp_transfer.o(i.ap_tp_calibration) for ap_tp_calibration + ap_demo.o(i.app_tp_calibration_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.app_tp_calibration_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) for hal_dsi_rx_ctrl_set_cus_esc_clk + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.pps_update_handle) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_te_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) for hal_dsi_rx_ctrl_set_hw_tear_mode + ap_demo.o(i.soft_te_timer_cb) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + ap_demo.o(i.soft_te_timer_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_te_timer_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.translate_data) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.translate_data) refers to ap_demo.o(.data) for .data + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_ca) for ap_get_reg_ca + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight) for ap_set_backlight + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_tp_calibration_04) for ap_set_tp_calibration_04 + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.ap_tp_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.ap_tp_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fsub + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_set_callback) for drv_i2c_m_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_deinit) for drv_i2c_s_deinit + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num) for drv_i2c_s_get_tx_byte_num + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_callback) for drv_i2c_s_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable_intr) for drv_i2c_s_enable_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(.data) for tx_byte_num + hal_pwm.o(i.hal_pwm_in_clear_int) refers to drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all) for drv_pwm_in_clear_pwm_int_all + hal_pwm.o(i.hal_pwm_in_config_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_in_ctrl_int) refers to drv_pwm.o(i.drv_pwm_in_set_sys_int) for drv_pwm_in_set_sys_int + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_get_current_count) refers to drv_pwm.o(i.drv_pwm_in_get_current_count) for drv_pwm_in_get_current_count + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_pwm.o(i.drv_pwm_in_get_high_period) for drv_pwm_in_get_high_period + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_pwm.o(i.drv_pwm_in_get_low_period) for drv_pwm_in_get_low_period + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_pwm.o(i.drv_pwm_in_get_counter_period) for drv_pwm_in_get_counter_period + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_in_init) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_register_callback) refers to drv_pwm.o(i.drv_pwm_in_register_callback) for drv_pwm_in_register_callback + hal_pwm.o(i.hal_pwm_in_set_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_out_config_all) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_config_all) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_config_all) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_config_all) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_config_all) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_config_all) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sel_io) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_sync_all) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_pwm.o(i.drv_pwm_out_get_sync_flag) for drv_pwm_out_get_sync_flag + hal_pwm.o(i.hal_pwm_out_sync_all) refers to tau_delay.o(i.delayUs) for delayUs + hal_pwm.o(i.hal_pwm_out_sync_all) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_common.o(.data) for g_system_clock + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_system.o(i.hal_system_flash_read) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_dual_read) for norflash_dual_read + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_erase_block) for norflash_erase_block + hal_system.o(i.hal_system_flash_write) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_write) for norflash_write + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_disable_intr) for drv_i2c_s_disable_intr + drv_i2c_slave.o(i.drv_i2c_s_enable_intr) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_set_sys_mask) refers to drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_iniernal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_iniernal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.app_tp_m_transfer_complate), (8 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (5 bytes). + Removing app_tp_transfer.o(.data), (6 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (1 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (156 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (37 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (288 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (620 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (11 bytes). + Removing app_tp_for_custom_s8.o(.data), (10 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (16 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode), (128 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter), (108 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex), (14 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (112 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (144 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (140 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (24 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (24 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (8 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (20 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (8 bytes). + Removing hal_pwm.o(.rev16_text), (4 bytes). + Removing hal_pwm.o(.revsh_text), (4 bytes). + Removing hal_pwm.o(i.hal_pwm_in_clear_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_config_int), (60 bytes). + Removing hal_pwm.o(i.hal_pwm_in_ctrl_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_deinit), (18 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_current_count), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_high_period), (40 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_low_period), (40 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_total_period), (40 bytes). + Removing hal_pwm.o(i.hal_pwm_in_init), (26 bytes). + Removing hal_pwm.o(i.hal_pwm_in_register_callback), (10 bytes). + Removing hal_pwm.o(i.hal_pwm_in_set_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_deinit), (18 bytes). + Removing hal_pwm.o(i.hal_pwm_out_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sel_io), (38 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_all), (124 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_ctl), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_pause), (28 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_period), (52 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_thr), (72 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (112 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_flash_read), (56 bytes). + Removing hal_system.o(i.hal_system_flash_write), (58 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (412 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (24 bytes). + Removing drv_dma.o(i.drv_dma_enable_cycle), (44 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_clear_irq_status), (6 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (130 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_bus_init), (36 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_deinit), (44 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_disable_intr), (16 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_enable), (16 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_get_tx_byte_num), (12 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (32 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (24 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_sys_mask), (48 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_scld_filter), (100 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (52 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (108 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (60 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (220 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (88 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (72 bytes). + Removing drv_spi_dma.o(.bss), (480 bytes). + Removing drv_spi_dma.o(.data), (16 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_iniernal_vsync_deinit), (20 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (26 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_set_prefetch), (24 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (56 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (20 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing dflti.o(.text), (40 bytes). + +584 unused section(s) (total 24829 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../fplib/microlib/fpsqrt.c 0x00000000 Number 0 dsqrt.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt_x.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_pwm.c 0x00000000 Number 0 hal_pwm.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\internal\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\..\src\app\demo\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\..\src\app\demo\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\..\src\app\demo\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_pwm.c 0x00000000 Number 0 hal_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\internal\\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\\..\\src\\app\\demo\\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdcmple.s 0x00000000 Number 0 cdcmple.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 fadd.o(.text) + .text 0x0001029a Section 0 fmul.o(.text) + .text 0x00010314 Section 0 fdiv.o(.text) + .text 0x00010390 Section 0 fscalb.o(.text) + .text 0x000103a8 Section 0 dadd.o(.text) + .text 0x0001050c Section 0 dmul.o(.text) + .text 0x000105dc Section 0 ddiv.o(.text) + .text 0x000106cc Section 0 fflti.o(.text) + .text 0x000106e2 Section 0 ffltui.o(.text) + .text 0x000106f0 Section 0 dfltui.o(.text) + .text 0x0001070c Section 0 ffixi.o(.text) + .text 0x0001073e Section 0 ffixui.o(.text) + .text 0x00010768 Section 0 dfixi.o(.text) + .text 0x000107b0 Section 0 dfixui.o(.text) + .text 0x000107ec Section 0 f2d.o(.text) + .text 0x00010814 Section 40 cdcmple.o(.text) + .text 0x0001083c Section 20 cfrcmple.o(.text) + .text 0x00010850 Section 0 uldiv.o(.text) + .text 0x000108b0 Section 0 llshl.o(.text) + .text 0x000108d0 Section 0 llushr.o(.text) + .text 0x000108f2 Section 0 llsshr.o(.text) + .text 0x00010918 Section 0 fepilogue.o(.text) + .text 0x00010918 Section 0 iusefp.o(.text) + .text 0x0001099a Section 0 depilogue.o(.text) + .text 0x00010a58 Section 0 dsqrt.o(.text) + .text 0x00010afc Section 0 dfixul.o(.text) + .text 0x00010b3c Section 40 cdrcmple.o(.text) + .text 0x00010b64 Section 36 init.o(.text) + .text 0x00010b88 Section 0 __dczerorl2.o(.text) + i.ADC_IRQn_Handler 0x00010be0 Section 0 irq_redirect .o(i.ADC_IRQn_Handler) + i.AP_NRESET_IRQn_Handler 0x00010bf8 Section 0 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + i.DMA_IRQn_Handler 0x00010c10 Section 0 irq_redirect .o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010c24 Section 0 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010c40 Section 0 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010c5c Section 0 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010c78 Section 0 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010c94 Section 0 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010cb0 Section 0 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010ccc Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010ce8 Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.FLSCTRL_IRQn_Handler 0x00010d04 Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.Gpio_swire_output 0x00010d18 Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00010d68 Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010d7c Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010d94 Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010dac Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010dc4 Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010dec Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010e04 Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010e1c Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010e34 Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.PWM_Task 0x00010e50 Section 0 ap_demo.o(i.PWM_Task) + i.S20_Start_init 0x00010e80 Section 0 app_tp_transfer.o(i.S20_Start_init) + i.SPIM_IRQn_Handler 0x00010fb4 Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.SPIS_IRQn_Handler 0x00010fd0 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.UART_DisableDma 0x00010fec Section 0 drv_uart.o(i.UART_DisableDma) + i.UART_GetInstance 0x00010fee Section 0 drv_uart.o(i.UART_GetInstance) + i.__scatterload_copy 0x00010ff2 Section 14 handlers.o(i.__scatterload_copy) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.SWIRE_IRQn_Handler 0x00011014 Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00011030 Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00011048 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x00011060 Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00011078 Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x00011090 Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART0_IRQ_Handle 0x000110a8 Section 0 drv_uart.o(i.UART0_IRQ_Handle) + i.UART_IRQn_Handler 0x000110c4 Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_ResetRxFIFO 0x000110dc Section 0 drv_uart.o(i.UART_ResetRxFIFO) + i.UART_SetBaudRate 0x00011100 Section 0 drv_uart.o(i.UART_SetBaudRate) + i.UART_SwitchSCLK 0x00011148 Section 0 drv_uart.o(i.UART_SwitchSCLK) + i.UART_TransferHandleIRQ 0x00011162 Section 0 drv_uart.o(i.UART_TransferHandleIRQ) + i.UART_WriteBlocking 0x00011296 Section 0 drv_uart.o(i.UART_WriteBlocking) + i.UART_init 0x000112b0 Section 0 drv_uart.o(i.UART_init) + i.VIDC_IRQn_Handler 0x0001136c Section 0 irq_redirect .o(i.VIDC_IRQn_Handler) + i.VPRE_IRQn_Handler 0x00011384 Section 0 irq_redirect .o(i.VPRE_IRQn_Handler) + i.WDG_IRQn_Handler 0x0001139c Section 0 irq_redirect .o(i.WDG_IRQn_Handler) + i.__0printf 0x000113b4 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x000113d4 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x000113f8 Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x00011426 Section 0 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + i.__NVIC_ClearPendingIRQ 0x00011440 Section 0 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011441 Thumb Code 18 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x00011458 Section 0 drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011459 Thumb Code 18 drv_i2c_slave.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x00011470 Section 0 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011471 Thumb Code 18 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_DisableIRQ 0x00011488 Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x00011489 Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x000114a8 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x000114a9 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__NVIC_SetPriority 0x000114c0 Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x000114c1 Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_null 0x00011504 Section 2 handlers.o(i.__scatterload_null) + i.__scatterload_zeroinit 0x00011506 Section 14 handlers.o(i.__scatterload_zeroinit) + i.__set_errno 0x00011514 Section 0 errno.o(i.__set_errno) + i._fp_digits 0x00011520 Section 0 printfa.o(i._fp_digits) + _fp_digits 0x00011521 Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x00011694 Section 0 printfa.o(i._printf_core) + _printf_core 0x00011695 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011d80 Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011d81 Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011da0 Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011da1 Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011dcc Section 0 printfa.o(i._sputc) + _sputc 0x00011dcd Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011dd8 Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011dd9 Thumb Code 1424 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x00012374 Section 0 ap_demo.o(i.ap_demo) + i.ap_get_reg_ca 0x00012598 Section 0 ap_demo.o(i.ap_get_reg_ca) + ap_get_reg_ca 0x00012599 Thumb Code 46 ap_demo.o(i.ap_get_reg_ca) + i.ap_get_reg_df 0x000125cc Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x000125cd Thumb Code 134 ap_demo.o(i.ap_get_reg_df) + i.ap_reset_cb 0x00012658 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x00012659 Thumb Code 40 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight 0x000126b8 Section 0 ap_demo.o(i.ap_set_backlight) + ap_set_backlight 0x000126b9 Thumb Code 46 ap_demo.o(i.ap_set_backlight) + i.ap_set_display_off 0x000126ec Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x000126ed Thumb Code 28 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x0001272c Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x0001272d Thumb Code 18 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x0001275c Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x0001275d Thumb Code 84 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x000127e0 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x000127e1 Thumb Code 20 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x00012820 Section 0 ap_demo.o(i.ap_set_tp_calibration_04) + ap_set_tp_calibration_04 0x00012821 Thumb Code 22 ap_demo.o(i.ap_set_tp_calibration_04) + i.ap_tp_calibration 0x0001283c Section 0 app_tp_transfer.o(i.ap_tp_calibration) + i.app_ADC_IRQn_Handler 0x000128ec Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x00012908 Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x0001292c Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x00012948 Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x00012964 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x00012980 Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x0001299c Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x000129b8 Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x000129d4 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x000129f0 Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x00012a0c Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x00012a54 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x00012a64 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00012a74 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00012b54 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00012bdc Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00012e74 Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00012f14 Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00012f5c Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x00012f8c Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x0001318c Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x000131ac Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x000131c4 Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x000131ce Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x000131d8 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x000131e2 Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x000131ec Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x000131f4 Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x00013210 Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x0001322c Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x00013264 Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x00013274 Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x000132a4 Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x000132c8 Section 0 ap_demo.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x00013324 Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x00013325 Thumb Code 42 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x00013354 Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x000133a8 Section 0 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_read 0x000133a9 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_write 0x000133c8 Section 0 app_tp_transfer.o(i.app_tp_m_write) + app_tp_m_write 0x000133c9 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x000133d0 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_phone_clear_reset_on 0x00013738 Section 0 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + i.app_tp_s_read 0x00013744 Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x0001374c Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x00013754 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x00013a24 Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x00013a54 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00013a55 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_transfer_screen_const 0x00013a60 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00013a61 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00013aa0 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x00013b94 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.board_Init 0x00013bac Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x00013bd0 Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + calc_framebuffer_setting 0x00013bd1 Thumb Code 962 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x00013fdc Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x000140a4 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x000140a5 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x000140d0 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x000140d1 Thumb Code 92 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x00014160 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x000141b8 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x000141d0 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00014214 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x00014238 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x00014239 Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x00014254 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x0001426c Section 0 tau_delay.o(i.delayUs) + i.drv_ap_rst_trig_edge_detect 0x00014290 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x000142c8 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x000142d4 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x00014314 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x000143dc Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x000143f0 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x00014448 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x00014450 Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x00014460 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x00014474 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x00014488 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x000144a8 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x000144bc Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x000144d4 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x000144e8 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x000144fc Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x00014510 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x00014524 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x00014538 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x0001454c Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x00014560 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x00014574 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x00014588 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x000145a0 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x000145b8 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x000145cc Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x000145e0 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x000145f4 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x0001460c Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x00014628 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x00014638 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00014648 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x0001466c Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00014678 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x00014708 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x0001471a Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x00014734 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x0001473c Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00014780 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x000147b6 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x000147c4 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00014838 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00014842 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x0001486c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00014970 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x000149b0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x000149b1 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00014a00 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00014a01 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00014a1c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00014a24 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00014a2a Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00014a38 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00014a58 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00014a68 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00014a6c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00014a7c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00014ac2 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00014ae8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00014bf4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00014c02 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00014c16 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00014c82 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x00014c86 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00014c9e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00014ca6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00014cae Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00014cb8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00014cdc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x00014ce0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00014ce4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00014ce8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x00014d00 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x00014d1a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00014d26 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x00014d8a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x00014dc8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00014ed4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x00014ef2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00014efa Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x00014f16 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x00014f2e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x00014f3c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x00014f70 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x00014f80 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x00014f88 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00014faa Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x00014fb2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00014fd8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x00015082 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x00015098 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x000150b0 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x000150d0 Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x000150dc Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x0001510e Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x00015128 Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x00015140 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x0001514c Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00015160 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x000151a4 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x000151c4 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x000151d4 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x000151e4 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x000151f4 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00015204 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00015205 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x00015224 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c_dma_callback 0x00015354 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x00015355 Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x00015388 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x00015434 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x0001544e Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x00015468 Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x000154c8 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x000154d8 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_m_set_callback 0x00015510 Section 0 drv_i2c_master.o(i.drv_i2c_m_set_callback) + i.drv_i2c_master_init 0x0001551c Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x000155a8 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x00015604 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x00015640 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x00015641 Thumb Code 46 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x00015670 Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_enable_intr 0x000156cc Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) + i.drv_i2c_s_get_fifo_status 0x00015700 Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_callback 0x0001571c Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_callback) + i.drv_i2c_s_write_data 0x00015728 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x00015748 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x000157a0 Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x000157e4 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x00015800 Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x00015818 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x00015848 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x0001585e Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00015882 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x000158a8 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x000158be Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x000158d4 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x000158e0 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x000158fe Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00015920 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00015942 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x0001594e Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00015968 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x0001598a Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x000159a4 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x000159b0 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x000159fc Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00015a02 Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00015a14 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00015a34 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_video_hw_mode 0x00015a68 Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00015a7c Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x00015a9c Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00015aa8 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00015ae8 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00015af4 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x00015b06 Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00015b16 Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00015b24 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x00015b38 Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00015b44 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x00015b54 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x00015b66 Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x00015b76 Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x00015b8c Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00015ba4 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x00015bbe Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00015bcc Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00015bf4 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x00015c04 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x00015c0c Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x00015c20 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x00015c34 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x00015c3c Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_p2r_filter_init 0x00015c50 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x00015c74 Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x00015c84 Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x00015cc0 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x00015d20 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x00015d74 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00015d84 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x00015d9c Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x00015dbc Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x00015de2 Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x00015e00 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x00015e01 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwm_out_enable 0x00015e20 Section 0 drv_pwm.o(i.drv_pwm_out_enable) + i.drv_pwm_out_set_control 0x00015e40 Section 0 drv_pwm.o(i.drv_pwm_out_set_control) + i.drv_pwm_out_set_period 0x00015e4c Section 0 drv_pwm.o(i.drv_pwm_out_set_period) + i.drv_pwm_out_set_threshold 0x00015e58 Section 0 drv_pwm.o(i.drv_pwm_out_set_threshold) + i.drv_pwr_set_cp_mode 0x00015e64 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x00015e84 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x00015e9c Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x00015ed4 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x00015ed5 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x00015ee0 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x00015ee1 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x00015ef0 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x00015ef1 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x00015f04 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x00015f05 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x00015f1a Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00015f24 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00015f28 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x00015f84 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x00015f98 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x00015fd4 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x00015fd8 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00015fd9 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x00015fea Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x00015fee Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x00015fef Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x00016000 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x0001600c Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x00016014 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x00016020 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x0001602c Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x00016040 Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x0001610c Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x00016120 Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x00016134 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x00016144 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x0001616a Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x00016172 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x0001617c Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_enable 0x0001619c Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_set_int 0x000161b8 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x00016200 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x0001621c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00016228 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x00016250 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x00016268 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x00016284 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x000162a8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x000162cc Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x000162dc Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x000162ec Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x00016310 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x00016311 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x0001632a Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x0001634c Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x0001635c Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x0001636c Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x0001636d Thumb Code 54 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x000163a8 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x000163bc Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x000163cc Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x00016414 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x0001643c Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_clear 0x0001644c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x0001644d Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x00016456 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x00016472 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x0001648e Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x0001648f Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x000164a0 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x000164a1 Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x000164b4 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x000164b5 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x000164c4 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x000164cc Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x000164e4 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x00016524 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x00016538 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x00016560 Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x0001656c Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x00016572 Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x000165ae Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x000165c2 Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x000165d2 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x000165da Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x00016600 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x00016628 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x00016640 Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x0001664a Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x0001665a Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00016664 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x0001666e Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00016680 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x0001668a Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00016694 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x000166ac Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x000166bc Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x000166bd Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x000166cc Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x000166cd Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x000166dc Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x00016710 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x0001671a Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x00016730 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x00016760 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x000167fc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016880 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x000168a8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x000168d0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00016930 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00016931 Thumb Code 232 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00016a60 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00016a61 Thumb Code 180 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00016b34 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00016b35 Thumb Code 308 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x00016c70 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x00016c71 Thumb Code 288 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x00016da0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x00016da1 Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00016fcc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_esc_clk 0x000170bc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x000170e8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_hw_tear_mode 0x0001711c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00017150 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00017151 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x00017188 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x00017189 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x000171fc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_start 0x00017230 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x0001726c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x000172a8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_calc_video_chunks 0x000172c8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x000172c9 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x00017458 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x00017459 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x0001748c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x0001748d Thumb Code 1160 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x0001795c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00017988 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x000179d0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017a1c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x00017a44 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00017b08 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00017b09 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x00017b2c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_ccm 0x00017b38 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00017b58 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x00017b6c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x00017b7c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x00017ba0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00017c0c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00017c50 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00017d28 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x00017dd8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x00017dd9 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x00017e1c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x00017e1d Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x00017e4c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x00017e4d Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x00017e6c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00017e6d Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x00017e8c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x00017e8d Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x00017f20 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x00017f21 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x00017f78 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x00017f79 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x00017fbc Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x00017fd4 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x00017fe8 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x00018028 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x00018048 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00018070 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x00018088 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x000180d8 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x00018138 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x00018140 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x00018160 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x000181cc Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x000181ec Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x00018208 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x00018214 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x00018215 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x00018234 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x00018235 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x00018244 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x0001827c Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x000182e8 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x000182fc Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x00018308 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x00018309 Thumb Code 304 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x00018454 Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x00018538 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_input_resolution_change 0x00018548 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_vsync_deinit 0x0001875c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00018778 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00018784 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tx_state 0x0001879c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x000187a8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x000188a4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x00018954 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x00018a70 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x00018a84 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x00018aa0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00018ae8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x00018b28 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x00018b29 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x00018b4c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x00018b4d Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x00018b94 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x00018b95 Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x00018ba8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x00018ba9 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x00018d0c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00018d0d Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x00018d4c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x00018d4d Thumb Code 376 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x00018ecc Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x00018ecd Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_pwm_out_config_all 0x00018f0c Section 0 hal_pwm.o(i.hal_pwm_out_config_all) + i.hal_pwm_out_init 0x00018f74 Section 0 hal_pwm.o(i.hal_pwm_out_init) + i.hal_spi_m_clear_rxfifo 0x00018f80 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_deinit 0x00018f8e Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_open 0x00018fa0 Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x00018fb6 Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x00018fc0 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x00019048 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x00019064 Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x0001906c Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x00019074 Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_deinit 0x0001907c Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x000190aa Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x000190c4 Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x0001910c Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x00019134 Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x000191c0 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.handle_init 0x000191d0 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x000192e0 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x000192e1 Thumb Code 108 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x00019358 Section 0 ap_demo.o(i.init_panel) + init_panel 0x00019359 Thumb Code 148 ap_demo.o(i.init_panel) + i.main 0x000193f4 Section 0 main.o(i.main) + i.open_mipi_rx 0x00019400 Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x00019401 Thumb Code 112 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x0001948c Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x0001948d Thumb Code 62 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x000194f4 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x000194f5 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x000198e8 Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x000198e9 Thumb Code 340 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x00019a4c Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x00019a4d Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x00019ad8 Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x00019ad9 Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x00019c58 Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x00019c59 Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x00019cfc Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x00019cfd Thumb Code 222 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_gen_te 0x00019e6c Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x00019e6d Thumb Code 116 hal_internal_vsync.o(i.soft_gen_te) + i.soft_te_timer_cb 0x00019ef8 Section 0 ap_demo.o(i.soft_te_timer_cb) + soft_te_timer_cb 0x00019ef9 Thumb Code 36 ap_demo.o(i.soft_te_timer_cb) + i.soft_timer3_cb 0x00019f24 Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x00019f25 Thumb Code 72 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x00019fa0 Section 0 sqrt.o(i.sqrt) + i.translate_data 0x00019fe8 Section 0 ap_demo.o(i.translate_data) + i.vidc_callback 0x0001a354 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001a355 Thumb Code 194 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001a43c Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001a43d Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001a50c Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001a50d Thumb Code 254 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001a6a8 Section 9268 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001a6a8 Data 108 ap_demo.o(.constdata) + .constdata 0x0001cadc Section 8158 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001eaba Section 1 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001eabb Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001eabb Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001eb33 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001eb90 Section 8 drv_param_init.o(.constdata) + .constdata 0x0001eb98 Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001eb98 Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001ec50 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001ecd0 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001ed00 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001ed20 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001ed68 Section 308 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 48 ap_demo.o(.data) + g_calibration_flag 0x000701d0 Data 1 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701d1 Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701d2 Data 1 ap_demo.o(.data) + panel_display_done 0x000701d3 Data 1 ap_demo.o(.data) + flag_b1 0x000701d6 Data 1 ap_demo.o(.data) + flag_ca 0x000701d7 Data 1 ap_demo.o(.data) + b3_read_flag 0x000701d9 Data 1 ap_demo.o(.data) + c8_read_flag 0x000701da Data 1 ap_demo.o(.data) + c9_read_flag 0x000701db Data 1 ap_demo.o(.data) + read_flag_5a 0x000701dc Data 1 ap_demo.o(.data) + g_cal_cnt 0x000701de Data 2 ap_demo.o(.data) + read_bl_data 0x000701e2 Data 2 ap_demo.o(.data) + read_bl_data_bak 0x000701e4 Data 2 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701f0 Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701f4 Data 4 ap_demo.o(.data) + value_reg_df 0x000701f8 Data 4 ap_demo.o(.data) + s20_power_on_flag 0x000701fc Data 4 ap_demo.o(.data) + .data 0x00070200 Section 46 app_tp_transfer.o(.data) + s_spim_write 0x00070200 Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x00070201 Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x00070202 Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x00070203 Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x00070205 Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x00070206 Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x00070207 Data 1 app_tp_transfer.o(.data) + .data 0x0007022e Section 230 app_tp_for_custom_s8.o(.data) + app_tp_count 0x00070238 Data 1 app_tp_for_custom_s8.o(.data) + phone_85_flag 0x00070239 Data 1 app_tp_for_custom_s8.o(.data) + phone_F6_flag 0x0007023a Data 1 app_tp_for_custom_s8.o(.data) + phone_E4_flag 0x0007023b Data 1 app_tp_for_custom_s8.o(.data) + phone_72_flag 0x0007023c Data 1 app_tp_for_custom_s8.o(.data) + phone_75_flag 0x0007023d Data 1 app_tp_for_custom_s8.o(.data) + phone_92_flag 0x0007023e Data 1 app_tp_for_custom_s8.o(.data) + phone_74_flag 0x0007023f Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x00070244 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x00070246 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x00070248 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x0007024a Data 2 app_tp_for_custom_s8.o(.data) + .data 0x00070314 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00070315 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00070316 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00070317 Section 3 app_tp_for_custom_s8.o(.data) + .data 0x0007031a Section 5 app_tp_for_custom_s8.o(.data) + .data 0x00070320 Section 48 app_tp_for_custom_s8.o(.data) + .data 0x00070350 Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00070350 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00070354 Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00070358 Section 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x00070358 Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x00070359 Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x00070359 Data 1 hal_i2c_master.o(.data) + .data 0x0007035c Section 28 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x0007035c Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x0007035d Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x0007035e Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x00070360 Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x00070364 Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x00070368 Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x0007036c Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x00070370 Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00070374 Data 4 hal_i2c_slave.o(.data) + .data 0x00070378 Section 18 norflash.o(.data) + tmprg 0x00070380 Data 4 norflash.o(.data) + .data 0x0007038c Section 12 drv_common.o(.data) + s_my_tick 0x0007038c Data 4 drv_common.o(.data) + .data 0x00070398 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x00070398 Data 4 drv_gpio.o(.data) + .data 0x0007039c Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x0007039c Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x000703a0 Data 4 drv_i2c_dma.o(.data) + .data 0x000703a4 Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x000703a4 Data 4 drv_i2c_master.o(.data) + .data 0x000703a8 Section 8 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x000703a8 Data 4 drv_i2c_slave.o(.data) + .data 0x000703b0 Section 1188 drv_param_init.o(.data) + .data 0x00070854 Section 12 drv_pwm.o(.data) + s_pwm_type 0x00070854 Data 1 drv_pwm.o(.data) + s_pwm_cb 0x00070858 Data 8 drv_pwm.o(.data) + .data 0x00070860 Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x00070860 Data 4 drv_spi_master.o(.data) + .data 0x00070864 Section 8 drv_swire.o(.data) + s_swire_cb 0x00070864 Data 8 drv_swire.o(.data) + .data 0x0007086c Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x0007086c Data 1 drv_sys_cfg.o(.data) + .data 0x00070870 Section 80 drv_timer.o(.data) + sg_timer_info 0x00070870 Data 80 drv_timer.o(.data) + .data 0x000708c0 Section 4 hal_internal_vsync.o(.data) + sg_cur_te_info 0x000708c0 Data 4 hal_internal_vsync.o(.data) + .data 0x000708c4 Section 8 drv_rxbr.o(.data) + .data 0x000708cc Section 4 drv_vidc.o(.data) + .data 0x000708d0 Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x000708d0 Data 1 drv_phy_common.o(.data) + .data 0x000708d4 Section 12 drv_chip_info.o(.data) + sg_chip_info 0x000708d4 Data 4 drv_chip_info.o(.data) + sg_chip_function 0x000708d8 Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x000708dc Data 4 drv_chip_info.o(.data) + .data 0x000708e0 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x000708e0 Data 4 drv_uart.o(.data) + uart_userData 0x000708e4 Data 4 drv_uart.o(.data) + .data 0x000708e8 Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x000708e8 Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x000708ec Data 8 drv_wdg.o(.data) + .data 0x000708f4 Section 4 stdout.o(.data) + .data 0x000708f8 Section 4 errno.o(.data) + _errno 0x000708f8 Data 4 errno.o(.data) + .bss 0x000708fc Section 400 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x000708fc Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x000709c4 Data 200 app_tp_transfer.o(.bss) + .bss 0x00070a8c Section 192 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x00070a8c Data 192 hal_dsi_rx_ctrl.o(.bss) + .bss 0x00070b4c Section 72 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x00070b4c Data 72 hal_dsi_tx_ctrl.o(.bss) + .bss 0x00070b94 Section 256 tau_log.o(.bss) + .bss 0x00070c94 Section 208 hal_uart.o(.bss) + .bss 0x00070d64 Section 28 drv_dma.o(.bss) + s_dma_handle 0x00070d64 Data 28 drv_dma.o(.bss) + .bss 0x00070d80 Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00070d80 Data 64 drv_gpio.o(.bss) + .bss 0x00070dc0 Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x00070dc0 Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x00070e60 Data 160 drv_i2c_dma.o(.bss) + .bss 0x00070f00 Section 2392 hal_internal_vsync.o(.bss) + g_imm_buffer 0x00071738 Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x00071838 Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x00071844 Data 20 hal_internal_vsync.o(.bss) + .bss 0x00071858 Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x00072888 Section 32 hal_spi_slave.o(.bss) + STACK 0x000728a8 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfrcmple 0x0001083d Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010851 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108b1 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108b1 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108d1 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108d1 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000108f3 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000108f3 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010919 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010919 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010929 Thumb Code 114 fepilogue.o(.text) + _double_round 0x0001099b Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109b5 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a59 Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010afd Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b3d Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b65 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b65 Thumb Code 0 init.o(.text) + __decompress 0x00010b89 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010b89 Thumb Code 86 __dczerorl2.o(.text) + ADC_IRQn_Handler 0x00010be1 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010bf9 Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010c11 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c25 Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c41 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010c5d Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010c79 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010c95 Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010cb1 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010ccd Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010ce9 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + FLSCTRL_IRQn_Handler 0x00010d05 Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010d19 Thumb Code 78 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010d69 Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010d7d Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010d95 Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010dad Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010dc5 Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010ded Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010e05 Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010e1d Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010e35 Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + PWM_Task 0x00010e51 Thumb Code 44 ap_demo.o(i.PWM_Task) + S20_Start_init 0x00010e81 Thumb Code 282 app_tp_transfer.o(i.S20_Start_init) + SPIM_IRQn_Handler 0x00010fb5 Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + SPIS_IRQn_Handler 0x00010fd1 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + UART_DisableDma 0x00010fed Thumb Code 2 drv_uart.o(i.UART_DisableDma) + UART_GetInstance 0x00010fef Thumb Code 4 drv_uart.o(i.UART_GetInstance) + __scatterload_copy 0x00010ff3 Thumb Code 14 handlers.o(i.__scatterload_copy) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + SWIRE_IRQn_Handler 0x00011015 Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00011031 Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00011049 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x00011061 Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00011079 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x00011091 Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x000110a9 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + UART_IRQn_Handler 0x000110c5 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x000110dd Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SetBaudRate 0x00011101 Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x00011149 Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x00011163 Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x00011297 Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x000112b1 Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x0001136d Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x00011385 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x0001139d Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x000113b5 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x000113b5 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x000113b5 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x000113b5 Thumb Code 0 printfa.o(i.__0printf) + printf 0x000113b5 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x000113d5 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x000113d5 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x000113d5 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x000113d5 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x000113d5 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x000113f9 Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x00011427 Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_null 0x00011505 Thumb Code 2 handlers.o(i.__scatterload_null) + __scatterload_zeroinit 0x00011507 Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x00011515 Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x00012375 Thumb Code 346 ap_demo.o(i.ap_demo) + ap_tp_calibration 0x0001283d Thumb Code 170 app_tp_transfer.o(i.ap_tp_calibration) + app_ADC_IRQn_Handler 0x000128ed Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x00012909 Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x0001292d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x00012949 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x00012965 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x00012981 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x0001299d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x000129b9 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x000129d5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x000129f1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x00012a0d Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x00012a55 Thumb Code 8 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00012a65 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00012a75 Thumb Code 98 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00012b55 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00012bdd Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00012e75 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00012f15 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00012f5d Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x00012f8d Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x0001318d Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x000131ad Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x000131c5 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x000131cf Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x000131d9 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x000131e3 Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x000131ed Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x000131f5 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x00013211 Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x0001322d Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x00013265 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x00013275 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x000132a5 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x000132c9 Thumb Code 38 ap_demo.o(i.app_tp_calibration_exec) + app_tp_init 0x00013355 Thumb Code 66 app_tp_transfer.o(i.app_tp_init) + app_tp_phone_analysis_data 0x000133d1 Thumb Code 820 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_phone_clear_reset_on 0x00013739 Thumb Code 8 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + app_tp_s_read 0x00013745 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x0001374d Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x00013755 Thumb Code 710 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x00013a25 Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x00013aa1 Thumb Code 228 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x00013b95 Thumb Code 18 app_tp_transfer.o(i.app_tp_transfer_screen_start) + board_Init 0x00013bad Thumb Code 30 board.o(i.board_Init) + ceil 0x00013fdd Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x00014161 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x000141b9 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x000141d1 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00014215 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x00014255 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x0001426d Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x00014291 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x000142c9 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x000142d5 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x00014315 Thumb Code 122 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x000143dd Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x000143f1 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x00014449 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x00014451 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x00014461 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x00014475 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x00014489 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x000144a9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x000144bd Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x000144d5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x000144e9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x000144fd Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x00014511 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x00014525 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x00014539 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x0001454d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x00014561 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x00014575 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x00014589 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x000145a1 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x000145b9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x000145cd Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x000145e1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x000145f5 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x0001460d Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x00014629 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x00014639 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00014649 Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x0001466d Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00014679 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x00014709 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x0001471b Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x00014735 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x0001473d Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00014781 Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x000147b7 Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x000147c5 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00014839 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00014843 Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x0001486d Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00014971 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00014a1d Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00014a25 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00014a2b Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00014a39 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00014a59 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00014a69 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00014a6d Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00014a7d Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00014ac3 Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00014ae9 Thumb Code 258 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00014bf5 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00014c03 Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00014c17 Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00014c83 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x00014c87 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00014c9f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00014ca7 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00014caf Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00014cb9 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00014cdd Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x00014ce1 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00014ce5 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x00014ce9 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x00014d01 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x00014d1b Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00014d27 Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x00014d8b Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x00014dc9 Thumb Code 268 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00014ed5 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x00014ef3 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00014efb Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x00014f17 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x00014f2f Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x00014f3d Thumb Code 46 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x00014f71 Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x00014f81 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x00014f89 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00014fab Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x00014fb3 Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00014fd9 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x00015083 Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x00015099 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x000150b1 Thumb Code 32 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x000150d1 Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x000150dd Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x0001510f Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x00015129 Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x00015141 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x0001514d Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00015161 Thumb Code 62 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x000151a5 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x000151c5 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x000151d5 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x000151e5 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x000151f5 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x00015225 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c_dma_init 0x00015389 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x00015435 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x0001544f Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x00015469 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x000154c9 Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x000154d9 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_m_set_callback 0x00015511 Thumb Code 6 drv_i2c_master.o(i.drv_i2c_m_set_callback) + drv_i2c_master_init 0x0001551d Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x000155a9 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x00015605 Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x00015671 Thumb Code 84 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_enable_intr 0x000156cd Thumb Code 40 drv_i2c_slave.o(i.drv_i2c_s_enable_intr) + drv_i2c_s_get_fifo_status 0x00015701 Thumb Code 22 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_callback 0x0001571d Thumb Code 6 drv_i2c_slave.o(i.drv_i2c_s_set_callback) + drv_i2c_s_write_data 0x00015729 Thumb Code 26 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x00015749 Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x000157a1 Thumb Code 60 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x000157e5 Thumb Code 18 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x00015801 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x00015819 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x00015849 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x0001585f Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00015883 Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x000158a9 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x000158bf Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x000158d5 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x000158e1 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x000158ff Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00015921 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00015943 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x0001594f Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00015969 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x0001598b Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x000159a5 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x000159b1 Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x000159fd Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00015a03 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00015a15 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00015a35 Thumb Code 46 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_video_hw_mode 0x00015a69 Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00015a7d Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x00015a9d Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00015aa9 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00015ae9 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00015af5 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x00015b07 Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00015b17 Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00015b25 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x00015b39 Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00015b45 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x00015b55 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x00015b67 Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x00015b77 Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x00015b8d Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00015ba5 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x00015bbf Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00015bcd Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00015bf5 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x00015c05 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x00015c0d Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x00015c21 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x00015c35 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x00015c3d Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_p2r_filter_init 0x00015c51 Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x00015c75 Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x00015c85 Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x00015cc1 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x00015d21 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x00015d75 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00015d85 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x00015d9d Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x00015dbd Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x00015de3 Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwm_out_enable 0x00015e21 Thumb Code 26 drv_pwm.o(i.drv_pwm_out_enable) + drv_pwm_out_set_control 0x00015e41 Thumb Code 6 drv_pwm.o(i.drv_pwm_out_set_control) + drv_pwm_out_set_period 0x00015e4d Thumb Code 6 drv_pwm.o(i.drv_pwm_out_set_period) + drv_pwm_out_set_threshold 0x00015e59 Thumb Code 8 drv_pwm.o(i.drv_pwm_out_set_threshold) + drv_pwr_set_cp_mode 0x00015e65 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x00015e85 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x00015e9d Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x00015f1b Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00015f25 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00015f29 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x00015f85 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x00015f99 Thumb Code 44 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x00015fd5 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x00015feb Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x00016001 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x0001600d Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x00016015 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x00016021 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x0001602d Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x00016041 Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x0001610d Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x00016121 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x00016135 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x00016145 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x0001616b Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x00016173 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x0001617d Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_enable 0x0001619d Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_set_int 0x000161b9 Thumb Code 64 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x00016201 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x0001621d Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00016229 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x00016251 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x00016269 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x00016285 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x000162a9 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x000162cd Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x000162dd Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x000162ed Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x0001632b Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x0001634d Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x0001635d Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x000163a9 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x000163bd Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x000163cd Thumb Code 68 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x00016415 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x0001643d Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x00016457 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x00016473 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x000164c5 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x000164cd Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x000164e5 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x00016525 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x00016539 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x00016561 Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x0001656d Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x00016573 Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x000165af Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x000165c3 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x000165d3 Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x000165db Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x00016601 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x00016629 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x00016641 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x0001664b Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x0001665b Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00016665 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x0001666f Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00016681 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x0001668b Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00016695 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x000166ad Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x000166dd Thumb Code 48 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x00016711 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x0001671b Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00016731 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x00016761 Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x000167fd Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016881 Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x000168a9 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x000168d1 Thumb Code 88 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_send_ack_cmd 0x00016fcd Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_esc_clk 0x000170bd Thumb Code 34 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) + hal_dsi_rx_ctrl_set_cus_sync_line 0x000170e9 Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_hw_tear_mode 0x0001711d Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x000171fd Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_start 0x00017231 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x0001726d Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x000172a9 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x0001795d Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00017989 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x000179d1 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017a1d Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x00017a45 Thumb Code 188 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x00017b2d Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_ccm 0x00017b39 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00017b59 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x00017b6d Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x00017b7d Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x00017ba1 Thumb Code 94 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00017c0d Thumb Code 54 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00017c51 Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00017d29 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x00017fbd Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x00017fd5 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x00017fe9 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x00018029 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x00018049 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00018071 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x00018089 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x000180d9 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x00018139 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x00018141 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x00018161 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x000181cd Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x000181ed Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x00018209 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x00018245 Thumb Code 46 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x0001827d Thumb Code 86 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x000182e9 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x000182fd Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x00018455 Thumb Code 146 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x00018539 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_input_resolution_change 0x00018549 Thumb Code 418 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_vsync_deinit 0x0001875d Thumb Code 24 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00018779 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00018785 Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tx_state 0x0001879d Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x000187a9 Thumb Code 220 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x000188a5 Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x00018955 Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x00018a71 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x00018a85 Thumb Code 22 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x00018aa1 Thumb Code 64 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00018ae9 Thumb Code 54 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_pwm_out_config_all 0x00018f0d Thumb Code 100 hal_pwm.o(i.hal_pwm_out_config_all) + hal_pwm_out_init 0x00018f75 Thumb Code 12 hal_pwm.o(i.hal_pwm_out_init) + hal_spi_m_clear_rxfifo 0x00018f81 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_deinit 0x00018f8f Thumb Code 18 hal_swire.o(i.hal_swire_deinit) + hal_swire_open 0x00018fa1 Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x00018fb7 Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x00018fc1 Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x00019049 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x00019065 Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x0001906d Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x00019075 Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_deinit 0x0001907d Thumb Code 46 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x000190ab Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x000190c5 Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x0001910d Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x00019135 Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x000191c1 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x000191d1 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x000193f5 Thumb Code 10 main.o(i.main) + sqrt 0x00019fa1 Thumb Code 66 sqrt.o(i.sqrt) + translate_data 0x00019fe9 Thumb Code 858 ap_demo.o(i.translate_data) + panel_init_code 0x0001a714 Data 9160 ap_demo.o(.constdata) + phone_data_21 0x0001cadc Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001cadd Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_0 0x0001cade Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_92_1 0x0001cadf Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_1 0x0001cae0 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_2 0x0001cae1 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_3 0x0001cae2 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_4 0x0001cae3 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001cae4 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_92_3 0x0001cae7 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001caea Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001caee Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001caf2 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001caf6 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001cafa Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001cafe Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_92_2 0x0001cb03 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_1 0x0001cb09 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_2 0x0001cb0f Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_3 0x0001cb15 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_4 0x0001cb1b Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001cb21 Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001cb31 Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_2 0x0001cb3c Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001cb58 Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_3 0x0001cb62 Data 1224 app_tp_for_custom_s8.o(.constdata) + phone_data_72_5 0x0001d02a Data 1224 app_tp_for_custom_s8.o(.constdata) + phone_data_72_13 0x0001d4f2 Data 1224 app_tp_for_custom_s8.o(.constdata) + phone_data_75_1 0x0001d9ba Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_00 0x0001dc26 Data 660 app_tp_for_custom_s8.o(.constdata) + phone_data_75_FF 0x0001deba Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_3 0x0001dfda Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_6 0x0001e246 Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7 0x0001e4b2 Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_08 0x0001e71e Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_11 0x0001e83e Data 620 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001eaaa Data 16 app_tp_for_custom_s8.o(.constdata) + screen_reg_start_data_size 0x0001eaba Data 1 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001ee9c Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001eecc Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_start_flag 0x000701d4 Data 1 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701d5 Data 1 ap_demo.o(.data) + panel_mode 0x000701d8 Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701e0 Data 2 ap_demo.o(.data) + value_reg_b1 0x000701e6 Data 2 ap_demo.o(.data) + value_reg_ca 0x000701e8 Data 2 ap_demo.o(.data) + panel_r 0x000701ea Data 2 ap_demo.o(.data) + panel_g 0x000701ec Data 2 ap_demo.o(.data) + panel_b 0x000701ee Data 2 ap_demo.o(.data) + s_screen_init_complate 0x00070204 Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x00070208 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x0007020b Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x0007020e Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data2 0x00070211 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data3 0x00070214 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data6 0x00070217 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data7 0x0007021a Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data8 0x0007021d Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data4 0x00070220 Data 4 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data5 0x00070224 Data 4 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x00070228 Data 6 app_tp_transfer.o(.data) + phone_data_E4 0x0007022e Data 1 app_tp_for_custom_s8.o(.data) + tp_flag 0x0007022f Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x00070230 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x00070231 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x00070232 Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x00070233 Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x00070234 Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x00070235 Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x00070236 Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x00070237 Data 1 app_tp_for_custom_s8.o(.data) + phone_data_B1 0x00070240 Data 2 app_tp_for_custom_s8.o(.data) + phone_data_30 0x00070242 Data 2 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x0007024c Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x00070314 Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x00070315 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x00070316 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x00070317 Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x0007031a Data 5 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x00070320 Data 48 app_tp_for_custom_s8.o(.data) + g_fls_w_cmd 0x00070378 Data 1 norflash.o(.data) + g_fls_r_cmd 0x00070379 Data 1 norflash.o(.data) + g_fls_write_en_status 0x0007037a Data 1 norflash.o(.data) + isFlsTransferEnd 0x0007037b Data 1 norflash.o(.data) + isFlsFifoReq 0x0007037c Data 1 norflash.o(.data) + isNandWriteCompleted 0x0007037d Data 1 norflash.o(.data) + isNandReadCompleted 0x0007037e Data 1 norflash.o(.data) + g_fls_error_info 0x00070384 Data 6 norflash.o(.data) + g_systick_cb_func 0x00070390 Data 4 drv_common.o(.data) + g_system_clock 0x00070394 Data 4 drv_common.o(.data) + tx_byte_num 0x000703ac Data 4 drv_i2c_slave.o(.data) + g_scld_fhd_filter_h 0x000703b0 Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x000704b0 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x000705b0 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x000706b0 Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x000707b0 Data 128 drv_param_init.o(.data) + g_ccm_setting 0x00070830 Data 36 drv_param_init.o(.data) + g_int_rxbr_irq0_cb_func 0x000708c4 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x000708c8 Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x000708cc Data 4 drv_vidc.o(.data) + __stdout 0x000708f4 Data 4 stdout.o(.data) + string 0x00070b94 Data 256 tau_log.o(.bss) + hal_dmahandle 0x00070c94 Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x00070d34 Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x00070d54 Data 16 hal_uart.o(.bss) + g_vsync_hande 0x00070f00 Data 56 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00070f38 Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x00071858 Data 4144 dcs_packet_fifo.o(.bss) + g_spis_ctrl_handle 0x00072888 Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x000728a8 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x000738a8 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000f5f8, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000f2ac]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000eecc, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 519 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2562 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2872 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2875 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2877 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2879 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2880 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2882 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2884 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2873 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 520 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2565 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2567 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2569 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2571 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 2836 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 2838 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 2840 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 2842 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 2844 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 2846 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 2848 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 2850 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 2852 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 2856 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 2858 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 2860 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 2862 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 2864 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 2866 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 2868 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 2870 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 2887 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 2889 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 2891 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 2893 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 2902 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 2903 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 2905 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 2909 .text mf_p.l(dsqrt.o) + 0x00010afa 0x00010afa 0x00000002 PAD + 0x00010afc 0x00010afc 0x00000040 Code RO 2911 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 2913 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 2915 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000056 Code RO 2925 .text mc_p.l(__dczerorl2.o) + 0x00010bde 0x00010bde 0x00000002 PAD + 0x00010be0 0x00010be0 0x00000018 Code RO 2196 i.ADC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010bf8 0x00010bf8 0x00000018 Code RO 2197 i.AP_NRESET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c10 0x00010c10 0x00000014 Code RO 2198 i.DMA_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c24 0x00010c24 0x0000001c Code RO 2199 i.EXTI_INT0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c40 0x00010c40 0x0000001c Code RO 2200 i.EXTI_INT1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c5c 0x00010c5c 0x0000001c Code RO 2201 i.EXTI_INT2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c78 0x00010c78 0x0000001c Code RO 2202 i.EXTI_INT3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c94 0x00010c94 0x0000001c Code RO 2203 i.EXTI_INT4_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cb0 0x00010cb0 0x0000001c Code RO 2204 i.EXTI_INT5_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ccc 0x00010ccc 0x0000001c Code RO 2205 i.EXTI_INT6_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ce8 0x00010ce8 0x0000001c Code RO 2206 i.EXTI_INT7_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d04 0x00010d04 0x00000014 Code RO 2207 i.FLSCTRL_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d18 0x00010d18 0x0000004e Code RO 99 i.Gpio_swire_output ap_demo.o + 0x00010d66 0x00010d66 0x00000002 PAD + 0x00010d68 0x00010d68 0x00000014 Code RO 2208 i.HardFault_Handler CVWL368.lib(irq_redirect .o) + 0x00010d7c 0x00010d7c 0x00000018 Code RO 2209 i.I2C0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d94 0x00010d94 0x00000018 Code RO 2210 i.I2C1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010dac 0x00010dac 0x00000018 Code RO 2211 i.LCDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010dc4 0x00010dc4 0x00000028 Code RO 951 i.LOG_printf CVWL368.lib(tau_log.o) + 0x00010dec 0x00010dec 0x00000018 Code RO 2212 i.MEMC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e04 0x00010e04 0x00000018 Code RO 2213 i.MIPI_RX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e1c 0x00010e1c 0x00000018 Code RO 2214 i.MIPI_TX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e34 0x00010e34 0x0000001c Code RO 2215 i.PWMDET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e50 0x00010e50 0x00000030 Code RO 100 i.PWM_Task ap_demo.o + 0x00010e80 0x00010e80 0x00000134 Code RO 266 i.S20_Start_init app_tp_transfer.o + 0x00010fb4 0x00010fb4 0x0000001c Code RO 2216 i.SPIM_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010fd0 0x00010fd0 0x0000001c Code RO 2217 i.SPIS_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010fec 0x00010fec 0x00000002 Code RO 2422 i.UART_DisableDma CVWL368.lib(drv_uart.o) + 0x00010fee 0x00010fee 0x00000004 Code RO 2428 i.UART_GetInstance CVWL368.lib(drv_uart.o) + 0x00010ff2 0x00010ff2 0x0000000e Code RO 2919 i.__scatterload_copy mc_p.l(handlers.o) + 0x00011000 0x00011000 0x00000014 Data RO 1073 .ARM.__at_0x11000 CVWL368.lib(drv_common.o) + 0x00011014 0x00011014 0x0000001c Code RO 2218 i.SWIRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011030 0x00011030 0x00000018 Code RO 2219 i.SysTick_Handler CVWL368.lib(irq_redirect .o) + 0x00011048 0x00011048 0x00000018 Code RO 2220 i.TIMER0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011060 0x00011060 0x00000018 Code RO 2221 i.TIMER1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011078 0x00011078 0x00000018 Code RO 2222 i.TIMER2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011090 0x00011090 0x00000018 Code RO 2223 i.TIMER3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110a8 0x000110a8 0x0000001c Code RO 2418 i.UART0_IRQ_Handle CVWL368.lib(drv_uart.o) + 0x000110c4 0x000110c4 0x00000018 Code RO 2224 i.UART_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110dc 0x000110dc 0x00000024 Code RO 2436 i.UART_ResetRxFIFO CVWL368.lib(drv_uart.o) + 0x00011100 0x00011100 0x00000048 Code RO 2439 i.UART_SetBaudRate CVWL368.lib(drv_uart.o) + 0x00011148 0x00011148 0x0000001a Code RO 2440 i.UART_SwitchSCLK CVWL368.lib(drv_uart.o) + 0x00011162 0x00011162 0x00000134 Code RO 2442 i.UART_TransferHandleIRQ CVWL368.lib(drv_uart.o) + 0x00011296 0x00011296 0x0000001a Code RO 2444 i.UART_WriteBlocking CVWL368.lib(drv_uart.o) + 0x000112b0 0x000112b0 0x000000bc Code RO 2445 i.UART_init CVWL368.lib(drv_uart.o) + 0x0001136c 0x0001136c 0x00000018 Code RO 2225 i.VIDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011384 0x00011384 0x00000018 Code RO 2226 i.VPRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001139c 0x0001139c 0x00000018 Code RO 2227 i.WDG_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113b4 0x000113b4 0x00000020 Code RO 2808 i.__0printf mc_p.l(printfa.o) + 0x000113d4 0x000113d4 0x00000024 Code RO 2814 i.__0vsprintf mc_p.l(printfa.o) + 0x000113f8 0x000113f8 0x0000002e Code RO 2907 i.__ARM_clz mf_p.l(depilogue.o) + 0x00011426 0x00011426 0x0000001a Code RO 613 i.__ARM_common_switch8 CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00011440 0x00011440 0x00000018 Code RO 1391 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_i2c_master.o) + 0x00011458 0x00011458 0x00000018 Code RO 1426 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_i2c_slave.o) + 0x00011470 0x00011470 0x00000018 Code RO 1562 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_spi_master.o) + 0x00011488 0x00011488 0x00000020 Code RO 2050 i.__NVIC_DisableIRQ CVWL368.lib(drv_rxbr.o) + 0x000114a8 0x000114a8 0x00000018 Code RO 2051 i.__NVIC_EnableIRQ CVWL368.lib(drv_rxbr.o) + 0x000114c0 0x000114c0 0x00000044 Code RO 2324 i.__NVIC_SetPriority CVWL368.lib(hal_spi_slave.o) + 0x00011504 0x00011504 0x00000002 Code RO 2920 i.__scatterload_null mc_p.l(handlers.o) + 0x00011506 0x00011506 0x0000000e Code RO 2921 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x00011514 0x00011514 0x0000000c Code RO 2897 i.__set_errno mc_p.l(errno.o) + 0x00011520 0x00011520 0x00000174 Code RO 2815 i._fp_digits mc_p.l(printfa.o) + 0x00011694 0x00011694 0x000006ec Code RO 2816 i._printf_core mc_p.l(printfa.o) + 0x00011d80 0x00011d80 0x00000020 Code RO 2817 i._printf_post_padding mc_p.l(printfa.o) + 0x00011da0 0x00011da0 0x0000002c Code RO 2818 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011dcc 0x00011dcc 0x0000000a Code RO 2820 i._sputc mc_p.l(printfa.o) + 0x00011dd6 0x00011dd6 0x00000002 PAD + 0x00011dd8 0x00011dd8 0x0000059c Code RO 101 i.ap_dcs_read ap_demo.o + 0x00012374 0x00012374 0x00000224 Code RO 102 i.ap_demo ap_demo.o + 0x00012598 0x00012598 0x00000034 Code RO 103 i.ap_get_reg_ca ap_demo.o + 0x000125cc 0x000125cc 0x0000008c Code RO 104 i.ap_get_reg_df ap_demo.o + 0x00012658 0x00012658 0x00000060 Code RO 105 i.ap_reset_cb ap_demo.o + 0x000126b8 0x000126b8 0x00000034 Code RO 106 i.ap_set_backlight ap_demo.o + 0x000126ec 0x000126ec 0x00000040 Code RO 107 i.ap_set_display_off ap_demo.o + 0x0001272c 0x0001272c 0x00000030 Code RO 108 i.ap_set_display_on ap_demo.o + 0x0001275c 0x0001275c 0x00000084 Code RO 109 i.ap_set_enter_sleep_mode ap_demo.o + 0x000127e0 0x000127e0 0x00000040 Code RO 110 i.ap_set_exit_sleep_mode ap_demo.o + 0x00012820 0x00012820 0x0000001c Code RO 111 i.ap_set_tp_calibration_04 ap_demo.o + 0x0001283c 0x0001283c 0x000000b0 Code RO 267 i.ap_tp_calibration app_tp_transfer.o + 0x000128ec 0x000128ec 0x0000001c Code RO 2052 i.app_ADC_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00012908 0x00012908 0x00000024 Code RO 1315 i.app_AP_NRESET_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x0001292c 0x0001292c 0x0000001c Code RO 1316 i.app_EXTI_INT0_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012948 0x00012948 0x0000001c Code RO 1317 i.app_EXTI_INT1_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012964 0x00012964 0x0000001c Code RO 1318 i.app_EXTI_INT2_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012980 0x00012980 0x0000001c Code RO 1319 i.app_EXTI_INT3_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x0001299c 0x0001299c 0x0000001c Code RO 1320 i.app_EXTI_INT4_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000129b8 0x000129b8 0x0000001c Code RO 1321 i.app_EXTI_INT5_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000129d4 0x000129d4 0x0000001c Code RO 1322 i.app_EXTI_INT6_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000129f0 0x000129f0 0x0000001c Code RO 1323 i.app_EXTI_INT7_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012a0c 0x00012a0c 0x00000048 Code RO 1065 i.app_HardFault_Handler CVWL368.lib(drv_common.o) + 0x00012a54 0x00012a54 0x00000010 Code RO 1427 i.app_I2C0_IRQn_Handler CVWL368.lib(drv_i2c_slave.o) + 0x00012a64 0x00012a64 0x00000010 Code RO 1392 i.app_I2C1_IRQn_Handler CVWL368.lib(drv_i2c_master.o) + 0x00012a74 0x00012a74 0x000000e0 Code RO 1680 i.app_LCDC_IRQn_Handler CVWL368.lib(hal_internal_vsync.o) + 0x00012b54 0x00012b54 0x00000088 Code RO 1994 i.app_MEMC_IRQn_Handler CVWL368.lib(drv_memc.o) + 0x00012bdc 0x00012bdc 0x00000298 Code RO 1766 i.app_MIPI_RX_IRQn_Handler CVWL368.lib(drv_dsi_rx.o) + 0x00012e74 0x00012e74 0x000000a0 Code RO 1822 i.app_MIPI_TX_IRQn_Handler CVWL368.lib(drv_dsi_tx.o) + 0x00012f14 0x00012f14 0x00000048 Code RO 1485 i.app_PWMDET_IRQn_Handler CVWL368.lib(drv_pwm.o) + 0x00012f5c 0x00012f5c 0x00000030 Code RO 1563 i.app_SPIM_IRQn_Handler CVWL368.lib(drv_spi_master.o) + 0x00012f8c 0x00012f8c 0x00000200 Code RO 2325 i.app_SPIS_IRQn_Handler CVWL368.lib(hal_spi_slave.o) + 0x0001318c 0x0001318c 0x00000020 Code RO 1595 i.app_SWIRE_IRQn_Handler CVWL368.lib(drv_swire.o) + 0x000131ac 0x000131ac 0x00000018 Code RO 1066 i.app_SysTick_Handler CVWL368.lib(drv_common.o) + 0x000131c4 0x000131c4 0x0000000a Code RO 1645 i.app_TIMER0_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000131ce 0x000131ce 0x0000000a Code RO 1646 i.app_TIMER1_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000131d8 0x000131d8 0x0000000a Code RO 1647 i.app_TIMER2_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000131e2 0x000131e2 0x0000000a Code RO 1648 i.app_TIMER3_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000131ec 0x000131ec 0x00000008 Code RO 2446 i.app_UART_IRQn_Handler CVWL368.lib(drv_uart.o) + 0x000131f4 0x000131f4 0x0000001c Code RO 2117 i.app_VIDC_IRQn_Handler CVWL368.lib(drv_vidc.o) + 0x00013210 0x00013210 0x0000001c Code RO 2053 i.app_VPRE_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x0001322c 0x0001322c 0x00000038 Code RO 2505 i.app_WDG_IRQn_Handler CVWL368.lib(drv_wdg.o) + 0x00013264 0x00013264 0x00000010 Code RO 1177 i.app_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00013274 0x00013274 0x00000030 Code RO 981 i.app_fls_ctrl_Handler CVWL368.lib(norflash.o) + 0x000132a4 0x000132a4 0x00000024 Code RO 268 i.app_tp_I2C_init app_tp_transfer.o + 0x000132c8 0x000132c8 0x0000005c Code RO 112 i.app_tp_calibration_exec ap_demo.o + 0x00013324 0x00013324 0x00000030 Code RO 269 i.app_tp_i2cs_callback app_tp_transfer.o + 0x00013354 0x00013354 0x00000054 Code RO 270 i.app_tp_init app_tp_transfer.o + 0x000133a8 0x000133a8 0x00000020 Code RO 271 i.app_tp_m_read app_tp_transfer.o + 0x000133c8 0x000133c8 0x00000008 Code RO 273 i.app_tp_m_write app_tp_transfer.o + 0x000133d0 0x000133d0 0x00000368 Code RO 410 i.app_tp_phone_analysis_data app_tp_for_custom_s8.o + 0x00013738 0x00013738 0x0000000c Code RO 274 i.app_tp_phone_clear_reset_on app_tp_transfer.o + 0x00013744 0x00013744 0x00000008 Code RO 276 i.app_tp_s_read app_tp_transfer.o + 0x0001374c 0x0001374c 0x00000008 Code RO 278 i.app_tp_s_write app_tp_transfer.o + 0x00013754 0x00013754 0x000002d0 Code RO 412 i.app_tp_screen_analysis_int app_tp_for_custom_s8.o + 0x00013a24 0x00013a24 0x00000030 Code RO 279 i.app_tp_screen_init app_tp_transfer.o + 0x00013a54 0x00013a54 0x0000000c Code RO 280 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00013a60 0x00013a60 0x00000040 Code RO 281 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00013aa0 0x00013aa0 0x000000f4 Code RO 282 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x00013b94 0x00013b94 0x00000018 Code RO 283 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x00013bac 0x00013bac 0x00000024 Code RO 499 i.board_Init board.o + 0x00013bd0 0x00013bd0 0x0000040c Code RO 1681 i.calc_framebuffer_setting CVWL368.lib(hal_internal_vsync.o) + 0x00013fdc 0x00013fdc 0x000000c8 Code RO 2551 i.ceil m_ps.l(ceil.o) + 0x000140a4 0x000140a4 0x0000002c Code RO 1682 i.check_mipi_rx_tx_video_info CVWL368.lib(hal_internal_vsync.o) + 0x000140d0 0x000140d0 0x00000090 Code RO 1683 i.check_pkt_buf_rev CVWL368.lib(hal_internal_vsync.o) + 0x00014160 0x00014160 0x00000058 Code RO 1753 i.dcs_packet_fifo_alloc CVWL368.lib(dcs_packet_fifo.o) + 0x000141b8 0x000141b8 0x00000018 Code RO 1754 i.dcs_packet_fifo_init CVWL368.lib(dcs_packet_fifo.o) + 0x000141d0 0x000141d0 0x00000044 Code RO 1755 i.dcs_packet_free_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x00014214 0x00014214 0x00000024 Code RO 1756 i.dcs_packet_get_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x00014238 0x00014238 0x0000001c Code RO 1684 i.dcs_sw_filter CVWL368.lib(hal_internal_vsync.o) + 0x00014254 0x00014254 0x00000018 Code RO 943 i.delayMs CVWL368.lib(tau_delay.o) + 0x0001426c 0x0001426c 0x00000022 Code RO 944 i.delayUs CVWL368.lib(tau_delay.o) + 0x0001428e 0x0001428e 0x00000002 PAD + 0x00014290 0x00014290 0x00000038 Code RO 1614 i.drv_ap_rst_trig_edge_detect CVWL368.lib(drv_sys_cfg.o) + 0x000142c8 0x000142c8 0x0000000c Code RO 2295 i.drv_chip_info_get_info CVWL368.lib(drv_chip_info.o) + 0x000142d4 0x000142d4 0x00000040 Code RO 2296 i.drv_chip_info_init CVWL368.lib(drv_chip_info.o) + 0x00014314 0x00014314 0x000000c8 Code RO 2297 i.drv_chip_rx_info_check CVWL368.lib(drv_chip_info.o) + 0x000143dc 0x000143dc 0x00000014 Code RO 2298 i.drv_chip_rx_init_done CVWL368.lib(drv_chip_info.o) + 0x000143f0 0x000143f0 0x00000058 Code RO 1068 i.drv_common_enable_systick CVWL368.lib(drv_common.o) + 0x00014448 0x00014448 0x00000008 Code RO 1071 i.drv_common_system_init CVWL368.lib(drv_common.o) + 0x00014450 0x00014450 0x00000010 Code RO 1092 i.drv_crgu_config_reset_modules CVWL368.lib(drv_crgu.o) + 0x00014460 0x00014460 0x00000014 Code RO 1104 i.drv_crgu_set_ahb_pre_div CVWL368.lib(drv_crgu.o) + 0x00014474 0x00014474 0x00000014 Code RO 1105 i.drv_crgu_set_ahb_src CVWL368.lib(drv_crgu.o) + 0x00014488 0x00014488 0x00000020 Code RO 1108 i.drv_crgu_set_clock CVWL368.lib(drv_crgu.o) + 0x000144a8 0x000144a8 0x00000014 Code RO 1109 i.drv_crgu_set_dpi_mux_src CVWL368.lib(drv_crgu.o) + 0x000144bc 0x000144bc 0x00000018 Code RO 1110 i.drv_crgu_set_dpi_pre_div CVWL368.lib(drv_crgu.o) + 0x000144d4 0x000144d4 0x00000014 Code RO 1111 i.drv_crgu_set_dpi_pre_src CVWL368.lib(drv_crgu.o) + 0x000144e8 0x000144e8 0x00000014 Code RO 1112 i.drv_crgu_set_dsc_core_div CVWL368.lib(drv_crgu.o) + 0x000144fc 0x000144fc 0x00000014 Code RO 1113 i.drv_crgu_set_dsco_src CVWL368.lib(drv_crgu.o) + 0x00014510 0x00014510 0x00000014 Code RO 1114 i.drv_crgu_set_dsco_src_div CVWL368.lib(drv_crgu.o) + 0x00014524 0x00014524 0x00000014 Code RO 1115 i.drv_crgu_set_fb_div CVWL368.lib(drv_crgu.o) + 0x00014538 0x00014538 0x00000014 Code RO 1116 i.drv_crgu_set_fb_src CVWL368.lib(drv_crgu.o) + 0x0001454c 0x0001454c 0x00000014 Code RO 1119 i.drv_crgu_set_lcdc_div CVWL368.lib(drv_crgu.o) + 0x00014560 0x00014560 0x00000014 Code RO 1120 i.drv_crgu_set_lcdc_src CVWL368.lib(drv_crgu.o) + 0x00014574 0x00014574 0x00000014 Code RO 1121 i.drv_crgu_set_mipi_cfg_src CVWL368.lib(drv_crgu.o) + 0x00014588 0x00014588 0x00000018 Code RO 1122 i.drv_crgu_set_mipi_ref_src CVWL368.lib(drv_crgu.o) + 0x000145a0 0x000145a0 0x00000018 Code RO 1125 i.drv_crgu_set_reset CVWL368.lib(drv_crgu.o) + 0x000145b8 0x000145b8 0x00000014 Code RO 1126 i.drv_crgu_set_rxbr_div CVWL368.lib(drv_crgu.o) + 0x000145cc 0x000145cc 0x00000014 Code RO 1127 i.drv_crgu_set_rxbr_src CVWL368.lib(drv_crgu.o) + 0x000145e0 0x000145e0 0x00000014 Code RO 1129 i.drv_crgu_set_vidc_src CVWL368.lib(drv_crgu.o) + 0x000145f4 0x000145f4 0x00000018 Code RO 1181 i.drv_dma_clear_flag CVWL368.lib(drv_dma.o) + 0x0001460c 0x0001460c 0x0000001c Code RO 1182 i.drv_dma_create_handle CVWL368.lib(drv_dma.o) + 0x00014628 0x00014628 0x00000010 Code RO 1184 i.drv_dma_disenable_channel CVWL368.lib(drv_dma.o) + 0x00014638 0x00014638 0x00000010 Code RO 1186 i.drv_dma_enable_channel CVWL368.lib(drv_dma.o) + 0x00014648 0x00014648 0x00000024 Code RO 1187 i.drv_dma_enable_channel_interrupts CVWL368.lib(drv_dma.o) + 0x0001466c 0x0001466c 0x0000000c Code RO 1189 i.drv_dma_get_channel_flag CVWL368.lib(drv_dma.o) + 0x00014678 0x00014678 0x00000090 Code RO 1192 i.drv_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00014708 0x00014708 0x00000012 Code RO 1194 i.drv_dma_prepar_transfer CVWL368.lib(drv_dma.o) + 0x0001471a 0x0001471a 0x0000001a Code RO 1196 i.drv_dma_set_burst CVWL368.lib(drv_dma.o) + 0x00014734 0x00014734 0x00000006 Code RO 1197 i.drv_dma_set_callback CVWL368.lib(drv_dma.o) + 0x0001473a 0x0001473a 0x00000002 PAD + 0x0001473c 0x0001473c 0x00000044 Code RO 1199 i.drv_dma_set_transfer CVWL368.lib(drv_dma.o) + 0x00014780 0x00014780 0x00000036 Code RO 2308 i.drv_dsc_dec_convert_pps_rc_parameter CVWL368.lib(drv_dsc_dec.o) + 0x000147b6 0x000147b6 0x0000000c Code RO 2309 i.drv_dsc_dec_disable CVWL368.lib(drv_dsc_dec.o) + 0x000147c2 0x000147c2 0x00000002 PAD + 0x000147c4 0x000147c4 0x00000074 Code RO 2310 i.drv_dsc_dec_enable CVWL368.lib(drv_dsc_dec.o) + 0x00014838 0x00014838 0x0000000a Code RO 2311 i.drv_dsc_dec_get_nslc CVWL368.lib(drv_dsc_dec.o) + 0x00014842 0x00014842 0x00000028 Code RO 2313 i.drv_dsc_dec_set_u8_pps CVWL368.lib(drv_dsc_dec.o) + 0x0001486a 0x0001486a 0x00000002 PAD + 0x0001486c 0x0001486c 0x00000104 Code RO 1767 i.drv_dsi_rx_calc_ipi_tx_delay CVWL368.lib(drv_dsi_rx.o) + 0x00014970 0x00014970 0x00000040 Code RO 1768 i.drv_dsi_rx_enable_irq CVWL368.lib(drv_dsi_rx.o) + 0x000149b0 0x000149b0 0x00000050 Code RO 1769 i.drv_dsi_rx_get_color_bpp CVWL368.lib(drv_dsi_rx.o) + 0x00014a00 0x00014a00 0x0000001c Code RO 1770 i.drv_dsi_rx_get_color_pcc CVWL368.lib(drv_dsi_rx.o) + 0x00014a1c 0x00014a1c 0x00000008 Code RO 1771 i.drv_dsi_rx_get_compression_en CVWL368.lib(drv_dsi_rx.o) + 0x00014a24 0x00014a24 0x00000006 Code RO 1772 i.drv_dsi_rx_get_max_ret_size CVWL368.lib(drv_dsi_rx.o) + 0x00014a2a 0x00014a2a 0x0000000e Code RO 1776 i.drv_dsi_rx_power_up CVWL368.lib(drv_dsi_rx.o) + 0x00014a38 0x00014a38 0x00000020 Code RO 1777 i.drv_dsi_rx_set_ctrl_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014a58 0x00014a58 0x00000010 Code RO 1778 i.drv_dsi_rx_set_ddi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014a68 0x00014a68 0x00000004 Code RO 1780 i.drv_dsi_rx_set_inten CVWL368.lib(drv_dsi_rx.o) + 0x00014a6c 0x00014a6c 0x00000010 Code RO 1781 i.drv_dsi_rx_set_ipi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014a7c 0x00014a7c 0x00000046 Code RO 1783 i.drv_dsi_rx_set_lane_swap CVWL368.lib(drv_dsi_rx.o) + 0x00014ac2 0x00014ac2 0x00000026 Code RO 1784 i.drv_dsi_rx_set_resp_cnt CVWL368.lib(drv_dsi_rx.o) + 0x00014ae8 0x00014ae8 0x0000010c Code RO 1785 i.drv_dsi_rx_set_up_phy CVWL368.lib(drv_dsi_rx.o) + 0x00014bf4 0x00014bf4 0x0000000e Code RO 1786 i.drv_dsi_rx_shut_down CVWL368.lib(drv_dsi_rx.o) + 0x00014c02 0x00014c02 0x00000014 Code RO 1824 i.drv_dsi_tx_command_header CVWL368.lib(drv_dsi_tx.o) + 0x00014c16 0x00014c16 0x0000006c Code RO 1825 i.drv_dsi_tx_command_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00014c82 0x00014c82 0x00000004 Code RO 1826 i.drv_dsi_tx_command_put_payload CVWL368.lib(drv_dsi_tx.o) + 0x00014c86 0x00014c86 0x00000018 Code RO 1827 i.drv_dsi_tx_config_eotp CVWL368.lib(drv_dsi_tx.o) + 0x00014c9e 0x00014c9e 0x00000008 Code RO 1828 i.drv_dsi_tx_config_int CVWL368.lib(drv_dsi_tx.o) + 0x00014ca6 0x00014ca6 0x00000008 Code RO 1829 i.drv_dsi_tx_dpi_lpcmd_time CVWL368.lib(drv_dsi_tx.o) + 0x00014cae 0x00014cae 0x0000000a Code RO 1830 i.drv_dsi_tx_dpi_mode CVWL368.lib(drv_dsi_tx.o) + 0x00014cb8 0x00014cb8 0x00000024 Code RO 1831 i.drv_dsi_tx_dpi_polarity CVWL368.lib(drv_dsi_tx.o) + 0x00014cdc 0x00014cdc 0x00000004 Code RO 1832 i.drv_dsi_tx_edpi_cmd_size CVWL368.lib(drv_dsi_tx.o) + 0x00014ce0 0x00014ce0 0x00000004 Code RO 1834 i.drv_dsi_tx_get_cmd_status CVWL368.lib(drv_dsi_tx.o) + 0x00014ce4 0x00014ce4 0x00000004 Code RO 1836 i.drv_dsi_tx_mode CVWL368.lib(drv_dsi_tx.o) + 0x00014ce8 0x00014ce8 0x00000018 Code RO 1837 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL368.lib(drv_dsi_tx.o) + 0x00014d00 0x00014d00 0x0000001a Code RO 1838 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL368.lib(drv_dsi_tx.o) + 0x00014d1a 0x00014d1a 0x0000000c Code RO 1840 i.drv_dsi_tx_phy_lane_mode CVWL368.lib(drv_dsi_tx.o) + 0x00014d26 0x00014d26 0x00000064 Code RO 1844 i.drv_dsi_tx_phy_status_ready CVWL368.lib(drv_dsi_tx.o) + 0x00014d8a 0x00014d8a 0x0000003e Code RO 1845 i.drv_dsi_tx_phy_status_stopstate CVWL368.lib(drv_dsi_tx.o) + 0x00014dc8 0x00014dc8 0x0000010c Code RO 1847 i.drv_dsi_tx_phy_test_setup CVWL368.lib(drv_dsi_tx.o) + 0x00014ed4 0x00014ed4 0x0000001e Code RO 1848 i.drv_dsi_tx_phy_time_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00014ef2 0x00014ef2 0x00000008 Code RO 1852 i.drv_dsi_tx_powerup CVWL368.lib(drv_dsi_tx.o) + 0x00014efa 0x00014efa 0x0000001c Code RO 1853 i.drv_dsi_tx_response_mode CVWL368.lib(drv_dsi_tx.o) + 0x00014f16 0x00014f16 0x00000018 Code RO 1856 i.drv_dsi_tx_set_bta_ack CVWL368.lib(drv_dsi_tx.o) + 0x00014f2e 0x00014f2e 0x0000000c Code RO 1857 i.drv_dsi_tx_set_esc_div CVWL368.lib(drv_dsi_tx.o) + 0x00014f3a 0x00014f3a 0x00000002 PAD + 0x00014f3c 0x00014f3c 0x00000034 Code RO 1858 i.drv_dsi_tx_set_int CVWL368.lib(drv_dsi_tx.o) + 0x00014f70 0x00014f70 0x00000010 Code RO 1859 i.drv_dsi_tx_set_time_out_div CVWL368.lib(drv_dsi_tx.o) + 0x00014f80 0x00014f80 0x00000008 Code RO 1860 i.drv_dsi_tx_set_video_chunk CVWL368.lib(drv_dsi_tx.o) + 0x00014f88 0x00014f88 0x00000022 Code RO 1861 i.drv_dsi_tx_set_video_timing CVWL368.lib(drv_dsi_tx.o) + 0x00014faa 0x00014faa 0x00000008 Code RO 1863 i.drv_dsi_tx_shutdown CVWL368.lib(drv_dsi_tx.o) + 0x00014fb2 0x00014fb2 0x00000026 Code RO 1864 i.drv_dsi_tx_timeout_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00014fd8 0x00014fd8 0x000000aa Code RO 1867 i.drv_dsi_tx_video_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00015082 0x00015082 0x00000016 Code RO 1868 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL368.lib(drv_dsi_tx.o) + 0x00015098 0x00015098 0x00000018 Code RO 1869 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL368.lib(drv_dsi_tx.o) + 0x000150b0 0x000150b0 0x00000020 Code RO 2531 i.drv_efuse_enter_inactive CVWL368.lib(drv_efuse.o) + 0x000150d0 0x000150d0 0x0000000c Code RO 2534 i.drv_efuse_int_enable CVWL368.lib(drv_efuse.o) + 0x000150dc 0x000150dc 0x00000032 Code RO 2535 i.drv_efuse_read CVWL368.lib(drv_efuse.o) + 0x0001510e 0x0001510e 0x00000018 Code RO 2536 i.drv_efuse_read_req CVWL368.lib(drv_efuse.o) + 0x00015126 0x00015126 0x00000002 PAD + 0x00015128 0x00015128 0x00000018 Code RO 1324 i.drv_gpio_get_input_data CVWL368.lib(drv_gpio.o) + 0x00015140 0x00015140 0x0000000c Code RO 1326 i.drv_gpio_register_ap_reset_callback CVWL368.lib(drv_gpio.o) + 0x0001514c 0x0001514c 0x00000014 Code RO 1327 i.drv_gpio_register_callback CVWL368.lib(drv_gpio.o) + 0x00015160 0x00015160 0x00000044 Code RO 1329 i.drv_gpio_set_int CVWL368.lib(drv_gpio.o) + 0x000151a4 0x000151a4 0x00000020 Code RO 1330 i.drv_gpio_set_ioe CVWL368.lib(drv_gpio.o) + 0x000151c4 0x000151c4 0x00000010 Code RO 1331 i.drv_gpio_set_mode0 CVWL368.lib(drv_gpio.o) + 0x000151d4 0x000151d4 0x00000010 Code RO 1332 i.drv_gpio_set_mode1 CVWL368.lib(drv_gpio.o) + 0x000151e4 0x000151e4 0x00000010 Code RO 1333 i.drv_gpio_set_mode2 CVWL368.lib(drv_gpio.o) + 0x000151f4 0x000151f4 0x00000010 Code RO 1334 i.drv_gpio_set_mode3 CVWL368.lib(drv_gpio.o) + 0x00015204 0x00015204 0x00000020 Code RO 709 i.drv_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x00015224 0x00015224 0x00000130 Code RO 1335 i.drv_gpio_set_pull_state CVWL368.lib(drv_gpio.o) + 0x00015354 0x00015354 0x00000034 Code RO 1367 i.drv_i2c_dma_callback CVWL368.lib(drv_i2c_dma.o) + 0x00015388 0x00015388 0x000000ac Code RO 1368 i.drv_i2c_dma_init CVWL368.lib(drv_i2c_dma.o) + 0x00015434 0x00015434 0x0000001a Code RO 1369 i.drv_i2c_enable_rx_dma CVWL368.lib(drv_i2c_dma.o) + 0x0001544e 0x0001544e 0x00000018 Code RO 1370 i.drv_i2c_enable_tx_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015466 0x00015466 0x00000002 PAD + 0x00015468 0x00015468 0x00000060 Code RO 1394 i.drv_i2c_m_clear_it_pending_bit CVWL368.lib(drv_i2c_master.o) + 0x000154c8 0x000154c8 0x00000010 Code RO 1397 i.drv_i2c_m_enable CVWL368.lib(drv_i2c_master.o) + 0x000154d8 0x000154d8 0x00000038 Code RO 1398 i.drv_i2c_m_enable_intr CVWL368.lib(drv_i2c_master.o) + 0x00015510 0x00015510 0x0000000c Code RO 1401 i.drv_i2c_m_set_callback CVWL368.lib(drv_i2c_master.o) + 0x0001551c 0x0001551c 0x0000008c Code RO 1405 i.drv_i2c_master_init CVWL368.lib(drv_i2c_master.o) + 0x000155a8 0x000155a8 0x0000005c Code RO 1371 i.drv_i2c_master_read_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015604 0x00015604 0x0000003c Code RO 1372 i.drv_i2c_master_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015640 0x00015640 0x0000002e Code RO 1373 i.drv_i2c_master_write_read_cmd CVWL368.lib(drv_i2c_dma.o) + 0x0001566e 0x0001566e 0x00000002 PAD + 0x00015670 0x00015670 0x0000005c Code RO 1429 i.drv_i2c_s_clear_it_pending_bit CVWL368.lib(drv_i2c_slave.o) + 0x000156cc 0x000156cc 0x00000034 Code RO 1433 i.drv_i2c_s_enable_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015700 0x00015700 0x0000001c Code RO 1434 i.drv_i2c_s_get_fifo_status CVWL368.lib(drv_i2c_slave.o) + 0x0001571c 0x0001571c 0x0000000c Code RO 1437 i.drv_i2c_s_set_callback CVWL368.lib(drv_i2c_slave.o) + 0x00015728 0x00015728 0x00000020 Code RO 1440 i.drv_i2c_s_write_data CVWL368.lib(drv_i2c_slave.o) + 0x00015748 0x00015748 0x00000058 Code RO 1374 i.drv_i2c_set_dma_irq_callback CVWL368.lib(drv_i2c_dma.o) + 0x000157a0 0x000157a0 0x00000044 Code RO 1441 i.drv_i2c_slave_init CVWL368.lib(drv_i2c_slave.o) + 0x000157e4 0x000157e4 0x0000001c Code RO 1375 i.drv_i2c_slave_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015800 0x00015800 0x00000018 Code RO 1936 i.drv_lcdc_config_bypass CVWL368.lib(drv_lcdc.o) + 0x00015818 0x00015818 0x00000030 Code RO 1937 i.drv_lcdc_config_ccm CVWL368.lib(drv_lcdc.o) + 0x00015848 0x00015848 0x00000016 Code RO 1938 i.drv_lcdc_config_disp_mode CVWL368.lib(drv_lcdc.o) + 0x0001585e 0x0001585e 0x00000024 Code RO 1939 i.drv_lcdc_config_dpi_polarity CVWL368.lib(drv_lcdc.o) + 0x00015882 0x00015882 0x00000026 Code RO 1940 i.drv_lcdc_config_dpi_timing CVWL368.lib(drv_lcdc.o) + 0x000158a8 0x000158a8 0x00000016 Code RO 1941 i.drv_lcdc_config_edpi_mode CVWL368.lib(drv_lcdc.o) + 0x000158be 0x000158be 0x00000016 Code RO 1942 i.drv_lcdc_config_endianness CVWL368.lib(drv_lcdc.o) + 0x000158d4 0x000158d4 0x0000000c Code RO 1943 i.drv_lcdc_config_input_size CVWL368.lib(drv_lcdc.o) + 0x000158e0 0x000158e0 0x0000001e Code RO 1944 i.drv_lcdc_config_int CVWL368.lib(drv_lcdc.o) + 0x000158fe 0x000158fe 0x00000022 Code RO 1945 i.drv_lcdc_config_int_single CVWL368.lib(drv_lcdc.o) + 0x00015920 0x00015920 0x00000022 Code RO 1946 i.drv_lcdc_config_overwrite CVWL368.lib(drv_lcdc.o) + 0x00015942 0x00015942 0x0000000c Code RO 1947 i.drv_lcdc_config_overwrite_rgb CVWL368.lib(drv_lcdc.o) + 0x0001594e 0x0001594e 0x0000001a Code RO 1948 i.drv_lcdc_config_partial_display_area CVWL368.lib(drv_lcdc.o) + 0x00015968 0x00015968 0x00000022 Code RO 1949 i.drv_lcdc_config_partial_display_enable CVWL368.lib(drv_lcdc.o) + 0x0001598a 0x0001598a 0x0000001a Code RO 1951 i.drv_lcdc_config_scale_up_coef CVWL368.lib(drv_lcdc.o) + 0x000159a4 0x000159a4 0x0000000c Code RO 1952 i.drv_lcdc_config_scale_up_step CVWL368.lib(drv_lcdc.o) + 0x000159b0 0x000159b0 0x0000004c Code RO 1953 i.drv_lcdc_config_src_parameter CVWL368.lib(drv_lcdc.o) + 0x000159fc 0x000159fc 0x00000006 Code RO 1954 i.drv_lcdc_config_thresh CVWL368.lib(drv_lcdc.o) + 0x00015a02 0x00015a02 0x00000012 Code RO 1955 i.drv_lcdc_ctrl_flow CVWL368.lib(drv_lcdc.o) + 0x00015a14 0x00015a14 0x00000020 Code RO 1957 i.drv_lcdc_enable_shadow_reg CVWL368.lib(drv_lcdc.o) + 0x00015a34 0x00015a34 0x00000034 Code RO 1958 i.drv_lcdc_set_int CVWL368.lib(drv_lcdc.o) + 0x00015a68 0x00015a68 0x00000014 Code RO 1960 i.drv_lcdc_set_video_hw_mode CVWL368.lib(drv_lcdc.o) + 0x00015a7c 0x00015a7c 0x00000020 Code RO 1961 i.drv_lcdc_start CVWL368.lib(drv_lcdc.o) + 0x00015a9c 0x00015a9c 0x0000000c Code RO 1995 i.drv_memc_clear_status CVWL368.lib(drv_memc.o) + 0x00015aa8 0x00015aa8 0x00000040 Code RO 1996 i.drv_memc_enable_irq CVWL368.lib(drv_memc.o) + 0x00015ae8 0x00015ae8 0x0000000c Code RO 1997 i.drv_memc_gen_a_tear_signal CVWL368.lib(drv_memc.o) + 0x00015af4 0x00015af4 0x00000012 Code RO 1998 i.drv_memc_get_status CVWL368.lib(drv_memc.o) + 0x00015b06 0x00015b06 0x00000010 Code RO 1999 i.drv_memc_rate_transfer_sel CVWL368.lib(drv_memc.o) + 0x00015b16 0x00015b16 0x0000000e Code RO 2000 i.drv_memc_sel_vsync CVWL368.lib(drv_memc.o) + 0x00015b24 0x00015b24 0x00000014 Code RO 2001 i.drv_memc_set_active_height CVWL368.lib(drv_memc.o) + 0x00015b38 0x00015b38 0x0000000c Code RO 2002 i.drv_memc_set_data_mode CVWL368.lib(drv_memc.o) + 0x00015b44 0x00015b44 0x00000010 Code RO 2005 i.drv_memc_set_double_buffer CVWL368.lib(drv_memc.o) + 0x00015b54 0x00015b54 0x00000012 Code RO 2006 i.drv_memc_set_double_buffer_reverse CVWL368.lib(drv_memc.o) + 0x00015b66 0x00015b66 0x00000010 Code RO 2008 i.drv_memc_set_fs_en_conditions CVWL368.lib(drv_memc.o) + 0x00015b76 0x00015b76 0x00000014 Code RO 2009 i.drv_memc_set_inten CVWL368.lib(drv_memc.o) + 0x00015b8a 0x00015b8a 0x00000002 PAD + 0x00015b8c 0x00015b8c 0x00000018 Code RO 2010 i.drv_memc_set_lcdc_st_conditions CVWL368.lib(drv_memc.o) + 0x00015ba4 0x00015ba4 0x0000001a Code RO 2011 i.drv_memc_set_ltpo_mode CVWL368.lib(drv_memc.o) + 0x00015bbe 0x00015bbe 0x0000000e Code RO 2015 i.drv_memc_set_tear_mode CVWL368.lib(drv_memc.o) + 0x00015bcc 0x00015bcc 0x00000028 Code RO 2016 i.drv_memc_set_tear_waveform CVWL368.lib(drv_memc.o) + 0x00015bf4 0x00015bf4 0x0000000e Code RO 2018 i.drv_memc_set_vidc_sync_cnt CVWL368.lib(drv_memc.o) + 0x00015c02 0x00015c02 0x00000002 PAD + 0x00015c04 0x00015c04 0x00000008 Code RO 1463 i.drv_param_init_get_ccm CVWL368.lib(drv_param_init.o) + 0x00015c0c 0x00015c0c 0x00000014 Code RO 1464 i.drv_param_init_get_scld_filter_h CVWL368.lib(drv_param_init.o) + 0x00015c20 0x00015c20 0x00000014 Code RO 1465 i.drv_param_init_get_scld_filter_v CVWL368.lib(drv_param_init.o) + 0x00015c34 0x00015c34 0x00000008 Code RO 1466 i.drv_param_init_get_sclu_filter CVWL368.lib(drv_param_init.o) + 0x00015c3c 0x00015c3c 0x00000014 Code RO 1467 i.drv_param_init_set_ccm CVWL368.lib(drv_param_init.o) + 0x00015c50 0x00015c50 0x00000024 Code RO 1470 i.drv_param_p2r_filter_init CVWL368.lib(drv_param_init.o) + 0x00015c74 0x00015c74 0x00000010 Code RO 2267 i.drv_phy_enable_calibration CVWL368.lib(drv_phy_common.o) + 0x00015c84 0x00015c84 0x0000003c Code RO 2268 i.drv_phy_get_calibration CVWL368.lib(drv_phy_common.o) + 0x00015cc0 0x00015cc0 0x00000060 Code RO 2269 i.drv_phy_get_pll_para CVWL368.lib(drv_phy_common.o) + 0x00015d20 0x00015d20 0x00000054 Code RO 2270 i.drv_phy_get_rate_para CVWL368.lib(drv_phy_common.o) + 0x00015d74 0x00015d74 0x00000010 Code RO 2271 i.drv_phy_test_clear CVWL368.lib(drv_phy_common.o) + 0x00015d84 0x00015d84 0x00000018 Code RO 2272 i.drv_phy_test_lock CVWL368.lib(drv_phy_common.o) + 0x00015d9c 0x00015d9c 0x00000020 Code RO 2274 i.drv_phy_test_write_1_byte CVWL368.lib(drv_phy_common.o) + 0x00015dbc 0x00015dbc 0x00000026 Code RO 2275 i.drv_phy_test_write_2_byte CVWL368.lib(drv_phy_common.o) + 0x00015de2 0x00015de2 0x0000001e Code RO 2276 i.drv_phy_test_write_code CVWL368.lib(drv_phy_common.o) + 0x00015e00 0x00015e00 0x00000020 Code RO 2277 i.drv_phy_test_write_data CVWL368.lib(drv_phy_common.o) + 0x00015e20 0x00015e20 0x00000020 Code RO 1495 i.drv_pwm_out_enable CVWL368.lib(drv_pwm.o) + 0x00015e40 0x00015e40 0x0000000c Code RO 1498 i.drv_pwm_out_set_control CVWL368.lib(drv_pwm.o) + 0x00015e4c 0x00015e4c 0x0000000c Code RO 1499 i.drv_pwm_out_set_period CVWL368.lib(drv_pwm.o) + 0x00015e58 0x00015e58 0x0000000c Code RO 1501 i.drv_pwm_out_set_threshold CVWL368.lib(drv_pwm.o) + 0x00015e64 0x00015e64 0x00000020 Code RO 1525 i.drv_pwr_set_cp_mode CVWL368.lib(drv_pwr.o) + 0x00015e84 0x00015e84 0x00000018 Code RO 1526 i.drv_pwr_set_pvd_mode CVWL368.lib(drv_pwr.o) + 0x00015e9c 0x00015e9c 0x00000038 Code RO 1527 i.drv_pwr_set_system_clk_src CVWL368.lib(drv_pwr.o) + 0x00015ed4 0x00015ed4 0x0000000c Code RO 1787 i.drv_rx_phy_test_clear CVWL368.lib(drv_dsi_rx.o) + 0x00015ee0 0x00015ee0 0x00000010 Code RO 1788 i.drv_rx_phy_test_lock CVWL368.lib(drv_dsi_rx.o) + 0x00015ef0 0x00015ef0 0x00000014 Code RO 1790 i.drv_rx_phy_test_write_1_byte CVWL368.lib(drv_dsi_rx.o) + 0x00015f04 0x00015f04 0x00000016 Code RO 1791 i.drv_rx_phy_test_write_2_byte CVWL368.lib(drv_dsi_rx.o) + 0x00015f1a 0x00015f1a 0x0000000a Code RO 2054 i.drv_rxbr_clear_pkt_buffer CVWL368.lib(drv_rxbr.o) + 0x00015f24 0x00015f24 0x00000004 Code RO 2055 i.drv_rxbr_clear_status0 CVWL368.lib(drv_rxbr.o) + 0x00015f28 0x00015f28 0x0000005a Code RO 2057 i.drv_rxbr_enable_irq CVWL368.lib(drv_rxbr.o) + 0x00015f82 0x00015f82 0x00000002 PAD + 0x00015f84 0x00015f84 0x00000014 Code RO 2058 i.drv_rxbr_frame_drop_cfg CVWL368.lib(drv_rxbr.o) + 0x00015f98 0x00015f98 0x0000003c Code RO 2059 i.drv_rxbr_get_clk CVWL368.lib(drv_rxbr.o) + 0x00015fd4 0x00015fd4 0x00000004 Code RO 2060 i.drv_rxbr_get_col_addr CVWL368.lib(drv_rxbr.o) + 0x00015fd8 0x00015fd8 0x00000012 Code RO 1685 i.drv_rxbr_get_int_source CVWL368.lib(hal_internal_vsync.o) + 0x00015fea 0x00015fea 0x00000004 Code RO 2063 i.drv_rxbr_get_page_addr CVWL368.lib(drv_rxbr.o) + 0x00015fee 0x00015fee 0x00000012 Code RO 1686 i.drv_rxbr_get_status0 CVWL368.lib(hal_internal_vsync.o) + 0x00016000 0x00016000 0x0000000c Code RO 2065 i.drv_rxbr_hline_rcv0_cfg CVWL368.lib(drv_rxbr.o) + 0x0001600c 0x0001600c 0x00000008 Code RO 2066 i.drv_rxbr_hline_rcv_cfg CVWL368.lib(drv_rxbr.o) + 0x00016014 0x00016014 0x0000000c Code RO 2067 i.drv_rxbr_register_irq0_callback CVWL368.lib(drv_rxbr.o) + 0x00016020 0x00016020 0x0000000c Code RO 2068 i.drv_rxbr_register_irq1_callback CVWL368.lib(drv_rxbr.o) + 0x0001602c 0x0001602c 0x00000014 Code RO 2069 i.drv_rxbr_set_ack_pkt_header CVWL368.lib(drv_rxbr.o) + 0x00016040 0x00016040 0x000000cc Code RO 2070 i.drv_rxbr_set_cmd_filter CVWL368.lib(drv_rxbr.o) + 0x0001610c 0x0001610c 0x00000014 Code RO 2072 i.drv_rxbr_set_color_format CVWL368.lib(drv_rxbr.o) + 0x00016120 0x00016120 0x00000014 Code RO 2074 i.drv_rxbr_set_inten CVWL368.lib(drv_rxbr.o) + 0x00016134 0x00016134 0x00000010 Code RO 2075 i.drv_rxbr_set_ltpo_drop_th CVWL368.lib(drv_rxbr.o) + 0x00016144 0x00016144 0x00000026 Code RO 2077 i.drv_rxbr_set_usr_cfg CVWL368.lib(drv_rxbr.o) + 0x0001616a 0x0001616a 0x00000008 Code RO 2078 i.drv_rxbr_set_usr_col CVWL368.lib(drv_rxbr.o) + 0x00016172 0x00016172 0x00000008 Code RO 2079 i.drv_rxbr_set_usr_row CVWL368.lib(drv_rxbr.o) + 0x0001617a 0x0001617a 0x00000002 PAD + 0x0001617c 0x0001617c 0x00000020 Code RO 1571 i.drv_spi_m_read_data CVWL368.lib(drv_spi_master.o) + 0x0001619c 0x0001619c 0x0000001c Code RO 1596 i.drv_swire_enable CVWL368.lib(drv_swire.o) + 0x000161b8 0x000161b8 0x00000048 Code RO 1599 i.drv_swire_set_int CVWL368.lib(drv_swire.o) + 0x00016200 0x00016200 0x0000001c Code RO 1600 i.drv_swire_set_power_down CVWL368.lib(drv_swire.o) + 0x0001621c 0x0001621c 0x0000000c Code RO 1615 i.drv_sys_cfg_clear_all_int CVWL368.lib(drv_sys_cfg.o) + 0x00016228 0x00016228 0x00000028 Code RO 1616 i.drv_sys_cfg_clear_pending CVWL368.lib(drv_sys_cfg.o) + 0x00016250 0x00016250 0x00000018 Code RO 1619 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL368.lib(drv_sys_cfg.o) + 0x00016268 0x00016268 0x0000001c Code RO 1620 i.drv_sys_cfg_sel_ap_rst_trig CVWL368.lib(drv_sys_cfg.o) + 0x00016284 0x00016284 0x00000024 Code RO 1621 i.drv_sys_cfg_sel_gpio_group CVWL368.lib(drv_sys_cfg.o) + 0x000162a8 0x000162a8 0x00000024 Code RO 1622 i.drv_sys_cfg_sel_int_trig CVWL368.lib(drv_sys_cfg.o) + 0x000162cc 0x000162cc 0x00000010 Code RO 1624 i.drv_sys_cfg_set_dma_rx_req CVWL368.lib(drv_sys_cfg.o) + 0x000162dc 0x000162dc 0x00000010 Code RO 1625 i.drv_sys_cfg_set_dma_tx_req CVWL368.lib(drv_sys_cfg.o) + 0x000162ec 0x000162ec 0x00000024 Code RO 1626 i.drv_sys_cfg_set_int CVWL368.lib(drv_sys_cfg.o) + 0x00016310 0x00016310 0x0000001a Code RO 1649 i.drv_timer_clear_status_flags CVWL368.lib(drv_timer.o) + 0x0001632a 0x0001632a 0x00000020 Code RO 1650 i.drv_timer_enable CVWL368.lib(drv_timer.o) + 0x0001634a 0x0001634a 0x00000002 PAD + 0x0001634c 0x0001634c 0x00000010 Code RO 1651 i.drv_timer_get_instance CVWL368.lib(drv_timer.o) + 0x0001635c 0x0001635c 0x00000010 Code RO 1652 i.drv_timer_get_prescaler CVWL368.lib(drv_timer.o) + 0x0001636c 0x0001636c 0x0000003c Code RO 1654 i.drv_timer_handle_interrupt CVWL368.lib(drv_timer.o) + 0x000163a8 0x000163a8 0x00000014 Code RO 1655 i.drv_timer_register_callback CVWL368.lib(drv_timer.o) + 0x000163bc 0x000163bc 0x00000010 Code RO 1656 i.drv_timer_set_compare_val CVWL368.lib(drv_timer.o) + 0x000163cc 0x000163cc 0x00000048 Code RO 1657 i.drv_timer_set_int CVWL368.lib(drv_timer.o) + 0x00016414 0x00016414 0x00000028 Code RO 1658 i.drv_timer_set_prescaler CVWL368.lib(drv_timer.o) + 0x0001643c 0x0001643c 0x00000010 Code RO 1659 i.drv_timer_set_repeat CVWL368.lib(drv_timer.o) + 0x0001644c 0x0001644c 0x0000000a Code RO 1870 i.drv_tx_phy_test_clear CVWL368.lib(drv_dsi_tx.o) + 0x00016456 0x00016456 0x0000001c Code RO 1871 i.drv_tx_phy_test_enter CVWL368.lib(drv_dsi_tx.o) + 0x00016472 0x00016472 0x0000001c Code RO 1872 i.drv_tx_phy_test_exit CVWL368.lib(drv_dsi_tx.o) + 0x0001648e 0x0001648e 0x00000012 Code RO 1874 i.drv_tx_phy_test_write_1_byte CVWL368.lib(drv_dsi_tx.o) + 0x000164a0 0x000164a0 0x00000014 Code RO 1875 i.drv_tx_phy_test_write_2_byte CVWL368.lib(drv_dsi_tx.o) + 0x000164b4 0x000164b4 0x00000010 Code RO 1876 i.drv_tx_phy_test_write_code CVWL368.lib(drv_dsi_tx.o) + 0x000164c4 0x000164c4 0x00000008 Code RO 2118 i.drv_vidc_clear_irq CVWL368.lib(drv_vidc.o) + 0x000164cc 0x000164cc 0x00000018 Code RO 2122 i.drv_vidc_enable CVWL368.lib(drv_vidc.o) + 0x000164e4 0x000164e4 0x00000040 Code RO 2123 i.drv_vidc_enable_irq CVWL368.lib(drv_vidc.o) + 0x00016524 0x00016524 0x00000012 Code RO 2125 i.drv_vidc_get_irq_status CVWL368.lib(drv_vidc.o) + 0x00016536 0x00016536 0x00000002 PAD + 0x00016538 0x00016538 0x00000028 Code RO 2129 i.drv_vidc_init_module_enable CVWL368.lib(drv_vidc.o) + 0x00016560 0x00016560 0x0000000c Code RO 2130 i.drv_vidc_register_callback CVWL368.lib(drv_vidc.o) + 0x0001656c 0x0001656c 0x00000006 Code RO 2131 i.drv_vidc_reset CVWL368.lib(drv_vidc.o) + 0x00016572 0x00016572 0x0000003c Code RO 2133 i.drv_vidc_set_dst_parameter CVWL368.lib(drv_vidc.o) + 0x000165ae 0x000165ae 0x00000014 Code RO 2137 i.drv_vidc_set_irqen CVWL368.lib(drv_vidc.o) + 0x000165c2 0x000165c2 0x00000010 Code RO 2138 i.drv_vidc_set_mirror CVWL368.lib(drv_vidc.o) + 0x000165d2 0x000165d2 0x00000008 Code RO 2141 i.drv_vidc_set_p2r_hcoef0 CVWL368.lib(drv_vidc.o) + 0x000165da 0x000165da 0x00000026 Code RO 2142 i.drv_vidc_set_p2r_hinitb CVWL368.lib(drv_vidc.o) + 0x00016600 0x00016600 0x00000026 Code RO 2143 i.drv_vidc_set_p2r_hinitr CVWL368.lib(drv_vidc.o) + 0x00016626 0x00016626 0x00000002 PAD + 0x00016628 0x00016628 0x00000018 Code RO 2144 i.drv_vidc_set_pentile_swap CVWL368.lib(drv_vidc.o) + 0x00016640 0x00016640 0x0000000a Code RO 2145 i.drv_vidc_set_pu_ctrl CVWL368.lib(drv_vidc.o) + 0x0001664a 0x0001664a 0x00000010 Code RO 2146 i.drv_vidc_set_rotation CVWL368.lib(drv_vidc.o) + 0x0001665a 0x0001665a 0x0000000a Code RO 2147 i.drv_vidc_set_scld_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016664 0x00016664 0x0000000a Code RO 2148 i.drv_vidc_set_scld_hcoef1 CVWL368.lib(drv_vidc.o) + 0x0001666e 0x0001666e 0x00000012 Code RO 2149 i.drv_vidc_set_scld_step CVWL368.lib(drv_vidc.o) + 0x00016680 0x00016680 0x0000000a Code RO 2150 i.drv_vidc_set_scld_vcoef0 CVWL368.lib(drv_vidc.o) + 0x0001668a 0x0001668a 0x0000000a Code RO 2151 i.drv_vidc_set_scld_vcoef1 CVWL368.lib(drv_vidc.o) + 0x00016694 0x00016694 0x00000016 Code RO 2152 i.drv_vidc_set_src_parameter CVWL368.lib(drv_vidc.o) + 0x000166aa 0x000166aa 0x00000002 PAD + 0x000166ac 0x000166ac 0x00000010 Code RO 2506 i.drv_wdg_clear_counter CVWL368.lib(drv_wdg.o) + 0x000166bc 0x000166bc 0x00000010 Code RO 2507 i.drv_wdg_clear_edge_flag CVWL368.lib(drv_wdg.o) + 0x000166cc 0x000166cc 0x00000010 Code RO 2510 i.drv_wdg_read_edge_flag CVWL368.lib(drv_wdg.o) + 0x000166dc 0x000166dc 0x00000034 Code RO 2513 i.drv_wdg_set_int CVWL368.lib(drv_wdg.o) + 0x00016710 0x00016710 0x0000000a Code RO 1236 i.fls_clr_interrupt_flag CVWL368.lib(drv_fls.o) + 0x0001671a 0x0001671a 0x00000014 Code RO 953 i.fputc CVWL368.lib(tau_log.o) + 0x0001672e 0x0001672e 0x00000002 PAD + 0x00016730 0x00016730 0x00000030 Code RO 528 i.hal_dsi_rx_ctrl_create_handle CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016760 0x00016760 0x0000009c Code RO 530 i.hal_dsi_rx_ctrl_deinit CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000167fc 0x000167fc 0x00000084 Code RO 532 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016880 0x00016880 0x00000028 Code RO 534 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000168a8 0x000168a8 0x00000028 Code RO 536 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000168d0 0x000168d0 0x00000060 Code RO 538 i.hal_dsi_rx_ctrl_init CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016930 0x00016930 0x00000130 Code RO 539 i.hal_dsi_rx_ctrl_init_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016a60 0x00016a60 0x000000d4 Code RO 540 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016b34 0x00016b34 0x0000013c Code RO 541 i.hal_dsi_rx_ctrl_init_memc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016c70 0x00016c70 0x00000130 Code RO 542 i.hal_dsi_rx_ctrl_init_rxbr CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016da0 0x00016da0 0x0000022c Code RO 543 i.hal_dsi_rx_ctrl_init_vidc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016fcc 0x00016fcc 0x000000f0 Code RO 547 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000170bc 0x000170bc 0x0000002c Code RO 549 i.hal_dsi_rx_ctrl_set_cus_esc_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000170e8 0x000170e8 0x00000034 Code RO 551 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001711c 0x0001711c 0x00000034 Code RO 554 i.hal_dsi_rx_ctrl_set_hw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017150 0x00017150 0x00000038 Code RO 555 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017188 0x00017188 0x00000072 Code RO 559 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000171fa 0x000171fa 0x00000002 PAD + 0x000171fc 0x000171fc 0x00000034 Code RO 560 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017230 0x00017230 0x0000003c Code RO 563 i.hal_dsi_rx_ctrl_start CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001726c 0x0001726c 0x0000003c Code RO 564 i.hal_dsi_rx_ctrl_stop CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000172a8 0x000172a8 0x00000020 Code RO 566 i.hal_dsi_rx_ctrl_toggle_resolution CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000172c8 0x000172c8 0x00000190 Code RO 617 i.hal_dsi_tx_calc_video_chunks CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017458 0x00017458 0x00000034 Code RO 618 i.hal_dsi_tx_config_params_for_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001748c 0x0001748c 0x000004d0 Code RO 619 i.hal_dsi_tx_count_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001795c 0x0001795c 0x0000002c Code RO 621 i.hal_dsi_tx_ctrl_create_handle CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017988 0x00017988 0x00000048 Code RO 622 i.hal_dsi_tx_ctrl_deinit CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000179d0 0x000179d0 0x0000004c Code RO 623 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017a1c 0x00017a1c 0x00000028 Code RO 625 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017a44 0x00017a44 0x000000c4 Code RO 627 i.hal_dsi_tx_ctrl_init CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017b08 0x00017b08 0x00000024 Code RO 628 i.hal_dsi_tx_ctrl_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017b2c 0x00017b2c 0x0000000c Code RO 629 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017b38 0x00017b38 0x00000020 Code RO 632 i.hal_dsi_tx_ctrl_set_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017b58 0x00017b58 0x00000014 Code RO 638 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017b6c 0x00017b6c 0x00000010 Code RO 639 i.hal_dsi_tx_ctrl_set_partial_disp CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017b7c 0x00017b7c 0x00000024 Code RO 640 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017ba0 0x00017ba0 0x0000006c Code RO 642 i.hal_dsi_tx_ctrl_start CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017c0c 0x00017c0c 0x00000044 Code RO 643 i.hal_dsi_tx_ctrl_stop CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017c50 0x00017c50 0x000000d8 Code RO 644 i.hal_dsi_tx_ctrl_write_array_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017d28 0x00017d28 0x000000b0 Code RO 645 i.hal_dsi_tx_ctrl_write_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017dd8 0x00017dd8 0x00000044 Code RO 646 i.hal_dsi_tx_init_data_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017e1c 0x00017e1c 0x00000030 Code RO 647 i.hal_dsi_tx_init_dpi_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017e4c 0x00017e4c 0x00000020 Code RO 648 i.hal_dsi_tx_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017e6c 0x00017e6c 0x00000020 Code RO 649 i.hal_dsi_tx_init_phy_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017e8c 0x00017e8c 0x00000094 Code RO 650 i.hal_dsi_tx_init_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f20 0x00017f20 0x00000058 Code RO 651 i.hal_dsi_tx_init_video_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f78 0x00017f78 0x00000044 Code RO 652 i.hal_dsi_tx_send_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017fbc 0x00017fbc 0x00000018 Code RO 710 i.hal_gpio_ctrl_eint CVWL368.lib(hal_gpio.o) + 0x00017fd4 0x00017fd4 0x00000012 Code RO 711 i.hal_gpio_get_input_data CVWL368.lib(hal_gpio.o) + 0x00017fe6 0x00017fe6 0x00000002 PAD + 0x00017fe8 0x00017fe8 0x00000040 Code RO 714 i.hal_gpio_init_eint CVWL368.lib(hal_gpio.o) + 0x00018028 0x00018028 0x00000020 Code RO 715 i.hal_gpio_init_input CVWL368.lib(hal_gpio.o) + 0x00018048 0x00018048 0x00000028 Code RO 716 i.hal_gpio_init_output CVWL368.lib(hal_gpio.o) + 0x00018070 0x00018070 0x00000018 Code RO 717 i.hal_gpio_reg_eint_cb CVWL368.lib(hal_gpio.o) + 0x00018088 0x00018088 0x00000050 Code RO 718 i.hal_gpio_set_ap_reset_int CVWL368.lib(hal_gpio.o) + 0x000180d8 0x000180d8 0x00000060 Code RO 720 i.hal_gpio_set_mode CVWL368.lib(hal_gpio.o) + 0x00018138 0x00018138 0x00000008 Code RO 721 i.hal_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x00018140 0x00018140 0x00000020 Code RO 723 i.hal_gpio_set_pull_state CVWL368.lib(hal_gpio.o) + 0x00018160 0x00018160 0x0000006c Code RO 749 i.hal_i2c_m_dma_init CVWL368.lib(hal_i2c_master.o) + 0x000181cc 0x000181cc 0x00000020 Code RO 750 i.hal_i2c_m_dma_read CVWL368.lib(hal_i2c_master.o) + 0x000181ec 0x000181ec 0x0000001c Code RO 751 i.hal_i2c_m_dma_write CVWL368.lib(hal_i2c_master.o) + 0x00018208 0x00018208 0x0000000c Code RO 753 i.hal_i2c_m_transfer_complate CVWL368.lib(hal_i2c_master.o) + 0x00018214 0x00018214 0x00000020 Code RO 754 i.hal_i2c_master_irq_callback CVWL368.lib(hal_i2c_master.o) + 0x00018234 0x00018234 0x00000010 Code RO 768 i.hal_i2c_s_dma_user_callback CVWL368.lib(hal_i2c_slave.o) + 0x00018244 0x00018244 0x00000038 Code RO 769 i.hal_i2c_s_dma_write CVWL368.lib(hal_i2c_slave.o) + 0x0001827c 0x0001827c 0x0000006c Code RO 771 i.hal_i2c_s_init CVWL368.lib(hal_i2c_slave.o) + 0x000182e8 0x000182e8 0x00000014 Code RO 772 i.hal_i2c_s_nonblocking_read CVWL368.lib(hal_i2c_slave.o) + 0x000182fc 0x000182fc 0x0000000c Code RO 779 i.hal_i2c_s_set_transfer CVWL368.lib(hal_i2c_slave.o) + 0x00018308 0x00018308 0x0000014c Code RO 782 i.hal_i2c_slave_irq_callback CVWL368.lib(hal_i2c_slave.o) + 0x00018454 0x00018454 0x000000e4 Code RO 1688 i.hal_internal_init_memc CVWL368.lib(hal_internal_vsync.o) + 0x00018538 0x00018538 0x00000010 Code RO 1689 i.hal_internal_sync_get_fb_setting CVWL368.lib(hal_internal_vsync.o) + 0x00018548 0x00018548 0x00000214 Code RO 1690 i.hal_internal_sync_input_resolution_change CVWL368.lib(hal_internal_vsync.o) + 0x0001875c 0x0001875c 0x0000001c Code RO 1692 i.hal_internal_vsync_deinit CVWL368.lib(hal_internal_vsync.o) + 0x00018778 0x00018778 0x0000000c Code RO 1693 i.hal_internal_vsync_get_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018784 0x00018784 0x00000018 Code RO 1694 i.hal_internal_vsync_get_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x0001879c 0x0001879c 0x0000000c Code RO 1695 i.hal_internal_vsync_get_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x000187a8 0x000187a8 0x000000fc Code RO 1696 i.hal_internal_vsync_init_rx CVWL368.lib(hal_internal_vsync.o) + 0x000188a4 0x000188a4 0x000000b0 Code RO 1697 i.hal_internal_vsync_init_tx CVWL368.lib(hal_internal_vsync.o) + 0x00018954 0x00018954 0x0000011c Code RO 1698 i.hal_internal_vsync_set_auto_hw_filter CVWL368.lib(hal_internal_vsync.o) + 0x00018a70 0x00018a70 0x00000014 Code RO 1700 i.hal_internal_vsync_set_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018a84 0x00018a84 0x0000001c Code RO 1701 i.hal_internal_vsync_set_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00018aa0 0x00018aa0 0x00000048 Code RO 1702 i.hal_internal_vsync_set_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x00018ae8 0x00018ae8 0x00000040 Code RO 1703 i.hal_internal_vsync_set_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018b28 0x00018b28 0x00000024 Code RO 653 i.hal_lcdc_config_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018b4c 0x00018b4c 0x00000048 Code RO 654 i.hal_lcdc_config_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018b94 0x00018b94 0x00000014 Code RO 655 i.hal_lcdc_config_rgb_to_pentile CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018ba8 0x00018ba8 0x00000164 Code RO 656 i.hal_lcdc_config_upscaler CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018d0c 0x00018d0c 0x00000040 Code RO 657 i.hal_lcdc_init_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018d4c 0x00018d4c 0x00000180 Code RO 658 i.hal_lcdc_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018ecc 0x00018ecc 0x00000040 Code RO 659 i.hal_lcdc_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018f0c 0x00018f0c 0x00000068 Code RO 815 i.hal_pwm_out_config_all CVWL368.lib(hal_pwm.o) + 0x00018f74 0x00018f74 0x0000000c Code RO 817 i.hal_pwm_out_init CVWL368.lib(hal_pwm.o) + 0x00018f80 0x00018f80 0x0000000e Code RO 851 i.hal_spi_m_clear_rxfifo CVWL368.lib(hal_spi_master.o) + 0x00018f8e 0x00018f8e 0x00000012 Code RO 875 i.hal_swire_deinit CVWL368.lib(hal_swire.o) + 0x00018fa0 0x00018fa0 0x00000016 Code RO 877 i.hal_swire_open CVWL368.lib(hal_swire.o) + 0x00018fb6 0x00018fb6 0x00000008 Code RO 891 i.hal_system_enable_systick CVWL368.lib(hal_system.o) + 0x00018fbe 0x00018fbe 0x00000002 PAD + 0x00018fc0 0x00018fc0 0x00000088 Code RO 896 i.hal_system_init CVWL368.lib(hal_system.o) + 0x00019048 0x00019048 0x0000001c Code RO 897 i.hal_system_init_console CVWL368.lib(hal_system.o) + 0x00019064 0x00019064 0x00000008 Code RO 900 i.hal_system_set_phy_calibration CVWL368.lib(hal_system.o) + 0x0001906c 0x0001906c 0x00000008 Code RO 901 i.hal_system_set_pvd CVWL368.lib(hal_system.o) + 0x00019074 0x00019074 0x00000008 Code RO 902 i.hal_system_set_vcc CVWL368.lib(hal_system.o) + 0x0001907c 0x0001907c 0x0000002e Code RO 925 i.hal_timer_deinit CVWL368.lib(hal_timer.o) + 0x000190aa 0x000190aa 0x0000001a Code RO 927 i.hal_timer_init CVWL368.lib(hal_timer.o) + 0x000190c4 0x000190c4 0x00000048 Code RO 929 i.hal_timer_start CVWL368.lib(hal_timer.o) + 0x0001910c 0x0001910c 0x00000028 Code RO 931 i.hal_timer_stop CVWL368.lib(hal_timer.o) + 0x00019134 0x00019134 0x0000008c Code RO 964 i.hal_uart_init CVWL368.lib(hal_uart.o) + 0x000191c0 0x000191c0 0x00000010 Code RO 967 i.hal_uart_transmit_blocking CVWL368.lib(hal_uart.o) + 0x000191d0 0x000191d0 0x00000110 Code RO 2228 i.handle_init CVWL368.lib(irq_redirect .o) + 0x000192e0 0x000192e0 0x00000078 Code RO 113 i.init_mipi_tx ap_demo.o + 0x00019358 0x00019358 0x0000009c Code RO 114 i.init_panel ap_demo.o + 0x000193f4 0x000193f4 0x0000000a Code RO 3 i.main main.o + 0x000193fe 0x000193fe 0x00000002 PAD + 0x00019400 0x00019400 0x0000008c Code RO 115 i.open_mipi_rx ap_demo.o + 0x0001948c 0x0001948c 0x00000068 Code RO 116 i.pps_update_handle ap_demo.o + 0x000194f4 0x000194f4 0x000003f4 Code RO 1704 i.rx_get_dcs_packet_data CVWL368.lib(hal_internal_vsync.o) + 0x000198e8 0x000198e8 0x00000164 Code RO 1705 i.rx_partial_update CVWL368.lib(hal_internal_vsync.o) + 0x00019a4c 0x00019a4c 0x0000008c Code RO 1706 i.rx_receive_packet CVWL368.lib(hal_internal_vsync.o) + 0x00019ad8 0x00019ad8 0x00000180 Code RO 1707 i.rx_receive_pps CVWL368.lib(hal_internal_vsync.o) + 0x00019c58 0x00019c58 0x000000a4 Code RO 1708 i.rxbr_irq0_callback CVWL368.lib(hal_internal_vsync.o) + 0x00019cfc 0x00019cfc 0x00000170 Code RO 1709 i.rxbr_irq1_callback CVWL368.lib(hal_internal_vsync.o) + 0x00019e6c 0x00019e6c 0x0000008c Code RO 1710 i.soft_gen_te CVWL368.lib(hal_internal_vsync.o) + 0x00019ef8 0x00019ef8 0x0000002c Code RO 117 i.soft_te_timer_cb ap_demo.o + 0x00019f24 0x00019f24 0x0000007c Code RO 118 i.soft_timer3_cb ap_demo.o + 0x00019fa0 0x00019fa0 0x00000048 Code RO 2555 i.sqrt m_ps.l(sqrt.o) + 0x00019fe8 0x00019fe8 0x0000036c Code RO 119 i.translate_data ap_demo.o + 0x0001a354 0x0001a354 0x000000e8 Code RO 1711 i.vidc_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a43c 0x0001a43c 0x000000d0 Code RO 1712 i.vpre_err_reset CVWL368.lib(hal_internal_vsync.o) + 0x0001a50c 0x0001a50c 0x0000019c Code RO 1713 i.vsync_set_te_mode CVWL368.lib(hal_internal_vsync.o) + 0x0001a6a8 0x0001a6a8 0x00002434 Data RO 120 .constdata ap_demo.o + 0x0001cadc 0x0001cadc 0x00001fde Data RO 413 .constdata app_tp_for_custom_s8.o + 0x0001eaba 0x0001eaba 0x00000001 Data RO 428 .constdata app_tp_for_custom_s8.o + 0x0001eabb 0x0001eabb 0x000000d2 Data RO 726 .constdata CVWL368.lib(hal_gpio.o) + 0x0001eb8d 0x0001eb8d 0x00000003 PAD + 0x0001eb90 0x0001eb90 0x00000008 Data RO 1471 .constdata CVWL368.lib(drv_param_init.o) + 0x0001eb98 0x0001eb98 0x00000186 Data RO 2278 .constdata CVWL368.lib(drv_phy_common.o) + 0x0001ed1e 0x0001ed1e 0x00000002 PAD + 0x0001ed20 0x0001ed20 0x00000048 Data RO 568 .conststring CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001ed68 0x0001ed68 0x00000134 Data RO 1715 .conststring CVWL368.lib(hal_internal_vsync.o) + 0x0001ee9c 0x0001ee9c 0x00000030 Data RO 2917 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001eecc, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001eecc, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2229 .ARM.__AT_0x00070100 CVWL368.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001eecc, Size: 0x000036d8, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x000003e0]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x00000030 Data RW 121 .data ap_demo.o + 0x00070200 COMPRESSED 0x0000002e Data RW 285 .data app_tp_transfer.o + 0x0007022e COMPRESSED 0x000000e6 Data RW 429 .data app_tp_for_custom_s8.o + 0x00070314 COMPRESSED 0x00000001 Data RW 432 .data app_tp_for_custom_s8.o + 0x00070315 COMPRESSED 0x00000001 Data RW 433 .data app_tp_for_custom_s8.o + 0x00070316 COMPRESSED 0x00000001 Data RW 438 .data app_tp_for_custom_s8.o + 0x00070317 COMPRESSED 0x00000003 Data RW 439 .data app_tp_for_custom_s8.o + 0x0007031a COMPRESSED 0x00000005 Data RW 440 .data app_tp_for_custom_s8.o + 0x0007031f COMPRESSED 0x00000001 PAD + 0x00070320 COMPRESSED 0x00000030 Data RW 450 .data app_tp_for_custom_s8.o + 0x00070350 COMPRESSED 0x00000008 Data RW 569 .data CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00070358 COMPRESSED 0x00000001 Data RW 661 .data CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00070359 COMPRESSED 0x00000001 Data RW 755 .data CVWL368.lib(hal_i2c_master.o) + 0x0007035a COMPRESSED 0x00000002 PAD + 0x0007035c COMPRESSED 0x0000001c Data RW 783 .data CVWL368.lib(hal_i2c_slave.o) + 0x00070378 COMPRESSED 0x00000012 Data RW 1021 .data CVWL368.lib(norflash.o) + 0x0007038a COMPRESSED 0x00000002 PAD + 0x0007038c COMPRESSED 0x0000000c Data RW 1074 .data CVWL368.lib(drv_common.o) + 0x00070398 COMPRESSED 0x00000004 Data RW 1339 .data CVWL368.lib(drv_gpio.o) + 0x0007039c COMPRESSED 0x00000008 Data RW 1377 .data CVWL368.lib(drv_i2c_dma.o) + 0x000703a4 COMPRESSED 0x00000004 Data RW 1406 .data CVWL368.lib(drv_i2c_master.o) + 0x000703a8 COMPRESSED 0x00000008 Data RW 1442 .data CVWL368.lib(drv_i2c_slave.o) + 0x000703b0 COMPRESSED 0x000004a4 Data RW 1472 .data CVWL368.lib(drv_param_init.o) + 0x00070854 COMPRESSED 0x0000000c Data RW 1502 .data CVWL368.lib(drv_pwm.o) + 0x00070860 COMPRESSED 0x00000004 Data RW 1576 .data CVWL368.lib(drv_spi_master.o) + 0x00070864 COMPRESSED 0x00000008 Data RW 1602 .data CVWL368.lib(drv_swire.o) + 0x0007086c COMPRESSED 0x00000001 Data RW 1627 .data CVWL368.lib(drv_sys_cfg.o) + 0x0007086d COMPRESSED 0x00000003 PAD + 0x00070870 COMPRESSED 0x00000050 Data RW 1660 .data CVWL368.lib(drv_timer.o) + 0x000708c0 COMPRESSED 0x00000004 Data RW 1716 .data CVWL368.lib(hal_internal_vsync.o) + 0x000708c4 COMPRESSED 0x00000008 Data RW 2081 .data CVWL368.lib(drv_rxbr.o) + 0x000708cc COMPRESSED 0x00000004 Data RW 2154 .data CVWL368.lib(drv_vidc.o) + 0x000708d0 COMPRESSED 0x00000001 Data RW 2279 .data CVWL368.lib(drv_phy_common.o) + 0x000708d1 COMPRESSED 0x00000003 PAD + 0x000708d4 COMPRESSED 0x0000000c Data RW 2299 .data CVWL368.lib(drv_chip_info.o) + 0x000708e0 COMPRESSED 0x00000008 Data RW 2448 .data CVWL368.lib(drv_uart.o) + 0x000708e8 COMPRESSED 0x0000000c Data RW 2515 .data CVWL368.lib(drv_wdg.o) + 0x000708f4 COMPRESSED 0x00000004 Data RW 2886 .data mc_p.l(stdout.o) + 0x000708f8 COMPRESSED 0x00000004 Data RW 2898 .data mc_p.l(errno.o) + 0x000708fc - 0x00000190 Zero RW 284 .bss app_tp_transfer.o + 0x00070a8c - 0x000000c0 Zero RW 567 .bss CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00070b4c - 0x00000048 Zero RW 660 .bss CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00070b94 - 0x00000100 Zero RW 954 .bss CVWL368.lib(tau_log.o) + 0x00070c94 - 0x000000d0 Zero RW 969 .bss CVWL368.lib(hal_uart.o) + 0x00070d64 - 0x0000001c Zero RW 1201 .bss CVWL368.lib(drv_dma.o) + 0x00070d80 - 0x00000040 Zero RW 1338 .bss CVWL368.lib(drv_gpio.o) + 0x00070dc0 - 0x00000140 Zero RW 1376 .bss CVWL368.lib(drv_i2c_dma.o) + 0x00070f00 - 0x00000958 Zero RW 1714 .bss CVWL368.lib(hal_internal_vsync.o) + 0x00071858 - 0x00001030 Zero RW 1758 .bss CVWL368.lib(dcs_packet_fifo.o) + 0x00072888 - 0x00000020 Zero RW 2343 .bss CVWL368.lib(hal_spi_slave.o) + 0x000728a8 - 0x00001000 Zero RW 517 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 4442 780 9268 48 0 35915 ap_demo.o + 1592 62 8159 289 0 13956 app_tp_for_custom_s8.o + 1112 116 0 46 400 12706 app_tp_transfer.o + 36 6 0 0 0 477 board.o + 10 0 0 0 0 9575 main.o + 120 18 192 0 4096 2060 startup_armcm0.o + + ---------------------------------------------------------------------- + 7316 982 17667 384 4496 74689 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 4 0 0 1 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 296 96 0 12 0 256 drv_chip_info.o + 192 82 20 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 410 28 0 0 28 796 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1652 500 0 0 0 1332 drv_dsi_rx.o + 1476 118 0 0 0 2428 drv_dsi_tx.o + 118 0 0 0 0 256 drv_efuse.o + 10 0 0 0 0 60 drv_fls.o + 784 112 0 4 64 1236 drv_gpio.o + 588 88 0 8 320 624 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 324 74 0 8 0 516 drv_i2c_slave.o + 668 6 0 0 0 1444 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 112 36 8 1188 0 376 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 140 32 0 12 0 316 drv_pwm.o + 112 24 0 0 0 180 drv_pwr.o + 682 66 0 8 0 1448 drv_rxbr.o + 104 24 0 4 0 188 drv_spi_master.o + 160 20 0 8 0 260 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 354 34 0 80 0 932 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 156 22 0 12 0 316 drv_wdg.o + 2992 304 72 8 192 1600 hal_dsi_rx_ctrl.o + 4312 278 0 1 72 2384 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 544 76 0 28 0 400 hal_i2c_slave.o + 6676 1502 308 4 2392 2264 hal_internal_vsync.o + 116 4 0 0 0 148 hal_pwm.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 40 0 0 0 0 136 hal_swire.o + 196 32 0 0 0 408 hal_system.o + 184 6 0 0 0 276 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 35136 4656 1013 1452 7900 34676 Library Totals + 48 0 5 10 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 29708 4450 1008 1434 7900 31400 CVWL368.lib + 272 26 0 0 0 152 m_ps.l + 2838 126 0 8 0 1264 mc_p.l + 2270 54 0 0 0 1860 mf_p.l + + ---------------------------------------------------------------------- + 35136 4656 1013 1452 7900 34676 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 42452 5638 18680 1836 12396 85321 Grand Totals + 42452 5638 18680 992 12396 85321 ELF Image Totals (compressed) + 42452 5638 18680 992 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 61132 ( 59.70kB) + Total RW Size (RW Data + ZI Data) 14232 ( 13.90kB) + Total ROM Size (Code + RO Data + RW Data) 62124 ( 60.67kB) + +============================================================================== + diff --git a/project/ISP_368/Listings/WL368_NOTE20_CSOT667.map b/project/ISP_368/Listings/WL368_NOTE20_CSOT667.map new file mode 100644 index 0000000..7f14568 --- /dev/null +++ b/project/ISP_368/Listings/WL368_NOTE20_CSOT667.map @@ -0,0 +1,5283 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_phone_clear_reset_on) for app_tp_phone_clear_reset_on + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + ap_demo.o(i.ap_demo) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_in + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.set_tear_on) for i.set_tear_on + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_ca) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_get_reg_ca) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight_51) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.ap_set_backlight_51) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_backlight_51) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_off) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_tp_calibration_04) refers to ap_demo.o(.data) for .data + ap_demo.o(i.app_tp_calibration_exec) refers to app_tp_transfer.o(i.ap_tp_calibration) for ap_tp_calibration + ap_demo.o(i.app_tp_calibration_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.app_tp_calibration_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.init_panel) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.init_panel) refers to ap_demo.o(i.set_tear_on) for i.set_tear_on + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) for hal_dsi_rx_ctrl_toggle_resolution + ap_demo.o(i.pps_update_handle) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.set_tear_on) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + ap_demo.o(i.set_tear_on) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) for hal_dsi_rx_ctrl_set_tear_mode_ex + ap_demo.o(i.set_tear_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.set_tear_on) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.set_tear_on) for set_tear_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_ca) for ap_get_reg_ca + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight_51) for ap_set_backlight_51 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_tp_calibration_04) for ap_set_tp_calibration_04 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.ap_tp_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.ap_tp_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for .data + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) for hal_internal_vsync_toggle_input_frame_rate + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) for hal_internal_sync_input_resolution_change_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_dsi_tx_ctrl.o(.conststring) for .conststring + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) for hal_internal_vsync_update_lcdc_addr + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te) refers to hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) for hal_internal_sync_cmd_mode_rcv_te + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) for hal_dsi_tx_ctrl_set_rect_pixel_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) for hal_dsi_tx_ctrl_draw_flicker + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) for hal_dsi_tx_ctrl_draw_chessboard + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_update_dpi_param) for hal_internal_update_dpi_param + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_config_intr) for drv_i2c_s_config_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c0_set_callback) for drv_i2c0_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_sel) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_flash_power_down) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_power_down) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_system.o(i.hal_system_flash_read) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_dual_read) for norflash_dual_read + hal_system.o(i.hal_system_flash_release_power_down) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_release_power_down) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_erase_block) for norflash_erase_block + hal_system.o(i.hal_system_flash_write) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_write) for norflash_write + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + app_tp_for_custom_s8.o(i.EncryptCheckEx) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(i.EncryptCheckEx) for EncryptCheckEx + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c1_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c0_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_slave_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_update_dpi_param) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ceil.o(i.ceil) for ceil + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) for hal_internal_video_mode_auto_sync + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(i.translate_data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.app_tp_m_transfer_complate), (8 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (5 bytes). + Removing app_tp_transfer.o(.data), (6 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (1 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en), (16 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode), (100 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter), (108 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data), (268 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex), (32 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (148 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te), (10 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard), (280 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker), (172 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init), (30 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd), (140 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data), (272 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (80 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (32 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (40 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_sel), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (32 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (108 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_flash_power_down), (20 bytes). + Removing hal_system.o(i.hal_system_flash_read), (52 bytes). + Removing hal_system.o(i.hal_system_flash_release_power_down), (20 bytes). + Removing hal_system.o(i.hal_system_flash_write), (60 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (156 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (37 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (288 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (620 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (11 bytes). + Removing app_tp_for_custom_s8.o(.data), (10 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (412 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_clocks), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (24 bytes). + Removing drv_dma.o(i.drv_dma_enable_cycle), (44 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_clear_irq_status), (6 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (130 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (30 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (16 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_scld_filter), (100 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_set_frame_buff_pd), (28 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (108 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (60 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (220 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (88 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (72 bytes). + Removing drv_spi_dma.o(.bss), (480 bytes). + Removing drv_spi_dma.o(.data), (16 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (168 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex), (468 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate), (560 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr), (48 bytes). + Removing hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler), (476 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (6 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_set_prefetch), (24 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (56 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (20 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (64 bytes). + Removing drv_pwm.o(i.drv_pwm_out_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_control), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_threshold), (12 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing dflti.o(.text), (40 bytes). + +583 unused section(s) (total 27144 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../fplib/microlib/fpsqrt.c 0x00000000 Number 0 dsqrt.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt_x.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\internal\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\..\src\app\demo\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\..\src\app\demo\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\..\src\app\demo\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\internal\\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\\..\\src\\app\\demo\\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdcmple.s 0x00000000 Number 0 cdcmple.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 fadd.o(.text) + .text 0x0001029a Section 0 fmul.o(.text) + .text 0x00010314 Section 0 fdiv.o(.text) + .text 0x00010390 Section 0 fscalb.o(.text) + .text 0x000103a8 Section 0 dadd.o(.text) + .text 0x0001050c Section 0 dmul.o(.text) + .text 0x000105dc Section 0 ddiv.o(.text) + .text 0x000106cc Section 0 fflti.o(.text) + .text 0x000106e2 Section 0 ffltui.o(.text) + .text 0x000106f0 Section 0 dfltui.o(.text) + .text 0x0001070c Section 0 ffixi.o(.text) + .text 0x0001073e Section 0 ffixui.o(.text) + .text 0x00010768 Section 0 dfixi.o(.text) + .text 0x000107b0 Section 0 dfixui.o(.text) + .text 0x000107ec Section 0 f2d.o(.text) + .text 0x00010814 Section 40 cdcmple.o(.text) + .text 0x0001083c Section 20 cfrcmple.o(.text) + .text 0x00010850 Section 0 uldiv.o(.text) + .text 0x000108b0 Section 0 llshl.o(.text) + .text 0x000108d0 Section 0 llushr.o(.text) + .text 0x000108f2 Section 0 llsshr.o(.text) + .text 0x00010918 Section 0 fepilogue.o(.text) + .text 0x00010918 Section 0 iusefp.o(.text) + .text 0x0001099a Section 0 depilogue.o(.text) + .text 0x00010a58 Section 0 dsqrt.o(.text) + .text 0x00010afc Section 0 dfixul.o(.text) + .text 0x00010b3c Section 40 cdrcmple.o(.text) + .text 0x00010b64 Section 36 init.o(.text) + .text 0x00010b88 Section 0 __dczerorl2.o(.text) + i.ADC_IRQn_Handler 0x00010be0 Section 0 irq_redirect .o(i.ADC_IRQn_Handler) + i.AP_NRESET_IRQn_Handler 0x00010bf8 Section 0 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + i.DMA_IRQn_Handler 0x00010c10 Section 0 irq_redirect .o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010c24 Section 0 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010c40 Section 0 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010c5c Section 0 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010c78 Section 0 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010c94 Section 0 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010cb0 Section 0 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010ccc Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010ce8 Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.EncryptCheckEx 0x00010d04 Section 0 app_tp_for_custom_s8.o(i.EncryptCheckEx) + i.FLSCTRL_IRQn_Handler 0x00010d28 Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.Gpio_swire_output 0x00010d3c Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00010d8c Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010da0 Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010db8 Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010dd0 Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010de8 Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010e10 Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010e28 Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010e40 Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010e58 Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.S20_Start_init 0x00010e74 Section 0 app_tp_transfer.o(i.S20_Start_init) + i.SPIM_IRQn_Handler 0x00010fa8 Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.SPIS_IRQn_Handler 0x00010fc4 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.SWIRE_IRQn_Handler 0x00010fe0 Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.UART_DisableDma 0x00010ffc Section 0 drv_uart.o(i.UART_DisableDma) + i.__scatterload_null 0x00010ffe Section 2 handlers.o(i.__scatterload_null) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.UART_GetInstance 0x00011014 Section 0 drv_uart.o(i.UART_GetInstance) + .ARM.__at_0x11018 0x00011018 Section 4 drv_common.o(.ARM.__at_0x11018) + i.SysTick_Handler 0x0001101c Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00011034 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x0001104c Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00011064 Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x0001107c Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART0_IRQ_Handle 0x00011094 Section 0 drv_uart.o(i.UART0_IRQ_Handle) + i.UART_IRQn_Handler 0x000110b0 Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_ResetRxFIFO 0x000110c8 Section 0 drv_uart.o(i.UART_ResetRxFIFO) + i.UART_SetBaudRate 0x000110ec Section 0 drv_uart.o(i.UART_SetBaudRate) + i.UART_SwitchSCLK 0x00011134 Section 0 drv_uart.o(i.UART_SwitchSCLK) + i.UART_TransferHandleIRQ 0x0001114e Section 0 drv_uart.o(i.UART_TransferHandleIRQ) + i.UART_WriteBlocking 0x00011282 Section 0 drv_uart.o(i.UART_WriteBlocking) + i.UART_init 0x0001129c Section 0 drv_uart.o(i.UART_init) + i.VIDC_IRQn_Handler 0x00011358 Section 0 irq_redirect .o(i.VIDC_IRQn_Handler) + i.VPRE_IRQn_Handler 0x00011370 Section 0 irq_redirect .o(i.VPRE_IRQn_Handler) + i.WDG_IRQn_Handler 0x00011388 Section 0 irq_redirect .o(i.WDG_IRQn_Handler) + i.__0printf 0x000113a0 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x000113c0 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x000113e4 Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x00011412 Section 0 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + i.__NVIC_ClearPendingIRQ 0x0001142c Section 0 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x0001142d Thumb Code 18 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x00011444 Section 0 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011445 Thumb Code 18 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_DisableIRQ 0x0001145c Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x0001145d Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x0001147c Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x0001147d Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__NVIC_SetPriority 0x00011494 Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x00011495 Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_copy 0x000114d8 Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_zeroinit 0x000114e6 Section 14 handlers.o(i.__scatterload_zeroinit) + i.__set_errno 0x000114f4 Section 0 errno.o(i.__set_errno) + i._fp_digits 0x00011500 Section 0 printfa.o(i._fp_digits) + _fp_digits 0x00011501 Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x00011674 Section 0 printfa.o(i._printf_core) + _printf_core 0x00011675 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011d60 Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011d61 Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011d80 Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011d81 Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011dac Section 0 printfa.o(i._sputc) + _sputc 0x00011dad Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011db8 Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011db9 Thumb Code 1188 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x0001225c Section 0 ap_demo.o(i.ap_demo) + i.ap_get_reg_ca 0x00012474 Section 0 ap_demo.o(i.ap_get_reg_ca) + ap_get_reg_ca 0x00012475 Thumb Code 54 ap_demo.o(i.ap_get_reg_ca) + i.ap_get_reg_df 0x000124dc Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x000124dd Thumb Code 134 ap_demo.o(i.ap_get_reg_df) + i.ap_reset_cb 0x00012568 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x00012569 Thumb Code 40 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight_51 0x000125dc Section 0 ap_demo.o(i.ap_set_backlight_51) + ap_set_backlight_51 0x000125dd Thumb Code 92 ap_demo.o(i.ap_set_backlight_51) + i.ap_set_display_off 0x0001263c Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x0001263d Thumb Code 36 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x00012688 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x00012689 Thumb Code 18 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x000126bc Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x000126bd Thumb Code 86 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x00012744 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x00012745 Thumb Code 22 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x00012788 Section 0 ap_demo.o(i.ap_set_tp_calibration_04) + ap_set_tp_calibration_04 0x00012789 Thumb Code 22 ap_demo.o(i.ap_set_tp_calibration_04) + i.ap_tp_calibration 0x000127a4 Section 0 app_tp_transfer.o(i.ap_tp_calibration) + i.app_ADC_IRQn_Handler 0x00012854 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x00012870 Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x00012894 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x000128b0 Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x000128cc Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x000128e8 Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x00012904 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x00012920 Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x0001293c Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x00012958 Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x00012974 Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x000129bc Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x000129d4 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x000129e4 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00012b88 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00012c10 Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00012ea8 Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00012f48 Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00012f90 Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x00012fc0 Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x000131c0 Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x000131e0 Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x000131f8 Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x00013202 Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x0001320c Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x00013216 Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x00013220 Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x00013228 Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x00013244 Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x00013260 Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x00013298 Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x000132a8 Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x000132d8 Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x000132fc Section 0 ap_demo.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x0001335c Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x0001335d Thumb Code 42 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x0001338c Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x000133e0 Section 0 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_read 0x000133e1 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_write 0x00013400 Section 0 app_tp_transfer.o(i.app_tp_m_write) + app_tp_m_write 0x00013401 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x00013408 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_phone_clear_reset_on 0x000137a8 Section 0 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + i.app_tp_s_read 0x000137b4 Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x000137bc Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x000137c4 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x00013b94 Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x00013bc4 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00013bc5 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_transfer_screen_const 0x00013bd0 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00013bd1 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00013c10 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x00013d04 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.board_Init 0x00013d18 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x00013d3c Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x0001422c Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x000142f4 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x000142f5 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x00014320 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x00014321 Thumb Code 90 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x000143b4 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x0001440c Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x00014424 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00014468 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x0001448c Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x0001448d Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x000144a8 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x000144c0 Section 0 tau_delay.o(i.delayUs) + i.drv_ap_rst_trig_edge_detect 0x000144e4 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x0001451c Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x00014528 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x00014568 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x00014618 Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x0001462c Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x00014684 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x0001468c Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x0001469c Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x000146b0 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x000146c4 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x000146e4 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x000146f8 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x00014710 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x00014724 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x00014738 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x0001474c Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x00014760 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x00014774 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x00014788 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x0001479c Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x000147b0 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x000147c4 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x000147dc Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x000147f4 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x00014808 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x0001481c Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x00014830 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x00014848 Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x00014864 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x00014874 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00014884 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x000148a8 Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x000148b4 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x00014944 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x00014956 Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x00014970 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x00014978 Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x000149bc Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x000149f2 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00014a00 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00014a74 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00014a7e Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00014aa8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00014bac Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00014bec Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00014bed Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00014c3c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00014c3d Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00014c58 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00014c60 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00014c66 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00014c74 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00014c94 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00014ca4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00014ca8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00014cb8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00014cfe Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00014d24 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00014e28 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00014e36 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00014e4a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00014eb6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x00014eba Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00014ed2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00014eda Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00014ee2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00014eec Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00014f10 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x00014f14 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00014f18 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00014f1c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x00014f34 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x00014f4e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00014f5a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x00014fbe Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x00014ffc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00015130 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x0001514e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00015156 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x00015172 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x0001518a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x00015198 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x000151d8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x000151e8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x000151f0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00015212 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x0001521a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00015240 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x000152ea Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x00015300 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x00015318 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x00015346 Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x00015352 Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x00015384 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x0001539c Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x000153b4 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x000153c0 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x000153d4 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x00015424 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x00015444 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x00015454 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x00015464 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x00015474 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00015484 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00015485 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x000154a4 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c0_set_callback 0x000155d4 Section 0 drv_i2c_slave.o(i.drv_i2c0_set_callback) + i.drv_i2c1_set_callback 0x000155e0 Section 0 drv_i2c_master.o(i.drv_i2c1_set_callback) + i.drv_i2c_dma_callback 0x000155ec Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x000155ed Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x00015620 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x000156cc Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x000156e6 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x00015700 Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x00015760 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x00015770 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_master_init 0x000157a8 Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x00015834 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x00015890 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x000158cc Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x000158cd Thumb Code 62 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x0001590a Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_config_intr 0x0001594c Section 0 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + i.drv_i2c_s_enable 0x00015950 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable) + i.drv_i2c_s_get_fifo_status 0x00015958 Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_intr 0x0001596c Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + i.drv_i2c_s_write_data 0x000159bc Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x000159d8 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x00015a30 Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x00015a64 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x00015a7c Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x00015a94 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x00015ac4 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x00015ada Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00015afe Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x00015b24 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x00015b3a Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x00015b50 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x00015b5c Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00015b7a Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00015b9c Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00015bbe Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x00015bca Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00015be4 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x00015c06 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00015c20 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x00015c2c Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00015c78 Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00015c7e Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00015c90 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00015cb0 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_video_hw_mode 0x00015cf0 Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00015d04 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x00015d24 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00015d30 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00015d70 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00015d7c Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x00015d8e Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00015d9e Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00015dac Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x00015dc0 Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00015dcc Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x00015ddc Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x00015dee Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x00015dfe Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x00015e14 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00015e2c Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x00015e46 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00015e54 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00015e7c Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x00015e8c Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x00015e94 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x00015ea8 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x00015ebc Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x00015ec4 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_p2r_filter_init 0x00015ed8 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x00015efc Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x00015f0c Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x00015f48 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x00015fa8 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x00015ffc Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x0001600c Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x00016024 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x00016044 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x0001606a Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x00016088 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x00016089 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x000160a8 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x000160c8 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x000160e0 Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x00016118 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x00016119 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x00016124 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x00016125 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x00016134 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x00016135 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x00016148 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x00016149 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x0001615e Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00016168 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x0001616c Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x000161c8 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x000161dc Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x00016240 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x00016244 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00016245 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x00016256 Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x0001625a Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x0001625b Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x0001626c Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00016278 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x00016280 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x0001628c Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x00016298 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x000162ac Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x00016378 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x0001638c Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x000163a0 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x000163b0 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x000163d6 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x000163de Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x000163e8 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_enable 0x00016408 Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_set_int 0x00016424 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x00016478 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x00016494 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x000164a0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x000164c8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x000164e0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x000164fc Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x00016520 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x00016544 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x00016554 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x00016564 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x00016588 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x00016589 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x000165a2 Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x000165c4 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x000165d4 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x000165e4 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x000165e5 Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x00016628 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x0001663c Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x0001664c Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x000166a0 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x000166c8 Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_clear 0x000166d8 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x000166d9 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x000166e2 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x000166fe Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x0001671a Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x0001671b Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x0001672c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x0001672d Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x00016740 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x00016741 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00016750 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00016758 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00016770 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x000167b0 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x000167c4 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x000167ec Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x000167f8 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x000167fe Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x0001683a Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x0001684e Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x0001685e Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x00016866 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x0001688c Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x000168b4 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x000168cc Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x000168d6 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x000168e6 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x000168f0 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x000168fa Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x0001690c Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00016916 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00016920 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x00016938 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00016948 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00016949 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00016958 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00016959 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00016968 Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x000169a8 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x000169b2 Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x000169c8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x000169fc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00016a98 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016b1c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00016b44 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00016b6c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00016bcc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00016bcd Thumb Code 332 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00016d70 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00016d71 Thumb Code 184 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00016e48 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00016e49 Thumb Code 334 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x00016fa0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x00016fa1 Thumb Code 312 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x000170e8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x000170e9 Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00017314 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x00017404 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00017438 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00017439 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x00017470 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x00017471 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x000174e4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_set_tear_mode_ex 0x00017518 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + i.hal_dsi_rx_ctrl_start 0x00017528 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x00017564 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution 0x000175a0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + i.hal_dsi_tx_calc_video_chunks 0x000175c0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x000175c1 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x00017750 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x00017751 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x00017784 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x00017785 Thumb Code 1022 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x00017bd4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00017c00 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00017c84 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017cd0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x00017cf8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00017d9c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00017d9d Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x00017dc0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_set_ccm 0x00017dcc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00017dec Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x00017e00 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x00017e10 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x00017e34 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00017ed0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00017f14 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00017fec Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x0001809c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x0001809d Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x000180e0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x000180e1 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x00018110 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x00018111 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x00018130 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00018131 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x00018150 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x00018151 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x000181e4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x000181e5 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x0001823c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x0001823d Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x00018280 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x00018298 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x000182ac Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x000182ec Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x0001830c Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00018334 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x0001834c Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x0001839c Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x000183fc Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x00018404 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x00018424 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x00018490 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x000184b0 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x000184cc Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x000184d8 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x000184d9 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x000184f8 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x000184f9 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x00018508 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x00018554 Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x0001861c Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x00018630 Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x0001863c Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x0001863d Thumb Code 354 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x000187b0 Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x000188ac Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_get_hight_performan_mode 0x000188bc Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change 0x000188cc Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + i.hal_internal_update_dpi_param 0x00018af8 Section 0 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + i.hal_internal_video_mode_auto_sync 0x00018b08 Section 0 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + i.hal_internal_vsync_deinit 0x00018c14 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00018c3c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00018c48 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tear_mode 0x00018c60 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + i.hal_internal_vsync_get_tx_state 0x00018c6c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00018c78 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00018d90 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x00018e40 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x00018f5c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x00018f70 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x00018f94 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00018fe4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x00019064 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x00019065 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x00019088 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x00019089 Thumb Code 84 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x000190e0 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x000190e1 Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x000190f4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x000190f5 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x00019258 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00019259 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x00019298 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x00019299 Thumb Code 422 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x00019448 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x00019449 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_m_clear_rxfifo 0x00019488 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_deinit 0x00019496 Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_open 0x000194a8 Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x000194be Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x000194c8 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x00019550 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x0001956c Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x00019574 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x0001957c Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_deinit 0x00019584 Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x000195b2 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x000195cc Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x00019614 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x0001963c Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x000196c8 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.handle_init 0x000196d8 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x000197e8 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x000197e9 Thumb Code 104 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x00019858 Section 0 ap_demo.o(i.init_panel) + init_panel 0x00019859 Thumb Code 146 ap_demo.o(i.init_panel) + i.main 0x00019914 Section 0 main.o(i.main) + i.open_mipi_rx 0x00019920 Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x00019921 Thumb Code 112 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x000199a8 Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x000199a9 Thumb Code 64 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x00019a10 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x00019a11 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x00019e04 Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x00019e05 Thumb Code 358 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x00019f7c Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x00019f7d Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001a008 Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001a009 Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x0001a188 Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001a189 Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001a22c Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001a22d Thumb Code 316 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.set_tear_on 0x0001a400 Section 0 ap_demo.o(i.set_tear_on) + set_tear_on 0x0001a401 Thumb Code 68 ap_demo.o(i.set_tear_on) + i.soft_gen_te 0x0001a490 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001a491 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x0001a554 Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x0001a555 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_timer3_cb 0x0001a614 Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001a615 Thumb Code 58 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001a660 Section 0 sqrt.o(i.sqrt) + i.vidc_callback 0x0001a6a8 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001a6a9 Thumb Code 232 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001a7b0 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001a7b1 Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001a880 Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001a881 Thumb Code 300 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001aa4c Section 10087 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001aa4c Data 120 ap_demo.o(.constdata) + .constdata 0x0001d1b4 Section 36 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001d1d8 Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001d1d8 Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001d250 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001d2ac Section 32 hal_i2c_slave.o(.constdata) + sg_i2c_s_config 0x0001d2ac Data 32 hal_i2c_slave.o(.constdata) + .constdata 0x0001d2cc Section 8174 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001f2ba Section 1 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001f2bc Section 8 drv_param_init.o(.constdata) + .constdata 0x0001f2c4 Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001f2c4 Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001f37c Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001f3fc Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001f42c Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001f44c Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001f494 Section 67 hal_dsi_tx_ctrl.o(.conststring) + .conststring 0x0001f4d8 Section 308 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 40 ap_demo.o(.data) + g_calibration_flag 0x000701d0 Data 1 ap_demo.o(.data) + start_display_on 0x000701d1 Data 1 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701d2 Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701d3 Data 1 ap_demo.o(.data) + g_power_on_flag 0x000701d4 Data 1 ap_demo.o(.data) + g_en_adj_bl 0x000701d5 Data 1 ap_demo.o(.data) + panel_display_done 0x000701d6 Data 1 ap_demo.o(.data) + g_panel_display_cnt 0x000701d7 Data 1 ap_demo.o(.data) + flag_b1 0x000701da Data 1 ap_demo.o(.data) + flag_ca 0x000701db Data 1 ap_demo.o(.data) + flag_te 0x000701dc Data 1 ap_demo.o(.data) + cmd_0a_flag 0x000701de Data 1 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701ec Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701f0 Data 4 ap_demo.o(.data) + value_reg_df 0x000701f4 Data 4 ap_demo.o(.data) + .data 0x000701f8 Section 46 app_tp_transfer.o(.data) + s_spim_write 0x000701f8 Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x000701f9 Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x000701fa Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x000701fb Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x000701fd Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x000701fe Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x000701ff Data 1 app_tp_transfer.o(.data) + .data 0x00070228 Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00070228 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x0007022c Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00070230 Section 3 hal_dsi_tx_ctrl.o(.data) + g_tx_vcom_en 0x00070230 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_vpg_en 0x00070231 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x00070232 Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x00070233 Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x00070233 Data 1 hal_i2c_master.o(.data) + .data 0x00070234 Section 32 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00070234 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00070235 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x00070236 Data 1 hal_i2c_slave.o(.data) + sg_i2c_s_index 0x00070237 Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x00070238 Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x0007023c Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x00070240 Data 4 hal_i2c_slave.o(.data) + sg_tx_byte_num 0x00070244 Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x00070248 Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x0007024c Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00070250 Data 4 hal_i2c_slave.o(.data) + .data 0x00070254 Section 268 app_tp_for_custom_s8.o(.data) + fingerprint_enable 0x0007025f Data 1 app_tp_for_custom_s8.o(.data) + app_tp_count 0x00070260 Data 1 app_tp_for_custom_s8.o(.data) + phone_85_flag 0x00070261 Data 1 app_tp_for_custom_s8.o(.data) + phone_F6_flag 0x00070262 Data 1 app_tp_for_custom_s8.o(.data) + phone_E4_flag 0x00070263 Data 1 app_tp_for_custom_s8.o(.data) + phone_72_flag 0x00070264 Data 1 app_tp_for_custom_s8.o(.data) + phone_75_flag 0x00070265 Data 1 app_tp_for_custom_s8.o(.data) + phone_92_flag 0x00070266 Data 1 app_tp_for_custom_s8.o(.data) + phone_74_flag 0x00070267 Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x0007026c Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x0007026e Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x00070270 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x00070272 Data 2 app_tp_for_custom_s8.o(.data) + enctryptCnt 0x00070274 Data 4 app_tp_for_custom_s8.o(.data) + .data 0x00070360 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00070361 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00070362 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00070363 Section 3 app_tp_for_custom_s8.o(.data) + .data 0x00070366 Section 5 app_tp_for_custom_s8.o(.data) + .data 0x0007036c Section 48 app_tp_for_custom_s8.o(.data) + .data 0x0007039c Section 18 norflash.o(.data) + tmprg 0x000703a4 Data 4 norflash.o(.data) + .data 0x000703b0 Section 12 drv_common.o(.data) + s_my_tick 0x000703b0 Data 4 drv_common.o(.data) + .data 0x000703bc Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x000703bc Data 4 drv_gpio.o(.data) + .data 0x000703c0 Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x000703c0 Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x000703c4 Data 4 drv_i2c_dma.o(.data) + .data 0x000703c8 Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x000703c8 Data 4 drv_i2c_master.o(.data) + .data 0x000703cc Section 4 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x000703cc Data 4 drv_i2c_slave.o(.data) + .data 0x000703d0 Section 1188 drv_param_init.o(.data) + .data 0x00070874 Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x00070874 Data 4 drv_spi_master.o(.data) + .data 0x00070878 Section 8 drv_swire.o(.data) + s_swire_cb 0x00070878 Data 8 drv_swire.o(.data) + .data 0x00070880 Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x00070880 Data 1 drv_sys_cfg.o(.data) + .data 0x00070884 Section 80 drv_timer.o(.data) + sg_timer_info 0x00070884 Data 80 drv_timer.o(.data) + .data 0x000708d4 Section 12 hal_internal_vsync.o(.data) + sg_cmd_mode_tx_start 0x000708d4 Data 1 hal_internal_vsync.o(.data) + sg_cur_te_info 0x000708d8 Data 4 hal_internal_vsync.o(.data) + .data 0x000708e0 Section 8 drv_rxbr.o(.data) + .data 0x000708e8 Section 4 drv_vidc.o(.data) + .data 0x000708ec Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x000708ec Data 1 drv_phy_common.o(.data) + .data 0x000708f0 Section 12 drv_chip_info.o(.data) + sg_chip_info 0x000708f0 Data 4 drv_chip_info.o(.data) + sg_chip_function 0x000708f4 Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x000708f8 Data 4 drv_chip_info.o(.data) + .data 0x000708fc Section 12 drv_pwm.o(.data) + s_pwm_type 0x000708fc Data 1 drv_pwm.o(.data) + s_pwm_cb 0x00070900 Data 8 drv_pwm.o(.data) + .data 0x00070908 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x00070908 Data 4 drv_uart.o(.data) + uart_userData 0x0007090c Data 4 drv_uart.o(.data) + .data 0x00070910 Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x00070910 Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x00070914 Data 8 drv_wdg.o(.data) + .data 0x0007091c Section 4 stdout.o(.data) + .data 0x00070920 Section 4 errno.o(.data) + _errno 0x00070920 Data 4 errno.o(.data) + .bss 0x00070924 Section 400 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x00070924 Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x000709ec Data 200 app_tp_transfer.o(.bss) + .bss 0x00070ab4 Section 196 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x00070ab4 Data 196 hal_dsi_rx_ctrl.o(.bss) + .bss 0x00070b78 Section 76 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x00070b78 Data 76 hal_dsi_tx_ctrl.o(.bss) + .bss 0x00070bc4 Section 256 tau_log.o(.bss) + .bss 0x00070cc4 Section 208 hal_uart.o(.bss) + .bss 0x00070d94 Section 28 drv_dma.o(.bss) + s_dma_handle 0x00070d94 Data 28 drv_dma.o(.bss) + .bss 0x00070db0 Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00070db0 Data 64 drv_gpio.o(.bss) + .bss 0x00070df0 Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x00070df0 Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x00070e90 Data 160 drv_i2c_dma.o(.bss) + .bss 0x00070f30 Section 2436 hal_internal_vsync.o(.bss) + g_imm_buffer 0x00071794 Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x00071894 Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x000718a0 Data 20 hal_internal_vsync.o(.bss) + .bss 0x000718b4 Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x000728e4 Section 32 hal_spi_slave.o(.bss) + STACK 0x00072908 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfrcmple 0x0001083d Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010851 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108b1 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108b1 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108d1 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108d1 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000108f3 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000108f3 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010919 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010919 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010929 Thumb Code 114 fepilogue.o(.text) + _double_round 0x0001099b Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109b5 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a59 Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010afd Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b3d Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b65 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b65 Thumb Code 0 init.o(.text) + __decompress 0x00010b89 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010b89 Thumb Code 86 __dczerorl2.o(.text) + ADC_IRQn_Handler 0x00010be1 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010bf9 Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010c11 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c25 Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c41 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010c5d Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010c79 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010c95 Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010cb1 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010ccd Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010ce9 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + EncryptCheckEx 0x00010d05 Thumb Code 32 app_tp_for_custom_s8.o(i.EncryptCheckEx) + FLSCTRL_IRQn_Handler 0x00010d29 Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010d3d Thumb Code 78 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010d8d Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010da1 Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010db9 Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010dd1 Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010de9 Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010e11 Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010e29 Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010e41 Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010e59 Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + S20_Start_init 0x00010e75 Thumb Code 282 app_tp_transfer.o(i.S20_Start_init) + SPIM_IRQn_Handler 0x00010fa9 Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + SPIS_IRQn_Handler 0x00010fc5 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + SWIRE_IRQn_Handler 0x00010fe1 Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + UART_DisableDma 0x00010ffd Thumb Code 2 drv_uart.o(i.UART_DisableDma) + __scatterload_null 0x00010fff Thumb Code 2 handlers.o(i.__scatterload_null) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + UART_GetInstance 0x00011015 Thumb Code 4 drv_uart.o(i.UART_GetInstance) + s_debug_state 0x00011018 Data 4 drv_common.o(.ARM.__at_0x11018) + SysTick_Handler 0x0001101d Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00011035 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x0001104d Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00011065 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x0001107d Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x00011095 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + UART_IRQn_Handler 0x000110b1 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x000110c9 Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SetBaudRate 0x000110ed Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x00011135 Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x0001114f Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x00011283 Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x0001129d Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x00011359 Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x00011371 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x00011389 Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x000113a1 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x000113a1 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x000113a1 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x000113a1 Thumb Code 0 printfa.o(i.__0printf) + printf 0x000113a1 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x000113c1 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x000113c1 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x000113c1 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x000113c1 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x000113c1 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x000113e5 Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x00011413 Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_copy 0x000114d9 Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x000114e7 Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x000114f5 Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x0001225d Thumb Code 340 ap_demo.o(i.ap_demo) + ap_tp_calibration 0x000127a5 Thumb Code 170 app_tp_transfer.o(i.ap_tp_calibration) + app_ADC_IRQn_Handler 0x00012855 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x00012871 Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x00012895 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x000128b1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x000128cd Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x000128e9 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x00012905 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x00012921 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x0001293d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00012959 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x00012975 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x000129bd Thumb Code 14 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x000129d5 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x000129e5 Thumb Code 208 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00012b89 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00012c11 Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00012ea9 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00012f49 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00012f91 Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x00012fc1 Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x000131c1 Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x000131e1 Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x000131f9 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x00013203 Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x0001320d Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x00013217 Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x00013221 Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x00013229 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x00013245 Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x00013261 Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x00013299 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x000132a9 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x000132d9 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x000132fd Thumb Code 36 ap_demo.o(i.app_tp_calibration_exec) + app_tp_init 0x0001338d Thumb Code 66 app_tp_transfer.o(i.app_tp_init) + app_tp_phone_analysis_data 0x00013409 Thumb Code 876 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_phone_clear_reset_on 0x000137a9 Thumb Code 8 app_tp_transfer.o(i.app_tp_phone_clear_reset_on) + app_tp_s_read 0x000137b5 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x000137bd Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x000137c5 Thumb Code 960 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x00013b95 Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x00013c11 Thumb Code 228 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x00013d05 Thumb Code 14 app_tp_transfer.o(i.app_tp_transfer_screen_start) + board_Init 0x00013d19 Thumb Code 30 board.o(i.board_Init) + calc_framebuffer_setting 0x00013d3d Thumb Code 1258 hal_internal_vsync.o(i.calc_framebuffer_setting) + ceil 0x0001422d Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x000143b5 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x0001440d Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x00014425 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00014469 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x000144a9 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x000144c1 Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x000144e5 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x0001451d Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x00014529 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x00014569 Thumb Code 98 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x00014619 Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x0001462d Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x00014685 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x0001468d Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x0001469d Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x000146b1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x000146c5 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x000146e5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x000146f9 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x00014711 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x00014725 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x00014739 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x0001474d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x00014761 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x00014775 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x00014789 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x0001479d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x000147b1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x000147c5 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x000147dd Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x000147f5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x00014809 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x0001481d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x00014831 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x00014849 Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x00014865 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x00014875 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00014885 Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x000148a9 Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x000148b5 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x00014945 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x00014957 Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x00014971 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x00014979 Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x000149bd Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x000149f3 Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00014a01 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00014a75 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00014a7f Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x00014aa9 Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00014bad Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00014c59 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00014c61 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00014c67 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00014c75 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00014c95 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00014ca5 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00014ca9 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00014cb9 Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00014cff Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00014d25 Thumb Code 256 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00014e29 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00014e37 Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00014e4b Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00014eb7 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x00014ebb Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00014ed3 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00014edb Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00014ee3 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00014eed Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00014f11 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x00014f15 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00014f19 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x00014f1d Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x00014f35 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x00014f4f Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00014f5b Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x00014fbf Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x00014ffd Thumb Code 308 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00015131 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x0001514f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00015157 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x00015173 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x0001518b Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x00015199 Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x000151d9 Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x000151e9 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x000151f1 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00015213 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x0001521b Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00015241 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x000152eb Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x00015301 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x00015319 Thumb Code 46 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x00015347 Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x00015353 Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x00015385 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x0001539d Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x000153b5 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x000153c1 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x000153d5 Thumb Code 74 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x00015425 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x00015445 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x00015455 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x00015465 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x00015475 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x000154a5 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c0_set_callback 0x000155d5 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c0_set_callback) + drv_i2c1_set_callback 0x000155e1 Thumb Code 6 drv_i2c_master.o(i.drv_i2c1_set_callback) + drv_i2c_dma_init 0x00015621 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x000156cd Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x000156e7 Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x00015701 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x00015761 Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x00015771 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_master_init 0x000157a9 Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x00015835 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x00015891 Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x0001590b Thumb Code 66 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_config_intr 0x0001594d Thumb Code 4 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + drv_i2c_s_enable 0x00015951 Thumb Code 8 drv_i2c_slave.o(i.drv_i2c_s_enable) + drv_i2c_s_get_fifo_status 0x00015959 Thumb Code 20 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_intr 0x0001596d Thumb Code 74 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + drv_i2c_s_write_data 0x000159bd Thumb Code 28 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x000159d9 Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x00015a31 Thumb Code 50 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x00015a65 Thumb Code 20 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x00015a7d Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x00015a95 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x00015ac5 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x00015adb Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00015aff Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x00015b25 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x00015b3b Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x00015b51 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x00015b5d Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00015b7b Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00015b9d Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00015bbf Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x00015bcb Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00015be5 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x00015c07 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00015c21 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x00015c2d Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00015c79 Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00015c7f Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00015c91 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00015cb1 Thumb Code 58 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_video_hw_mode 0x00015cf1 Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00015d05 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x00015d25 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00015d31 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00015d71 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00015d7d Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x00015d8f Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00015d9f Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00015dad Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x00015dc1 Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00015dcd Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x00015ddd Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x00015def Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x00015dff Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x00015e15 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00015e2d Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x00015e47 Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00015e55 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00015e7d Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x00015e8d Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x00015e95 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x00015ea9 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x00015ebd Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x00015ec5 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_p2r_filter_init 0x00015ed9 Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x00015efd Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x00015f0d Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x00015f49 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x00015fa9 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x00015ffd Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x0001600d Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x00016025 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x00016045 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x0001606b Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x000160a9 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x000160c9 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x000160e1 Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x0001615f Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00016169 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x0001616d Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x000161c9 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x000161dd Thumb Code 66 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x00016241 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x00016257 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x0001626d Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x00016279 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x00016281 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x0001628d Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x00016299 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x000162ad Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x00016379 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x0001638d Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x000163a1 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x000163b1 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x000163d7 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x000163df Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x000163e9 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_enable 0x00016409 Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_set_int 0x00016425 Thumb Code 76 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x00016479 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x00016495 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x000164a1 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x000164c9 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x000164e1 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x000164fd Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x00016521 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x00016545 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x00016555 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x00016565 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x000165a3 Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x000165c5 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x000165d5 Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x00016629 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x0001663d Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x0001664d Thumb Code 80 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x000166a1 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x000166c9 Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x000166e3 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x000166ff Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00016751 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00016759 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00016771 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x000167b1 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x000167c5 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x000167ed Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x000167f9 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x000167ff Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x0001683b Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x0001684f Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x0001685f Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x00016867 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x0001688d Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x000168b5 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x000168cd Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x000168d7 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x000168e7 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x000168f1 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x000168fb Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x0001690d Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00016917 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00016921 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x00016939 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00016969 Thumb Code 60 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x000169a9 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x000169b3 Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x000169c9 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x000169fd Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00016a99 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016b1d Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_max_ret_size 0x00016b45 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00016b6d Thumb Code 88 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_send_ack_cmd 0x00017315 Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_sync_line 0x00017405 Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x000174e5 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_set_tear_mode_ex 0x00017519 Thumb Code 14 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + hal_dsi_rx_ctrl_start 0x00017529 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x00017565 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution 0x000175a1 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) + hal_dsi_tx_ctrl_create_handle 0x00017bd5 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00017c01 Thumb Code 118 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x00017c85 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017cd1 Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x00017cf9 Thumb Code 154 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x00017dc1 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_set_ccm 0x00017dcd Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00017ded Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x00017e01 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x00017e11 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x00017e35 Thumb Code 140 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00017ed1 Thumb Code 56 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00017f15 Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00017fed Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x00018281 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x00018299 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x000182ad Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x000182ed Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x0001830d Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00018335 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x0001834d Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x0001839d Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x000183fd Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x00018405 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x00018425 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x00018491 Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x000184b1 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x000184cd Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x00018509 Thumb Code 62 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x00018555 Thumb Code 176 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x0001861d Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x00018631 Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x000187b1 Thumb Code 170 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x000188ad Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_get_hight_performan_mode 0x000188bd Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change 0x000188cd Thumb Code 438 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) + hal_internal_update_dpi_param 0x00018af9 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + hal_internal_video_mode_auto_sync 0x00018b09 Thumb Code 238 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + hal_internal_vsync_deinit 0x00018c15 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00018c3d Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00018c49 Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tear_mode 0x00018c61 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + hal_internal_vsync_get_tx_state 0x00018c6d Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00018c79 Thumb Code 236 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00018d91 Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x00018e41 Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x00018f5d Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x00018f71 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x00018f95 Thumb Code 72 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00018fe5 Thumb Code 118 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_spi_m_clear_rxfifo 0x00019489 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_deinit 0x00019497 Thumb Code 18 hal_swire.o(i.hal_swire_deinit) + hal_swire_open 0x000194a9 Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x000194bf Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x000194c9 Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x00019551 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x0001956d Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x00019575 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x0001957d Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_deinit 0x00019585 Thumb Code 46 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x000195b3 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x000195cd Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x00019615 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x0001963d Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x000196c9 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x000196d9 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x00019915 Thumb Code 10 main.o(i.main) + sqrt 0x0001a661 Thumb Code 66 sqrt.o(i.sqrt) + panel_init_code 0x0001aac4 Data 9967 ap_demo.o(.constdata) + phone_data_21 0x0001d2cc Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001d2cd Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_0 0x0001d2ce Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_92_1 0x0001d2cf Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_1 0x0001d2d0 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_2 0x0001d2d1 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_3 0x0001d2d2 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_4 0x0001d2d3 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001d2d4 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_92_3 0x0001d2d7 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001d2da Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001d2de Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001d2e2 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001d2e6 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001d2ea Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001d2ee Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_92_2 0x0001d2f3 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_1 0x0001d2f9 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_2 0x0001d2ff Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_3 0x0001d305 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_4 0x0001d30b Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001d311 Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001d321 Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_2 0x0001d32c Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001d348 Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_3 0x0001d352 Data 1224 app_tp_for_custom_s8.o(.constdata) + phone_data_72_5 0x0001d81a Data 1224 app_tp_for_custom_s8.o(.constdata) + phone_data_72_13 0x0001dce2 Data 1224 app_tp_for_custom_s8.o(.constdata) + phone_data_75_1 0x0001e1aa Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_00 0x0001e416 Data 660 app_tp_for_custom_s8.o(.constdata) + phone_data_75_FF 0x0001e6aa Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_3 0x0001e7ca Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_6 0x0001ea36 Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7 0x0001eca2 Data 620 app_tp_for_custom_s8.o(.constdata) + phone_data_75_08 0x0001ef0e Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_11 0x0001f02e Data 620 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001f29a Data 16 app_tp_for_custom_s8.o(.constdata) + sleep_click_on 0x0001f2aa Data 16 app_tp_for_custom_s8.o(.constdata) + screen_reg_start_data_size 0x0001f2ba Data 1 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001f60c Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001f63c Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_start_flag 0x000701d8 Data 1 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701d9 Data 1 ap_demo.o(.data) + panel_mode 0x000701dd Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701e0 Data 2 ap_demo.o(.data) + value_reg_ca 0x000701e2 Data 2 ap_demo.o(.data) + panel_r 0x000701e4 Data 2 ap_demo.o(.data) + panel_g 0x000701e6 Data 2 ap_demo.o(.data) + panel_b 0x000701e8 Data 2 ap_demo.o(.data) + s_screen_init_complate 0x000701fc Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x00070200 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x00070203 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x00070206 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data2 0x00070209 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data3 0x0007020c Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data6 0x0007020f Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data7 0x00070212 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data8 0x00070215 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data4 0x00070218 Data 4 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data5 0x0007021c Data 4 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x00070220 Data 6 app_tp_transfer.o(.data) + phone_data_E4 0x00070254 Data 1 app_tp_for_custom_s8.o(.data) + tp_flag 0x00070255 Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x00070256 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x00070257 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x00070258 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_clk_count 0x00070259 Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x0007025a Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x0007025b Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x0007025c Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x0007025d Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x0007025e Data 1 app_tp_for_custom_s8.o(.data) + phone_data_B1 0x00070268 Data 2 app_tp_for_custom_s8.o(.data) + phone_data_30 0x0007026a Data 2 app_tp_for_custom_s8.o(.data) + fingerprint_arr_on 0x00070278 Data 16 app_tp_for_custom_s8.o(.data) + fingerprint_arr_off 0x00070288 Data 16 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x00070298 Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x00070360 Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x00070361 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x00070362 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x00070363 Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x00070366 Data 5 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x0007036c Data 48 app_tp_for_custom_s8.o(.data) + g_fls_w_cmd 0x0007039c Data 1 norflash.o(.data) + g_fls_r_cmd 0x0007039d Data 1 norflash.o(.data) + g_fls_write_en_status 0x0007039e Data 1 norflash.o(.data) + isFlsTransferEnd 0x0007039f Data 1 norflash.o(.data) + isFlsFifoReq 0x000703a0 Data 1 norflash.o(.data) + isNandWriteCompleted 0x000703a1 Data 1 norflash.o(.data) + isNandReadCompleted 0x000703a2 Data 1 norflash.o(.data) + g_fls_error_info 0x000703a8 Data 6 norflash.o(.data) + g_systick_cb_func 0x000703b4 Data 4 drv_common.o(.data) + g_system_clock 0x000703b8 Data 4 drv_common.o(.data) + g_scld_fhd_filter_h 0x000703d0 Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x000704d0 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x000705d0 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x000706d0 Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x000707d0 Data 128 drv_param_init.o(.data) + g_ccm_setting 0x00070850 Data 36 drv_param_init.o(.data) + g_sof_gen_te_func 0x000708dc Data 4 hal_internal_vsync.o(.data) + g_int_rxbr_irq0_cb_func 0x000708e0 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x000708e4 Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x000708e8 Data 4 drv_vidc.o(.data) + __stdout 0x0007091c Data 4 stdout.o(.data) + string 0x00070bc4 Data 256 tau_log.o(.bss) + hal_dmahandle 0x00070cc4 Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x00070d64 Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x00070d84 Data 16 hal_uart.o(.bss) + g_vsync_hande 0x00070f30 Data 100 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00070f94 Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x000718b4 Data 4144 dcs_packet_fifo.o(.bss) + g_spis_ctrl_handle 0x000728e4 Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x00072908 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00073908 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x0000fd90, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000fa2c]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000f63c, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 424 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2587 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2897 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2900 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2902 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2904 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2905 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2907 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2909 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2898 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 425 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2590 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2592 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2594 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2596 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 2861 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 2863 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 2865 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 2867 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 2869 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 2871 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 2873 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 2875 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 2877 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 2881 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 2883 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 2885 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 2887 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 2889 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 2891 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 2893 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 2895 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 2912 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 2914 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 2916 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 2918 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 2927 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 2928 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 2930 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 2934 .text mf_p.l(dsqrt.o) + 0x00010afa 0x00010afa 0x00000002 PAD + 0x00010afc 0x00010afc 0x00000040 Code RO 2936 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 2938 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 2940 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000056 Code RO 2950 .text mc_p.l(__dczerorl2.o) + 0x00010bde 0x00010bde 0x00000002 PAD + 0x00010be0 0x00010be0 0x00000018 Code RO 2182 i.ADC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010bf8 0x00010bf8 0x00000018 Code RO 2183 i.AP_NRESET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c10 0x00010c10 0x00000014 Code RO 2184 i.DMA_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c24 0x00010c24 0x0000001c Code RO 2185 i.EXTI_INT0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c40 0x00010c40 0x0000001c Code RO 2186 i.EXTI_INT1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c5c 0x00010c5c 0x0000001c Code RO 2187 i.EXTI_INT2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c78 0x00010c78 0x0000001c Code RO 2188 i.EXTI_INT3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c94 0x00010c94 0x0000001c Code RO 2189 i.EXTI_INT4_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cb0 0x00010cb0 0x0000001c Code RO 2190 i.EXTI_INT5_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ccc 0x00010ccc 0x0000001c Code RO 2191 i.EXTI_INT6_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ce8 0x00010ce8 0x0000001c Code RO 2192 i.EXTI_INT7_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d04 0x00010d04 0x00000024 Code RO 848 i.EncryptCheckEx WL368_NOTE20_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00010d28 0x00010d28 0x00000014 Code RO 2193 i.FLSCTRL_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d3c 0x00010d3c 0x0000004e Code RO 99 i.Gpio_swire_output ap_demo.o + 0x00010d8a 0x00010d8a 0x00000002 PAD + 0x00010d8c 0x00010d8c 0x00000014 Code RO 2194 i.HardFault_Handler CVWL368.lib(irq_redirect .o) + 0x00010da0 0x00010da0 0x00000018 Code RO 2195 i.I2C0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010db8 0x00010db8 0x00000018 Code RO 2196 i.I2C1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010dd0 0x00010dd0 0x00000018 Code RO 2197 i.LCDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010de8 0x00010de8 0x00000028 Code RO 837 i.LOG_printf CVWL368.lib(tau_log.o) + 0x00010e10 0x00010e10 0x00000018 Code RO 2198 i.MEMC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e28 0x00010e28 0x00000018 Code RO 2199 i.MIPI_RX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e40 0x00010e40 0x00000018 Code RO 2200 i.MIPI_TX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e58 0x00010e58 0x0000001c Code RO 2201 i.PWMDET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e74 0x00010e74 0x00000134 Code RO 260 i.S20_Start_init app_tp_transfer.o + 0x00010fa8 0x00010fa8 0x0000001c Code RO 2202 i.SPIM_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010fc4 0x00010fc4 0x0000001c Code RO 2203 i.SPIS_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010fe0 0x00010fe0 0x0000001c Code RO 2204 i.SWIRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ffc 0x00010ffc 0x00000002 Code RO 2469 i.UART_DisableDma CVWL368.lib(drv_uart.o) + 0x00010ffe 0x00010ffe 0x00000002 Code RO 2945 i.__scatterload_null mc_p.l(handlers.o) + 0x00011000 0x00011000 0x00000014 Data RO 1085 .ARM.__at_0x11000 CVWL368.lib(drv_common.o) + 0x00011014 0x00011014 0x00000004 Code RO 2475 i.UART_GetInstance CVWL368.lib(drv_uart.o) + 0x00011018 0x00011018 0x00000004 Data RO 1086 .ARM.__at_0x11018 CVWL368.lib(drv_common.o) + 0x0001101c 0x0001101c 0x00000018 Code RO 2205 i.SysTick_Handler CVWL368.lib(irq_redirect .o) + 0x00011034 0x00011034 0x00000018 Code RO 2206 i.TIMER0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001104c 0x0001104c 0x00000018 Code RO 2207 i.TIMER1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011064 0x00011064 0x00000018 Code RO 2208 i.TIMER2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001107c 0x0001107c 0x00000018 Code RO 2209 i.TIMER3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011094 0x00011094 0x0000001c Code RO 2465 i.UART0_IRQ_Handle CVWL368.lib(drv_uart.o) + 0x000110b0 0x000110b0 0x00000018 Code RO 2210 i.UART_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110c8 0x000110c8 0x00000024 Code RO 2483 i.UART_ResetRxFIFO CVWL368.lib(drv_uart.o) + 0x000110ec 0x000110ec 0x00000048 Code RO 2486 i.UART_SetBaudRate CVWL368.lib(drv_uart.o) + 0x00011134 0x00011134 0x0000001a Code RO 2487 i.UART_SwitchSCLK CVWL368.lib(drv_uart.o) + 0x0001114e 0x0001114e 0x00000134 Code RO 2489 i.UART_TransferHandleIRQ CVWL368.lib(drv_uart.o) + 0x00011282 0x00011282 0x0000001a Code RO 2491 i.UART_WriteBlocking CVWL368.lib(drv_uart.o) + 0x0001129c 0x0001129c 0x000000bc Code RO 2492 i.UART_init CVWL368.lib(drv_uart.o) + 0x00011358 0x00011358 0x00000018 Code RO 2211 i.VIDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011370 0x00011370 0x00000018 Code RO 2212 i.VPRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011388 0x00011388 0x00000018 Code RO 2213 i.WDG_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113a0 0x000113a0 0x00000020 Code RO 2833 i.__0printf mc_p.l(printfa.o) + 0x000113c0 0x000113c0 0x00000024 Code RO 2839 i.__0vsprintf mc_p.l(printfa.o) + 0x000113e4 0x000113e4 0x0000002e Code RO 2932 i.__ARM_clz mf_p.l(depilogue.o) + 0x00011412 0x00011412 0x0000001a Code RO 522 i.__ARM_common_switch8 CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001142c 0x0001142c 0x00000018 Code RO 1406 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_i2c_master.o) + 0x00011444 0x00011444 0x00000018 Code RO 1530 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_spi_master.o) + 0x0001145c 0x0001145c 0x00000020 Code RO 2036 i.__NVIC_DisableIRQ CVWL368.lib(drv_rxbr.o) + 0x0001147c 0x0001147c 0x00000018 Code RO 2037 i.__NVIC_EnableIRQ CVWL368.lib(drv_rxbr.o) + 0x00011494 0x00011494 0x00000044 Code RO 2332 i.__NVIC_SetPriority CVWL368.lib(hal_spi_slave.o) + 0x000114d8 0x000114d8 0x0000000e Code RO 2944 i.__scatterload_copy mc_p.l(handlers.o) + 0x000114e6 0x000114e6 0x0000000e Code RO 2946 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x000114f4 0x000114f4 0x0000000c Code RO 2922 i.__set_errno mc_p.l(errno.o) + 0x00011500 0x00011500 0x00000174 Code RO 2840 i._fp_digits mc_p.l(printfa.o) + 0x00011674 0x00011674 0x000006ec Code RO 2841 i._printf_core mc_p.l(printfa.o) + 0x00011d60 0x00011d60 0x00000020 Code RO 2842 i._printf_post_padding mc_p.l(printfa.o) + 0x00011d80 0x00011d80 0x0000002c Code RO 2843 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011dac 0x00011dac 0x0000000a Code RO 2845 i._sputc mc_p.l(printfa.o) + 0x00011db6 0x00011db6 0x00000002 PAD + 0x00011db8 0x00011db8 0x000004a4 Code RO 100 i.ap_dcs_read ap_demo.o + 0x0001225c 0x0001225c 0x00000218 Code RO 101 i.ap_demo ap_demo.o + 0x00012474 0x00012474 0x00000068 Code RO 102 i.ap_get_reg_ca ap_demo.o + 0x000124dc 0x000124dc 0x0000008c Code RO 103 i.ap_get_reg_df ap_demo.o + 0x00012568 0x00012568 0x00000074 Code RO 104 i.ap_reset_cb ap_demo.o + 0x000125dc 0x000125dc 0x00000060 Code RO 105 i.ap_set_backlight_51 ap_demo.o + 0x0001263c 0x0001263c 0x0000004c Code RO 106 i.ap_set_display_off ap_demo.o + 0x00012688 0x00012688 0x00000034 Code RO 107 i.ap_set_display_on ap_demo.o + 0x000126bc 0x000126bc 0x00000088 Code RO 108 i.ap_set_enter_sleep_mode ap_demo.o + 0x00012744 0x00012744 0x00000044 Code RO 109 i.ap_set_exit_sleep_mode ap_demo.o + 0x00012788 0x00012788 0x0000001c Code RO 110 i.ap_set_tp_calibration_04 ap_demo.o + 0x000127a4 0x000127a4 0x000000b0 Code RO 261 i.ap_tp_calibration app_tp_transfer.o + 0x00012854 0x00012854 0x0000001c Code RO 2038 i.app_ADC_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00012870 0x00012870 0x00000024 Code RO 1330 i.app_AP_NRESET_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012894 0x00012894 0x0000001c Code RO 1331 i.app_EXTI_INT0_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000128b0 0x000128b0 0x0000001c Code RO 1332 i.app_EXTI_INT1_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000128cc 0x000128cc 0x0000001c Code RO 1333 i.app_EXTI_INT2_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000128e8 0x000128e8 0x0000001c Code RO 1334 i.app_EXTI_INT3_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012904 0x00012904 0x0000001c Code RO 1335 i.app_EXTI_INT4_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012920 0x00012920 0x0000001c Code RO 1336 i.app_EXTI_INT5_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x0001293c 0x0001293c 0x0000001c Code RO 1337 i.app_EXTI_INT6_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012958 0x00012958 0x0000001c Code RO 1338 i.app_EXTI_INT7_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012974 0x00012974 0x00000048 Code RO 1077 i.app_HardFault_Handler CVWL368.lib(drv_common.o) + 0x000129bc 0x000129bc 0x00000018 Code RO 1441 i.app_I2C0_IRQn_Handler CVWL368.lib(drv_i2c_slave.o) + 0x000129d4 0x000129d4 0x00000010 Code RO 1407 i.app_I2C1_IRQn_Handler CVWL368.lib(drv_i2c_master.o) + 0x000129e4 0x000129e4 0x000001a4 Code RO 1648 i.app_LCDC_IRQn_Handler CVWL368.lib(hal_internal_vsync.o) + 0x00012b88 0x00012b88 0x00000088 Code RO 1980 i.app_MEMC_IRQn_Handler CVWL368.lib(drv_memc.o) + 0x00012c10 0x00012c10 0x00000298 Code RO 1752 i.app_MIPI_RX_IRQn_Handler CVWL368.lib(drv_dsi_rx.o) + 0x00012ea8 0x00012ea8 0x000000a0 Code RO 1808 i.app_MIPI_TX_IRQn_Handler CVWL368.lib(drv_dsi_tx.o) + 0x00012f48 0x00012f48 0x00000048 Code RO 2400 i.app_PWMDET_IRQn_Handler CVWL368.lib(drv_pwm.o) + 0x00012f90 0x00012f90 0x00000030 Code RO 1531 i.app_SPIM_IRQn_Handler CVWL368.lib(drv_spi_master.o) + 0x00012fc0 0x00012fc0 0x00000200 Code RO 2333 i.app_SPIS_IRQn_Handler CVWL368.lib(hal_spi_slave.o) + 0x000131c0 0x000131c0 0x00000020 Code RO 1563 i.app_SWIRE_IRQn_Handler CVWL368.lib(drv_swire.o) + 0x000131e0 0x000131e0 0x00000018 Code RO 1078 i.app_SysTick_Handler CVWL368.lib(drv_common.o) + 0x000131f8 0x000131f8 0x0000000a Code RO 1613 i.app_TIMER0_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x00013202 0x00013202 0x0000000a Code RO 1614 i.app_TIMER1_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x0001320c 0x0001320c 0x0000000a Code RO 1615 i.app_TIMER2_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x00013216 0x00013216 0x0000000a Code RO 1616 i.app_TIMER3_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x00013220 0x00013220 0x00000008 Code RO 2493 i.app_UART_IRQn_Handler CVWL368.lib(drv_uart.o) + 0x00013228 0x00013228 0x0000001c Code RO 2103 i.app_VIDC_IRQn_Handler CVWL368.lib(drv_vidc.o) + 0x00013244 0x00013244 0x0000001c Code RO 2039 i.app_VPRE_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00013260 0x00013260 0x00000038 Code RO 2552 i.app_WDG_IRQn_Handler CVWL368.lib(drv_wdg.o) + 0x00013298 0x00013298 0x00000010 Code RO 1192 i.app_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x000132a8 0x000132a8 0x00000030 Code RO 993 i.app_fls_ctrl_Handler CVWL368.lib(norflash.o) + 0x000132d8 0x000132d8 0x00000024 Code RO 262 i.app_tp_I2C_init app_tp_transfer.o + 0x000132fc 0x000132fc 0x00000060 Code RO 111 i.app_tp_calibration_exec ap_demo.o + 0x0001335c 0x0001335c 0x00000030 Code RO 263 i.app_tp_i2cs_callback app_tp_transfer.o + 0x0001338c 0x0001338c 0x00000054 Code RO 264 i.app_tp_init app_tp_transfer.o + 0x000133e0 0x000133e0 0x00000020 Code RO 265 i.app_tp_m_read app_tp_transfer.o + 0x00013400 0x00013400 0x00000008 Code RO 267 i.app_tp_m_write app_tp_transfer.o + 0x00013408 0x00013408 0x000003a0 Code RO 849 i.app_tp_phone_analysis_data WL368_NOTE20_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x000137a8 0x000137a8 0x0000000c Code RO 268 i.app_tp_phone_clear_reset_on app_tp_transfer.o + 0x000137b4 0x000137b4 0x00000008 Code RO 270 i.app_tp_s_read app_tp_transfer.o + 0x000137bc 0x000137bc 0x00000008 Code RO 272 i.app_tp_s_write app_tp_transfer.o + 0x000137c4 0x000137c4 0x000003d0 Code RO 851 i.app_tp_screen_analysis_int WL368_NOTE20_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00013b94 0x00013b94 0x00000030 Code RO 273 i.app_tp_screen_init app_tp_transfer.o + 0x00013bc4 0x00013bc4 0x0000000c Code RO 274 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00013bd0 0x00013bd0 0x00000040 Code RO 275 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00013c10 0x00013c10 0x000000f4 Code RO 276 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x00013d04 0x00013d04 0x00000014 Code RO 277 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x00013d18 0x00013d18 0x00000024 Code RO 404 i.board_Init board.o + 0x00013d3c 0x00013d3c 0x000004f0 Code RO 1649 i.calc_framebuffer_setting CVWL368.lib(hal_internal_vsync.o) + 0x0001422c 0x0001422c 0x000000c8 Code RO 2576 i.ceil m_ps.l(ceil.o) + 0x000142f4 0x000142f4 0x0000002c Code RO 1650 i.check_mipi_rx_tx_video_info CVWL368.lib(hal_internal_vsync.o) + 0x00014320 0x00014320 0x00000094 Code RO 1651 i.check_pkt_buf_rev CVWL368.lib(hal_internal_vsync.o) + 0x000143b4 0x000143b4 0x00000058 Code RO 1739 i.dcs_packet_fifo_alloc CVWL368.lib(dcs_packet_fifo.o) + 0x0001440c 0x0001440c 0x00000018 Code RO 1740 i.dcs_packet_fifo_init CVWL368.lib(dcs_packet_fifo.o) + 0x00014424 0x00014424 0x00000044 Code RO 1741 i.dcs_packet_free_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x00014468 0x00014468 0x00000024 Code RO 1742 i.dcs_packet_get_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x0001448c 0x0001448c 0x0000001c Code RO 1652 i.dcs_sw_filter CVWL368.lib(hal_internal_vsync.o) + 0x000144a8 0x000144a8 0x00000018 Code RO 829 i.delayMs CVWL368.lib(tau_delay.o) + 0x000144c0 0x000144c0 0x00000022 Code RO 830 i.delayUs CVWL368.lib(tau_delay.o) + 0x000144e2 0x000144e2 0x00000002 PAD + 0x000144e4 0x000144e4 0x00000038 Code RO 1582 i.drv_ap_rst_trig_edge_detect CVWL368.lib(drv_sys_cfg.o) + 0x0001451c 0x0001451c 0x0000000c Code RO 2303 i.drv_chip_info_get_info CVWL368.lib(drv_chip_info.o) + 0x00014528 0x00014528 0x00000040 Code RO 2304 i.drv_chip_info_init CVWL368.lib(drv_chip_info.o) + 0x00014568 0x00014568 0x000000b0 Code RO 2305 i.drv_chip_rx_info_check CVWL368.lib(drv_chip_info.o) + 0x00014618 0x00014618 0x00000014 Code RO 2306 i.drv_chip_rx_init_done CVWL368.lib(drv_chip_info.o) + 0x0001462c 0x0001462c 0x00000058 Code RO 1080 i.drv_common_enable_systick CVWL368.lib(drv_common.o) + 0x00014684 0x00014684 0x00000008 Code RO 1083 i.drv_common_system_init CVWL368.lib(drv_common.o) + 0x0001468c 0x0001468c 0x00000010 Code RO 1105 i.drv_crgu_config_reset_modules CVWL368.lib(drv_crgu.o) + 0x0001469c 0x0001469c 0x00000014 Code RO 1118 i.drv_crgu_set_ahb_pre_div CVWL368.lib(drv_crgu.o) + 0x000146b0 0x000146b0 0x00000014 Code RO 1119 i.drv_crgu_set_ahb_src CVWL368.lib(drv_crgu.o) + 0x000146c4 0x000146c4 0x00000020 Code RO 1122 i.drv_crgu_set_clock CVWL368.lib(drv_crgu.o) + 0x000146e4 0x000146e4 0x00000014 Code RO 1123 i.drv_crgu_set_dpi_mux_src CVWL368.lib(drv_crgu.o) + 0x000146f8 0x000146f8 0x00000018 Code RO 1124 i.drv_crgu_set_dpi_pre_div CVWL368.lib(drv_crgu.o) + 0x00014710 0x00014710 0x00000014 Code RO 1125 i.drv_crgu_set_dpi_pre_src CVWL368.lib(drv_crgu.o) + 0x00014724 0x00014724 0x00000014 Code RO 1126 i.drv_crgu_set_dsc_core_div CVWL368.lib(drv_crgu.o) + 0x00014738 0x00014738 0x00000014 Code RO 1127 i.drv_crgu_set_dsco_src CVWL368.lib(drv_crgu.o) + 0x0001474c 0x0001474c 0x00000014 Code RO 1128 i.drv_crgu_set_dsco_src_div CVWL368.lib(drv_crgu.o) + 0x00014760 0x00014760 0x00000014 Code RO 1129 i.drv_crgu_set_fb_div CVWL368.lib(drv_crgu.o) + 0x00014774 0x00014774 0x00000014 Code RO 1130 i.drv_crgu_set_fb_src CVWL368.lib(drv_crgu.o) + 0x00014788 0x00014788 0x00000014 Code RO 1133 i.drv_crgu_set_lcdc_div CVWL368.lib(drv_crgu.o) + 0x0001479c 0x0001479c 0x00000014 Code RO 1134 i.drv_crgu_set_lcdc_src CVWL368.lib(drv_crgu.o) + 0x000147b0 0x000147b0 0x00000014 Code RO 1135 i.drv_crgu_set_mipi_cfg_src CVWL368.lib(drv_crgu.o) + 0x000147c4 0x000147c4 0x00000018 Code RO 1136 i.drv_crgu_set_mipi_ref_src CVWL368.lib(drv_crgu.o) + 0x000147dc 0x000147dc 0x00000018 Code RO 1139 i.drv_crgu_set_reset CVWL368.lib(drv_crgu.o) + 0x000147f4 0x000147f4 0x00000014 Code RO 1140 i.drv_crgu_set_rxbr_div CVWL368.lib(drv_crgu.o) + 0x00014808 0x00014808 0x00000014 Code RO 1141 i.drv_crgu_set_rxbr_src CVWL368.lib(drv_crgu.o) + 0x0001481c 0x0001481c 0x00000014 Code RO 1143 i.drv_crgu_set_vidc_src CVWL368.lib(drv_crgu.o) + 0x00014830 0x00014830 0x00000018 Code RO 1196 i.drv_dma_clear_flag CVWL368.lib(drv_dma.o) + 0x00014848 0x00014848 0x0000001c Code RO 1197 i.drv_dma_create_handle CVWL368.lib(drv_dma.o) + 0x00014864 0x00014864 0x00000010 Code RO 1199 i.drv_dma_disenable_channel CVWL368.lib(drv_dma.o) + 0x00014874 0x00014874 0x00000010 Code RO 1201 i.drv_dma_enable_channel CVWL368.lib(drv_dma.o) + 0x00014884 0x00014884 0x00000024 Code RO 1202 i.drv_dma_enable_channel_interrupts CVWL368.lib(drv_dma.o) + 0x000148a8 0x000148a8 0x0000000c Code RO 1204 i.drv_dma_get_channel_flag CVWL368.lib(drv_dma.o) + 0x000148b4 0x000148b4 0x00000090 Code RO 1207 i.drv_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00014944 0x00014944 0x00000012 Code RO 1209 i.drv_dma_prepar_transfer CVWL368.lib(drv_dma.o) + 0x00014956 0x00014956 0x0000001a Code RO 1211 i.drv_dma_set_burst CVWL368.lib(drv_dma.o) + 0x00014970 0x00014970 0x00000006 Code RO 1212 i.drv_dma_set_callback CVWL368.lib(drv_dma.o) + 0x00014976 0x00014976 0x00000002 PAD + 0x00014978 0x00014978 0x00000044 Code RO 1214 i.drv_dma_set_transfer CVWL368.lib(drv_dma.o) + 0x000149bc 0x000149bc 0x00000036 Code RO 2316 i.drv_dsc_dec_convert_pps_rc_parameter CVWL368.lib(drv_dsc_dec.o) + 0x000149f2 0x000149f2 0x0000000c Code RO 2317 i.drv_dsc_dec_disable CVWL368.lib(drv_dsc_dec.o) + 0x000149fe 0x000149fe 0x00000002 PAD + 0x00014a00 0x00014a00 0x00000074 Code RO 2318 i.drv_dsc_dec_enable CVWL368.lib(drv_dsc_dec.o) + 0x00014a74 0x00014a74 0x0000000a Code RO 2319 i.drv_dsc_dec_get_nslc CVWL368.lib(drv_dsc_dec.o) + 0x00014a7e 0x00014a7e 0x00000028 Code RO 2321 i.drv_dsc_dec_set_u8_pps CVWL368.lib(drv_dsc_dec.o) + 0x00014aa6 0x00014aa6 0x00000002 PAD + 0x00014aa8 0x00014aa8 0x00000104 Code RO 1753 i.drv_dsi_rx_calc_ipi_tx_delay CVWL368.lib(drv_dsi_rx.o) + 0x00014bac 0x00014bac 0x00000040 Code RO 1754 i.drv_dsi_rx_enable_irq CVWL368.lib(drv_dsi_rx.o) + 0x00014bec 0x00014bec 0x00000050 Code RO 1755 i.drv_dsi_rx_get_color_bpp CVWL368.lib(drv_dsi_rx.o) + 0x00014c3c 0x00014c3c 0x0000001c Code RO 1756 i.drv_dsi_rx_get_color_pcc CVWL368.lib(drv_dsi_rx.o) + 0x00014c58 0x00014c58 0x00000008 Code RO 1757 i.drv_dsi_rx_get_compression_en CVWL368.lib(drv_dsi_rx.o) + 0x00014c60 0x00014c60 0x00000006 Code RO 1758 i.drv_dsi_rx_get_max_ret_size CVWL368.lib(drv_dsi_rx.o) + 0x00014c66 0x00014c66 0x0000000e Code RO 1762 i.drv_dsi_rx_power_up CVWL368.lib(drv_dsi_rx.o) + 0x00014c74 0x00014c74 0x00000020 Code RO 1763 i.drv_dsi_rx_set_ctrl_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014c94 0x00014c94 0x00000010 Code RO 1764 i.drv_dsi_rx_set_ddi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014ca4 0x00014ca4 0x00000004 Code RO 1766 i.drv_dsi_rx_set_inten CVWL368.lib(drv_dsi_rx.o) + 0x00014ca8 0x00014ca8 0x00000010 Code RO 1767 i.drv_dsi_rx_set_ipi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014cb8 0x00014cb8 0x00000046 Code RO 1769 i.drv_dsi_rx_set_lane_swap CVWL368.lib(drv_dsi_rx.o) + 0x00014cfe 0x00014cfe 0x00000026 Code RO 1770 i.drv_dsi_rx_set_resp_cnt CVWL368.lib(drv_dsi_rx.o) + 0x00014d24 0x00014d24 0x00000104 Code RO 1771 i.drv_dsi_rx_set_up_phy CVWL368.lib(drv_dsi_rx.o) + 0x00014e28 0x00014e28 0x0000000e Code RO 1772 i.drv_dsi_rx_shut_down CVWL368.lib(drv_dsi_rx.o) + 0x00014e36 0x00014e36 0x00000014 Code RO 1810 i.drv_dsi_tx_command_header CVWL368.lib(drv_dsi_tx.o) + 0x00014e4a 0x00014e4a 0x0000006c Code RO 1811 i.drv_dsi_tx_command_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00014eb6 0x00014eb6 0x00000004 Code RO 1812 i.drv_dsi_tx_command_put_payload CVWL368.lib(drv_dsi_tx.o) + 0x00014eba 0x00014eba 0x00000018 Code RO 1813 i.drv_dsi_tx_config_eotp CVWL368.lib(drv_dsi_tx.o) + 0x00014ed2 0x00014ed2 0x00000008 Code RO 1814 i.drv_dsi_tx_config_int CVWL368.lib(drv_dsi_tx.o) + 0x00014eda 0x00014eda 0x00000008 Code RO 1815 i.drv_dsi_tx_dpi_lpcmd_time CVWL368.lib(drv_dsi_tx.o) + 0x00014ee2 0x00014ee2 0x0000000a Code RO 1816 i.drv_dsi_tx_dpi_mode CVWL368.lib(drv_dsi_tx.o) + 0x00014eec 0x00014eec 0x00000024 Code RO 1817 i.drv_dsi_tx_dpi_polarity CVWL368.lib(drv_dsi_tx.o) + 0x00014f10 0x00014f10 0x00000004 Code RO 1818 i.drv_dsi_tx_edpi_cmd_size CVWL368.lib(drv_dsi_tx.o) + 0x00014f14 0x00014f14 0x00000004 Code RO 1820 i.drv_dsi_tx_get_cmd_status CVWL368.lib(drv_dsi_tx.o) + 0x00014f18 0x00014f18 0x00000004 Code RO 1822 i.drv_dsi_tx_mode CVWL368.lib(drv_dsi_tx.o) + 0x00014f1c 0x00014f1c 0x00000018 Code RO 1823 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL368.lib(drv_dsi_tx.o) + 0x00014f34 0x00014f34 0x0000001a Code RO 1824 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL368.lib(drv_dsi_tx.o) + 0x00014f4e 0x00014f4e 0x0000000c Code RO 1826 i.drv_dsi_tx_phy_lane_mode CVWL368.lib(drv_dsi_tx.o) + 0x00014f5a 0x00014f5a 0x00000064 Code RO 1830 i.drv_dsi_tx_phy_status_ready CVWL368.lib(drv_dsi_tx.o) + 0x00014fbe 0x00014fbe 0x0000003e Code RO 1831 i.drv_dsi_tx_phy_status_stopstate CVWL368.lib(drv_dsi_tx.o) + 0x00014ffc 0x00014ffc 0x00000134 Code RO 1833 i.drv_dsi_tx_phy_test_setup CVWL368.lib(drv_dsi_tx.o) + 0x00015130 0x00015130 0x0000001e Code RO 1834 i.drv_dsi_tx_phy_time_cfg CVWL368.lib(drv_dsi_tx.o) + 0x0001514e 0x0001514e 0x00000008 Code RO 1838 i.drv_dsi_tx_powerup CVWL368.lib(drv_dsi_tx.o) + 0x00015156 0x00015156 0x0000001c Code RO 1839 i.drv_dsi_tx_response_mode CVWL368.lib(drv_dsi_tx.o) + 0x00015172 0x00015172 0x00000018 Code RO 1842 i.drv_dsi_tx_set_bta_ack CVWL368.lib(drv_dsi_tx.o) + 0x0001518a 0x0001518a 0x0000000c Code RO 1843 i.drv_dsi_tx_set_esc_div CVWL368.lib(drv_dsi_tx.o) + 0x00015196 0x00015196 0x00000002 PAD + 0x00015198 0x00015198 0x00000040 Code RO 1844 i.drv_dsi_tx_set_int CVWL368.lib(drv_dsi_tx.o) + 0x000151d8 0x000151d8 0x00000010 Code RO 1845 i.drv_dsi_tx_set_time_out_div CVWL368.lib(drv_dsi_tx.o) + 0x000151e8 0x000151e8 0x00000008 Code RO 1846 i.drv_dsi_tx_set_video_chunk CVWL368.lib(drv_dsi_tx.o) + 0x000151f0 0x000151f0 0x00000022 Code RO 1847 i.drv_dsi_tx_set_video_timing CVWL368.lib(drv_dsi_tx.o) + 0x00015212 0x00015212 0x00000008 Code RO 1849 i.drv_dsi_tx_shutdown CVWL368.lib(drv_dsi_tx.o) + 0x0001521a 0x0001521a 0x00000026 Code RO 1850 i.drv_dsi_tx_timeout_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00015240 0x00015240 0x000000aa Code RO 1853 i.drv_dsi_tx_video_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x000152ea 0x000152ea 0x00000016 Code RO 1854 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL368.lib(drv_dsi_tx.o) + 0x00015300 0x00015300 0x00000018 Code RO 1855 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL368.lib(drv_dsi_tx.o) + 0x00015318 0x00015318 0x0000002e Code RO 2254 i.drv_efuse_enter_inactive CVWL368.lib(drv_efuse.o) + 0x00015346 0x00015346 0x0000000c Code RO 2257 i.drv_efuse_int_enable CVWL368.lib(drv_efuse.o) + 0x00015352 0x00015352 0x00000032 Code RO 2258 i.drv_efuse_read CVWL368.lib(drv_efuse.o) + 0x00015384 0x00015384 0x00000018 Code RO 2259 i.drv_efuse_read_req CVWL368.lib(drv_efuse.o) + 0x0001539c 0x0001539c 0x00000018 Code RO 1339 i.drv_gpio_get_input_data CVWL368.lib(drv_gpio.o) + 0x000153b4 0x000153b4 0x0000000c Code RO 1341 i.drv_gpio_register_ap_reset_callback CVWL368.lib(drv_gpio.o) + 0x000153c0 0x000153c0 0x00000014 Code RO 1342 i.drv_gpio_register_callback CVWL368.lib(drv_gpio.o) + 0x000153d4 0x000153d4 0x00000050 Code RO 1344 i.drv_gpio_set_int CVWL368.lib(drv_gpio.o) + 0x00015424 0x00015424 0x00000020 Code RO 1345 i.drv_gpio_set_ioe CVWL368.lib(drv_gpio.o) + 0x00015444 0x00015444 0x00000010 Code RO 1346 i.drv_gpio_set_mode0 CVWL368.lib(drv_gpio.o) + 0x00015454 0x00015454 0x00000010 Code RO 1347 i.drv_gpio_set_mode1 CVWL368.lib(drv_gpio.o) + 0x00015464 0x00015464 0x00000010 Code RO 1348 i.drv_gpio_set_mode2 CVWL368.lib(drv_gpio.o) + 0x00015474 0x00015474 0x00000010 Code RO 1349 i.drv_gpio_set_mode3 CVWL368.lib(drv_gpio.o) + 0x00015484 0x00015484 0x00000020 Code RO 630 i.drv_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x000154a4 0x000154a4 0x00000130 Code RO 1350 i.drv_gpio_set_pull_state CVWL368.lib(drv_gpio.o) + 0x000155d4 0x000155d4 0x0000000c Code RO 1442 i.drv_i2c0_set_callback CVWL368.lib(drv_i2c_slave.o) + 0x000155e0 0x000155e0 0x0000000c Code RO 1408 i.drv_i2c1_set_callback CVWL368.lib(drv_i2c_master.o) + 0x000155ec 0x000155ec 0x00000034 Code RO 1382 i.drv_i2c_dma_callback CVWL368.lib(drv_i2c_dma.o) + 0x00015620 0x00015620 0x000000ac Code RO 1383 i.drv_i2c_dma_init CVWL368.lib(drv_i2c_dma.o) + 0x000156cc 0x000156cc 0x0000001a Code RO 1384 i.drv_i2c_enable_rx_dma CVWL368.lib(drv_i2c_dma.o) + 0x000156e6 0x000156e6 0x00000018 Code RO 1385 i.drv_i2c_enable_tx_dma CVWL368.lib(drv_i2c_dma.o) + 0x000156fe 0x000156fe 0x00000002 PAD + 0x00015700 0x00015700 0x00000060 Code RO 1410 i.drv_i2c_m_clear_it_pending_bit CVWL368.lib(drv_i2c_master.o) + 0x00015760 0x00015760 0x00000010 Code RO 1413 i.drv_i2c_m_enable CVWL368.lib(drv_i2c_master.o) + 0x00015770 0x00015770 0x00000038 Code RO 1414 i.drv_i2c_m_enable_intr CVWL368.lib(drv_i2c_master.o) + 0x000157a8 0x000157a8 0x0000008c Code RO 1420 i.drv_i2c_master_init CVWL368.lib(drv_i2c_master.o) + 0x00015834 0x00015834 0x0000005c Code RO 1386 i.drv_i2c_master_read_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015890 0x00015890 0x0000003c Code RO 1387 i.drv_i2c_master_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x000158cc 0x000158cc 0x0000003e Code RO 1388 i.drv_i2c_master_write_read_cmd CVWL368.lib(drv_i2c_dma.o) + 0x0001590a 0x0001590a 0x00000042 Code RO 1443 i.drv_i2c_s_clear_it_pending_bit CVWL368.lib(drv_i2c_slave.o) + 0x0001594c 0x0001594c 0x00000004 Code RO 1444 i.drv_i2c_s_config_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015950 0x00015950 0x00000008 Code RO 1445 i.drv_i2c_s_enable CVWL368.lib(drv_i2c_slave.o) + 0x00015958 0x00015958 0x00000014 Code RO 1446 i.drv_i2c_s_get_fifo_status CVWL368.lib(drv_i2c_slave.o) + 0x0001596c 0x0001596c 0x00000050 Code RO 1449 i.drv_i2c_s_set_intr CVWL368.lib(drv_i2c_slave.o) + 0x000159bc 0x000159bc 0x0000001c Code RO 1450 i.drv_i2c_s_write_data CVWL368.lib(drv_i2c_slave.o) + 0x000159d8 0x000159d8 0x00000058 Code RO 1389 i.drv_i2c_set_dma_irq_callback CVWL368.lib(drv_i2c_dma.o) + 0x00015a30 0x00015a30 0x00000032 Code RO 1451 i.drv_i2c_slave_init CVWL368.lib(drv_i2c_slave.o) + 0x00015a62 0x00015a62 0x00000002 PAD + 0x00015a64 0x00015a64 0x00000018 Code RO 1390 i.drv_i2c_slave_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015a7c 0x00015a7c 0x00000018 Code RO 1922 i.drv_lcdc_config_bypass CVWL368.lib(drv_lcdc.o) + 0x00015a94 0x00015a94 0x00000030 Code RO 1923 i.drv_lcdc_config_ccm CVWL368.lib(drv_lcdc.o) + 0x00015ac4 0x00015ac4 0x00000016 Code RO 1924 i.drv_lcdc_config_disp_mode CVWL368.lib(drv_lcdc.o) + 0x00015ada 0x00015ada 0x00000024 Code RO 1925 i.drv_lcdc_config_dpi_polarity CVWL368.lib(drv_lcdc.o) + 0x00015afe 0x00015afe 0x00000026 Code RO 1926 i.drv_lcdc_config_dpi_timing CVWL368.lib(drv_lcdc.o) + 0x00015b24 0x00015b24 0x00000016 Code RO 1927 i.drv_lcdc_config_edpi_mode CVWL368.lib(drv_lcdc.o) + 0x00015b3a 0x00015b3a 0x00000016 Code RO 1928 i.drv_lcdc_config_endianness CVWL368.lib(drv_lcdc.o) + 0x00015b50 0x00015b50 0x0000000c Code RO 1929 i.drv_lcdc_config_input_size CVWL368.lib(drv_lcdc.o) + 0x00015b5c 0x00015b5c 0x0000001e Code RO 1930 i.drv_lcdc_config_int CVWL368.lib(drv_lcdc.o) + 0x00015b7a 0x00015b7a 0x00000022 Code RO 1931 i.drv_lcdc_config_int_single CVWL368.lib(drv_lcdc.o) + 0x00015b9c 0x00015b9c 0x00000022 Code RO 1932 i.drv_lcdc_config_overwrite CVWL368.lib(drv_lcdc.o) + 0x00015bbe 0x00015bbe 0x0000000c Code RO 1933 i.drv_lcdc_config_overwrite_rgb CVWL368.lib(drv_lcdc.o) + 0x00015bca 0x00015bca 0x0000001a Code RO 1934 i.drv_lcdc_config_partial_display_area CVWL368.lib(drv_lcdc.o) + 0x00015be4 0x00015be4 0x00000022 Code RO 1935 i.drv_lcdc_config_partial_display_enable CVWL368.lib(drv_lcdc.o) + 0x00015c06 0x00015c06 0x0000001a Code RO 1937 i.drv_lcdc_config_scale_up_coef CVWL368.lib(drv_lcdc.o) + 0x00015c20 0x00015c20 0x0000000c Code RO 1938 i.drv_lcdc_config_scale_up_step CVWL368.lib(drv_lcdc.o) + 0x00015c2c 0x00015c2c 0x0000004c Code RO 1939 i.drv_lcdc_config_src_parameter CVWL368.lib(drv_lcdc.o) + 0x00015c78 0x00015c78 0x00000006 Code RO 1940 i.drv_lcdc_config_thresh CVWL368.lib(drv_lcdc.o) + 0x00015c7e 0x00015c7e 0x00000012 Code RO 1941 i.drv_lcdc_ctrl_flow CVWL368.lib(drv_lcdc.o) + 0x00015c90 0x00015c90 0x00000020 Code RO 1943 i.drv_lcdc_enable_shadow_reg CVWL368.lib(drv_lcdc.o) + 0x00015cb0 0x00015cb0 0x00000040 Code RO 1944 i.drv_lcdc_set_int CVWL368.lib(drv_lcdc.o) + 0x00015cf0 0x00015cf0 0x00000014 Code RO 1946 i.drv_lcdc_set_video_hw_mode CVWL368.lib(drv_lcdc.o) + 0x00015d04 0x00015d04 0x00000020 Code RO 1947 i.drv_lcdc_start CVWL368.lib(drv_lcdc.o) + 0x00015d24 0x00015d24 0x0000000c Code RO 1981 i.drv_memc_clear_status CVWL368.lib(drv_memc.o) + 0x00015d30 0x00015d30 0x00000040 Code RO 1982 i.drv_memc_enable_irq CVWL368.lib(drv_memc.o) + 0x00015d70 0x00015d70 0x0000000c Code RO 1983 i.drv_memc_gen_a_tear_signal CVWL368.lib(drv_memc.o) + 0x00015d7c 0x00015d7c 0x00000012 Code RO 1984 i.drv_memc_get_status CVWL368.lib(drv_memc.o) + 0x00015d8e 0x00015d8e 0x00000010 Code RO 1985 i.drv_memc_rate_transfer_sel CVWL368.lib(drv_memc.o) + 0x00015d9e 0x00015d9e 0x0000000e Code RO 1986 i.drv_memc_sel_vsync CVWL368.lib(drv_memc.o) + 0x00015dac 0x00015dac 0x00000014 Code RO 1987 i.drv_memc_set_active_height CVWL368.lib(drv_memc.o) + 0x00015dc0 0x00015dc0 0x0000000c Code RO 1988 i.drv_memc_set_data_mode CVWL368.lib(drv_memc.o) + 0x00015dcc 0x00015dcc 0x00000010 Code RO 1991 i.drv_memc_set_double_buffer CVWL368.lib(drv_memc.o) + 0x00015ddc 0x00015ddc 0x00000012 Code RO 1992 i.drv_memc_set_double_buffer_reverse CVWL368.lib(drv_memc.o) + 0x00015dee 0x00015dee 0x00000010 Code RO 1994 i.drv_memc_set_fs_en_conditions CVWL368.lib(drv_memc.o) + 0x00015dfe 0x00015dfe 0x00000014 Code RO 1995 i.drv_memc_set_inten CVWL368.lib(drv_memc.o) + 0x00015e12 0x00015e12 0x00000002 PAD + 0x00015e14 0x00015e14 0x00000018 Code RO 1996 i.drv_memc_set_lcdc_st_conditions CVWL368.lib(drv_memc.o) + 0x00015e2c 0x00015e2c 0x0000001a Code RO 1997 i.drv_memc_set_ltpo_mode CVWL368.lib(drv_memc.o) + 0x00015e46 0x00015e46 0x0000000e Code RO 2001 i.drv_memc_set_tear_mode CVWL368.lib(drv_memc.o) + 0x00015e54 0x00015e54 0x00000028 Code RO 2002 i.drv_memc_set_tear_waveform CVWL368.lib(drv_memc.o) + 0x00015e7c 0x00015e7c 0x0000000e Code RO 2004 i.drv_memc_set_vidc_sync_cnt CVWL368.lib(drv_memc.o) + 0x00015e8a 0x00015e8a 0x00000002 PAD + 0x00015e8c 0x00015e8c 0x00000008 Code RO 1468 i.drv_param_init_get_ccm CVWL368.lib(drv_param_init.o) + 0x00015e94 0x00015e94 0x00000014 Code RO 1469 i.drv_param_init_get_scld_filter_h CVWL368.lib(drv_param_init.o) + 0x00015ea8 0x00015ea8 0x00000014 Code RO 1470 i.drv_param_init_get_scld_filter_v CVWL368.lib(drv_param_init.o) + 0x00015ebc 0x00015ebc 0x00000008 Code RO 1471 i.drv_param_init_get_sclu_filter CVWL368.lib(drv_param_init.o) + 0x00015ec4 0x00015ec4 0x00000014 Code RO 1472 i.drv_param_init_set_ccm CVWL368.lib(drv_param_init.o) + 0x00015ed8 0x00015ed8 0x00000024 Code RO 1475 i.drv_param_p2r_filter_init CVWL368.lib(drv_param_init.o) + 0x00015efc 0x00015efc 0x00000010 Code RO 2275 i.drv_phy_enable_calibration CVWL368.lib(drv_phy_common.o) + 0x00015f0c 0x00015f0c 0x0000003c Code RO 2276 i.drv_phy_get_calibration CVWL368.lib(drv_phy_common.o) + 0x00015f48 0x00015f48 0x00000060 Code RO 2277 i.drv_phy_get_pll_para CVWL368.lib(drv_phy_common.o) + 0x00015fa8 0x00015fa8 0x00000054 Code RO 2278 i.drv_phy_get_rate_para CVWL368.lib(drv_phy_common.o) + 0x00015ffc 0x00015ffc 0x00000010 Code RO 2279 i.drv_phy_test_clear CVWL368.lib(drv_phy_common.o) + 0x0001600c 0x0001600c 0x00000018 Code RO 2280 i.drv_phy_test_lock CVWL368.lib(drv_phy_common.o) + 0x00016024 0x00016024 0x00000020 Code RO 2282 i.drv_phy_test_write_1_byte CVWL368.lib(drv_phy_common.o) + 0x00016044 0x00016044 0x00000026 Code RO 2283 i.drv_phy_test_write_2_byte CVWL368.lib(drv_phy_common.o) + 0x0001606a 0x0001606a 0x0000001e Code RO 2284 i.drv_phy_test_write_code CVWL368.lib(drv_phy_common.o) + 0x00016088 0x00016088 0x00000020 Code RO 2285 i.drv_phy_test_write_data CVWL368.lib(drv_phy_common.o) + 0x000160a8 0x000160a8 0x00000020 Code RO 1491 i.drv_pwr_set_cp_mode CVWL368.lib(drv_pwr.o) + 0x000160c8 0x000160c8 0x00000018 Code RO 1493 i.drv_pwr_set_pvd_mode CVWL368.lib(drv_pwr.o) + 0x000160e0 0x000160e0 0x00000038 Code RO 1494 i.drv_pwr_set_system_clk_src CVWL368.lib(drv_pwr.o) + 0x00016118 0x00016118 0x0000000c Code RO 1773 i.drv_rx_phy_test_clear CVWL368.lib(drv_dsi_rx.o) + 0x00016124 0x00016124 0x00000010 Code RO 1774 i.drv_rx_phy_test_lock CVWL368.lib(drv_dsi_rx.o) + 0x00016134 0x00016134 0x00000014 Code RO 1776 i.drv_rx_phy_test_write_1_byte CVWL368.lib(drv_dsi_rx.o) + 0x00016148 0x00016148 0x00000016 Code RO 1777 i.drv_rx_phy_test_write_2_byte CVWL368.lib(drv_dsi_rx.o) + 0x0001615e 0x0001615e 0x0000000a Code RO 2040 i.drv_rxbr_clear_pkt_buffer CVWL368.lib(drv_rxbr.o) + 0x00016168 0x00016168 0x00000004 Code RO 2041 i.drv_rxbr_clear_status0 CVWL368.lib(drv_rxbr.o) + 0x0001616c 0x0001616c 0x0000005a Code RO 2043 i.drv_rxbr_enable_irq CVWL368.lib(drv_rxbr.o) + 0x000161c6 0x000161c6 0x00000002 PAD + 0x000161c8 0x000161c8 0x00000014 Code RO 2044 i.drv_rxbr_frame_drop_cfg CVWL368.lib(drv_rxbr.o) + 0x000161dc 0x000161dc 0x00000064 Code RO 2045 i.drv_rxbr_get_clk CVWL368.lib(drv_rxbr.o) + 0x00016240 0x00016240 0x00000004 Code RO 2046 i.drv_rxbr_get_col_addr CVWL368.lib(drv_rxbr.o) + 0x00016244 0x00016244 0x00000012 Code RO 1653 i.drv_rxbr_get_int_source CVWL368.lib(hal_internal_vsync.o) + 0x00016256 0x00016256 0x00000004 Code RO 2049 i.drv_rxbr_get_page_addr CVWL368.lib(drv_rxbr.o) + 0x0001625a 0x0001625a 0x00000012 Code RO 1654 i.drv_rxbr_get_status0 CVWL368.lib(hal_internal_vsync.o) + 0x0001626c 0x0001626c 0x0000000c Code RO 2051 i.drv_rxbr_hline_rcv0_cfg CVWL368.lib(drv_rxbr.o) + 0x00016278 0x00016278 0x00000008 Code RO 2052 i.drv_rxbr_hline_rcv_cfg CVWL368.lib(drv_rxbr.o) + 0x00016280 0x00016280 0x0000000c Code RO 2053 i.drv_rxbr_register_irq0_callback CVWL368.lib(drv_rxbr.o) + 0x0001628c 0x0001628c 0x0000000c Code RO 2054 i.drv_rxbr_register_irq1_callback CVWL368.lib(drv_rxbr.o) + 0x00016298 0x00016298 0x00000014 Code RO 2055 i.drv_rxbr_set_ack_pkt_header CVWL368.lib(drv_rxbr.o) + 0x000162ac 0x000162ac 0x000000cc Code RO 2056 i.drv_rxbr_set_cmd_filter CVWL368.lib(drv_rxbr.o) + 0x00016378 0x00016378 0x00000014 Code RO 2058 i.drv_rxbr_set_color_format CVWL368.lib(drv_rxbr.o) + 0x0001638c 0x0001638c 0x00000014 Code RO 2060 i.drv_rxbr_set_inten CVWL368.lib(drv_rxbr.o) + 0x000163a0 0x000163a0 0x00000010 Code RO 2061 i.drv_rxbr_set_ltpo_drop_th CVWL368.lib(drv_rxbr.o) + 0x000163b0 0x000163b0 0x00000026 Code RO 2063 i.drv_rxbr_set_usr_cfg CVWL368.lib(drv_rxbr.o) + 0x000163d6 0x000163d6 0x00000008 Code RO 2064 i.drv_rxbr_set_usr_col CVWL368.lib(drv_rxbr.o) + 0x000163de 0x000163de 0x00000008 Code RO 2065 i.drv_rxbr_set_usr_row CVWL368.lib(drv_rxbr.o) + 0x000163e6 0x000163e6 0x00000002 PAD + 0x000163e8 0x000163e8 0x00000020 Code RO 1539 i.drv_spi_m_read_data CVWL368.lib(drv_spi_master.o) + 0x00016408 0x00016408 0x0000001c Code RO 1564 i.drv_swire_enable CVWL368.lib(drv_swire.o) + 0x00016424 0x00016424 0x00000054 Code RO 1567 i.drv_swire_set_int CVWL368.lib(drv_swire.o) + 0x00016478 0x00016478 0x0000001c Code RO 1568 i.drv_swire_set_power_down CVWL368.lib(drv_swire.o) + 0x00016494 0x00016494 0x0000000c Code RO 1583 i.drv_sys_cfg_clear_all_int CVWL368.lib(drv_sys_cfg.o) + 0x000164a0 0x000164a0 0x00000028 Code RO 1584 i.drv_sys_cfg_clear_pending CVWL368.lib(drv_sys_cfg.o) + 0x000164c8 0x000164c8 0x00000018 Code RO 1587 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL368.lib(drv_sys_cfg.o) + 0x000164e0 0x000164e0 0x0000001c Code RO 1588 i.drv_sys_cfg_sel_ap_rst_trig CVWL368.lib(drv_sys_cfg.o) + 0x000164fc 0x000164fc 0x00000024 Code RO 1589 i.drv_sys_cfg_sel_gpio_group CVWL368.lib(drv_sys_cfg.o) + 0x00016520 0x00016520 0x00000024 Code RO 1590 i.drv_sys_cfg_sel_int_trig CVWL368.lib(drv_sys_cfg.o) + 0x00016544 0x00016544 0x00000010 Code RO 1592 i.drv_sys_cfg_set_dma_rx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016554 0x00016554 0x00000010 Code RO 1593 i.drv_sys_cfg_set_dma_tx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016564 0x00016564 0x00000024 Code RO 1594 i.drv_sys_cfg_set_int CVWL368.lib(drv_sys_cfg.o) + 0x00016588 0x00016588 0x0000001a Code RO 1617 i.drv_timer_clear_status_flags CVWL368.lib(drv_timer.o) + 0x000165a2 0x000165a2 0x00000020 Code RO 1618 i.drv_timer_enable CVWL368.lib(drv_timer.o) + 0x000165c2 0x000165c2 0x00000002 PAD + 0x000165c4 0x000165c4 0x00000010 Code RO 1619 i.drv_timer_get_instance CVWL368.lib(drv_timer.o) + 0x000165d4 0x000165d4 0x00000010 Code RO 1620 i.drv_timer_get_prescaler CVWL368.lib(drv_timer.o) + 0x000165e4 0x000165e4 0x00000044 Code RO 1622 i.drv_timer_handle_interrupt CVWL368.lib(drv_timer.o) + 0x00016628 0x00016628 0x00000014 Code RO 1623 i.drv_timer_register_callback CVWL368.lib(drv_timer.o) + 0x0001663c 0x0001663c 0x00000010 Code RO 1624 i.drv_timer_set_compare_val CVWL368.lib(drv_timer.o) + 0x0001664c 0x0001664c 0x00000054 Code RO 1625 i.drv_timer_set_int CVWL368.lib(drv_timer.o) + 0x000166a0 0x000166a0 0x00000028 Code RO 1626 i.drv_timer_set_prescaler CVWL368.lib(drv_timer.o) + 0x000166c8 0x000166c8 0x00000010 Code RO 1627 i.drv_timer_set_repeat CVWL368.lib(drv_timer.o) + 0x000166d8 0x000166d8 0x0000000a Code RO 1856 i.drv_tx_phy_test_clear CVWL368.lib(drv_dsi_tx.o) + 0x000166e2 0x000166e2 0x0000001c Code RO 1857 i.drv_tx_phy_test_enter CVWL368.lib(drv_dsi_tx.o) + 0x000166fe 0x000166fe 0x0000001c Code RO 1858 i.drv_tx_phy_test_exit CVWL368.lib(drv_dsi_tx.o) + 0x0001671a 0x0001671a 0x00000012 Code RO 1860 i.drv_tx_phy_test_write_1_byte CVWL368.lib(drv_dsi_tx.o) + 0x0001672c 0x0001672c 0x00000014 Code RO 1861 i.drv_tx_phy_test_write_2_byte CVWL368.lib(drv_dsi_tx.o) + 0x00016740 0x00016740 0x00000010 Code RO 1862 i.drv_tx_phy_test_write_code CVWL368.lib(drv_dsi_tx.o) + 0x00016750 0x00016750 0x00000008 Code RO 2104 i.drv_vidc_clear_irq CVWL368.lib(drv_vidc.o) + 0x00016758 0x00016758 0x00000018 Code RO 2108 i.drv_vidc_enable CVWL368.lib(drv_vidc.o) + 0x00016770 0x00016770 0x00000040 Code RO 2109 i.drv_vidc_enable_irq CVWL368.lib(drv_vidc.o) + 0x000167b0 0x000167b0 0x00000012 Code RO 2111 i.drv_vidc_get_irq_status CVWL368.lib(drv_vidc.o) + 0x000167c2 0x000167c2 0x00000002 PAD + 0x000167c4 0x000167c4 0x00000028 Code RO 2115 i.drv_vidc_init_module_enable CVWL368.lib(drv_vidc.o) + 0x000167ec 0x000167ec 0x0000000c Code RO 2116 i.drv_vidc_register_callback CVWL368.lib(drv_vidc.o) + 0x000167f8 0x000167f8 0x00000006 Code RO 2117 i.drv_vidc_reset CVWL368.lib(drv_vidc.o) + 0x000167fe 0x000167fe 0x0000003c Code RO 2119 i.drv_vidc_set_dst_parameter CVWL368.lib(drv_vidc.o) + 0x0001683a 0x0001683a 0x00000014 Code RO 2123 i.drv_vidc_set_irqen CVWL368.lib(drv_vidc.o) + 0x0001684e 0x0001684e 0x00000010 Code RO 2124 i.drv_vidc_set_mirror CVWL368.lib(drv_vidc.o) + 0x0001685e 0x0001685e 0x00000008 Code RO 2127 i.drv_vidc_set_p2r_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016866 0x00016866 0x00000026 Code RO 2128 i.drv_vidc_set_p2r_hinitb CVWL368.lib(drv_vidc.o) + 0x0001688c 0x0001688c 0x00000026 Code RO 2129 i.drv_vidc_set_p2r_hinitr CVWL368.lib(drv_vidc.o) + 0x000168b2 0x000168b2 0x00000002 PAD + 0x000168b4 0x000168b4 0x00000018 Code RO 2130 i.drv_vidc_set_pentile_swap CVWL368.lib(drv_vidc.o) + 0x000168cc 0x000168cc 0x0000000a Code RO 2131 i.drv_vidc_set_pu_ctrl CVWL368.lib(drv_vidc.o) + 0x000168d6 0x000168d6 0x00000010 Code RO 2132 i.drv_vidc_set_rotation CVWL368.lib(drv_vidc.o) + 0x000168e6 0x000168e6 0x0000000a Code RO 2133 i.drv_vidc_set_scld_hcoef0 CVWL368.lib(drv_vidc.o) + 0x000168f0 0x000168f0 0x0000000a Code RO 2134 i.drv_vidc_set_scld_hcoef1 CVWL368.lib(drv_vidc.o) + 0x000168fa 0x000168fa 0x00000012 Code RO 2135 i.drv_vidc_set_scld_step CVWL368.lib(drv_vidc.o) + 0x0001690c 0x0001690c 0x0000000a Code RO 2136 i.drv_vidc_set_scld_vcoef0 CVWL368.lib(drv_vidc.o) + 0x00016916 0x00016916 0x0000000a Code RO 2137 i.drv_vidc_set_scld_vcoef1 CVWL368.lib(drv_vidc.o) + 0x00016920 0x00016920 0x00000016 Code RO 2138 i.drv_vidc_set_src_parameter CVWL368.lib(drv_vidc.o) + 0x00016936 0x00016936 0x00000002 PAD + 0x00016938 0x00016938 0x00000010 Code RO 2553 i.drv_wdg_clear_counter CVWL368.lib(drv_wdg.o) + 0x00016948 0x00016948 0x00000010 Code RO 2554 i.drv_wdg_clear_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016958 0x00016958 0x00000010 Code RO 2557 i.drv_wdg_read_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016968 0x00016968 0x00000040 Code RO 2560 i.drv_wdg_set_int CVWL368.lib(drv_wdg.o) + 0x000169a8 0x000169a8 0x0000000a Code RO 1251 i.fls_clr_interrupt_flag CVWL368.lib(drv_fls.o) + 0x000169b2 0x000169b2 0x00000014 Code RO 839 i.fputc CVWL368.lib(tau_log.o) + 0x000169c6 0x000169c6 0x00000002 PAD + 0x000169c8 0x000169c8 0x00000034 Code RO 433 i.hal_dsi_rx_ctrl_create_handle CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000169fc 0x000169fc 0x0000009c Code RO 435 i.hal_dsi_rx_ctrl_deinit CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016a98 0x00016a98 0x00000084 Code RO 437 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016b1c 0x00016b1c 0x00000028 Code RO 439 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016b44 0x00016b44 0x00000028 Code RO 441 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016b6c 0x00016b6c 0x00000060 Code RO 443 i.hal_dsi_rx_ctrl_init CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016bcc 0x00016bcc 0x000001a4 Code RO 444 i.hal_dsi_rx_ctrl_init_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016d70 0x00016d70 0x000000d8 Code RO 445 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e48 0x00016e48 0x00000158 Code RO 446 i.hal_dsi_rx_ctrl_init_memc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016fa0 0x00016fa0 0x00000148 Code RO 447 i.hal_dsi_rx_ctrl_init_rxbr CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000170e8 0x000170e8 0x0000022c Code RO 448 i.hal_dsi_rx_ctrl_init_vidc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017314 0x00017314 0x000000f0 Code RO 452 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017404 0x00017404 0x00000034 Code RO 456 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017438 0x00017438 0x00000038 Code RO 460 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017470 0x00017470 0x00000072 Code RO 465 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000174e2 0x000174e2 0x00000002 PAD + 0x000174e4 0x000174e4 0x00000034 Code RO 466 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017518 0x00017518 0x0000000e Code RO 468 i.hal_dsi_rx_ctrl_set_tear_mode_ex CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017526 0x00017526 0x00000002 PAD + 0x00017528 0x00017528 0x0000003c Code RO 469 i.hal_dsi_rx_ctrl_start CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017564 0x00017564 0x0000003c Code RO 470 i.hal_dsi_rx_ctrl_stop CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000175a0 0x000175a0 0x00000020 Code RO 472 i.hal_dsi_rx_ctrl_toggle_resolution CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000175c0 0x000175c0 0x00000190 Code RO 526 i.hal_dsi_tx_calc_video_chunks CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017750 0x00017750 0x00000034 Code RO 527 i.hal_dsi_tx_config_params_for_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017784 0x00017784 0x00000450 Code RO 528 i.hal_dsi_tx_count_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017bd4 0x00017bd4 0x0000002c Code RO 531 i.hal_dsi_tx_ctrl_create_handle CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017c00 0x00017c00 0x00000084 Code RO 532 i.hal_dsi_tx_ctrl_deinit CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017c84 0x00017c84 0x0000004c Code RO 536 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017cd0 0x00017cd0 0x00000028 Code RO 538 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017cf8 0x00017cf8 0x000000a4 Code RO 540 i.hal_dsi_tx_ctrl_init CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017d9c 0x00017d9c 0x00000024 Code RO 541 i.hal_dsi_tx_ctrl_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017dc0 0x00017dc0 0x0000000c Code RO 542 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017dcc 0x00017dcc 0x00000020 Code RO 545 i.hal_dsi_tx_ctrl_set_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017dec 0x00017dec 0x00000014 Code RO 551 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017e00 0x00017e00 0x00000010 Code RO 552 i.hal_dsi_tx_ctrl_set_partial_disp CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017e10 0x00017e10 0x00000024 Code RO 553 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017e34 0x00017e34 0x0000009c Code RO 556 i.hal_dsi_tx_ctrl_start CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017ed0 0x00017ed0 0x00000044 Code RO 557 i.hal_dsi_tx_ctrl_stop CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f14 0x00017f14 0x000000d8 Code RO 558 i.hal_dsi_tx_ctrl_write_array_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017fec 0x00017fec 0x000000b0 Code RO 559 i.hal_dsi_tx_ctrl_write_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001809c 0x0001809c 0x00000044 Code RO 560 i.hal_dsi_tx_init_data_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180e0 0x000180e0 0x00000030 Code RO 561 i.hal_dsi_tx_init_dpi_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018110 0x00018110 0x00000020 Code RO 562 i.hal_dsi_tx_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018130 0x00018130 0x00000020 Code RO 563 i.hal_dsi_tx_init_phy_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018150 0x00018150 0x00000094 Code RO 564 i.hal_dsi_tx_init_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181e4 0x000181e4 0x00000058 Code RO 565 i.hal_dsi_tx_init_video_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001823c 0x0001823c 0x00000044 Code RO 566 i.hal_dsi_tx_send_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018280 0x00018280 0x00000018 Code RO 631 i.hal_gpio_ctrl_eint CVWL368.lib(hal_gpio.o) + 0x00018298 0x00018298 0x00000012 Code RO 632 i.hal_gpio_get_input_data CVWL368.lib(hal_gpio.o) + 0x000182aa 0x000182aa 0x00000002 PAD + 0x000182ac 0x000182ac 0x00000040 Code RO 635 i.hal_gpio_init_eint CVWL368.lib(hal_gpio.o) + 0x000182ec 0x000182ec 0x00000020 Code RO 636 i.hal_gpio_init_input CVWL368.lib(hal_gpio.o) + 0x0001830c 0x0001830c 0x00000028 Code RO 637 i.hal_gpio_init_output CVWL368.lib(hal_gpio.o) + 0x00018334 0x00018334 0x00000018 Code RO 638 i.hal_gpio_reg_eint_cb CVWL368.lib(hal_gpio.o) + 0x0001834c 0x0001834c 0x00000050 Code RO 639 i.hal_gpio_set_ap_reset_int CVWL368.lib(hal_gpio.o) + 0x0001839c 0x0001839c 0x00000060 Code RO 641 i.hal_gpio_set_mode CVWL368.lib(hal_gpio.o) + 0x000183fc 0x000183fc 0x00000008 Code RO 642 i.hal_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x00018404 0x00018404 0x00000020 Code RO 644 i.hal_gpio_set_pull_state CVWL368.lib(hal_gpio.o) + 0x00018424 0x00018424 0x0000006c Code RO 670 i.hal_i2c_m_dma_init CVWL368.lib(hal_i2c_master.o) + 0x00018490 0x00018490 0x00000020 Code RO 671 i.hal_i2c_m_dma_read CVWL368.lib(hal_i2c_master.o) + 0x000184b0 0x000184b0 0x0000001c Code RO 672 i.hal_i2c_m_dma_write CVWL368.lib(hal_i2c_master.o) + 0x000184cc 0x000184cc 0x0000000c Code RO 674 i.hal_i2c_m_transfer_complate CVWL368.lib(hal_i2c_master.o) + 0x000184d8 0x000184d8 0x00000020 Code RO 675 i.hal_i2c_master_irq_callback CVWL368.lib(hal_i2c_master.o) + 0x000184f8 0x000184f8 0x00000010 Code RO 689 i.hal_i2c_s_dma_user_callback CVWL368.lib(hal_i2c_slave.o) + 0x00018508 0x00018508 0x0000004c Code RO 690 i.hal_i2c_s_dma_write CVWL368.lib(hal_i2c_slave.o) + 0x00018554 0x00018554 0x000000c8 Code RO 692 i.hal_i2c_s_init CVWL368.lib(hal_i2c_slave.o) + 0x0001861c 0x0001861c 0x00000014 Code RO 693 i.hal_i2c_s_nonblocking_read CVWL368.lib(hal_i2c_slave.o) + 0x00018630 0x00018630 0x0000000c Code RO 701 i.hal_i2c_s_set_transfer CVWL368.lib(hal_i2c_slave.o) + 0x0001863c 0x0001863c 0x00000174 Code RO 704 i.hal_i2c_slave_irq_callback CVWL368.lib(hal_i2c_slave.o) + 0x000187b0 0x000187b0 0x000000fc Code RO 1655 i.hal_internal_init_memc CVWL368.lib(hal_internal_vsync.o) + 0x000188ac 0x000188ac 0x00000010 Code RO 1657 i.hal_internal_sync_get_fb_setting CVWL368.lib(hal_internal_vsync.o) + 0x000188bc 0x000188bc 0x00000010 Code RO 1658 i.hal_internal_sync_get_hight_performan_mode CVWL368.lib(hal_internal_vsync.o) + 0x000188cc 0x000188cc 0x0000022c Code RO 1659 i.hal_internal_sync_input_resolution_change CVWL368.lib(hal_internal_vsync.o) + 0x00018af8 0x00018af8 0x00000010 Code RO 1662 i.hal_internal_update_dpi_param CVWL368.lib(hal_internal_vsync.o) + 0x00018b08 0x00018b08 0x0000010c Code RO 1663 i.hal_internal_video_mode_auto_sync CVWL368.lib(hal_internal_vsync.o) + 0x00018c14 0x00018c14 0x00000028 Code RO 1664 i.hal_internal_vsync_deinit CVWL368.lib(hal_internal_vsync.o) + 0x00018c3c 0x00018c3c 0x0000000c Code RO 1665 i.hal_internal_vsync_get_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018c48 0x00018c48 0x00000018 Code RO 1666 i.hal_internal_vsync_get_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00018c60 0x00018c60 0x0000000c Code RO 1667 i.hal_internal_vsync_get_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x00018c6c 0x00018c6c 0x0000000c Code RO 1668 i.hal_internal_vsync_get_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018c78 0x00018c78 0x00000118 Code RO 1669 i.hal_internal_vsync_init_rx CVWL368.lib(hal_internal_vsync.o) + 0x00018d90 0x00018d90 0x000000b0 Code RO 1670 i.hal_internal_vsync_init_tx CVWL368.lib(hal_internal_vsync.o) + 0x00018e40 0x00018e40 0x0000011c Code RO 1671 i.hal_internal_vsync_set_auto_hw_filter CVWL368.lib(hal_internal_vsync.o) + 0x00018f5c 0x00018f5c 0x00000014 Code RO 1673 i.hal_internal_vsync_set_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018f70 0x00018f70 0x00000024 Code RO 1674 i.hal_internal_vsync_set_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00018f94 0x00018f94 0x00000050 Code RO 1675 i.hal_internal_vsync_set_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x00018fe4 0x00018fe4 0x00000080 Code RO 1676 i.hal_internal_vsync_set_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00019064 0x00019064 0x00000024 Code RO 567 i.hal_lcdc_config_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019088 0x00019088 0x00000058 Code RO 568 i.hal_lcdc_config_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000190e0 0x000190e0 0x00000014 Code RO 569 i.hal_lcdc_config_rgb_to_pentile CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000190f4 0x000190f4 0x00000164 Code RO 570 i.hal_lcdc_config_upscaler CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019258 0x00019258 0x00000040 Code RO 571 i.hal_lcdc_init_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019298 0x00019298 0x000001b0 Code RO 572 i.hal_lcdc_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019448 0x00019448 0x00000040 Code RO 573 i.hal_lcdc_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019488 0x00019488 0x0000000e Code RO 729 i.hal_spi_m_clear_rxfifo CVWL368.lib(hal_spi_master.o) + 0x00019496 0x00019496 0x00000012 Code RO 753 i.hal_swire_deinit CVWL368.lib(hal_swire.o) + 0x000194a8 0x000194a8 0x00000016 Code RO 755 i.hal_swire_open CVWL368.lib(hal_swire.o) + 0x000194be 0x000194be 0x00000008 Code RO 770 i.hal_system_enable_systick CVWL368.lib(hal_system.o) + 0x000194c6 0x000194c6 0x00000002 PAD + 0x000194c8 0x000194c8 0x00000088 Code RO 778 i.hal_system_init CVWL368.lib(hal_system.o) + 0x00019550 0x00019550 0x0000001c Code RO 779 i.hal_system_init_console CVWL368.lib(hal_system.o) + 0x0001956c 0x0001956c 0x00000008 Code RO 782 i.hal_system_set_phy_calibration CVWL368.lib(hal_system.o) + 0x00019574 0x00019574 0x00000008 Code RO 783 i.hal_system_set_pvd CVWL368.lib(hal_system.o) + 0x0001957c 0x0001957c 0x00000008 Code RO 784 i.hal_system_set_vcc CVWL368.lib(hal_system.o) + 0x00019584 0x00019584 0x0000002e Code RO 811 i.hal_timer_deinit CVWL368.lib(hal_timer.o) + 0x000195b2 0x000195b2 0x0000001a Code RO 813 i.hal_timer_init CVWL368.lib(hal_timer.o) + 0x000195cc 0x000195cc 0x00000048 Code RO 815 i.hal_timer_start CVWL368.lib(hal_timer.o) + 0x00019614 0x00019614 0x00000028 Code RO 817 i.hal_timer_stop CVWL368.lib(hal_timer.o) + 0x0001963c 0x0001963c 0x0000008c Code RO 976 i.hal_uart_init CVWL368.lib(hal_uart.o) + 0x000196c8 0x000196c8 0x00000010 Code RO 979 i.hal_uart_transmit_blocking CVWL368.lib(hal_uart.o) + 0x000196d8 0x000196d8 0x00000110 Code RO 2214 i.handle_init CVWL368.lib(irq_redirect .o) + 0x000197e8 0x000197e8 0x00000070 Code RO 112 i.init_mipi_tx ap_demo.o + 0x00019858 0x00019858 0x000000bc Code RO 113 i.init_panel ap_demo.o + 0x00019914 0x00019914 0x0000000a Code RO 3 i.main main.o + 0x0001991e 0x0001991e 0x00000002 PAD + 0x00019920 0x00019920 0x00000088 Code RO 114 i.open_mipi_rx ap_demo.o + 0x000199a8 0x000199a8 0x00000068 Code RO 115 i.pps_update_handle ap_demo.o + 0x00019a10 0x00019a10 0x000003f4 Code RO 1680 i.rx_get_dcs_packet_data CVWL368.lib(hal_internal_vsync.o) + 0x00019e04 0x00019e04 0x00000178 Code RO 1681 i.rx_partial_update CVWL368.lib(hal_internal_vsync.o) + 0x00019f7c 0x00019f7c 0x0000008c Code RO 1682 i.rx_receive_packet CVWL368.lib(hal_internal_vsync.o) + 0x0001a008 0x0001a008 0x00000180 Code RO 1683 i.rx_receive_pps CVWL368.lib(hal_internal_vsync.o) + 0x0001a188 0x0001a188 0x000000a4 Code RO 1684 i.rxbr_irq0_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a22c 0x0001a22c 0x000001d4 Code RO 1685 i.rxbr_irq1_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a400 0x0001a400 0x00000090 Code RO 116 i.set_tear_on ap_demo.o + 0x0001a490 0x0001a490 0x000000c4 Code RO 1686 i.soft_gen_te CVWL368.lib(hal_internal_vsync.o) + 0x0001a554 0x0001a554 0x000000c0 Code RO 1687 i.soft_gen_te_double_buffer CVWL368.lib(hal_internal_vsync.o) + 0x0001a614 0x0001a614 0x0000004c Code RO 117 i.soft_timer3_cb ap_demo.o + 0x0001a660 0x0001a660 0x00000048 Code RO 2580 i.sqrt m_ps.l(sqrt.o) + 0x0001a6a8 0x0001a6a8 0x00000108 Code RO 1688 i.vidc_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a7b0 0x0001a7b0 0x000000d0 Code RO 1689 i.vpre_err_reset CVWL368.lib(hal_internal_vsync.o) + 0x0001a880 0x0001a880 0x000001cc Code RO 1690 i.vsync_set_te_mode CVWL368.lib(hal_internal_vsync.o) + 0x0001aa4c 0x0001aa4c 0x00002767 Data RO 119 .constdata ap_demo.o + 0x0001d1b3 0x0001d1b3 0x00000001 PAD + 0x0001d1b4 0x0001d1b4 0x00000024 Data RO 575 .constdata CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001d1d8 0x0001d1d8 0x000000d2 Data RO 647 .constdata CVWL368.lib(hal_gpio.o) + 0x0001d2aa 0x0001d2aa 0x00000002 PAD + 0x0001d2ac 0x0001d2ac 0x00000020 Data RO 705 .constdata CVWL368.lib(hal_i2c_slave.o) + 0x0001d2cc 0x0001d2cc 0x00001fee Data RO 852 .constdata WL368_NOTE20_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x0001f2ba 0x0001f2ba 0x00000001 Data RO 867 .constdata WL368_NOTE20_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x0001f2bb 0x0001f2bb 0x00000001 PAD + 0x0001f2bc 0x0001f2bc 0x00000008 Data RO 1476 .constdata CVWL368.lib(drv_param_init.o) + 0x0001f2c4 0x0001f2c4 0x00000186 Data RO 2286 .constdata CVWL368.lib(drv_phy_common.o) + 0x0001f44a 0x0001f44a 0x00000002 PAD + 0x0001f44c 0x0001f44c 0x00000048 Data RO 475 .conststring CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001f494 0x0001f494 0x00000043 Data RO 576 .conststring CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001f4d7 0x0001f4d7 0x00000001 PAD + 0x0001f4d8 0x0001f4d8 0x00000134 Data RO 1692 .conststring CVWL368.lib(hal_internal_vsync.o) + 0x0001f60c 0x0001f60c 0x00000030 Data RO 2942 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001f63c, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001f63c, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2215 .ARM.__AT_0x00070100 CVWL368.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001f63c, Size: 0x00003738, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x000003f0]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x00000028 Data RW 120 .data ap_demo.o + 0x000701f8 COMPRESSED 0x0000002e Data RW 279 .data app_tp_transfer.o + 0x00070226 COMPRESSED 0x00000002 PAD + 0x00070228 COMPRESSED 0x00000008 Data RW 476 .data CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00070230 COMPRESSED 0x00000003 Data RW 577 .data CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00070233 COMPRESSED 0x00000001 Data RW 676 .data CVWL368.lib(hal_i2c_master.o) + 0x00070234 COMPRESSED 0x00000020 Data RW 706 .data CVWL368.lib(hal_i2c_slave.o) + 0x00070254 COMPRESSED 0x0000010c Data RW 868 .data WL368_NOTE20_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00070360 COMPRESSED 0x00000001 Data RW 871 .data WL368_NOTE20_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00070361 COMPRESSED 0x00000001 Data RW 872 .data WL368_NOTE20_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00070362 COMPRESSED 0x00000001 Data RW 877 .data WL368_NOTE20_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00070363 COMPRESSED 0x00000003 Data RW 878 .data WL368_NOTE20_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00070366 COMPRESSED 0x00000005 Data RW 879 .data WL368_NOTE20_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x0007036b COMPRESSED 0x00000001 PAD + 0x0007036c COMPRESSED 0x00000030 Data RW 890 .data WL368_NOTE20_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x0007039c COMPRESSED 0x00000012 Data RW 1033 .data CVWL368.lib(norflash.o) + 0x000703ae COMPRESSED 0x00000002 PAD + 0x000703b0 COMPRESSED 0x0000000c Data RW 1087 .data CVWL368.lib(drv_common.o) + 0x000703bc COMPRESSED 0x00000004 Data RW 1354 .data CVWL368.lib(drv_gpio.o) + 0x000703c0 COMPRESSED 0x00000008 Data RW 1392 .data CVWL368.lib(drv_i2c_dma.o) + 0x000703c8 COMPRESSED 0x00000004 Data RW 1421 .data CVWL368.lib(drv_i2c_master.o) + 0x000703cc COMPRESSED 0x00000004 Data RW 1452 .data CVWL368.lib(drv_i2c_slave.o) + 0x000703d0 COMPRESSED 0x000004a4 Data RW 1477 .data CVWL368.lib(drv_param_init.o) + 0x00070874 COMPRESSED 0x00000004 Data RW 1544 .data CVWL368.lib(drv_spi_master.o) + 0x00070878 COMPRESSED 0x00000008 Data RW 1570 .data CVWL368.lib(drv_swire.o) + 0x00070880 COMPRESSED 0x00000001 Data RW 1595 .data CVWL368.lib(drv_sys_cfg.o) + 0x00070881 COMPRESSED 0x00000003 PAD + 0x00070884 COMPRESSED 0x00000050 Data RW 1628 .data CVWL368.lib(drv_timer.o) + 0x000708d4 COMPRESSED 0x0000000c Data RW 1693 .data CVWL368.lib(hal_internal_vsync.o) + 0x000708e0 COMPRESSED 0x00000008 Data RW 2067 .data CVWL368.lib(drv_rxbr.o) + 0x000708e8 COMPRESSED 0x00000004 Data RW 2140 .data CVWL368.lib(drv_vidc.o) + 0x000708ec COMPRESSED 0x00000001 Data RW 2287 .data CVWL368.lib(drv_phy_common.o) + 0x000708ed COMPRESSED 0x00000003 PAD + 0x000708f0 COMPRESSED 0x0000000c Data RW 2307 .data CVWL368.lib(drv_chip_info.o) + 0x000708fc COMPRESSED 0x0000000c Data RW 2417 .data CVWL368.lib(drv_pwm.o) + 0x00070908 COMPRESSED 0x00000008 Data RW 2495 .data CVWL368.lib(drv_uart.o) + 0x00070910 COMPRESSED 0x0000000c Data RW 2562 .data CVWL368.lib(drv_wdg.o) + 0x0007091c COMPRESSED 0x00000004 Data RW 2911 .data mc_p.l(stdout.o) + 0x00070920 COMPRESSED 0x00000004 Data RW 2923 .data mc_p.l(errno.o) + 0x00070924 - 0x00000190 Zero RW 278 .bss app_tp_transfer.o + 0x00070ab4 - 0x000000c4 Zero RW 474 .bss CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00070b78 - 0x0000004c Zero RW 574 .bss CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00070bc4 - 0x00000100 Zero RW 840 .bss CVWL368.lib(tau_log.o) + 0x00070cc4 - 0x000000d0 Zero RW 981 .bss CVWL368.lib(hal_uart.o) + 0x00070d94 - 0x0000001c Zero RW 1216 .bss CVWL368.lib(drv_dma.o) + 0x00070db0 - 0x00000040 Zero RW 1353 .bss CVWL368.lib(drv_gpio.o) + 0x00070df0 - 0x00000140 Zero RW 1391 .bss CVWL368.lib(drv_i2c_dma.o) + 0x00070f30 - 0x00000984 Zero RW 1691 .bss CVWL368.lib(hal_internal_vsync.o) + 0x000718b4 - 0x00001030 Zero RW 1744 .bss CVWL368.lib(dcs_packet_fifo.o) + 0x000728e4 - 0x00000020 Zero RW 2351 .bss CVWL368.lib(hal_spi_slave.o) + 0x00072904 COMPRESSED 0x00000004 PAD + 0x00072908 - 0x00001000 Zero RW 422 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 3474 856 10087 40 0 35549 ap_demo.o + 1108 116 0 46 400 13662 app_tp_transfer.o + 36 6 0 0 0 525 board.o + 10 0 0 0 0 5679 main.o + 120 18 192 0 4096 2108 startup_armcm0.o + + ---------------------------------------------------------------------- + 4752 996 10328 88 4496 57523 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 4 0 1 2 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 272 96 0 12 0 256 drv_chip_info.o + 192 82 24 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 410 28 0 0 28 796 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1644 494 0 0 0 1336 drv_dsi_rx.o + 1528 118 0 0 0 2428 drv_dsi_tx.o + 132 0 0 0 0 256 drv_efuse.o + 10 0 0 0 0 60 drv_fls.o + 796 112 0 4 64 1236 drv_gpio.o + 600 82 0 8 320 624 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 292 36 0 4 0 580 drv_i2c_slave.o + 680 6 0 0 0 1444 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 112 36 8 1188 0 376 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 72 10 0 12 0 76 drv_pwm.o + 112 24 0 0 0 180 drv_pwr.o + 722 84 0 8 0 1456 drv_rxbr.o + 104 24 0 4 0 188 drv_spi_master.o + 172 20 0 8 0 260 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 374 34 0 80 0 932 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 168 22 0 12 0 316 drv_wdg.o + 3086 300 72 8 196 1528 hal_dsi_rx_ctrl.o + 4324 302 103 3 76 2408 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 696 72 32 32 0 408 hal_i2c_slave.o + 8032 1706 308 12 2436 2616 hal_internal_vsync.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 40 0 0 0 0 136 hal_swire.o + 196 32 0 0 0 408 hal_system.o + 184 6 0 0 0 276 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 1940 72 8175 327 0 19731 app_tp_for_custom_s8.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 38628 4890 9328 1788 7956 54407 Library Totals + 48 0 6 9 4 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 31260 4612 1147 1444 7952 31400 CVWL368.lib + 1940 72 8175 327 0 19731 WL368_NOTE20_CSOT667_TP.lib + 272 26 0 0 0 152 m_ps.l + 2838 126 0 8 0 1264 mc_p.l + 2270 54 0 0 0 1860 mf_p.l + + ---------------------------------------------------------------------- + 38628 4890 9328 1788 7956 54407 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 43380 5886 19656 1876 12452 87974 Grand Totals + 43380 5886 19656 1008 12452 87974 ELF Image Totals (compressed) + 43380 5886 19656 1008 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 63036 ( 61.56kB) + Total RW Size (RW Data + ZI Data) 14328 ( 13.99kB) + Total ROM Size (Code + RO Data + RW Data) 64044 ( 62.54kB) + +============================================================================== + diff --git a/project/ISP_368/Listings/ap_demo.txt b/project/ISP_368/Listings/ap_demo.txt new file mode 100644 index 0000000..f0f5639 --- /dev/null +++ b/project/ISP_368/Listings/ap_demo.txt @@ -0,0 +1,5661 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\ap_demo.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\ap_demo.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL368 -I.\RTE\_ISP_368 -IC:\Users\ASUS\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Users\ASUS\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_368 --omf_browse=.\objects\ap_demo.crf ..\..\src\app\demo\ap_demo.c] + THUMB + + AREA ||i.Gpio_swire_output||, CODE, READONLY, ALIGN=1 + + Gpio_swire_output PROC +;;;514 *****************************************************************************/ +;;;515 void Gpio_swire_output(uint8_t flag, uint8_t num) +000000 b570 PUSH {r4-r6,lr} +;;;516 { +000002 460d MOV r5,r1 +;;;517 uint8_t ii; +;;;518 +;;;519 if (flag) +000004 2800 CMP r0,#0 +000006 d01d BEQ |L1.68| +;;;520 { +;;;521 if (flag ==2) +000008 2802 CMP r0,#2 +00000a d106 BNE |L1.26| +;;;522 { +;;;523 hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_HIGH); +00000c 2101 MOVS r1,#1 +00000e 2014 MOVS r0,#0x14 +000010 f7fffffe BL hal_gpio_init_output +;;;524 delayMs(2); +000014 2002 MOVS r0,#2 +000016 f7fffffe BL delayMs + |L1.26| +;;;525 } +;;;526 for (ii =0; ii< num; ii++) +00001a 2400 MOVS r4,#0 +00001c e00f B |L1.62| + |L1.30| +;;;527 { +;;;528 hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_LOW); +00001e 2100 MOVS r1,#0 +000020 2014 MOVS r0,#0x14 +000022 f7fffffe BL hal_gpio_set_output_data +;;;529 delayUs(10); +000026 200a MOVS r0,#0xa +000028 f7fffffe BL delayUs +;;;530 hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); +00002c 2101 MOVS r1,#1 +00002e 2014 MOVS r0,#0x14 +000030 f7fffffe BL hal_gpio_set_output_data +;;;531 delayUs(9); +000034 2009 MOVS r0,#9 +000036 f7fffffe BL delayUs +00003a 1c64 ADDS r4,r4,#1 +00003c b2e4 UXTB r4,r4 ;526 + |L1.62| +00003e 42ac CMP r4,r5 ;526 +000040 d3ed BCC |L1.30| +;;;532 } +;;;533 } +;;;534 else +;;;535 { +;;;536 hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW); +;;;537 } +;;;538 } +000042 bd70 POP {r4-r6,pc} + |L1.68| +000044 2100 MOVS r1,#0 ;536 +000046 2014 MOVS r0,#0x14 ;536 +000048 f7fffffe BL hal_gpio_init_output +00004c bd70 POP {r4-r6,pc} +;;;539 + ENDP + + + AREA ||i.ap_dcs_read||, CODE, READONLY, ALIGN=2 + + ap_dcs_read PROC +;;;168 +;;;169 static bool ap_dcs_read(uint8_t data_type, uint8_t dcs_cmd, uint8_t param) +000000 b5f0 PUSH {r4-r7,lr} +;;;170 { +;;;171 uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); +000002 4cff LDR r4,|L2.1024| +000004 b0a9 SUB sp,sp,#0xa4 ;170 +000006 460d MOV r5,r1 ;170 +000008 69e0 LDR r0,[r4,#0x1c] ; g_rx_ctrl_handle +00000a f7fffffe BL hal_dsi_rx_ctrl_get_max_ret_size +;;;172 // TAU_LOGD("r %x len=%d", dcs_cmd, return_size); +;;;173 +;;;174 if (dcs_cmd == 0xDA) +;;;175 { +;;;176 g_power_on_flag = true; +;;;177 if(panel_display_done==false) +;;;178 phone_DisplayOFF_flag=1; +;;;179 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +00000e 2181 MOVS r1,#0x81 +000010 2701 MOVS r7,#1 ;176 +000012 4606 MOV r6,r0 ;171 +000014 2dda CMP r5,#0xda ;174 +000016 d02d BEQ |L2.116| +000018 2000 MOVS r0,#0 ;174 +;;;180 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;181 DSI_VC_0, +;;;182 1, 0x81); +;;;183 } +;;;184 else if (dcs_cmd == 0xDB) +00001a 2ddb CMP r5,#0xdb +00001c d031 BEQ |L2.130| +;;;185 { +;;;186 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;187 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;188 DSI_VC_0, +;;;189 1, 0x00); +;;;190 } +;;;191 else if (dcs_cmd == 0xDC) +;;;192 { +;;;193 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +00001e 2204 MOVS r2,#4 +000020 2ddc CMP r5,#0xdc ;191 +000022 d030 BEQ |L2.134| +;;;194 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;195 DSI_VC_0, +;;;196 1, 0x04); +;;;197 } +;;;198 +;;;199 else if (dcs_cmd == 0x0A) +000024 2d0a CMP r5,#0xa +000026 d036 BEQ |L2.150| +;;;200 { +;;;201 static uint8_t cmd_0a_flag = 0; +;;;202 if (cmd_0a_flag == 0) +;;;203 { +;;;204 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;205 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;206 DSI_VC_0, +;;;207 1, 0x00); +;;;208 cmd_0a_flag = 1; +;;;209 } +;;;210 else +;;;211 { +;;;212 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;213 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;214 DSI_VC_0, +;;;215 1, 0x9f); +;;;216 } +;;;217 } +;;;218 else if (dcs_cmd == 0x0E) +000028 2d0e CMP r5,#0xe +00002a d042 BEQ |L2.178| +;;;219 { +;;;220 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;221 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;222 DSI_VC_0, +;;;223 1, 0x80); +;;;224 } +;;;225 else if (dcs_cmd == 0xEE) +00002c 2dee CMP r5,#0xee +00002e d028 BEQ |L2.130| +;;;226 { +;;;227 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;228 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;229 DSI_VC_0, +;;;230 1, 0x00); +;;;231 } +;;;232 else if (dcs_cmd == 0x05) +000030 2d05 CMP r5,#5 +000032 d026 BEQ |L2.130| +;;;233 { +;;;234 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;235 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;236 DSI_VC_0, +;;;237 1, 0x00); +;;;238 } +;;;239 else if (dcs_cmd == 0x04) +000034 2d04 CMP r5,#4 +000036 d03e BEQ |L2.182| +;;;240 { +;;;241 g_power_on_flag = true; +;;;242 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;243 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;244 DSI_VC_0, +;;;245 3, 0x81,0x00,0x04); +;;;246 } +;;;247 else if (dcs_cmd == 0x5A) +000038 2d5a CMP r5,#0x5a +00003a d047 BEQ |L2.204| +;;;248 { +;;;249 uint8_t flag_5a = 0; +;;;250 if (flag_5a == 0) +;;;251 { +;;;252 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;253 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;254 DSI_VC_0, +;;;255 41, +;;;256 0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;257 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;258 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); +;;;259 flag_5a = 1; +;;;260 } +;;;261 else +;;;262 { +;;;263 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;264 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;265 DSI_VC_0, +;;;266 41, +;;;267 0x01,0x00,0x02,0x01,0x34,0x01,0x34,0x00,0x03,0x01,0x28,0x00,0x3C,0x00,0x61,0x00, +;;;268 0x96,0x00,0x3F,0x00,0x74,0x00,0x87,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;269 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); +;;;270 flag_5a = 0; +;;;271 } +;;;272 } +;;;273 else if (dcs_cmd == 0x0F) +;;;274 { +;;;275 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +00003c 21c0 MOVS r1,#0xc0 +00003e 2d0f CMP r5,#0xf ;273 +000040 d01d BEQ |L2.126| +;;;276 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;277 DSI_VC_0, +;;;278 1, 0xC0); +;;;279 } +;;;280 else if (dcs_cmd == 0xA1) +;;;281 { +;;;282 if (return_size == 8) +;;;283 { +;;;284 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;285 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;286 DSI_VC_0, +;;;287 8, +;;;288 0x0B,0xF0,0x0C,0x8F,0x99,0x05,0x04,0x39); +;;;289 } +;;;290 else if (return_size == 7) // +;;;291 { +;;;292 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;293 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;294 DSI_VC_0, +;;;295 7, +;;;296 0x97,0x15,0x14,0x1E,0x25,0x26,0x41); //N981B/DS +;;;297 } +;;;298 else if (return_size == 10) +;;;299 { +;;;300 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;301 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;302 DSI_VC_0, +;;;303 10, +;;;304 0x0B,0xF0,0x0C,0x8F,0x99,0x05,0x04,0x39,0x09,0x02); +;;;305 } +;;;306 else if (return_size == 20) // +;;;307 { +;;;308 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000042 2335 MOVS r3,#0x35 +000044 2da1 CMP r5,#0xa1 ;280 +000046 d077 BEQ |L2.312| +;;;309 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;310 DSI_VC_0, +;;;311 20, +;;;312 0x30,0x01,0x01,0xA6,0x41,0x33,0x55,0x4D,0x35,0x53,0x30,0x36,0x39,0x32,0x43,0x41, +;;;313 0x51,0x30,0x33,0x35); //N981B/DS +;;;314 } +;;;315 else if (return_size == 24) +;;;316 { +;;;317 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;318 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;319 DSI_VC_0, +;;;320 24, +;;;321 0x0B,0xF0,0x0C,0x8F,0x99,0x05,0x04,0x39,0x09,0x02,0x57,0x30,0x01,0x01,0xA4,0x41, +;;;322 0x33,0x55,0x4D,0x36,0x53,0x30,0x38,0x31); +;;;323 } +;;;324 else if (return_size == 31) +;;;325 { +;;;326 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;327 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;328 DSI_VC_0, +;;;329 24, +;;;330 0x0B,0xF0,0x0C,0x8F,0x99,0x05,0x04,0x39,0x09,0x02,0x57,0x30,0x01,0x01,0xA4,0x41, +;;;331 0x33,0x55,0x4D,0x36,0x53,0x30,0x38,0x31,0x30,0x4B,0x42,0x4C,0x30,0x39,0x38); +;;;332 } +;;;333 else if (return_size == 4) +;;;334 { +;;;335 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;336 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;337 DSI_VC_0, +;;;338 4, +;;;339 // 0x0B,0xF0,0x0C,0x8F); +;;;340 0x0B,0xF0,0x0C,0x95); //G981B/DS +;;;341 } +;;;342 else if (return_size == 11) +;;;343 { +;;;344 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;345 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;346 DSI_VC_0, +;;;347 11, +;;;348 0x0B,0xF0,0x0C,0x8F,0x99,0x05,0x04,0x39,0x09,0x02,0x57); +;;;349 } +;;;350 else +;;;351 { +;;;352 TAU_LOGD("r[%x] [%d] err!", dcs_cmd, return_size); +;;;353 } +;;;354 } +;;;355 else if (dcs_cmd == 0xD6) +000048 2dd6 CMP r5,#0xd6 +00004a d071 BEQ |L2.304| +;;;356 { +;;;357 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;358 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;359 DSI_VC_0, +;;;360 5, +;;;361 // 0x90,0x19,0x37,0x81,0x21); +;;;362 0x83,0xC0,0x35,0x99,0xB4); //G981B/DS +;;;363 } +;;;364 else if (dcs_cmd == 0xD6) +;;;365 { +;;;366 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;367 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;368 DSI_VC_0, +;;;369 5, +;;;370 // 0x90,0x19,0x37,0x81,0x21); +;;;371 0x83,0xC0,0x35,0x99,0xB4); //G981B/DS +;;;372 } +;;;373 else if (dcs_cmd == 0xB5) +00004c 2db5 CMP r5,#0xb5 +00004e d070 BEQ |L2.306| +;;;374 { +;;;375 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;376 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;377 DSI_VC_0, +;;;378 1, 0x13); //G981B/DS +;;;379 } +;;;380 else if (dcs_cmd == 0xB7) +000050 2db7 CMP r5,#0xb7 +000052 d06f BEQ |L2.308| +;;;381 { +;;;382 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;383 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;384 DSI_VC_0, +;;;385 10, +;;;386 0x2A,0x56,0x4D,0x8A,0x2A,0x56,0x4D,0x8A,0x00,0x60); +;;;387 } +;;;388 else if (dcs_cmd == 0x7F) +000054 2d7f CMP r5,#0x7f +000056 d06e BEQ |L2.310| +;;;389 { +;;;390 if (return_size == 10) +;;;391 { +;;;392 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;393 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;394 DSI_VC_0, +;;;395 10, +;;;396 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); +;;;397 } +;;;398 else if (return_size == 24) +;;;399 { +;;;400 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;401 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;402 DSI_VC_0, +;;;403 24, +;;;404 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;405 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); +;;;406 } +;;;407 else if (return_size == 33) +;;;408 { +;;;409 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +;;;410 DSI_ACK_DT_DSC_LONG_RESPONSE, +;;;411 DSI_VC_0, +;;;412 33, +;;;413 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;414 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;415 0x00); +;;;416 } +;;;417 else +;;;418 { +;;;419 TAU_LOGD("r[%x] [%d] err!!!!!!", dcs_cmd, return_size); +;;;420 } +;;;421 } +;;;422 else +;;;423 { +;;;424 hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, +000058 9000 STR r0,[sp,#0] +00005a 2301 MOVS r3,#1 +00005c 2200 MOVS r2,#0 +00005e 2121 MOVS r1,#0x21 +000060 69e0 LDR r0,[r4,#0x1c] ; g_rx_ctrl_handle +000062 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +;;;425 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, +;;;426 DSI_VC_0, +;;;427 1, 0); +;;;428 TAU_LOGD("r[%x] [%d] err!", dcs_cmd, return_size); +000066 22ff MOVS r2,#0xff +000068 462b MOV r3,r5 +00006a 32ad ADDS r2,r2,#0xad +00006c 9600 STR r6,[sp,#0] + |L2.110| +00006e a1e5 ADR r1,|L2.1028| +000070 a0e7 ADR r0,|L2.1040| +000072 e191 B |L2.920| + |L2.116| +000074 7127 STRB r7,[r4,#4] ;176 +000076 79a0 LDRB r0,[r4,#6] ;177 ; panel_display_done +000078 2800 CMP r0,#0 ;177 +00007a d100 BNE |L2.126| +00007c 7267 STRB r7,[r4,#9] ;178 + |L2.126| +00007e 9100 STR r1,[sp,#0] ;179 +000080 e002 B |L2.136| + |L2.130| +000082 9000 STR r0,[sp,#0] ;186 +000084 e000 B |L2.136| + |L2.134| +000086 9200 STR r2,[sp,#0] ;193 + |L2.136| +000088 2301 MOVS r3,#1 ;375 +00008a 2200 MOVS r2,#0 ;375 +00008c 2121 MOVS r1,#0x21 ;375 +00008e 69e0 LDR r0,[r4,#0x1c] ;375 ; g_rx_ctrl_handle +000090 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000094 e203 B |L2.1182| + |L2.150| +000096 7ba1 LDRB r1,[r4,#0xe] ;202 ; cmd_0a_flag +000098 2900 CMP r1,#0 ;202 +00009a d001 BEQ |L2.160| +00009c 209f MOVS r0,#0x9f ;212 +00009e e7f0 B |L2.130| + |L2.160| +0000a0 9000 STR r0,[sp,#0] ;204 +0000a2 2301 MOVS r3,#1 ;204 +0000a4 2200 MOVS r2,#0 ;204 +0000a6 2121 MOVS r1,#0x21 ;204 +0000a8 69e0 LDR r0,[r4,#0x1c] ;204 ; g_rx_ctrl_handle +0000aa f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +0000ae 73a7 STRB r7,[r4,#0xe] ;208 +0000b0 e1f5 B |L2.1182| + |L2.178| +0000b2 2080 MOVS r0,#0x80 ;220 +0000b4 e7e5 B |L2.130| + |L2.182| +0000b6 7127 STRB r7,[r4,#4] ;241 +0000b8 9202 STR r2,[sp,#8] ;242 +0000ba 9100 STR r1,[sp,#0] ;242 +0000bc 9001 STR r0,[sp,#4] ;242 +0000be 2303 MOVS r3,#3 ;242 +0000c0 2200 MOVS r2,#0 ;242 +0000c2 211c MOVS r1,#0x1c ;242 +0000c4 69e0 LDR r0,[r4,#0x1c] ;242 ; g_rx_ctrl_handle +0000c6 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +0000ca e1e8 B |L2.1182| + |L2.204| +0000cc 9025 STR r0,[sp,#0x94] ;252 +0000ce 9026 STR r0,[sp,#0x98] ;252 +0000d0 9028 STR r0,[sp,#0xa0] ;252 +0000d2 9027 STR r0,[sp,#0x9c] ;252 +0000d4 9021 STR r0,[sp,#0x84] ;252 +0000d6 9023 STR r0,[sp,#0x8c] ;252 +0000d8 9024 STR r0,[sp,#0x90] ;252 +0000da 9020 STR r0,[sp,#0x80] ;252 +0000dc 9022 STR r0,[sp,#0x88] ;252 +0000de 901e STR r0,[sp,#0x78] ;252 +0000e0 901f STR r0,[sp,#0x7c] ;252 +0000e2 901b STR r0,[sp,#0x6c] ;252 +0000e4 901c STR r0,[sp,#0x70] ;252 +0000e6 901d STR r0,[sp,#0x74] ;252 +0000e8 9019 STR r0,[sp,#0x64] ;252 +0000ea 901a STR r0,[sp,#0x68] ;252 +0000ec 9016 STR r0,[sp,#0x58] ;252 +0000ee 9017 STR r0,[sp,#0x5c] ;252 +0000f0 9015 STR r0,[sp,#0x54] ;252 +0000f2 9018 STR r0,[sp,#0x60] ;252 +0000f4 9011 STR r0,[sp,#0x44] ;252 +0000f6 9012 STR r0,[sp,#0x48] ;252 +0000f8 9014 STR r0,[sp,#0x50] ;252 +0000fa 2102 MOVS r1,#2 ;252 +0000fc 9013 STR r0,[sp,#0x4c] ;252 +0000fe 900d STR r0,[sp,#0x34] ;252 +000100 900f STR r0,[sp,#0x3c] ;252 +000102 9010 STR r0,[sp,#0x40] ;252 +000104 900c STR r0,[sp,#0x30] ;252 +000106 900e STR r0,[sp,#0x38] ;252 +000108 900a STR r0,[sp,#0x28] ;252 +00010a 900b STR r0,[sp,#0x2c] ;252 +00010c 9007 STR r0,[sp,#0x1c] ;252 +00010e 9108 STR r1,[sp,#0x20] ;252 +000110 9009 STR r0,[sp,#0x24] ;252 +000112 9005 STR r0,[sp,#0x14] ;252 +000114 9006 STR r0,[sp,#0x18] ;252 +000116 9102 STR r1,[sp,#8] ;252 +000118 9001 STR r0,[sp,#4] ;252 +00011a 9003 STR r0,[sp,#0xc] ;252 +00011c 9004 STR r0,[sp,#0x10] ;252 +00011e 9000 STR r0,[sp,#0] ;252 +000120 2329 MOVS r3,#0x29 ;252 +000122 2200 MOVS r2,#0 ;252 +000124 211c MOVS r1,#0x1c ;252 +000126 69e0 LDR r0,[r4,#0x1c] ;252 ; g_rx_ctrl_handle +000128 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +00012c e1b7 B |L2.1182| +00012e e003 B |L2.312| + |L2.304| +000130 e108 B |L2.836| + |L2.306| +000132 e115 B |L2.864| + |L2.308| +000134 e116 B |L2.868| + |L2.310| +000136 e123 B |L2.896| + |L2.312| +000138 2039 MOVS r0,#0x39 ;284 +00013a 2e08 CMP r6,#8 ;282 +00013c d014 BEQ |L2.360| +00013e 2e07 CMP r6,#7 ;290 +000140 d025 BEQ |L2.398| +000142 2e0a CMP r6,#0xa ;298 +000144 d035 BEQ |L2.434| +000146 2130 MOVS r1,#0x30 ;308 +000148 2e14 CMP r6,#0x14 ;306 +00014a d043 BEQ |L2.468| +00014c 2338 MOVS r3,#0x38 ;317 +00014e 2e18 CMP r6,#0x18 ;315 +000150 d066 BEQ |L2.544| +000152 2e1f CMP r6,#0x1f ;324 +000154 d07e BEQ |L2.596| +000156 2e04 CMP r6,#4 ;333 +000158 d07d BEQ |L2.598| +00015a 2e0b CMP r6,#0xb ;342 +00015c d07c BEQ |L2.600| +00015e 22ff MOVS r2,#0xff ;352 +000160 462b MOV r3,r5 ;352 +000162 3261 ADDS r2,r2,#0x61 ;352 +000164 9600 STR r6,[sp,#0] ;352 +000166 e782 B |L2.110| + |L2.360| +000168 2105 MOVS r1,#5 ;284 +00016a 2399 MOVS r3,#0x99 ;284 +00016c 9304 STR r3,[sp,#0x10] ;284 +00016e 9206 STR r2,[sp,#0x18] ;284 +000170 9105 STR r1,[sp,#0x14] ;284 +000172 9007 STR r0,[sp,#0x1c] ;284 +000174 238f MOVS r3,#0x8f ;284 +000176 220c MOVS r2,#0xc ;284 +000178 21f0 MOVS r1,#0xf0 ;284 +00017a 200b MOVS r0,#0xb ;284 +00017c 466d MOV r5,sp ;284 +00017e c50f STM r5!,{r0-r3} ;284 +000180 2308 MOVS r3,#8 ;284 +000182 2200 MOVS r2,#0 ;284 +000184 211c MOVS r1,#0x1c ;284 +000186 69e0 LDR r0,[r4,#0x1c] ;284 ; g_rx_ctrl_handle +000188 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +00018c e187 B |L2.1182| + |L2.398| +00018e 2341 MOVS r3,#0x41 ;292 +000190 2226 MOVS r2,#0x26 ;292 +000192 2125 MOVS r1,#0x25 ;292 +000194 201e MOVS r0,#0x1e ;292 +000196 ad03 ADD r5,sp,#0xc ;292 +000198 c50f STM r5!,{r0-r3} ;292 +00019a 2214 MOVS r2,#0x14 ;292 +00019c 2115 MOVS r1,#0x15 ;292 +00019e 2097 MOVS r0,#0x97 ;292 +0001a0 466d MOV r5,sp ;292 +0001a2 c507 STM r5!,{r0-r2} ;292 +0001a4 2307 MOVS r3,#7 ;292 +0001a6 2200 MOVS r2,#0 ;292 +0001a8 211c MOVS r1,#0x1c ;292 +0001aa 69e0 LDR r0,[r4,#0x1c] ;292 ; g_rx_ctrl_handle +0001ac f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +0001b0 e175 B |L2.1182| + |L2.434| +0001b2 2102 MOVS r1,#2 ;300 +0001b4 2309 MOVS r3,#9 ;300 +0001b6 9308 STR r3,[sp,#0x20] ;300 +0001b8 9206 STR r2,[sp,#0x18] ;300 +0001ba 9109 STR r1,[sp,#0x24] ;300 +0001bc 9007 STR r0,[sp,#0x1c] ;300 +0001be 2305 MOVS r3,#5 ;300 +0001c0 2299 MOVS r2,#0x99 ;300 +0001c2 218f MOVS r1,#0x8f ;300 +0001c4 200c MOVS r0,#0xc ;300 +0001c6 ad02 ADD r5,sp,#8 ;300 +0001c8 c50f STM r5!,{r0-r3} ;300 +0001ca 21f0 MOVS r1,#0xf0 ;300 +0001cc 200b MOVS r0,#0xb ;300 +0001ce 9101 STR r1,[sp,#4] ;300 +0001d0 9000 STR r0,[sp,#0] ;300 +0001d2 e0ee B |L2.946| + |L2.468| +0001d4 461e MOV r6,r3 ;308 +0001d6 2351 MOVS r3,#0x51 ;308 +0001d8 9310 STR r3,[sp,#0x40] ;308 +0001da 2233 MOVS r2,#0x33 ;308 +0001dc ad11 ADD r5,sp,#0x44 ;308 +0001de c546 STM r5!,{r1,r2,r6} ;308 +0001e0 2343 MOVS r3,#0x43 ;308 +0001e2 930e STR r3,[sp,#0x38] ;308 +0001e4 900c STR r0,[sp,#0x30] ;308 +0001e6 2241 MOVS r2,#0x41 ;308 +0001e8 2353 MOVS r3,#0x53 ;308 +0001ea 9309 STR r3,[sp,#0x24] ;308 +0001ec 2532 MOVS r5,#0x32 ;308 +0001ee 920f STR r2,[sp,#0x3c] ;308 +0001f0 2036 MOVS r0,#0x36 ;308 +0001f2 950d STR r5,[sp,#0x34] ;308 +0001f4 900b STR r0,[sp,#0x2c] ;308 +0001f6 910a STR r1,[sp,#0x28] ;308 +0001f8 2055 MOVS r0,#0x55 ;308 +0001fa 2333 MOVS r3,#0x33 ;308 +0001fc 9305 STR r3,[sp,#0x14] ;308 +0001fe 9006 STR r0,[sp,#0x18] ;308 +000200 254d MOVS r5,#0x4d ;308 +000202 9608 STR r6,[sp,#0x20] ;308 +000204 9507 STR r5,[sp,#0x1c] ;308 +000206 9204 STR r2,[sp,#0x10] ;308 +000208 20a6 MOVS r0,#0xa6 ;308 +00020a 9100 STR r1,[sp,#0] ;308 +00020c 9701 STR r7,[sp,#4] ;308 +00020e 9702 STR r7,[sp,#8] ;308 +000210 9003 STR r0,[sp,#0xc] ;308 +000212 2314 MOVS r3,#0x14 ;308 +000214 2200 MOVS r2,#0 ;308 +000216 211c MOVS r1,#0x1c ;308 +000218 69e0 LDR r0,[r4,#0x1c] ;308 ; g_rx_ctrl_handle +00021a f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +00021e e13e B |L2.1182| + |L2.544| +000220 2653 MOVS r6,#0x53 ;317 +000222 9614 STR r6,[sp,#0x50] ;317 +000224 2531 MOVS r5,#0x31 ;317 +000226 2130 MOVS r1,#0x30 ;317 +000228 ae15 ADD r6,sp,#0x54 ;317 +00022a c62a STM r6!,{r1,r3,r5} ;317 +00022c 2636 MOVS r6,#0x36 ;317 +00022e 9613 STR r6,[sp,#0x4c] ;317 +000230 254d MOVS r5,#0x4d ;317 +000232 2355 MOVS r3,#0x55 ;317 +000234 2133 MOVS r1,#0x33 ;317 +000236 ae10 ADD r6,sp,#0x40 ;317 +000238 c62a STM r6!,{r1,r3,r5} ;317 +00023a 2141 MOVS r1,#0x41 ;317 +00023c 23a4 MOVS r3,#0xa4 ;317 +00023e 910f STR r1,[sp,#0x3c] ;317 +000240 930e STR r3,[sp,#0x38] ;317 +000242 2557 MOVS r5,#0x57 ;317 +000244 2330 MOVS r3,#0x30 ;317 +000246 2102 MOVS r1,#2 ;317 +000248 970d STR r7,[sp,#0x34] ;317 +00024a 2609 MOVS r6,#9 ;317 +00024c 970c STR r7,[sp,#0x30] ;317 +00024e 9608 STR r6,[sp,#0x20] ;317 +000250 950a STR r5,[sp,#0x28] ;317 +000252 e002 B |L2.602| + |L2.596| +000254 e011 B |L2.634| + |L2.598| +000256 e04e B |L2.758| + |L2.600| +000258 e05a B |L2.784| + |L2.602| +00025a 930b STR r3,[sp,#0x2c] ;317 +00025c 9109 STR r1,[sp,#0x24] ;317 +00025e 2105 MOVS r1,#5 ;317 +000260 9206 STR r2,[sp,#0x18] ;317 +000262 9105 STR r1,[sp,#0x14] ;317 +000264 9007 STR r0,[sp,#0x1c] ;317 +000266 2399 MOVS r3,#0x99 ;317 +000268 210c MOVS r1,#0xc ;317 +00026a 22f0 MOVS r2,#0xf0 ;317 +00026c 9304 STR r3,[sp,#0x10] ;317 +00026e 208f MOVS r0,#0x8f ;317 +000270 230b MOVS r3,#0xb ;317 +000272 9300 STR r3,[sp,#0] ;317 +000274 9201 STR r2,[sp,#4] ;317 +000276 9102 STR r1,[sp,#8] ;317 +000278 e0b9 B |L2.1006| + |L2.634| +00027a 254c MOVS r5,#0x4c ;326 +00027c 951b STR r5,[sp,#0x6c] ;326 +00027e 460e MOV r6,r1 ;326 +000280 2338 MOVS r3,#0x38 ;326 +000282 2039 MOVS r0,#0x39 ;326 +000284 931e STR r3,[sp,#0x78] ;326 +000286 901d STR r0,[sp,#0x74] ;326 +000288 254b MOVS r5,#0x4b ;326 +00028a 9519 STR r5,[sp,#0x64] ;326 +00028c 911c STR r1,[sp,#0x70] ;326 +00028e 2131 MOVS r1,#0x31 ;326 +000290 2038 MOVS r0,#0x38 ;326 +000292 9117 STR r1,[sp,#0x5c] ;326 +000294 9016 STR r0,[sp,#0x58] ;326 +000296 2342 MOVS r3,#0x42 ;326 +000298 931a STR r3,[sp,#0x68] ;326 +00029a 204d MOVS r0,#0x4d ;326 +00029c 2353 MOVS r3,#0x53 ;326 +00029e 9012 STR r0,[sp,#0x48] ;326 +0002a0 9618 STR r6,[sp,#0x60] ;326 +0002a2 9314 STR r3,[sp,#0x50] ;326 +0002a4 2536 MOVS r5,#0x36 ;326 +0002a6 9513 STR r5,[sp,#0x4c] ;326 +0002a8 9615 STR r6,[sp,#0x54] ;326 +0002aa 2333 MOVS r3,#0x33 ;326 +0002ac 20a4 MOVS r0,#0xa4 ;326 +0002ae 2155 MOVS r1,#0x55 ;326 +0002b0 9310 STR r3,[sp,#0x40] ;326 +0002b2 900e STR r0,[sp,#0x38] ;326 +0002b4 9111 STR r1,[sp,#0x44] ;326 +0002b6 2541 MOVS r5,#0x41 ;326 +0002b8 970d STR r7,[sp,#0x34] ;326 +0002ba 2102 MOVS r1,#2 ;326 +0002bc 2309 MOVS r3,#9 ;326 +0002be 950f STR r5,[sp,#0x3c] ;326 +0002c0 9308 STR r3,[sp,#0x20] ;326 +0002c2 9109 STR r1,[sp,#0x24] ;326 +0002c4 2057 MOVS r0,#0x57 ;326 +0002c6 2199 MOVS r1,#0x99 ;326 +0002c8 238f MOVS r3,#0x8f ;326 +0002ca 960b STR r6,[sp,#0x2c] ;326 +0002cc 900a STR r0,[sp,#0x28] ;326 +0002ce 9303 STR r3,[sp,#0xc] ;326 +0002d0 9104 STR r1,[sp,#0x10] ;326 +0002d2 970c STR r7,[sp,#0x30] ;326 +0002d4 2539 MOVS r5,#0x39 ;326 +0002d6 2005 MOVS r0,#5 ;326 +0002d8 ae05 ADD r6,sp,#0x14 ;326 +0002da c625 STM r6!,{r0,r2,r5} ;326 +0002dc 21f0 MOVS r1,#0xf0 ;326 +0002de 220b MOVS r2,#0xb ;326 +0002e0 200c MOVS r0,#0xc ;326 +0002e2 9200 STR r2,[sp,#0] ;326 +0002e4 9101 STR r1,[sp,#4] ;326 +0002e6 9002 STR r0,[sp,#8] ;326 +0002e8 2318 MOVS r3,#0x18 ;326 +0002ea 2200 MOVS r2,#0 ;326 +0002ec 211c MOVS r1,#0x1c ;326 +0002ee 69e0 LDR r0,[r4,#0x1c] ;326 ; g_rx_ctrl_handle +0002f0 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +0002f4 e0d3 B |L2.1182| + |L2.758| +0002f6 2395 MOVS r3,#0x95 ;335 +0002f8 220c MOVS r2,#0xc ;335 +0002fa 21f0 MOVS r1,#0xf0 ;335 +0002fc 200b MOVS r0,#0xb ;335 +0002fe 466d MOV r5,sp ;335 +000300 c50f STM r5!,{r0-r3} ;335 +000302 2304 MOVS r3,#4 ;335 +000304 2200 MOVS r2,#0 ;335 +000306 211c MOVS r1,#0x1c ;335 +000308 69e0 LDR r0,[r4,#0x1c] ;335 ; g_rx_ctrl_handle +00030a f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +00030e e0c6 B |L2.1182| + |L2.784| +000310 2357 MOVS r3,#0x57 ;344 +000312 2102 MOVS r1,#2 ;344 +000314 2509 MOVS r5,#9 ;344 +000316 930a STR r3,[sp,#0x28] ;344 +000318 9508 STR r5,[sp,#0x20] ;344 +00031a 9109 STR r1,[sp,#0x24] ;344 +00031c 9007 STR r0,[sp,#0x1c] ;344 +00031e 238f MOVS r3,#0x8f ;344 +000320 2105 MOVS r1,#5 ;344 +000322 2099 MOVS r0,#0x99 ;344 +000324 ae04 ADD r6,sp,#0x10 ;344 +000326 9303 STR r3,[sp,#0xc] ;344 +000328 c607 STM r6!,{r0-r2} ;344 +00032a 220b MOVS r2,#0xb ;344 +00032c 21f0 MOVS r1,#0xf0 ;344 +00032e 200c MOVS r0,#0xc ;344 +000330 9200 STR r2,[sp,#0] ;344 +000332 9101 STR r1,[sp,#4] ;344 +000334 4613 MOV r3,r2 ;344 +000336 9002 STR r0,[sp,#8] ;344 +000338 2200 MOVS r2,#0 ;344 +00033a 211c MOVS r1,#0x1c ;344 +00033c 69e0 LDR r0,[r4,#0x1c] ;344 ; g_rx_ctrl_handle +00033e f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000342 e0ac B |L2.1182| + |L2.836| +000344 22b4 MOVS r2,#0xb4 ;357 +000346 2099 MOVS r0,#0x99 ;357 +000348 9204 STR r2,[sp,#0x10] ;357 +00034a 9003 STR r0,[sp,#0xc] ;357 +00034c 2083 MOVS r0,#0x83 ;357 +00034e 466d MOV r5,sp ;357 +000350 c50b STM r5!,{r0,r1,r3} ;357 +000352 2305 MOVS r3,#5 ;357 +000354 2200 MOVS r2,#0 ;357 +000356 211c MOVS r1,#0x1c ;357 +000358 69e0 LDR r0,[r4,#0x1c] ;357 ; g_rx_ctrl_handle +00035a f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +00035e e09e B |L2.1182| + |L2.864| +000360 2013 MOVS r0,#0x13 ;375 +000362 e68e B |L2.130| + |L2.868| +000364 9008 STR r0,[sp,#0x20] ;382 +000366 2360 MOVS r3,#0x60 ;382 +000368 228a MOVS r2,#0x8a ;382 +00036a 214d MOVS r1,#0x4d ;382 +00036c 2056 MOVS r0,#0x56 ;382 +00036e 9309 STR r3,[sp,#0x24] ;382 +000370 9207 STR r2,[sp,#0x1c] ;382 +000372 9106 STR r1,[sp,#0x18] ;382 +000374 232a MOVS r3,#0x2a ;382 +000376 ad02 ADD r5,sp,#8 ;382 +000378 9005 STR r0,[sp,#0x14] ;382 +00037a c50e STM r5!,{r1-r3} ;382 +00037c 9300 STR r3,[sp,#0] ;382 +00037e e017 B |L2.944| + |L2.896| +000380 2e0a CMP r6,#0xa ;390 +000382 d00c BEQ |L2.926| +000384 2e18 CMP r6,#0x18 ;398 +000386 d01b BEQ |L2.960| +000388 2e21 CMP r6,#0x21 ;407 +00038a d061 BEQ |L2.1104| +00038c 22ff MOVS r2,#0xff ;419 +00038e 462b MOV r3,r5 ;419 +000390 32a4 ADDS r2,r2,#0xa4 ;419 +000392 a11c ADR r1,|L2.1028| +000394 a025 ADR r0,|L2.1068| +000396 9600 STR r6,[sp,#0] ;419 + |L2.920| +000398 f7fffffe BL LOG_printf +00039c e07f B |L2.1182| + |L2.926| +00039e 9007 STR r0,[sp,#0x1c] ;392 +0003a0 9008 STR r0,[sp,#0x20] ;392 +0003a2 9009 STR r0,[sp,#0x24] ;392 +0003a4 9005 STR r0,[sp,#0x14] ;392 +0003a6 9006 STR r0,[sp,#0x18] ;392 +0003a8 9002 STR r0,[sp,#8] ;392 +0003aa 9003 STR r0,[sp,#0xc] ;392 +0003ac 9004 STR r0,[sp,#0x10] ;392 +0003ae 9000 STR r0,[sp,#0] ;392 + |L2.944| +0003b0 9001 STR r0,[sp,#4] ;392 + |L2.946| +0003b2 230a MOVS r3,#0xa ;392 +0003b4 2200 MOVS r2,#0 ;392 +0003b6 211c MOVS r1,#0x1c ;392 +0003b8 69e0 LDR r0,[r4,#0x1c] ;392 ; g_rx_ctrl_handle +0003ba f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +0003be e06e B |L2.1182| + |L2.960| +0003c0 9014 STR r0,[sp,#0x50] ;400 +0003c2 9015 STR r0,[sp,#0x54] ;400 +0003c4 9016 STR r0,[sp,#0x58] ;400 +0003c6 9017 STR r0,[sp,#0x5c] ;400 +0003c8 9010 STR r0,[sp,#0x40] ;400 +0003ca 9011 STR r0,[sp,#0x44] ;400 +0003cc 9013 STR r0,[sp,#0x4c] ;400 +0003ce 900f STR r0,[sp,#0x3c] ;400 +0003d0 9012 STR r0,[sp,#0x48] ;400 +0003d2 900c STR r0,[sp,#0x30] ;400 +0003d4 900e STR r0,[sp,#0x38] ;400 +0003d6 900a STR r0,[sp,#0x28] ;400 +0003d8 900b STR r0,[sp,#0x2c] ;400 +0003da 900d STR r0,[sp,#0x34] ;400 +0003dc 9009 STR r0,[sp,#0x24] ;400 +0003de 9005 STR r0,[sp,#0x14] ;400 +0003e0 9006 STR r0,[sp,#0x18] ;400 +0003e2 9007 STR r0,[sp,#0x1c] ;400 +0003e4 9008 STR r0,[sp,#0x20] ;400 +0003e6 9004 STR r0,[sp,#0x10] ;400 +0003e8 9000 STR r0,[sp,#0] ;400 +0003ea 9001 STR r0,[sp,#4] ;400 +0003ec 9002 STR r0,[sp,#8] ;400 + |L2.1006| +0003ee 9003 STR r0,[sp,#0xc] ;400 +0003f0 2318 MOVS r3,#0x18 ;400 +0003f2 2200 MOVS r2,#0 ;400 +0003f4 211c MOVS r1,#0x1c ;400 +0003f6 69e0 LDR r0,[r4,#0x1c] ;400 ; g_rx_ctrl_handle +0003f8 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +0003fc e04f B |L2.1182| +0003fe e027 B |L2.1104| + |L2.1024| + DCD ||.data|| + |L2.1028| +000404 4e32305f DCB "N20_NT37701",0 +000408 4e543337 +00040c 37303100 + |L2.1040| +000410 5b25735d DCB "[%s] (%04d) r[%x] [%d] err!",0 +000414 20282530 +000418 34642920 +00041c 725b2578 +000420 5d205b25 +000424 645d2065 +000428 72722100 + |L2.1068| +00042c 5b25735d DCB "[%s] (%04d) r[%x] [%d] err!!!!!!",0 +000430 20282530 +000434 34642920 +000438 725b2578 +00043c 5d205b25 +000440 645d2065 +000444 72722121 +000448 21212121 +00044c 00 +00044d 00 DCB 0 +00044e 00 DCB 0 +00044f 00 DCB 0 + |L2.1104| +000450 901e STR r0,[sp,#0x78] ;409 +000452 901f STR r0,[sp,#0x7c] ;409 +000454 9020 STR r0,[sp,#0x80] ;409 +000456 901d STR r0,[sp,#0x74] ;409 +000458 9019 STR r0,[sp,#0x64] ;409 +00045a 901a STR r0,[sp,#0x68] ;409 +00045c 901b STR r0,[sp,#0x6c] ;409 +00045e 901c STR r0,[sp,#0x70] ;409 +000460 9015 STR r0,[sp,#0x54] ;409 +000462 9016 STR r0,[sp,#0x58] ;409 +000464 9017 STR r0,[sp,#0x5c] ;409 +000466 9018 STR r0,[sp,#0x60] ;409 +000468 9014 STR r0,[sp,#0x50] ;409 +00046a 9011 STR r0,[sp,#0x44] ;409 +00046c 9012 STR r0,[sp,#0x48] ;409 +00046e 9013 STR r0,[sp,#0x4c] ;409 +000470 900f STR r0,[sp,#0x3c] ;409 +000472 9010 STR r0,[sp,#0x40] ;409 +000474 900d STR r0,[sp,#0x34] ;409 +000476 900e STR r0,[sp,#0x38] ;409 +000478 900a STR r0,[sp,#0x28] ;409 +00047a 900b STR r0,[sp,#0x2c] ;409 +00047c 900c STR r0,[sp,#0x30] ;409 +00047e 9009 STR r0,[sp,#0x24] ;409 +000480 9005 STR r0,[sp,#0x14] ;409 +000482 9006 STR r0,[sp,#0x18] ;409 +000484 9007 STR r0,[sp,#0x1c] ;409 +000486 9008 STR r0,[sp,#0x20] ;409 +000488 9001 STR r0,[sp,#4] ;409 +00048a 9002 STR r0,[sp,#8] ;409 +00048c 9003 STR r0,[sp,#0xc] ;409 +00048e 9004 STR r0,[sp,#0x10] ;409 +000490 9000 STR r0,[sp,#0] ;409 +000492 2321 MOVS r3,#0x21 ;409 +000494 2200 MOVS r2,#0 ;409 +000496 211c MOVS r1,#0x1c ;409 +000498 69e0 LDR r0,[r4,#0x1c] ;409 ; g_rx_ctrl_handle +00049a f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd + |L2.1182| +;;;429 } +;;;430 +;;;431 return true; +00049e 2001 MOVS r0,#1 +;;;432 } +0004a0 b029 ADD sp,sp,#0xa4 +0004a2 bdf0 POP {r4-r7,pc} +;;;433 + ENDP + + + AREA ||i.ap_demo||, CODE, READONLY, ALIGN=2 + + ap_demo PROC +;;;2616 +;;;2617 void ap_demo(void) +000000 b508 PUSH {r3,lr} +;;;2618 { +;;;2619 hal_gpio_init_output(IO_PAD_TD_LEDPWM, IO_LVL_LOW); +000002 2100 MOVS r1,#0 +000004 200a MOVS r0,#0xa +000006 f7fffffe BL hal_gpio_init_output +;;;2620 hal_gpio_init_output(IO_PAD_AP_SWIRE, IO_LVL_LOW); +00000a 2100 MOVS r1,#0 +00000c 2004 MOVS r0,#4 +00000e f7fffffe BL hal_gpio_init_output +;;;2621 hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW); +000012 2100 MOVS r1,#0 +000014 2014 MOVS r0,#0x14 +000016 f7fffffe BL hal_gpio_init_output +;;;2622 hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_LOW); // LED_ON +00001a 2100 MOVS r1,#0 +00001c 2013 MOVS r0,#0x13 +00001e f7fffffe BL hal_gpio_init_output +;;;2623 +;;;2624 TAU_LOGD("Note20 368 CSOT667 [%s %s]", __DATE__, __TIME__); +000022 a04c ADR r0,|L3.340| +000024 2229 MOVS r2,#0x29 +000026 9000 STR r0,[sp,#0] +000028 a34d ADR r3,|L3.352| +00002a 0192 LSLS r2,r2,#6 +00002c a14f ADR r1,|L3.364| +00002e a052 ADR r0,|L3.376| +000030 f7fffffe BL LOG_printf +;;;2625 // delayMs(20); +;;;2626 /* mipi rxʼ */ +;;;2627 open_mipi_rx(); +000034 f7fffffe BL open_mipi_rx +;;;2628 +;;;2629 tp_sleep_in = 1; +000038 4f59 LDR r7,|L3.416| +00003a 2601 MOVS r6,#1 +00003c 703e STRB r6,[r7,#0] +;;;2630 app_tp_I2C_init(); +00003e f7fffffe BL app_tp_I2C_init +;;;2631 +;;;2632 //#ifdef ADD_PWM_OUTPUT_FOR_BL +;;;2633 // PWM_init(); +;;;2634 //#endif +;;;2635 +;;;2636 /* TP1.8е֮ǰʹTEʾ֮лΪӲTE */ +;;;2637 // soft_te_timer_init(); +;;;2638 /* mipi tx ʼ*/ +;;;2639 delayMs(20); +000042 2014 MOVS r0,#0x14 +000044 f7fffffe BL delayMs +;;;2640 init_mipi_tx(); +000048 f7fffffe BL init_mipi_tx +;;;2641 +;;;2642 /* touch ģʼ */ +;;;2643 #ifndef DISPLAY_ONLY +;;;2644 app_tp_init(); +00004c f7fffffe BL app_tp_init +;;;2645 #endif +;;;2646 +;;;2647 #ifdef ADD_TIMER3_FUNCTION +;;;2648 tp_sleep_count = 0; +000050 4854 LDR r0,|L3.420| +000052 2500 MOVS r5,#0 +000054 7005 STRB r5,[r0,#0] +;;;2649 tp_sleep_clk_count = 0; +000056 4854 LDR r0,|L3.424| +;;;2650 phone_DisplayOFF_count=1; +000058 4c54 LDR r4,|L3.428| +00005a 7005 STRB r5,[r0,#0] ;2649 +00005c 8226 STRH r6,[r4,#0x10] +;;;2651 hal_timer_init(TIMER_NUM3); +00005e 2003 MOVS r0,#3 +000060 f7fffffe BL hal_timer_init +;;;2652 hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); +000064 2300 MOVS r3,#0 +000066 4a52 LDR r2,|L3.432| +000068 210a MOVS r1,#0xa +00006a 2003 MOVS r0,#3 +00006c f7fffffe BL hal_timer_start +;;;2653 TAU_LOGD("start timer3"); +000070 4a50 LDR r2,|L3.436| +000072 a13e ADR r1,|L3.364| +000074 a050 ADR r0,|L3.440| +000076 f7fffffe BL LOG_printf + |L3.122| +;;;2654 #endif +;;;2655 +;;;2656 while (1) +;;;2657 { +;;;2658 if (start_display_on == true) +00007a 7860 LDRB r0,[r4,#1] ; start_display_on +00007c 2800 CMP r0,#0 +00007e d023 BEQ |L3.200| +;;;2659 { +;;;2660 if ((g_exit_sleep_mode == true) || (g_panel_display_cnt==0)) +000080 78e0 LDRB r0,[r4,#3] ; g_exit_sleep_mode +000082 79e1 LDRB r1,[r4,#7] ; g_panel_display_cnt +000084 1e40 SUBS r0,r0,#1 +000086 4208 TST r0,r1 +000088 d11e BNE |L3.200| +00008a f7fffffe BL init_panel +00008e 6a20 LDR r0,[r4,#0x20] ; g_tx_ctrl_handle +000090 f7fffffe BL hal_dsi_tx_ctrl_start +000094 2064 MOVS r0,#0x64 +000096 f7fffffe BL delayMs +00009a 2329 MOVS r3,#0x29 +00009c 2201 MOVS r2,#1 +00009e 2100 MOVS r1,#0 +0000a0 2005 MOVS r0,#5 +0000a2 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +0000a6 2128 MOVS r1,#0x28 +0000a8 2002 MOVS r0,#2 +0000aa f7fffffe BL Gpio_swire_output +0000ae 4a41 LDR r2,|L3.436| +0000b0 71a6 STRB r6,[r4,#6] +0000b2 3a9c SUBS r2,r2,#0x9c +0000b4 4947 LDR r1,|L3.468| +0000b6 a048 ADR r0,|L3.472| +0000b8 f7fffffe BL LOG_printf +;;;2661 { +;;;2662 tx_display_on(); +;;;2663 app_tp_phone_clear_reset_on(); +0000bc f7fffffe BL app_tp_phone_clear_reset_on +;;;2664 #ifndef DISABLE_TDDI_I2C_FUNCTION +;;;2665 /* TP ģͨѶʼ */ +;;;2666 app_tp_transfer_screen_start(); +0000c0 f7fffffe BL app_tp_transfer_screen_start +;;;2667 #endif +;;;2668 g_panel_display_cnt = 0; +0000c4 71e5 STRB r5,[r4,#7] +;;;2669 start_display_on = false; +0000c6 7065 STRB r5,[r4,#1] + |L3.200| +;;;2670 } +;;;2671 } +;;;2672 // #ifdef ADD_PWM_OUTPUT_FOR_BL +;;;2673 // PWM_Task(); +;;;2674 // #endif +;;;2675 if(phone_DisplayOFF_flag==1) +0000c8 7a60 LDRB r0,[r4,#9] ; phone_DisplayOFF_flag +0000ca 2801 CMP r0,#1 +;;;2676 { +;;;2677 if(phone_DisplayOFF_count>950) +;;;2678 { +;;;2679 phone_DisplayOFF_count=0; +;;;2680 phone_start_flag=1; +;;;2681 } +;;;2682 } +;;;2683 else +;;;2684 { +;;;2685 if(phone_DisplayOFF_count>20) +0000cc 8a20 LDRH r0,[r4,#0x10] ; phone_DisplayOFF_count +0000ce d03b BEQ |L3.328| +0000d0 2814 CMP r0,#0x14 +0000d2 d905 BLS |L3.224| +;;;2686 { +;;;2687 phone_DisplayOFF_count=0; +0000d4 8225 STRH r5,[r4,#0x10] +;;;2688 phone_start_flag=1; +0000d6 7226 STRB r6,[r4,#8] +;;;2689 hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW);//ͣ˫2~3s޴.jason_su +0000d8 2100 MOVS r1,#0 +0000da 2002 MOVS r0,#2 +0000dc f7fffffe BL hal_gpio_set_output_data + |L3.224| +;;;2690 } +;;;2691 } +;;;2692 +;;;2693 #if ADD_TP_CALIBRATION +;;;2694 app_tp_calibration_exec(); +0000e0 f7fffffe BL app_tp_calibration_exec +;;;2695 #endif +;;;2696 +;;;2697 #ifndef DISABLE_TDDI_I2C_FUNCTION +;;;2698 /* ȴ TP жϱTP Эת */ +;;;2699 app_tp_transfer_screen_int(); +0000e4 f7fffffe BL app_tp_transfer_screen_int + |L3.232| +;;;2700 #endif +;;;2701 +;;;2702 while (hal_dsi_rx_ctrl_dsc_async_handler(g_rx_ctrl_handle)) +0000e8 69e0 LDR r0,[r4,#0x1c] ; g_rx_ctrl_handle +0000ea f7fffffe BL hal_dsi_rx_ctrl_dsc_async_handler +0000ee 2800 CMP r0,#0 +0000f0 d1fa BNE |L3.232| +;;;2703 { +;;;2704 } +;;;2705 +;;;2706 #if ENABLE_TP_WAKE_UP +;;;2707 if (g_need_enter_sleep_mode) +0000f2 78a0 LDRB r0,[r4,#2] ; g_need_enter_sleep_mode +0000f4 2800 CMP r0,#0 +0000f6 d0c0 BEQ |L3.122| +;;;2708 { +;;;2709 // hal_gpio_init_output(IO_PAD_TD_LEDPWM, IO_LVL_HIGH); +;;;2710 tp_sleep_in=1; +0000f8 703e STRB r6,[r7,#0] +;;;2711 #if ENABLE_TP_WAKE_UP +;;;2712 hal_gpio_set_ap_reset_int(ENABLE, ap_reset_cb, DETECT_RISING_EDGE); +0000fa 2202 MOVS r2,#2 +0000fc 493b LDR r1,|L3.492| +0000fe 2001 MOVS r0,#1 +000100 f7fffffe BL hal_gpio_set_ap_reset_int +;;;2713 #endif +;;;2714 /* FIXME stop more model */ +;;;2715 hal_dsi_tx_ctrl_stop(g_tx_ctrl_handle); +000104 6a20 LDR r0,[r4,#0x20] ; g_tx_ctrl_handle +000106 f7fffffe BL hal_dsi_tx_ctrl_stop +;;;2716 hal_dsi_tx_ctrl_deinit(g_tx_ctrl_handle); +00010a 6a20 LDR r0,[r4,#0x20] ; g_tx_ctrl_handle +00010c f7fffffe BL hal_dsi_tx_ctrl_deinit +;;;2717 hal_dsi_rx_ctrl_stop(g_rx_ctrl_handle); +000110 69e0 LDR r0,[r4,#0x1c] ; g_rx_ctrl_handle +000112 f7fffffe BL hal_dsi_rx_ctrl_stop +;;;2718 hal_dsi_rx_ctrl_deinit(g_rx_ctrl_handle); +000116 69e0 LDR r0,[r4,#0x1c] ; g_rx_ctrl_handle +000118 f7fffffe BL hal_dsi_rx_ctrl_deinit +;;;2719 +;;;2720 hal_swire_open(DISABLE); +00011c 2000 MOVS r0,#0 +00011e f7fffffe BL hal_swire_open +;;;2721 hal_swire_deinit(); +000122 f7fffffe BL hal_swire_deinit +;;;2722 hal_timer_stop(SWIRE_TIMER); +000126 2001 MOVS r0,#1 +000128 f7fffffe BL hal_timer_stop +;;;2723 hal_timer_deinit(SWIRE_TIMER); +00012c 2001 MOVS r0,#1 +00012e f7fffffe BL hal_timer_deinit +;;;2724 +;;;2725 hal_system_set_vcc(false); +000132 2000 MOVS r0,#0 +000134 f7fffffe BL hal_system_set_vcc +;;;2726 TAU_LOGD("disable video path \n"); +000138 4a1e LDR r2,|L3.436| +00013a a10c ADR r1,|L3.364| +00013c 3249 ADDS r2,r2,#0x49 +00013e a02c ADR r0,|L3.496| +000140 f7fffffe BL LOG_printf +;;;2727 g_need_enter_sleep_mode = false; +000144 70a5 STRB r5,[r4,#2] +000146 e798 B |L3.122| + |L3.328| +000148 4932 LDR r1,|L3.532| +00014a 4288 CMP r0,r1 ;2677 +00014c d9c8 BLS |L3.224| +00014e 8225 STRH r5,[r4,#0x10] ;2679 +000150 7226 STRB r6,[r4,#8] ;2680 +000152 e7c5 B |L3.224| +;;;2728 } +;;;2729 #endif +;;;2730 +;;;2731 #if RUN_TEST +;;;2732 g_run_test_cnt++; +;;;2733 if (g_run_test_cnt > 0x7fffff) +;;;2734 { +;;;2735 TAU_LOGD("system run"); +;;;2736 g_run_test_cnt = 0; +;;;2737 } +;;;2738 #endif +;;;2739 +;;;2740 /* enter idle mode*/ +;;;2741 //hal_system_idle_mode(true); +;;;2742 } +;;;2743 } +;;;2744 + ENDP + + |L3.340| +000154 31313a33 DCB "11:30:22",0 +000158 303a3232 +00015c 00 +00015d 00 DCB 0 +00015e 00 DCB 0 +00015f 00 DCB 0 + |L3.352| +000160 4a756c20 DCB "Jul 6 2023",0 +000164 20362032 +000168 30323300 + |L3.364| +00016c 4e32305f DCB "N20_NT37701",0 +000170 4e543337 +000174 37303100 + |L3.376| +000178 5b25735d DCB "[%s] (%04d) Note20 368 CSOT667 [%s %s]",0 +00017c 20282530 +000180 34642920 +000184 4e6f7465 +000188 32302033 +00018c 36382043 +000190 534f5436 +000194 3637205b +000198 25732025 +00019c 735d00 +00019f 00 DCB 0 + |L3.416| + DCD tp_sleep_in + |L3.420| + DCD tp_sleep_count + |L3.424| + DCD tp_sleep_clk_count + |L3.428| + DCD ||.data|| + |L3.432| + DCD soft_timer3_cb + |L3.436| + DCD 0x00000a5d + |L3.440| +0001b8 5b25735d DCB "[%s] (%04d) start timer3",0 +0001bc 20282530 +0001c0 34642920 +0001c4 73746172 +0001c8 74207469 +0001cc 6d657233 +0001d0 00 +0001d1 00 DCB 0 +0001d2 00 DCB 0 +0001d3 00 DCB 0 + |L3.468| + DCD ||i.set_tear_on||+0x4c + |L3.472| +0001d8 5b25735d DCB "[%s] (%04d) 29--",0 +0001dc 20282530 +0001e0 34642920 +0001e4 32392d2d +0001e8 00 +0001e9 00 DCB 0 +0001ea 00 DCB 0 +0001eb 00 DCB 0 + |L3.492| + DCD ap_reset_cb + |L3.496| +0001f0 5b25735d DCB "[%s] (%04d) disable video path \n",0 +0001f4 20282530 +0001f8 34642920 +0001fc 64697361 +000200 626c6520 +000204 76696465 +000208 6f207061 +00020c 7468200a +000210 00 +000211 00 DCB 0 +000212 00 DCB 0 +000213 00 DCB 0 + |L3.532| + DCD 0x000003b6 + + AREA ||i.ap_get_reg_ca||, CODE, READONLY, ALIGN=2 + + ap_get_reg_ca PROC +;;;1089 +;;;1090 static bool ap_get_reg_ca(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b538 PUSH {r3-r5,lr} +;;;1091 { +;;;1092 value_reg_ca = (dcs_packet->packet_param[1] << 8)+ dcs_packet->packet_param[2]; +000002 68c8 LDR r0,[r1,#0xc] +000004 4c0c LDR r4,|L4.56| +000006 7842 LDRB r2,[r0,#1] +000008 7880 LDRB r0,[r0,#2] +00000a 0212 LSLS r2,r2,#8 +00000c 1810 ADDS r0,r2,r0 +00000e b283 UXTH r3,r0 +000010 8263 STRH r3,[r4,#0x12] +;;;1093 TAU_LOGD("CA[%x] Len[%d]\n", value_reg_ca, dcs_packet->param_length); +000012 6888 LDR r0,[r1,#8] +000014 9000 STR r0,[sp,#0] +000016 4a09 LDR r2,|L4.60| +000018 a109 ADR r1,|L4.64| +00001a a00c ADR r0,|L4.76| +00001c f7fffffe BL LOG_printf +;;;1094 +;;;1095 if ((flag_b1 <3) &&(flag_ca <3)) +000020 7aa0 LDRB r0,[r4,#0xa] ; flag_b1 +000022 2803 CMP r0,#3 +000024 d204 BCS |L4.48| +000026 7ae0 LDRB r0,[r4,#0xb] ; flag_ca +000028 2803 CMP r0,#3 +00002a d201 BCS |L4.48| +00002c 1c40 ADDS r0,r0,#1 +;;;1096 { +;;;1097 flag_ca++; +00002e 72e0 STRB r0,[r4,#0xb] + |L4.48| +;;;1098 } +;;;1099 if (flag_ca ==3) +000030 7ae0 LDRB r0,[r4,#0xb] ; flag_ca +;;;1100 return true; +;;;1101 +;;;1102 // printf("B1[%4x],CA[%x] [%d]!!\n", value_reg_b1, value_reg_ca, read_bl_data); +;;;1103 translate_data(); +;;;1104 return true; +000032 2001 MOVS r0,#1 +;;;1105 } +000034 bd38 POP {r3-r5,pc} +;;;1106 + ENDP + +000036 0000 DCW 0x0000 + |L4.56| + DCD ||.data|| + |L4.60| + DCD 0x00000445 + |L4.64| +000040 4e32305f DCB "N20_NT37701",0 +000044 4e543337 +000048 37303100 + |L4.76| +00004c 5b25735d DCB "[%s] (%04d) CA[%x] Len[%d]\n",0 +000050 20282530 +000054 34642920 +000058 43415b25 +00005c 785d204c +000060 656e5b25 +000064 645d0a00 + + AREA ||i.ap_get_reg_df||, CODE, READONLY, ALIGN=2 + + ap_get_reg_df PROC +;;;1153 +;;;1154 static bool ap_get_reg_df(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b570 PUSH {r4-r6,lr} +;;;1155 { +000002 b08e SUB sp,sp,#0x38 +;;;1156 ccm_coef_t ccm; +;;;1157 ccm.coef_c00 = 255; +;;;1158 ccm.coef_c01 = 0; +000004 2000 MOVS r0,#0 +000006 22ff MOVS r2,#0xff ;1157 +;;;1159 ccm.coef_c02 = 0; +000008 9006 STR r0,[sp,#0x18] +;;;1160 ccm.coef_c10 = 0; +00000a 9007 STR r0,[sp,#0x1c] +;;;1161 ccm.coef_c11 = 255; +00000c 9205 STR r2,[sp,#0x14] +;;;1162 ccm.coef_c12 = 0; +00000e 9008 STR r0,[sp,#0x20] +;;;1163 ccm.coef_c20 = 0; +000010 900a STR r0,[sp,#0x28] +;;;1164 ccm.coef_c21 = 0; +000012 900b STR r0,[sp,#0x2c] +;;;1165 ccm.coef_c22 = 255; +000014 9209 STR r2,[sp,#0x24] +;;;1166 +;;;1167 #ifdef ADD_PANEL_DISPLAY_MODE +;;;1168 value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; +000016 920d STR r2,[sp,#0x34] +000018 900c STR r0,[sp,#0x30] +00001a 68cb LDR r3,[r1,#0xc] +00001c 4619 MOV r1,r3 +00001e 3120 ADDS r1,r1,#0x20 +000020 78c8 LDRB r0,[r1,#3] +000022 784c LDRB r4,[r1,#1] +000024 0200 LSLS r0,r0,#8 +000026 1904 ADDS r4,r0,r4 +000028 4817 LDR r0,|L5.136| +;;;1169 panel_mode = dcs_packet->packet_param[0]; +00002a 6244 STR r4,[r0,#0x24] ; value_reg_df +00002c 781d LDRB r5,[r3,#0] +00002e 7345 STRB r5,[r0,#0xd] +;;;1170 panel_r =dcs_packet->packet_param[49]; +000030 7c4c LDRB r4,[r1,#0x11] +000032 8284 STRH r4,[r0,#0x14] +;;;1171 panel_g =dcs_packet->packet_param[51]; +000034 7ccb LDRB r3,[r1,#0x13] +000036 82c3 STRH r3,[r0,#0x16] +;;;1172 panel_b =dcs_packet->packet_param[53]; +000038 7d4e LDRB r6,[r1,#0x15] +00003a 8306 STRH r6,[r0,#0x18] +00003c a909 ADD r1,sp,#0x24 ;1156 +;;;1173 // TAU_LOGD("value_reg_df[%4x],panel_mode[%4x],panel_r[%4x],panel_g[%4x],panel_b[%4x]", value_reg_df,panel_mode,panel_r,panel_g,panel_b); +;;;1174 +;;;1175 if (panel_mode ==00) +00003e 2d00 CMP r5,#0 +000040 d01d BEQ |L5.126| +;;;1176 { +;;;1177 //ģʽ +;;;1178 +;;;1179 #ifdef USE_FOR_S10_BLUE_MODE +;;;1180 //panel_r =256-RATIO_VALUE*(0xFF-panel_r); +;;;1181 //panel_g =256-RATIO_VALUE*(0xFF-panel_g); +;;;1182 //panel_b =256-RATIO_VALUE*(0xFF-panel_b); +;;;1183 // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); +;;;1184 ccm.coef_c00 = panel_r; +;;;1185 ccm.coef_c11 = panel_g; +;;;1186 ccm.coef_c22 = panel_b; +;;;1187 hal_dsi_tx_ctrl_set_ccm(ccm); +;;;1188 +;;;1189 #else +;;;1190 +;;;1191 value_reg_df =value_reg_df&0xFF; +;;;1192 switch(value_reg_df) +;;;1193 { +;;;1194 case 0xC1: +;;;1195 case 0xC3: +;;;1196 value_blue = BLUE_MIN; +;;;1197 break; +;;;1198 +;;;1199 case 0xCF: +;;;1200 case 0xD0: +;;;1201 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; +;;;1202 break; +;;;1203 +;;;1204 case 0xD8: +;;;1205 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; +;;;1206 break; +;;;1207 +;;;1208 case 0xDE: +;;;1209 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; +;;;1210 break; +;;;1211 +;;;1212 case 0xE4: +;;;1213 case 0xE5: +;;;1214 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; +;;;1215 break; +;;;1216 +;;;1217 case 0xE9: +;;;1218 case 0xEA: +;;;1219 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; +;;;1220 break; +;;;1221 +;;;1222 case 0xED: +;;;1223 case 0xEE: +;;;1224 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; +;;;1225 break; +;;;1226 +;;;1227 case 0xF1: +;;;1228 case 0xF2: +;;;1229 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; +;;;1230 break; +;;;1231 +;;;1232 case 0xF4: +;;;1233 case 0xF5: +;;;1234 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; +;;;1235 break; +;;;1236 +;;;1237 case 0xF7: +;;;1238 case 0xF8: +;;;1239 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; +;;;1240 break; +;;;1241 +;;;1242 case 0xFA: +;;;1243 value_blue = BLUE_MAX; +;;;1244 break; +;;;1245 +;;;1246 default: +;;;1247 case 0xFF: +;;;1248 value_blue = 0; +;;;1249 break; +;;;1250 +;;;1251 } +;;;1252 hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256,256,256); +;;;1253 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;1254 +;;;1255 #endif +;;;1256 +;;;1257 } +;;;1258 else +;;;1259 { +;;;1260 #ifndef USE_FOR_S10_BLUE_MODE +;;;1261 value_blue =0; +;;;1262 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); //ģʽs8+/s9+ +;;;1263 #endif +;;;1264 +;;;1265 //һ㣬ЧԡҪݿͻҪϸ +;;;1266 +;;;1267 panel_r =256-RATIO_VALUE*(0xFF-panel_r); +000042 1b14 SUBS r4,r2,r4 +000044 0065 LSLS r5,r4,#1 +000046 1c54 ADDS r4,r2,#1 +;;;1268 panel_g =256-RATIO_VALUE*(0xFF-panel_g); +000048 1ad3 SUBS r3,r2,r3 +00004a 1b65 SUBS r5,r4,r5 ;1267 +00004c 005b LSLS r3,r3,#1 +00004e 1ae3 SUBS r3,r4,r3 +;;;1269 panel_b =256-RATIO_VALUE*(0xFF-panel_b); +000050 1b92 SUBS r2,r2,r6 +000052 b2ad UXTH r5,r5 ;1267 +000054 0052 LSLS r2,r2,#1 +000056 8285 STRH r5,[r0,#0x14] ;1267 +000058 b29b UXTH r3,r3 ;1268 +00005a 1aa2 SUBS r2,r4,r2 +00005c 82c3 STRH r3,[r0,#0x16] ;1268 +00005e b292 UXTH r2,r2 +000060 8302 STRH r2,[r0,#0x18] +;;;1270 // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); +;;;1271 +;;;1272 ccm.coef_c00 = panel_r; +;;;1273 ccm.coef_c11 = panel_g; +;;;1274 ccm.coef_c22 = panel_b; +000062 9505 STR r5,[sp,#0x14] +000064 9309 STR r3,[sp,#0x24] +000066 920d STR r2,[sp,#0x34] + |L5.104| +;;;1275 hal_dsi_tx_ctrl_set_ccm(ccm); +000068 2214 MOVS r2,#0x14 +00006a 4668 MOV r0,sp +00006c f7fffffe BL __aeabi_memcpy4 +000070 ad05 ADD r5,sp,#0x14 +000072 cd0f LDM r5!,{r0-r3} +000074 f7fffffe BL hal_dsi_tx_ctrl_set_ccm +;;;1276 } +;;;1277 +;;;1278 #ifndef USE_FOR_S10_BLUE_MODE +;;;1279 if (blue_flag==0) +;;;1280 { +;;;1281 blue_flag =1; +;;;1282 delayMs(20); +;;;1283 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;1284 } +;;;1285 #endif +;;;1286 +;;;1287 #else +;;;1288 value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; +;;;1289 +;;;1290 value_reg_df =value_reg_df&0xFF; +;;;1291 switch(value_reg_df) +;;;1292 { +;;;1293 case 0xC1: +;;;1294 case 0xC3: +;;;1295 value_blue = BLUE_MIN; +;;;1296 break; +;;;1297 +;;;1298 case 0xCF: +;;;1299 case 0xD0: +;;;1300 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; +;;;1301 break; +;;;1302 +;;;1303 case 0xD8: +;;;1304 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; +;;;1305 break; +;;;1306 +;;;1307 case 0xDE: +;;;1308 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; +;;;1309 break; +;;;1310 +;;;1311 case 0xE4: +;;;1312 case 0xE5: +;;;1313 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; +;;;1314 break; +;;;1315 +;;;1316 case 0xE9: +;;;1317 case 0xEA: +;;;1318 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; +;;;1319 break; +;;;1320 +;;;1321 case 0xED: +;;;1322 case 0xEE: +;;;1323 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; +;;;1324 break; +;;;1325 +;;;1326 case 0xF1: +;;;1327 case 0xF2: +;;;1328 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; +;;;1329 break; +;;;1330 +;;;1331 case 0xF4: +;;;1332 case 0xF5: +;;;1333 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; +;;;1334 break; +;;;1335 +;;;1336 case 0xF7: +;;;1337 case 0xF8: +;;;1338 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; +;;;1339 break; +;;;1340 +;;;1341 case 0xFA: +;;;1342 value_blue = BLUE_MAX; +;;;1343 break; +;;;1344 +;;;1345 default: +;;;1346 case 0xFF: +;;;1347 value_blue = 0; +;;;1348 break; +;;;1349 +;;;1350 } +;;;1351 +;;;1352 TAU_LOGD("df[%4x]", value_reg_df); +;;;1353 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;1354 if (blue_flag==0) +;;;1355 { +;;;1356 blue_flag =1; +;;;1357 delayMs(20); +;;;1358 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;1359 } +;;;1360 #endif +;;;1361 +;;;1362 return true; +000078 2001 MOVS r0,#1 +;;;1363 } +00007a b00e ADD sp,sp,#0x38 +00007c bd70 POP {r4-r6,pc} + |L5.126| +00007e 960d STR r6,[sp,#0x34] ;1187 +000080 9405 STR r4,[sp,#0x14] ;1187 +000082 9309 STR r3,[sp,#0x24] ;1187 +000084 e7f0 B |L5.104| +;;;1364 + ENDP + +000086 0000 DCW 0x0000 + |L5.136| + DCD ||.data|| + + AREA ||i.ap_reset_cb||, CODE, READONLY, ALIGN=2 + + ap_reset_cb PROC +;;;154 #if ENABLE_TP_WAKE_UP +;;;155 static void ap_reset_cb(void *data) +000000 22a0 MOVS r2,#0xa0 +;;;156 { +;;;157 /* лԴ */ +;;;158 // hal_gpio_set_output_data_ex(POWER_IO_B, IO_LVL_HIGH, POWER_IO_A, IO_LVL_LOW); +;;;159 /* VCC */ +;;;160 TAU_LOGD("ap reset!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n"); +000002 a109 ADR r1,|L6.40| +000004 a00b ADR r0,|L6.52| +000006 f7fffffe BL LOG_printf +;;;161 //delayMs(20); +;;;162 hal_system_set_pvd(true); +00000a 2001 MOVS r0,#1 +00000c f7fffffe BL hal_system_set_pvd +;;;163 hal_system_set_vcc(true); +000010 2001 MOVS r0,#1 +000012 f7fffffe BL hal_system_set_vcc +000016 f3bf8f4f DSB +00001a 4915 LDR r1,|L6.112| +00001c 4813 LDR r0,|L6.108| +00001e 60c8 STR r0,[r1,#0xc] +000020 f3bf8f4f DSB + |L6.36| +000024 bf00 NOP +000026 e7fd B |L6.36| +;;;164 NVIC_SystemReset(); +;;;165 } +;;;166 #endif + ENDP + + |L6.40| +000028 4e32305f DCB "N20_NT37701",0 +00002c 4e543337 +000030 37303100 + |L6.52| +000034 5b25735d DCB "[%s] (%04d) ap reset!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n" +000038 20282530 +00003c 34642920 +000040 61702072 +000044 65736574 +000048 21212121 +00004c 21212121 +000050 21212121 +000054 21212121 +000058 21212121 +00005c 21212121 +000060 21212121 +000064 21212121 +000068 210a +00006a 00 DCB 0 +00006b 00 DCB 0 + |L6.108| + DCD 0x05fa0004 + |L6.112| + DCD 0xe000ed00 + + AREA ||i.ap_set_backlight_51||, CODE, READONLY, ALIGN=2 + + ap_set_backlight_51 PROC +;;;1106 +;;;1107 static bool ap_set_backlight_51(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b57c PUSH {r2-r6,lr} +;;;1108 { +;;;1109 uint16_t rd_51_val; //0x0003~0x03FF[1020](0x66֮䣬0x1C5~15B) => (0x6F~0x7FF)[1936] +;;;1110 +;;;1111 rd_51_val = dcs_packet->packet_param[0]; +000002 68ca LDR r2,[r1,#0xc] +000004 7810 LDRB r0,[r2,#0] +;;;1112 rd_51_val = (rd_51_val<<8); +000006 0201 LSLS r1,r0,#8 +;;;1113 rd_51_val |= dcs_packet->packet_param[1]; +000008 7850 LDRB r0,[r2,#1] +00000a 4308 ORRS r0,r0,r1 +;;;1114 +;;;1115 // TAU_LOGD("51[%04X]", rd_51_val); +;;;1116 +;;;1117 rd_51_val = (rd_51_val-0x03)*1936/1020+0x6F; +00000c 2179 MOVS r1,#0x79 +00000e 0109 LSLS r1,r1,#4 +000010 1ec0 SUBS r0,r0,#3 +000012 4348 MULS r0,r1,r0 +000014 21ff MOVS r1,#0xff +000016 0089 LSLS r1,r1,#2 +000018 f7fffffe BL __aeabi_idivmod +00001c 306f ADDS r0,r0,#0x6f +00001e b280 UXTH r0,r0 +;;;1118 if (rd_51_val>0x15B && rd_51_val < 0x1C5) +000020 4601 MOV r1,r0 +000022 39ff SUBS r1,r1,#0xff +000024 395d SUBS r1,r1,#0x5d +000026 2969 CMP r1,#0x69 +000028 d201 BCS |L7.46| +;;;1119 rd_51_val = 0x15B; +00002a 20ff MOVS r0,#0xff +00002c 305c ADDS r0,r0,#0x5c + |L7.46| +;;;1120 +;;;1121 if (g_power_on_flag || g_en_adj_bl){ +00002e 4c0b LDR r4,|L7.92| +;;;1122 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, rd_51_val>>8, rd_51_val&0x00FF); +;;;1123 // TAU_LOGD("51[%04X--1]", rd_51_val); +;;;1124 } +;;;1125 else{ +;;;1126 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x00, 0x01); +000030 2501 MOVS r5,#1 +000032 7921 LDRB r1,[r4,#4] ;1121 ; g_power_on_flag +000034 7962 LDRB r2,[r4,#5] ;1121 ; g_en_adj_bl +000036 4311 ORRS r1,r1,r2 ;1121 +000038 2900 CMP r1,#0 ;1121 +00003a d004 BEQ |L7.70| +00003c b2c1 UXTB r1,r0 ;1122 +00003e 0a00 LSRS r0,r0,#8 ;1122 +000040 9101 STR r1,[sp,#4] ;1122 +000042 9000 STR r0,[sp,#0] ;1122 +000044 e002 B |L7.76| + |L7.70| +000046 2000 MOVS r0,#0 +000048 9501 STR r5,[sp,#4] +00004a 9000 STR r0,[sp,#0] + |L7.76| +00004c 2351 MOVS r3,#0x51 +00004e 2203 MOVS r2,#3 +000050 2100 MOVS r1,#0 +000052 2039 MOVS r0,#0x39 +000054 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;1127 // TAU_LOGD("51[%04X--0]", rd_51_val); +;;;1128 } +;;;1129 g_en_adj_bl = true; +000058 7165 STRB r5,[r4,#5] +;;;1130 } +00005a bd7c POP {r2-r6,pc} +;;;1131 + ENDP + + |L7.92| + DCD ||.data|| + + AREA ||i.ap_set_display_off||, CODE, READONLY, ALIGN=2 + + ap_set_display_off PROC +;;;463 +;;;464 static bool ap_set_display_off(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;465 { +;;;466 TAU_LOGD("disp off"); +000002 22ff MOVS r2,#0xff +000004 32d3 ADDS r2,r2,#0xd3 +000006 a107 ADR r1,|L8.36| +000008 a009 ADR r0,|L8.48| +00000a f7fffffe BL LOG_printf +;;;467 +;;;468 g_en_adj_bl = false; +00000e 490e LDR r1,|L8.72| +000010 2000 MOVS r0,#0 +000012 7148 STRB r0,[r1,#5] +;;;469 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x28); +000014 4601 MOV r1,r0 +000016 2328 MOVS r3,#0x28 +000018 2202 MOVS r2,#2 +00001a 2005 MOVS r0,#5 +00001c f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;470 +;;;471 return true; +000020 2001 MOVS r0,#1 +;;;472 } +000022 bd10 POP {r4,pc} +;;;473 + ENDP + + |L8.36| +000024 4e32305f DCB "N20_NT37701",0 +000028 4e543337 +00002c 37303100 + |L8.48| +000030 5b25735d DCB "[%s] (%04d) disp off",0 +000034 20282530 +000038 34642920 +00003c 64697370 +000040 206f6666 +000044 00 +000045 00 DCB 0 +000046 00 DCB 0 +000047 00 DCB 0 + |L8.72| + DCD ||.data|| + + AREA ||i.ap_set_display_on||, CODE, READONLY, ALIGN=2 + + ap_set_display_on PROC +;;;494 +;;;495 static bool ap_set_display_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;496 { +;;;497 TAU_LOGD("disp on"); +000002 22ff MOVS r2,#0xff +000004 32f2 ADDS r2,r2,#0xf2 +000006 a103 ADR r1,|L9.20| +000008 a005 ADR r0,|L9.32| +00000a f7fffffe BL LOG_printf +;;;498 return true; +00000e 2001 MOVS r0,#1 +;;;499 } +000010 bd10 POP {r4,pc} +;;;500 + ENDP + +000012 0000 DCW 0x0000 + |L9.20| +000014 4e32305f DCB "N20_NT37701",0 +000018 4e543337 +00001c 37303100 + |L9.32| +000020 5b25735d DCB "[%s] (%04d) disp on",0 +000024 20282530 +000028 34642920 +00002c 64697370 +000030 206f6e00 + + AREA ||i.ap_set_enter_sleep_mode||, CODE, READONLY, ALIGN=2 + + ap_set_enter_sleep_mode PROC +;;;473 +;;;474 static bool ap_set_enter_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;475 { +;;;476 hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); +000002 4c15 LDR r4,|L10.88| +000004 69e0 LDR r0,[r4,#0x1c] ; g_rx_ctrl_handle +000006 f7fffffe BL hal_dsi_rx_ctrl_set_sw_tear_mode +;;;477 delayMs(10); +00000a 200a MOVS r0,#0xa +00000c f7fffffe BL delayMs +;;;478 Gpio_swire_output(0, 0); +000010 2100 MOVS r1,#0 +000012 4608 MOV r0,r1 +000014 f7fffffe BL Gpio_swire_output +;;;479 delayMs(10); +000018 200a MOVS r0,#0xa +00001a f7fffffe BL delayMs +;;;480 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x10); +00001e 2310 MOVS r3,#0x10 +000020 2202 MOVS r2,#2 +000022 2100 MOVS r1,#0 +000024 2005 MOVS r0,#5 +000026 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;481 delayMs(20); +00002a 2014 MOVS r0,#0x14 +00002c f7fffffe BL delayMs +;;;482 hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_LOW); +000030 2100 MOVS r1,#0 +000032 2013 MOVS r0,#0x13 +000034 f7fffffe BL hal_gpio_set_output_data +;;;483 +;;;484 hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW);//Reaet +000038 2000 MOVS r0,#0 +00003a f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin +;;;485 +;;;486 TAU_LOGD("enter sleep mode"); +00003e 22ff MOVS r2,#0xff +000040 32e7 ADDS r2,r2,#0xe7 +000042 a106 ADR r1,|L10.92| +000044 a008 ADR r0,|L10.104| +000046 f7fffffe BL LOG_printf +;;;487 #if ENABLE_TP_WAKE_UP +;;;488 g_need_enter_sleep_mode = true; +00004a 2001 MOVS r0,#1 +00004c 70a0 STRB r0,[r4,#2] +;;;489 #endif +;;;490 g_exit_sleep_mode = false; +00004e 2000 MOVS r0,#0 +000050 70e0 STRB r0,[r4,#3] +;;;491 +;;;492 return true; +000052 2001 MOVS r0,#1 +;;;493 } +000054 bd10 POP {r4,pc} +;;;494 + ENDP + +000056 0000 DCW 0x0000 + |L10.88| + DCD ||.data|| + |L10.92| +00005c 4e32305f DCB "N20_NT37701",0 +000060 4e543337 +000064 37303100 + |L10.104| +000068 5b25735d DCB "[%s] (%04d) enter sleep mode",0 +00006c 20282530 +000070 34642920 +000074 656e7465 +000078 7220736c +00007c 65657020 +000080 6d6f6465 +000084 00 +000085 00 DCB 0 +000086 00 DCB 0 +000087 00 DCB 0 + + AREA ||i.ap_set_exit_sleep_mode||, CODE, READONLY, ALIGN=2 + + ap_set_exit_sleep_mode PROC +;;;500 +;;;501 static bool ap_set_exit_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;502 { +;;;503 TAU_LOGD("exit sleep mode"); +000002 22ff MOVS r2,#0xff +000004 32f8 ADDS r2,r2,#0xf8 +000006 a104 ADR r1,|L11.24| +000008 a006 ADR r0,|L11.36| +00000a f7fffffe BL LOG_printf +;;;504 g_exit_sleep_mode = true; +00000e 490c LDR r1,|L11.64| +000010 2001 MOVS r0,#1 +000012 70c8 STRB r0,[r1,#3] +;;;505 return true; +;;;506 } +000014 bd10 POP {r4,pc} +;;;507 + ENDP + +000016 0000 DCW 0x0000 + |L11.24| +000018 4e32305f DCB "N20_NT37701",0 +00001c 4e543337 +000020 37303100 + |L11.36| +000024 5b25735d DCB "[%s] (%04d) exit sleep mode",0 +000028 20282530 +00002c 34642920 +000030 65786974 +000034 20736c65 +000038 6570206d +00003c 6f646500 + |L11.64| + DCD ||.data|| + + AREA ||i.ap_set_tp_calibration_04||, CODE, READONLY, ALIGN=2 + + ap_set_tp_calibration_04 PROC +;;;1365 #if ADD_TP_CALIBRATION +;;;1366 static bool ap_set_tp_calibration_04(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 68c8 LDR r0,[r1,#0xc] +;;;1367 { +;;;1368 if( (dcs_packet->packet_param[0] == 0x01) && (dcs_packet->packet_param[1] == 0x01) && (dcs_packet->packet_param[1] == 0x01) ) +000002 7801 LDRB r1,[r0,#0] +000004 2901 CMP r1,#1 +000006 d104 BNE |L12.18| +000008 7840 LDRB r0,[r0,#1] +00000a 2801 CMP r0,#1 +00000c d101 BNE |L12.18| +;;;1369 { +;;;1370 g_calibration_flag = true; +00000e 4902 LDR r1,|L12.24| +000010 7008 STRB r0,[r1,#0] + |L12.18| +;;;1371 } +;;;1372 return true; +000012 2001 MOVS r0,#1 +;;;1373 } +000014 4770 BX lr +;;;1374 #endif + ENDP + +000016 0000 DCW 0x0000 + |L12.24| + DCD ||.data|| + + AREA ||i.app_tp_calibration_exec||, CODE, READONLY, ALIGN=2 + + app_tp_calibration_exec PROC +;;;2601 #if ADD_TP_CALIBRATION +;;;2602 void app_tp_calibration_exec(void) +000000 b510 PUSH {r4,lr} +;;;2603 { +;;;2604 if(g_calibration_flag) +000002 4808 LDR r0,|L13.36| +000004 7801 LDRB r1,[r0,#0] ; g_calibration_flag +000006 2900 CMP r1,#0 +000008 d00b BEQ |L13.34| +;;;2605 { +;;;2606 if (g_exit_sleep_mode) +00000a 78c1 LDRB r1,[r0,#3] ; g_exit_sleep_mode +00000c 2900 CMP r1,#0 +00000e d008 BEQ |L13.34| +;;;2607 { +;;;2608 g_calibration_flag = false; +000010 2100 MOVS r1,#0 +000012 7001 STRB r1,[r0,#0] +;;;2609 ap_tp_calibration(); +000014 f7fffffe BL ap_tp_calibration +;;;2610 TAU_LOGD("calibration successful \n"); +000018 4a03 LDR r2,|L13.40| +00001a a104 ADR r1,|L13.44| +00001c a006 ADR r0,|L13.56| +00001e f7fffffe BL LOG_printf + |L13.34| +;;;2611 } +;;;2612 } +;;;2613 } +000022 bd10 POP {r4,pc} +;;;2614 #endif + ENDP + + |L13.36| + DCD ||.data|| + |L13.40| + DCD 0x00000a32 + |L13.44| +00002c 4e32305f DCB "N20_NT37701",0 +000030 4e543337 +000034 37303100 + |L13.56| +000038 5b25735d DCB "[%s] (%04d) calibration successful \n",0 +00003c 20282530 +000040 34642920 +000044 63616c69 +000048 62726174 +00004c 696f6e20 +000050 73756363 +000054 65737366 +000058 756c200a +00005c 00 +00005d 00 DCB 0 +00005e 00 DCB 0 +00005f 00 DCB 0 + + AREA ||i.init_mipi_tx||, CODE, READONLY, ALIGN=2 + + init_mipi_tx PROC +;;;2439 +;;;2440 static void init_mipi_tx(void) +000000 b570 PUSH {r4-r6,lr} +;;;2441 { +;;;2442 if (g_tx_ctrl_handle == NULL) +000002 4c19 LDR r4,|L14.104| +000004 6a20 LDR r0,[r4,#0x20] ; g_tx_ctrl_handle +000006 2800 CMP r0,#0 +000008 d102 BNE |L14.16| +;;;2443 { +;;;2444 g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); +00000a f7fffffe BL hal_dsi_tx_ctrl_create_handle +00000e 6220 STR r0,[r4,#0x20] ; g_tx_ctrl_handle + |L14.16| +;;;2445 } +;;;2446 g_tx_ctrl_handle->channel_id = OUTPUT_VC; +000010 2100 MOVS r1,#0 +000012 7081 STRB r1,[r0,#2] +;;;2447 g_tx_ctrl_handle->lane_num = OUTPUT_LANE_NUMBER; +000014 2204 MOVS r2,#4 +000016 7042 STRB r2,[r0,#1] +;;;2448 g_tx_ctrl_handle->vid_mode = OUTPUT_VIDEO_MODEL; +000018 2202 MOVS r2,#2 +00001a 70c2 STRB r2,[r0,#3] +;;;2449 g_tx_ctrl_handle->cmd_tx_type = _CMD_TYPE; +00001c 2301 MOVS r3,#1 +;;;2450 g_tx_ctrl_handle->dpi_vsa = OUTPUT_VSA; +;;;2451 g_tx_ctrl_handle->dpi_vbp = OUTPUT_VBP; +00001e 2408 MOVS r4,#8 +000020 7103 STRB r3,[r0,#4] ;2449 +000022 220c MOVS r2,#0xc ;2450 +;;;2452 g_tx_ctrl_handle->dpi_vfp = OUTPUT_VFP; +000024 2538 MOVS r5,#0x38 +000026 1906 ADDS r6,r0,r4 +000028 c634 STM r6!,{r2,r4,r5} +;;;2453 g_tx_ctrl_handle->dpi_hsa = OUTPUT_HSA; +;;;2454 g_tx_ctrl_handle->dpi_hbp = OUTPUT_HBP; +;;;2455 g_tx_ctrl_handle->dpi_hfp = OUTPUT_HFP; +00002a 6144 STR r4,[r0,#0x14] +00002c 6182 STR r2,[r0,#0x18] +00002e 2278 MOVS r2,#0x78 +;;;2456 g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; +000030 61c2 STR r2,[r0,#0x1c] +000032 2287 MOVS r2,#0x87 +000034 00d2 LSLS r2,r2,#3 +;;;2457 g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; +000036 244b MOVS r4,#0x4b +000038 0164 LSLS r4,r4,#5 +;;;2458 g_tx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; +00003a 6202 STR r2,[r0,#0x20] +;;;2459 g_tx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; +00003c 6244 STR r4,[r0,#0x24] +;;;2460 g_tx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; +00003e 62c4 STR r4,[r0,#0x2c] +000040 6282 STR r2,[r0,#0x28] +000042 4602 MOV r2,r0 +000044 3220 ADDS r2,r2,#0x20 +000046 7411 STRB r1,[r2,#0x10] +;;;2461 g_tx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; +000048 7453 STRB r3,[r2,#0x11] +;;;2462 g_tx_ctrl_handle->tx_line_delay = 800; +00004a 2219 MOVS r2,#0x19 +00004c 0152 LSLS r2,r2,#5 +;;;2463 g_tx_ctrl_handle->tx_clkawayshs = false; +00004e 63c2 STR r2,[r0,#0x3c] +000050 2244 MOVS r2,#0x44 +000052 5411 STRB r1,[r2,r0] +;;;2464 g_tx_ctrl_handle->tx_frame_rate = OUTPUT_FRAME_RATE; +000054 4905 LDR r1,|L14.108| +;;;2465 +;;;2466 hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); +000056 6401 STR r1,[r0,#0x40] +000058 f7fffffe BL hal_dsi_tx_ctrl_init +;;;2467 /* AP ûзʱĬϵʾɫ, Ϊ0 0 0(ɫ), ɫΪdebugʹ */ +;;;2468 hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); +00005c 2200 MOVS r2,#0 +00005e 4611 MOV r1,r2 +000060 4610 MOV r0,r2 +000062 f7fffffe BL hal_dsi_tx_ctrl_set_overwrite_rgb +;;;2469 +;;;2470 // hal_dsi_tx_ctrl_set_partial_disp_area(0, 0, 2400, 540); +;;;2471 // hal_dsi_tx_ctrl_set_partial_disp(ENABLE); +;;;2472 } +000066 bd70 POP {r4-r6,pc} +;;;2473 + ENDP + + |L14.104| + DCD ||.data|| + |L14.108| + DCD 0x42700000 + + AREA ||i.init_panel||, CODE, READONLY, ALIGN=2 + + init_panel PROC +;;;2334 +;;;2335 static void init_panel(void) +000000 b5fe PUSH {r1-r7,lr} +000002 2001 MOVS r0,#1 +000004 f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin +000008 200a MOVS r0,#0xa +00000a f7fffffe BL delayMs +00000e 2000 MOVS r0,#0 +000010 f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin +000014 200a MOVS r0,#0xa +000016 f7fffffe BL delayMs +00001a 2001 MOVS r0,#1 +00001c f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin +000020 200a MOVS r0,#0xa +000022 f7fffffe BL delayMs +;;;2336 { +;;;2337 // uint8_t data[10] = {0}; +;;;2338 /* reset panel*/ +;;;2339 tx_panel_reset(); +;;;2340 +;;;2341 // hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH);//LED_ON +;;;2342 +;;;2343 /* enter send initial code mode*/ +;;;2344 hal_dsi_tx_ctrl_enter_init_panel_mode(); +000026 f7fffffe BL hal_dsi_tx_ctrl_enter_init_panel_mode +;;;2345 +;;;2346 +;;;2347 #if AMOLED_NT37701_CSOT667 +;;;2348 #if PANEL_INIT_CODE_ARRAY +;;;2349 send_panel_init_code(sizeof(panel_init_code), panel_init_code); +00002a 4f1a LDR r7,|L15.148| +00002c 4d1a LDR r5,|L15.152| +00002e 2400 MOVS r4,#0 + |L15.48| +000030 192b ADDS r3,r5,r4 +000032 789e LDRB r6,[r3,#2] +000034 7859 LDRB r1,[r3,#1] +000036 5d28 LDRB r0,[r5,r4] +000038 4632 MOV r2,r6 +00003a 1cdb ADDS r3,r3,#3 +00003c f7fffffe BL hal_dsi_tx_ctrl_write_array_cmd +000040 19a4 ADDS r4,r4,r6 +000042 2032 MOVS r0,#0x32 +000044 1ce4 ADDS r4,r4,#3 +000046 f7fffffe BL delayUs +00004a 42bc CMP r4,r7 +00004c d3f0 BCC |L15.48| +;;;2350 +;;;2351 #if 0 +;;;2352 // hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x01); //0FFF +;;;2353 hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH);//LED_ON +;;;2354 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); +;;;2355 delayMs(70); //20 +;;;2356 Gpio_swire_output(2, 38); //38 +;;;2357 delayMs(20); //100 +;;;2358 #else +;;;2359 hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x01); //0FFF +00004e 2101 MOVS r1,#1 +000050 2000 MOVS r0,#0 +000052 9101 STR r1,[sp,#4] +000054 9000 STR r0,[sp,#0] +000056 4601 MOV r1,r0 +000058 2351 MOVS r3,#0x51 +00005a 2203 MOVS r2,#3 +00005c 2029 MOVS r0,#0x29 +00005e f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;2360 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); +000062 2311 MOVS r3,#0x11 +000064 2201 MOVS r2,#1 +000066 2100 MOVS r1,#0 +000068 2005 MOVS r0,#5 +00006a f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;2361 hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH);//LED_ON +00006e 2101 MOVS r1,#1 +000070 2013 MOVS r0,#0x13 +000072 f7fffffe BL hal_gpio_init_output +;;;2362 delayMs(90); +000076 205a MOVS r0,#0x5a +000078 f7fffffe BL delayMs +;;;2363 +;;;2364 #endif +;;;2365 +;;;2366 #endif +;;;2367 #endif +;;;2368 +;;;2369 /* exit send initial code mode*/ +;;;2370 hal_dsi_tx_ctrl_exit_init_panel_mode(); +00007c f7fffffe BL hal_dsi_tx_ctrl_exit_init_panel_mode +;;;2371 delayMs(20); +000080 2014 MOVS r0,#0x14 +000082 f7fffffe BL delayMs +;;;2372 TAU_LOGD("init code"); +000086 4a05 LDR r2,|L15.156| +000088 4905 LDR r1,|L15.160| +00008a a006 ADR r0,|L15.164| +00008c f7fffffe BL LOG_printf +;;;2373 } +000090 bdfe POP {r1-r7,pc} +;;;2374 + ENDP + +000092 0000 DCW 0x0000 + |L15.148| + DCD 0x000026ef + |L15.152| + DCD ||.constdata||+0x78 + |L15.156| + DCD 0x00000944 + |L15.160| + DCD ||i.set_tear_on||+0x4c + |L15.164| +0000a4 5b25735d DCB "[%s] (%04d) init code",0 +0000a8 20282530 +0000ac 34642920 +0000b0 696e6974 +0000b4 20636f64 +0000b8 6500 +0000ba 00 DCB 0 +0000bb 00 DCB 0 + + AREA ||i.open_mipi_rx||, CODE, READONLY, ALIGN=2 + + open_mipi_rx PROC +;;;2374 +;;;2375 static void open_mipi_rx(void) +000000 b510 PUSH {r4,lr} +;;;2376 { +;;;2377 /* TE */ +;;;2378 hal_gpio_set_mode(IO_PAD_AP_TE, IO_MODE_TEAR); +000002 2100 MOVS r1,#0 +000004 2003 MOVS r0,#3 +000006 f7fffffe BL hal_gpio_set_mode +;;;2379 +;;;2380 if (g_rx_ctrl_handle == NULL) +00000a 4c19 LDR r4,|L16.112| +00000c 69e0 LDR r0,[r4,#0x1c] ; g_rx_ctrl_handle +00000e 2800 CMP r0,#0 +000010 d102 BNE |L16.24| +;;;2381 { +;;;2382 /* rx ctrl handle */ +;;;2383 g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); +000012 f7fffffe BL hal_dsi_rx_ctrl_create_handle +000016 61e0 STR r0,[r4,#0x1c] ; g_rx_ctrl_handle + |L16.24| +;;;2384 } +;;;2385 /* ò */ +;;;2386 g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; +000018 2187 MOVS r1,#0x87 +;;;2387 g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; +00001a 224b MOVS r2,#0x4b +00001c 00c9 LSLS r1,r1,#3 ;2386 +00001e 0152 LSLS r2,r2,#5 +000020 c006 STM r0!,{r1,r2} +;;;2388 g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; +;;;2389 g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; +;;;2390 g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; +000022 6042 STR r2,[r0,#4] +000024 6001 STR r1,[r0,#0] +000026 2200 MOVS r2,#0 +000028 7202 STRB r2,[r0,#8] +;;;2391 g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; +00002a 2101 MOVS r1,#1 +00002c 7241 STRB r1,[r0,#9] +;;;2392 g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; +00002e 2304 MOVS r3,#4 +000030 7503 STRB r3,[r0,#0x14] +;;;2393 g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; +000032 7543 STRB r3,[r0,#0x15] +;;;2394 g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; /* ɲ */ +000034 7581 STRB r1,[r0,#0x16] +;;;2395 g_rx_ctrl_handle->rx_vc = INPUT_VC; +000036 75c2 STRB r2,[r0,#0x17] +;;;2396 g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; +000038 7602 STRB r2,[r0,#0x18] +;;;2397 g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; +00003a 490e LDR r1,|L16.116| +;;;2398 g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; /* ע DCSб */ +00003c 61c1 STR r1,[r0,#0x1c] +00003e 4601 MOV r1,r0 +000040 4b0d LDR r3,|L16.120| +000042 3178 ADDS r1,r1,#0x78 +;;;2399 g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; /* עdsc read ص,ѡ,˺Ϊʱcus_dcs_entry_tableִ */ +000044 628b STR r3,[r1,#0x28] +000046 4b0d LDR r3,|L16.124| +;;;2400 g_rx_ctrl_handle->pps_update_entry = pps_update_handle; +000048 62cb STR r3,[r1,#0x2c] +00004a 4b0d LDR r3,|L16.128| +;;;2401 // g_rx_ctrl_handle->pq_marginal = PQ_TYPE_5; +;;;2402 g_rx_ctrl_handle->err_handler_level = ERR_HANDLE_L3; +00004c 630b STR r3,[r1,#0x30] +00004e 2303 MOVS r3,#3 +000050 3120 ADDS r1,r1,#0x20 +000052 770b STRB r3,[r1,#0x1c] +;;;2403 +;;;2404 #if defined(ISP_568) || defined(ISP_368) +;;;2405 g_rx_ctrl_handle->base_info.extra_info.rot_angle = VIDOE_ROT_ANGLE_0; +000054 7382 STRB r2,[r0,#0xe] +;;;2406 g_rx_ctrl_handle->base_info.extra_info.mirror_en = false; +000056 7342 STRB r2,[r0,#0xd] +;;;2407 +;;;2408 g_rx_ctrl_handle->hight_performan_mode = HIGHT_PERFORMAN_NONE; //HIGHT_PERFORMAN_L2; +000058 77ca STRB r2,[r1,#0x1f] +00005a 3808 SUBS r0,r0,#8 +;;;2409 // g_rx_ctrl_handle->base_info.extra_info.ltpo = LTPO_MODE_2; +;;;2410 // g_rx_ctrl_handle->pu_optimize = true; +;;;2411 #endif +;;;2412 +;;;2413 /* ǰԤPPS, AP PPS cmdҲ */ +;;;2414 if (g_rx_ctrl_handle->compress_en == true) +;;;2415 { +;;;2416 uint8_t pps[128] = {0x11,0x00,0x00,0x89,0x30,0x80,0x09,0x60,0x04,0x38,0x00,0x1E,0x02,0x1C,0x02,0x1C, +;;;2417 0x02,0x00,0x02,0x0E,0x00,0x20,0x02,0xE3,0x00,0x07,0x00,0x0C,0x03,0x50,0x03,0x64, +;;;2418 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, +;;;2419 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, +;;;2420 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, +;;;2421 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x63,0xF4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;2422 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, +;;;2423 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; +;;;2424 +;;;2425 hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 128); +;;;2426 } +;;;2427 +;;;2428 /* ʼrx ctrl */ +;;;2429 hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); +00005c f7fffffe BL hal_dsi_rx_ctrl_init +;;;2430 +;;;2431 +;;;2432 hal_dsi_rx_ctrl_set_cus_sync_line(g_rx_ctrl_handle, 2200);// lss add, ˺1600 +000060 4908 LDR r1,|L16.132| +000062 69e0 LDR r0,[r4,#0x1c] ; g_rx_ctrl_handle +000064 f7fffffe BL hal_dsi_rx_ctrl_set_cus_sync_line +;;;2433 // hal_dsi_rx_ctrl_hight_performan_mode(g_rx_ctrl_handle); +;;;2434 // hal_dsi_rx_ctrl_set_cus_esc_clk(g_rx_ctrl_handle,20000000); +;;;2435 +;;;2436 /* rx ctrl */ +;;;2437 hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +000068 69e0 LDR r0,[r4,#0x1c] ; g_rx_ctrl_handle +00006a f7fffffe BL hal_dsi_rx_ctrl_start +;;;2438 } +00006e bd10 POP {r4,pc} +;;;2439 + ENDP + + |L16.112| + DCD ||.data|| + |L16.116| + DCD 0x4d7c6d00 + |L16.120| + DCD ||.constdata|| + |L16.124| + DCD ap_dcs_read + |L16.128| + DCD pps_update_handle + |L16.132| + DCD 0x00000898 + + AREA ||i.pps_update_handle||, CODE, READONLY, ALIGN=2 + + pps_update_handle PROC +;;;435 /* PPS update callback ڷֱлcase */ +;;;436 static bool pps_update_handle(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height) +000000 b570 PUSH {r4-r6,lr} +;;;437 { +;;;438 /* AVDD ϵ, ڽϢPPS */ +;;;439 //TAU_LOGD("[%d, %d], [%d, %d]", pic_width, pic_height, g_rx_ctrl_handle->base_info.src_w, g_rx_ctrl_handle->base_info.src_h); +;;;440 if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) +000002 490f LDR r1,|L17.64| +000004 69c8 LDR r0,[r1,#0x1c] ; g_rx_ctrl_handle +000006 6804 LDR r4,[r0,#0] +000008 4294 CMP r4,r2 +00000a d102 BNE |L17.18| +00000c 6844 LDR r4,[r0,#4] +00000e 429c CMP r4,r3 +000010 d00e BEQ |L17.48| + |L17.18| +;;;441 { +;;;442 /* PPS Update ҷֱʷ仯 */ +;;;443 +;;;444 g_rx_ctrl_handle->base_info.src_w = pic_width; +;;;445 g_rx_ctrl_handle->base_info.src_h = pic_height; +;;;446 /* עⲿֻPPSǰ Compression Mode Command */ +;;;447 g_rx_ctrl_handle->compress_en = true; +000012 4604 MOV r4,r0 +000014 c00c STM r0!,{r2,r3} +000016 2501 MOVS r5,#1 +000018 3420 ADDS r4,r4,#0x20 +00001a 7025 STRB r5,[r4,#0] +;;;448 if(pic_width > 720) +00001c 242d MOVS r4,#0x2d +00001e 0124 LSLS r4,r4,#4 +000020 3808 SUBS r0,r0,#8 +000022 42a2 CMP r2,r4 +000024 d902 BLS |L17.44| +;;;449 { +;;;450 g_tx_ctrl_handle->base_info.src_w = pic_width; +000026 6a09 LDR r1,[r1,#0x20] ; g_tx_ctrl_handle +;;;451 g_tx_ctrl_handle->base_info.src_h = pic_height; +000028 624b STR r3,[r1,#0x24] +00002a 620a STR r2,[r1,#0x20] + |L17.44| +;;;452 } +;;;453 hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); +00002c f7fffffe BL hal_dsi_rx_ctrl_toggle_resolution + |L17.48| +;;;454 +;;;455 // TAU_LOGD("resolution update w[%d] h[%d] compress[%d]\n", pic_width, pic_height, g_rx_ctrl_handle->compress_en); +;;;456 } +;;;457 +;;;458 TAU_LOGD("PPS Update"); +000030 22ff MOVS r2,#0xff +000032 32cb ADDS r2,r2,#0xcb +000034 a103 ADR r1,|L17.68| +000036 a006 ADR r0,|L17.80| +000038 f7fffffe BL LOG_printf +;;;459 return true; +00003c 2001 MOVS r0,#1 +;;;460 } +00003e bd70 POP {r4-r6,pc} +;;;461 + ENDP + + |L17.64| + DCD ||.data|| + |L17.68| +000044 4e32305f DCB "N20_NT37701",0 +000048 4e543337 +00004c 37303100 + |L17.80| +000050 5b25735d DCB "[%s] (%04d) PPS Update",0 +000054 20282530 +000058 34642920 +00005c 50505320 +000060 55706461 +000064 746500 +000067 00 DCB 0 + + AREA ||i.set_tear_on||, CODE, READONLY, ALIGN=2 + + set_tear_on PROC +;;;1060 +;;;1061 static bool set_tear_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;1062 { +;;;1063 if(panel_display_done == false){ +000002 4c10 LDR r4,|L18.68| +000004 79a0 LDRB r0,[r4,#6] ; panel_display_done +000006 2800 CMP r0,#0 +000008 d102 BNE |L18.16| +;;;1064 //hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); +;;;1065 hal_dsi_rx_ctrl_gen_a_tear_signal(g_rx_ctrl_handle); +00000a 69e0 LDR r0,[r4,#0x1c] ; g_rx_ctrl_handle +00000c f7fffffe BL hal_dsi_rx_ctrl_gen_a_tear_signal + |L18.16| +000010 7b20 LDRB r0,[r4,#0xc] ; flag_te +000012 217d MOVS r1,#0x7d +000014 0109 LSLS r1,r1,#4 +000016 2801 CMP r0,#1 +000018 d012 BEQ |L18.64| +00001a 2200 MOVS r2,#0 + |L18.28| +00001c 69e0 LDR r0,[r4,#0x1c] ; g_rx_ctrl_handle +00001e f7fffffe BL hal_dsi_rx_ctrl_set_tear_mode_ex +000022 7b23 LDRB r3,[r4,#0xc] ; flag_te +000024 4a08 LDR r2,|L18.72| +000026 a109 ADR r1,|L18.76| +000028 a00b ADR r0,|L18.88| +00002a f7fffffe BL LOG_printf +;;;1066 } +;;;1067 set_soft_tear_mode(); +;;;1068 TAU_LOGD("set tear on %d",panel_display_done); +00002e 4a06 LDR r2,|L18.72| +000030 79a3 LDRB r3,[r4,#6] ; panel_display_done +000032 3221 ADDS r2,r2,#0x21 +000034 a105 ADR r1,|L18.76| +000036 a00f ADR r0,|L18.116| +000038 f7fffffe BL LOG_printf +;;;1069 return true; +00003c 2001 MOVS r0,#1 +;;;1070 } +00003e bd10 POP {r4,pc} + |L18.64| +000040 2204 MOVS r2,#4 +000042 e7eb B |L18.28| +;;;1071 + ENDP + + |L18.68| + DCD ||.data|| + |L18.72| + DCD 0x0000040b + |L18.76| +00004c 4e32305f DCB "N20_NT37701",0 +000050 4e543337 +000054 37303100 + |L18.88| +000058 5b25735d DCB "[%s] (%04d) tear_mode %d",0 +00005c 20282530 +000060 34642920 +000064 74656172 +000068 5f6d6f64 +00006c 65202564 +000070 00 +000071 00 DCB 0 +000072 00 DCB 0 +000073 00 DCB 0 + |L18.116| +000074 5b25735d DCB "[%s] (%04d) set tear on %d",0 +000078 20282530 +00007c 34642920 +000080 73657420 +000084 74656172 +000088 206f6e20 +00008c 20256400 + + AREA ||i.soft_timer3_cb||, CODE, READONLY, ALIGN=2 + + soft_timer3_cb PROC +;;;2566 #ifdef ADD_TIMER3_FUNCTION +;;;2567 static void soft_timer3_cb(void *data) +000000 b510 PUSH {r4,lr} +;;;2568 { +;;;2569 hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); +000002 2300 MOVS r3,#0 +000004 4a0d LDR r2,|L19.60| +000006 210a MOVS r1,#0xa +000008 2003 MOVS r0,#3 +00000a f7fffffe BL hal_timer_start +;;;2570 tp_sleep_count++; +00000e 480c LDR r0,|L19.64| +000010 7801 LDRB r1,[r0,#0] ; tp_sleep_count +000012 1c49 ADDS r1,r1,#1 +000014 7001 STRB r1,[r0,#0] +;;;2571 +;;;2572 if (tp_sleep_clk_count < 0xF8) +000016 490b LDR r1,|L19.68| +000018 7808 LDRB r0,[r1,#0] ; tp_sleep_clk_count +00001a 28f8 CMP r0,#0xf8 +00001c d201 BCS |L19.34| +00001e 1c40 ADDS r0,r0,#1 +;;;2573 tp_sleep_clk_count++; +000020 7008 STRB r0,[r1,#0] + |L19.34| +;;;2574 if(phone_DisplayOFF_count>0) +000022 4809 LDR r0,|L19.72| +000024 8a01 LDRH r1,[r0,#0x10] ; phone_DisplayOFF_count +000026 2900 CMP r1,#0 +000028 d001 BEQ |L19.46| +00002a 1c49 ADDS r1,r1,#1 +;;;2575 { +;;;2576 phone_DisplayOFF_count++; +00002c 8201 STRH r1,[r0,#0x10] + |L19.46| +;;;2577 } +;;;2578 +;;;2579 if (g_panel_display_cnt) +00002e 79c1 LDRB r1,[r0,#7] ; g_panel_display_cnt +000030 2900 CMP r1,#0 +000032 d001 BEQ |L19.56| +000034 1e49 SUBS r1,r1,#1 +;;;2580 g_panel_display_cnt--; +000036 71c1 STRB r1,[r0,#7] + |L19.56| +;;;2581 +;;;2582 //TAU_LOGD("time3 init\n"); +;;;2583 +;;;2584 #if AUTO_CAL_TP +;;;2585 if (g_exit_sleep_mode) //ֹ¼ʱУ׼ģʽ +;;;2586 { +;;;2587 if (g_cal_cnt > 0) +;;;2588 { +;;;2589 g_cal_cnt--; +;;;2590 if (g_cal_cnt == 0){ +;;;2591 g_calibration_flag = true; +;;;2592 TAU_LOGD("Start cal tp!\n"); +;;;2593 } +;;;2594 } +;;;2595 } +;;;2596 #endif +;;;2597 } +000038 bd10 POP {r4,pc} +;;;2598 #endif + ENDP + +00003a 0000 DCW 0x0000 + |L19.60| + DCD soft_timer3_cb + |L19.64| + DCD tp_sleep_count + |L19.68| + DCD tp_sleep_clk_count + |L19.72| + DCD ||.data|| + + AREA ||i.translate_data||, CODE, READONLY, ALIGN=1 + + translate_data PROC +;;;669 #if 1 // +;;;670 void translate_data(void) +000000 4770 BX lr +;;;671 { +;;;672 uint16_t temp_in_max,temp_in_min; // Сֵ +;;;673 uint16_t temp_out_max,temp_out_min; // Сֵ +;;;674 +;;;675 #ifdef ADD_PWM_OUTPUT_FOR_BL +;;;676 if(value_reg_b1 <0x100) +;;;677 { +;;;678 // value_reg_b1 =0x14 ~ 0xF4Ӧ255 ~ 236(ǵ⼶Ϊ256) +;;;679 temp_in_max = 0xF4; +;;;680 temp_in_min= 0x14; +;;;681 temp_out_max = 255; +;;;682 temp_out_min= 236; +;;;683 +;;;684 if (value_reg_b1 <=temp_in_min) +;;;685 read_bl_data =temp_out_max; +;;;686 else if (value_reg_b1 >=temp_in_max) +;;;687 read_bl_data =temp_out_min; +;;;688 else +;;;689 read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); +;;;690 } +;;;691 else if(value_reg_b1 <0x180) +;;;692 { +;;;693 switch(value_reg_ca) +;;;694 { +;;;695 case 0xFB: +;;;696 case 0xED: +;;;697 temp_in_max = 0x123; +;;;698 temp_in_min= 0x101; +;;;699 temp_out_max = 235; +;;;700 temp_out_min= 232; +;;;701 if (value_reg_b1 <=temp_in_min) +;;;702 read_bl_data =temp_out_max; +;;;703 else if (value_reg_b1 >=temp_in_max) +;;;704 read_bl_data =temp_out_min; +;;;705 else +;;;706 read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); +;;;707 break; +;;;708 +;;;709 case 0xFA: +;;;710 case 0xE5: +;;;711 temp_in_max = 0x123; +;;;712 temp_in_min= 0x103; +;;;713 temp_out_max = 231; +;;;714 temp_out_min= 227; +;;;715 if (value_reg_b1 <=temp_in_min) +;;;716 read_bl_data =temp_out_max; +;;;717 else if (value_reg_b1 >=temp_in_max) +;;;718 read_bl_data =temp_out_min; +;;;719 else +;;;720 read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); +;;;721 break; +;;;722 +;;;723 case 0xF7: +;;;724 case 0xE1: +;;;725 temp_in_max = 0x156; +;;;726 temp_in_min= 0x103; +;;;727 temp_out_max = 226; +;;;728 temp_out_min= 221; +;;;729 if (value_reg_b1 <=temp_in_min) +;;;730 read_bl_data =temp_out_max; +;;;731 else if (value_reg_b1 >=temp_in_max) +;;;732 read_bl_data =temp_out_min; +;;;733 else +;;;734 read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); +;;;735 break; +;;;736 +;;;737 case 0xF4: +;;;738 case 0xD4: +;;;739 temp_in_max = 0x160; +;;;740 temp_in_min= 0x103; +;;;741 temp_out_max = 220; +;;;742 temp_out_min= 212; +;;;743 if (value_reg_b1 <=temp_in_min) +;;;744 read_bl_data =temp_out_max; +;;;745 else if (value_reg_b1 >=temp_in_max) +;;;746 read_bl_data =temp_out_min; +;;;747 else +;;;748 read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); +;;;749 break; +;;;750 +;;;751 case 0xEF: +;;;752 case 0xC6: +;;;753 temp_in_max = 0x15F; +;;;754 temp_in_min= 0x103; +;;;755 temp_out_max = 211; +;;;756 temp_out_min= 203; +;;;757 if (value_reg_b1 <=temp_in_min) +;;;758 read_bl_data =temp_out_max; +;;;759 else if (value_reg_b1 >=temp_in_max) +;;;760 read_bl_data =temp_out_min; +;;;761 else +;;;762 read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); +;;;763 break; +;;;764 +;;;765 case 0xEC: +;;;766 case 0xB7: +;;;767 temp_in_max = 0x16E; +;;;768 temp_in_min= 0x103; +;;;769 temp_out_max = 202; +;;;770 temp_out_min= 195; +;;;771 if (value_reg_b1 <=temp_in_min) +;;;772 read_bl_data =temp_out_max; +;;;773 else if (value_reg_b1 >=temp_in_max) +;;;774 read_bl_data =temp_out_min; +;;;775 else +;;;776 read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); +;;;777 break; +;;;778 +;;;779 case 0xE7: +;;;780 case 0xA9: +;;;781 temp_in_max = 0x172; +;;;782 temp_in_min= 0x103; +;;;783 temp_out_max = 194; +;;;784 temp_out_min= 185; +;;;785 if (value_reg_b1 <=temp_in_min) +;;;786 read_bl_data =temp_out_max; +;;;787 else if (value_reg_b1 >=temp_in_max) +;;;788 read_bl_data =temp_out_min; +;;;789 else +;;;790 read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); +;;;791 break; +;;;792 +;;;793 case 0xE2: +;;;794 case 0x9A: +;;;795 temp_in_max = 0x171; +;;;796 temp_in_min= 0x103; +;;;797 temp_out_max = 183; +;;;798 temp_out_min= 176; +;;;799 if (value_reg_b1 <=temp_in_min) +;;;800 read_bl_data =temp_out_max; +;;;801 else if (value_reg_b1 >=temp_in_max) +;;;802 read_bl_data =temp_out_min; +;;;803 else +;;;804 read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); +;;;805 break; +;;;806 +;;;807 case 0xDE: +;;;808 case 0x8A: +;;;809 temp_in_max = 0x170; +;;;810 temp_in_min= 0x103; +;;;811 temp_out_max = 175; +;;;812 temp_out_min= 167; +;;;813 if (value_reg_b1 <=temp_in_min) +;;;814 read_bl_data =temp_out_max; +;;;815 else if (value_reg_b1 >=temp_in_max) +;;;816 read_bl_data =temp_out_min; +;;;817 else +;;;818 read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); +;;;819 break; +;;;820 +;;;821 default: +;;;822 read_bl_data =166; +;;;823 break; +;;;824 } +;;;825 } +;;;826 else if(value_reg_b1 <0x340) +;;;827 { +;;;828 // value_reg_b1 =0x184 ~ 0x33AӦ165 ~ 137(ǵ⼶Ϊ256) +;;;829 temp_in_max = 0x33A; +;;;830 temp_in_min= 0x184; +;;;831 temp_out_max = 165; +;;;832 temp_out_min= 137; +;;;833 +;;;834 if (value_reg_b1 <=temp_in_min) +;;;835 read_bl_data =temp_out_max; +;;;836 else if (value_reg_b1 >=temp_in_max) +;;;837 read_bl_data =temp_out_min; +;;;838 else +;;;839 read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); +;;;840 } +;;;841 else if(value_reg_b1 <0x39A) +;;;842 { +;;;843 switch(value_reg_ca) +;;;844 { +;;;845 case 0xDB: +;;;846 case 0x86: +;;;847 temp_in_max = 0x393; +;;;848 temp_in_min= 0x348; +;;;849 temp_out_max = 136; +;;;850 temp_out_min= 130; +;;;851 if (value_reg_b1 <=temp_in_min) +;;;852 read_bl_data =temp_out_max; +;;;853 else if (value_reg_b1 >=temp_in_max) +;;;854 read_bl_data =temp_out_min; +;;;855 else +;;;856 read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); +;;;857 break; +;;;858 +;;;859 case 0xD7: +;;;860 case 0x77: +;;;861 if(value_reg_b1 ==0x34A) +;;;862 read_bl_data = 129; +;;;863 else +;;;864 read_bl_data = 128; +;;;865 break; +;;;866 +;;;867 case 0xD4: +;;;868 case 0x69: +;;;869 if(value_reg_b1 ==0x34A) +;;;870 read_bl_data = 127; +;;;871 else +;;;872 read_bl_data = 126; +;;;873 break; +;;;874 +;;;875 case 0xCF: +;;;876 case 0x60: +;;;877 if(value_reg_b1 ==0x34A) +;;;878 read_bl_data = 125; +;;;879 else +;;;880 read_bl_data = 124; +;;;881 break; +;;;882 +;;;883 case 0xCC: +;;;884 case 0x59: +;;;885 if(value_reg_b1 ==0x34A) +;;;886 read_bl_data = 123; +;;;887 else +;;;888 read_bl_data = 122; +;;;889 break; +;;;890 +;;;891 case 0xC9: +;;;892 case 0x4F: +;;;893 if(value_reg_b1 ==0x34A) +;;;894 read_bl_data = 121; +;;;895 else +;;;896 read_bl_data = 120; +;;;897 break; +;;;898 +;;;899 case 0xC5: +;;;900 case 0x46: +;;;901 if(value_reg_b1 ==0x34A) +;;;902 read_bl_data = 119; +;;;903 else +;;;904 read_bl_data = 118; +;;;905 break; +;;;906 +;;;907 case 0xC2: +;;;908 case 0x3F: +;;;909 if(value_reg_b1 ==0x34A) +;;;910 read_bl_data = 117; +;;;911 else +;;;912 read_bl_data = 116; +;;;913 break; +;;;914 +;;;915 case 0xBD: +;;;916 case 0x34: +;;;917 if(value_reg_b1 ==0x34A) +;;;918 read_bl_data = 115; +;;;919 else +;;;920 read_bl_data = 114; +;;;921 break; +;;;922 +;;;923 case 0xB9: +;;;924 case 0x2C: +;;;925 if(value_reg_b1 ==0x34A) +;;;926 read_bl_data = 113; +;;;927 else +;;;928 read_bl_data = 112; +;;;929 break; +;;;930 +;;;931 case 0xB5: +;;;932 case 0x22: +;;;933 if(value_reg_b1 ==0x34A) +;;;934 read_bl_data = 111; +;;;935 else +;;;936 read_bl_data = 110; +;;;937 break; +;;;938 +;;;939 case 0xB2: +;;;940 case 0x1E: +;;;941 if(value_reg_b1 ==0x34A) +;;;942 read_bl_data = 109; +;;;943 else +;;;944 read_bl_data = 108; +;;;945 break; +;;;946 +;;;947 case 0xB0: +;;;948 case 0x15: +;;;949 if(value_reg_b1 ==0x34A) +;;;950 read_bl_data = 107; +;;;951 else +;;;952 read_bl_data = 106; +;;;953 break; +;;;954 +;;;955 case 0xAC: +;;;956 case 0x0D: +;;;957 if(value_reg_b1 ==0x34A) +;;;958 read_bl_data = 105; +;;;959 else +;;;960 read_bl_data = 104; +;;;961 break; +;;;962 +;;;963 case 0xAA: +;;;964 case 0x09: +;;;965 if(value_reg_b1 ==0x34A) +;;;966 read_bl_data = 103; +;;;967 else +;;;968 read_bl_data = 102; +;;;969 break; +;;;970 +;;;971 case 0xA5: +;;;972 case 0x05: +;;;973 if(value_reg_b1 ==0x34A) +;;;974 read_bl_data = 101; +;;;975 else +;;;976 read_bl_data = 100; +;;;977 break; +;;;978 +;;;979 default: +;;;980 if(value_reg_b1 ==0x34A) +;;;981 read_bl_data = 99; +;;;982 else +;;;983 read_bl_data = 98; +;;;984 break; +;;;985 } +;;;986 +;;;987 } +;;;988 #if 0// 򲹶ʱ绰Ϩ󱳹ⰵ +;;;989 else if(value_reg_b1 ==0x8DC) +;;;990 { +;;;991 // value_reg_b1 =0x39A ~ 0x8DCӦ97~ 1(ǵ⼶Ϊ256) +;;;992 temp_in_max = 0x8DC; +;;;993 temp_in_min= 0x39A; +;;;994 temp_out_max = 97; +;;;995 temp_out_min= 1; +;;;996 +;;;997 if (value_reg_b1 <=temp_in_min) +;;;998 read_bl_data =temp_out_max; +;;;999 else if (value_reg_b1 >=temp_in_max) +;;;1000 read_bl_data =temp_out_min; +;;;1001 else +;;;1002 read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); +;;;1003 } +;;;1004 #endif +;;;1005 else //if(value_reg_b1 <0x8DC) +;;;1006 { +;;;1007 // value_reg_b1 =0x39A ~ 0x8DCӦ97~ 1(ǵ⼶Ϊ256) +;;;1008 temp_in_max = 0x8DC; +;;;1009 temp_in_min= 0x39A; +;;;1010 temp_out_max = 97; +;;;1011 temp_out_min= 1; +;;;1012 +;;;1013 if (value_reg_b1 <=temp_in_min) +;;;1014 read_bl_data =temp_out_max; +;;;1015 else if (value_reg_b1 >=temp_in_max) +;;;1016 read_bl_data =temp_out_min; +;;;1017 else +;;;1018 read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); +;;;1019 } +;;;1020 +;;;1021 #endif +;;;1022 +;;;1023 } +;;;1024 + ENDP + + + AREA ||.constdata||, DATA, READONLY, ALIGN=2 + + g_cus_rx_dcs_execute_table + DCD 0x00000029 + DCD ap_set_display_on +000008 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000028 + DCD ap_set_display_off +000014 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000035 + DCD set_tear_on +000020 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x000000df + DCD ap_get_reg_df +00002c 00000000 DCB 0x00,0x00,0x00,0x00 + DCD 0x000000ca + DCD ap_get_reg_ca +000038 00000000 DCB 0x00,0x00,0x00,0x00 + DCD 0x00000051 + DCD ap_set_backlight_51 +000044 00000000 DCB 0x00,0x00,0x00,0x00 + DCD 0x00000004 + DCD ap_set_tp_calibration_04 +000050 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000010 + DCD ap_set_enter_sleep_mode +00005c 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000011 + DCD ap_set_exit_sleep_mode +000068 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000000 + DCD 0x00000000 +000074 00000000 DCB 0x00,0x00,0x00,0x00 + panel_init_code +000078 390006f0 DCB 0x39,0x00,0x06,0xf0 +00007c 55aa5208 DCB 0x55,0xaa,0x52,0x08 +000080 00390009 DCB 0x00,0x39,0x00,0x09 +000084 ba027900 DCB 0xba,0x02,0x79,0x00 +000088 14039c00 DCB 0x14,0x03,0x9c,0x00 +00008c 01390002 DCB 0x01,0x39,0x00,0x02 +000090 6f083900 DCB 0x6f,0x08,0x39,0x00 +000094 09ba01af DCB 0x09,0xba,0x01,0xaf +000098 0014001c DCB 0x00,0x14,0x00,0x1c +00009c 00003900 DCB 0x00,0x00,0x39,0x00 +0000a0 026f1039 DCB 0x02,0x6f,0x10,0x39 +0000a4 0008ba01 DCB 0x00,0x08,0xba,0x01 +0000a8 66001400 DCB 0x66,0x00,0x14,0x00 +0000ac 1c003900 DCB 0x1c,0x00,0x39,0x00 +0000b0 09bb0279 DCB 0x09,0xbb,0x02,0x79 +0000b4 0014039c DCB 0x00,0x14,0x03,0x9c +0000b8 00213900 DCB 0x00,0x21,0x39,0x00 +0000bc 02b58439 DCB 0x02,0xb5,0x84,0x39 +0000c0 00026f06 DCB 0x00,0x02,0x6f,0x06 +0000c4 390004b5 DCB 0x39,0x00,0x04,0xb5 +0000c8 2b0c3339 DCB 0x2b,0x0c,0x33,0x39 +0000cc 00026f0b DCB 0x00,0x02,0x6f,0x0b +0000d0 390004b5 DCB 0x39,0x00,0x04,0xb5 +0000d4 2b233339 DCB 0x2b,0x23,0x33,0x39 +0000d8 00026f10 DCB 0x00,0x02,0x6f,0x10 +0000dc 390006b5 DCB 0x39,0x00,0x06,0xb5 +0000e0 0c0c0c0c DCB 0x0c,0x0c,0x0c,0x0c +0000e4 0c390002 DCB 0x0c,0x39,0x00,0x02 +0000e8 6f013900 DCB 0x6f,0x01,0x39,0x00 +0000ec 02b61939 DCB 0x02,0xb6,0x19,0x39 +0000f0 0013b799 DCB 0x00,0x13,0xb7,0x99 +0000f4 99999999 DCB 0x99,0x99,0x99,0x99 +0000f8 99876543 DCB 0x99,0x87,0x65,0x43 +0000fc 32100000 DCB 0x32,0x10,0x00,0x00 +000100 00000000 DCB 0x00,0x00,0x00,0x00 +000104 00390002 DCB 0x00,0x39,0x00,0x02 +000108 6f133900 DCB 0x6f,0x13,0x39,0x00 +00010c 0db70000 DCB 0x0d,0xb7,0x00,0x00 +000110 01137889 DCB 0x01,0x13,0x78,0x89 +000114 9aabbccd DCB 0x9a,0xab,0xbc,0xcd +000118 deef3900 DCB 0xde,0xef,0x39,0x00 +00011c 026f1f39 DCB 0x02,0x6f,0x1f,0x39 +000120 0019b708 DCB 0x00,0x19,0xb7,0x08 +000124 31668ff5 DCB 0x31,0x66,0x8f,0xf5 +000128 c1c233ff DCB 0xc1,0xc2,0x33,0xff +00012c 7fff7fff DCB 0x7f,0xff,0x7f,0xff +000130 7fff7fff DCB 0x7f,0xff,0x7f,0xff +000134 7fff7fff DCB 0x7f,0xff,0x7f,0xff +000138 7fffff39 DCB 0x7f,0xff,0xff,0x39 +00013c 0003b298 DCB 0x00,0x03,0xb2,0x98 +000140 60390002 DCB 0x60,0x39,0x00,0x02 +000144 6f093900 DCB 0x6f,0x09,0x39,0x00 +000148 02b24039 DCB 0x02,0xb2,0x40,0x39 +00014c 00026f0f DCB 0x00,0x02,0x6f,0x0f +000150 390009b2 DCB 0x39,0x00,0x09,0xb2 +000154 202021c2 DCB 0x20,0x20,0x21,0xc2 +000158 21c22fff DCB 0x21,0xc2,0x2f,0xff +00015c 39000db3 DCB 0x39,0x00,0x0d,0xb3 +000160 0008001c DCB 0x00,0x08,0x00,0x1c +000164 001c003c DCB 0x00,0x1c,0x00,0x3c +000168 003c0070 DCB 0x00,0x3c,0x00,0x70 +00016c 3900026f DCB 0x39,0x00,0x02,0x6f +000170 0c39000d DCB 0x0c,0x39,0x00,0x0d +000174 b3007000 DCB 0xb3,0x00,0x70,0x00 +000178 c800c801 DCB 0xc8,0x00,0xc8,0x01 +00017c 48014801 DCB 0x48,0x01,0x48,0x01 +000180 ad390002 DCB 0xad,0x39,0x00,0x02 +000184 6f183900 DCB 0x6f,0x18,0x39,0x00 +000188 0db301ad DCB 0x0d,0xb3,0x01,0xad +00018c 01c201c2 DCB 0x01,0xc2,0x01,0xc2 +000190 01c207ff DCB 0x01,0xc2,0x07,0xff +000194 0fff3900 DCB 0x0f,0xff,0x39,0x00 +000198 026f2439 DCB 0x02,0x6f,0x24,0x39 +00019c 0009b301 DCB 0x00,0x09,0xb3,0x01 +0001a0 5508cc08 DCB 0x55,0x08,0xcc,0x08 +0001a4 cc0fff39 DCB 0xcc,0x0f,0xff,0x39 +0001a8 00026f2c DCB 0x00,0x02,0x6f,0x2c +0001ac 39000fb3 DCB 0x39,0x00,0x0f,0xb3 +0001b0 099008dc DCB 0x09,0x90,0x08,0xdc +0001b4 08700870 DCB 0x08,0x70,0x08,0x70 +0001b8 07c807c8 DCB 0x07,0xc8,0x07,0xc8 +0001bc 06b83900 DCB 0x06,0xb8,0x39,0x00 +0001c0 026f3a39 DCB 0x02,0x6f,0x3a,0x39 +0001c4 000db306 DCB 0x00,0x0d,0xb3,0x06 +0001c8 b804e804 DCB 0xb8,0x04,0xe8,0x04 +0001cc e8024802 DCB 0xe8,0x02,0x48,0x02 +0001d0 48003839 DCB 0x48,0x00,0x38,0x39 +0001d4 00026f46 DCB 0x00,0x02,0x6f,0x46 +0001d8 39000db3 DCB 0x39,0x00,0x0d,0xb3 +0001dc 00380038 DCB 0x00,0x38,0x00,0x38 +0001e0 00380038 DCB 0x00,0x38,0x00,0x38 +0001e4 00380038 DCB 0x00,0x38,0x00,0x38 +0001e8 39000fb4 DCB 0x39,0x00,0x0f,0xb4 +0001ec 0d100c1c DCB 0x0d,0x10,0x0c,0x1c +0001f0 0b880b88 DCB 0x0b,0x88,0x0b,0x88 +0001f4 0aa00aa0 DCB 0x0a,0xa0,0x0a,0xa0 +0001f8 09283900 DCB 0x09,0x28,0x39,0x00 +0001fc 026f0e39 DCB 0x02,0x6f,0x0e,0x39 +000200 000db409 DCB 0x00,0x0d,0xb4,0x09 +000204 2806b006 DCB 0x28,0x06,0xb0,0x06 +000208 b0031803 DCB 0xb0,0x03,0x18,0x03 +00020c 18004839 DCB 0x18,0x00,0x48,0x39 +000210 00026f1a DCB 0x00,0x02,0x6f,0x1a +000214 39000db4 DCB 0x39,0x00,0x0d,0xb4 +000218 00480048 DCB 0x00,0x48,0x00,0x48 +00021c 00480048 DCB 0x00,0x48,0x00,0x48 +000220 00480048 DCB 0x00,0x48,0x00,0x48 +000224 3900026f DCB 0x39,0x00,0x02,0x6f +000228 2639000b DCB 0x26,0x39,0x00,0x0b +00022c b40d1000 DCB 0xb4,0x0d,0x10,0x00 +000230 48004800 DCB 0x48,0x00,0x48,0x00 +000234 48004839 DCB 0x48,0x00,0x48,0x39 +000238 00026f30 DCB 0x00,0x02,0x6f,0x30 +00023c 39000fb4 DCB 0x39,0x00,0x0f,0xb4 +000240 099008dc DCB 0x09,0x90,0x08,0xdc +000244 08700870 DCB 0x08,0x70,0x08,0x70 +000248 07c807c8 DCB 0x07,0xc8,0x07,0xc8 +00024c 06b83900 DCB 0x06,0xb8,0x39,0x00 +000250 026f3e39 DCB 0x02,0x6f,0x3e,0x39 +000254 000db406 DCB 0x00,0x0d,0xb4,0x06 +000258 b804e804 DCB 0xb8,0x04,0xe8,0x04 +00025c e8024802 DCB 0xe8,0x02,0x48,0x02 +000260 48003839 DCB 0x48,0x00,0x38,0x39 +000264 00026f4a DCB 0x00,0x02,0x6f,0x4a +000268 39000db4 DCB 0x39,0x00,0x0d,0xb4 +00026c 00380038 DCB 0x00,0x38,0x00,0x38 +000270 00380038 DCB 0x00,0x38,0x00,0x38 +000274 00380038 DCB 0x00,0x38,0x00,0x38 +000278 3900026f DCB 0x39,0x00,0x02,0x6f +00027c ac390015 DCB 0xac,0x39,0x00,0x15 +000280 b20fff0f DCB 0xb2,0x0f,0xff,0x0f +000284 ff080908 DCB 0xff,0x08,0x09,0x08 +000288 6c08ca09 DCB 0x6c,0x08,0xca,0x09 +00028c 24097909 DCB 0x24,0x09,0x79,0x09 +000290 cb0a1a0a DCB 0xcb,0x0a,0x1a,0x0a +000294 66390002 DCB 0x66,0x39,0x00,0x02 +000298 6fc03900 DCB 0x6f,0xc0,0x39,0x00 +00029c 15b20ab0 DCB 0x15,0xb2,0x0a,0xb0 +0002a0 0af70b3d DCB 0x0a,0xf7,0x0b,0x3d +0002a4 0b800bc1 DCB 0x0b,0x80,0x0b,0xc1 +0002a8 0c010c40 DCB 0x0c,0x01,0x0c,0x40 +0002ac 0c7c0cb8 DCB 0x0c,0x7c,0x0c,0xb8 +0002b0 0cf23900 DCB 0x0c,0xf2,0x39,0x00 +0002b4 026fd439 DCB 0x02,0x6f,0xd4,0x39 +0002b8 0015b20d DCB 0x00,0x15,0xb2,0x0d +0002bc 2b0d630d DCB 0x2b,0x0d,0x63,0x0d +0002c0 9a0dcf0e DCB 0x9a,0x0d,0xcf,0x0e +0002c4 040e380e DCB 0x04,0x0e,0x38,0x0e +0002c8 6b0e9d0e DCB 0x6b,0x0e,0x9d,0x0e +0002cc cf0eff39 DCB 0xcf,0x0e,0xff,0x39 +0002d0 00026fe8 DCB 0x00,0x02,0x6f,0xe8 +0002d4 39000bb2 DCB 0x39,0x00,0x0b,0xb2 +0002d8 0f2f0f5e DCB 0x0f,0x2f,0x0f,0x5e +0002dc 0f8d0fbb DCB 0x0f,0x8d,0x0f,0xbb +0002e0 0fff3900 DCB 0x0f,0xff,0x39,0x00 +0002e4 026f5239 DCB 0x02,0x6f,0x52,0x39 +0002e8 0015b301 DCB 0x00,0x15,0xb3,0x01 +0002ec c201c301 DCB 0xc2,0x01,0xc3,0x01 +0002f0 f5022702 DCB 0xf5,0x02,0x27,0x02 +0002f4 59028b02 DCB 0x59,0x02,0x8b,0x02 +0002f8 bd02ef03 DCB 0xbd,0x02,0xef,0x03 +0002fc 21035339 DCB 0x21,0x03,0x53,0x39 +000300 00026f66 DCB 0x00,0x02,0x6f,0x66 +000304 390015b3 DCB 0x39,0x00,0x15,0xb3 +000308 038403b6 DCB 0x03,0x84,0x03,0xb6 +00030c 03e8041a DCB 0x03,0xe8,0x04,0x1a +000310 044c047e DCB 0x04,0x4c,0x04,0x7e +000314 04b004e2 DCB 0x04,0xb0,0x04,0xe2 +000318 05140546 DCB 0x05,0x14,0x05,0x46 +00031c 3900026f DCB 0x39,0x00,0x02,0x6f +000320 7a390015 DCB 0x7a,0x39,0x00,0x15 +000324 b3057805 DCB 0xb3,0x05,0x78,0x05 +000328 a905db06 DCB 0xa9,0x05,0xdb,0x06 +00032c 0d063f06 DCB 0x0d,0x06,0x3f,0x06 +000330 7106a306 DCB 0x71,0x06,0xa3,0x06 +000334 d5070707 DCB 0xd5,0x07,0x07,0x07 +000338 39390002 DCB 0x39,0x39,0x00,0x02 +00033c 6f8e3900 DCB 0x6f,0x8e,0x39,0x00 +000340 09b3076b DCB 0x09,0xb3,0x07,0x6b +000344 079d07ce DCB 0x07,0x9d,0x07,0xce +000348 07ff3900 DCB 0x07,0xff,0x39,0x00 +00034c 03b90096 DCB 0x03,0xb9,0x00,0x96 +000350 390003bd DCB 0x39,0x00,0x03,0xbd +000354 04b03900 DCB 0x04,0xb0,0x39,0x00 +000358 04c076f3 DCB 0x04,0xc0,0x76,0xf3 +00035c c1390002 DCB 0xc1,0x39,0x00,0x02 +000360 6f083900 DCB 0x6f,0x08,0x39,0x00 +000364 02c04039 DCB 0x02,0xc0,0x40,0x39 +000368 00026f09 DCB 0x00,0x02,0x6f,0x09 +00036c 390003c0 DCB 0x39,0x00,0x03,0xc0 +000370 20203900 DCB 0x20,0x20,0x39,0x00 +000374 026f0239 DCB 0x02,0x6f,0x02,0x39 +000378 0007c124 DCB 0x00,0x07,0xc1,0x24 +00037c 86005700 DCB 0x86,0x00,0x57,0x00 +000380 45390002 DCB 0x45,0x39,0x00,0x02 +000384 6f0a3900 DCB 0x6f,0x0a,0x39,0x00 +000388 03c10086 DCB 0x03,0xc1,0x00,0x86 +00038c 390002c5 DCB 0x39,0x00,0x02,0xc5 +000390 05390002 DCB 0x05,0x39,0x00,0x02 +000394 6f083900 DCB 0x6f,0x08,0x39,0x00 +000398 02c30039 DCB 0x02,0xc3,0x00,0x39 +00039c 000fc655 DCB 0x00,0x0f,0xc6,0x55 +0003a0 55555555 DCB 0x55,0x55,0x55,0x55 +0003a4 55555555 DCB 0x55,0x55,0x55,0x55 +0003a8 55555555 DCB 0x55,0x55,0x55,0x55 +0003ac 55390002 DCB 0x55,0x39,0x00,0x02 +0003b0 ca123900 DCB 0xca,0x12,0x39,0x00 +0003b4 02b90039 DCB 0x02,0xb9,0x00,0x39 +0003b8 0005be0e DCB 0x00,0x05,0xbe,0x0e +0003bc 0b141339 DCB 0x0b,0x14,0x13,0x39 +0003c0 00026f05 DCB 0x00,0x02,0x6f,0x05 +0003c4 390002be DCB 0x39,0x00,0x02,0xbe +0003c8 8a390006 DCB 0x8a,0x39,0x00,0x06 +0003cc f055aa52 DCB 0xf0,0x55,0xaa,0x52 +0003d0 08003900 DCB 0x08,0x00,0x39,0x00 +0003d4 026f2a39 DCB 0x02,0x6f,0x2a,0x39 +0003d8 0002d943 DCB 0x00,0x02,0xd9,0x43 +0003dc 390006f0 DCB 0x39,0x00,0x06,0xf0 +0003e0 55aa5208 DCB 0x55,0xaa,0x52,0x08 +0003e4 0139000b DCB 0x01,0x39,0x00,0x0b +0003e8 b500b000 DCB 0xb5,0x00,0xb0,0x00 +0003ec 98009800 DCB 0x98,0x00,0x98,0x00 +0003f0 b0009839 DCB 0xb0,0x00,0x98,0x39 +0003f4 000bb601 DCB 0x00,0x0b,0xb6,0x01 +0003f8 3800d000 DCB 0x38,0x00,0xd0,0x00 +0003fc d0013800 DCB 0xd0,0x01,0x38,0x00 +000400 d039000d DCB 0xd0,0x39,0x00,0x0d +000404 c200b001 DCB 0xc2,0x00,0xb0,0x01 +000408 3800b001 DCB 0x38,0x00,0xb0,0x01 +00040c 3800b001 DCB 0x38,0x00,0xb0,0x01 +000410 38390003 DCB 0x38,0x39,0x00,0x03 +000414 b0040439 DCB 0xb0,0x04,0x04,0x39 +000418 0003b313 DCB 0x00,0x03,0xb3,0x13 +00041c 13390007 DCB 0x13,0x39,0x00,0x07 +000420 b71b1b1b DCB 0xb7,0x1b,0x1b,0x1b +000424 1b1b1b39 DCB 0x1b,0x1b,0x1b,0x39 +000428 0003b108 DCB 0x00,0x03,0xb1,0x08 +00042c 08390003 DCB 0x08,0x39,0x00,0x03 +000430 b4131339 DCB 0xb4,0x13,0x13,0x39 +000434 0008b846 DCB 0x00,0x08,0xb8,0x46 +000438 46464646 DCB 0x46,0x46,0x46,0x46 +00043c 46463900 DCB 0x46,0x46,0x39,0x00 +000440 1db9001f DCB 0x1d,0xb9,0x00,0x1f +000444 0000001f DCB 0x00,0x00,0x00,0x1f +000448 00001f00 DCB 0x00,0x00,0x1f,0x00 +00044c 001f0000 DCB 0x00,0x1f,0x00,0x00 +000450 00000000 DCB 0x00,0x00,0x00,0x00 +000454 1f1f1f1f DCB 0x1f,0x1f,0x1f,0x1f +000458 1f000000 DCB 0x1f,0x00,0x00,0x00 +00045c 00003900 DCB 0x00,0x00,0x39,0x00 +000460 06bb0394 DCB 0x06,0xbb,0x03,0x94 +000464 00193c39 DCB 0x00,0x19,0x3c,0x39 +000468 00026f05 DCB 0x00,0x02,0x6f,0x05 +00046c 390014bb DCB 0x39,0x00,0x14,0xbb +000470 1b1b1b1b DCB 0x1b,0x1b,0x1b,0x1b +000474 1b1b1b1b DCB 0x1b,0x1b,0x1b,0x1b +000478 1b1b2020 DCB 0x1b,0x1b,0x20,0x20 +00047c 20202020 DCB 0x20,0x20,0x20,0x20 +000480 20202039 DCB 0x20,0x20,0x20,0x39 +000484 00026f18 DCB 0x00,0x02,0x6f,0x18 +000488 390014bb DCB 0x39,0x00,0x14,0xbb +00048c 1b1b1b1b DCB 0x1b,0x1b,0x1b,0x1b +000490 1b1b1b1b DCB 0x1b,0x1b,0x1b,0x1b +000494 1b1b2020 DCB 0x1b,0x1b,0x20,0x20 +000498 20202020 DCB 0x20,0x20,0x20,0x20 +00049c 20202039 DCB 0x20,0x20,0x20,0x39 +0004a0 00026f2b DCB 0x00,0x02,0x6f,0x2b +0004a4 390014bb DCB 0x39,0x00,0x14,0xbb +0004a8 1b1b1b1b DCB 0x1b,0x1b,0x1b,0x1b +0004ac 1b1b1b1b DCB 0x1b,0x1b,0x1b,0x1b +0004b0 1b1b2020 DCB 0x1b,0x1b,0x20,0x20 +0004b4 20202020 DCB 0x20,0x20,0x20,0x20 +0004b8 20202039 DCB 0x20,0x20,0x20,0x39 +0004bc 00026f3e DCB 0x00,0x02,0x6f,0x3e +0004c0 390014bb DCB 0x39,0x00,0x14,0xbb +0004c4 1b1b1b1b DCB 0x1b,0x1b,0x1b,0x1b +0004c8 1b1b1b1b DCB 0x1b,0x1b,0x1b,0x1b +0004cc 1b1b2020 DCB 0x1b,0x1b,0x20,0x20 +0004d0 20202020 DCB 0x20,0x20,0x20,0x20 +0004d4 20202039 DCB 0x20,0x20,0x20,0x39 +0004d8 0005ba10 DCB 0x00,0x05,0xba,0x10 +0004dc 10101039 DCB 0x10,0x10,0x10,0x39 +0004e0 0003c480 DCB 0x00,0x03,0xc4,0x80 +0004e4 03390002 DCB 0x03,0x39,0x00,0x02 +0004e8 c7013900 DCB 0xc7,0x01,0x39,0x00 +0004ec 03cd0581 DCB 0x03,0xcd,0x05,0x81 +0004f0 390002cf DCB 0x39,0x00,0x02,0xcf +0004f4 1d390002 DCB 0x1d,0x39,0x00,0x02 +0004f8 6f013900 DCB 0x6f,0x01,0x39,0x00 +0004fc 05ce0001 DCB 0x05,0xce,0x00,0x01 +000500 00003900 DCB 0x00,0x00,0x39,0x00 +000504 026f0939 DCB 0x02,0x6f,0x09,0x39 +000508 0002d200 DCB 0x00,0x02,0xd2,0x00 +00050c 3900026f DCB 0x39,0x00,0x02,0x6f +000510 10390002 DCB 0x10,0x39,0x00,0x02 +000514 d80c3900 DCB 0xd8,0x0c,0x39,0x00 +000518 02d9ab39 DCB 0x02,0xd9,0xab,0x39 +00051c 0002d107 DCB 0x00,0x02,0xd1,0x07 +000520 3900026f DCB 0x39,0x00,0x02,0x6f +000524 02390002 DCB 0x02,0x39,0x00,0x02 +000528 d1063900 DCB 0xd1,0x06,0x39,0x00 +00052c 026f0539 DCB 0x02,0x6f,0x05,0x39 +000530 0002d106 DCB 0x00,0x02,0xd1,0x06 +000534 390003d6 DCB 0x39,0x00,0x03,0xd6 +000538 00403900 DCB 0x00,0x40,0x39,0x00 +00053c 06f055aa DCB 0x06,0xf0,0x55,0xaa +000540 52080239 DCB 0x52,0x08,0x02,0x39 +000544 0019b900 DCB 0x00,0x19,0xb9,0x00 +000548 04000c00 DCB 0x04,0x00,0x0c,0x00 +00054c 14001c00 DCB 0x14,0x00,0x1c,0x00 +000550 2c003c00 DCB 0x2c,0x00,0x3c,0x00 +000554 4c005c00 DCB 0x4c,0x00,0x5c,0x00 +000558 7c009c00 DCB 0x7c,0x00,0x9c,0x00 +00055c bc00dc39 DCB 0xbc,0x00,0xdc,0x39 +000560 0019ba00 DCB 0x00,0x19,0xba,0x00 +000564 fc013c01 DCB 0xfc,0x01,0x3c,0x01 +000568 7c01bc01 DCB 0x7c,0x01,0xbc,0x01 +00056c fc027c02 DCB 0xfc,0x02,0x7c,0x02 +000570 fc037c03 DCB 0xfc,0x03,0x7c,0x03 +000574 bc03dc03 DCB 0xbc,0x03,0xdc,0x03 +000578 fc03ff39 DCB 0xfc,0x03,0xff,0x39 +00057c 0002bc11 DCB 0x00,0x02,0xbc,0x11 +000580 390011bd DCB 0x39,0x00,0x11,0xbd +000584 96006900 DCB 0x96,0x00,0x69,0x00 +000588 00960069 DCB 0x00,0x96,0x00,0x69 +00058c bb4444bb DCB 0xbb,0x44,0x44,0xbb +000590 ee1111ee DCB 0xee,0x11,0x11,0xee +000594 390002c1 DCB 0x39,0x00,0x02,0xc1 +000598 02390009 DCB 0x02,0x39,0x00,0x09 +00059c c2190091 DCB 0xc2,0x19,0x00,0x91 +0005a0 00190091 DCB 0x00,0x19,0x00,0x91 +0005a4 00390003 DCB 0x00,0x39,0x00,0x03 +0005a8 c0000039 DCB 0xc0,0x00,0x00,0x39 +0005ac 0002ce01 DCB 0x00,0x02,0xce,0x01 +0005b0 390002cc DCB 0x39,0x00,0x02,0xcc +0005b4 00390006 DCB 0x00,0x39,0x00,0x06 +0005b8 f055aa52 DCB 0xf0,0x55,0xaa,0x52 +0005bc 08023900 DCB 0x08,0x02,0x39,0x00 +0005c0 02cc3039 DCB 0x02,0xcc,0x30,0x39 +0005c4 0006f055 DCB 0x00,0x06,0xf0,0x55 +0005c8 aa520802 DCB 0xaa,0x52,0x08,0x02 +0005cc 390002bf DCB 0x39,0x00,0x02,0xbf +0005d0 09390013 DCB 0x09,0x39,0x00,0x13 +0005d4 b0000002 DCB 0xb0,0x00,0x00,0x02 +0005d8 3c028a02 DCB 0x3c,0x02,0x8a,0x02 +0005dc d8031903 DCB 0xd8,0x03,0x19,0x03 +0005e0 99040204 DCB 0x99,0x04,0x02,0x04 +0005e4 5804ac39 DCB 0x58,0x04,0xac,0x39 +0005e8 0013b105 DCB 0x00,0x13,0xb1,0x05 +0005ec 3705a706 DCB 0x37,0x05,0xa7,0x06 +0005f0 15066f06 DCB 0x15,0x06,0x6f,0x06 +0005f4 c7075d07 DCB 0xc7,0x07,0x5d,0x07 +0005f8 e1085e08 DCB 0xe1,0x08,0x5e,0x08 +0005fc d239000f DCB 0xd2,0x39,0x00,0x0f +000600 b209b80a DCB 0xb2,0x09,0xb8,0x0a +000604 910b680b DCB 0x91,0x0b,0x68,0x0b +000608 d70c120c DCB 0xd7,0x0c,0x12,0x0c +00060c 4a0c4a39 DCB 0x4a,0x0c,0x4a,0x39 +000610 0013b300 DCB 0x00,0x13,0xb3,0x00 +000614 0001b002 DCB 0x00,0x01,0xb0,0x02 +000618 29027502 DCB 0x29,0x02,0x75,0x02 +00061c b7033803 DCB 0xb7,0x03,0x38,0x03 +000620 9803e404 DCB 0x98,0x03,0xe4,0x04 +000624 2e390013 DCB 0x2e,0x39,0x00,0x13 +000628 b404a405 DCB 0xb4,0x04,0xa4,0x05 +00062c 05056505 DCB 0x05,0x05,0x65,0x05 +000630 b3060006 DCB 0xb3,0x06,0x00,0x06 +000634 7f06f507 DCB 0x7f,0x06,0xf5,0x07 +000638 6007c139 DCB 0x60,0x07,0xc1,0x39 +00063c 000fb508 DCB 0x00,0x0f,0xb5,0x08 +000640 80093309 DCB 0x80,0x09,0x33,0x09 +000644 e40a380a DCB 0xe4,0x0a,0x38,0x0a +000648 610a8c0a DCB 0x61,0x0a,0x8c,0x0a +00064c 8c390013 DCB 0x8c,0x39,0x00,0x13 +000650 b6000001 DCB 0xb6,0x00,0x00,0x01 +000654 e6026c02 DCB 0xe6,0x02,0x6c,0x02 +000658 dc033103 DCB 0xdc,0x03,0x31,0x03 +00065c d7045304 DCB 0xd7,0x04,0x53,0x04 +000660 b4051439 DCB 0xb4,0x05,0x14,0x39 +000664 0013b705 DCB 0x00,0x13,0xb7,0x05 +000668 a4061a06 DCB 0xa4,0x06,0x1a,0x06 +00066c 8e06ef07 DCB 0x8e,0x06,0xef,0x07 +000670 4e07ec08 DCB 0x4e,0x07,0xec,0x08 +000674 7d090309 DCB 0x7d,0x09,0x03,0x09 +000678 8339000f DCB 0x83,0x39,0x00,0x0f +00067c b80a7f0b DCB 0xb8,0x0a,0x7f,0x0b +000680 790c720c DCB 0x79,0x0c,0x72,0x0c +000684 fb0d420d DCB 0xfb,0x0d,0x42,0x0d +000688 8e0d8e39 DCB 0x8e,0x0d,0x8e,0x39 +00068c 0002bf08 DCB 0x00,0x02,0xbf,0x08 +000690 390013b0 DCB 0x39,0x00,0x13,0xb0 +000694 00000290 DCB 0x00,0x00,0x02,0x90 +000698 02cc0308 DCB 0x02,0xcc,0x03,0x08 +00069c 034003ad DCB 0x03,0x40,0x03,0xad +0006a0 04040459 DCB 0x04,0x04,0x04,0x59 +0006a4 049d3900 DCB 0x04,0x9d,0x39,0x00 +0006a8 13b10522 DCB 0x13,0xb1,0x05,0x22 +0006ac 058d05eb DCB 0x05,0x8d,0x05,0xeb +0006b0 06470696 DCB 0x06,0x47,0x06,0x96 +0006b4 071b079f DCB 0x07,0x1b,0x07,0x9f +0006b8 080f087d DCB 0x08,0x0f,0x08,0x7d +0006bc 39000fb2 DCB 0x39,0x00,0x0f,0xb2 +0006c0 09420a05 DCB 0x09,0x42,0x0a,0x05 +0006c4 0abf0b1b DCB 0x0a,0xbf,0x0b,0x1b +0006c8 0b4c0b7c DCB 0x0b,0x4c,0x0b,0x7c +0006cc 0b7c3900 DCB 0x0b,0x7c,0x39,0x00 +0006d0 13b30000 DCB 0x13,0xb3,0x00,0x00 +0006d4 0226026e DCB 0x02,0x26,0x02,0x6e +0006d8 029b02d0 DCB 0x02,0x9b,0x02,0xd0 +0006dc 03370386 DCB 0x03,0x37,0x03,0x86 +0006e0 03d4040f DCB 0x03,0xd4,0x04,0x0f +0006e4 390013b4 DCB 0x39,0x00,0x13,0xb4 +0006e8 048104df DCB 0x04,0x81,0x04,0xdf +0006ec 052f057e DCB 0x05,0x2f,0x05,0x7e +0006f0 05c10636 DCB 0x05,0xc1,0x06,0x36 +0006f4 06a9070b DCB 0x06,0xa9,0x07,0x0b +0006f8 076c3900 DCB 0x07,0x6c,0x39,0x00 +0006fc 0fb50810 DCB 0x0f,0xb5,0x08,0x10 +000700 08b2094e DCB 0x08,0xb2,0x09,0x4e +000704 099a09c0 DCB 0x09,0x9a,0x09,0xc0 +000708 09e709e7 DCB 0x09,0xe7,0x09,0xe7 +00070c 390013b6 DCB 0x39,0x00,0x13,0xb6 +000710 00000245 DCB 0x00,0x00,0x02,0x45 +000714 02a602f7 DCB 0x02,0xa6,0x02,0xf7 +000718 034403db DCB 0x03,0x44,0x03,0xdb +00071c 044504ae DCB 0x04,0x45,0x04,0xae +000720 04f93900 DCB 0x04,0xf9,0x39,0x00 +000724 13b7058c DCB 0x13,0xb7,0x05,0x8c +000728 06020664 DCB 0x06,0x02,0x06,0x64 +00072c 06c40716 DCB 0x06,0xc4,0x07,0x16 +000730 07a3082f DCB 0x07,0xa3,0x08,0x2f +000734 08ac0927 DCB 0x08,0xac,0x09,0x27 +000738 39000fb8 DCB 0x39,0x00,0x0f,0xb8 +00073c 0a000ad8 DCB 0x0a,0x00,0x0a,0xd8 +000740 0bad0c16 DCB 0x0b,0xad,0x0c,0x16 +000744 0c4d0c87 DCB 0x0c,0x4d,0x0c,0x87 +000748 0c873900 DCB 0x0c,0x87,0x39,0x00 +00074c 02bf0739 DCB 0x02,0xbf,0x07,0x39 +000750 0013b000 DCB 0x00,0x13,0xb0,0x00 +000754 00027602 DCB 0x00,0x02,0x76,0x02 +000758 9202ae02 DCB 0x92,0x02,0xae,0x02 +00075c ca030603 DCB 0xca,0x03,0x06,0x03 +000760 45037c03 DCB 0x45,0x03,0x7c,0x03 +000764 af390013 DCB 0xaf,0x39,0x00,0x13 +000768 b1040f04 DCB 0xb1,0x04,0x0f,0x04 +00076c 5f04ad04 DCB 0x5f,0x04,0xad,0x04 +000770 f1052e05 DCB 0xf1,0x05,0x2e,0x05 +000774 9705f806 DCB 0x97,0x05,0xf8,0x06 +000778 4f069e39 DCB 0x4f,0x06,0x9e,0x39 +00077c 000fb207 DCB 0x00,0x0f,0xb2,0x07 +000780 2a07a608 DCB 0x2a,0x07,0xa6,0x08 +000784 19084e08 DCB 0x19,0x08,0x4e,0x08 +000788 68088208 DCB 0x68,0x08,0x82,0x08 +00078c 82390013 DCB 0x82,0x39,0x00,0x13 +000790 b3000002 DCB 0xb3,0x00,0x00,0x02 +000794 24024202 DCB 0x24,0x02,0x42,0x02 +000798 60027302 DCB 0x60,0x02,0x73,0x02 +00079c 9f02d403 DCB 0x9f,0x02,0xd4,0x03 +0007a0 08033a39 DCB 0x08,0x03,0x3a,0x39 +0007a4 0013b403 DCB 0x00,0x13,0xb4,0x03 +0007a8 8e03d604 DCB 0x8e,0x03,0xd6,0x04 +0007ac 1c045504 DCB 0x1c,0x04,0x55,0x04 +0007b0 8a04e805 DCB 0x8a,0x04,0xe8,0x05 +0007b4 3b058505 DCB 0x3b,0x05,0x85,0x05 +0007b8 cc39000f DCB 0xcc,0x39,0x00,0x0f +0007bc b5064306 DCB 0xb5,0x06,0x43,0x06 +0007c0 af071207 DCB 0xaf,0x07,0x12,0x07 +0007c4 41075707 DCB 0x41,0x07,0x57,0x07 +0007c8 6c076c39 DCB 0x6c,0x07,0x6c,0x39 +0007cc 0013b600 DCB 0x00,0x13,0xb6,0x00 +0007d0 00023902 DCB 0x00,0x02,0x39,0x02 +0007d4 64028f02 DCB 0x64,0x02,0x8f,0x02 +0007d8 b3030403 DCB 0xb3,0x03,0x04,0x03 +0007dc 5803a203 DCB 0x58,0x03,0xa2,0x03 +0007e0 e4390013 DCB 0xe4,0x39,0x00,0x13 +0007e4 b7045704 DCB 0xb7,0x04,0x57,0x04 +0007e8 b5050d05 DCB 0xb5,0x05,0x0d,0x05 +0007ec 55059706 DCB 0x55,0x05,0x97,0x06 +0007f0 0a067006 DCB 0x0a,0x06,0x70,0x06 +0007f4 c9072139 DCB 0xc9,0x07,0x21,0x39 +0007f8 000fb807 DCB 0x00,0x0f,0xb8,0x07 +0007fc b2083808 DCB 0xb2,0x08,0x38,0x08 +000800 b308ed09 DCB 0xb3,0x08,0xed,0x09 +000804 0a092609 DCB 0x0a,0x09,0x26,0x09 +000808 26390002 DCB 0x26,0x39,0x00,0x02 +00080c bf063900 DCB 0xbf,0x06,0x39,0x00 +000810 13b00000 DCB 0x13,0xb0,0x00,0x00 +000814 026d028b DCB 0x02,0x6d,0x02,0x8b +000818 02a902c7 DCB 0x02,0xa9,0x02,0xc7 +00081c 0303033c DCB 0x03,0x03,0x03,0x3c +000820 037403a8 DCB 0x03,0x74,0x03,0xa8 +000824 390013b1 DCB 0x39,0x00,0x13,0xb1 +000828 04050453 DCB 0x04,0x05,0x04,0x53 +00082c 04a004e3 DCB 0x04,0xa0,0x04,0xe3 +000830 051b0587 DCB 0x05,0x1b,0x05,0x87 +000834 05eb0640 DCB 0x05,0xeb,0x06,0x40 +000838 06943900 DCB 0x06,0x94,0x39,0x00 +00083c 0fb2071e DCB 0x0f,0xb2,0x07,0x1e +000840 07980806 DCB 0x07,0x98,0x08,0x06 +000844 083d0857 DCB 0x08,0x3d,0x08,0x57 +000848 08720872 DCB 0x08,0x72,0x08,0x72 +00084c 390013b3 DCB 0x39,0x00,0x13,0xb3 +000850 00000229 DCB 0x00,0x00,0x02,0x29 +000854 0244025f DCB 0x02,0x44,0x02,0x5f +000858 0270029c DCB 0x02,0x70,0x02,0x9c +00085c 02d00303 DCB 0x02,0xd0,0x03,0x03 +000860 03363900 DCB 0x03,0x36,0x39,0x00 +000864 13b40387 DCB 0x13,0xb4,0x03,0x87 +000868 03cb040d DCB 0x03,0xcb,0x04,0x0d +00086c 04480479 DCB 0x04,0x48,0x04,0x79 +000870 04d9052f DCB 0x04,0xd9,0x05,0x2f +000874 057805bf DCB 0x05,0x78,0x05,0xbf +000878 39000fb5 DCB 0x39,0x00,0x0f,0xb5 +00087c 063706a1 DCB 0x06,0x37,0x06,0xa1 +000880 07020731 DCB 0x07,0x02,0x07,0x31 +000884 0747075d DCB 0x07,0x47,0x07,0x5d +000888 075d3900 DCB 0x07,0x5d,0x39,0x00 +00088c 13b60000 DCB 0x13,0xb6,0x00,0x00 +000890 02390263 DCB 0x02,0x39,0x02,0x63 +000894 028d02b0 DCB 0x02,0x8d,0x02,0xb0 +000898 0300034d DCB 0x03,0x00,0x03,0x4d +00089c 039803de DCB 0x03,0x98,0x03,0xde +0008a0 390013b7 DCB 0x39,0x00,0x13,0xb7 +0008a4 044d04a6 DCB 0x04,0x4d,0x04,0xa6 +0008a8 04fe0545 DCB 0x04,0xfe,0x05,0x45 +0008ac 058205f9 DCB 0x05,0x82,0x05,0xf9 +0008b0 066206bc DCB 0x06,0x62,0x06,0xbc +0008b4 07153900 DCB 0x07,0x15,0x39,0x00 +0008b8 0fb807a5 DCB 0x0f,0xb8,0x07,0xa5 +0008bc 0828089f DCB 0x08,0x28,0x08,0x9f +0008c0 08da08f6 DCB 0x08,0xda,0x08,0xf6 +0008c4 09110911 DCB 0x09,0x11,0x09,0x11 +0008c8 390002bf DCB 0x39,0x00,0x02,0xbf +0008cc 05390013 DCB 0x05,0x39,0x00,0x13 +0008d0 b0000002 DCB 0xb0,0x00,0x00,0x02 +0008d4 9802ae02 DCB 0x98,0x02,0xae,0x02 +0008d8 c402da03 DCB 0xc4,0x02,0xda,0x03 +0008dc 10034403 DCB 0x10,0x03,0x44,0x03 +0008e0 7703a839 DCB 0x77,0x03,0xa8,0x39 +0008e4 0013b104 DCB 0x00,0x13,0xb1,0x04 +0008e8 07045c04 DCB 0x07,0x04,0x5c,0x04 +0008ec a504e605 DCB 0xa5,0x04,0xe6,0x05 +0008f0 1b058105 DCB 0x1b,0x05,0x81,0x05 +0008f4 e5063606 DCB 0xe5,0x06,0x36,0x06 +0008f8 8639000f DCB 0x86,0x39,0x00,0x0f +0008fc b2071207 DCB 0xb2,0x07,0x12,0x07 +000900 8907f708 DCB 0x89,0x07,0xf7,0x08 +000904 2d084808 DCB 0x2d,0x08,0x48,0x08 +000908 60086039 DCB 0x60,0x08,0x60,0x39 +00090c 0013b300 DCB 0x00,0x13,0xb3,0x00 +000910 00024102 DCB 0x00,0x02,0x41,0x02 +000914 59027102 DCB 0x59,0x02,0x71,0x02 +000918 8002a702 DCB 0x80,0x02,0xa7,0x02 +00091c d6030303 DCB 0xd6,0x03,0x03,0x03 +000920 30390013 DCB 0x30,0x39,0x00,0x13 +000924 b4038703 DCB 0xb4,0x03,0x87,0x03 +000928 d2041104 DCB 0xd2,0x04,0x11,0x04 +00092c 4b047d04 DCB 0x4b,0x04,0x7d,0x04 +000930 d5052b05 DCB 0xd5,0x05,0x2b,0x05 +000934 7205b739 DCB 0x72,0x05,0xb7,0x39 +000938 000fb506 DCB 0x00,0x0f,0xb5,0x06 +00093c 2f069806 DCB 0x2f,0x06,0x98,0x06 +000940 f7072507 DCB 0xf7,0x07,0x25,0x07 +000944 3c075107 DCB 0x3c,0x07,0x51,0x07 +000948 51390013 DCB 0x51,0x39,0x00,0x13 +00094c b6000002 DCB 0xb6,0x00,0x00,0x02 +000950 54027902 DCB 0x54,0x02,0x79,0x02 +000954 9e02bd03 DCB 0x9e,0x02,0xbd,0x03 +000958 06034e03 DCB 0x06,0x03,0x4e,0x03 +00095c 9403d239 DCB 0x94,0x03,0xd2,0x39 +000960 0013b704 DCB 0x00,0x13,0xb7,0x04 +000964 4b04ad04 DCB 0x4b,0x04,0xad,0x04 +000968 ff054805 DCB 0xff,0x05,0x48,0x05 +00096c 8405f106 DCB 0x84,0x05,0xf1,0x06 +000970 5d06b407 DCB 0x5d,0x06,0xb4,0x07 +000974 0939000f DCB 0x09,0x39,0x00,0x0f +000978 b8079c08 DCB 0xb8,0x07,0x9c,0x08 +00097c 1d089208 DCB 0x1d,0x08,0x92,0x08 +000980 cb08e709 DCB 0xcb,0x08,0xe7,0x09 +000984 02090239 DCB 0x02,0x09,0x02,0x39 +000988 0002bf04 DCB 0x00,0x02,0xbf,0x04 +00098c 390013b0 DCB 0x39,0x00,0x13,0xb0 +000990 000002a2 DCB 0x00,0x00,0x02,0xa2 +000994 02b902d0 DCB 0x02,0xb9,0x02,0xd0 +000998 02e70318 DCB 0x02,0xe7,0x03,0x18 +00099c 034b037d DCB 0x03,0x4b,0x03,0x7d +0009a0 03b23900 DCB 0x03,0xb2,0x39,0x00 +0009a4 13b10403 DCB 0x13,0xb1,0x04,0x03 +0009a8 04530495 DCB 0x04,0x53,0x04,0x95 +0009ac 04d60511 DCB 0x04,0xd6,0x05,0x11 +0009b0 057a05dc DCB 0x05,0x7a,0x05,0xdc +0009b4 062d067d DCB 0x06,0x2d,0x06,0x7d +0009b8 39000fb2 DCB 0x39,0x00,0x0f,0xb2 +0009bc 07010777 DCB 0x07,0x01,0x07,0x77 +0009c0 07e40818 DCB 0x07,0xe4,0x08,0x18 +0009c4 08310849 DCB 0x08,0x31,0x08,0x49 +0009c8 08493900 DCB 0x08,0x49,0x39,0x00 +0009cc 13b30000 DCB 0x13,0xb3,0x00,0x00 +0009d0 02650279 DCB 0x02,0x65,0x02,0x79 +0009d4 028d029a DCB 0x02,0x8d,0x02,0x9a +0009d8 02c002ec DCB 0x02,0xc0,0x02,0xec +0009dc 03160345 DCB 0x03,0x16,0x03,0x45 +0009e0 390013b4 DCB 0x39,0x00,0x13,0xb4 +0009e4 039003da DCB 0x03,0x90,0x03,0xda +0009e8 0415044e DCB 0x04,0x15,0x04,0x4e +0009ec 048304df DCB 0x04,0x83,0x04,0xdf +0009f0 05310577 DCB 0x05,0x31,0x05,0x77 +0009f4 05bb3900 DCB 0x05,0xbb,0x39,0x00 +0009f8 0fb50631 DCB 0x0f,0xb5,0x06,0x31 +0009fc 069806f7 DCB 0x06,0x98,0x06,0xf7 +000a00 07230738 DCB 0x07,0x23,0x07,0x38 +000a04 074c074c DCB 0x07,0x4c,0x07,0x4c +000a08 390013b6 DCB 0x39,0x00,0x13,0xb6 +000a0c 0000027a DCB 0x00,0x00,0x02,0x7a +000a10 029602b2 DCB 0x02,0x96,0x02,0xb2 +000a14 02ca0310 DCB 0x02,0xca,0x03,0x10 +000a18 03550399 DCB 0x03,0x55,0x03,0x99 +000a1c 03dc3900 DCB 0x03,0xdc,0x39,0x00 +000a20 13b70440 DCB 0x13,0xb7,0x04,0x40 +000a24 04a204ee DCB 0x04,0xa2,0x04,0xee +000a28 05380579 DCB 0x05,0x38,0x05,0x79 +000a2c 05ee0654 DCB 0x05,0xee,0x06,0x54 +000a30 06a906fc DCB 0x06,0xa9,0x06,0xfc +000a34 39000fb8 DCB 0x39,0x00,0x0f,0xb8 +000a38 078a0809 DCB 0x07,0x8a,0x08,0x09 +000a3c 088008b8 DCB 0x08,0x80,0x08,0xb8 +000a40 08d208ec DCB 0x08,0xd2,0x08,0xec +000a44 08ec3900 DCB 0x08,0xec,0x39,0x00 +000a48 02bf0339 DCB 0x02,0xbf,0x03,0x39 +000a4c 0013b000 DCB 0x00,0x13,0xb0,0x00 +000a50 0002ea02 DCB 0x00,0x02,0xea,0x02 +000a54 fb030c03 DCB 0xfb,0x03,0x0c,0x03 +000a58 1d034003 DCB 0x1d,0x03,0x40,0x03 +000a5c 6c039603 DCB 0x6c,0x03,0x96,0x03 +000a60 be390013 DCB 0xbe,0x39,0x00,0x13 +000a64 b1040d04 DCB 0xb1,0x04,0x0d,0x04 +000a68 52049104 DCB 0x52,0x04,0x91,0x04 +000a6c cf050605 DCB 0xcf,0x05,0x06,0x05 +000a70 6a05c306 DCB 0x6a,0x05,0xc3,0x06 +000a74 13066239 DCB 0x13,0x06,0x62,0x39 +000a78 000fb206 DCB 0x00,0x0f,0xb2,0x06 +000a7c e5075907 DCB 0xe5,0x07,0x59,0x07 +000a80 c007f208 DCB 0xc0,0x07,0xf2,0x08 +000a84 0a082108 DCB 0x0a,0x08,0x21,0x08 +000a88 21390013 DCB 0x21,0x39,0x00,0x13 +000a8c b3000002 DCB 0xb3,0x00,0x00,0x02 +000a90 9502aa02 DCB 0x95,0x02,0xaa,0x02 +000a94 bf02d402 DCB 0xbf,0x02,0xd4,0x02 +000a98 ef031103 DCB 0xef,0x03,0x11,0x03 +000a9c 34035539 DCB 0x34,0x03,0x55,0x39 +000aa0 0013b403 DCB 0x00,0x13,0xb4,0x03 +000aa4 9e03dd04 DCB 0x9e,0x03,0xdd,0x04 +000aa8 15044b04 DCB 0x15,0x04,0x4b,0x04 +000aac 7d04d505 DCB 0x7d,0x04,0xd5,0x05 +000ab0 21056605 DCB 0x21,0x05,0x66,0x05 +000ab4 aa39000f DCB 0xaa,0x39,0x00,0x0f +000ab8 b5061906 DCB 0xb5,0x06,0x19,0x06 +000abc 7d06d707 DCB 0x7d,0x06,0xd7,0x07 +000ac0 03071707 DCB 0x03,0x07,0x17,0x07 +000ac4 2b072b39 DCB 0x2b,0x07,0x2b,0x39 +000ac8 0013b600 DCB 0x00,0x13,0xb6,0x00 +000acc 0002a402 DCB 0x00,0x02,0xa4,0x02 +000ad0 c202e002 DCB 0xc2,0x02,0xe0,0x02 +000ad4 fe033103 DCB 0xfe,0x03,0x31,0x03 +000ad8 6c03a303 DCB 0x6c,0x03,0xa3,0x03 +000adc d8390013 DCB 0xd8,0x39,0x00,0x13 +000ae0 b7044004 DCB 0xb7,0x04,0x40,0x04 +000ae4 9504e005 DCB 0x95,0x04,0xe0,0x05 +000ae8 29056905 DCB 0x29,0x05,0x69,0x05 +000aec d8063806 DCB 0xd8,0x06,0x38,0x06 +000af0 8e06e239 DCB 0x8e,0x06,0xe2,0x39 +000af4 000fb807 DCB 0x00,0x0f,0xb8,0x07 +000af8 6d07e808 DCB 0x6d,0x07,0xe8,0x08 +000afc 58088e08 DCB 0x58,0x08,0x8e,0x08 +000b00 a808c108 DCB 0xa8,0x08,0xc1,0x08 +000b04 c1390002 DCB 0xc1,0x39,0x00,0x02 +000b08 bf023900 DCB 0xbf,0x02,0x39,0x00 +000b0c 13b00000 DCB 0x13,0xb0,0x00,0x00 +000b10 03240334 DCB 0x03,0x24,0x03,0x34 +000b14 03440354 DCB 0x03,0x44,0x03,0x54 +000b18 03740394 DCB 0x03,0x74,0x03,0x94 +000b1c 03b403d3 DCB 0x03,0xb4,0x03,0xd3 +000b20 390013b1 DCB 0x39,0x00,0x13,0xb1 +000b24 04160453 DCB 0x04,0x16,0x04,0x53 +000b28 048b04c1 DCB 0x04,0x8b,0x04,0xc1 +000b2c 04f20551 DCB 0x04,0xf2,0x05,0x51 +000b30 05a705f2 DCB 0x05,0xa7,0x05,0xf2 +000b34 063e3900 DCB 0x06,0x3e,0x39,0x00 +000b38 0fb206b9 DCB 0x0f,0xb2,0x06,0xb9 +000b3c 0726078e DCB 0x07,0x26,0x07,0x8e +000b40 07be07d4 DCB 0x07,0xbe,0x07,0xd4 +000b44 07ea07ea DCB 0x07,0xea,0x07,0xea +000b48 390013b3 DCB 0x39,0x00,0x13,0xb3 +000b4c 000002b7 DCB 0x00,0x00,0x02,0xb7 +000b50 02cd02e3 DCB 0x02,0xcd,0x02,0xe3 +000b54 02f90325 DCB 0x02,0xf9,0x03,0x25 +000b58 0341035b DCB 0x03,0x41,0x03,0x5b +000b5c 03743900 DCB 0x03,0x74,0x39,0x00 +000b60 13b403ad DCB 0x13,0xb4,0x03,0xad +000b64 03e80419 DCB 0x03,0xe8,0x04,0x19 +000b68 04490473 DCB 0x04,0x49,0x04,0x73 +000b6c 04c40511 DCB 0x04,0xc4,0x05,0x11 +000b70 0550058c DCB 0x05,0x50,0x05,0x8c +000b74 39000fb5 DCB 0x39,0x00,0x0f,0xb5 +000b78 05f90657 DCB 0x05,0xf9,0x06,0x57 +000b7c 06ae06d7 DCB 0x06,0xae,0x06,0xd7 +000b80 06ea06fd DCB 0x06,0xea,0x06,0xfd +000b84 06fd3900 DCB 0x06,0xfd,0x39,0x00 +000b88 13b60000 DCB 0x13,0xb6,0x00,0x00 +000b8c 02c902e5 DCB 0x02,0xc9,0x02,0xe5 +000b90 0301031d DCB 0x03,0x01,0x03,0x1d +000b94 03560386 DCB 0x03,0x56,0x03,0x86 +000b98 03b303de DCB 0x03,0xb3,0x03,0xde +000b9c 390013b7 DCB 0x39,0x00,0x13,0xb7 +000ba0 0437048a DCB 0x04,0x37,0x04,0x8a +000ba4 04cf0512 DCB 0x04,0xcf,0x05,0x12 +000ba8 054a05b8 DCB 0x05,0x4a,0x05,0xb8 +000bac 061a066b DCB 0x06,0x1a,0x06,0x6b +000bb0 06b93900 DCB 0x06,0xb9,0x39,0x00 +000bb4 0fb8073f DCB 0x0f,0xb8,0x07,0x3f +000bb8 07b60823 DCB 0x07,0xb6,0x08,0x23 +000bbc 0856086e DCB 0x08,0x56,0x08,0x6e +000bc0 08860886 DCB 0x08,0x86,0x08,0x86 +000bc4 390002bf DCB 0x39,0x00,0x02,0xbf +000bc8 01390013 DCB 0x01,0x39,0x00,0x13 +000bcc b0000003 DCB 0xb0,0x00,0x00,0x03 +000bd0 6f037a03 DCB 0x6f,0x03,0x7a,0x03 +000bd4 85039003 DCB 0x85,0x03,0x90,0x03 +000bd8 a703be03 DCB 0xa7,0x03,0xbe,0x03 +000bdc d503ee39 DCB 0xd5,0x03,0xee,0x39 +000be0 0013b104 DCB 0x00,0x13,0xb1,0x04 +000be4 1e044f04 DCB 0x1e,0x04,0x4f,0x04 +000be8 7e04ad04 DCB 0x7e,0x04,0xad,0x04 +000bec d8052a05 DCB 0xd8,0x05,0x2a,0x05 +000bf0 7105b705 DCB 0x71,0x05,0xb7,0x05 +000bf4 fa39000f DCB 0xfa,0x39,0x00,0x0f +000bf8 b2067006 DCB 0xb2,0x06,0x70,0x06 +000bfc db073807 DCB 0xdb,0x07,0x38,0x07 +000c00 65077b07 DCB 0x65,0x07,0x7b,0x07 +000c04 8f078f39 DCB 0x8f,0x07,0x8f,0x39 +000c08 0013b300 DCB 0x00,0x13,0xb3,0x00 +000c0c 00032003 DCB 0x00,0x03,0x20,0x03 +000c10 2d033a03 DCB 0x2d,0x03,0x3a,0x03 +000c14 47036203 DCB 0x47,0x03,0x62,0x03 +000c18 7d038e03 DCB 0x7d,0x03,0x8e,0x03 +000c1c a2390013 DCB 0xa2,0x39,0x00,0x13 +000c20 b403c703 DCB 0xb4,0x03,0xc7,0x03 +000c24 ee041704 DCB 0xee,0x04,0x17,0x04 +000c28 3e046404 DCB 0x3e,0x04,0x64,0x04 +000c2c ac04e905 DCB 0xac,0x04,0xe9,0x05 +000c30 24055b39 DCB 0x24,0x05,0x5b,0x39 +000c34 000fb505 DCB 0x00,0x0f,0xb5,0x05 +000c38 bd061706 DCB 0xbd,0x06,0x17,0x06 +000c3c 66068c06 DCB 0x66,0x06,0x8c,0x06 +000c40 9f06b106 DCB 0x9f,0x06,0xb1,0x06 +000c44 b1390013 DCB 0xb1,0x39,0x00,0x13 +000c48 b6000003 DCB 0xb6,0x00,0x00,0x03 +000c4c 2e034003 DCB 0x2e,0x03,0x40,0x03 +000c50 52036403 DCB 0x52,0x03,0x64,0x03 +000c54 8803ac03 DCB 0x88,0x03,0xac,0x03 +000c58 ca03ed39 DCB 0xca,0x03,0xed,0x39 +000c5c 0013b704 DCB 0x00,0x13,0xb7,0x04 +000c60 2f046d04 DCB 0x2f,0x04,0x6d,0x04 +000c64 ad04e805 DCB 0xad,0x04,0xe8,0x05 +000c68 1d058305 DCB 0x1d,0x05,0x83,0x05 +000c6c d5062506 DCB 0xd5,0x06,0x25,0x06 +000c70 6f39000f DCB 0x6f,0x39,0x00,0x0f +000c74 b806f007 DCB 0xb8,0x06,0xf0,0x07 +000c78 6307c507 DCB 0x63,0x07,0xc5,0x07 +000c7c f5080d08 DCB 0xf5,0x08,0x0d,0x08 +000c80 23082339 DCB 0x23,0x08,0x23,0x39 +000c84 0002bf00 DCB 0x00,0x02,0xbf,0x00 +000c88 390013b0 DCB 0x39,0x00,0x13,0xb0 +000c8c 000003be DCB 0x00,0x00,0x03,0xbe +000c90 03c403ca DCB 0x03,0xc4,0x03,0xca +000c94 03d003dd DCB 0x03,0xd0,0x03,0xdd +000c98 03ea03f7 DCB 0x03,0xea,0x03,0xf7 +000c9c 04043900 DCB 0x04,0x04,0x39,0x00 +000ca0 13b1041f DCB 0x13,0xb1,0x04,0x1f +000ca4 043c0458 DCB 0x04,0x3c,0x04,0x58 +000ca8 04770494 DCB 0x04,0x77,0x04,0x94 +000cac 04cd0503 DCB 0x04,0xcd,0x05,0x03 +000cb0 05370569 DCB 0x05,0x37,0x05,0x69 +000cb4 39000fb2 DCB 0x39,0x00,0x0f,0xb2 +000cb8 05c60618 DCB 0x05,0xc6,0x06,0x18 +000cbc 0669068f DCB 0x06,0x69,0x06,0x8f +000cc0 06a106b5 DCB 0x06,0xa1,0x06,0xb5 +000cc4 06b53900 DCB 0x06,0xb5,0x39,0x00 +000cc8 13b30000 DCB 0x13,0xb3,0x00,0x00 +000ccc 0383038a DCB 0x03,0x83,0x03,0x8a +000cd0 03910398 DCB 0x03,0x91,0x03,0x98 +000cd4 03a603b4 DCB 0x03,0xa6,0x03,0xb4 +000cd8 03c203d0 DCB 0x03,0xc2,0x03,0xd0 +000cdc 390013b4 DCB 0x39,0x00,0x13,0xb4 +000ce0 03e203f8 DCB 0x03,0xe2,0x03,0xf8 +000ce4 040d0426 DCB 0x04,0x0d,0x04,0x26 +000ce8 043c046a DCB 0x04,0x3c,0x04,0x6a +000cec 049604c1 DCB 0x04,0x96,0x04,0xc1 +000cf0 04eb3900 DCB 0x04,0xeb,0x39,0x00 +000cf4 0fb50539 DCB 0x0f,0xb5,0x05,0x39 +000cf8 057d05bf DCB 0x05,0x7d,0x05,0xbf +000cfc 05df05ed DCB 0x05,0xdf,0x05,0xed +000d00 05fd05fd DCB 0x05,0xfd,0x05,0xfd +000d04 390013b6 DCB 0x39,0x00,0x13,0xb6 +000d08 00000381 DCB 0x00,0x00,0x03,0x81 +000d0c 038b0395 DCB 0x03,0x8b,0x03,0x95 +000d10 039f03b4 DCB 0x03,0x9f,0x03,0xb4 +000d14 03c903de DCB 0x03,0xc9,0x03,0xde +000d18 03f33900 DCB 0x03,0xf3,0x39,0x00 +000d1c 13b70416 DCB 0x13,0xb7,0x04,0x16 +000d20 043e0467 DCB 0x04,0x3e,0x04,0x67 +000d24 048f04b3 DCB 0x04,0x8f,0x04,0xb3 +000d28 04fe0543 DCB 0x04,0xfe,0x05,0x43 +000d2c 058305c1 DCB 0x05,0x83,0x05,0xc1 +000d30 39000fb8 DCB 0x39,0x00,0x0f,0xb8 +000d34 062f068b DCB 0x06,0x2f,0x06,0x8b +000d38 06e5070f DCB 0x06,0xe5,0x07,0x0f +000d3c 07220735 DCB 0x07,0x22,0x07,0x35 +000d40 07353900 DCB 0x07,0x35,0x39,0x00 +000d44 06f055aa DCB 0x06,0xf0,0x55,0xaa +000d48 52080239 DCB 0x52,0x08,0x02,0x39 +000d4c 0002bf19 DCB 0x00,0x02,0xbf,0x19 +000d50 390013b0 DCB 0x39,0x00,0x13,0xb0 +000d54 00000226 DCB 0x00,0x00,0x02,0x26 +000d58 026402a2 DCB 0x02,0x64,0x02,0xa2 +000d5c 02db034a DCB 0x02,0xdb,0x03,0x4a +000d60 03b10404 DCB 0x03,0xb1,0x04,0x04 +000d64 04553900 DCB 0x04,0x55,0x39,0x00 +000d68 13b104d8 DCB 0x13,0xb1,0x04,0xd8 +000d6c 054605b3 DCB 0x05,0x46,0x05,0xb3 +000d70 060b0661 DCB 0x06,0x0b,0x06,0x61 +000d74 06fc077f DCB 0x06,0xfc,0x07,0x7f +000d78 07fb086f DCB 0x07,0xfb,0x08,0x6f +000d7c 39000fb2 DCB 0x39,0x00,0x0f,0xb2 +000d80 09550a31 DCB 0x09,0x55,0x0a,0x31 +000d84 0b0b0b7e DCB 0x0b,0x0b,0x0b,0x7e +000d88 0bba0bf3 DCB 0x0b,0xba,0x0b,0xf3 +000d8c 0bf33900 DCB 0x0b,0xf3,0x39,0x00 +000d90 13b30000 DCB 0x13,0xb3,0x00,0x00 +000d94 01c0021b DCB 0x01,0xc0,0x02,0x1b +000d98 02540289 DCB 0x02,0x54,0x02,0x89 +000d9c 02f1034d DCB 0x02,0xf1,0x03,0x4d +000da0 039403da DCB 0x03,0x94,0x03,0xda +000da4 390013b4 DCB 0x39,0x00,0x13,0xb4 +000da8 044f04ad DCB 0x04,0x4f,0x04,0xad +000dac 050a0556 DCB 0x05,0x0a,0x05,0x56 +000db0 05a10628 DCB 0x05,0xa1,0x06,0x28 +000db4 06980703 DCB 0x06,0x98,0x07,0x03 +000db8 07643900 DCB 0x07,0x64,0x39,0x00 +000dbc 0fb50824 DCB 0x0f,0xb5,0x08,0x24 +000dc0 08d70988 DCB 0x08,0xd7,0x09,0x88 +000dc4 09e10a0b DCB 0x09,0xe1,0x0a,0x0b +000dc8 0a350a35 DCB 0x0a,0x35,0x0a,0x35 +000dcc 390013b6 DCB 0x39,0x00,0x13,0xb6 +000dd0 000001f3 DCB 0x00,0x00,0x01,0xf3 +000dd4 025702ab DCB 0x02,0x57,0x02,0xab +000dd8 02f50386 DCB 0x02,0xf5,0x03,0x86 +000ddc 0400045d DCB 0x04,0x00,0x04,0x5d +000de0 04b83900 DCB 0x04,0xb8,0x39,0x00 +000de4 13b7054a DCB 0x13,0xb7,0x05,0x4a +000de8 05bd062f DCB 0x05,0xbd,0x06,0x2f +000dec 068d06e9 DCB 0x06,0x8d,0x06,0xe9 +000df0 0792081b DCB 0x07,0x92,0x08,0x1b +000df4 08a10920 DCB 0x08,0xa1,0x09,0x20 +000df8 39000fb8 DCB 0x39,0x00,0x0f,0xb8 +000dfc 0a1b0b1b DCB 0x0a,0x1b,0x0b,0x1b +000e00 0c1a0ca6 DCB 0x0c,0x1a,0x0c,0xa6 +000e04 0cf30d44 DCB 0x0c,0xf3,0x0d,0x44 +000e08 0d443900 DCB 0x0d,0x44,0x39,0x00 +000e0c 02bf1839 DCB 0x02,0xbf,0x18,0x39 +000e10 0013b000 DCB 0x00,0x13,0xb0,0x00 +000e14 00029702 DCB 0x00,0x02,0x97,0x02 +000e18 c202ed03 DCB 0xc2,0x02,0xed,0x03 +000e1c 18036c03 DCB 0x18,0x03,0x6c,0x03 +000e20 ba040704 DCB 0xba,0x04,0x07,0x04 +000e24 48390013 DCB 0x48,0x39,0x00,0x13 +000e28 b104c705 DCB 0xb1,0x04,0xc7,0x05 +000e2c 31058e05 DCB 0x31,0x05,0x8e,0x05 +000e30 e9063706 DCB 0xe9,0x06,0x37,0x06 +000e34 ba073b07 DCB 0xba,0x07,0x3b,0x07 +000e38 ab081a39 DCB 0xab,0x08,0x1a,0x39 +000e3c 000fb208 DCB 0x00,0x0f,0xb2,0x08 +000e40 e109a60a DCB 0xe1,0x09,0xa6,0x0a +000e44 620abe0a DCB 0x62,0x0a,0xbe,0x0a +000e48 ed0b200b DCB 0xed,0x0b,0x20,0x0b +000e4c 20390013 DCB 0x20,0x39,0x00,0x13 +000e50 b3000002 DCB 0xb3,0x00,0x00,0x02 +000e54 47027702 DCB 0x47,0x02,0x77,0x02 +000e58 9502ba03 DCB 0x95,0x02,0xba,0x03 +000e5c 00034303 DCB 0x00,0x03,0x43,0x03 +000e60 8403bd39 DCB 0x84,0x03,0xbd,0x39 +000e64 0013b404 DCB 0x00,0x13,0xb4,0x04 +000e68 2b048704 DCB 0x2b,0x04,0x87,0x04 +000e6c d7052605 DCB 0xd7,0x05,0x26,0x05 +000e70 6805da06 DCB 0x68,0x05,0xda,0x06 +000e74 4a06ab07 DCB 0x4a,0x06,0xab,0x07 +000e78 0b39000f DCB 0x0b,0x39,0x00,0x0f +000e7c b507af08 DCB 0xb5,0x07,0xaf,0x08 +000e80 5208ec09 DCB 0x52,0x08,0xec,0x09 +000e84 38096009 DCB 0x38,0x09,0x60,0x09 +000e88 88098839 DCB 0x88,0x09,0x88,0x39 +000e8c 0013b600 DCB 0x00,0x13,0xb6,0x00 +000e90 00026002 DCB 0x00,0x02,0x60,0x02 +000e94 a502df03 DCB 0xa5,0x02,0xdf,0x03 +000e98 1c039203 DCB 0x1c,0x03,0x92,0x03 +000e9c f2045104 DCB 0xf2,0x04,0x51,0x04 +000ea0 9b390013 DCB 0x9b,0x39,0x00,0x13 +000ea4 b7052c05 DCB 0xb7,0x05,0x2c,0x05 +000ea8 9f060206 DCB 0x9f,0x06,0x02,0x06 +000eac 6406b707 DCB 0x64,0x06,0xb7,0x07 +000eb0 4407cf08 DCB 0x44,0x07,0xcf,0x08 +000eb4 4808bf39 DCB 0x48,0x08,0xbf,0x39 +000eb8 000fb809 DCB 0x00,0x0f,0xb8,0x09 +000ebc 9a0a740b DCB 0x9a,0x0a,0x74,0x0b +000ec0 510bbe0b DCB 0x51,0x0b,0xbe,0x0b +000ec4 f50c300c DCB 0xf5,0x0c,0x30,0x0c +000ec8 30390002 DCB 0x30,0x39,0x00,0x02 +000ecc bf173900 DCB 0xbf,0x17,0x39,0x00 +000ed0 13b00000 DCB 0x13,0xb0,0x00,0x00 +000ed4 028b029b DCB 0x02,0x8b,0x02,0x9b +000ed8 02ab02bb DCB 0x02,0xab,0x02,0xbb +000edc 02e60316 DCB 0x02,0xe6,0x03,0x16 +000ee0 03440372 DCB 0x03,0x44,0x03,0x72 +000ee4 390013b1 DCB 0x39,0x00,0x13,0xb1 +000ee8 03c0040c DCB 0x03,0xc0,0x04,0x0c +000eec 04530493 DCB 0x04,0x53,0x04,0x93 +000ef0 04cc0536 DCB 0x04,0xcc,0x05,0x36 +000ef4 059705ea DCB 0x05,0x97,0x05,0xea +000ef8 063a3900 DCB 0x06,0x3a,0x39,0x00 +000efc 0fb206c6 DCB 0x0f,0xb2,0x06,0xc6 +000f00 074407b6 DCB 0x07,0x44,0x07,0xb6 +000f04 07e90804 DCB 0x07,0xe9,0x08,0x04 +000f08 081e081e DCB 0x08,0x1e,0x08,0x1e +000f0c 390013b3 DCB 0x39,0x00,0x13,0xb3 +000f10 0000023b DCB 0x00,0x00,0x02,0x3b +000f14 02510267 DCB 0x02,0x51,0x02,0x67 +000f18 02750292 DCB 0x02,0x75,0x02,0x92 +000f1c 02b802dd DCB 0x02,0xb8,0x02,0xdd +000f20 03033900 DCB 0x03,0x03,0x39,0x00 +000f24 13b40347 DCB 0x13,0xb4,0x03,0x47 +000f28 038803c4 DCB 0x03,0x88,0x03,0xc4 +000f2c 03fe042e DCB 0x03,0xfe,0x04,0x2e +000f30 048b04e0 DCB 0x04,0x8b,0x04,0xe0 +000f34 052a056c DCB 0x05,0x2a,0x05,0x6c +000f38 39000fb5 DCB 0x39,0x00,0x0f,0xb5 +000f3c 05e5064c DCB 0x05,0xe5,0x06,0x4c +000f40 06b006df DCB 0x06,0xb0,0x06,0xdf +000f44 06f6070c DCB 0x06,0xf6,0x07,0x0c +000f48 070c3900 DCB 0x07,0x0c,0x39,0x00 +000f4c 13b60000 DCB 0x13,0xb6,0x00,0x00 +000f50 02550273 DCB 0x02,0x55,0x02,0x73 +000f54 029102aa DCB 0x02,0x91,0x02,0xaa +000f58 02e30327 DCB 0x02,0xe3,0x03,0x27 +000f5c 036503a0 DCB 0x03,0x65,0x03,0xa0 +000f60 390013b7 DCB 0x39,0x00,0x13,0xb7 +000f64 0402045c DCB 0x04,0x02,0x04,0x5c +000f68 04ac04f5 DCB 0x04,0xac,0x04,0xf5 +000f6c 053405a6 DCB 0x05,0x34,0x05,0xa6 +000f70 060f0669 DCB 0x06,0x0f,0x06,0x69 +000f74 06bc3900 DCB 0x06,0xbc,0x39,0x00 +000f78 0fb80751 DCB 0x0f,0xb8,0x07,0x51 +000f7c 07d4084f DCB 0x07,0xd4,0x08,0x4f +000f80 088808a6 DCB 0x08,0x88,0x08,0xa6 +000f84 08c208c2 DCB 0x08,0xc2,0x08,0xc2 +000f88 390002bf DCB 0x39,0x00,0x02,0xbf +000f8c 16390013 DCB 0x16,0x39,0x00,0x13 +000f90 b0000002 DCB 0xb0,0x00,0x00,0x02 +000f94 8e029d02 DCB 0x8e,0x02,0x9d,0x02 +000f98 ac02bb02 DCB 0xac,0x02,0xbb,0x02 +000f9c e4031103 DCB 0xe4,0x03,0x11,0x03 +000fa0 3d036839 DCB 0x3d,0x03,0x68,0x39 +000fa4 0013b103 DCB 0x00,0x13,0xb1,0x03 +000fa8 c1040804 DCB 0xc1,0x04,0x08,0x04 +000fac 4e048d04 DCB 0x4e,0x04,0x8d,0x04 +000fb0 c3052d05 DCB 0xc3,0x05,0x2d,0x05 +000fb4 8b05dc06 DCB 0x8b,0x05,0xdc,0x06 +000fb8 2b39000f DCB 0x2b,0x39,0x00,0x0f +000fbc b206b507 DCB 0xb2,0x06,0xb5,0x07 +000fc0 3107a307 DCB 0x31,0x07,0xa3,0x07 +000fc4 d807f108 DCB 0xd8,0x07,0xf1,0x08 +000fc8 0c080c39 DCB 0x0c,0x08,0x0c,0x39 +000fcc 0013b300 DCB 0x00,0x13,0xb3,0x00 +000fd0 00023f02 DCB 0x00,0x02,0x3f,0x02 +000fd4 53026702 DCB 0x53,0x02,0x67,0x02 +000fd8 74029102 DCB 0x74,0x02,0x91,0x02 +000fdc b502d702 DCB 0xb5,0x02,0xd7,0x02 +000fe0 fb390013 DCB 0xfb,0x39,0x00,0x13 +000fe4 b4034603 DCB 0xb4,0x03,0x46,0x03 +000fe8 8403c103 DCB 0x84,0x03,0xc1,0x03 +000fec f8042704 DCB 0xf8,0x04,0x27,0x04 +000ff0 8104d205 DCB 0x81,0x04,0xd2,0x05 +000ff4 18055d39 DCB 0x18,0x05,0x5d,0x39 +000ff8 000fb505 DCB 0x00,0x0f,0xb5,0x05 +000ffc d6064006 DCB 0xd6,0x06,0x40,0x06 +001000 a306d106 DCB 0xa3,0x06,0xd1,0x06 +001004 e606fd06 DCB 0xe6,0x06,0xfd,0x06 +001008 fd390013 DCB 0xfd,0x39,0x00,0x13 +00100c b6000002 DCB 0xb6,0x00,0x00,0x02 +001010 58027402 DCB 0x58,0x02,0x74,0x02 +001014 9002a802 DCB 0x90,0x02,0xa8,0x02 +001018 e1031f03 DCB 0xe1,0x03,0x1f,0x03 +00101c 5b039339 DCB 0x5b,0x03,0x93,0x39 +001020 0013b704 DCB 0x00,0x13,0xb7,0x04 +001024 01045504 DCB 0x01,0x04,0x55,0x04 +001028 a704ee05 DCB 0xa7,0x04,0xee,0x05 +00102c 28059a05 DCB 0x28,0x05,0x9a,0x05 +001030 ff065506 DCB 0xff,0x06,0x55,0x06 +001034 a939000f DCB 0xa9,0x39,0x00,0x0f +001038 b8073f07 DCB 0xb8,0x07,0x3f,0x07 +00103c c2083e08 DCB 0xc2,0x08,0x3e,0x08 +001040 77089208 DCB 0x77,0x08,0x92,0x08 +001044 af08af39 DCB 0xaf,0x08,0xaf,0x39 +001048 0002bf15 DCB 0x00,0x02,0xbf,0x15 +00104c 390013b0 DCB 0x39,0x00,0x13,0xb0 +001050 000002a9 DCB 0x00,0x00,0x02,0xa9 +001054 02b802c7 DCB 0x02,0xb8,0x02,0xc7 +001058 02d602f7 DCB 0x02,0xd6,0x02,0xf7 +00105c 0322034c DCB 0x03,0x22,0x03,0x4c +001060 03733900 DCB 0x03,0x73,0x39,0x00 +001064 13b103bf DCB 0x13,0xb1,0x03,0xbf +001068 04040449 DCB 0x04,0x04,0x04,0x49 +00106c 048804bf DCB 0x04,0x88,0x04,0xbf +001070 05220583 DCB 0x05,0x22,0x05,0x83 +001074 05d40623 DCB 0x05,0xd4,0x06,0x23 +001078 39000fb2 DCB 0x39,0x00,0x0f,0xb2 +00107c 06ae0728 DCB 0x06,0xae,0x07,0x28 +001080 079407c8 DCB 0x07,0x94,0x07,0xc8 +001084 07e407fd DCB 0x07,0xe4,0x07,0xfd +001088 07fd3900 DCB 0x07,0xfd,0x39,0x00 +00108c 13b30000 DCB 0x13,0xb3,0x00,0x00 +001090 02520266 DCB 0x02,0x52,0x02,0x66 +001094 027a0287 DCB 0x02,0x7a,0x02,0x87 +001098 029f02bf DCB 0x02,0x9f,0x02,0xbf +00109c 02dd0301 DCB 0x02,0xdd,0x03,0x01 +0010a0 390013b4 DCB 0x39,0x00,0x13,0xb4 +0010a4 03450386 DCB 0x03,0x45,0x03,0x86 +0010a8 03bf03f4 DCB 0x03,0xbf,0x03,0xf4 +0010ac 0427047c DCB 0x04,0x27,0x04,0x7c +0010b0 04d00515 DCB 0x04,0xd0,0x05,0x15 +0010b4 05583900 DCB 0x05,0x58,0x39,0x00 +0010b8 0fb505d1 DCB 0x0f,0xb5,0x05,0xd1 +0010bc 06380697 DCB 0x06,0x38,0x06,0x97 +0010c0 06c506db DCB 0x06,0xc5,0x06,0xdb +0010c4 06f106f1 DCB 0x06,0xf1,0x06,0xf1 +0010c8 390013b6 DCB 0x39,0x00,0x13,0xb6 +0010cc 00000275 DCB 0x00,0x00,0x02,0x75 +0010d0 028f02a9 DCB 0x02,0x8f,0x02,0xa9 +0010d4 02bf02ee DCB 0x02,0xbf,0x02,0xee +0010d8 03290362 DCB 0x03,0x29,0x03,0x62 +0010dc 03963900 DCB 0x03,0x96,0x39,0x00 +0010e0 13b703fc DCB 0x13,0xb7,0x03,0xfc +0010e4 045404a2 DCB 0x04,0x54,0x04,0xa2 +0010e8 04e60526 DCB 0x04,0xe6,0x05,0x26 +0010ec 059005f9 DCB 0x05,0x90,0x05,0xf9 +0010f0 064f06a3 DCB 0x06,0x4f,0x06,0xa3 +0010f4 39000fb8 DCB 0x39,0x00,0x0f,0xb8 +0010f8 073707b9 DCB 0x07,0x37,0x07,0xb9 +0010fc 082f0869 DCB 0x08,0x2f,0x08,0x69 +001100 0884089f DCB 0x08,0x84,0x08,0x9f +001104 089f3900 DCB 0x08,0x9f,0x39,0x00 +001108 02bf1439 DCB 0x02,0xbf,0x14,0x39 +00110c 0013b000 DCB 0x00,0x13,0xb0,0x00 +001110 0002be02 DCB 0x00,0x02,0xbe,0x02 +001114 c902d402 DCB 0xc9,0x02,0xd4,0x02 +001118 df030003 DCB 0xdf,0x03,0x00,0x03 +00111c 25034903 DCB 0x25,0x03,0x49,0x03 +001120 6f390013 DCB 0x6f,0x39,0x00,0x13 +001124 b103ba04 DCB 0xb1,0x03,0xba,0x04 +001128 04044404 DCB 0x04,0x04,0x44,0x04 +00112c 8204ba05 DCB 0x82,0x04,0xba,0x05 +001130 20057905 DCB 0x20,0x05,0x79,0x05 +001134 c9061839 DCB 0xc9,0x06,0x18,0x39 +001138 000fb206 DCB 0x00,0x0f,0xb2,0x06 +00113c 9e071507 DCB 0x9e,0x07,0x15,0x07 +001140 8207b607 DCB 0x82,0x07,0xb6,0x07 +001144 ce07e507 DCB 0xce,0x07,0xe5,0x07 +001148 e5390013 DCB 0xe5,0x39,0x00,0x13 +00114c b3000002 DCB 0xb3,0x00,0x00,0x02 +001150 6b027e02 DCB 0x6b,0x02,0x7e,0x02 +001154 91029d02 DCB 0x91,0x02,0x9d,0x02 +001158 b502d502 DCB 0xb5,0x02,0xd5,0x02 +00115c f3031039 DCB 0xf3,0x03,0x10,0x39 +001160 0013b403 DCB 0x00,0x13,0xb4,0x03 +001164 52039303 DCB 0x52,0x03,0x93,0x03 +001168 cb040104 DCB 0xcb,0x04,0x01,0x04 +00116c 33048a04 DCB 0x33,0x04,0x8a,0x04 +001170 d3051805 DCB 0xd3,0x05,0x18,0x05 +001174 5b39000f DCB 0x5b,0x39,0x00,0x0f +001178 b505cf06 DCB 0xb5,0x05,0xcf,0x06 +00117c 36069506 DCB 0x36,0x06,0x95,0x06 +001180 c106d606 DCB 0xc1,0x06,0xd6,0x06 +001184 ea06ea39 DCB 0xea,0x06,0xea,0x39 +001188 0013b600 DCB 0x00,0x13,0xb6,0x00 +00118c 00028b02 DCB 0x00,0x02,0x8b,0x02 +001190 a302bb02 DCB 0xa3,0x02,0xbb,0x02 +001194 cf02fa03 DCB 0xcf,0x02,0xfa,0x03 +001198 30036403 DCB 0x30,0x03,0x64,0x03 +00119c 95390013 DCB 0x95,0x39,0x00,0x13 +0011a0 b703f304 DCB 0xb7,0x03,0xf3,0x04 +0011a4 50049904 DCB 0x50,0x04,0x99,0x04 +0011a8 e1052205 DCB 0xe1,0x05,0x22,0x05 +0011ac 9205ef06 DCB 0x92,0x05,0xef,0x06 +0011b0 43069539 DCB 0x43,0x06,0x95,0x39 +0011b4 000fb807 DCB 0x00,0x0f,0xb8,0x07 +0011b8 2507a708 DCB 0x25,0x07,0xa7,0x08 +0011bc 1e085608 DCB 0x1e,0x08,0x56,0x08 +0011c0 70088908 DCB 0x70,0x08,0x89,0x08 +0011c4 89390002 DCB 0x89,0x39,0x00,0x02 +0011c8 bf133900 DCB 0xbf,0x13,0x39,0x00 +0011cc 13b00000 DCB 0x13,0xb0,0x00,0x00 +0011d0 02f50301 DCB 0x02,0xf5,0x03,0x01 +0011d4 030d0319 DCB 0x03,0x0d,0x03,0x19 +0011d8 03320350 DCB 0x03,0x32,0x03,0x50 +0011dc 036f038d DCB 0x03,0x6f,0x03,0x8d +0011e0 390013b1 DCB 0x39,0x00,0x13,0xb1 +0011e4 03cc040b DCB 0x03,0xcc,0x04,0x0b +0011e8 0445047d DCB 0x04,0x45,0x04,0x7d +0011ec 04b10515 DCB 0x04,0xb1,0x05,0x15 +0011f0 056a05b4 DCB 0x05,0x6a,0x05,0xb4 +0011f4 05fd3900 DCB 0x05,0xfd,0x39,0x00 +0011f8 0fb20682 DCB 0x0f,0xb2,0x06,0x82 +0011fc 06f8075f DCB 0x06,0xf8,0x07,0x5f +001200 079107a9 DCB 0x07,0x91,0x07,0xa9 +001204 07bf07bf DCB 0x07,0xbf,0x07,0xbf +001208 390013b3 DCB 0x39,0x00,0x13,0xb3 +00120c 000002a6 DCB 0x00,0x00,0x02,0xa6 +001210 02b702c8 DCB 0x02,0xb7,0x02,0xc8 +001214 02d902ef DCB 0x02,0xd9,0x02,0xef +001218 0305031f DCB 0x03,0x05,0x03,0x1f +00121c 03383900 DCB 0x03,0x38,0x39,0x00 +001220 13b4036c DCB 0x13,0xb4,0x03,0x6c +001224 03a103d4 DCB 0x03,0xa1,0x03,0xd4 +001228 04050430 DCB 0x04,0x05,0x04,0x30 +00122c 048604cf DCB 0x04,0x86,0x04,0xcf +001230 0510054f DCB 0x05,0x10,0x05,0x4f +001234 39000fb5 DCB 0x39,0x00,0x0f,0xb5 +001238 05bf0620 DCB 0x05,0xbf,0x06,0x20 +00123c 067a06a5 DCB 0x06,0x7a,0x06,0xa5 +001240 06b906cc DCB 0x06,0xb9,0x06,0xcc +001244 06cc3900 DCB 0x06,0xcc,0x39,0x00 +001248 13b60000 DCB 0x13,0xb6,0x00,0x00 +00124c 02c902de DCB 0x02,0xc9,0x02,0xde +001250 02f30308 DCB 0x02,0xf3,0x03,0x08 +001254 032c0355 DCB 0x03,0x2c,0x03,0x55 +001258 038103ac DCB 0x03,0x81,0x03,0xac +00125c 390013b7 DCB 0x39,0x00,0x13,0xb7 +001260 03fd044c DCB 0x03,0xfd,0x04,0x4c +001264 049104d5 DCB 0x04,0x91,0x04,0xd5 +001268 05100580 DCB 0x05,0x10,0x05,0x80 +00126c 05df062f DCB 0x05,0xdf,0x06,0x2f +001270 067d3900 DCB 0x06,0x7d,0x39,0x00 +001274 0fb8070c DCB 0x0f,0xb8,0x07,0x0c +001278 078a07f9 DCB 0x07,0x8a,0x07,0xf9 +00127c 082f0848 DCB 0x08,0x2f,0x08,0x48 +001280 08610861 DCB 0x08,0x61,0x08,0x61 +001284 390002bf DCB 0x39,0x00,0x02,0xbf +001288 12390013 DCB 0x12,0x39,0x00,0x13 +00128c b0000003 DCB 0xb0,0x00,0x00,0x03 +001290 33033e03 DCB 0x33,0x03,0x3e,0x03 +001294 49035403 DCB 0x49,0x03,0x54,0x03 +001298 6a038003 DCB 0x6a,0x03,0x80,0x03 +00129c 9703ad39 DCB 0x97,0x03,0xad,0x39 +0012a0 0013b103 DCB 0x00,0x13,0xb1,0x03 +0012a4 e1041304 DCB 0xe1,0x04,0x13,0x04 +0012a8 47047904 DCB 0x47,0x04,0x79,0x04 +0012ac a604fe05 DCB 0xa6,0x04,0xfe,0x05 +0012b0 4e059905 DCB 0x4e,0x05,0x99,0x05 +0012b4 de39000f DCB 0xde,0x39,0x00,0x0f +0012b8 b2065806 DCB 0xb2,0x06,0x58,0x06 +0012bc c7072b07 DCB 0xc7,0x07,0x2b,0x07 +0012c0 5b077107 DCB 0x5b,0x07,0x71,0x07 +0012c4 88078839 DCB 0x88,0x07,0x88,0x39 +0012c8 0013b300 DCB 0x00,0x13,0xb3,0x00 +0012cc 0002e602 DCB 0x00,0x02,0xe6,0x02 +0012d0 f4030203 DCB 0xf4,0x03,0x02,0x03 +0012d4 10032c03 DCB 0x10,0x03,0x2c,0x03 +0012d8 3e035103 DCB 0x3e,0x03,0x51,0x03 +0012dc 62390013 DCB 0x62,0x39,0x00,0x13 +0012e0 b4038d03 DCB 0xb4,0x03,0x8d,0x03 +0012e4 b503e104 DCB 0xb5,0x03,0xe1,0x04 +0012e8 0c043304 DCB 0x0c,0x04,0x33,0x04 +0012ec 7d04bf04 DCB 0x7d,0x04,0xbf,0x04 +0012f0 fd053739 DCB 0xfd,0x05,0x37,0x39 +0012f4 000fb505 DCB 0x00,0x0f,0xb5,0x05 +0012f8 9e05fb06 DCB 0x9e,0x05,0xfb,0x06 +0012fc 50067906 DCB 0x50,0x06,0x79,0x06 +001300 8c06a006 DCB 0x8c,0x06,0xa0,0x06 +001304 a0390013 DCB 0xa0,0x39,0x00,0x13 +001308 b6000003 DCB 0xb6,0x00,0x00,0x03 +00130c 0c031d03 DCB 0x0c,0x03,0x1d,0x03 +001310 2e033f03 DCB 0x2e,0x03,0x3f,0x03 +001314 61037e03 DCB 0x61,0x03,0x7e,0x03 +001318 9f03be39 DCB 0x9f,0x03,0xbe,0x39 +00131c 0013b704 DCB 0x00,0x13,0xb7,0x04 +001320 05044404 DCB 0x05,0x04,0x44,0x04 +001324 8504c504 DCB 0x85,0x04,0xc5,0x04 +001328 fa056205 DCB 0xfa,0x05,0x62,0x05 +00132c bc060f06 DCB 0xbc,0x06,0x0f,0x06 +001330 5c39000f DCB 0x5c,0x39,0x00,0x0f +001334 b806e007 DCB 0xb8,0x06,0xe0,0x07 +001338 5707c107 DCB 0x57,0x07,0xc1,0x07 +00133c f4080c08 DCB 0xf4,0x08,0x0c,0x08 +001340 26082639 DCB 0x26,0x08,0x26,0x39 +001344 0002bf11 DCB 0x00,0x02,0xbf,0x11 +001348 390013b0 DCB 0x39,0x00,0x13,0xb0 +00134c 0000037e DCB 0x00,0x00,0x03,0x7e +001350 0386038e DCB 0x03,0x86,0x03,0x8e +001354 039603a7 DCB 0x03,0x96,0x03,0xa7 +001358 03b803c9 DCB 0x03,0xb8,0x03,0xc9 +00135c 03dc3900 DCB 0x03,0xdc,0x39,0x00 +001360 13b103fe DCB 0x13,0xb1,0x03,0xfe +001364 0424044a DCB 0x04,0x24,0x04,0x4a +001368 046f0496 DCB 0x04,0x6f,0x04,0x96 +00136c 04e20524 DCB 0x04,0xe2,0x05,0x24 +001370 056405a2 DCB 0x05,0x64,0x05,0xa2 +001374 39000fb2 DCB 0x39,0x00,0x0f,0xb2 +001378 06120678 DCB 0x06,0x12,0x06,0x78 +00137c 06d40701 DCB 0x06,0xd4,0x07,0x01 +001380 0717072b DCB 0x07,0x17,0x07,0x2b +001384 072b3900 DCB 0x07,0x2b,0x39,0x00 +001388 13b30000 DCB 0x13,0xb3,0x00,0x00 +00138c 03290335 DCB 0x03,0x29,0x03,0x35 +001390 0341034d DCB 0x03,0x41,0x03,0x4d +001394 0365037d DCB 0x03,0x65,0x03,0x7d +001398 038c039b DCB 0x03,0x8c,0x03,0x9b +00139c 390013b4 DCB 0x39,0x00,0x13,0xb4 +0013a0 03b703d3 DCB 0x03,0xb7,0x03,0xd3 +0013a4 03f20414 DCB 0x03,0xf2,0x04,0x14 +0013a8 04340472 DCB 0x04,0x34,0x04,0x72 +0013ac 04a804dd DCB 0x04,0xa8,0x04,0xdd +0013b0 05103900 DCB 0x05,0x10,0x39,0x00 +0013b4 0fb5056d DCB 0x0f,0xb5,0x05,0x6d +0013b8 05c0060d DCB 0x05,0xc0,0x06,0x0d +0013bc 06320644 DCB 0x06,0x32,0x06,0x44 +0013c0 06550655 DCB 0x06,0x55,0x06,0x55 +0013c4 390013b6 DCB 0x39,0x00,0x13,0xb6 +0013c8 00000345 DCB 0x00,0x00,0x03,0x45 +0013cc 03540363 DCB 0x03,0x54,0x03,0x63 +0013d0 03720391 DCB 0x03,0x72,0x03,0x91 +0013d4 03b003ca DCB 0x03,0xb0,0x03,0xca +0013d8 03e33900 DCB 0x03,0xe3,0x39,0x00 +0013dc 13b70413 DCB 0x13,0xb7,0x04,0x13 +0013e0 04450478 DCB 0x04,0x45,0x04,0x78 +0013e4 04aa04da DCB 0x04,0xaa,0x04,0xda +0013e8 05370585 DCB 0x05,0x37,0x05,0x85 +0013ec 05d10616 DCB 0x05,0xd1,0x06,0x16 +0013f0 39000fb8 DCB 0x39,0x00,0x0f,0xb8 +0013f4 06910701 DCB 0x06,0x91,0x07,0x01 +0013f8 07640794 DCB 0x07,0x64,0x07,0x94 +0013fc 07ab07c1 DCB 0x07,0xab,0x07,0xc1 +001400 07c13900 DCB 0x07,0xc1,0x39,0x00 +001404 02bf1039 DCB 0x02,0xbf,0x10,0x39 +001408 0013b000 DCB 0x00,0x13,0xb0,0x00 +00140c 0003e603 DCB 0x00,0x03,0xe6,0x03 +001410 e903ec03 DCB 0xe9,0x03,0xec,0x03 +001414 ef03f603 DCB 0xef,0x03,0xf6,0x03 +001418 fd040404 DCB 0xfd,0x04,0x04,0x04 +00141c 0b390013 DCB 0x0b,0x39,0x00,0x13 +001420 b1041a04 DCB 0xb1,0x04,0x1a,0x04 +001424 2d044504 DCB 0x2d,0x04,0x45,0x04 +001428 59046e04 DCB 0x59,0x04,0x6e,0x04 +00142c 9e04cc04 DCB 0x9e,0x04,0xcc,0x04 +001430 f8052239 DCB 0xf8,0x05,0x22,0x39 +001434 000fb205 DCB 0x00,0x0f,0xb2,0x05 +001438 7805c506 DCB 0x78,0x05,0xc5,0x06 +00143c 11063606 DCB 0x11,0x06,0x36,0x06 +001440 47065606 DCB 0x47,0x06,0x56,0x06 +001444 56390013 DCB 0x56,0x39,0x00,0x13 +001448 b3000003 DCB 0xb3,0x00,0x00,0x03 +00144c 8d039303 DCB 0x8d,0x03,0x93,0x03 +001450 99039f03 DCB 0x99,0x03,0x9f,0x03 +001454 ac03b903 DCB 0xac,0x03,0xb9,0x03 +001458 c603d339 DCB 0xc6,0x03,0xd3,0x39 +00145c 0013b403 DCB 0x00,0x13,0xb4,0x03 +001460 e403f504 DCB 0xe4,0x03,0xf5,0x04 +001464 06041704 DCB 0x06,0x04,0x17,0x04 +001468 28044e04 DCB 0x28,0x04,0x4e,0x04 +00146c 72049604 DCB 0x72,0x04,0x96,0x04 +001470 b939000f DCB 0xb9,0x39,0x00,0x0f +001474 b504fc05 DCB 0xb5,0x04,0xfc,0x05 +001478 3a057705 DCB 0x3a,0x05,0x77,0x05 +00147c 9405a105 DCB 0x94,0x05,0xa1,0x05 +001480 af05af39 DCB 0xaf,0x05,0xaf,0x39 +001484 0013b600 DCB 0x00,0x13,0xb6,0x00 +001488 0003b303 DCB 0x00,0x03,0xb3,0x03 +00148c ba03c103 DCB 0xba,0x03,0xc1,0x03 +001490 c803d703 DCB 0xc8,0x03,0xd7,0x03 +001494 e603f504 DCB 0xe6,0x03,0xf5,0x04 +001498 04390013 DCB 0x04,0x39,0x00,0x13 +00149c b7041d04 DCB 0xb7,0x04,0x1d,0x04 +0014a0 37045604 DCB 0x37,0x04,0x56,0x04 +0014a4 74049204 DCB 0x74,0x04,0x92,0x04 +0014a8 d1050b05 DCB 0xd1,0x05,0x0b,0x05 +0014ac 43057939 DCB 0x43,0x05,0x79,0x39 +0014b0 000fb805 DCB 0x00,0x0f,0xb8,0x05 +0014b4 dd063506 DCB 0xdd,0x06,0x35,0x06 +0014b8 8b06b306 DCB 0x8b,0x06,0xb3,0x06 +0014bc c506d906 DCB 0xc5,0x06,0xd9,0x06 +0014c0 d9390006 DCB 0xd9,0x39,0x00,0x06 +0014c4 f055aa52 DCB 0xf0,0x55,0xaa,0x52 +0014c8 08023900 DCB 0x08,0x02,0x39,0x00 +0014cc 02bf4239 DCB 0x02,0xbf,0x42,0x39 +0014d0 0013b000 DCB 0x00,0x13,0xb0,0x00 +0014d4 0003b003 DCB 0x00,0x03,0xb0,0x03 +0014d8 da040404 DCB 0xda,0x04,0x04,0x04 +0014dc 2e047704 DCB 0x2e,0x04,0x77,0x04 +0014e0 b804f805 DCB 0xb8,0x04,0xf8,0x05 +0014e4 33390013 DCB 0x33,0x39,0x00,0x13 +0014e8 b105a606 DCB 0xb1,0x05,0xa6,0x06 +0014ec 06066406 DCB 0x06,0x06,0x64,0x06 +0014f0 b606ff07 DCB 0xb6,0x06,0xff,0x07 +0014f4 8d080308 DCB 0x8d,0x08,0x03,0x08 +0014f8 6908cd39 DCB 0x69,0x08,0xcd,0x39 +0014fc 000fb209 DCB 0x00,0x0f,0xb2,0x09 +001500 7a0a100a DCB 0x7a,0x0a,0x10,0x0a +001504 940acf0a DCB 0x94,0x0a,0xcf,0x0a +001508 ee0b0c0b DCB 0xee,0x0b,0x0c,0x0b +00150c 0c390013 DCB 0x0c,0x39,0x00,0x13 +001510 b3000003 DCB 0xb3,0x00,0x00,0x03 +001514 06032a03 DCB 0x06,0x03,0x2a,0x03 +001518 4e036503 DCB 0x4e,0x03,0x65,0x03 +00151c 9703db04 DCB 0x97,0x03,0xdb,0x04 +001520 1e045a39 DCB 0x1e,0x04,0x5a,0x39 +001524 0013b404 DCB 0x00,0x13,0xb4,0x04 +001528 cf052505 DCB 0xcf,0x05,0x25,0x05 +00152c 7905c306 DCB 0x79,0x05,0xc3,0x06 +001530 03068006 DCB 0x03,0x06,0x80,0x06 +001534 e1073b07 DCB 0xe1,0x07,0x3b,0x07 +001538 9339000f DCB 0x93,0x39,0x00,0x0f +00153c b5082708 DCB 0xb5,0x08,0x27,0x08 +001540 a5091a09 DCB 0xa5,0x09,0x1a,0x09 +001544 4c096709 DCB 0x4c,0x09,0x67,0x09 +001548 80098039 DCB 0x80,0x09,0x80,0x39 +00154c 0013b600 DCB 0x00,0x13,0xb6,0x00 +001550 00033d03 DCB 0x00,0x03,0x3d,0x03 +001554 7603af03 DCB 0x76,0x03,0xaf,0x03 +001558 df044104 DCB 0xdf,0x04,0x41,0x04 +00155c a4050605 DCB 0xa4,0x05,0x06,0x05 +001560 55390013 DCB 0x55,0x39,0x00,0x13 +001564 b705f106 DCB 0xb7,0x05,0xf1,0x06 +001568 6306d407 DCB 0x63,0x06,0xd4,0x07 +00156c 2d077d08 DCB 0x2d,0x07,0x7d,0x08 +001570 1b089509 DCB 0x1b,0x08,0x95,0x09 +001574 00096a39 DCB 0x00,0x09,0x6a,0x39 +001578 000fb80a DCB 0x00,0x0f,0xb8,0x0a +00157c 1e0abe0b DCB 0x1e,0x0a,0xbe,0x0b +001580 510b930b DCB 0x51,0x0b,0x93,0x0b +001584 b70bd90b DCB 0xb7,0x0b,0xd9,0x0b +001588 d9390002 DCB 0xd9,0x39,0x00,0x02 +00158c bf413900 DCB 0xbf,0x41,0x39,0x00 +001590 13b00000 DCB 0x13,0xb0,0x00,0x00 +001594 02cf03cb DCB 0x02,0xcf,0x03,0xcb +001598 03eb040b DCB 0x03,0xeb,0x04,0x0b +00159c 0447047e DCB 0x04,0x47,0x04,0x7e +0015a0 04cc04fd DCB 0x04,0xcc,0x04,0xfd +0015a4 390013b1 DCB 0x39,0x00,0x13,0xb1 +0015a8 052a0578 DCB 0x05,0x2a,0x05,0x78 +0015ac 05c90612 DCB 0x05,0xc9,0x06,0x12 +0015b0 069906e1 DCB 0x06,0x99,0x06,0xe1 +0015b4 0730079a DCB 0x07,0x30,0x07,0x9a +0015b8 07f43900 DCB 0x07,0xf4,0x39,0x00 +0015bc 0fb20844 DCB 0x0f,0xb2,0x08,0x44 +0015c0 08e809ad DCB 0x08,0xe8,0x09,0xad +0015c4 09e60a03 DCB 0x09,0xe6,0x0a,0x03 +0015c8 0a1d0a20 DCB 0x0a,0x1d,0x0a,0x20 +0015cc 390013b3 DCB 0x39,0x00,0x13,0xb3 +0015d0 0000024e DCB 0x00,0x00,0x02,0x4e +0015d4 031d0339 DCB 0x03,0x1d,0x03,0x39 +0015d8 03520376 DCB 0x03,0x52,0x03,0x76 +0015dc 039e03f0 DCB 0x03,0x9e,0x03,0xf0 +0015e0 04233900 DCB 0x04,0x23,0x39,0x00 +0015e4 13b40450 DCB 0x13,0xb4,0x04,0x50 +0015e8 04a004ee DCB 0x04,0xa0,0x04,0xee +0015ec 052f05a9 DCB 0x05,0x2f,0x05,0xa9 +0015f0 05e9062e DCB 0x05,0xe9,0x06,0x2e +0015f4 068b06d5 DCB 0x06,0x8b,0x06,0xd5 +0015f8 39000fb5 DCB 0x39,0x00,0x0f,0xb5 +0015fc 071a07aa DCB 0x07,0x1a,0x07,0xaa +001600 08520882 DCB 0x08,0x52,0x08,0x82 +001604 089a08b1 DCB 0x08,0x9a,0x08,0xb1 +001608 08b33900 DCB 0x08,0xb3,0x39,0x00 +00160c 13b60000 DCB 0x13,0xb6,0x00,0x00 +001610 02780362 DCB 0x02,0x78,0x03,0x62 +001614 038d03b7 DCB 0x03,0x8d,0x03,0xb7 +001618 0401044c DCB 0x04,0x01,0x04,0x4c +00161c 04c3050c DCB 0x04,0xc3,0x05,0x0c +001620 390013b7 DCB 0x39,0x00,0x13,0xb7 +001624 054805b3 DCB 0x05,0x48,0x05,0xb3 +001628 061a0671 DCB 0x06,0x1a,0x06,0x71 +00162c 070e075c DCB 0x07,0x0e,0x07,0x5c +001630 07b40828 DCB 0x07,0xb4,0x08,0x28 +001634 08853900 DCB 0x08,0x85,0x39,0x00 +001638 0fb808d9 DCB 0x0f,0xb8,0x08,0xd9 +00163c 09860a54 DCB 0x09,0x86,0x0a,0x54 +001640 0a910ab0 DCB 0x0a,0x91,0x0a,0xb0 +001644 0acd0ad0 DCB 0x0a,0xcd,0x0a,0xd0 +001648 390002bf DCB 0x39,0x00,0x02,0xbf +00164c 40390013 DCB 0x40,0x39,0x00,0x13 +001650 b0000003 DCB 0xb0,0x00,0x00,0x03 +001654 cd03d203 DCB 0xcd,0x03,0xd2,0x03 +001658 d703dc03 DCB 0xd7,0x03,0xdc,0x03 +00165c f4041004 DCB 0xf4,0x04,0x10,0x04 +001660 2a044239 DCB 0x2a,0x04,0x42,0x39 +001664 0013b104 DCB 0x00,0x13,0xb1,0x04 +001668 6f049904 DCB 0x6f,0x04,0x99,0x04 +00166c c104f005 DCB 0xc1,0x04,0xf0,0x05 +001670 17056205 DCB 0x17,0x05,0x62,0x05 +001674 ab05ed06 DCB 0xab,0x05,0xed,0x06 +001678 2e39000f DCB 0x2e,0x39,0x00,0x0f +00167c b2069c06 DCB 0xb2,0x06,0x9c,0x06 +001680 fe075c07 DCB 0xfe,0x07,0x5c,0x07 +001684 8c07a007 DCB 0x8c,0x07,0xa0,0x07 +001688 b207b239 DCB 0xb2,0x07,0xb2,0x39 +00168c 0013b300 DCB 0x00,0x13,0xb3,0x00 +001690 00032f03 DCB 0x00,0x03,0x2f,0x03 +001694 37033f03 DCB 0x37,0x03,0x3f,0x03 +001698 44034b03 DCB 0x44,0x03,0x4b,0x03 +00169c 54035b03 DCB 0x54,0x03,0x5b,0x03 +0016a0 6d390013 DCB 0x6d,0x39,0x00,0x13 +0016a4 b4038f03 DCB 0xb4,0x03,0x8f,0x03 +0016a8 b803e004 DCB 0xb8,0x03,0xe0,0x04 +0016ac 0e043804 DCB 0x0e,0x04,0x38,0x04 +0016b0 8a04cf05 DCB 0x8a,0x04,0xcf,0x05 +0016b4 0d054939 DCB 0x0d,0x05,0x49,0x39 +0016b8 000fb505 DCB 0x00,0x0f,0xb5,0x05 +0016bc af060606 DCB 0xaf,0x06,0x06,0x06 +0016c0 56067906 DCB 0x56,0x06,0x79,0x06 +0016c4 8c069e06 DCB 0x8c,0x06,0x9e,0x06 +0016c8 9e390013 DCB 0x9e,0x39,0x00,0x13 +0016cc b6000003 DCB 0xb6,0x00,0x00,0x03 +0016d0 72037803 DCB 0x72,0x03,0x78,0x03 +0016d4 7e038303 DCB 0x7e,0x03,0x83,0x03 +0016d8 9b03b603 DCB 0x9b,0x03,0xb6,0x03 +0016dc cf03f039 DCB 0xcf,0x03,0xf0,0x39 +0016e0 0013b704 DCB 0x00,0x13,0xb7,0x04 +0016e4 30047004 DCB 0x30,0x04,0x70,0x04 +0016e8 ae04f105 DCB 0xae,0x04,0xf1,0x05 +0016ec 27059105 DCB 0x27,0x05,0x91,0x05 +0016f0 ef063f06 DCB 0xef,0x06,0x3f,0x06 +0016f4 8d39000f DCB 0x8d,0x39,0x00,0x0f +0016f8 b8071107 DCB 0xb8,0x07,0x11,0x07 +0016fc 8007e108 DCB 0x80,0x07,0xe1,0x08 +001700 11082808 DCB 0x11,0x08,0x28,0x08 +001704 3d083d39 DCB 0x3d,0x08,0x3d,0x39 +001708 0002ce01 DCB 0x00,0x02,0xce,0x01 +00170c 390002cc DCB 0x39,0x00,0x02,0xcc +001710 00390006 DCB 0x00,0x39,0x00,0x06 +001714 f055aa52 DCB 0xf0,0x55,0xaa,0x52 +001718 08023900 DCB 0x08,0x02,0x39,0x00 +00171c 19b90004 DCB 0x19,0xb9,0x00,0x04 +001720 000c0014 DCB 0x00,0x0c,0x00,0x14 +001724 001c002c DCB 0x00,0x1c,0x00,0x2c +001728 003c005c DCB 0x00,0x3c,0x00,0x5c +00172c 007c009c DCB 0x00,0x7c,0x00,0x9c +001730 00bc00dc DCB 0x00,0xbc,0x00,0xdc +001734 00fc3900 DCB 0x00,0xfc,0x39,0x00 +001738 19ba013c DCB 0x19,0xba,0x01,0x3c +00173c 017c01bc DCB 0x01,0x7c,0x01,0xbc +001740 01fc023c DCB 0x01,0xfc,0x02,0x3c +001744 027c02fc DCB 0x02,0x7c,0x02,0xfc +001748 037c03bc DCB 0x03,0x7c,0x03,0xbc +00174c 03dc03fc DCB 0x03,0xdc,0x03,0xfc +001750 03ff3900 DCB 0x03,0xff,0x39,0x00 +001754 06f055aa DCB 0x06,0xf0,0x55,0xaa +001758 52080339 DCB 0x52,0x08,0x03,0x39 +00175c 0006b200 DCB 0x00,0x06,0xb2,0x00 +001760 1f1f0601 DCB 0x1f,0x1f,0x06,0x01 +001764 3900026f DCB 0x39,0x00,0x02,0x6f +001768 0539000d DCB 0x05,0x39,0x00,0x0d +00176c b2001010 DCB 0xb2,0x00,0x10,0x10 +001770 000f0f00 DCB 0x00,0x0f,0x0f,0x00 +001774 1010001f DCB 0x10,0x10,0x00,0x1f +001778 1f390002 DCB 0x1f,0x39,0x00,0x02 +00177c 6f113900 DCB 0x6f,0x11,0x39,0x00 +001780 09b20601 DCB 0x09,0xb2,0x06,0x01 +001784 06010601 DCB 0x06,0x01,0x06,0x01 +001788 06013900 DCB 0x06,0x01,0x39,0x00 +00178c 026f1939 DCB 0x02,0x6f,0x19,0x39 +001790 0002b200 DCB 0x00,0x02,0xb2,0x00 +001794 390010b6 DCB 0x39,0x00,0x10,0xb6 +001798 f01c1c00 DCB 0xf0,0x1c,0x1c,0x00 +00179c 10010010 DCB 0x10,0x01,0x00,0x10 +0017a0 01001001 DCB 0x01,0x00,0x10,0x01 +0017a4 001c1c39 DCB 0x00,0x1c,0x1c,0x39 +0017a8 00026f0f DCB 0x00,0x02,0x6f,0x0f +0017ac 390004b6 DCB 0x39,0x00,0x04,0xb6 +0017b0 1f000a39 DCB 0x1f,0x00,0x0a,0x39 +0017b4 00026f1a DCB 0x00,0x02,0x6f,0x1a +0017b8 390004b6 DCB 0x39,0x00,0x04,0xb6 +0017bc 0f000a39 DCB 0x0f,0x00,0x0a,0x39 +0017c0 00026f25 DCB 0x00,0x02,0x6f,0x25 +0017c4 390004b6 DCB 0x39,0x00,0x04,0xb6 +0017c8 0f000a39 DCB 0x0f,0x00,0x0a,0x39 +0017cc 00026f30 DCB 0x00,0x02,0x6f,0x30 +0017d0 390004b6 DCB 0x39,0x00,0x04,0xb6 +0017d4 0f000a39 DCB 0x0f,0x00,0x0a,0x39 +0017d8 0011bb11 DCB 0x00,0x11,0xbb,0x11 +0017dc 001d7e00 DCB 0x00,0x1d,0x7e,0x00 +0017e0 0f5e000e DCB 0x0f,0x5e,0x00,0x0e +0017e4 4c000000 DCB 0x4c,0x00,0x00,0x00 +0017e8 001d7e39 DCB 0x00,0x1d,0x7e,0x39 +0017ec 0011bc22 DCB 0x00,0x11,0xbc,0x22 +0017f0 101d5c00 DCB 0x10,0x1d,0x5c,0x00 +0017f4 0f3c000e DCB 0x0f,0x3c,0x00,0x0e +0017f8 29000000 DCB 0x29,0x00,0x00,0x00 +0017fc 001d5c39 DCB 0x00,0x1d,0x5c,0x39 +001800 0006f055 DCB 0x00,0x06,0xf0,0x55 +001804 aa520804 DCB 0xaa,0x52,0x08,0x04 +001808 390002c2 DCB 0x39,0x00,0x02,0xc2 +00180c 14390002 DCB 0x14,0x39,0x00,0x02 +001810 b1023900 DCB 0xb1,0x02,0x39,0x00 +001814 02b24039 DCB 0x02,0xb2,0x40,0x39 +001818 00026f01 DCB 0x00,0x02,0x6f,0x01 +00181c 390004b2 DCB 0x39,0x00,0x04,0xb2 +001820 00000039 DCB 0x00,0x00,0x00,0x39 +001824 00026f04 DCB 0x00,0x02,0x6f,0x04 +001828 390004b2 DCB 0x39,0x00,0x04,0xb2 +00182c 09e34039 DCB 0x09,0xe3,0x40,0x39 +001830 00026f07 DCB 0x00,0x02,0x6f,0x07 +001834 390004b2 DCB 0x39,0x00,0x04,0xb2 +001838 09e40039 DCB 0x09,0xe4,0x00,0x39 +00183c 00026f0a DCB 0x00,0x02,0x6f,0x0a +001840 390004b2 DCB 0x39,0x00,0x04,0xb2 +001844 09e34039 DCB 0x09,0xe3,0x40,0x39 +001848 0002cb86 DCB 0x00,0x02,0xcb,0x86 +00184c 390005d0 DCB 0x39,0x00,0x05,0xd0 +001850 00000010 DCB 0x00,0x00,0x00,0x10 +001854 3900026f DCB 0x39,0x00,0x02,0x6f +001858 04390002 DCB 0x04,0x39,0x00,0x02 +00185c d0013900 DCB 0xd0,0x01,0x39,0x00 +001860 026f0139 DCB 0x02,0x6f,0x01,0x39 +001864 0006cb05 DCB 0x00,0x06,0xcb,0x05 +001868 0f1f3e7c DCB 0x0f,0x1f,0x3e,0x7c +00186c 3900026f DCB 0x39,0x00,0x02,0x6f +001870 0639000b DCB 0x06,0x39,0x00,0x0b +001874 cb000800 DCB 0xcb,0x00,0x08,0x00 +001878 3c014807 DCB 0x3c,0x01,0x48,0x07 +00187c ff0fff39 DCB 0xff,0x0f,0xff,0x39 +001880 00026f00 DCB 0x00,0x02,0x6f,0x00 +001884 390006d2 DCB 0x39,0x00,0x06,0xd2 +001888 120c0c0a DCB 0x12,0x0c,0x0c,0x0a +00188c 06390002 DCB 0x06,0x39,0x00,0x02 +001890 6f053900 DCB 0x6f,0x05,0x39,0x00 +001894 06d23014 DCB 0x06,0xd2,0x30,0x14 +001898 160e0a39 DCB 0x16,0x0e,0x0a,0x39 +00189c 00026f0a DCB 0x00,0x02,0x6f,0x0a +0018a0 390006d2 DCB 0x39,0x00,0x06,0xd2 +0018a4 48201612 DCB 0x48,0x20,0x16,0x12 +0018a8 0e390002 DCB 0x0e,0x39,0x00,0x02 +0018ac 6f0f3900 DCB 0x6f,0x0f,0x39,0x00 +0018b0 06d24420 DCB 0x06,0xd2,0x44,0x20 +0018b4 16121539 DCB 0x16,0x12,0x15,0x39 +0018b8 00026f14 DCB 0x00,0x02,0x6f,0x14 +0018bc 390006d2 DCB 0x39,0x00,0x06,0xd2 +0018c0 40201612 DCB 0x40,0x20,0x16,0x12 +0018c4 12390002 DCB 0x12,0x39,0x00,0x02 +0018c8 6f193900 DCB 0x6f,0x19,0x39,0x00 +0018cc 06d2ffe4 DCB 0x06,0xd2,0xff,0xe4 +0018d0 a9403039 DCB 0xa9,0x40,0x30,0x39 +0018d4 00026f1e DCB 0x00,0x02,0x6f,0x1e +0018d8 390006d2 DCB 0x39,0x00,0x06,0xd2 +0018dc ffd84026 DCB 0xff,0xd8,0x40,0x26 +0018e0 20390002 DCB 0x20,0x39,0x00,0x02 +0018e4 6f233900 DCB 0x6f,0x23,0x39,0x00 +0018e8 06d2ff8f DCB 0x06,0xd2,0xff,0x8f +0018ec 40261f39 DCB 0x40,0x26,0x1f,0x39 +0018f0 00026f28 DCB 0x00,0x02,0x6f,0x28 +0018f4 390006d2 DCB 0x39,0x00,0x06,0xd2 +0018f8 9f604020 DCB 0x9f,0x60,0x40,0x20 +0018fc 1b390002 DCB 0x1b,0x39,0x00,0x02 +001900 6f2d3900 DCB 0x6f,0x2d,0x39,0x00 +001904 06d28440 DCB 0x06,0xd2,0x84,0x40 +001908 40201b39 DCB 0x40,0x20,0x1b,0x39 +00190c 00026f32 DCB 0x00,0x02,0x6f,0x32 +001910 390006d2 DCB 0x39,0x00,0x06,0xd2 +001914 12081010 DCB 0x12,0x08,0x10,0x10 +001918 06390002 DCB 0x06,0x39,0x00,0x02 +00191c 6f373900 DCB 0x6f,0x37,0x39,0x00 +001920 06d23008 DCB 0x06,0xd2,0x30,0x08 +001924 150b0a39 DCB 0x15,0x0b,0x0a,0x39 +001928 00026f3c DCB 0x00,0x02,0x6f,0x3c +00192c 390006d2 DCB 0x39,0x00,0x06,0xd2 +001930 46081010 DCB 0x46,0x08,0x10,0x10 +001934 0c390002 DCB 0x0c,0x39,0x00,0x02 +001938 6f413900 DCB 0x6f,0x41,0x39,0x00 +00193c 06d2301a DCB 0x06,0xd2,0x30,0x1a +001940 10161639 DCB 0x10,0x16,0x16,0x39 +001944 00026f46 DCB 0x00,0x02,0x6f,0x46 +001948 390006d2 DCB 0x39,0x00,0x06,0xd2 +00194c 301a1012 DCB 0x30,0x1a,0x10,0x12 +001950 12390002 DCB 0x12,0x39,0x00,0x02 +001954 6f003900 DCB 0x6f,0x00,0x39,0x00 +001958 06d40808 DCB 0x06,0xd4,0x08,0x08 +00195c 040c0639 DCB 0x04,0x0c,0x06,0x39 +001960 00026f05 DCB 0x00,0x02,0x6f,0x05 +001964 390006d4 DCB 0x39,0x00,0x06,0xd4 +001968 2918100d DCB 0x29,0x18,0x10,0x0d +00196c 0a390002 DCB 0x0a,0x39,0x00,0x02 +001970 6f0a3900 DCB 0x6f,0x0a,0x39,0x00 +001974 06d44014 DCB 0x06,0xd4,0x40,0x14 +001978 10110c39 DCB 0x10,0x11,0x0c,0x39 +00197c 00026f0f DCB 0x00,0x02,0x6f,0x0f +001980 390006d4 DCB 0x39,0x00,0x06,0xd4 +001984 401f1314 DCB 0x40,0x1f,0x13,0x14 +001988 10390002 DCB 0x10,0x39,0x00,0x02 +00198c 6f143900 DCB 0x6f,0x14,0x39,0x00 +001990 06d45f16 DCB 0x06,0xd4,0x5f,0x16 +001994 14161339 DCB 0x14,0x16,0x13,0x39 +001998 00026f19 DCB 0x00,0x02,0x6f,0x19 +00199c 390006d4 DCB 0x39,0x00,0x06,0xd4 +0019a0 ffffa050 DCB 0xff,0xff,0xa0,0x50 +0019a4 2f390002 DCB 0x2f,0x39,0x00,0x02 +0019a8 6f1e3900 DCB 0x6f,0x1e,0x39,0x00 +0019ac 06d4fff0 DCB 0x06,0xd4,0xff,0xf0 +0019b0 9a300c39 DCB 0x9a,0x30,0x0c,0x39 +0019b4 00026f23 DCB 0x00,0x02,0x6f,0x23 +0019b8 390006d4 DCB 0x39,0x00,0x06,0xd4 +0019bc ffa06a30 DCB 0xff,0xa0,0x6a,0x30 +0019c0 0f390002 DCB 0x0f,0x39,0x00,0x02 +0019c4 6f283900 DCB 0x6f,0x28,0x39,0x00 +0019c8 06d4f080 DCB 0x06,0xd4,0xf0,0x80 +0019cc 40301239 DCB 0x40,0x30,0x12,0x39 +0019d0 00026f2d DCB 0x00,0x02,0x6f,0x2d +0019d4 390006d4 DCB 0x39,0x00,0x06,0xd4 +0019d8 b0404030 DCB 0xb0,0x40,0x40,0x30 +0019dc 14390002 DCB 0x14,0x39,0x00,0x02 +0019e0 6f323900 DCB 0x6f,0x32,0x39,0x00 +0019e4 06d40404 DCB 0x06,0xd4,0x04,0x04 +0019e8 040a0539 DCB 0x04,0x0a,0x05,0x39 +0019ec 00026f37 DCB 0x00,0x02,0x6f,0x37 +0019f0 390006d4 DCB 0x39,0x00,0x06,0xd4 +0019f4 3214100b DCB 0x32,0x14,0x10,0x0b +0019f8 07390002 DCB 0x07,0x39,0x00,0x02 +0019fc 6f3c3900 DCB 0x6f,0x3c,0x39,0x00 +001a00 06d44018 DCB 0x06,0xd4,0x40,0x18 +001a04 100c0939 DCB 0x10,0x0c,0x09,0x39 +001a08 00026f41 DCB 0x00,0x02,0x6f,0x41 +001a0c 390006d4 DCB 0x39,0x00,0x06,0xd4 +001a10 201c1a0e DCB 0x20,0x1c,0x1a,0x0e +001a14 0b390002 DCB 0x0b,0x39,0x00,0x02 +001a18 6f463900 DCB 0x6f,0x46,0x39,0x00 +001a1c 06d4b518 DCB 0x06,0xd4,0xb5,0x18 +001a20 18080c39 DCB 0x18,0x08,0x0c,0x39 +001a24 0006f055 DCB 0x00,0x06,0xf0,0x55 +001a28 aa520805 DCB 0xaa,0x52,0x08,0x05 +001a2c 390003c7 DCB 0x39,0x00,0x03,0xc7 +001a30 07013900 DCB 0x07,0x01,0x39,0x00 +001a34 04b00721 DCB 0x04,0xb0,0x07,0x21 +001a38 00390003 DCB 0x00,0x39,0x00,0x03 +001a3c b3868039 DCB 0xb3,0x86,0x80,0x39 +001a40 0003b585 DCB 0x00,0x03,0xb5,0x85 +001a44 81390005 DCB 0x81,0x39,0x00,0x05 +001a48 b7850000 DCB 0xb7,0x85,0x00,0x00 +001a4c 81390005 DCB 0x81,0x39,0x00,0x05 +001a50 b8850000 DCB 0xb8,0x85,0x00,0x00 +001a54 81390005 DCB 0x81,0x39,0x00,0x05 +001a58 b9850000 DCB 0xb9,0x85,0x00,0x00 +001a5c 81390004 DCB 0x81,0x39,0x00,0x04 +001a60 d0000310 DCB 0xd0,0x00,0x03,0x10 +001a64 390005e0 DCB 0x39,0x00,0x05,0xe0 +001a68 82000002 DCB 0x82,0x00,0x00,0x02 +001a6c 390004d1 DCB 0x39,0x00,0x04,0xd1 +001a70 00011039 DCB 0x00,0x01,0x10,0x39 +001a74 0005e182 DCB 0x00,0x05,0xe1,0x82 +001a78 00000239 DCB 0x00,0x00,0x02,0x39 +001a7c 0006f055 DCB 0x00,0x06,0xf0,0x55 +001a80 aa520806 DCB 0xaa,0x52,0x08,0x06 +001a84 390006b0 DCB 0x39,0x00,0x06,0xb0 +001a88 13321232 DCB 0x13,0x32,0x12,0x32 +001a8c 04390006 DCB 0x04,0x39,0x00,0x06 +001a90 b132310e DCB 0xb1,0x32,0x31,0x0e +001a94 32313900 DCB 0x32,0x31,0x39,0x00 +001a98 06b23200 DCB 0x06,0xb2,0x32,0x00 +001a9c 32313239 DCB 0x32,0x31,0x32,0x39 +001aa0 0002b30f DCB 0x00,0x02,0xb3,0x0f +001aa4 390006b6 DCB 0x39,0x00,0x06,0xb6 +001aa8 13321232 DCB 0x13,0x32,0x12,0x32 +001aac 04390006 DCB 0x04,0x39,0x00,0x06 +001ab0 b732310e DCB 0xb7,0x32,0x31,0x0e +001ab4 32313900 DCB 0x32,0x31,0x39,0x00 +001ab8 06b83200 DCB 0x06,0xb8,0x32,0x00 +001abc 32313239 DCB 0x32,0x31,0x32,0x39 +001ac0 0002b90f DCB 0x00,0x02,0xb9,0x0f +001ac4 390002d0 DCB 0x39,0x00,0x02,0xd0 +001ac8 01390006 DCB 0x01,0x39,0x00,0x06 +001acc f055aa52 DCB 0xf0,0x55,0xaa,0x52 +001ad0 08073900 DCB 0x08,0x07,0x39,0x00 +001ad4 02b4c039 DCB 0x02,0xb4,0xc0,0x39 +001ad8 0006b084 DCB 0x00,0x06,0xb0,0x84 +001adc c0787000 DCB 0xc0,0x78,0x70,0x00 +001ae0 390007b1 DCB 0x39,0x00,0x07,0xb1 +001ae4 0c1c001c DCB 0x0c,0x1c,0x00,0x1c +001ae8 0c003900 DCB 0x0c,0x00,0x39,0x00 +001aec 02b22039 DCB 0x02,0xb2,0x20,0x39 +001af0 00026f36 DCB 0x00,0x02,0x6f,0x36 +001af4 390002b2 DCB 0x39,0x00,0x02,0xb2 +001af8 32390002 DCB 0x32,0x39,0x00,0x02 +001afc 6f3f3900 DCB 0x6f,0x3f,0x39,0x00 +001b00 02b20439 DCB 0x02,0xb2,0x04,0x39 +001b04 00026f09 DCB 0x00,0x02,0x6f,0x09 +001b08 390002b2 DCB 0x39,0x00,0x02,0xb2 +001b0c 20390002 DCB 0x20,0x39,0x00,0x02 +001b10 6f483900 DCB 0x6f,0x48,0x39,0x00 +001b14 02b23239 DCB 0x02,0xb2,0x32,0x39 +001b18 00026f51 DCB 0x00,0x02,0x6f,0x51 +001b1c 390002b2 DCB 0x39,0x00,0x02,0xb2 +001b20 04390002 DCB 0x04,0x39,0x00,0x02 +001b24 6f123900 DCB 0x6f,0x12,0x39,0x00 +001b28 02b2f039 DCB 0x02,0xb2,0xf0,0x39 +001b2c 00026f5a DCB 0x00,0x02,0x6f,0x5a +001b30 390002b2 DCB 0x39,0x00,0x02,0xb2 +001b34 03390002 DCB 0x03,0x39,0x00,0x02 +001b38 6f633900 DCB 0x6f,0x63,0x39,0x00 +001b3c 02b29b39 DCB 0x02,0xb2,0x9b,0x39 +001b40 00026f1b DCB 0x00,0x02,0x6f,0x1b +001b44 390002b2 DCB 0x39,0x00,0x02,0xb2 +001b48 20390002 DCB 0x20,0x39,0x00,0x02 +001b4c 6f6c3900 DCB 0x6f,0x6c,0x39,0x00 +001b50 02b23239 DCB 0x02,0xb2,0x32,0x39 +001b54 00026f75 DCB 0x00,0x02,0x6f,0x75 +001b58 390002b2 DCB 0x39,0x00,0x02,0xb2 +001b5c 04390002 DCB 0x04,0x39,0x00,0x02 +001b60 6f243900 DCB 0x6f,0x24,0x39,0x00 +001b64 02b22039 DCB 0x02,0xb2,0x20,0x39 +001b68 00026f7e DCB 0x00,0x02,0x6f,0x7e +001b6c 390002b2 DCB 0x39,0x00,0x02,0xb2 +001b70 32390002 DCB 0x32,0x39,0x00,0x02 +001b74 6f873900 DCB 0x6f,0x87,0x39,0x00 +001b78 02b20439 DCB 0x02,0xb2,0x04,0x39 +001b7c 00026f2d DCB 0x00,0x02,0x6f,0x2d +001b80 390002b2 DCB 0x39,0x00,0x02,0xb2 +001b84 cc390002 DCB 0xcc,0x39,0x00,0x02 +001b88 6f903900 DCB 0x6f,0x90,0x39,0x00 +001b8c 02b20339 DCB 0x02,0xb2,0x03,0x39 +001b90 00026f99 DCB 0x00,0x02,0x6f,0x99 +001b94 390002b2 DCB 0x39,0x00,0x02,0xb2 +001b98 3a390002 DCB 0x3a,0x39,0x00,0x02 +001b9c b4c03900 DCB 0xb4,0xc0,0x39,0x00 +001ba0 03b70000 DCB 0x03,0xb7,0x00,0x00 +001ba4 390006c0 DCB 0x39,0x00,0x06,0xc0 +001ba8 01010000 DCB 0x01,0x01,0x00,0x00 +001bac 55390002 DCB 0x55,0x39,0x00,0x02 +001bb0 6f003900 DCB 0x6f,0x00,0x39,0x00 +001bb4 16c12c00 DCB 0x16,0xc1,0x2c,0x00 +001bb8 1c391c39 DCB 0x1c,0x39,0x1c,0x39 +001bbc 38723fd9 DCB 0x38,0x72,0x3f,0xd9 +001bc0 a2844000 DCB 0xa2,0x84,0x40,0x00 +001bc4 e7188000 DCB 0xe7,0x18,0x80,0x00 +001bc8 00000039 DCB 0x00,0x00,0x00,0x39 +001bcc 00026f15 DCB 0x00,0x02,0x6f,0x15 +001bd0 390010c1 DCB 0x39,0x00,0x10,0xc1 +001bd4 90000a90 DCB 0x90,0x00,0x0a,0x90 +001bd8 595f33e0 DCB 0x59,0x5f,0x33,0xe0 +001bdc 00000cab DCB 0x00,0x00,0x0c,0xab +001be0 59000039 DCB 0x59,0x00,0x00,0x39 +001be4 00026f24 DCB 0x00,0x02,0x6f,0x24 +001be8 390008c1 DCB 0x39,0x00,0x08,0xc1 +001bec 00000000 DCB 0x00,0x00,0x00,0x00 +001bf0 00000039 DCB 0x00,0x00,0x00,0x39 +001bf4 00026f00 DCB 0x00,0x02,0x6f,0x00 +001bf8 390016c2 DCB 0x39,0x00,0x16,0xc2 +001bfc 2a0f1c39 DCB 0x2a,0x0f,0x1c,0x39 +001c00 1c39c78e DCB 0x1c,0x39,0xc7,0x8e +001c04 0012bdda DCB 0x00,0x12,0xbd,0xda +001c08 401486ba DCB 0x40,0x14,0x86,0xba +001c0c fff612bf DCB 0xff,0xf6,0x12,0xbf +001c10 8d390002 DCB 0x8d,0x39,0x00,0x02 +001c14 6f153900 DCB 0x6f,0x15,0x39,0x00 +001c18 10c293de DCB 0x10,0xc2,0x93,0xde +001c1c 0a94375f DCB 0x0a,0x94,0x37,0x5f +001c20 33efe273 DCB 0x33,0xef,0xe2,0x73 +001c24 00555900 DCB 0x00,0x55,0x59,0x00 +001c28 00390002 DCB 0x00,0x39,0x00,0x02 +001c2c 6f243900 DCB 0x6f,0x24,0x39,0x00 +001c30 08c20000 DCB 0x08,0xc2,0x00,0x00 +001c34 00000000 DCB 0x00,0x00,0x00,0x00 +001c38 00390002 DCB 0x00,0x39,0x00,0x02 +001c3c 6f003900 DCB 0x6f,0x00,0x39,0x00 +001c40 16c32600 DCB 0x16,0xc3,0x26,0x00 +001c44 1c391c39 DCB 0x1c,0x39,0x1c,0x39 +001c48 38720000 DCB 0x38,0x72,0x00,0x00 +001c4c 00003fd8 DCB 0x00,0x00,0x3f,0xd8 +001c50 bb6c8000 DCB 0xbb,0x6c,0x80,0x00 +001c54 00000039 DCB 0x00,0x00,0x00,0x39 +001c58 00026f15 DCB 0x00,0x02,0x6f,0x15 +001c5c 390010c3 DCB 0x39,0x00,0x10,0xc3 +001c60 03de0004 DCB 0x03,0xde,0x00,0x04 +001c64 37553360 DCB 0x37,0x55,0x33,0x60 +001c68 00000355 DCB 0x00,0x00,0x03,0x55 +001c6c a7000039 DCB 0xa7,0x00,0x00,0x39 +001c70 00026f24 DCB 0x00,0x02,0x6f,0x24 +001c74 390008c3 DCB 0x39,0x00,0x08,0xc3 +001c78 00000000 DCB 0x00,0x00,0x00,0x00 +001c7c 00000039 DCB 0x00,0x00,0x00,0x39 +001c80 00026f00 DCB 0x00,0x02,0x6f,0x00 +001c84 390016c4 DCB 0x39,0x00,0x16,0xc4 +001c88 200f1c39 DCB 0x20,0x0f,0x1c,0x39 +001c8c 1c39c78e DCB 0x1c,0x39,0xc7,0x8e +001c90 3fec605e DCB 0x3f,0xec,0x60,0x5e +001c94 3fec5b0e DCB 0x3f,0xec,0x5b,0x0e +001c98 8003693f DCB 0x80,0x03,0x69,0x3f +001c9c a9390002 DCB 0xa9,0x39,0x00,0x02 +001ca0 6f153900 DCB 0x6f,0x15,0x39,0x00 +001ca4 10c40000 DCB 0x10,0xc4,0x00,0x00 +001ca8 00005955 DCB 0x00,0x00,0x59,0x55 +001cac 33601d8d DCB 0x33,0x60,0x1d,0x8d +001cb0 0faba700 DCB 0x0f,0xab,0xa7,0x00 +001cb4 00390002 DCB 0x00,0x39,0x00,0x02 +001cb8 6f243900 DCB 0x6f,0x24,0x39,0x00 +001cbc 08c40000 DCB 0x08,0xc4,0x00,0x00 +001cc0 00000000 DCB 0x00,0x00,0x00,0x00 +001cc4 00390002 DCB 0x00,0x39,0x00,0x02 +001cc8 6f003900 DCB 0x6f,0x00,0x39,0x00 +001ccc 16c52100 DCB 0x16,0xc5,0x21,0x00 +001cd0 03c10349 DCB 0x03,0xc1,0x03,0x49 +001cd4 00003fff DCB 0x00,0x00,0x3f,0xff +001cd8 26463fff DCB 0x26,0x46,0x3f,0xff +001cdc 34520000 DCB 0x34,0x52,0x00,0x00 +001ce0 0c550939 DCB 0x0c,0x55,0x09,0x39 +001ce4 00026f15 DCB 0x00,0x02,0x6f,0x15 +001ce8 390010c5 DCB 0x39,0x00,0x10,0xc5 +001cec 01fe1402 DCB 0x01,0xfe,0x14,0x02 +001cf0 1b333380 DCB 0x1b,0x33,0x33,0x80 +001cf4 03830fe1 DCB 0x03,0x83,0x0f,0xe1 +001cf8 e3000039 DCB 0xe3,0x00,0x00,0x39 +001cfc 00026f24 DCB 0x00,0x02,0x6f,0x24 +001d00 390008c5 DCB 0x39,0x00,0x08,0xc5 +001d04 00000000 DCB 0x00,0x00,0x00,0x00 +001d08 00000039 DCB 0x00,0x00,0x00,0x39 +001d0c 00026f00 DCB 0x00,0x02,0x6f,0x00 +001d10 390016c6 DCB 0x39,0x00,0x16,0xc6 +001d14 27000384 DCB 0x27,0x00,0x03,0x84 +001d18 03490000 DCB 0x03,0x49,0x00,0x00 +001d1c 00000000 DCB 0x00,0x00,0x00,0x00 +001d20 3fff3ae4 DCB 0x3f,0xff,0x3a,0xe4 +001d24 00000000 DCB 0x00,0x00,0x00,0x00 +001d28 00390002 DCB 0x00,0x39,0x00,0x02 +001d2c 6f153900 DCB 0x6f,0x15,0x39,0x00 +001d30 10c6021c DCB 0x10,0xc6,0x02,0x1c +001d34 14023932 DCB 0x14,0x02,0x39,0x32 +001d38 33800000 DCB 0x33,0x80,0x00,0x00 +001d3c 031ee300 DCB 0x03,0x1e,0xe3,0x00 +001d40 00390002 DCB 0x00,0x39,0x00,0x02 +001d44 6f243900 DCB 0x6f,0x24,0x39,0x00 +001d48 08c60000 DCB 0x08,0xc6,0x00,0x00 +001d4c 00000000 DCB 0x00,0x00,0x00,0x00 +001d50 00390002 DCB 0x00,0x39,0x00,0x02 +001d54 6f003900 DCB 0x6f,0x00,0x39,0x00 +001d58 16c72d00 DCB 0x16,0xc7,0x2d,0x00 +001d5c 03840349 DCB 0x03,0x84,0x03,0x49 +001d60 00003fff DCB 0x00,0x00,0x3f,0xff +001d64 34180000 DCB 0x34,0x18,0x00,0x00 +001d68 00008000 DCB 0x00,0x00,0x80,0x00 +001d6c 00000039 DCB 0x00,0x00,0x00,0x39 +001d70 00026f15 DCB 0x00,0x02,0x6f,0x15 +001d74 390010c7 DCB 0x39,0x00,0x10,0xc7 +001d78 01fe3402 DCB 0x01,0xfe,0x34,0x02 +001d7c 1b523350 DCB 0x1b,0x52,0x33,0x50 +001d80 00000ce2 DCB 0x00,0x00,0x0c,0xe2 +001d84 1d000039 DCB 0x1d,0x00,0x00,0x39 +001d88 00026f24 DCB 0x00,0x02,0x6f,0x24 +001d8c 390008c7 DCB 0x39,0x00,0x08,0xc7 +001d90 00000000 DCB 0x00,0x00,0x00,0x00 +001d94 00000039 DCB 0x00,0x00,0x00,0x39 +001d98 00026f00 DCB 0x00,0x02,0x6f,0x00 +001d9c 390016c8 DCB 0x39,0x00,0x16,0xc8 +001da0 2b0003c1 DCB 0x2b,0x00,0x03,0xc1 +001da4 03490000 DCB 0x03,0x49,0x00,0x00 +001da8 00000000 DCB 0x00,0x00,0x00,0x00 +001dac 00000000 DCB 0x00,0x00,0x00,0x00 +001db0 fffff3aa DCB 0xff,0xff,0xf3,0xaa +001db4 f7390002 DCB 0xf7,0x39,0x00,0x02 +001db8 6f153900 DCB 0x6f,0x15,0x39,0x00 +001dbc 10c8021c DCB 0x10,0xc8,0x02,0x1c +001dc0 33023952 DCB 0x33,0x02,0x39,0x52 +001dc4 336ffc7d DCB 0x33,0x6f,0xfc,0x7d +001dc8 001f1d00 DCB 0x00,0x1f,0x1d,0x00 +001dcc 00390002 DCB 0x00,0x39,0x00,0x02 +001dd0 6f243900 DCB 0x6f,0x24,0x39,0x00 +001dd4 08c80000 DCB 0x08,0xc8,0x00,0x00 +001dd8 00000000 DCB 0x00,0x00,0x00,0x00 +001ddc 00390002 DCB 0x00,0x39,0x00,0x02 +001de0 6f003900 DCB 0x6f,0x00,0x39,0x00 +001de4 16c90000 DCB 0x16,0xc9,0x00,0x00 +001de8 00000000 DCB 0x00,0x00,0x00,0x00 +001dec 00000000 DCB 0x00,0x00,0x00,0x00 +001df0 00000000 DCB 0x00,0x00,0x00,0x00 +001df4 00000000 DCB 0x00,0x00,0x00,0x00 +001df8 00000039 DCB 0x00,0x00,0x00,0x39 +001dfc 00026f15 DCB 0x00,0x02,0x6f,0x15 +001e00 390010c9 DCB 0x39,0x00,0x10,0xc9 +001e04 00000000 DCB 0x00,0x00,0x00,0x00 +001e08 00000000 DCB 0x00,0x00,0x00,0x00 +001e0c 00000000 DCB 0x00,0x00,0x00,0x00 +001e10 00000039 DCB 0x00,0x00,0x00,0x39 +001e14 00026f24 DCB 0x00,0x02,0x6f,0x24 +001e18 390008c9 DCB 0x39,0x00,0x08,0xc9 +001e1c 00000000 DCB 0x00,0x00,0x00,0x00 +001e20 00000039 DCB 0x00,0x00,0x00,0x39 +001e24 00026f00 DCB 0x00,0x02,0x6f,0x00 +001e28 390016ca DCB 0x39,0x00,0x16,0xca +001e2c 00000000 DCB 0x00,0x00,0x00,0x00 +001e30 00000000 DCB 0x00,0x00,0x00,0x00 +001e34 00000000 DCB 0x00,0x00,0x00,0x00 +001e38 00000000 DCB 0x00,0x00,0x00,0x00 +001e3c 00000000 DCB 0x00,0x00,0x00,0x00 +001e40 00390002 DCB 0x00,0x39,0x00,0x02 +001e44 6f153900 DCB 0x6f,0x15,0x39,0x00 +001e48 10ca0000 DCB 0x10,0xca,0x00,0x00 +001e4c 00000000 DCB 0x00,0x00,0x00,0x00 +001e50 00000000 DCB 0x00,0x00,0x00,0x00 +001e54 00000000 DCB 0x00,0x00,0x00,0x00 +001e58 00390002 DCB 0x00,0x39,0x00,0x02 +001e5c 6f243900 DCB 0x6f,0x24,0x39,0x00 +001e60 08ca0000 DCB 0x08,0xca,0x00,0x00 +001e64 00000000 DCB 0x00,0x00,0x00,0x00 +001e68 00390002 DCB 0x00,0x39,0x00,0x02 +001e6c 6f003900 DCB 0x6f,0x00,0x39,0x00 +001e70 16cb0000 DCB 0x16,0xcb,0x00,0x00 +001e74 00000000 DCB 0x00,0x00,0x00,0x00 +001e78 00000000 DCB 0x00,0x00,0x00,0x00 +001e7c 00000000 DCB 0x00,0x00,0x00,0x00 +001e80 00000000 DCB 0x00,0x00,0x00,0x00 +001e84 00000039 DCB 0x00,0x00,0x00,0x39 +001e88 00026f15 DCB 0x00,0x02,0x6f,0x15 +001e8c 390010cb DCB 0x39,0x00,0x10,0xcb +001e90 00000000 DCB 0x00,0x00,0x00,0x00 +001e94 00000000 DCB 0x00,0x00,0x00,0x00 +001e98 00000000 DCB 0x00,0x00,0x00,0x00 +001e9c 00000039 DCB 0x00,0x00,0x00,0x39 +001ea0 00026f24 DCB 0x00,0x02,0x6f,0x24 +001ea4 390008cb DCB 0x39,0x00,0x08,0xcb +001ea8 00000000 DCB 0x00,0x00,0x00,0x00 +001eac 00000039 DCB 0x00,0x00,0x00,0x39 +001eb0 00026f00 DCB 0x00,0x02,0x6f,0x00 +001eb4 390016cc DCB 0x39,0x00,0x16,0xcc +001eb8 00000000 DCB 0x00,0x00,0x00,0x00 +001ebc 00000000 DCB 0x00,0x00,0x00,0x00 +001ec0 00000000 DCB 0x00,0x00,0x00,0x00 +001ec4 00000000 DCB 0x00,0x00,0x00,0x00 +001ec8 00000000 DCB 0x00,0x00,0x00,0x00 +001ecc 00390002 DCB 0x00,0x39,0x00,0x02 +001ed0 6f153900 DCB 0x6f,0x15,0x39,0x00 +001ed4 10cc0000 DCB 0x10,0xcc,0x00,0x00 +001ed8 00000000 DCB 0x00,0x00,0x00,0x00 +001edc 00000000 DCB 0x00,0x00,0x00,0x00 +001ee0 00000000 DCB 0x00,0x00,0x00,0x00 +001ee4 00390002 DCB 0x00,0x39,0x00,0x02 +001ee8 6f243900 DCB 0x6f,0x24,0x39,0x00 +001eec 08cc0000 DCB 0x08,0xcc,0x00,0x00 +001ef0 00000000 DCB 0x00,0x00,0x00,0x00 +001ef4 00390002 DCB 0x00,0x39,0x00,0x02 +001ef8 6f003900 DCB 0x6f,0x00,0x39,0x00 +001efc 16cd0000 DCB 0x16,0xcd,0x00,0x00 +001f00 00000000 DCB 0x00,0x00,0x00,0x00 +001f04 00000000 DCB 0x00,0x00,0x00,0x00 +001f08 00000000 DCB 0x00,0x00,0x00,0x00 +001f0c 00000000 DCB 0x00,0x00,0x00,0x00 +001f10 00000039 DCB 0x00,0x00,0x00,0x39 +001f14 00026f15 DCB 0x00,0x02,0x6f,0x15 +001f18 390010cd DCB 0x39,0x00,0x10,0xcd +001f1c 00000000 DCB 0x00,0x00,0x00,0x00 +001f20 00000000 DCB 0x00,0x00,0x00,0x00 +001f24 00000000 DCB 0x00,0x00,0x00,0x00 +001f28 00000039 DCB 0x00,0x00,0x00,0x39 +001f2c 00026f24 DCB 0x00,0x02,0x6f,0x24 +001f30 390008cd DCB 0x39,0x00,0x08,0xcd +001f34 00000000 DCB 0x00,0x00,0x00,0x00 +001f38 00000039 DCB 0x00,0x00,0x00,0x39 +001f3c 00026f00 DCB 0x00,0x02,0x6f,0x00 +001f40 390016ce DCB 0x39,0x00,0x16,0xce +001f44 00000000 DCB 0x00,0x00,0x00,0x00 +001f48 00000000 DCB 0x00,0x00,0x00,0x00 +001f4c 00000000 DCB 0x00,0x00,0x00,0x00 +001f50 00000000 DCB 0x00,0x00,0x00,0x00 +001f54 00000000 DCB 0x00,0x00,0x00,0x00 +001f58 00390002 DCB 0x00,0x39,0x00,0x02 +001f5c 6f153900 DCB 0x6f,0x15,0x39,0x00 +001f60 10ce0000 DCB 0x10,0xce,0x00,0x00 +001f64 00000000 DCB 0x00,0x00,0x00,0x00 +001f68 00000000 DCB 0x00,0x00,0x00,0x00 +001f6c 00000000 DCB 0x00,0x00,0x00,0x00 +001f70 00390002 DCB 0x00,0x39,0x00,0x02 +001f74 6f243900 DCB 0x6f,0x24,0x39,0x00 +001f78 08ce0000 DCB 0x08,0xce,0x00,0x00 +001f7c 00000000 DCB 0x00,0x00,0x00,0x00 +001f80 00390002 DCB 0x00,0x39,0x00,0x02 +001f84 6f003900 DCB 0x6f,0x00,0x39,0x00 +001f88 16cf0000 DCB 0x16,0xcf,0x00,0x00 +001f8c 00000000 DCB 0x00,0x00,0x00,0x00 +001f90 00000000 DCB 0x00,0x00,0x00,0x00 +001f94 00000000 DCB 0x00,0x00,0x00,0x00 +001f98 00000000 DCB 0x00,0x00,0x00,0x00 +001f9c 00000039 DCB 0x00,0x00,0x00,0x39 +001fa0 00026f15 DCB 0x00,0x02,0x6f,0x15 +001fa4 390010cf DCB 0x39,0x00,0x10,0xcf +001fa8 00000000 DCB 0x00,0x00,0x00,0x00 +001fac 00000000 DCB 0x00,0x00,0x00,0x00 +001fb0 00000000 DCB 0x00,0x00,0x00,0x00 +001fb4 00000039 DCB 0x00,0x00,0x00,0x39 +001fb8 00026f24 DCB 0x00,0x02,0x6f,0x24 +001fbc 390008cf DCB 0x39,0x00,0x08,0xcf +001fc0 00000000 DCB 0x00,0x00,0x00,0x00 +001fc4 00000039 DCB 0x00,0x00,0x00,0x39 +001fc8 00026f00 DCB 0x00,0x02,0x6f,0x00 +001fcc 390016d0 DCB 0x39,0x00,0x16,0xd0 +001fd0 00000000 DCB 0x00,0x00,0x00,0x00 +001fd4 00000000 DCB 0x00,0x00,0x00,0x00 +001fd8 00000000 DCB 0x00,0x00,0x00,0x00 +001fdc 00000000 DCB 0x00,0x00,0x00,0x00 +001fe0 00000000 DCB 0x00,0x00,0x00,0x00 +001fe4 00390002 DCB 0x00,0x39,0x00,0x02 +001fe8 6f153900 DCB 0x6f,0x15,0x39,0x00 +001fec 10d00000 DCB 0x10,0xd0,0x00,0x00 +001ff0 00000000 DCB 0x00,0x00,0x00,0x00 +001ff4 00000000 DCB 0x00,0x00,0x00,0x00 +001ff8 00000000 DCB 0x00,0x00,0x00,0x00 +001ffc 00390002 DCB 0x00,0x39,0x00,0x02 +002000 6f243900 DCB 0x6f,0x24,0x39,0x00 +002004 08d00000 DCB 0x08,0xd0,0x00,0x00 +002008 00000000 DCB 0x00,0x00,0x00,0x00 +00200c 00390002 DCB 0x00,0x39,0x00,0x02 +002010 6f003900 DCB 0x6f,0x00,0x39,0x00 +002014 16d10000 DCB 0x16,0xd1,0x00,0x00 +002018 00000000 DCB 0x00,0x00,0x00,0x00 +00201c 00000000 DCB 0x00,0x00,0x00,0x00 +002020 00000000 DCB 0x00,0x00,0x00,0x00 +002024 00000000 DCB 0x00,0x00,0x00,0x00 +002028 00000039 DCB 0x00,0x00,0x00,0x39 +00202c 00026f15 DCB 0x00,0x02,0x6f,0x15 +002030 390010d1 DCB 0x39,0x00,0x10,0xd1 +002034 00000000 DCB 0x00,0x00,0x00,0x00 +002038 00000000 DCB 0x00,0x00,0x00,0x00 +00203c 00000000 DCB 0x00,0x00,0x00,0x00 +002040 00000039 DCB 0x00,0x00,0x00,0x39 +002044 00026f24 DCB 0x00,0x02,0x6f,0x24 +002048 390008d1 DCB 0x39,0x00,0x08,0xd1 +00204c 00000000 DCB 0x00,0x00,0x00,0x00 +002050 00000039 DCB 0x00,0x00,0x00,0x39 +002054 00026f00 DCB 0x00,0x02,0x6f,0x00 +002058 390016d2 DCB 0x39,0x00,0x16,0xd2 +00205c 00000000 DCB 0x00,0x00,0x00,0x00 +002060 00000000 DCB 0x00,0x00,0x00,0x00 +002064 00000000 DCB 0x00,0x00,0x00,0x00 +002068 00000000 DCB 0x00,0x00,0x00,0x00 +00206c 00000000 DCB 0x00,0x00,0x00,0x00 +002070 00390002 DCB 0x00,0x39,0x00,0x02 +002074 6f153900 DCB 0x6f,0x15,0x39,0x00 +002078 10d20000 DCB 0x10,0xd2,0x00,0x00 +00207c 00000000 DCB 0x00,0x00,0x00,0x00 +002080 00000000 DCB 0x00,0x00,0x00,0x00 +002084 00000000 DCB 0x00,0x00,0x00,0x00 +002088 00390002 DCB 0x00,0x39,0x00,0x02 +00208c 6f243900 DCB 0x6f,0x24,0x39,0x00 +002090 08d20000 DCB 0x08,0xd2,0x00,0x00 +002094 00000000 DCB 0x00,0x00,0x00,0x00 +002098 00390002 DCB 0x00,0x39,0x00,0x02 +00209c 6f003900 DCB 0x6f,0x00,0x39,0x00 +0020a0 16d30000 DCB 0x16,0xd3,0x00,0x00 +0020a4 00000000 DCB 0x00,0x00,0x00,0x00 +0020a8 00000000 DCB 0x00,0x00,0x00,0x00 +0020ac 00000000 DCB 0x00,0x00,0x00,0x00 +0020b0 00000000 DCB 0x00,0x00,0x00,0x00 +0020b4 00000039 DCB 0x00,0x00,0x00,0x39 +0020b8 00026f15 DCB 0x00,0x02,0x6f,0x15 +0020bc 390010d3 DCB 0x39,0x00,0x10,0xd3 +0020c0 00000000 DCB 0x00,0x00,0x00,0x00 +0020c4 00000000 DCB 0x00,0x00,0x00,0x00 +0020c8 00000000 DCB 0x00,0x00,0x00,0x00 +0020cc 00000039 DCB 0x00,0x00,0x00,0x39 +0020d0 00026f24 DCB 0x00,0x02,0x6f,0x24 +0020d4 390008d3 DCB 0x39,0x00,0x08,0xd3 +0020d8 00000000 DCB 0x00,0x00,0x00,0x00 +0020dc 00000039 DCB 0x00,0x00,0x00,0x39 +0020e0 00026f00 DCB 0x00,0x02,0x6f,0x00 +0020e4 390016d4 DCB 0x39,0x00,0x16,0xd4 +0020e8 00000000 DCB 0x00,0x00,0x00,0x00 +0020ec 00000000 DCB 0x00,0x00,0x00,0x00 +0020f0 00000000 DCB 0x00,0x00,0x00,0x00 +0020f4 00000000 DCB 0x00,0x00,0x00,0x00 +0020f8 00000000 DCB 0x00,0x00,0x00,0x00 +0020fc 00390002 DCB 0x00,0x39,0x00,0x02 +002100 6f153900 DCB 0x6f,0x15,0x39,0x00 +002104 10d40000 DCB 0x10,0xd4,0x00,0x00 +002108 00000000 DCB 0x00,0x00,0x00,0x00 +00210c 00000000 DCB 0x00,0x00,0x00,0x00 +002110 00000000 DCB 0x00,0x00,0x00,0x00 +002114 00390002 DCB 0x00,0x39,0x00,0x02 +002118 6f243900 DCB 0x6f,0x24,0x39,0x00 +00211c 08d40000 DCB 0x08,0xd4,0x00,0x00 +002120 00000000 DCB 0x00,0x00,0x00,0x00 +002124 00390002 DCB 0x00,0x39,0x00,0x02 +002128 6f003900 DCB 0x6f,0x00,0x39,0x00 +00212c 16d50000 DCB 0x16,0xd5,0x00,0x00 +002130 00000000 DCB 0x00,0x00,0x00,0x00 +002134 00000000 DCB 0x00,0x00,0x00,0x00 +002138 00000000 DCB 0x00,0x00,0x00,0x00 +00213c 00000000 DCB 0x00,0x00,0x00,0x00 +002140 00000039 DCB 0x00,0x00,0x00,0x39 +002144 00026f15 DCB 0x00,0x02,0x6f,0x15 +002148 390010d5 DCB 0x39,0x00,0x10,0xd5 +00214c 00000000 DCB 0x00,0x00,0x00,0x00 +002150 00000000 DCB 0x00,0x00,0x00,0x00 +002154 00000000 DCB 0x00,0x00,0x00,0x00 +002158 00000039 DCB 0x00,0x00,0x00,0x39 +00215c 00026f24 DCB 0x00,0x02,0x6f,0x24 +002160 390008d5 DCB 0x39,0x00,0x08,0xd5 +002164 00000000 DCB 0x00,0x00,0x00,0x00 +002168 00000039 DCB 0x00,0x00,0x00,0x39 +00216c 00026f00 DCB 0x00,0x02,0x6f,0x00 +002170 390016d6 DCB 0x39,0x00,0x16,0xd6 +002174 00000000 DCB 0x00,0x00,0x00,0x00 +002178 00000000 DCB 0x00,0x00,0x00,0x00 +00217c 00000000 DCB 0x00,0x00,0x00,0x00 +002180 00000000 DCB 0x00,0x00,0x00,0x00 +002184 00000000 DCB 0x00,0x00,0x00,0x00 +002188 00390002 DCB 0x00,0x39,0x00,0x02 +00218c 6f153900 DCB 0x6f,0x15,0x39,0x00 +002190 10d60000 DCB 0x10,0xd6,0x00,0x00 +002194 00000000 DCB 0x00,0x00,0x00,0x00 +002198 00000000 DCB 0x00,0x00,0x00,0x00 +00219c 00000000 DCB 0x00,0x00,0x00,0x00 +0021a0 00390002 DCB 0x00,0x39,0x00,0x02 +0021a4 6f243900 DCB 0x6f,0x24,0x39,0x00 +0021a8 08d60000 DCB 0x08,0xd6,0x00,0x00 +0021ac 00000000 DCB 0x00,0x00,0x00,0x00 +0021b0 00390002 DCB 0x00,0x39,0x00,0x02 +0021b4 6f003900 DCB 0x6f,0x00,0x39,0x00 +0021b8 16d70000 DCB 0x16,0xd7,0x00,0x00 +0021bc 00000000 DCB 0x00,0x00,0x00,0x00 +0021c0 00000000 DCB 0x00,0x00,0x00,0x00 +0021c4 00000000 DCB 0x00,0x00,0x00,0x00 +0021c8 00000000 DCB 0x00,0x00,0x00,0x00 +0021cc 00000039 DCB 0x00,0x00,0x00,0x39 +0021d0 00026f15 DCB 0x00,0x02,0x6f,0x15 +0021d4 390010d7 DCB 0x39,0x00,0x10,0xd7 +0021d8 00000000 DCB 0x00,0x00,0x00,0x00 +0021dc 00000000 DCB 0x00,0x00,0x00,0x00 +0021e0 00000000 DCB 0x00,0x00,0x00,0x00 +0021e4 00000039 DCB 0x00,0x00,0x00,0x39 +0021e8 00026f24 DCB 0x00,0x02,0x6f,0x24 +0021ec 390008d7 DCB 0x39,0x00,0x08,0xd7 +0021f0 00000000 DCB 0x00,0x00,0x00,0x00 +0021f4 00000039 DCB 0x00,0x00,0x00,0x39 +0021f8 00026f00 DCB 0x00,0x02,0x6f,0x00 +0021fc 390016d8 DCB 0x39,0x00,0x16,0xd8 +002200 00000000 DCB 0x00,0x00,0x00,0x00 +002204 00000000 DCB 0x00,0x00,0x00,0x00 +002208 00000000 DCB 0x00,0x00,0x00,0x00 +00220c 00000000 DCB 0x00,0x00,0x00,0x00 +002210 00000000 DCB 0x00,0x00,0x00,0x00 +002214 00390002 DCB 0x00,0x39,0x00,0x02 +002218 6f153900 DCB 0x6f,0x15,0x39,0x00 +00221c 10d80000 DCB 0x10,0xd8,0x00,0x00 +002220 00000000 DCB 0x00,0x00,0x00,0x00 +002224 00000000 DCB 0x00,0x00,0x00,0x00 +002228 00000000 DCB 0x00,0x00,0x00,0x00 +00222c 00390002 DCB 0x00,0x39,0x00,0x02 +002230 6f243900 DCB 0x6f,0x24,0x39,0x00 +002234 08d80000 DCB 0x08,0xd8,0x00,0x00 +002238 00000000 DCB 0x00,0x00,0x00,0x00 +00223c 00390006 DCB 0x00,0x39,0x00,0x06 +002240 f055aa52 DCB 0xf0,0x55,0xaa,0x52 +002244 08083900 DCB 0x08,0x08,0x39,0x00 +002248 11b60ffe DCB 0x11,0xb6,0x0f,0xfe +00224c 0ffe0ffe DCB 0x0f,0xfe,0x0f,0xfe +002250 0ffe0ffe DCB 0x0f,0xfe,0x0f,0xfe +002254 0ffe0ffe DCB 0x0f,0xfe,0x0f,0xfe +002258 0ffe3900 DCB 0x0f,0xfe,0x39,0x00 +00225c 026f1039 DCB 0x02,0x6f,0x10,0x39 +002260 0011b60f DCB 0x00,0x11,0xb6,0x0f +002264 fe0ffe0f DCB 0xfe,0x0f,0xfe,0x0f +002268 fe0ffe0f DCB 0xfe,0x0f,0xfe,0x0f +00226c fe0ffe0f DCB 0xfe,0x0f,0xfe,0x0f +002270 fe0ffe39 DCB 0xfe,0x0f,0xfe,0x39 +002274 00026f20 DCB 0x00,0x02,0x6f,0x20 +002278 390007b6 DCB 0x39,0x00,0x07,0xb6 +00227c 0ffe0ffe DCB 0x0f,0xfe,0x0f,0xfe +002280 0ffe3900 DCB 0x0f,0xfe,0x39,0x00 +002284 11b70800 DCB 0x11,0xb7,0x08,0x00 +002288 08000800 DCB 0x08,0x00,0x08,0x00 +00228c 08000800 DCB 0x08,0x00,0x08,0x00 +002290 08000800 DCB 0x08,0x00,0x08,0x00 +002294 08003900 DCB 0x08,0x00,0x39,0x00 +002298 026f1039 DCB 0x02,0x6f,0x10,0x39 +00229c 0011b708 DCB 0x00,0x11,0xb7,0x08 +0022a0 00080008 DCB 0x00,0x08,0x00,0x08 +0022a4 00080008 DCB 0x00,0x08,0x00,0x08 +0022a8 00080008 DCB 0x00,0x08,0x00,0x08 +0022ac 00080039 DCB 0x00,0x08,0x00,0x39 +0022b0 00026f20 DCB 0x00,0x02,0x6f,0x20 +0022b4 390007b7 DCB 0x39,0x00,0x07,0xb7 +0022b8 08000800 DCB 0x08,0x00,0x08,0x00 +0022bc 08003900 DCB 0x08,0x00,0x39,0x00 +0022c0 11b80800 DCB 0x11,0xb8,0x08,0x00 +0022c4 08000800 DCB 0x08,0x00,0x08,0x00 +0022c8 08000800 DCB 0x08,0x00,0x08,0x00 +0022cc 08000800 DCB 0x08,0x00,0x08,0x00 +0022d0 08003900 DCB 0x08,0x00,0x39,0x00 +0022d4 026f1039 DCB 0x02,0x6f,0x10,0x39 +0022d8 0011b808 DCB 0x00,0x11,0xb8,0x08 +0022dc 00080008 DCB 0x00,0x08,0x00,0x08 +0022e0 00080008 DCB 0x00,0x08,0x00,0x08 +0022e4 00080008 DCB 0x00,0x08,0x00,0x08 +0022e8 00080039 DCB 0x00,0x08,0x00,0x39 +0022ec 00026f20 DCB 0x00,0x02,0x6f,0x20 +0022f0 390007b8 DCB 0x39,0x00,0x07,0xb8 +0022f4 08000800 DCB 0x08,0x00,0x08,0x00 +0022f8 08003900 DCB 0x08,0x00,0x39,0x00 +0022fc 11b90101 DCB 0x11,0xb9,0x01,0x01 +002300 00910038 DCB 0x00,0x91,0x00,0x38 +002304 60000000 DCB 0x60,0x00,0x00,0x00 +002308 a6000000 DCB 0xa6,0x00,0x00,0x00 +00230c 00003900 DCB 0x00,0x00,0x39,0x00 +002310 026f1039 DCB 0x02,0x6f,0x10,0x39 +002314 0011b900 DCB 0x00,0x11,0xb9,0x00 +002318 00000001 DCB 0x00,0x00,0x00,0x01 +00231c 0005000c DCB 0x00,0x05,0x00,0x0c +002320 001f0044 DCB 0x00,0x1f,0x00,0x44 +002324 00860039 DCB 0x00,0x86,0x00,0x39 +002328 00026f20 DCB 0x00,0x02,0x6f,0x20 +00232c 390011b9 DCB 0x39,0x00,0x11,0xb9 +002330 f501b302 DCB 0xf5,0x01,0xb3,0x02 +002334 d7041c05 DCB 0xd7,0x04,0x1c,0x05 +002338 6106a607 DCB 0x61,0x06,0xa6,0x07 +00233c eb000000 DCB 0xeb,0x00,0x00,0x00 +002340 3900026f DCB 0x39,0x00,0x02,0x6f +002344 30390011 DCB 0x30,0x39,0x00,0x11 +002348 b9000000 DCB 0xb9,0x00,0x00,0x00 +00234c 00010002 DCB 0x00,0x01,0x00,0x02 +002350 0005000c DCB 0x00,0x05,0x00,0x0c +002354 0018002c DCB 0x00,0x18,0x00,0x2c +002358 00390002 DCB 0x00,0x39,0x00,0x02 +00235c 6f403900 DCB 0x6f,0x40,0x39,0x00 +002360 11b94f00 DCB 0x11,0xb9,0x4f,0x00 +002364 ad012701 DCB 0xad,0x01,0x27,0x01 +002368 a1021b02 DCB 0xa1,0x02,0x1b,0x02 +00236c 95030f03 DCB 0x95,0x03,0x0f,0x03 +002370 89003900 DCB 0x89,0x00,0x39,0x00 +002374 026f5039 DCB 0x02,0x6f,0x50,0x39 +002378 0011b900 DCB 0x00,0x11,0xb9,0x00 +00237c 00000000 DCB 0x00,0x00,0x00,0x00 +002380 00000000 DCB 0x00,0x00,0x00,0x00 +002384 0002000d DCB 0x00,0x02,0x00,0x0d +002388 001d0039 DCB 0x00,0x1d,0x00,0x39 +00238c 00026f60 DCB 0x00,0x02,0x6f,0x60 +002390 390011b9 DCB 0x39,0x00,0x11,0xb9 +002394 48009d01 DCB 0x48,0x00,0x9d,0x01 +002398 34023203 DCB 0x34,0x02,0x32,0x03 +00239c e405f608 DCB 0xe4,0x05,0xf6,0x08 +0023a0 f10bec0e DCB 0xf1,0x0b,0xec,0x0e +0023a4 3900026f DCB 0x39,0x00,0x02,0x6f +0023a8 70390011 DCB 0x70,0x39,0x00,0x11 +0023ac b9e703d0 DCB 0xb9,0xe7,0x03,0xd0 +0023b0 b0e00a80 DCB 0xb0,0xe0,0x0a,0x80 +0023b4 80827d7b DCB 0x80,0x82,0x7d,0x7b +0023b8 79777270 DCB 0x79,0x77,0x72,0x70 +0023bc 80390002 DCB 0x80,0x39,0x00,0x02 +0023c0 6f803900 DCB 0x6f,0x80,0x39,0x00 +0023c4 11b98080 DCB 0x11,0xb9,0x80,0x80 +0023c8 7d7e7b7b DCB 0x7d,0x7e,0x7b,0x7b +0023cc 77738080 DCB 0x77,0x73,0x80,0x80 +0023d0 8281807f DCB 0x82,0x81,0x80,0x7f +0023d4 7e7b3900 DCB 0x7e,0x7b,0x39,0x00 +0023d8 026f9039 DCB 0x02,0x6f,0x90,0x39 +0023dc 0011b978 DCB 0x00,0x11,0xb9,0x78 +0023e0 80808182 DCB 0x80,0x80,0x81,0x82 +0023e4 8282817f DCB 0x82,0x82,0x81,0x7f +0023e8 7c808080 DCB 0x7c,0x80,0x80,0x80 +0023ec 83868639 DCB 0x83,0x86,0x86,0x39 +0023f0 00026fa0 DCB 0x00,0x02,0x6f,0xa0 +0023f4 390011b9 DCB 0x39,0x00,0x11,0xb9 +0023f8 85817d80 DCB 0x85,0x81,0x7d,0x80 +0023fc 80828184 DCB 0x80,0x82,0x81,0x84 +002400 85878588 DCB 0x85,0x87,0x85,0x88 +002404 8080818b DCB 0x80,0x80,0x81,0x8b +002408 3900026f DCB 0x39,0x00,0x02,0x6f +00240c b0390011 DCB 0xb0,0x39,0x00,0x11 +002410 b9888a8c DCB 0xb9,0x88,0x8a,0x8c +002414 8d8e8080 DCB 0x8d,0x8e,0x80,0x80 +002418 84878a8c DCB 0x84,0x87,0x8a,0x8c +00241c 8f909180 DCB 0x8f,0x90,0x91,0x80 +002420 80390002 DCB 0x80,0x39,0x00,0x02 +002424 6fc03900 DCB 0x6f,0xc0,0x39,0x00 +002428 11b98487 DCB 0x11,0xb9,0x84,0x87 +00242c 8a8d9191 DCB 0x8a,0x8d,0x91,0x91 +002430 92808085 DCB 0x92,0x80,0x80,0x85 +002434 888d8f8f DCB 0x88,0x8d,0x8f,0x8f +002438 95963900 DCB 0x95,0x96,0x39,0x00 +00243c 026fd039 DCB 0x02,0x6f,0xd0,0x39 +002440 0011b980 DCB 0x00,0x11,0xb9,0x80 +002444 807a736e DCB 0x80,0x7a,0x73,0x6e +002448 6966605d DCB 0x69,0x66,0x60,0x5d +00244c 80808080 DCB 0x80,0x80,0x80,0x80 +002450 76747039 DCB 0x76,0x74,0x70,0x39 +002454 00026fe0 DCB 0x00,0x02,0x6f,0xe0 +002458 390011b9 DCB 0x39,0x00,0x11,0xb9 +00245c 6c6a8080 DCB 0x6c,0x6a,0x80,0x80 +002460 817f7f7c DCB 0x81,0x7f,0x7f,0x7c +002464 7b767380 DCB 0x7b,0x76,0x73,0x80 +002468 80838383 DCB 0x80,0x83,0x83,0x83 +00246c 3900026f DCB 0x39,0x00,0x02,0x6f +002470 f039000e DCB 0xf0,0x39,0x00,0x0e +002474 b982827f DCB 0xb9,0x82,0x82,0x7f +002478 7c808082 DCB 0x7c,0x80,0x80,0x82 +00247c 84858487 DCB 0x84,0x85,0x84,0x87 +002480 83803900 DCB 0x83,0x80,0x39,0x00 +002484 11ba0200 DCB 0x11,0xba,0x02,0x00 +002488 02000200 DCB 0x02,0x00,0x02,0x00 +00248c 02000200 DCB 0x02,0x00,0x02,0x00 +002490 02000200 DCB 0x02,0x00,0x02,0x00 +002494 02003900 DCB 0x02,0x00,0x39,0x00 +002498 026f1039 DCB 0x02,0x6f,0x10,0x39 +00249c 0011ba02 DCB 0x00,0x11,0xba,0x02 +0024a0 00020002 DCB 0x00,0x02,0x00,0x02 +0024a4 00020002 DCB 0x00,0x02,0x00,0x02 +0024a8 00020002 DCB 0x00,0x02,0x00,0x02 +0024ac 00020039 DCB 0x00,0x02,0x00,0x39 +0024b0 00026f20 DCB 0x00,0x02,0x6f,0x20 +0024b4 390011ba DCB 0x39,0x00,0x11,0xba +0024b8 02000200 DCB 0x02,0x00,0x02,0x00 +0024bc 02000200 DCB 0x02,0x00,0x02,0x00 +0024c0 02000200 DCB 0x02,0x00,0x02,0x00 +0024c4 02000200 DCB 0x02,0x00,0x02,0x00 +0024c8 3900026f DCB 0x39,0x00,0x02,0x6f +0024cc 30390011 DCB 0x30,0x39,0x00,0x11 +0024d0 ba020002 DCB 0xba,0x02,0x00,0x02 +0024d4 00020002 DCB 0x00,0x02,0x00,0x02 +0024d8 00020002 DCB 0x00,0x02,0x00,0x02 +0024dc 00020002 DCB 0x00,0x02,0x00,0x02 +0024e0 00390002 DCB 0x00,0x39,0x00,0x02 +0024e4 6f403900 DCB 0x6f,0x40,0x39,0x00 +0024e8 11ba0200 DCB 0x11,0xba,0x02,0x00 +0024ec 02000200 DCB 0x02,0x00,0x02,0x00 +0024f0 02000200 DCB 0x02,0x00,0x02,0x00 +0024f4 02000200 DCB 0x02,0x00,0x02,0x00 +0024f8 02003900 DCB 0x02,0x00,0x39,0x00 +0024fc 026f5039 DCB 0x02,0x6f,0x50,0x39 +002500 0011ba02 DCB 0x00,0x11,0xba,0x02 +002504 00020002 DCB 0x00,0x02,0x00,0x02 +002508 00020002 DCB 0x00,0x02,0x00,0x02 +00250c 00020002 DCB 0x00,0x02,0x00,0x02 +002510 00020039 DCB 0x00,0x02,0x00,0x39 +002514 00026f60 DCB 0x00,0x02,0x6f,0x60 +002518 390011ba DCB 0x39,0x00,0x11,0xba +00251c 02000200 DCB 0x02,0x00,0x02,0x00 +002520 02000200 DCB 0x02,0x00,0x02,0x00 +002524 05d10800 DCB 0x05,0xd1,0x08,0x00 +002528 08000800 DCB 0x08,0x00,0x08,0x00 +00252c 3900026f DCB 0x39,0x00,0x02,0x6f +002530 70390011 DCB 0x70,0x39,0x00,0x11 +002534 ba080008 DCB 0xba,0x08,0x00,0x08 +002538 00080008 DCB 0x00,0x08,0x00,0x08 +00253c 00080008 DCB 0x00,0x08,0x00,0x08 +002540 00080008 DCB 0x00,0x08,0x00,0x08 +002544 00390002 DCB 0x00,0x39,0x00,0x02 +002548 6f803900 DCB 0x6f,0x80,0x39,0x00 +00254c 11ba0800 DCB 0x11,0xba,0x08,0x00 +002550 053e0736 DCB 0x05,0x3e,0x07,0x36 +002554 07360736 DCB 0x07,0x36,0x07,0x36 +002558 07360736 DCB 0x07,0x36,0x07,0x36 +00255c 07363900 DCB 0x07,0x36,0x39,0x00 +002560 026f9039 DCB 0x02,0x6f,0x90,0x39 +002564 0011ba07 DCB 0x00,0x11,0xba,0x07 +002568 36073608 DCB 0x36,0x07,0x36,0x08 +00256c 00080008 DCB 0x00,0x08,0x00,0x08 +002570 00080005 DCB 0x00,0x08,0x00,0x05 +002574 3e073639 DCB 0x3e,0x07,0x36,0x39 +002578 00026fa0 DCB 0x00,0x02,0x6f,0xa0 +00257c 390011ba DCB 0x39,0x00,0x11,0xba +002580 07360736 DCB 0x07,0x36,0x07,0x36 +002584 07360736 DCB 0x07,0x36,0x07,0x36 +002588 07360736 DCB 0x07,0x36,0x07,0x36 +00258c 07360800 DCB 0x07,0x36,0x08,0x00 +002590 3900026f DCB 0x39,0x00,0x02,0x6f +002594 b0390011 DCB 0xb0,0x39,0x00,0x11 +002598 ba080008 DCB 0xba,0x08,0x00,0x08 +00259c 00080005 DCB 0x00,0x08,0x00,0x05 +0025a0 d1080008 DCB 0xd1,0x08,0x00,0x08 +0025a4 00080008 DCB 0x00,0x08,0x00,0x08 +0025a8 00390002 DCB 0x00,0x39,0x00,0x02 +0025ac 6fc03900 DCB 0x6f,0xc0,0x39,0x00 +0025b0 11ba0800 DCB 0x11,0xba,0x08,0x00 +0025b4 08000800 DCB 0x08,0x00,0x08,0x00 +0025b8 08000800 DCB 0x08,0x00,0x08,0x00 +0025bc 08000800 DCB 0x08,0x00,0x08,0x00 +0025c0 08003900 DCB 0x08,0x00,0x39,0x00 +0025c4 026fd039 DCB 0x02,0x6f,0xd0,0x39 +0025c8 0011ba08 DCB 0x00,0x11,0xba,0x08 +0025cc 00080008 DCB 0x00,0x08,0x00,0x08 +0025d0 00080008 DCB 0x00,0x08,0x00,0x08 +0025d4 00080008 DCB 0x00,0x08,0x00,0x08 +0025d8 00080039 DCB 0x00,0x08,0x00,0x39 +0025dc 00026fe0 DCB 0x00,0x02,0x6f,0xe0 +0025e0 39000bba DCB 0x39,0x00,0x0b,0xba +0025e4 08000800 DCB 0x08,0x00,0x08,0x00 +0025e8 08000800 DCB 0x08,0x00,0x08,0x00 +0025ec 08003900 DCB 0x08,0x00,0x39,0x00 +0025f0 11bb012c DCB 0x11,0xbb,0x01,0x2c +0025f4 012c012c DCB 0x01,0x2c,0x01,0x2c +0025f8 012c012c DCB 0x01,0x2c,0x01,0x2c +0025fc 012c012c DCB 0x01,0x2c,0x01,0x2c +002600 012c3900 DCB 0x01,0x2c,0x39,0x00 +002604 026f1039 DCB 0x02,0x6f,0x10,0x39 +002608 0011bb01 DCB 0x00,0x11,0xbb,0x01 +00260c 2c010001 DCB 0x2c,0x01,0x00,0x01 +002610 00010001 DCB 0x00,0x01,0x00,0x01 +002614 00012c01 DCB 0x00,0x01,0x2c,0x01 +002618 2c012c39 DCB 0x2c,0x01,0x2c,0x39 +00261c 00026f20 DCB 0x00,0x02,0x6f,0x20 +002620 390011bb DCB 0x39,0x00,0x11,0xbb +002624 012c012c DCB 0x01,0x2c,0x01,0x2c +002628 012c012c DCB 0x01,0x2c,0x01,0x2c +00262c 012c012c DCB 0x01,0x2c,0x01,0x2c +002630 01000100 DCB 0x01,0x00,0x01,0x00 +002634 3900026f DCB 0x39,0x00,0x02,0x6f +002638 30390011 DCB 0x30,0x39,0x00,0x11 +00263c bb010001 DCB 0xbb,0x01,0x00,0x01 +002640 00012c01 DCB 0x00,0x01,0x2c,0x01 +002644 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +002648 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +00264c 2c390002 DCB 0x2c,0x39,0x00,0x02 +002650 6f403900 DCB 0x6f,0x40,0x39,0x00 +002654 11bb012c DCB 0x11,0xbb,0x01,0x2c +002658 012c012c DCB 0x01,0x2c,0x01,0x2c +00265c 01000100 DCB 0x01,0x00,0x01,0x00 +002660 01000100 DCB 0x01,0x00,0x01,0x00 +002664 012c3900 DCB 0x01,0x2c,0x39,0x00 +002668 026f5039 DCB 0x02,0x6f,0x50,0x39 +00266c 0011bb01 DCB 0x00,0x11,0xbb,0x01 +002670 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +002674 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +002678 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +00267c 2c012c39 DCB 0x2c,0x01,0x2c,0x39 +002680 00026f60 DCB 0x00,0x02,0x6f,0x60 +002684 390011bb DCB 0x39,0x00,0x11,0xbb +002688 01000100 DCB 0x01,0x00,0x01,0x00 +00268c 01000100 DCB 0x01,0x00,0x01,0x00 +002690 01000100 DCB 0x01,0x00,0x01,0x00 +002694 01000100 DCB 0x01,0x00,0x01,0x00 +002698 3900026f DCB 0x39,0x00,0x02,0x6f +00269c 70390011 DCB 0x70,0x39,0x00,0x11 +0026a0 bb010001 DCB 0xbb,0x01,0x00,0x01 +0026a4 00010001 DCB 0x00,0x01,0x00,0x01 +0026a8 00010001 DCB 0x00,0x01,0x00,0x01 +0026ac 00010001 DCB 0x00,0x01,0x00,0x01 +0026b0 00390002 DCB 0x00,0x39,0x00,0x02 +0026b4 6f803900 DCB 0x6f,0x80,0x39,0x00 +0026b8 11bb0100 DCB 0x11,0xbb,0x01,0x00 +0026bc 08000000 DCB 0x08,0x00,0x00,0x00 +0026c0 00000000 DCB 0x00,0x00,0x00,0x00 +0026c4 00000000 DCB 0x00,0x00,0x00,0x00 +0026c8 00003900 DCB 0x00,0x00,0x39,0x00 +0026cc 026f9039 DCB 0x02,0x6f,0x90,0x39 +0026d0 0011bb00 DCB 0x00,0x11,0xbb,0x00 +0026d4 00000000 DCB 0x00,0x00,0x00,0x00 +0026d8 00000000 DCB 0x00,0x00,0x00,0x00 +0026dc 00000000 DCB 0x00,0x00,0x00,0x00 +0026e0 10101039 DCB 0x10,0x10,0x10,0x39 +0026e4 00026fa0 DCB 0x00,0x02,0x6f,0xa0 +0026e8 390005bb DCB 0x39,0x00,0x05,0xbb +0026ec 80808000 DCB 0x80,0x80,0x80,0x00 +0026f0 390002ee DCB 0x39,0x00,0x02,0xee +0026f4 05390005 DCB 0x05,0x39,0x00,0x05 +0026f8 ffaa55a5 DCB 0xff,0xaa,0x55,0xa5 +0026fc 80390002 DCB 0x80,0x39,0x00,0x02 +002700 6f1d3900 DCB 0x6f,0x1d,0x39,0x00 +002704 02f20539 DCB 0x02,0xf2,0x05,0x39 +002708 00053b00 DCB 0x00,0x05,0x3b,0x00 +00270c 14001239 DCB 0x14,0x00,0x12,0x39 +002710 00020301 DCB 0x00,0x02,0x03,0x01 +002714 39000290 DCB 0x39,0x00,0x02,0x90 +002718 02390013 DCB 0x02,0x39,0x00,0x13 +00271c 91892800 DCB 0x91,0x89,0x28,0x00 +002720 0cc20003 DCB 0x0c,0xc2,0x00,0x03 +002724 1c017e00 DCB 0x1c,0x01,0x7e,0x00 +002728 0f08bb04 DCB 0x0f,0x08,0xbb,0x04 +00272c 3d10f039 DCB 0x3d,0x10,0xf0,0x39 +002730 00012c39 DCB 0x00,0x01,0x2c,0x39 +002734 00055107 DCB 0x00,0x05,0x51,0x07 +002738 ff0fff39 DCB 0xff,0x0f,0xff,0x39 +00273c 00025320 DCB 0x00,0x02,0x53,0x20 +002740 39000135 DCB 0x39,0x00,0x01,0x35 +002744 3900052a DCB 0x39,0x00,0x05,0x2a +002748 00000437 DCB 0x00,0x00,0x04,0x37 +00274c 3900052b DCB 0x39,0x00,0x05,0x2b +002750 0000095f DCB 0x00,0x00,0x09,0x5f +002754 3900022f DCB 0x39,0x00,0x02,0x2f +002758 01390006 DCB 0x01,0x39,0x00,0x06 +00275c f055aa52 DCB 0xf0,0x55,0xaa,0x52 +002760 08003900 DCB 0x08,0x00,0x39,0x00 +002764 02c077 DCB 0x02,0xc0,0x77 + + AREA ||.data||, DATA, ALIGN=2 + + g_calibration_flag +000000 00 DCB 0x00 + start_display_on +000001 01 DCB 0x01 + g_need_enter_sleep_mode +000002 00 DCB 0x00 + g_exit_sleep_mode +000003 00 DCB 0x00 + g_power_on_flag +000004 00 DCB 0x00 + g_en_adj_bl +000005 00 DCB 0x00 + panel_display_done +000006 00 DCB 0x00 + g_panel_display_cnt +000007 05 DCB 0x05 + phone_start_flag +000008 00 DCB 0x00 + phone_DisplayOFF_flag +000009 00 DCB 0x00 + flag_b1 +00000a 00 DCB 0x00 + flag_ca +00000b 00 DCB 0x00 + flag_te +00000c 00 DCB 0x00 + panel_mode +00000d 01 DCB 0x01 + cmd_0a_flag +00000e 0000 DCB 0x00,0x00 + phone_DisplayOFF_count +000010 0000 DCW 0x0000 + value_reg_ca +000012 0000 DCW 0x0000 + panel_r +000014 0000 DCB 0x00,0x00 + panel_g +000016 0000 DCB 0x00,0x00 + panel_b +000018 00000000 DCB 0x00,0x00,0x00,0x00 + g_rx_ctrl_handle + DCD 0x00000000 + g_tx_ctrl_handle + DCD 0x00000000 + value_reg_df + DCD 0x00000000 + + AREA ||area_number.25||, DATA, ALIGN=1 + + EXPORTAS ||area_number.25||, ||.data|| + value_reg_b1 +000000 0000 DCW 0x0000 + + AREA ||area_number.26||, DATA, ALIGN=1 + + EXPORTAS ||area_number.26||, ||.data|| + value_reg_ca_bak +000000 0000 DCW 0x0000 + + AREA ||area_number.27||, DATA, ALIGN=1 + + EXPORTAS ||area_number.27||, ||.data|| + value_reg_b1_bak +000000 0000 DCW 0x0000 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\demo\\ap_demo.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___9_ap_demo_c_c64640cd____REV16| +#line 467 "C:\\Users\\ASUS\\AppData\\Local\\Arm\\Packs\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___9_ap_demo_c_c64640cd____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___9_ap_demo_c_c64640cd____REVSH| +#line 482 +|__asm___9_ap_demo_c_c64640cd____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/ISP_368/Listings/app_tp_for_custom_s8.txt b/project/ISP_368/Listings/app_tp_for_custom_s8.txt new file mode 100644 index 0000000..e69de29 diff --git a/project/ISP_368/Listings/app_tp_transfer.txt b/project/ISP_368/Listings/app_tp_transfer.txt new file mode 100644 index 0000000..745b460 --- /dev/null +++ b/project/ISP_368/Listings/app_tp_transfer.txt @@ -0,0 +1,1325 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\app_tp_transfer.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\app_tp_transfer.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL368 -I.\RTE\_ISP_368 -IC:\Users\ASUS\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Users\ASUS\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_368 --omf_browse=.\objects\app_tp_transfer.crf ..\..\src\app\demo\app_tp_transfer.c] + THUMB + + AREA ||i.S20_Start_init||, CODE, READONLY, ALIGN=2 + + S20_Start_init PROC +;;;402 +;;;403 void S20_Start_init(void) +000000 b570 PUSH {r4-r6,lr} +;;;404 { +;;;405 uint8_t len=0; +;;;406 // if(phone_start_flag==1) +;;;407 { +;;;408 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); +000002 4d46 LDR r5,|L1.284| +000004 2308 MOVS r3,#8 +000006 4a46 LDR r2,|L1.288| +000008 2101 MOVS r1,#1 +00000a 6828 LDR r0,[r5,#0] ; screen_reg_int_data +00000c f7fffffe BL app_tp_m_read + |L1.16| +;;;409 while(!hal_i2c_m_transfer_complate()); +000010 f7fffffe BL hal_i2c_m_transfer_complate +000014 2800 CMP r0,#0 +000016 d0fb BEQ |L1.16| +;;;410 delayMs(2); +000018 2002 MOVS r0,#2 +00001a f7fffffe BL delayMs +;;;411 while(!hal_gpio_get_input_data(g_screen_input_int_pad)) +00001e 4c41 LDR r4,|L1.292| +000020 e00c B |L1.60| + |L1.34| +;;;412 { +;;;413 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); +000022 2308 MOVS r3,#8 +000024 4a3e LDR r2,|L1.288| +000026 2101 MOVS r1,#1 +000028 6828 LDR r0,[r5,#0] ; screen_reg_int_data +00002a f7fffffe BL app_tp_m_read + |L1.46| +;;;414 while(!hal_i2c_m_transfer_complate()); +00002e f7fffffe BL hal_i2c_m_transfer_complate +000032 2800 CMP r0,#0 +000034 d0fb BEQ |L1.46| +;;;415 delayMs(2); +000036 2002 MOVS r0,#2 +000038 f7fffffe BL delayMs + |L1.60| +00003c 7820 LDRB r0,[r4,#0] ;411 ; g_screen_input_int_pad +00003e f7fffffe BL hal_gpio_get_input_data +000042 2800 CMP r0,#0 ;411 +000044 d0ed BEQ |L1.34| +;;;416 } +;;;417 app_tp_m_write(MI10_PRO_screen_init_data1, sizeof(MI10_PRO_screen_init_data1));//0xA0,0x00,0x01 +000046 2103 MOVS r1,#3 +000048 4837 LDR r0,|L1.296| +00004a f7fffffe BL app_tp_m_write + |L1.78| +;;;418 while(!hal_i2c_m_transfer_complate()); +00004e f7fffffe BL hal_i2c_m_transfer_complate +000052 2800 CMP r0,#0 +000054 d0fb BEQ |L1.78| +;;;419 delayMs(1); +000056 2001 MOVS r0,#1 +000058 f7fffffe BL delayMs +;;;420 app_tp_m_write(MI10_PRO_screen_init_data2, sizeof(MI10_PRO_screen_init_data2));//0xA2,0x03,0x00,0x00,0x00,0x03 +00005c 4832 LDR r0,|L1.296| +00005e 2106 MOVS r1,#6 +000060 3020 ADDS r0,r0,#0x20 +000062 f7fffffe BL app_tp_m_write + |L1.102| +;;;421 while(!hal_i2c_m_transfer_complate()); +000066 f7fffffe BL hal_i2c_m_transfer_complate +00006a 2800 CMP r0,#0 +00006c d0fb BEQ |L1.102| +;;;422 delayMs(1); +00006e 2001 MOVS r0,#1 +000070 f7fffffe BL delayMs +;;;423 app_tp_m_write(MI10_PRO_screen_init_data3, sizeof(MI10_PRO_screen_init_data3));//0xA2,0x02,0x00 +000074 482c LDR r0,|L1.296| +000076 2103 MOVS r1,#3 +000078 1cc0 ADDS r0,r0,#3 +00007a f7fffffe BL app_tp_m_write + |L1.126| +;;;424 while(!hal_i2c_m_transfer_complate()); +00007e f7fffffe BL hal_i2c_m_transfer_complate +000082 2800 CMP r0,#0 +000084 d0fb BEQ |L1.126| +;;;425 delayMs(1); +000086 2001 MOVS r0,#1 +000088 f7fffffe BL delayMs +;;;426 app_tp_m_write(MI10_PRO_screen_init_data4, sizeof(MI10_PRO_screen_init_data4));//0xC0,0x07,0x01 +00008c 4826 LDR r0,|L1.296| +00008e 2103 MOVS r1,#3 +000090 1d80 ADDS r0,r0,#6 +000092 f7fffffe BL app_tp_m_write + |L1.150| +;;;427 while(!hal_i2c_m_transfer_complate()); +000096 f7fffffe BL hal_i2c_m_transfer_complate +00009a 2800 CMP r0,#0 +00009c d0fb BEQ |L1.150| +;;;428 delayMs(1); +00009e 2001 MOVS r0,#1 +0000a0 f7fffffe BL delayMs +;;;429 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); +0000a4 2308 MOVS r3,#8 +0000a6 4a1e LDR r2,|L1.288| +0000a8 2101 MOVS r1,#1 +0000aa 6828 LDR r0,[r5,#0] ; screen_reg_int_data +0000ac f7fffffe BL app_tp_m_read + |L1.176| +;;;430 while(!hal_i2c_m_transfer_complate()); +0000b0 f7fffffe BL hal_i2c_m_transfer_complate +0000b4 2800 CMP r0,#0 +0000b6 d0fb BEQ |L1.176| +;;;431 if(s_screen_read_buffer[7]>0) +0000b8 4819 LDR r0,|L1.288| +0000ba 79c0 LDRB r0,[r0,#7] ; s_screen_read_buffer +0000bc 2800 CMP r0,#0 +0000be d00a BEQ |L1.214| +;;;432 { +;;;433 len=s_screen_read_buffer[7]*8; +0000c0 06c0 LSLS r0,r0,#27 +0000c2 0e03 LSRS r3,r0,#24 +;;;434 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, len); +0000c4 4a16 LDR r2,|L1.288| +0000c6 2101 MOVS r1,#1 +0000c8 6828 LDR r0,[r5,#0] ; screen_reg_int_data +0000ca f7fffffe BL app_tp_m_read + |L1.206| +;;;435 while(!hal_i2c_m_transfer_complate()); +0000ce f7fffffe BL hal_i2c_m_transfer_complate +0000d2 2800 CMP r0,#0 +0000d4 d0fb BEQ |L1.206| + |L1.214| +;;;436 } +;;;437 #endif +;;;438 if(hal_gpio_get_input_data(g_screen_input_int_pad)) +0000d6 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +0000d8 f7fffffe BL hal_gpio_get_input_data +0000dc 2800 CMP r0,#0 +0000de d01b BEQ |L1.280| +;;;439 { +;;;440 s_screen_init_complate = true; +0000e0 4911 LDR r1,|L1.296| +0000e2 2001 MOVS r0,#1 +0000e4 3908 SUBS r1,r1,#8 +0000e6 7108 STRB r0,[r1,#4] +0000e8 4601 MOV r1,r0 +0000ea 2200 MOVS r2,#0 +0000ec 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +0000ee f7fffffe BL hal_gpio_set_pull_state +0000f2 2100 MOVS r1,#0 +0000f4 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +0000f6 f7fffffe BL hal_gpio_ctrl_eint +0000fa 2103 MOVS r1,#3 +0000fc 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +0000fe f7fffffe BL hal_gpio_init_eint +000102 490a LDR r1,|L1.300| +000104 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +000106 f7fffffe BL hal_gpio_reg_eint_cb +00010a 2101 MOVS r1,#1 +00010c 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +00010e f7fffffe BL hal_gpio_ctrl_eint +;;;441 app_tp_screen_int_init(); +;;;442 phone_start_flag=0; +000112 4907 LDR r1,|L1.304| +000114 2000 MOVS r0,#0 +000116 7008 STRB r0,[r1,#0] + |L1.280| +;;;443 } +;;;444 } +;;;445 } +000118 bd70 POP {r4-r6,pc} +;;;446 + ENDP + +00011a 0000 DCW 0x0000 + |L1.284| + DCD screen_reg_int_data + |L1.288| + DCD ||.bss|| + |L1.292| + DCD g_screen_input_int_pad + |L1.296| + DCD ||.data||+0x8 + |L1.300| + DCD app_tp_screen_int_callback + |L1.304| + DCD phone_start_flag + + AREA ||i.ap_tp_calibration||, CODE, READONLY, ALIGN=2 + + ap_tp_calibration PROC +;;;454 +;;;455 void ap_tp_calibration(void) +000000 b510 PUSH {r4,lr} +;;;456 { +;;;457 // app_tp_m_write(MI10_PRO_TP_Tuning_data1, sizeof(MI10_PRO_TP_Tuning_data1)); // System Reset +;;;458 // while(!hal_i2c_m_transfer_complate()); +;;;459 // delayMs(10); +;;;460 app_tp_m_write(MI10_PRO_TP_Tuning_data2, sizeof(MI10_PRO_TP_Tuning_data2)); // FPnl Init +000002 2103 MOVS r1,#3 +000004 4829 LDR r0,|L2.172| +000006 f7fffffe BL app_tp_m_write + |L2.10| +;;;461 while(!hal_i2c_m_transfer_complate()); +00000a f7fffffe BL hal_i2c_m_transfer_complate +00000e 2800 CMP r0,#0 +000010 d0fb BEQ |L2.10| +;;;462 delayMs(1); +000012 2001 MOVS r0,#1 +000014 f7fffffe BL delayMs +;;;463 app_tp_m_write(MI10_PRO_TP_Tuning_data3, sizeof(MI10_PRO_TP_Tuning_data3)); // Pnl Init +000018 4824 LDR r0,|L2.172| +00001a 2103 MOVS r1,#3 +00001c 1cc0 ADDS r0,r0,#3 +00001e f7fffffe BL app_tp_m_write + |L2.34| +;;;464 while(!hal_i2c_m_transfer_complate()); +000022 f7fffffe BL hal_i2c_m_transfer_complate +000026 2800 CMP r0,#0 +000028 d0fb BEQ |L2.34| +;;;465 delayMs(1); +00002a 2001 MOVS r0,#1 +00002c f7fffffe BL delayMs +;;;466 app_tp_m_write(MI10_PRO_TP_Tuning_data4, sizeof(MI10_PRO_TP_Tuning_data4)); // TuneM +000030 481e LDR r0,|L2.172| +000032 2104 MOVS r1,#4 +000034 300f ADDS r0,r0,#0xf +000036 f7fffffe BL app_tp_m_write + |L2.58| +;;;467 while(!hal_i2c_m_transfer_complate()); +00003a f7fffffe BL hal_i2c_m_transfer_complate +00003e 2800 CMP r0,#0 +000040 d0fb BEQ |L2.58| +;;;468 delayMs(1); +000042 2001 MOVS r0,#1 +000044 f7fffffe BL delayMs +;;;469 app_tp_m_write(MI10_PRO_TP_Tuning_data5, sizeof(MI10_PRO_TP_Tuning_data5)); // TuneS +000048 4818 LDR r0,|L2.172| +00004a 2104 MOVS r1,#4 +00004c 3013 ADDS r0,r0,#0x13 +00004e f7fffffe BL app_tp_m_write + |L2.82| +;;;470 while(!hal_i2c_m_transfer_complate()); +000052 f7fffffe BL hal_i2c_m_transfer_complate +000056 2800 CMP r0,#0 +000058 d0fb BEQ |L2.82| +;;;471 delayMs(1); +00005a 2001 MOVS r0,#1 +00005c f7fffffe BL delayMs +;;;472 app_tp_m_write(MI10_PRO_TP_Tuning_data6, sizeof(MI10_PRO_TP_Tuning_data6)); // SvCfg +000060 4812 LDR r0,|L2.172| +000062 2103 MOVS r1,#3 +000064 1d80 ADDS r0,r0,#6 +000066 f7fffffe BL app_tp_m_write + |L2.106| +;;;473 while(!hal_i2c_m_transfer_complate()); +00006a f7fffffe BL hal_i2c_m_transfer_complate +00006e 2800 CMP r0,#0 +000070 d0fb BEQ |L2.106| +;;;474 delayMs(1); +000072 2001 MOVS r0,#1 +000074 f7fffffe BL delayMs +;;;475 app_tp_m_write(MI10_PRO_TP_Tuning_data7, sizeof(MI10_PRO_TP_Tuning_data7)); // SvCx +000078 480c LDR r0,|L2.172| +00007a 2103 MOVS r1,#3 +00007c 3009 ADDS r0,r0,#9 +00007e f7fffffe BL app_tp_m_write + |L2.130| +;;;476 while(!hal_i2c_m_transfer_complate()); +000082 f7fffffe BL hal_i2c_m_transfer_complate +000086 2800 CMP r0,#0 +000088 d0fb BEQ |L2.130| +;;;477 delayMs(1); +00008a 2001 MOVS r0,#1 +00008c f7fffffe BL delayMs +;;;478 app_tp_m_write(MI10_PRO_TP_Tuning_data8, sizeof(MI10_PRO_TP_Tuning_data8)); // SvPnl +000090 4806 LDR r0,|L2.172| +000092 2103 MOVS r1,#3 +000094 300c ADDS r0,r0,#0xc +000096 f7fffffe BL app_tp_m_write + |L2.154| +;;;479 while(!hal_i2c_m_transfer_complate()); +00009a f7fffffe BL hal_i2c_m_transfer_complate +00009e 2800 CMP r0,#0 +0000a0 d0fb BEQ |L2.154| +;;;480 delayMs(1); +0000a2 2001 MOVS r0,#1 +0000a4 f7fffffe BL delayMs +;;;481 } +0000a8 bd10 POP {r4,pc} +;;;482 + ENDP + +0000aa 0000 DCW 0x0000 + |L2.172| + DCD ||.data||+0x11 + + AREA ||i.app_tp_I2C_init||, CODE, READONLY, ALIGN=2 + + app_tp_I2C_init PROC +;;;161 +;;;162 void app_tp_I2C_init(void) +000000 b510 PUSH {r4,lr} +;;;163 { +;;;164 hal_i2c_s_init(CHIP_I2C_ADDRESS, CHIP_I2C_ADDR_BITS); +000002 2107 MOVS r1,#7 +000004 2048 MOVS r0,#0x48 +000006 f7fffffe BL hal_i2c_s_init +;;;165 hal_i2c_s_set_transfer(app_tp_i2cs_callback); +00000a 4804 LDR r0,|L3.28| +00000c f7fffffe BL hal_i2c_s_set_transfer +;;;166 hal_i2c_s_nonblocking_read(s_phone_read_buffer, BUFFER_SIZE_MAX); //ý buffer +000010 21c8 MOVS r1,#0xc8 +000012 4803 LDR r0,|L3.32| +000014 f7fffffe BL hal_i2c_s_nonblocking_read +;;;167 } +000018 bd10 POP {r4,pc} +;;;168 + ENDP + +00001a 0000 DCW 0x0000 + |L3.28| + DCD app_tp_i2cs_callback + |L3.32| + DCD ||.bss||+0xc8 + + AREA ||i.app_tp_i2cs_callback||, CODE, READONLY, ALIGN=2 + + app_tp_i2cs_callback PROC +;;;354 //recieve_numΪյָ +;;;355 static void app_tp_i2cs_callback(e_i2c_s_int_status int_status, size_t recieve_num) +000000 b51c PUSH {r2-r4,lr} +000002 2000 MOVS r0,#0 +000004 9001 STR r0,[sp,#4] +000006 2900 CMP r1,#0 +;;;356 { +000008 d004 BEQ |L4.20| +00000a ab01 ADD r3,sp,#4 +00000c 466a MOV r2,sp +00000e 4807 LDR r0,|L4.44| +000010 f7fffffe BL app_tp_phone_analysis_data + |L4.20| +000014 21c8 MOVS r1,#0xc8 +000016 4805 LDR r0,|L4.44| +000018 f7fffffe BL app_tp_s_read +00001c 9901 LDR r1,[sp,#4] +00001e 2900 CMP r1,#0 +000020 d002 BEQ |L4.40| +000022 9800 LDR r0,[sp,#0] +000024 f7fffffe BL app_tp_s_write + |L4.40| +;;;357 #if 0 // 1: test +;;;358 if (int_status >2) +;;;359 { +;;;360 s_phone_read_buffer[2]=int_status; +;;;361 s_phone_read_buffer[3]=recieve_num; +;;;362 app_tp_m_write(s_phone_read_buffer, 4); +;;;363 } +;;;364 #endif +;;;365 app_tp_transfer_phone(recieve_num); +;;;366 } +000028 bd1c POP {r2-r4,pc} +;;;367 #endif + ENDP + +00002a 0000 DCW 0x0000 + |L4.44| + DCD ||.bss||+0xc8 + + AREA ||i.app_tp_init||, CODE, READONLY, ALIGN=2 + + app_tp_init PROC +;;;177 **************************************************************************/ +;;;178 void app_tp_init(void) +000000 b510 PUSH {r4,lr} +;;;179 { +;;;180 #ifdef DISABLE_TDDI_I2C_FUNCTION +;;;181 hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO +;;;182 hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET +;;;183 +;;;184 hal_gpio_set_mode(IO_PAD_TD_SPIM_CLK,IO_MODE_I2C1_SCL); +;;;185 hal_gpio_set_mode(IO_PAD_TD_SPIM_CSN,IO_MODE_I2C1_SDA); +;;;186 +;;;187 return; +;;;188 #else +;;;189 hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CLK, ENABLE, DISABLE); +000002 2200 MOVS r2,#0 +000004 2101 MOVS r1,#1 +000006 2018 MOVS r0,#0x18 +000008 f7fffffe BL hal_gpio_set_pull_state +;;;190 hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CSN, ENABLE, DISABLE); +00000c 2200 MOVS r2,#0 +00000e 2101 MOVS r1,#1 +000010 2019 MOVS r0,#0x19 +000012 f7fffffe BL hal_gpio_set_pull_state +;;;191 #endif +;;;192 +;;;193 app_tp_screen_init(); //ʼֻλIO +000016 f7fffffe BL app_tp_screen_init +;;;194 //app_tp_screen_int_init(); //screenж +;;;195 #ifdef G_PHONE_INT_DEFAULT_LOW +;;;196 hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_LOW); //phoneжIO +00001a 480a LDR r0,|L5.68| +00001c 2100 MOVS r1,#0 +00001e 7800 LDRB r0,[r0,#0] ; g_phone_output_int_pad +000020 f7fffffe BL hal_gpio_init_output +;;;197 #else +;;;198 hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO +;;;199 #endif +;;;200 hal_gpio_init_input(g_screen_input_int_pad); +000024 4808 LDR r0,|L5.72| +000026 7800 LDRB r0,[r0,#0] ; g_screen_input_int_pad +000028 f7fffffe BL hal_gpio_init_input +;;;201 hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET +00002c 4807 LDR r0,|L5.76| +00002e 2101 MOVS r1,#1 +000030 7800 LDRB r0,[r0,#0] ; g_screen_input_rst_pad +000032 f7fffffe BL hal_gpio_init_output +;;;202 +;;;203 #if SCREEN_MASTER_TRANSFER_I2C +;;;204 hal_i2c_m_dma_init(SCREEN_I2C_ADDRESS, SCREEN_I2C_ADDR_BITS, I2C_MASTER_SPEED); +000036 4a06 LDR r2,|L5.80| +000038 2107 MOVS r1,#7 +00003a 2049 MOVS r0,#0x49 +00003c f7fffffe BL hal_i2c_m_dma_init +;;;205 #elif SCREEN_MASTER_TRANSFER_SPI +;;;206 hal_spi_m_dma_init(SPI_MASTER_SPEED, SCREEN_SPI_CPHA, SCREEN_SPI_CPOL); +;;;207 #endif +;;;208 +;;;209 #if PHONE_SLAVE_TRANSFER_I2C +;;;210 // hal_i2c_s_init(CHIP_I2C_ADDRESS, CHIP_I2C_ADDR_BITS); +;;;211 // hal_i2c_s_set_transfer(app_tp_i2cs_callback); +;;;212 // hal_i2c_s_nonblocking_read(s_phone_read_buffer, BUFFER_SIZE_MAX); //ý buffer +;;;213 #elif PHONE_SLAVE_TRANSFER_SPI +;;;214 hal_spi_slave_init(PHONE_SPI_CPHA, PHONE_SPI_CPOL, true); // ʼspiԼdma +;;;215 hal_spi_slave_register_callback(app_tp_spis_callback); // עص +;;;216 hal_spi_slave_auto_transfer_abort(); // ֹͣ +;;;217 hal_spi_slave_flush_fifo(); // Flush FIFO +;;;218 +;;;219 /* ÿpacketԶ, circle mode Ϊfalse, յbuffer max sizeݺbufferٸ, packetɺûص */ +;;;220 hal_spi_slave_set_auto_rx_buffer(s_phone_read_buffer, BUFFER_SIZE_MAX, false); // auto rx buffer +;;;221 hal_spi_slave_set_auto_tx_buffer(phone_reg_const_data[0].write_back, phone_reg_const_data[0].write_back_size, false); // TX BUFFER +;;;222 +;;;223 hal_spi_slave_enable(); // spis +;;;224 hal_spi_slave_auto_transfer_start(); // rxԶ +;;;225 #endif +;;;226 } +000040 bd10 POP {r4,pc} +;;;227 + ENDP + +000042 0000 DCW 0x0000 + |L5.68| + DCD g_phone_output_int_pad + |L5.72| + DCD g_screen_input_int_pad + |L5.76| + DCD g_screen_input_rst_pad + |L5.80| + DCD 0x000c3500 + + AREA ||i.app_tp_m_read||, CODE, READONLY, ALIGN=1 + + app_tp_m_read PROC +;;;292 **************************************************************************/ +;;;293 static void app_tp_m_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size) +000000 b5f8 PUSH {r3-r7,lr} +;;;294 { +000002 4605 MOV r5,r0 +;;;295 #if SCREEN_MASTER_TRANSFER_I2C +;;;296 uint8_t i = 0; +000004 2400 MOVS r4,#0 +;;;297 uint32_t address = 0; +000006 4620 MOV r0,r4 +000008 e005 B |L6.22| + |L6.10| +;;;298 +;;;299 for (i = 0; i < cmd_size; i++) //ȽҪ͵ϵ address +;;;300 { +;;;301 address |= (uint32_t)cmd[i] << i * 8; +00000a 5d2e LDRB r6,[r5,r4] +00000c 00e7 LSLS r7,r4,#3 +00000e 40be LSLS r6,r6,r7 +000010 4330 ORRS r0,r0,r6 +000012 1c64 ADDS r4,r4,#1 +000014 b2e4 UXTB r4,r4 ;299 + |L6.22| +000016 428c CMP r4,r1 ;299 +000018 d3f7 BCC |L6.10| +;;;302 } +;;;303 hal_i2c_m_dma_read(address, cmd_size, data_buffer, data_size); +00001a f7fffffe BL hal_i2c_m_dma_read +;;;304 #elif SCREEN_MASTER_TRANSFER_SPI +;;;305 hal_spi_m_dma_read(cmd, cmd_size, data_buffer, data_size); +;;;306 #endif +;;;307 } +00001e bdf8 POP {r3-r7,pc} +;;;308 + ENDP + + + AREA ||i.app_tp_m_transfer_complate||, CODE, READONLY, ALIGN=1 + + app_tp_m_transfer_complate PROC +;;;235 **************************************************************************/ +;;;236 bool app_tp_m_transfer_complate(void) +000000 b510 PUSH {r4,lr} +;;;237 { +;;;238 #if SCREEN_MASTER_TRANSFER_I2C +;;;239 return hal_i2c_m_transfer_complate(); +000002 f7fffffe BL hal_i2c_m_transfer_complate +;;;240 #elif SCREEN_MASTER_TRANSFER_SPI +;;;241 return hal_spi_m_get_transfer_complate(); +;;;242 #else +;;;243 return true; +;;;244 #endif +;;;245 } +000006 bd10 POP {r4,pc} +;;;246 + ENDP + + + AREA ||i.app_tp_m_write||, CODE, READONLY, ALIGN=1 + + app_tp_m_write PROC +;;;272 **************************************************************************/ +;;;273 static void app_tp_m_write(const uint8_t *txbuffer, size_t buffer_size) +000000 b510 PUSH {r4,lr} +;;;274 { +;;;275 #if SCREEN_MASTER_TRANSFER_I2C +;;;276 hal_i2c_m_dma_write(txbuffer, buffer_size); +000002 f7fffffe BL hal_i2c_m_dma_write +;;;277 #elif SCREEN_MASTER_TRANSFER_SPI +;;;278 hal_spi_m_dma_write(txbuffer, buffer_size); +;;;279 s_spim_write = true; +;;;280 #endif +;;;281 } +000006 bd10 POP {r4,pc} +;;;282 + ENDP + + + AREA ||i.app_tp_phone_clear_reset_on||, CODE, READONLY, ALIGN=2 + + app_tp_phone_clear_reset_on PROC +;;;863 **************************************************************************/ +;;;864 void app_tp_phone_clear_reset_on(void) +000000 4901 LDR r1,|L9.8| +;;;865 { +;;;866 s_phone_reset_flag = false; +000002 2000 MOVS r0,#0 +000004 7088 STRB r0,[r1,#2] +;;;867 } +000006 4770 BX lr +;;;868 + ENDP + + |L9.8| + DCD ||.data|| + + AREA ||i.app_tp_phone_reset_on||, CODE, READONLY, ALIGN=2 + + app_tp_phone_reset_on PROC +;;;851 **************************************************************************/ +;;;852 bool app_tp_phone_reset_on(void) +000000 4801 LDR r0,|L10.8| +;;;853 { +;;;854 return s_phone_reset_flag; +000002 7880 LDRB r0,[r0,#2] ; s_phone_reset_flag +;;;855 } +000004 4770 BX lr +;;;856 + ENDP + +000006 0000 DCW 0x0000 + |L10.8| + DCD ||.data|| + + AREA ||i.app_tp_s_read||, CODE, READONLY, ALIGN=1 + + app_tp_s_read PROC +;;;337 **************************************************************************/ +;;;338 void app_tp_s_read(void *rxBuffer, size_t data_size) +000000 b510 PUSH {r4,lr} +;;;339 { +;;;340 #if PHONE_SLAVE_TRANSFER_I2C +;;;341 hal_i2c_s_nonblocking_read(rxBuffer, data_size); +000002 f7fffffe BL hal_i2c_s_nonblocking_read +;;;342 #endif +;;;343 } +000006 bd10 POP {r4,pc} +;;;344 + ENDP + + + AREA ||i.app_tp_s_transfer_complate||, CODE, READONLY, ALIGN=1 + + app_tp_s_transfer_complate PROC +;;;253 **************************************************************************/ +;;;254 bool app_tp_s_transfer_complate(void) +000000 b510 PUSH {r4,lr} +;;;255 { +;;;256 #if SCREEN_MASTER_TRANSFER_I2C +;;;257 return hal_i2c_s_write_complate() && hal_i2c_s_read_complate(); +000002 f7fffffe BL hal_i2c_s_write_complate +000006 2800 CMP r0,#0 +000008 d005 BEQ |L12.22| +00000a f7fffffe BL hal_i2c_s_read_complate +00000e 2800 CMP r0,#0 +000010 d001 BEQ |L12.22| +000012 2001 MOVS r0,#1 +;;;258 #elif SCREEN_MASTER_TRANSFER_SPI +;;;259 return !hal_spi_slave_busy(); +;;;260 #else +;;;261 return true; +;;;262 #endif +;;;263 } +000014 bd10 POP {r4,pc} + |L12.22| +000016 2000 MOVS r0,#0 ;257 +000018 bd10 POP {r4,pc} +;;;264 + ENDP + + + AREA ||i.app_tp_s_write||, CODE, READONLY, ALIGN=1 + + app_tp_s_write PROC +;;;316 **************************************************************************/ +;;;317 void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size) +000000 b510 PUSH {r4,lr} +;;;318 { +;;;319 #if PHONE_SLAVE_TRANSFER_I2C +;;;320 hal_i2c_s_dma_write(txbuffer, buffer_size); +000002 f7fffffe BL hal_i2c_s_dma_write +;;;321 #elif PHONE_SLAVE_TRANSFER_SPI +;;;322 //while (hal_spi_slave_busy()); +;;;323 hal_spi_slave_auto_transfer_abort(); +;;;324 hal_spi_slave_flush_fifo(); +;;;325 hal_spi_slave_set_auto_tx_buffer(txbuffer, buffer_size, true); +;;;326 hal_spi_slave_auto_transfer_start(); +;;;327 #endif +;;;328 } +000006 bd10 POP {r4,pc} +;;;329 + ENDP + + + AREA ||i.app_tp_screen_init||, CODE, READONLY, ALIGN=2 + + app_tp_screen_init PROC +;;;152 **************************************************************************/ +;;;153 void app_tp_screen_init(void) +000000 b510 PUSH {r4,lr} +;;;154 { +;;;155 hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); +000002 4c0a LDR r4,|L14.44| +000004 2101 MOVS r1,#1 +000006 7820 LDRB r0,[r4,#0] ; g_screen_input_rst_pad +000008 f7fffffe BL hal_gpio_init_output +;;;156 delayUs(200); +00000c 20c8 MOVS r0,#0xc8 +00000e f7fffffe BL delayUs +;;;157 hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_LOW); +000012 2100 MOVS r1,#0 +000014 7820 LDRB r0,[r4,#0] ; g_screen_input_rst_pad +000016 f7fffffe BL hal_gpio_set_output_data +;;;158 delayUs(200); +00001a 20c8 MOVS r0,#0xc8 +00001c f7fffffe BL delayUs +;;;159 hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); +000020 2101 MOVS r1,#1 +000022 7820 LDRB r0,[r4,#0] ; g_screen_input_rst_pad +000024 f7fffffe BL hal_gpio_set_output_data +;;;160 } +000028 bd10 POP {r4,pc} +;;;161 + ENDP + +00002a 0000 DCW 0x0000 + |L14.44| + DCD g_screen_input_rst_pad + + AREA ||i.app_tp_screen_int_callback||, CODE, READONLY, ALIGN=2 + + app_tp_screen_int_callback PROC +;;;82 **************************************************************************/ +;;;83 static void app_tp_screen_int_callback(void *data) +000000 4901 LDR r1,|L15.8| +;;;84 { +;;;85 s_screen_int_flag = true; +000002 2001 MOVS r0,#1 +000004 7048 STRB r0,[r1,#1] +;;;86 } +000006 4770 BX lr +;;;87 + ENDP + + |L15.8| + DCD ||.data|| + + AREA ||i.app_tp_transfer_screen_const||, CODE, READONLY, ALIGN=2 + + app_tp_transfer_screen_const PROC +;;;491 **************************************************************************/ +;;;492 static void app_tp_transfer_screen_const(void) +000000 b510 PUSH {r4,lr} +000002 f7fffffe BL hal_i2c_m_transfer_complate +;;;493 { +;;;494 // static bool screen_const_transfer_buffer_ready = true; // buffer Ƿ׼ +;;;495 uint8_t ii; +;;;496 // uint8_t len=0; +;;;497 /**** 1. жϵǰ״̬ͨѽ, ״̬ͨѽҿʼ̻δ****/ +;;;498 #if 0 // test +;;;499 uint8_t test_master_read_buffer[10] = {0x08, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; +;;;500 uint8_t write_buffer[10] = {0x04, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; +;;;501 +;;;502 // for (ii =0x20; ii<0x7F; ii++) +;;;503 { +;;;504 //hal_i2c_m_dma_init(ii, SCREEN_I2C_ADDR_BITS); +;;;505 //delayMs(100); +;;;506 if (hal_i2c_m_dma_write(write_buffer, 1)) +;;;507 { +;;;508 //break; +;;;509 } +;;;510 while(!hal_i2c_m_transfer_complate()); +;;;511 hal_i2c_m_dma_read(test_master_read_buffer, 1, test_master_read_buffer, 2); +;;;512 } +;;;513 #endif +;;;514 +;;;515 +;;;516 if (app_tp_m_transfer_complate() && (s_screen_const_transfer_count < screen_reg_start_data_size)) +000006 2800 CMP r0,#0 +000008 d012 BEQ |L16.48| +00000a 4c0a LDR r4,|L16.52| +00000c 490a LDR r1,|L16.56| +00000e 7960 LDRB r0,[r4,#5] ; s_screen_const_transfer_count +000010 7809 LDRB r1,[r1,#0] ; screen_reg_start_data_size +000012 4288 CMP r0,r1 +000014 d20c BCS |L16.48| +;;;517 { +;;;518 if (s_spim_write) //SPI дݺҪѽFIFOݶȻӰһζȡ +000016 7820 LDRB r0,[r4,#0] ; s_spim_write +000018 2800 CMP r0,#0 +00001a d003 BEQ |L16.36| +;;;519 { +;;;520 hal_spi_m_clear_rxfifo(); +00001c f7fffffe BL hal_spi_m_clear_rxfifo +;;;521 s_spim_write = false; +000020 2000 MOVS r0,#0 +000022 7020 STRB r0,[r4,#0] + |L16.36| +;;;522 } +;;;523 +;;;524 #if 1 +;;;525 +;;;526 // #ifndef USE_FOR_SUMSUNG_S20 +;;;527 // for (ii =0; ii= screen_reg_start_data_size) +;;;585 { +;;;586 s_screen_init_complate = true; +;;;587 } +;;;588 } +;;;589 #endif +;;;590 } +;;;591 } +000030 bd10 POP {r4,pc} +;;;592 + ENDP + +000032 0000 DCW 0x0000 + |L16.52| + DCD ||.data|| + |L16.56| + DCD screen_reg_start_data_size + |L16.60| + DCD phone_start_flag + + AREA ||i.app_tp_transfer_screen_int||, CODE, READONLY, ALIGN=2 + + app_tp_transfer_screen_int PROC +;;;619 **************************************************************************/ +;;;620 void app_tp_transfer_screen_int(void) +000000 b5f8 PUSH {r3-r7,lr} +;;;621 { +;;;622 uint8_t len=0; +;;;623 bool screen_gpio_int = false; +;;;624 static uint8_t screen_int_transfer_count = 0; //¼ǰͨŵһ +;;;625 static bool screen_int_transfer_buffer_ready = true; // buffer Ƿ׼ +;;;626 // static uint8_t test_flag = 0; +;;;627 // s_screen_init_complate=false;//Ϊ¼⽫ƬΪ·ݣFT8719̩ĹͨѶ +;;;628 if (!s_screen_init_complate) //TP ʼδɣȽгʼ +000002 4c38 LDR r4,|L17.228| +000004 7920 LDRB r0,[r4,#4] ; s_screen_init_complate +000006 2800 CMP r0,#0 +000008 d037 BEQ |L17.122| +;;;629 { +;;;630 app_tp_transfer_screen_const(); +;;;631 return; +;;;632 } +;;;633 +;;;634 #if 0 //test +;;;635 test_flag++; +;;;636 if (test_flag >1000000) +;;;637 { +;;;638 test_flag =0; +;;;639 //TAU_LOGD("Run ok!!\n"); +;;;640 //app_tp_m_read(screen_reg_int_data[0].buffer, screen_reg_int_data[0].txbuffer_size, s_screen_number, screen_reg_int_data[0].rxbuffer_size); +;;;641 //while(!hal_i2c_m_transfer_complate()); +;;;642 } +;;;643 #endif +;;;644 +;;;645 /**** 1. ж screen Ƿ񷢳жź ****/ +;;;646 // s_screen_int_flag: жźű־λ +;;;647 // app_tp_screen_int_lvl_low : SPI ʱͨʱżcsߵͨ쳣ñ־λڽ +;;;648 screen_gpio_int = s_screen_int_flag || app_tp_screen_int_lvl_low(); +00000a 7860 LDRB r0,[r4,#1] ; s_screen_int_flag +;;;649 if (((screen_gpio_int) || (s_screen_int_transfer_status)) && app_tp_m_transfer_complate()) //жϵǰͨ״̬׼ͨ +00000c 78e1 LDRB r1,[r4,#3] ; s_screen_int_transfer_status +00000e 4308 ORRS r0,r0,r1 +000010 d035 BEQ |L17.126| +000012 f7fffffe BL hal_i2c_m_transfer_complate +000016 2800 CMP r0,#0 +000018 d031 BEQ |L17.126| +;;;650 { +;;;651 s_screen_int_flag = false; +00001a 2600 MOVS r6,#0 +00001c 7066 STRB r6,[r4,#1] +;;;652 if (s_spim_write) //SPI дݺҪѽFIFOݶȻӰһζȡ +00001e 7820 LDRB r0,[r4,#0] ; s_spim_write +000020 2800 CMP r0,#0 +000022 d002 BEQ |L17.42| +;;;653 { +;;;654 hal_spi_m_clear_rxfifo(); +000024 f7fffffe BL hal_spi_m_clear_rxfifo +;;;655 s_spim_write = false; +000028 7026 STRB r6,[r4,#0] + |L17.42| +;;;656 } +;;;657 +;;;658 /**** 2. ͻȡӻ ****/ +;;;659 if (screen_int_transfer_buffer_ready) +00002a 79e1 LDRB r1,[r4,#7] ; screen_int_transfer_buffer_ready +;;;660 { +;;;661 #ifndef READ_MODULE_TP_ONE_BY_ONE +;;;662 screen_int_transfer_buffer_ready = false; +;;;663 s_screen_int_transfer_status = true; +00002c 2001 MOVS r0,#1 +;;;664 #ifdef USE_FOR_SAMSUNG_NOTE20 +;;;665 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); +00002e 4d2e LDR r5,|L17.232| +000030 2900 CMP r1,#0 ;659 +000032 d04e BEQ |L17.210| +000034 71e6 STRB r6,[r4,#7] ;662 +000036 70e0 STRB r0,[r4,#3] ;663 +000038 2308 MOVS r3,#8 +00003a 4a2c LDR r2,|L17.236| +00003c 2101 MOVS r1,#1 +00003e 6828 LDR r0,[r5,#0] ; screen_reg_int_data +000040 f7fffffe BL app_tp_m_read + |L17.68| +;;;666 while(!hal_i2c_m_transfer_complate()); +000044 f7fffffe BL hal_i2c_m_transfer_complate +000048 2800 CMP r0,#0 +00004a d0fb BEQ |L17.68| +;;;667 if(s_screen_read_buffer[7]>0) +00004c 4f27 LDR r7,|L17.236| +00004e 4638 MOV r0,r7 ;665 +000050 79f9 LDRB r1,[r7,#7] ; s_screen_read_buffer +000052 3008 ADDS r0,r0,#8 ;665 +000054 9000 STR r0,[sp,#0] +000056 2900 CMP r1,#0 +000058 d00a BEQ |L17.112| +00005a 06c8 LSLS r0,r1,#27 +;;;668 { +;;;669 len=s_screen_read_buffer[7]*8; +00005c 0e03 LSRS r3,r0,#24 +;;;670 app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); +00005e 6828 LDR r0,[r5,#0] ; screen_reg_int_data +000060 2101 MOVS r1,#1 +000062 9a00 LDR r2,[sp,#0] +000064 f7fffffe BL app_tp_m_read + |L17.104| +;;;671 while(!hal_i2c_m_transfer_complate()); +000068 f7fffffe BL hal_i2c_m_transfer_complate +00006c 2800 CMP r0,#0 +00006e d0fb BEQ |L17.104| + |L17.112| +;;;672 } +;;;673 delayMs(2); +000070 2002 MOVS r0,#2 +000072 f7fffffe BL delayMs +;;;674 while(!hal_gpio_get_input_data(g_screen_input_int_pad)) +000076 4e1e LDR r6,|L17.240| +000078 e020 B |L17.188| + |L17.122| +00007a f7fffffe BL app_tp_transfer_screen_const + |L17.126| +;;;675 { +;;;676 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); +;;;677 while(!hal_i2c_m_transfer_complate()); +;;;678 delayMs(2); +;;;679 if(s_screen_read_buffer[7]>0) +;;;680 { +;;;681 len=s_screen_read_buffer[7]*8; +;;;682 app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); +;;;683 while(!hal_i2c_m_transfer_complate()); +;;;684 delayMs(2); +;;;685 } +;;;686 } +;;;687 #else +;;;688 app_tp_m_read(screen_reg_int_data[0].buffer, screen_reg_int_data[0].txbuffer_size, s_screen_temp, screen_reg_int_data[0].rxbuffer_size); +;;;689 while(!hal_i2c_m_transfer_complate()); +;;;690 app_tp_m_read(screen_reg_int_data[1].buffer, screen_reg_int_data[1].txbuffer_size, s_screen_number, screen_reg_int_data[1].rxbuffer_size); +;;;691 while(!hal_i2c_m_transfer_complate()); +;;;692 //TAU_LOGD("s_screen_number[%4x], size[%4x]", ((s_screen_number[1]<<8)|s_screen_number[0]), ((s_screen_temp[1]<<8)|s_screen_temp[0])); +;;;693 +;;;694 if(s_screen_number[1]) +;;;695 { +;;;696 if (s_screen_number[1]>3) +;;;697 { +;;;698 read_point =1; +;;;699 s_screen_int_transfer_status = false; +;;;700 } +;;;701 else if (s_screen_number[1] &0x02) +;;;702 read_point =10; +;;;703 else +;;;704 read_point =9; +;;;705 } +;;;706 else +;;;707 { +;;;708 if(s_screen_number[0] &0x80) +;;;709 read_point =8; +;;;710 else if(s_screen_number[0] &0x40) +;;;711 read_point =7; +;;;712 else if(s_screen_number[0] &0x20) +;;;713 read_point =6; +;;;714 else if(s_screen_number[0] &0x10) +;;;715 read_point =5; +;;;716 else if(s_screen_number[0] &0x08) +;;;717 read_point =4; +;;;718 else if(s_screen_number[0] &0x04) +;;;719 read_point =3; +;;;720 else if(s_screen_number[0] &0x02) +;;;721 read_point =2; +;;;722 else +;;;723 read_point =1; +;;;724 } +;;;725 read_point =8*read_point; +;;;726 app_tp_m_read(screen_reg_int_data[2].buffer, screen_reg_int_data[2].txbuffer_size, s_screen_read_buffer, read_point); +;;;727 while(!hal_i2c_m_transfer_complate()); +;;;728 #endif +;;;729 #else +;;;730 if (!screen_reg_int_data[screen_int_transfer_count].read_flag) //ǰͨŲҪأֱд +;;;731 { +;;;732 app_tp_m_write(screen_reg_int_data[screen_int_transfer_count].buffer, screen_reg_int_data[screen_int_transfer_count].txbuffer_size); +;;;733 } +;;;734 else //ǰͨҪأдٶ +;;;735 { +;;;736 s_screen_int_transfer_status = true; +;;;737 if (screen_int_transfer_count==0) +;;;738 { +;;;739 app_tp_m_read(screen_reg_int_data[screen_int_transfer_count].buffer, screen_reg_int_data[screen_int_transfer_count].txbuffer_size, \ +;;;740 s_screen_temp, screen_reg_int_data[screen_int_transfer_count].rxbuffer_size); +;;;741 screen_int_transfer_count =1; +;;;742 } +;;;743 else if (screen_int_transfer_count==1) +;;;744 { +;;;745 app_tp_m_read(screen_reg_int_data[screen_int_transfer_count].buffer, screen_reg_int_data[screen_int_transfer_count].txbuffer_size, \ +;;;746 s_screen_number, screen_reg_int_data[screen_int_transfer_count].rxbuffer_size); +;;;747 screen_int_transfer_count =2; +;;;748 } +;;;749 else if (screen_int_transfer_count==2) +;;;750 { +;;;751 if(s_screen_number[1]) +;;;752 { +;;;753 TAU_LOGD("s_screen_number[%4x], size[%4x]", ((s_screen_number[1]<<8)|s_screen_number[0]), ((s_screen_temp[1]<<8)|s_screen_temp[0])); +;;;754 if (s_screen_number[1] &0x02) +;;;755 read_point =10; +;;;756 else +;;;757 read_point =9; +;;;758 } +;;;759 else +;;;760 { +;;;761 if(s_screen_number[0] &0x80) +;;;762 read_point =8; +;;;763 else if(s_screen_number[0] &0x40) +;;;764 read_point =7; +;;;765 else if(s_screen_number[0] &0x20) +;;;766 read_point =6; +;;;767 else if(s_screen_number[0] &0x10) +;;;768 read_point =5; +;;;769 else if(s_screen_number[0] &0x08) +;;;770 read_point =4; +;;;771 else if(s_screen_number[0] &0x04) +;;;772 read_point =3; +;;;773 else if(s_screen_number[0] &0x02) +;;;774 read_point =2; +;;;775 else +;;;776 read_point =1; +;;;777 } +;;;778 read_point =8*read_point; +;;;779 +;;;780 app_tp_m_read(screen_reg_int_data[screen_int_transfer_count].buffer, screen_reg_int_data[screen_int_transfer_count].txbuffer_size, \ +;;;781 s_screen_read_buffer, read_point); +;;;782 screen_int_transfer_count =0; +;;;783 screen_int_transfer_buffer_ready = false; +;;;784 } +;;;785 } +;;;786 #endif +;;;787 app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer,screen_reg_int_data[2].rxbuffer_size); +;;;788 } +;;;789 /**** 3. ͨݣ׼һͨŵbuffer ****/ +;;;790 else +;;;791 { +;;;792 #if 1 +;;;793 #ifdef USE_FOR_SUMSUNG_S20 +;;;794 u16TouchID=0x0000; +;;;795 #endif +;;;796 screen_int_transfer_buffer_ready = true; +;;;797 screen_int_transfer_count = app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer,screen_reg_int_data[2].rxbuffer_size); +;;;798 screen_int_transfer_count = 0; +;;;799 s_screen_int_transfer_status = false; +;;;800 +;;;801 #else +;;;802 screen_int_transfer_buffer_ready = true; +;;;803 screen_int_transfer_count = app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer, \ +;;;804 screen_reg_int_data[screen_int_transfer_count].rxbuffer_size); +;;;805 +;;;806 if (screen_int_transfer_count > screen_reg_int_data_size) //ҪһͨŽһݽֹͣͨ +;;;807 { +;;;808 screen_int_transfer_count = 0; +;;;809 s_screen_int_transfer_status = false; +;;;810 return; +;;;811 } +;;;812 #endif +;;;813 } +;;;814 } +;;;815 } +00007e bdf8 POP {r3-r7,pc} + |L17.128| +000080 2308 MOVS r3,#8 ;676 +000082 4a1a LDR r2,|L17.236| +000084 2101 MOVS r1,#1 ;676 +000086 6828 LDR r0,[r5,#0] ;676 ; screen_reg_int_data +000088 f7fffffe BL app_tp_m_read + |L17.140| +00008c f7fffffe BL hal_i2c_m_transfer_complate +000090 2800 CMP r0,#0 ;677 +000092 d0fb BEQ |L17.140| +000094 2002 MOVS r0,#2 ;678 +000096 f7fffffe BL delayMs +00009a 79f8 LDRB r0,[r7,#7] ;679 ; s_screen_read_buffer +00009c 2800 CMP r0,#0 ;679 +00009e d00d BEQ |L17.188| +0000a0 06c0 LSLS r0,r0,#27 ;681 +0000a2 0e03 LSRS r3,r0,#24 ;681 +0000a4 6828 LDR r0,[r5,#0] ;682 ; screen_reg_int_data +0000a6 2101 MOVS r1,#1 ;682 +0000a8 9a00 LDR r2,[sp,#0] ;682 +0000aa f7fffffe BL app_tp_m_read + |L17.174| +0000ae f7fffffe BL hal_i2c_m_transfer_complate +0000b2 2800 CMP r0,#0 ;683 +0000b4 d0fb BEQ |L17.174| +0000b6 2002 MOVS r0,#2 ;684 +0000b8 f7fffffe BL delayMs + |L17.188| +0000bc 7830 LDRB r0,[r6,#0] ;674 ; g_screen_input_int_pad +0000be f7fffffe BL hal_gpio_get_input_data +0000c2 2800 CMP r0,#0 ;674 +0000c4 d0dc BEQ |L17.128| +0000c6 4909 LDR r1,|L17.236| +0000c8 79a0 LDRB r0,[r4,#6] ;787 ; screen_int_transfer_count +0000ca 6aaa LDR r2,[r5,#0x28] ;787 ; screen_reg_int_data +0000cc f7fffffe BL app_tp_screen_analysis_int +0000d0 bdf8 POP {r3-r7,pc} + |L17.210| +0000d2 71e0 STRB r0,[r4,#7] ;796 +0000d4 4905 LDR r1,|L17.236| +0000d6 79a0 LDRB r0,[r4,#6] ;797 ; screen_int_transfer_count +0000d8 6aaa LDR r2,[r5,#0x28] ;797 ; screen_reg_int_data +0000da f7fffffe BL app_tp_screen_analysis_int +0000de 71a6 STRB r6,[r4,#6] ;798 +0000e0 70e6 STRB r6,[r4,#3] ;799 +0000e2 bdf8 POP {r3-r7,pc} +;;;816 + ENDP + + |L17.228| + DCD ||.data|| + |L17.232| + DCD screen_reg_int_data + |L17.236| + DCD ||.bss|| + |L17.240| + DCD g_screen_input_int_pad + + AREA ||i.app_tp_transfer_screen_start||, CODE, READONLY, ALIGN=2 + + app_tp_transfer_screen_start PROC +;;;599 **************************************************************************/ +;;;600 void app_tp_transfer_screen_start(void) +000000 b510 PUSH {r4,lr} +;;;601 { +;;;602 // s_screen_init_complate = false; +;;;603 s_screen_const_transfer_count = 0; +000002 4903 LDR r1,|L18.16| +000004 2000 MOVS r0,#0 +000006 7148 STRB r0,[r1,#5] +;;;604 //app_tp_screen_init(); +;;;605 #ifndef DISABLE_I2C_INIT_CODE +;;;606 app_tp_transfer_screen_const(); +000008 f7fffffe BL app_tp_transfer_screen_const +;;;607 #endif +;;;608 // s_screen_int_flag = false; +;;;609 } +00000c bd10 POP {r4,pc} +;;;610 + ENDP + +00000e 0000 DCW 0x0000 + |L18.16| + DCD ||.data|| + + AREA ||.bss||, DATA, NOINIT, ALIGN=0 + + s_screen_read_buffer + % 200 + s_phone_read_buffer + % 200 + + AREA ||.data||, DATA, ALIGN=0 + + s_spim_write +000000 00 DCB 0x00 + s_screen_int_flag +000001 00 DCB 0x00 + s_phone_reset_flag +000002 00 DCB 0x00 + s_screen_int_transfer_status +000003 00 DCB 0x00 + s_screen_init_complate +000004 00 DCB 0x00 + s_screen_const_transfer_count +000005 ff DCB 0xff + screen_int_transfer_count +000006 00 DCB 0x00 + screen_int_transfer_buffer_ready +000007 01 DCB 0x01 + MI10_PRO_screen_init_data1 +000008 a00001 DCB 0xa0,0x00,0x01 + MI10_PRO_screen_init_data3 +00000b a2 DCB 0xa2 +00000c 0200 DCB 0x02,0x00 + MI10_PRO_screen_init_data4 +00000e c007 DCB 0xc0,0x07 +000010 01 DCB 0x01 + MI10_PRO_TP_Tuning_data2 +000011 a40003 DCB 0xa4,0x00,0x03 + MI10_PRO_TP_Tuning_data3 +000014 a40002 DCB 0xa4,0x00,0x02 + MI10_PRO_TP_Tuning_data6 +000017 a4 DCB 0xa4 +000018 0501 DCB 0x05,0x01 + MI10_PRO_TP_Tuning_data7 +00001a a405 DCB 0xa4,0x05 +00001c 02 DCB 0x02 + MI10_PRO_TP_Tuning_data8 +00001d a40504 DCB 0xa4,0x05,0x04 + MI10_PRO_TP_Tuning_data4 +000020 a4031300 DCB 0xa4,0x03,0x13,0x00 + MI10_PRO_TP_Tuning_data5 +000024 a4030c00 DCB 0xa4,0x03,0x0c,0x00 + MI10_PRO_screen_init_data2 +000028 a2030000 DCB 0xa2,0x03,0x00,0x00 +00002c 0003 DCB 0x00,0x03 + + AREA ||area_number.23||, DATA, ALIGN=0 + + EXPORTAS ||area_number.23||, ||.data|| + MI10_PRO_screen_init_data5 +000000 a40670 DCB 0xa4,0x06,0x70 + + AREA ||area_number.24||, DATA, ALIGN=0 + + EXPORTAS ||area_number.24||, ||.data|| + MI10_PRO_screen_init_data6 +000000 a60000 DCB 0xa6,0x00,0x00 + + AREA ||area_number.25||, DATA, ALIGN=0 + + EXPORTAS ||area_number.25||, ||.data|| + MI10_PRO_screen_init_data7 +000000 fa200000 DCB 0xfa,0x20,0x00,0x00 +000004 78 DCB 0x78 + + AREA ||area_number.26||, DATA, ALIGN=0 + + EXPORTAS ||area_number.26||, ||.data|| + MI10_PRO_screen_init_data8 +000000 a2032000 DCB 0xa2,0x03,0x20,0x00 +000004 0000 DCB 0x00,0x00 + + AREA ||area_number.27||, DATA, ALIGN=0 + + EXPORTAS ||area_number.27||, ||.data|| + MI10_PRO_screen_init_data9 +000000 a001 DCB 0xa0,0x01 + + AREA ||area_number.28||, DATA, ALIGN=0 + + EXPORTAS ||area_number.28||, ||.data|| + MI10_PRO_screen_init_data10 +000000 a00000 DCB 0xa0,0x00,0x00 + + AREA ||area_number.29||, DATA, ALIGN=0 + + EXPORTAS ||area_number.29||, ||.data|| + read_point +000000 00 DCB 0x00 + + AREA ||area_number.30||, DATA, ALIGN=0 + + EXPORTAS ||area_number.30||, ||.data|| + s_screen_number +000000 0000 DCB 0x00,0x00 + + AREA ||area_number.31||, DATA, ALIGN=0 + + EXPORTAS ||area_number.31||, ||.data|| + s_screen_temp +000000 0000 DCB 0x00,0x00 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\demo\\app_tp_transfer.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___17_app_tp_transfer_c_e672c05a____REV16| +#line 467 "C:\\Users\\ASUS\\AppData\\Local\\Arm\\Packs\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___17_app_tp_transfer_c_e672c05a____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___17_app_tp_transfer_c_e672c05a____REVSH| +#line 482 +|__asm___17_app_tp_transfer_c_e672c05a____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/ISP_368/Listings/board.txt b/project/ISP_368/Listings/board.txt new file mode 100644 index 0000000..c5411f6 --- /dev/null +++ b/project/ISP_368/Listings/board.txt @@ -0,0 +1,63 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\board.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\board.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL368 -I.\RTE\_ISP_368 -IC:\Users\ASUS\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Users\ASUS\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_368 --omf_browse=.\objects\board.crf ..\..\src\board\board.c] + THUMB + + AREA ||i.board_Init||, CODE, READONLY, ALIGN=2 + + board_Init PROC +;;;13 +;;;14 void board_Init(void) +000000 b510 PUSH {r4,lr} +;;;15 { +;;;16 hal_system_init(SYSTEM_CLOCK); +000002 4807 LDR r0,|L1.32| +000004 f7fffffe BL hal_system_init +;;;17 hal_system_enable_systick(1); +000008 2001 MOVS r0,#1 +00000a f7fffffe BL hal_system_enable_systick +;;;18 #if !EDA_MODE +;;;19 hal_system_init_console(115200); +00000e 20e1 MOVS r0,#0xe1 +000010 0240 LSLS r0,r0,#9 +000012 f7fffffe BL hal_system_init_console +;;;20 #endif +;;;21 #if defined(ISP_568) || defined(ISP_368) +;;;22 /* 从EFUSE读取DPHY校准值并设置 */ +;;;23 hal_system_set_phy_calibration(true); +000016 2001 MOVS r0,#1 +000018 f7fffffe BL hal_system_set_phy_calibration +;;;24 #endif +;;;25 } +00001c bd10 POP {r4,pc} +;;;26 + ENDP + +00001e 0000 DCW 0x0000 + |L1.32| + DCD 0x04c4b400 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\board\\board.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___7_board_c_bcd01269____REV16| +#line 467 "C:\\Users\\ASUS\\AppData\\Local\\Arm\\Packs\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___7_board_c_bcd01269____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___7_board_c_bcd01269____REVSH| +#line 482 +|__asm___7_board_c_bcd01269____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/ISP_368/Listings/main.txt b/project/ISP_368/Listings/main.txt new file mode 100644 index 0000000..994a04a --- /dev/null +++ b/project/ISP_368/Listings/main.txt @@ -0,0 +1,55 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\main.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\main.d --cpu=Cortex-M0 --apcs=interwork -O3 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL368 -I.\RTE\_ISP_368 -IC:\Users\ASUS\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Users\ASUS\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_368 --omf_browse=.\objects\main.crf ..\..\src\app\main.c] + THUMB + + AREA ||i.main||, CODE, READONLY, ALIGN=1 + + main PROC +;;;13 +;;;14 int main() +000000 f7fffffe BL board_Init +;;;15 { +;;;16 // hal_system_init(); +;;;17 board_Init(); +;;;18 +;;;19 while (1) +;;;20 { +;;;21 #if _DEMO_S8_EN +;;;22 ap_demo(); +000004 f7fffffe BL ap_demo + |L1.8| +;;;23 #endif +;;;24 while (1); +000008 e7fe B |L1.8| +;;;25 } +;;;26 } + ENDP + + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\main.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___6_main_c_main____REV16| +#line 467 "C:\\Users\\ASUS\\AppData\\Local\\Arm\\Packs\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___6_main_c_main____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___6_main_c_main____REVSH| +#line 482 +|__asm___6_main_c_main____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** + + __ARM_use_no_argv EQU 0 diff --git a/project/ISP_368/Objects/WL368_NOTE20_CSOT667.bin b/project/ISP_368/Objects/WL368_NOTE20_CSOT667.bin new file mode 100644 index 0000000..98443ef Binary files /dev/null and b/project/ISP_368/Objects/WL368_NOTE20_CSOT667.bin differ diff --git a/project/ISP_368/RTE/_ISP_368/RTE_Components.h b/project/ISP_368/RTE/_ISP_368/RTE_Components.h new file mode 100644 index 0000000..9bd4b37 --- /dev/null +++ b/project/ISP_368/RTE/_ISP_368/RTE_Components.h @@ -0,0 +1,21 @@ + +/* + * Auto generated Run-Time-Environment Configuration File + * *** Do not modify ! *** + * + * Project: 'ISP_368' + * Target: 'ISP_368' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "ARMCM0.h" + + + +#endif /* RTE_COMPONENTS_H */ diff --git a/project/请先读我（已更新20221018）.txt b/project/请先读我（已更新20221018）.txt new file mode 100644 index 0000000..ad19762 --- /dev/null +++ b/project/请先读我（已更新20221018）.txt @@ -0,0 +1,9 @@ +1. 此目录下所有project文件仅为链接文件（使用宏定义和库文件区分） + +2. 强烈建议将不使用的芯片型号文件夹删除，仅保留使用的芯片型号文件夹，以免串烧导致芯片烧坏 + +3. 如若更换芯片，仅需将提供的原工程下特定型号文件夹拷贝到模板工程，删除原芯片project下文件夹，重新编译即可 + 如原来使用518芯片，后面更换为568芯片，仅需把源工程project下518文件夹删除，重新从提供的原工程下将568文件夹拷贝到工程目录project下，打开重新编译即可 + +第一代产品包括：WL518,308,518T +第二代产品包括：WL568,368,568T \ No newline at end of file diff --git a/src/app/demo/ap_demo.c b/src/app/demo/ap_demo.c new file mode 100644 index 0000000..e0fc8b3 --- /dev/null +++ b/src/app/demo/ap_demo.c @@ -0,0 +1,2746 @@ +/******************************************************************************* +* +* File: S20_demo.c +* Description: ϵͳļ +* Version: V0.1 +* Date: 2020-02-22 +* Author: Tempest + *******************************************************************************/ + +#include "ap_demo.h" +#include "ArmCM0.h" +#include "tau_device_datatype.h" +#include "tau_log.h" +#include "tau_operations.h" +#include "tau_common.h" +#include "tau_delay.h" +#include "hal_dsi_rx_ctrl.h" +#include "hal_dsi_tx_ctrl.h" +#include "hal_swire.h" +#include "hal_timer.h" +#include "hal_system.h" +#include "hal_gpio.h" +#include "hal_pwm.h" + + +#include "app_tp_transfer.h" +#ifdef LOG_TAG + #undef LOG_TAG +#endif +#define LOG_TAG "N20_NT37701" + +/*****************************************/ + +//S8 MIPIϢ +/* ֱ */ +#define INPUT_WIDTH 1080 +#define INPUT_HEIGHT 2400//2280//2400 +/* MIPI lane rate,video modeҪȷãcmd mode */ +#define INPUT_MIPI_LANE_RATE 1300000000// 1300000000 //898000000 +/* ͼʽ */ +#define INPUT_COLOR_MODE DSI_RGB888 +/* ݸʽ(DSI_DATA_CMD_MODE , DSI_DATA_VIDEO_MODE) */ +#define INPUT_DATA_MODE DSI_DATA_CMD_MODE // +/* mipi lane(DSI_RX_LANE_x xΪ1-4) */ +#define INPUT_MIPI_LANE_NUM DSI_LANE_4 +/* Ϊvideo mode ʱݸʽ */ +#define INPUT_VIDEO_MODEL DSI_NONBURST_EVENT //EVENT;PULSE;BURST_MODE +/* ͨ(0-3) */ +#define INPUT_VC DSI_VC_0 +/* ֡(60/90/120/144Hz) */ +#define INPUT_FRAME_RATE DSI_FRAME_RATE_60HZ +/* ǷDSCѹ */ +#define INPUT_COMPRESS false + +#if AMOLED_NT37701_CSOT667 + /* ֱ */ + #define OUTPUT_WIDTH 1080 + #define OUTPUT_HEIGHT 2400 //2340 + /* ͨ(0-3) */ + #define OUTPUT_VC DSI_VC_0 + /* mipi lane(DSI_RX_LANE_x xΪ1-4) */ + #define OUTPUT_LANE_NUMBER DSI_LANE_4 + /* Ϊvideo mode ݸʽ */ + #define OUTPUT_VIDEO_MODEL DSI_BURST_MODE //DSI_BURST_MODE DSI_NONBURST_PULSE + + /* VSA */ + #define OUTPUT_VSA 12//8 + /* VBP */ + #define OUTPUT_VBP 8 + /* VBP */ + #define OUTPUT_VFP 56//20 + /* VSA */ + #define OUTPUT_HSA 8 + /* HBP */ + #define OUTPUT_HBP 12//10 + /* HFP */ + #define OUTPUT_HFP 120//50 + + /* ʼģʽ */ + #define _CMD_TYPE DSI_CMD_TX_LP //0-HS,1-LP; + #define OUTPUT_FRAME_RATE 60 +#endif + +#define SWIRE_TIMER TIMER_NUM1 +#define TE_TIMER TIMER_NUM2 +#define ENABLE_TP_WAKE_UP true +#define SWIRE_MAX_NUM 24 +#define SWIRE_DEFAULT_NUM 38 + + +#if ENABLE_TP_WAKE_UP + #define POWER_IO_A IO_PAD_TD_LEDPWM /* ӦIOҪ */ + #define POWER_IO_B IO_PAD_TD_SPIM_MISO /* ӦIOҪ */ +#endif + +//#define DISPLAY_ONLY +//#define CUS_SCLD_FILTER true +//#define NEW_ACK_CMD_FUNC true + + +/******************************************************/ +static hal_dsi_rx_ctrl_handle_t *g_rx_ctrl_handle = NULL; +static hal_dsi_tx_ctrl_handle_t *g_tx_ctrl_handle = NULL; + + +#define ADD_TP_CALIBRATION 1 +#define AUTO_CAL_TP 0 +#define RUN_TEST 0 + +#if ADD_TP_CALIBRATION +static volatile bool g_calibration_flag = false; +#endif + +#if AUTO_CAL_TP +static uint16_t g_cal_cnt = 300; //3sʱTPУ׼ +#endif + +#if RUN_TEST +static uint32_t g_run_test_cnt = 0; //leo +#endif + + + +//static uint8_t swire_num=SWIRE_DEFAULT_NUM; +//static uint8_t swire_num_bak=SWIRE_DEFAULT_NUM; + +/* Ĭfalse,ʼ־λ,ʹTP1.8V,AC ʼҪTP1.8Vе */ +static volatile bool start_display_on = true; +static bool g_need_enter_sleep_mode = false; +static bool g_exit_sleep_mode = false; + +static bool g_power_on_flag = false; +static bool g_en_adj_bl = false; + +/* ʼɱ־λ */ +static bool panel_display_done = false; +static uint8_t g_panel_display_cnt = 5; +//static bool g_panel_init_done = false; +static volatile bool g_resolution_change = false; +//static void swire_init(void); +void Gpio_swire_output(uint8_t flag, uint8_t num); + +#ifdef USE_FOR_SAMSUNG_NOTE20 +extern uint8_t Flag_blacklight_EN; +extern uint8_t tp_sleep_in; +extern uint8_t tp_sleep_count; +extern uint8_t tp_sleep_clk_count; +uint8_t phone_start_flag=0; +uint16_t phone_DisplayOFF_count=0; +uint8_t phone_DisplayOFF_flag=0; +#endif + + +#if ENABLE_TP_WAKE_UP +static void ap_reset_cb(void *data) +{ + /* лԴ */ + // hal_gpio_set_output_data_ex(POWER_IO_B, IO_LVL_HIGH, POWER_IO_A, IO_LVL_LOW); + /* VCC */ + TAU_LOGD("ap reset!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!\n"); + //delayMs(20); + hal_system_set_pvd(true); + hal_system_set_vcc(true); + NVIC_SystemReset(); +} +#endif + + +static bool ap_dcs_read(uint8_t data_type, uint8_t dcs_cmd, uint8_t param) +{ + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); +// TAU_LOGD("r %x len=%d", dcs_cmd, return_size); + + if (dcs_cmd == 0xDA) + { + g_power_on_flag = true; + if(panel_display_done==false) + phone_DisplayOFF_flag=1; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x81); + } + else if (dcs_cmd == 0xDB) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x00); + } + else if (dcs_cmd == 0xDC) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x04); + } + + else if (dcs_cmd == 0x0A) + { + static uint8_t cmd_0a_flag = 0; + if (cmd_0a_flag == 0) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x00); + cmd_0a_flag = 1; + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x9f); + } + } + else if (dcs_cmd == 0x0E) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x80); + } + else if (dcs_cmd == 0xEE) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x00); + } + else if (dcs_cmd == 0x05) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x00); + } + else if (dcs_cmd == 0x04) + { + g_power_on_flag = true; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, 0x81,0x00,0x04); + } + else if (dcs_cmd == 0x5A) + { + uint8_t flag_5a = 0; + if (flag_5a == 0) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 41, + 0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); + flag_5a = 1; + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 41, + 0x01,0x00,0x02,0x01,0x34,0x01,0x34,0x00,0x03,0x01,0x28,0x00,0x3C,0x00,0x61,0x00, + 0x96,0x00,0x3F,0x00,0x74,0x00,0x87,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); + flag_5a = 0; + } + } + else if (dcs_cmd == 0x0F) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0xC0); + } + else if (dcs_cmd == 0xA1) + { + if (return_size == 8) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 8, + 0x0B,0xF0,0x0C,0x8F,0x99,0x05,0x04,0x39); + } + else if (return_size == 7) // + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 7, + 0x97,0x15,0x14,0x1E,0x25,0x26,0x41); //N981B/DS + } + else if (return_size == 10) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, + 0x0B,0xF0,0x0C,0x8F,0x99,0x05,0x04,0x39,0x09,0x02); + } + else if (return_size == 20) // + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 20, + 0x30,0x01,0x01,0xA6,0x41,0x33,0x55,0x4D,0x35,0x53,0x30,0x36,0x39,0x32,0x43,0x41, + 0x51,0x30,0x33,0x35); //N981B/DS + } + else if (return_size == 24) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 24, + 0x0B,0xF0,0x0C,0x8F,0x99,0x05,0x04,0x39,0x09,0x02,0x57,0x30,0x01,0x01,0xA4,0x41, + 0x33,0x55,0x4D,0x36,0x53,0x30,0x38,0x31); + } + else if (return_size == 31) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 24, + 0x0B,0xF0,0x0C,0x8F,0x99,0x05,0x04,0x39,0x09,0x02,0x57,0x30,0x01,0x01,0xA4,0x41, + 0x33,0x55,0x4D,0x36,0x53,0x30,0x38,0x31,0x30,0x4B,0x42,0x4C,0x30,0x39,0x38); + } + else if (return_size == 4) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 4, +// 0x0B,0xF0,0x0C,0x8F); + 0x0B,0xF0,0x0C,0x95); //G981B/DS + } + else if (return_size == 11) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 11, + 0x0B,0xF0,0x0C,0x8F,0x99,0x05,0x04,0x39,0x09,0x02,0x57); + } + else + { + TAU_LOGD("r[%x] [%d] err!", dcs_cmd, return_size); + } + } + else if (dcs_cmd == 0xD6) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 5, +// 0x90,0x19,0x37,0x81,0x21); + 0x83,0xC0,0x35,0x99,0xB4); //G981B/DS + } + else if (dcs_cmd == 0xD6) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 5, +// 0x90,0x19,0x37,0x81,0x21); + 0x83,0xC0,0x35,0x99,0xB4); //G981B/DS + } + else if (dcs_cmd == 0xB5) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0x13); //G981B/DS + } + else if (dcs_cmd == 0xB7) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, + 0x2A,0x56,0x4D,0x8A,0x2A,0x56,0x4D,0x8A,0x00,0x60); + } + else if (dcs_cmd == 0x7F) + { + if (return_size == 10) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); + } + else if (return_size == 24) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 24, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); + } + else if (return_size == 33) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 33, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00); + } + else + { + TAU_LOGD("r[%x] [%d] err!!!!!!", dcs_cmd, return_size); + } + } + else + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0); + TAU_LOGD("r[%x] [%d] err!", dcs_cmd, return_size); + } + + return true; +} + + +/* PPS update callback ڷֱлcase */ +static bool pps_update_handle(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height) +{ + /* AVDD ϵ, ڽϢPPS */ + //TAU_LOGD("[%d, %d], [%d, %d]", pic_width, pic_height, g_rx_ctrl_handle->base_info.src_w, g_rx_ctrl_handle->base_info.src_h); + if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) + { + /* PPS Update ҷֱʷ仯 */ + + g_rx_ctrl_handle->base_info.src_w = pic_width; + g_rx_ctrl_handle->base_info.src_h = pic_height; + /* עⲿֻPPSǰ Compression Mode Command */ + g_rx_ctrl_handle->compress_en = true; + if(pic_width > 720) + { + g_tx_ctrl_handle->base_info.src_w = pic_width; + g_tx_ctrl_handle->base_info.src_h = pic_height; + } + hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); + +// TAU_LOGD("resolution update w[%d] h[%d] compress[%d]\n", pic_width, pic_height, g_rx_ctrl_handle->compress_en); + } + + TAU_LOGD("PPS Update"); + return true; +} + + + +static bool ap_set_display_off(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + TAU_LOGD("disp off"); + + g_en_adj_bl = false; + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x28); + + return true; +} + +static bool ap_set_enter_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + delayMs(10); + Gpio_swire_output(0, 0); + delayMs(10); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x10); + delayMs(20); + hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_LOW); + + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW);//Reaet + + TAU_LOGD("enter sleep mode"); +#if ENABLE_TP_WAKE_UP + g_need_enter_sleep_mode = true; +#endif + g_exit_sleep_mode = false; + + return true; +} + +static bool ap_set_display_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + TAU_LOGD("disp on"); + return true; +} + +static bool ap_set_exit_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + TAU_LOGD("exit sleep mode"); + g_exit_sleep_mode = true; + return true; +} + + +/***************************************************************************** +*GPIOswire +*flag: =0, SWIRE=0; =1,SWIREź; =2, øٷSWIREź +*num: +*עFLAG=1ʱGPIOʼ!!!!!! +*****************************************************************************/ +void Gpio_swire_output(uint8_t flag, uint8_t num) +{ + uint8_t ii; + + if (flag) + { + if (flag ==2) + { + hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_HIGH); + delayMs(2); + } + for (ii =0; ii< num; ii++) + { + hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_LOW); + delayUs(10); + hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); + delayUs(9); + } + } + else + { + hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW); + } +} + +#ifdef ADD_PWM_OUTPUT_FOR_BL +#if 0 +/***************************************************************************** +* @brief pwmԿƱ +* @param init: ǷΪʼһαѡʼ +* @param polarity: ԣfalse:ȸߺͣtrue:ȵͺ +* @param duty_ratio: ռձ(0-100) +* @param frequency: ƵʣλHZ +* @retval null +*****************************************************************************/ +static void test_pwm_out_adjust(bool init, bool polarity, uint8_t duty_ratio, uint32_t frequency) +{ + pwm_out_ctrl_e ctl0 = PWMO_CTRL_HIGH; + pwm_out_ctrl_e ctl1 = PWMO_CTRL_LOW; + if (polarity) + { + ctl0 = PWMO_CTRL_LOW; + ctl1 = PWMO_CTRL_HIGH; + } + uint32_t period = 1000000 / frequency; //λus + uint32_t thr0 = 0; + uint32_t thr1 = (period * duty_ratio / 100); + + if (duty_ratio == 100) + { + ctl1 = ctl0; + thr1 = period / 2; + } + if (init) + { + hal_pwm_out_init(); + hal_pwm_out_config_all(ctl0, ctl1, thr0, thr1, period); + } + else + { + hal_pwm_out_sync_all(ctl0, ctl1, thr0, thr1, period); + } +} + +void PWM_OUTPUT_TEST(void) +{ + test_pwm_out_adjust(true, true, 30, 20000); + delayMs(2); + test_pwm_out_adjust(false, false, 40, 10000); +} +#endif + + +#define PWM_PERIOD 1000 //PWM.λUS +#define PWM_MIN 8 //Сֵɵ +static void PWM_init(void) +{ + // 1ms ڳʼ͵ƽ1000 + hal_pwm_out_init(); + hal_pwm_out_config_all(PWMO_CTRL_LOW, PWMO_CTRL_HIGH, 0, PWM_PERIOD, PWM_PERIOD); +} + +static uint16_t read_bl_data =0; +static uint16_t read_bl_data_bak =0; +void PWM_Task(void) +{ + uint16_t pwm_h; + uint8_t reg51_val_l, reg51_val_h; + +#ifdef USE_FOR_SAMSUNG_NOTE20 +// s20: read_bl_data = 1~FD +#if 0 // NOTE10ий绰Ϩ + if(Flag_blacklight_EN) + { + read_bl_data_bak =0; + hal_pwm_out_sync_thr(PWM_PERIOD+1,0); + return; + } +#endif + + if(read_bl_data !=read_bl_data_bak) + { + read_bl_data_bak =read_bl_data; +// pwm_h = read_bl_data ; +// +// if(pwm_h >8; + + hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, reg51_val_h, reg51_val_l); //0FFF + read_bl_data_bak =read_bl_data; + +// TAU_LOGD("read_bl_data[%x], pwm_h[%x]", read_bl_data, pwm_h); + //TAU_LOGD("read_bl_data=0x%0.4X", read_bl_data); + } +#endif + +} +#endif + + +/* B1ص g_cus_rx_dcs_execute_table Ϊ첽ִУCAͬ*/ +uint16_t value_reg_b1 =0; +uint16_t value_reg_ca =0; +//static uint32_t value_reg_b5 =0; +static uint32_t value_reg_df =0; +static uint8_t value_blue =0; +static uint8_t blue_flag =0; +#if 1 // +#define BLUE_MAX 0xF0 //ֵ +#define BLUE_MIN 0x86 //Сֵ +#define BLUE_STEP 10 //ȼ-1 +#endif + +#if 1//def USE_FOR_SAMSUNG_NOTE20 +// еĻ巢͵ָB1CAȺ˳һڵ3жϡB1ȷĶ +static uint8_t flag_b1 =0; +static uint8_t flag_ca =0; + + +uint16_t value_reg_ca_bak =0; +uint16_t value_reg_b1_bak =0; +//#define USE_BL_ADJ6 //֮ǰS20ⷽʽ +#define USE_BL_ADJ7 //ĹS20ⷽʽ +#endif + +#if 1 // +void translate_data(void) +{ +uint16_t temp_in_max,temp_in_min; // Сֵ +uint16_t temp_out_max,temp_out_min; // Сֵ + +#ifdef ADD_PWM_OUTPUT_FOR_BL + if(value_reg_b1 <0x100) + { + // value_reg_b1 =0x14 ~ 0xF4Ӧ255 ~ 236(ǵ⼶Ϊ256) + temp_in_max = 0xF4; + temp_in_min= 0x14; + temp_out_max = 255; + temp_out_min= 236; + + if (value_reg_b1 <=temp_in_min) + read_bl_data =temp_out_max; + else if (value_reg_b1 >=temp_in_max) + read_bl_data =temp_out_min; + else + read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); + } + else if(value_reg_b1 <0x180) + { + switch(value_reg_ca) + { + case 0xFB: + case 0xED: + temp_in_max = 0x123; + temp_in_min= 0x101; + temp_out_max = 235; + temp_out_min= 232; + if (value_reg_b1 <=temp_in_min) + read_bl_data =temp_out_max; + else if (value_reg_b1 >=temp_in_max) + read_bl_data =temp_out_min; + else + read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); + break; + + case 0xFA: + case 0xE5: + temp_in_max = 0x123; + temp_in_min= 0x103; + temp_out_max = 231; + temp_out_min= 227; + if (value_reg_b1 <=temp_in_min) + read_bl_data =temp_out_max; + else if (value_reg_b1 >=temp_in_max) + read_bl_data =temp_out_min; + else + read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); + break; + + case 0xF7: + case 0xE1: + temp_in_max = 0x156; + temp_in_min= 0x103; + temp_out_max = 226; + temp_out_min= 221; + if (value_reg_b1 <=temp_in_min) + read_bl_data =temp_out_max; + else if (value_reg_b1 >=temp_in_max) + read_bl_data =temp_out_min; + else + read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); + break; + + case 0xF4: + case 0xD4: + temp_in_max = 0x160; + temp_in_min= 0x103; + temp_out_max = 220; + temp_out_min= 212; + if (value_reg_b1 <=temp_in_min) + read_bl_data =temp_out_max; + else if (value_reg_b1 >=temp_in_max) + read_bl_data =temp_out_min; + else + read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); + break; + + case 0xEF: + case 0xC6: + temp_in_max = 0x15F; + temp_in_min= 0x103; + temp_out_max = 211; + temp_out_min= 203; + if (value_reg_b1 <=temp_in_min) + read_bl_data =temp_out_max; + else if (value_reg_b1 >=temp_in_max) + read_bl_data =temp_out_min; + else + read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); + break; + + case 0xEC: + case 0xB7: + temp_in_max = 0x16E; + temp_in_min= 0x103; + temp_out_max = 202; + temp_out_min= 195; + if (value_reg_b1 <=temp_in_min) + read_bl_data =temp_out_max; + else if (value_reg_b1 >=temp_in_max) + read_bl_data =temp_out_min; + else + read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); + break; + + case 0xE7: + case 0xA9: + temp_in_max = 0x172; + temp_in_min= 0x103; + temp_out_max = 194; + temp_out_min= 185; + if (value_reg_b1 <=temp_in_min) + read_bl_data =temp_out_max; + else if (value_reg_b1 >=temp_in_max) + read_bl_data =temp_out_min; + else + read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); + break; + + case 0xE2: + case 0x9A: + temp_in_max = 0x171; + temp_in_min= 0x103; + temp_out_max = 183; + temp_out_min= 176; + if (value_reg_b1 <=temp_in_min) + read_bl_data =temp_out_max; + else if (value_reg_b1 >=temp_in_max) + read_bl_data =temp_out_min; + else + read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); + break; + + case 0xDE: + case 0x8A: + temp_in_max = 0x170; + temp_in_min= 0x103; + temp_out_max = 175; + temp_out_min= 167; + if (value_reg_b1 <=temp_in_min) + read_bl_data =temp_out_max; + else if (value_reg_b1 >=temp_in_max) + read_bl_data =temp_out_min; + else + read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); + break; + + default: + read_bl_data =166; + break; + } + } + else if(value_reg_b1 <0x340) + { + // value_reg_b1 =0x184 ~ 0x33AӦ165 ~ 137(ǵ⼶Ϊ256) + temp_in_max = 0x33A; + temp_in_min= 0x184; + temp_out_max = 165; + temp_out_min= 137; + + if (value_reg_b1 <=temp_in_min) + read_bl_data =temp_out_max; + else if (value_reg_b1 >=temp_in_max) + read_bl_data =temp_out_min; + else + read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); + } + else if(value_reg_b1 <0x39A) + { + switch(value_reg_ca) + { + case 0xDB: + case 0x86: + temp_in_max = 0x393; + temp_in_min= 0x348; + temp_out_max = 136; + temp_out_min= 130; + if (value_reg_b1 <=temp_in_min) + read_bl_data =temp_out_max; + else if (value_reg_b1 >=temp_in_max) + read_bl_data =temp_out_min; + else + read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); + break; + + case 0xD7: + case 0x77: + if(value_reg_b1 ==0x34A) + read_bl_data = 129; + else + read_bl_data = 128; + break; + + case 0xD4: + case 0x69: + if(value_reg_b1 ==0x34A) + read_bl_data = 127; + else + read_bl_data = 126; + break; + + case 0xCF: + case 0x60: + if(value_reg_b1 ==0x34A) + read_bl_data = 125; + else + read_bl_data = 124; + break; + + case 0xCC: + case 0x59: + if(value_reg_b1 ==0x34A) + read_bl_data = 123; + else + read_bl_data = 122; + break; + + case 0xC9: + case 0x4F: + if(value_reg_b1 ==0x34A) + read_bl_data = 121; + else + read_bl_data = 120; + break; + + case 0xC5: + case 0x46: + if(value_reg_b1 ==0x34A) + read_bl_data = 119; + else + read_bl_data = 118; + break; + + case 0xC2: + case 0x3F: + if(value_reg_b1 ==0x34A) + read_bl_data = 117; + else + read_bl_data = 116; + break; + + case 0xBD: + case 0x34: + if(value_reg_b1 ==0x34A) + read_bl_data = 115; + else + read_bl_data = 114; + break; + + case 0xB9: + case 0x2C: + if(value_reg_b1 ==0x34A) + read_bl_data = 113; + else + read_bl_data = 112; + break; + + case 0xB5: + case 0x22: + if(value_reg_b1 ==0x34A) + read_bl_data = 111; + else + read_bl_data = 110; + break; + + case 0xB2: + case 0x1E: + if(value_reg_b1 ==0x34A) + read_bl_data = 109; + else + read_bl_data = 108; + break; + + case 0xB0: + case 0x15: + if(value_reg_b1 ==0x34A) + read_bl_data = 107; + else + read_bl_data = 106; + break; + + case 0xAC: + case 0x0D: + if(value_reg_b1 ==0x34A) + read_bl_data = 105; + else + read_bl_data = 104; + break; + + case 0xAA: + case 0x09: + if(value_reg_b1 ==0x34A) + read_bl_data = 103; + else + read_bl_data = 102; + break; + + case 0xA5: + case 0x05: + if(value_reg_b1 ==0x34A) + read_bl_data = 101; + else + read_bl_data = 100; + break; + + default: + if(value_reg_b1 ==0x34A) + read_bl_data = 99; + else + read_bl_data = 98; + break; + } + + } +#if 0// 򲹶ʱ绰Ϩ󱳹ⰵ + else if(value_reg_b1 ==0x8DC) + { + // value_reg_b1 =0x39A ~ 0x8DCӦ97~ 1(ǵ⼶Ϊ256) + temp_in_max = 0x8DC; + temp_in_min= 0x39A; + temp_out_max = 97; + temp_out_min= 1; + + if (value_reg_b1 <=temp_in_min) + read_bl_data =temp_out_max; + else if (value_reg_b1 >=temp_in_max) + read_bl_data =temp_out_min; + else + read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); + } +#endif + else //if(value_reg_b1 <0x8DC) + { + // value_reg_b1 =0x39A ~ 0x8DCӦ97~ 1(ǵ⼶Ϊ256) + temp_in_max = 0x8DC; + temp_in_min= 0x39A; + temp_out_max = 97; + temp_out_min= 1; + + if (value_reg_b1 <=temp_in_min) + read_bl_data =temp_out_max; + else if (value_reg_b1 >=temp_in_max) + read_bl_data =temp_out_min; + else + read_bl_data = temp_out_max-(value_reg_b1-temp_in_min)*(temp_out_max-temp_out_min)/(temp_in_max-temp_in_min); + } + +#endif + +} + + +volatile static uint8_t flag_te =0; +#define SYNC_LINE 2000 +static bool set_soft_tear_mode() +{ + if(flag_te == 1){ + hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LINE, TE_SOFT_90HZ_MODE); + }else{ + hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LINE, TE_HW_MODE); + } + TAU_LOGD("tear_mode %d",flag_te); + return true; +} +static bool ap_get_dcs(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + uint16_t value_dcs_te =0; + value_dcs_te = dcs_packet->packet_param[0]; ////80=90hz 00=60hz + switch(value_dcs_te) + { + case 0x80: + flag_te = 1; + break; + case 0x00: + flag_te = 0; + break; + + default: + flag_te = 1; + } + set_soft_tear_mode(); + //value_dcs_te1 = dcs_packet->packet_param[1]; + // TAU_LOGD("TE[%4x]", value_dcs_te ); + //TAU_LOGD("TE[%4x] %d \n", flag_te,panel_display_done); + return true; +} + +static bool set_tear_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + if(panel_display_done == false){ + //hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + hal_dsi_rx_ctrl_gen_a_tear_signal(g_rx_ctrl_handle); + } + set_soft_tear_mode(); + TAU_LOGD("set tear on %d",panel_display_done); + return true; +} + +static bool ap_set_backlight(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + value_reg_b1 = (dcs_packet->packet_param[0] << 8) + dcs_packet->packet_param[1]; + TAU_LOGD("B1[%x] Len[%d]\n", value_reg_b1, dcs_packet->param_length); + + if ((flag_b1 <3) &&(flag_ca <3)) + { + flag_b1++; + } + if (flag_b1 ==3) + return true; + +// printf("B1[%4x],CA[%x] [%d]!\n", value_reg_b1, value_reg_ca, read_bl_data); + translate_data(); + return true; +} +#endif + +static bool ap_get_reg_ca(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + value_reg_ca = (dcs_packet->packet_param[1] << 8)+ dcs_packet->packet_param[2]; + TAU_LOGD("CA[%x] Len[%d]\n", value_reg_ca, dcs_packet->param_length); + + if ((flag_b1 <3) &&(flag_ca <3)) + { + flag_ca++; + } + if (flag_ca ==3) + return true; + +// printf("B1[%4x],CA[%x] [%d]!!\n", value_reg_b1, value_reg_ca, read_bl_data); + translate_data(); + return true; +} + +static bool ap_set_backlight_51(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + uint16_t rd_51_val; //0x0003~0x03FF[1020](0x66֮䣬0x1C5~15B) => (0x6F~0x7FF)[1936] + + rd_51_val = dcs_packet->packet_param[0]; + rd_51_val = (rd_51_val<<8); + rd_51_val |= dcs_packet->packet_param[1]; + +// TAU_LOGD("51[%04X]", rd_51_val); + + rd_51_val = (rd_51_val-0x03)*1936/1020+0x6F; + if (rd_51_val>0x15B && rd_51_val < 0x1C5) + rd_51_val = 0x15B; + + if (g_power_on_flag || g_en_adj_bl){ + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, rd_51_val>>8, rd_51_val&0x00FF); +// TAU_LOGD("51[%04X--1]", rd_51_val); + } + else{ + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x00, 0x01); +// TAU_LOGD("51[%04X--0]", rd_51_val); + } + g_en_adj_bl = true; +} + +#if 0 +static bool ap_get_reg_b5(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + value_reg_b5 = (dcs_packet->packet_param[3] << 8) + dcs_packet->packet_param[2]; + TAU_LOGD("CA[%4x],B1[%4x],B5[%4x]", value_reg_ca,value_reg_b1,value_reg_b5); + + return true; +} +#endif + +#ifdef ADD_PANEL_DISPLAY_MODE +uint8_t panel_mode =1; // DFĴ100:ۿ,01:۹,11:3(ӰԺ/Ƭ/.Ŀǰû) +uint16_t panel_r,panel_g,panel_b; // ¼RGBֵ + +#ifdef USE_FOR_SUMSUNG_S9PLUS +#define RATIO_VALUE 2 //Żϵ +#else +#define RATIO_VALUE 2 //Żϵ +#endif + +#endif + +static bool ap_get_reg_df(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + ccm_coef_t ccm; + ccm.coef_c00 = 255; + ccm.coef_c01 = 0; + ccm.coef_c02 = 0; + ccm.coef_c10 = 0; + ccm.coef_c11 = 255; + ccm.coef_c12 = 0; + ccm.coef_c20 = 0; + ccm.coef_c21 = 0; + ccm.coef_c22 = 255; + +#ifdef ADD_PANEL_DISPLAY_MODE + value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; + panel_mode = dcs_packet->packet_param[0]; + panel_r =dcs_packet->packet_param[49]; + panel_g =dcs_packet->packet_param[51]; + panel_b =dcs_packet->packet_param[53]; +// TAU_LOGD("value_reg_df[%4x],panel_mode[%4x],panel_r[%4x],panel_g[%4x],panel_b[%4x]", value_reg_df,panel_mode,panel_r,panel_g,panel_b); + + if (panel_mode ==00) + { + //ģʽ + + #ifdef USE_FOR_S10_BLUE_MODE + //panel_r =256-RATIO_VALUE*(0xFF-panel_r); + //panel_g =256-RATIO_VALUE*(0xFF-panel_g); + //panel_b =256-RATIO_VALUE*(0xFF-panel_b); +// hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); + ccm.coef_c00 = panel_r; + ccm.coef_c11 = panel_g; + ccm.coef_c22 = panel_b; + hal_dsi_tx_ctrl_set_ccm(ccm); + + #else + + value_reg_df =value_reg_df&0xFF; + switch(value_reg_df) + { + case 0xC1: + case 0xC3: + value_blue = BLUE_MIN; + break; + + case 0xCF: + case 0xD0: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; + break; + + case 0xD8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; + break; + + case 0xDE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; + break; + + case 0xE4: + case 0xE5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; + break; + + case 0xE9: + case 0xEA: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; + break; + + case 0xED: + case 0xEE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; + break; + + case 0xF1: + case 0xF2: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; + break; + + case 0xF4: + case 0xF5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; + break; + + case 0xF7: + case 0xF8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; + break; + + case 0xFA: + value_blue = BLUE_MAX; + break; + + default: + case 0xFF: + value_blue = 0; + break; + + } + hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256,256,256); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + + #endif + + } + else + { + #ifndef USE_FOR_S10_BLUE_MODE + value_blue =0; + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); //ģʽs8+/s9+ + #endif + + //һ㣬ЧԡҪݿͻҪϸ + + panel_r =256-RATIO_VALUE*(0xFF-panel_r); + panel_g =256-RATIO_VALUE*(0xFF-panel_g); + panel_b =256-RATIO_VALUE*(0xFF-panel_b); +// hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); + + ccm.coef_c00 = panel_r; + ccm.coef_c11 = panel_g; + ccm.coef_c22 = panel_b; + hal_dsi_tx_ctrl_set_ccm(ccm); + } + + #ifndef USE_FOR_S10_BLUE_MODE + if (blue_flag==0) + { + blue_flag =1; + delayMs(20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + } + #endif + +#else + value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; + + value_reg_df =value_reg_df&0xFF; + switch(value_reg_df) + { + case 0xC1: + case 0xC3: + value_blue = BLUE_MIN; + break; + + case 0xCF: + case 0xD0: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; + break; + + case 0xD8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; + break; + + case 0xDE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; + break; + + case 0xE4: + case 0xE5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; + break; + + case 0xE9: + case 0xEA: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; + break; + + case 0xED: + case 0xEE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; + break; + + case 0xF1: + case 0xF2: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; + break; + + case 0xF4: + case 0xF5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; + break; + + case 0xF7: + case 0xF8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; + break; + + case 0xFA: + value_blue = BLUE_MAX; + break; + + default: + case 0xFF: + value_blue = 0; + break; + + } + + TAU_LOGD("df[%4x]", value_reg_df); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + if (blue_flag==0) + { + blue_flag =1; + delayMs(20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + } +#endif + + return true; +} + +#if ADD_TP_CALIBRATION +static bool ap_set_tp_calibration_04(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + if( (dcs_packet->packet_param[0] == 0x01) && (dcs_packet->packet_param[1] == 0x01) && (dcs_packet->packet_param[1] == 0x01) ) + { + g_calibration_flag = true; + } + return true; +} +#endif + + +/* ƻDCS command */ +static const hal_dcs_execute_entry_t g_cus_rx_dcs_execute_table[] = +{ + {DCS_SET_DISPLAY_ON, ap_set_display_on, true}, + {DCS_SET_DISPLAY_OFF, ap_set_display_off, true}, + {0x35, set_tear_on, true}, + {0xDF, ap_get_reg_df, false}, // + {0xCA, ap_get_reg_ca, false}, //⡣ҪB1ܵ +// {0xB1, ap_set_backlight, false}, + {0x51, ap_set_backlight_51, false}, + +#if ADD_TP_CALIBRATION +// TP calibration + {0x04, ap_set_tp_calibration_04, true}, +#endif + {DCS_ENTER_SLEEP_MODE, ap_set_enter_sleep_mode, true}, + {DCS_EXIT_SLEEP_MODE, ap_set_exit_sleep_mode, true}, + {0, NULL, false} //{0,NULL,false} һ̶ԱΪtableβжϱ׼ +}; + + +static void tx_panel_reset(void) +{ + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); + delayMs(10); //10ms + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW); + delayMs(10); //10ms + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); + delayMs(10); +} + +#if PANEL_INIT_CODE_ARRAY +static void send_panel_init_code(uint32_t size, uint8_t * data) +{ + uint32_t data_offeset = 0; + uint8_t data_type; + uint8_t vc; + uint8_t data_size; + uint8_t * p_data; + + while(data_offeset < size) + { + data_type = data[data_offeset]; + vc = data[data_offeset + 1]; + data_size = data[data_offeset + 2]; + p_data = &data[data_offeset + 3]; + hal_dsi_tx_ctrl_write_array_cmd(data_type, vc, data_size, p_data); + data_offeset = data_offeset + data_size + 3; + delayUs(50); + } +} + +const uint8_t panel_init_code[] = { + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 9, 0xBA,0x02,0x79,0x00,0x14,0x03,0x9C,0x00,0x01, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 9, 0xBA,0x01,0xAF,0x00,0x14,0x00,0x1C,0x00,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 8, 0xBA,0x01,0x66,0x00,0x14,0x00,0x1C,0x00, + 0x39, 0, 9, 0xBB,0x02,0x79,0x00,0x14,0x03,0x9C,0x00,0x21, + 0x39, 0, 2, 0xB5,0x84, + 0x39, 0, 2, 0x6F,0x06, + 0x39, 0, 4, 0xB5,0x2B,0x0C,0x33, + 0x39, 0, 2, 0x6F,0x0B, + 0x39, 0, 4, 0xB5,0x2B,0x23,0x33, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 6, 0xB5,0x0C,0x0C,0x0C,0x0C,0x0C, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 2, 0xB6,0x19, + 0x39, 0, 19, 0xB7,0x99,0x99,0x99,0x99,0x99,0x99,0x87,0x65,0x43,0x32,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x13, + 0x39, 0, 13, 0xB7,0x00,0x00,0x01,0x13,0x78,0x89,0x9A,0xAB,0xBC,0xCD,0xDE,0xEF, + 0x39, 0, 2, 0x6F,0x1F, + 0x39, 0, 25, 0xB7,0x08,0x31,0x66,0x8F,0xF5,0xC1,0xC2,0x33,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0xFF, + 0x39, 0, 3, 0xB2,0x98,0x60, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 2, 0xB2,0x40, + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 9, 0xB2,0x20,0x20,0x21,0xC2,0x21,0xC2,0x2F,0xFF, + 0x39, 0, 13, 0xB3,0x00,0x08,0x00,0x1C,0x00,0x1C,0x00,0x3C,0x00,0x3C,0x00,0x70, + 0x39, 0, 2, 0x6F,0x0C, + 0x39, 0, 13, 0xB3,0x00,0x70,0x00,0xC8,0x00,0xC8,0x01,0x48,0x01,0x48,0x01,0xAD, + 0x39, 0, 2, 0x6F,0x18, + 0x39, 0, 13, 0xB3,0x01,0xAD,0x01,0xC2,0x01,0xC2,0x01,0xC2,0x07,0xFF,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 9, 0xB3,0x01,0x55,0x08,0xCC,0x08,0xCC,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x2C, + 0x39, 0, 15, 0xB3,0x09,0x90,0x08,0xDC,0x08,0x70,0x08,0x70,0x07,0xC8,0x07,0xC8,0x06,0xB8, + 0x39, 0, 2, 0x6F,0x3A, + 0x39, 0, 13, 0xB3,0x06,0xB8,0x04,0xE8,0x04,0xE8,0x02,0x48,0x02,0x48,0x00,0x38, + 0x39, 0, 2, 0x6F,0x46, + 0x39, 0, 13, 0xB3,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38, + 0x39, 0, 15, 0xB4,0x0D,0x10,0x0C,0x1C,0x0B,0x88,0x0B,0x88,0x0A,0xA0,0x0A,0xA0,0x09,0x28, + 0x39, 0, 2, 0x6F,0x0E, + 0x39, 0, 13, 0xB4,0x09,0x28,0x06,0xB0,0x06,0xB0,0x03,0x18,0x03,0x18,0x00,0x48, + 0x39, 0, 2, 0x6F,0x1A, + 0x39, 0, 13, 0xB4,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48, + 0x39, 0, 2, 0x6F,0x26, + 0x39, 0, 11, 0xB4,0x0D,0x10,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 15, 0xB4,0x09,0x90,0x08,0xDC,0x08,0x70,0x08,0x70,0x07,0xC8,0x07,0xC8,0x06,0xB8, + 0x39, 0, 2, 0x6F,0x3E, + 0x39, 0, 13, 0xB4,0x06,0xB8,0x04,0xE8,0x04,0xE8,0x02,0x48,0x02,0x48,0x00,0x38, + 0x39, 0, 2, 0x6F,0x4A, + 0x39, 0, 13, 0xB4,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38, + 0x39, 0, 2, 0x6F,0xAC, + 0x39, 0, 21, 0xB2,0x0F,0xFF,0x0F,0xFF,0x08,0x09,0x08,0x6C,0x08,0xCA,0x09,0x24,0x09,0x79,0x09,0xCB,0x0A,0x1A,0x0A,0x66, + 0x39, 0, 2, 0x6F,0xC0, + 0x39, 0, 21, 0xB2,0x0A,0xB0,0x0A,0xF7,0x0B,0x3D,0x0B,0x80,0x0B,0xC1,0x0C,0x01,0x0C,0x40,0x0C,0x7C,0x0C,0xB8,0x0C,0xF2, + 0x39, 0, 2, 0x6F,0xD4, + 0x39, 0, 21, 0xB2,0x0D,0x2B,0x0D,0x63,0x0D,0x9A,0x0D,0xCF,0x0E,0x04,0x0E,0x38,0x0E,0x6B,0x0E,0x9D,0x0E,0xCF,0x0E,0xFF, + 0x39, 0, 2, 0x6F,0xE8, + 0x39, 0, 11, 0xB2,0x0F,0x2F,0x0F,0x5E,0x0F,0x8D,0x0F,0xBB,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x52, + 0x39, 0, 21, 0xB3,0x01,0xC2,0x01,0xC3,0x01,0xF5,0x02,0x27,0x02,0x59,0x02,0x8B,0x02,0xBD,0x02,0xEF,0x03,0x21,0x03,0x53, + 0x39, 0, 2, 0x6F,0x66, + 0x39, 0, 21, 0xB3,0x03,0x84,0x03,0xB6,0x03,0xE8,0x04,0x1A,0x04,0x4C,0x04,0x7E,0x04,0xB0,0x04,0xE2,0x05,0x14,0x05,0x46, + 0x39, 0, 2, 0x6F,0x7A, + 0x39, 0, 21, 0xB3,0x05,0x78,0x05,0xA9,0x05,0xDB,0x06,0x0D,0x06,0x3F,0x06,0x71,0x06,0xA3,0x06,0xD5,0x07,0x07,0x07,0x39, + 0x39, 0, 2, 0x6F,0x8E, + 0x39, 0, 9, 0xB3,0x07,0x6B,0x07,0x9D,0x07,0xCE,0x07,0xFF, + 0x39, 0, 3, 0xB9,0x00,0x96, + 0x39, 0, 3, 0xBD,0x04,0xB0, + 0x39, 0, 4, 0xC0,0x76,0xF3,0xC1, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 2, 0xC0,0x40, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 3, 0xC0,0x20,0x20, + 0x39, 0, 2, 0x6F,0x02, + 0x39, 0, 7, 0xC1,0x24,0x86,0x00,0x57,0x00,0x45, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 3, 0xC1,0x00,0x86, + 0x39, 0, 2, 0xC5,0x05, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 2, 0xC3,0x00, + 0x39, 0, 15, 0xC6,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55, + 0x39, 0, 2, 0xCA,0x12, + 0x39, 0, 2, 0xB9,0x00, + 0x39, 0, 5, 0xBE,0x0E,0x0B,0x14,0x13, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 2, 0xBE,0x8A, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 2, 0x6F,0x2A, + 0x39, 0, 2, 0xD9,0x43, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x01, + 0x39, 0, 11, 0xB5,0x00,0xB0,0x00,0x98,0x00,0x98,0x00,0xB0,0x00,0x98, + 0x39, 0, 11, 0xB6,0x01,0x38,0x00,0xD0,0x00,0xD0,0x01,0x38,0x00,0xD0, + 0x39, 0, 13, 0xC2,0x00,0xB0,0x01,0x38,0x00,0xB0,0x01,0x38,0x00,0xB0,0x01,0x38, + 0x39, 0, 3, 0xB0,0x04,0x04, + 0x39, 0, 3, 0xB3,0x13,0x13, + 0x39, 0, 7, 0xB7,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B, + 0x39, 0, 3, 0xB1,0x08,0x08, + 0x39, 0, 3, 0xB4,0x13,0x13, + 0x39, 0, 8, 0xB8,0x46,0x46,0x46,0x46,0x46,0x46,0x46, + 0x39, 0, 29, 0xB9,0x00,0x1F,0x00,0x00,0x00,0x1F,0x00,0x00,0x1F,0x00,0x00,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 6, 0xBB,0x03,0x94,0x00,0x19,0x3C, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 2, 0x6F,0x18, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 2, 0x6F,0x2B, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 2, 0x6F,0x3E, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 5, 0xBA,0x10,0x10,0x10,0x10, + 0x39, 0, 3, 0xC4,0x80,0x03, + 0x39, 0, 2, 0xC7,0x01, + 0x39, 0, 3, 0xCD,0x05,0x81, + 0x39, 0, 2, 0xCF,0x1D, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 5, 0xCE,0x00,0x01,0x00,0x00, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 2, 0xD2,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 2, 0xD8,0x0C, + 0x39, 0, 2, 0xD9,0xAB, + 0x39, 0, 2, 0xD1,0x07, + 0x39, 0, 2, 0x6F,0x02, + 0x39, 0, 2, 0xD1,0x06, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 2, 0xD1,0x06, + 0x39, 0, 3, 0xD6,0x00,0x40, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 25, 0xB9,0x00,0x04,0x00,0x0C,0x00,0x14,0x00,0x1C,0x00,0x2C,0x00,0x3C,0x00,0x4C,0x00,0x5C,0x00,0x7C,0x00,0x9C,0x00,0xBC,0x00,0xDC, + 0x39, 0, 25, 0xBA,0x00,0xFC,0x01,0x3C,0x01,0x7C,0x01,0xBC,0x01,0xFC,0x02,0x7C,0x02,0xFC,0x03,0x7C,0x03,0xBC,0x03,0xDC,0x03,0xFC,0x03,0xFF, + 0x39, 0, 2, 0xBC,0x11, + 0x39, 0, 17, 0xBD,0x96,0x00,0x69,0x00,0x00,0x96,0x00,0x69,0xBB,0x44,0x44,0xBB,0xEE,0x11,0x11,0xEE, + 0x39, 0, 2, 0xC1,0x02, + 0x39, 0, 9, 0xC2,0x19,0x00,0x91,0x00,0x19,0x00,0x91,0x00, + 0x39, 0, 3, 0xC0,0x00,0x00, + 0x39, 0, 2, 0xCE,0x01, + 0x39, 0, 2, 0xCC,0x00, + +#if 1 + ///////////#1_gamma.txt/////////////// + + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0xCC,0x30, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0xBF,0x09, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0x3C,0x02,0x8A,0x02,0xD8,0x03,0x19,0x03,0x99,0x04,0x02,0x04,0x58,0x04,0xAC, + 0x39, 0, 19, 0xB1,0x05,0x37,0x05,0xA7,0x06,0x15,0x06,0x6F,0x06,0xC7,0x07,0x5D,0x07,0xE1,0x08,0x5E,0x08,0xD2, + 0x39, 0, 15, 0xB2,0x09,0xB8,0x0A,0x91,0x0B,0x68,0x0B,0xD7,0x0C,0x12,0x0C,0x4A,0x0C,0x4A, + 0x39, 0, 19, 0xB3,0x00,0x00,0x01,0xB0,0x02,0x29,0x02,0x75,0x02,0xB7,0x03,0x38,0x03,0x98,0x03,0xE4,0x04,0x2E, + 0x39, 0, 19, 0xB4,0x04,0xA4,0x05,0x05,0x05,0x65,0x05,0xB3,0x06,0x00,0x06,0x7F,0x06,0xF5,0x07,0x60,0x07,0xC1, + 0x39, 0, 15, 0xB5,0x08,0x80,0x09,0x33,0x09,0xE4,0x0A,0x38,0x0A,0x61,0x0A,0x8C,0x0A,0x8C, + 0x39, 0, 19, 0xB6,0x00,0x00,0x01,0xE6,0x02,0x6C,0x02,0xDC,0x03,0x31,0x03,0xD7,0x04,0x53,0x04,0xB4,0x05,0x14, + 0x39, 0, 19, 0xB7,0x05,0xA4,0x06,0x1A,0x06,0x8E,0x06,0xEF,0x07,0x4E,0x07,0xEC,0x08,0x7D,0x09,0x03,0x09,0x83, + 0x39, 0, 15, 0xB8,0x0A,0x7F,0x0B,0x79,0x0C,0x72,0x0C,0xFB,0x0D,0x42,0x0D,0x8E,0x0D,0x8E, + 0x39, 0, 2, 0xBF,0x08, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0x90,0x02,0xCC,0x03,0x08,0x03,0x40,0x03,0xAD,0x04,0x04,0x04,0x59,0x04,0x9D, + 0x39, 0, 19, 0xB1,0x05,0x22,0x05,0x8D,0x05,0xEB,0x06,0x47,0x06,0x96,0x07,0x1B,0x07,0x9F,0x08,0x0F,0x08,0x7D, + 0x39, 0, 15, 0xB2,0x09,0x42,0x0A,0x05,0x0A,0xBF,0x0B,0x1B,0x0B,0x4C,0x0B,0x7C,0x0B,0x7C, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0x26,0x02,0x6E,0x02,0x9B,0x02,0xD0,0x03,0x37,0x03,0x86,0x03,0xD4,0x04,0x0F, + 0x39, 0, 19, 0xB4,0x04,0x81,0x04,0xDF,0x05,0x2F,0x05,0x7E,0x05,0xC1,0x06,0x36,0x06,0xA9,0x07,0x0B,0x07,0x6C, + 0x39, 0, 15, 0xB5,0x08,0x10,0x08,0xB2,0x09,0x4E,0x09,0x9A,0x09,0xC0,0x09,0xE7,0x09,0xE7, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0x45,0x02,0xA6,0x02,0xF7,0x03,0x44,0x03,0xDB,0x04,0x45,0x04,0xAE,0x04,0xF9, + 0x39, 0, 19, 0xB7,0x05,0x8C,0x06,0x02,0x06,0x64,0x06,0xC4,0x07,0x16,0x07,0xA3,0x08,0x2F,0x08,0xAC,0x09,0x27, + 0x39, 0, 15, 0xB8,0x0A,0x00,0x0A,0xD8,0x0B,0xAD,0x0C,0x16,0x0C,0x4D,0x0C,0x87,0x0C,0x87, + 0x39, 0, 2, 0xBF,0x07, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0x76,0x02,0x92,0x02,0xAE,0x02,0xCA,0x03,0x06,0x03,0x45,0x03,0x7C,0x03,0xAF, + 0x39, 0, 19, 0xB1,0x04,0x0F,0x04,0x5F,0x04,0xAD,0x04,0xF1,0x05,0x2E,0x05,0x97,0x05,0xF8,0x06,0x4F,0x06,0x9E, + 0x39, 0, 15, 0xB2,0x07,0x2A,0x07,0xA6,0x08,0x19,0x08,0x4E,0x08,0x68,0x08,0x82,0x08,0x82, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0x24,0x02,0x42,0x02,0x60,0x02,0x73,0x02,0x9F,0x02,0xD4,0x03,0x08,0x03,0x3A, + 0x39, 0, 19, 0xB4,0x03,0x8E,0x03,0xD6,0x04,0x1C,0x04,0x55,0x04,0x8A,0x04,0xE8,0x05,0x3B,0x05,0x85,0x05,0xCC, + 0x39, 0, 15, 0xB5,0x06,0x43,0x06,0xAF,0x07,0x12,0x07,0x41,0x07,0x57,0x07,0x6C,0x07,0x6C, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0x39,0x02,0x64,0x02,0x8F,0x02,0xB3,0x03,0x04,0x03,0x58,0x03,0xA2,0x03,0xE4, + 0x39, 0, 19, 0xB7,0x04,0x57,0x04,0xB5,0x05,0x0D,0x05,0x55,0x05,0x97,0x06,0x0A,0x06,0x70,0x06,0xC9,0x07,0x21, + 0x39, 0, 15, 0xB8,0x07,0xB2,0x08,0x38,0x08,0xB3,0x08,0xED,0x09,0x0A,0x09,0x26,0x09,0x26, + 0x39, 0, 2, 0xBF,0x06, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0x6D,0x02,0x8B,0x02,0xA9,0x02,0xC7,0x03,0x03,0x03,0x3C,0x03,0x74,0x03,0xA8, + 0x39, 0, 19, 0xB1,0x04,0x05,0x04,0x53,0x04,0xA0,0x04,0xE3,0x05,0x1B,0x05,0x87,0x05,0xEB,0x06,0x40,0x06,0x94, + 0x39, 0, 15, 0xB2,0x07,0x1E,0x07,0x98,0x08,0x06,0x08,0x3D,0x08,0x57,0x08,0x72,0x08,0x72, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0x29,0x02,0x44,0x02,0x5F,0x02,0x70,0x02,0x9C,0x02,0xD0,0x03,0x03,0x03,0x36, + 0x39, 0, 19, 0xB4,0x03,0x87,0x03,0xCB,0x04,0x0D,0x04,0x48,0x04,0x79,0x04,0xD9,0x05,0x2F,0x05,0x78,0x05,0xBF, + 0x39, 0, 15, 0xB5,0x06,0x37,0x06,0xA1,0x07,0x02,0x07,0x31,0x07,0x47,0x07,0x5D,0x07,0x5D, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0x39,0x02,0x63,0x02,0x8D,0x02,0xB0,0x03,0x00,0x03,0x4D,0x03,0x98,0x03,0xDE, + 0x39, 0, 19, 0xB7,0x04,0x4D,0x04,0xA6,0x04,0xFE,0x05,0x45,0x05,0x82,0x05,0xF9,0x06,0x62,0x06,0xBC,0x07,0x15, + 0x39, 0, 15, 0xB8,0x07,0xA5,0x08,0x28,0x08,0x9F,0x08,0xDA,0x08,0xF6,0x09,0x11,0x09,0x11, + 0x39, 0, 2, 0xBF,0x05, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0x98,0x02,0xAE,0x02,0xC4,0x02,0xDA,0x03,0x10,0x03,0x44,0x03,0x77,0x03,0xA8, + 0x39, 0, 19, 0xB1,0x04,0x07,0x04,0x5C,0x04,0xA5,0x04,0xE6,0x05,0x1B,0x05,0x81,0x05,0xE5,0x06,0x36,0x06,0x86, + 0x39, 0, 15, 0xB2,0x07,0x12,0x07,0x89,0x07,0xF7,0x08,0x2D,0x08,0x48,0x08,0x60,0x08,0x60, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0x41,0x02,0x59,0x02,0x71,0x02,0x80,0x02,0xA7,0x02,0xD6,0x03,0x03,0x03,0x30, + 0x39, 0, 19, 0xB4,0x03,0x87,0x03,0xD2,0x04,0x11,0x04,0x4B,0x04,0x7D,0x04,0xD5,0x05,0x2B,0x05,0x72,0x05,0xB7, + 0x39, 0, 15, 0xB5,0x06,0x2F,0x06,0x98,0x06,0xF7,0x07,0x25,0x07,0x3C,0x07,0x51,0x07,0x51, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0x54,0x02,0x79,0x02,0x9E,0x02,0xBD,0x03,0x06,0x03,0x4E,0x03,0x94,0x03,0xD2, + 0x39, 0, 19, 0xB7,0x04,0x4B,0x04,0xAD,0x04,0xFF,0x05,0x48,0x05,0x84,0x05,0xF1,0x06,0x5D,0x06,0xB4,0x07,0x09, + 0x39, 0, 15, 0xB8,0x07,0x9C,0x08,0x1D,0x08,0x92,0x08,0xCB,0x08,0xE7,0x09,0x02,0x09,0x02, + 0x39, 0, 2, 0xBF,0x04, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0xA2,0x02,0xB9,0x02,0xD0,0x02,0xE7,0x03,0x18,0x03,0x4B,0x03,0x7D,0x03,0xB2, + 0x39, 0, 19, 0xB1,0x04,0x03,0x04,0x53,0x04,0x95,0x04,0xD6,0x05,0x11,0x05,0x7A,0x05,0xDC,0x06,0x2D,0x06,0x7D, + 0x39, 0, 15, 0xB2,0x07,0x01,0x07,0x77,0x07,0xE4,0x08,0x18,0x08,0x31,0x08,0x49,0x08,0x49, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0x65,0x02,0x79,0x02,0x8D,0x02,0x9A,0x02,0xC0,0x02,0xEC,0x03,0x16,0x03,0x45, + 0x39, 0, 19, 0xB4,0x03,0x90,0x03,0xDA,0x04,0x15,0x04,0x4E,0x04,0x83,0x04,0xDF,0x05,0x31,0x05,0x77,0x05,0xBB, + 0x39, 0, 15, 0xB5,0x06,0x31,0x06,0x98,0x06,0xF7,0x07,0x23,0x07,0x38,0x07,0x4C,0x07,0x4C, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0x7A,0x02,0x96,0x02,0xB2,0x02,0xCA,0x03,0x10,0x03,0x55,0x03,0x99,0x03,0xDC, + 0x39, 0, 19, 0xB7,0x04,0x40,0x04,0xA2,0x04,0xEE,0x05,0x38,0x05,0x79,0x05,0xEE,0x06,0x54,0x06,0xA9,0x06,0xFC, + 0x39, 0, 15, 0xB8,0x07,0x8A,0x08,0x09,0x08,0x80,0x08,0xB8,0x08,0xD2,0x08,0xEC,0x08,0xEC, + 0x39, 0, 2, 0xBF,0x03, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0xEA,0x02,0xFB,0x03,0x0C,0x03,0x1D,0x03,0x40,0x03,0x6C,0x03,0x96,0x03,0xBE, + 0x39, 0, 19, 0xB1,0x04,0x0D,0x04,0x52,0x04,0x91,0x04,0xCF,0x05,0x06,0x05,0x6A,0x05,0xC3,0x06,0x13,0x06,0x62, + 0x39, 0, 15, 0xB2,0x06,0xE5,0x07,0x59,0x07,0xC0,0x07,0xF2,0x08,0x0A,0x08,0x21,0x08,0x21, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0x95,0x02,0xAA,0x02,0xBF,0x02,0xD4,0x02,0xEF,0x03,0x11,0x03,0x34,0x03,0x55, + 0x39, 0, 19, 0xB4,0x03,0x9E,0x03,0xDD,0x04,0x15,0x04,0x4B,0x04,0x7D,0x04,0xD5,0x05,0x21,0x05,0x66,0x05,0xAA, + 0x39, 0, 15, 0xB5,0x06,0x19,0x06,0x7D,0x06,0xD7,0x07,0x03,0x07,0x17,0x07,0x2B,0x07,0x2B, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0xA4,0x02,0xC2,0x02,0xE0,0x02,0xFE,0x03,0x31,0x03,0x6C,0x03,0xA3,0x03,0xD8, + 0x39, 0, 19, 0xB7,0x04,0x40,0x04,0x95,0x04,0xE0,0x05,0x29,0x05,0x69,0x05,0xD8,0x06,0x38,0x06,0x8E,0x06,0xE2, + 0x39, 0, 15, 0xB8,0x07,0x6D,0x07,0xE8,0x08,0x58,0x08,0x8E,0x08,0xA8,0x08,0xC1,0x08,0xC1, + 0x39, 0, 2, 0xBF,0x02, + 0x39, 0, 19, 0xB0,0x00,0x00,0x03,0x24,0x03,0x34,0x03,0x44,0x03,0x54,0x03,0x74,0x03,0x94,0x03,0xB4,0x03,0xD3, + 0x39, 0, 19, 0xB1,0x04,0x16,0x04,0x53,0x04,0x8B,0x04,0xC1,0x04,0xF2,0x05,0x51,0x05,0xA7,0x05,0xF2,0x06,0x3E, + 0x39, 0, 15, 0xB2,0x06,0xB9,0x07,0x26,0x07,0x8E,0x07,0xBE,0x07,0xD4,0x07,0xEA,0x07,0xEA, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0xB7,0x02,0xCD,0x02,0xE3,0x02,0xF9,0x03,0x25,0x03,0x41,0x03,0x5B,0x03,0x74, + 0x39, 0, 19, 0xB4,0x03,0xAD,0x03,0xE8,0x04,0x19,0x04,0x49,0x04,0x73,0x04,0xC4,0x05,0x11,0x05,0x50,0x05,0x8C, + 0x39, 0, 15, 0xB5,0x05,0xF9,0x06,0x57,0x06,0xAE,0x06,0xD7,0x06,0xEA,0x06,0xFD,0x06,0xFD, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0xC9,0x02,0xE5,0x03,0x01,0x03,0x1D,0x03,0x56,0x03,0x86,0x03,0xB3,0x03,0xDE, + 0x39, 0, 19, 0xB7,0x04,0x37,0x04,0x8A,0x04,0xCF,0x05,0x12,0x05,0x4A,0x05,0xB8,0x06,0x1A,0x06,0x6B,0x06,0xB9, + 0x39, 0, 15, 0xB8,0x07,0x3F,0x07,0xB6,0x08,0x23,0x08,0x56,0x08,0x6E,0x08,0x86,0x08,0x86, + 0x39, 0, 2, 0xBF,0x01, + 0x39, 0, 19, 0xB0,0x00,0x00,0x03,0x6F,0x03,0x7A,0x03,0x85,0x03,0x90,0x03,0xA7,0x03,0xBE,0x03,0xD5,0x03,0xEE, + 0x39, 0, 19, 0xB1,0x04,0x1E,0x04,0x4F,0x04,0x7E,0x04,0xAD,0x04,0xD8,0x05,0x2A,0x05,0x71,0x05,0xB7,0x05,0xFA, + 0x39, 0, 15, 0xB2,0x06,0x70,0x06,0xDB,0x07,0x38,0x07,0x65,0x07,0x7B,0x07,0x8F,0x07,0x8F, + 0x39, 0, 19, 0xB3,0x00,0x00,0x03,0x20,0x03,0x2D,0x03,0x3A,0x03,0x47,0x03,0x62,0x03,0x7D,0x03,0x8E,0x03,0xA2, + 0x39, 0, 19, 0xB4,0x03,0xC7,0x03,0xEE,0x04,0x17,0x04,0x3E,0x04,0x64,0x04,0xAC,0x04,0xE9,0x05,0x24,0x05,0x5B, + 0x39, 0, 15, 0xB5,0x05,0xBD,0x06,0x17,0x06,0x66,0x06,0x8C,0x06,0x9F,0x06,0xB1,0x06,0xB1, + 0x39, 0, 19, 0xB6,0x00,0x00,0x03,0x2E,0x03,0x40,0x03,0x52,0x03,0x64,0x03,0x88,0x03,0xAC,0x03,0xCA,0x03,0xED, + 0x39, 0, 19, 0xB7,0x04,0x2F,0x04,0x6D,0x04,0xAD,0x04,0xE8,0x05,0x1D,0x05,0x83,0x05,0xD5,0x06,0x25,0x06,0x6F, + 0x39, 0, 15, 0xB8,0x06,0xF0,0x07,0x63,0x07,0xC5,0x07,0xF5,0x08,0x0D,0x08,0x23,0x08,0x23, + 0x39, 0, 2, 0xBF,0x00, + 0x39, 0, 19, 0xB0,0x00,0x00,0x03,0xBE,0x03,0xC4,0x03,0xCA,0x03,0xD0,0x03,0xDD,0x03,0xEA,0x03,0xF7,0x04,0x04, + 0x39, 0, 19, 0xB1,0x04,0x1F,0x04,0x3C,0x04,0x58,0x04,0x77,0x04,0x94,0x04,0xCD,0x05,0x03,0x05,0x37,0x05,0x69, + 0x39, 0, 15, 0xB2,0x05,0xC6,0x06,0x18,0x06,0x69,0x06,0x8F,0x06,0xA1,0x06,0xB5,0x06,0xB5, + 0x39, 0, 19, 0xB3,0x00,0x00,0x03,0x83,0x03,0x8A,0x03,0x91,0x03,0x98,0x03,0xA6,0x03,0xB4,0x03,0xC2,0x03,0xD0, + 0x39, 0, 19, 0xB4,0x03,0xE2,0x03,0xF8,0x04,0x0D,0x04,0x26,0x04,0x3C,0x04,0x6A,0x04,0x96,0x04,0xC1,0x04,0xEB, + 0x39, 0, 15, 0xB5,0x05,0x39,0x05,0x7D,0x05,0xBF,0x05,0xDF,0x05,0xED,0x05,0xFD,0x05,0xFD, + 0x39, 0, 19, 0xB6,0x00,0x00,0x03,0x81,0x03,0x8B,0x03,0x95,0x03,0x9F,0x03,0xB4,0x03,0xC9,0x03,0xDE,0x03,0xF3, + 0x39, 0, 19, 0xB7,0x04,0x16,0x04,0x3E,0x04,0x67,0x04,0x8F,0x04,0xB3,0x04,0xFE,0x05,0x43,0x05,0x83,0x05,0xC1, + 0x39, 0, 15, 0xB8,0x06,0x2F,0x06,0x8B,0x06,0xE5,0x07,0x0F,0x07,0x22,0x07,0x35,0x07,0x35, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0xBF,0x19, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0x26,0x02,0x64,0x02,0xA2,0x02,0xDB,0x03,0x4A,0x03,0xB1,0x04,0x04,0x04,0x55, + 0x39, 0, 19, 0xB1,0x04,0xD8,0x05,0x46,0x05,0xB3,0x06,0x0B,0x06,0x61,0x06,0xFC,0x07,0x7F,0x07,0xFB,0x08,0x6F, + 0x39, 0, 15, 0xB2,0x09,0x55,0x0A,0x31,0x0B,0x0B,0x0B,0x7E,0x0B,0xBA,0x0B,0xF3,0x0B,0xF3, + 0x39, 0, 19, 0xB3,0x00,0x00,0x01,0xC0,0x02,0x1B,0x02,0x54,0x02,0x89,0x02,0xF1,0x03,0x4D,0x03,0x94,0x03,0xDA, + 0x39, 0, 19, 0xB4,0x04,0x4F,0x04,0xAD,0x05,0x0A,0x05,0x56,0x05,0xA1,0x06,0x28,0x06,0x98,0x07,0x03,0x07,0x64, + 0x39, 0, 15, 0xB5,0x08,0x24,0x08,0xD7,0x09,0x88,0x09,0xE1,0x0A,0x0B,0x0A,0x35,0x0A,0x35, + 0x39, 0, 19, 0xB6,0x00,0x00,0x01,0xF3,0x02,0x57,0x02,0xAB,0x02,0xF5,0x03,0x86,0x04,0x00,0x04,0x5D,0x04,0xB8, + 0x39, 0, 19, 0xB7,0x05,0x4A,0x05,0xBD,0x06,0x2F,0x06,0x8D,0x06,0xE9,0x07,0x92,0x08,0x1B,0x08,0xA1,0x09,0x20, + 0x39, 0, 15, 0xB8,0x0A,0x1B,0x0B,0x1B,0x0C,0x1A,0x0C,0xA6,0x0C,0xF3,0x0D,0x44,0x0D,0x44, + 0x39, 0, 2, 0xBF,0x18, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0x97,0x02,0xC2,0x02,0xED,0x03,0x18,0x03,0x6C,0x03,0xBA,0x04,0x07,0x04,0x48, + 0x39, 0, 19, 0xB1,0x04,0xC7,0x05,0x31,0x05,0x8E,0x05,0xE9,0x06,0x37,0x06,0xBA,0x07,0x3B,0x07,0xAB,0x08,0x1A, + 0x39, 0, 15, 0xB2,0x08,0xE1,0x09,0xA6,0x0A,0x62,0x0A,0xBE,0x0A,0xED,0x0B,0x20,0x0B,0x20, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0x47,0x02,0x77,0x02,0x95,0x02,0xBA,0x03,0x00,0x03,0x43,0x03,0x84,0x03,0xBD, + 0x39, 0, 19, 0xB4,0x04,0x2B,0x04,0x87,0x04,0xD7,0x05,0x26,0x05,0x68,0x05,0xDA,0x06,0x4A,0x06,0xAB,0x07,0x0B, + 0x39, 0, 15, 0xB5,0x07,0xAF,0x08,0x52,0x08,0xEC,0x09,0x38,0x09,0x60,0x09,0x88,0x09,0x88, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0x60,0x02,0xA5,0x02,0xDF,0x03,0x1C,0x03,0x92,0x03,0xF2,0x04,0x51,0x04,0x9B, + 0x39, 0, 19, 0xB7,0x05,0x2C,0x05,0x9F,0x06,0x02,0x06,0x64,0x06,0xB7,0x07,0x44,0x07,0xCF,0x08,0x48,0x08,0xBF, + 0x39, 0, 15, 0xB8,0x09,0x9A,0x0A,0x74,0x0B,0x51,0x0B,0xBE,0x0B,0xF5,0x0C,0x30,0x0C,0x30, + 0x39, 0, 2, 0xBF,0x17, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0x8B,0x02,0x9B,0x02,0xAB,0x02,0xBB,0x02,0xE6,0x03,0x16,0x03,0x44,0x03,0x72, + 0x39, 0, 19, 0xB1,0x03,0xC0,0x04,0x0C,0x04,0x53,0x04,0x93,0x04,0xCC,0x05,0x36,0x05,0x97,0x05,0xEA,0x06,0x3A, + 0x39, 0, 15, 0xB2,0x06,0xC6,0x07,0x44,0x07,0xB6,0x07,0xE9,0x08,0x04,0x08,0x1E,0x08,0x1E, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0x3B,0x02,0x51,0x02,0x67,0x02,0x75,0x02,0x92,0x02,0xB8,0x02,0xDD,0x03,0x03, + 0x39, 0, 19, 0xB4,0x03,0x47,0x03,0x88,0x03,0xC4,0x03,0xFE,0x04,0x2E,0x04,0x8B,0x04,0xE0,0x05,0x2A,0x05,0x6C, + 0x39, 0, 15, 0xB5,0x05,0xE5,0x06,0x4C,0x06,0xB0,0x06,0xDF,0x06,0xF6,0x07,0x0C,0x07,0x0C, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0x55,0x02,0x73,0x02,0x91,0x02,0xAA,0x02,0xE3,0x03,0x27,0x03,0x65,0x03,0xA0, + 0x39, 0, 19, 0xB7,0x04,0x02,0x04,0x5C,0x04,0xAC,0x04,0xF5,0x05,0x34,0x05,0xA6,0x06,0x0F,0x06,0x69,0x06,0xBC, + 0x39, 0, 15, 0xB8,0x07,0x51,0x07,0xD4,0x08,0x4F,0x08,0x88,0x08,0xA6,0x08,0xC2,0x08,0xC2, + 0x39, 0, 2, 0xBF,0x16, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0x8E,0x02,0x9D,0x02,0xAC,0x02,0xBB,0x02,0xE4,0x03,0x11,0x03,0x3D,0x03,0x68, + 0x39, 0, 19, 0xB1,0x03,0xC1,0x04,0x08,0x04,0x4E,0x04,0x8D,0x04,0xC3,0x05,0x2D,0x05,0x8B,0x05,0xDC,0x06,0x2B, + 0x39, 0, 15, 0xB2,0x06,0xB5,0x07,0x31,0x07,0xA3,0x07,0xD8,0x07,0xF1,0x08,0x0C,0x08,0x0C, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0x3F,0x02,0x53,0x02,0x67,0x02,0x74,0x02,0x91,0x02,0xB5,0x02,0xD7,0x02,0xFB, + 0x39, 0, 19, 0xB4,0x03,0x46,0x03,0x84,0x03,0xC1,0x03,0xF8,0x04,0x27,0x04,0x81,0x04,0xD2,0x05,0x18,0x05,0x5D, + 0x39, 0, 15, 0xB5,0x05,0xD6,0x06,0x40,0x06,0xA3,0x06,0xD1,0x06,0xE6,0x06,0xFD,0x06,0xFD, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0x58,0x02,0x74,0x02,0x90,0x02,0xA8,0x02,0xE1,0x03,0x1F,0x03,0x5B,0x03,0x93, + 0x39, 0, 19, 0xB7,0x04,0x01,0x04,0x55,0x04,0xA7,0x04,0xEE,0x05,0x28,0x05,0x9A,0x05,0xFF,0x06,0x55,0x06,0xA9, + 0x39, 0, 15, 0xB8,0x07,0x3F,0x07,0xC2,0x08,0x3E,0x08,0x77,0x08,0x92,0x08,0xAF,0x08,0xAF, + 0x39, 0, 2, 0xBF,0x15, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0xA9,0x02,0xB8,0x02,0xC7,0x02,0xD6,0x02,0xF7,0x03,0x22,0x03,0x4C,0x03,0x73, + 0x39, 0, 19, 0xB1,0x03,0xBF,0x04,0x04,0x04,0x49,0x04,0x88,0x04,0xBF,0x05,0x22,0x05,0x83,0x05,0xD4,0x06,0x23, + 0x39, 0, 15, 0xB2,0x06,0xAE,0x07,0x28,0x07,0x94,0x07,0xC8,0x07,0xE4,0x07,0xFD,0x07,0xFD, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0x52,0x02,0x66,0x02,0x7A,0x02,0x87,0x02,0x9F,0x02,0xBF,0x02,0xDD,0x03,0x01, + 0x39, 0, 19, 0xB4,0x03,0x45,0x03,0x86,0x03,0xBF,0x03,0xF4,0x04,0x27,0x04,0x7C,0x04,0xD0,0x05,0x15,0x05,0x58, + 0x39, 0, 15, 0xB5,0x05,0xD1,0x06,0x38,0x06,0x97,0x06,0xC5,0x06,0xDB,0x06,0xF1,0x06,0xF1, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0x75,0x02,0x8F,0x02,0xA9,0x02,0xBF,0x02,0xEE,0x03,0x29,0x03,0x62,0x03,0x96, + 0x39, 0, 19, 0xB7,0x03,0xFC,0x04,0x54,0x04,0xA2,0x04,0xE6,0x05,0x26,0x05,0x90,0x05,0xF9,0x06,0x4F,0x06,0xA3, + 0x39, 0, 15, 0xB8,0x07,0x37,0x07,0xB9,0x08,0x2F,0x08,0x69,0x08,0x84,0x08,0x9F,0x08,0x9F, + 0x39, 0, 2, 0xBF,0x14, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0xBE,0x02,0xC9,0x02,0xD4,0x02,0xDF,0x03,0x00,0x03,0x25,0x03,0x49,0x03,0x6F, + 0x39, 0, 19, 0xB1,0x03,0xBA,0x04,0x04,0x04,0x44,0x04,0x82,0x04,0xBA,0x05,0x20,0x05,0x79,0x05,0xC9,0x06,0x18, + 0x39, 0, 15, 0xB2,0x06,0x9E,0x07,0x15,0x07,0x82,0x07,0xB6,0x07,0xCE,0x07,0xE5,0x07,0xE5, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0x6B,0x02,0x7E,0x02,0x91,0x02,0x9D,0x02,0xB5,0x02,0xD5,0x02,0xF3,0x03,0x10, + 0x39, 0, 19, 0xB4,0x03,0x52,0x03,0x93,0x03,0xCB,0x04,0x01,0x04,0x33,0x04,0x8A,0x04,0xD3,0x05,0x18,0x05,0x5B, + 0x39, 0, 15, 0xB5,0x05,0xCF,0x06,0x36,0x06,0x95,0x06,0xC1,0x06,0xD6,0x06,0xEA,0x06,0xEA, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0x8B,0x02,0xA3,0x02,0xBB,0x02,0xCF,0x02,0xFA,0x03,0x30,0x03,0x64,0x03,0x95, + 0x39, 0, 19, 0xB7,0x03,0xF3,0x04,0x50,0x04,0x99,0x04,0xE1,0x05,0x22,0x05,0x92,0x05,0xEF,0x06,0x43,0x06,0x95, + 0x39, 0, 15, 0xB8,0x07,0x25,0x07,0xA7,0x08,0x1E,0x08,0x56,0x08,0x70,0x08,0x89,0x08,0x89, + 0x39, 0, 2, 0xBF,0x13, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0xF5,0x03,0x01,0x03,0x0D,0x03,0x19,0x03,0x32,0x03,0x50,0x03,0x6F,0x03,0x8D, + 0x39, 0, 19, 0xB1,0x03,0xCC,0x04,0x0B,0x04,0x45,0x04,0x7D,0x04,0xB1,0x05,0x15,0x05,0x6A,0x05,0xB4,0x05,0xFD, + 0x39, 0, 15, 0xB2,0x06,0x82,0x06,0xF8,0x07,0x5F,0x07,0x91,0x07,0xA9,0x07,0xBF,0x07,0xBF, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0xA6,0x02,0xB7,0x02,0xC8,0x02,0xD9,0x02,0xEF,0x03,0x05,0x03,0x1F,0x03,0x38, + 0x39, 0, 19, 0xB4,0x03,0x6C,0x03,0xA1,0x03,0xD4,0x04,0x05,0x04,0x30,0x04,0x86,0x04,0xCF,0x05,0x10,0x05,0x4F, + 0x39, 0, 15, 0xB5,0x05,0xBF,0x06,0x20,0x06,0x7A,0x06,0xA5,0x06,0xB9,0x06,0xCC,0x06,0xCC, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0xC9,0x02,0xDE,0x02,0xF3,0x03,0x08,0x03,0x2C,0x03,0x55,0x03,0x81,0x03,0xAC, + 0x39, 0, 19, 0xB7,0x03,0xFD,0x04,0x4C,0x04,0x91,0x04,0xD5,0x05,0x10,0x05,0x80,0x05,0xDF,0x06,0x2F,0x06,0x7D, + 0x39, 0, 15, 0xB8,0x07,0x0C,0x07,0x8A,0x07,0xF9,0x08,0x2F,0x08,0x48,0x08,0x61,0x08,0x61, + 0x39, 0, 2, 0xBF,0x12, + 0x39, 0, 19, 0xB0,0x00,0x00,0x03,0x33,0x03,0x3E,0x03,0x49,0x03,0x54,0x03,0x6A,0x03,0x80,0x03,0x97,0x03,0xAD, + 0x39, 0, 19, 0xB1,0x03,0xE1,0x04,0x13,0x04,0x47,0x04,0x79,0x04,0xA6,0x04,0xFE,0x05,0x4E,0x05,0x99,0x05,0xDE, + 0x39, 0, 15, 0xB2,0x06,0x58,0x06,0xC7,0x07,0x2B,0x07,0x5B,0x07,0x71,0x07,0x88,0x07,0x88, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0xE6,0x02,0xF4,0x03,0x02,0x03,0x10,0x03,0x2C,0x03,0x3E,0x03,0x51,0x03,0x62, + 0x39, 0, 19, 0xB4,0x03,0x8D,0x03,0xB5,0x03,0xE1,0x04,0x0C,0x04,0x33,0x04,0x7D,0x04,0xBF,0x04,0xFD,0x05,0x37, + 0x39, 0, 15, 0xB5,0x05,0x9E,0x05,0xFB,0x06,0x50,0x06,0x79,0x06,0x8C,0x06,0xA0,0x06,0xA0, + 0x39, 0, 19, 0xB6,0x00,0x00,0x03,0x0C,0x03,0x1D,0x03,0x2E,0x03,0x3F,0x03,0x61,0x03,0x7E,0x03,0x9F,0x03,0xBE, + 0x39, 0, 19, 0xB7,0x04,0x05,0x04,0x44,0x04,0x85,0x04,0xC5,0x04,0xFA,0x05,0x62,0x05,0xBC,0x06,0x0F,0x06,0x5C, + 0x39, 0, 15, 0xB8,0x06,0xE0,0x07,0x57,0x07,0xC1,0x07,0xF4,0x08,0x0C,0x08,0x26,0x08,0x26, + 0x39, 0, 2, 0xBF,0x11, + 0x39, 0, 19, 0xB0,0x00,0x00,0x03,0x7E,0x03,0x86,0x03,0x8E,0x03,0x96,0x03,0xA7,0x03,0xB8,0x03,0xC9,0x03,0xDC, + 0x39, 0, 19, 0xB1,0x03,0xFE,0x04,0x24,0x04,0x4A,0x04,0x6F,0x04,0x96,0x04,0xE2,0x05,0x24,0x05,0x64,0x05,0xA2, + 0x39, 0, 15, 0xB2,0x06,0x12,0x06,0x78,0x06,0xD4,0x07,0x01,0x07,0x17,0x07,0x2B,0x07,0x2B, + 0x39, 0, 19, 0xB3,0x00,0x00,0x03,0x29,0x03,0x35,0x03,0x41,0x03,0x4D,0x03,0x65,0x03,0x7D,0x03,0x8C,0x03,0x9B, + 0x39, 0, 19, 0xB4,0x03,0xB7,0x03,0xD3,0x03,0xF2,0x04,0x14,0x04,0x34,0x04,0x72,0x04,0xA8,0x04,0xDD,0x05,0x10, + 0x39, 0, 15, 0xB5,0x05,0x6D,0x05,0xC0,0x06,0x0D,0x06,0x32,0x06,0x44,0x06,0x55,0x06,0x55, + 0x39, 0, 19, 0xB6,0x00,0x00,0x03,0x45,0x03,0x54,0x03,0x63,0x03,0x72,0x03,0x91,0x03,0xB0,0x03,0xCA,0x03,0xE3, + 0x39, 0, 19, 0xB7,0x04,0x13,0x04,0x45,0x04,0x78,0x04,0xAA,0x04,0xDA,0x05,0x37,0x05,0x85,0x05,0xD1,0x06,0x16, + 0x39, 0, 15, 0xB8,0x06,0x91,0x07,0x01,0x07,0x64,0x07,0x94,0x07,0xAB,0x07,0xC1,0x07,0xC1, + 0x39, 0, 2, 0xBF,0x10, + 0x39, 0, 19, 0xB0,0x00,0x00,0x03,0xE6,0x03,0xE9,0x03,0xEC,0x03,0xEF,0x03,0xF6,0x03,0xFD,0x04,0x04,0x04,0x0B, + 0x39, 0, 19, 0xB1,0x04,0x1A,0x04,0x2D,0x04,0x45,0x04,0x59,0x04,0x6E,0x04,0x9E,0x04,0xCC,0x04,0xF8,0x05,0x22, + 0x39, 0, 15, 0xB2,0x05,0x78,0x05,0xC5,0x06,0x11,0x06,0x36,0x06,0x47,0x06,0x56,0x06,0x56, + 0x39, 0, 19, 0xB3,0x00,0x00,0x03,0x8D,0x03,0x93,0x03,0x99,0x03,0x9F,0x03,0xAC,0x03,0xB9,0x03,0xC6,0x03,0xD3, + 0x39, 0, 19, 0xB4,0x03,0xE4,0x03,0xF5,0x04,0x06,0x04,0x17,0x04,0x28,0x04,0x4E,0x04,0x72,0x04,0x96,0x04,0xB9, + 0x39, 0, 15, 0xB5,0x04,0xFC,0x05,0x3A,0x05,0x77,0x05,0x94,0x05,0xA1,0x05,0xAF,0x05,0xAF, + 0x39, 0, 19, 0xB6,0x00,0x00,0x03,0xB3,0x03,0xBA,0x03,0xC1,0x03,0xC8,0x03,0xD7,0x03,0xE6,0x03,0xF5,0x04,0x04, + 0x39, 0, 19, 0xB7,0x04,0x1D,0x04,0x37,0x04,0x56,0x04,0x74,0x04,0x92,0x04,0xD1,0x05,0x0B,0x05,0x43,0x05,0x79, + 0x39, 0, 15, 0xB8,0x05,0xDD,0x06,0x35,0x06,0x8B,0x06,0xB3,0x06,0xC5,0x06,0xD9,0x06,0xD9, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0xBF,0x42, + 0x39, 0, 19, 0xB0,0x00,0x00,0x03,0xB0,0x03,0xDA,0x04,0x04,0x04,0x2E,0x04,0x77,0x04,0xB8,0x04,0xF8,0x05,0x33, + 0x39, 0, 19, 0xB1,0x05,0xA6,0x06,0x06,0x06,0x64,0x06,0xB6,0x06,0xFF,0x07,0x8D,0x08,0x03,0x08,0x69,0x08,0xCD, + 0x39, 0, 15, 0xB2,0x09,0x7A,0x0A,0x10,0x0A,0x94,0x0A,0xCF,0x0A,0xEE,0x0B,0x0C,0x0B,0x0C, + 0x39, 0, 19, 0xB3,0x00,0x00,0x03,0x06,0x03,0x2A,0x03,0x4E,0x03,0x65,0x03,0x97,0x03,0xDB,0x04,0x1E,0x04,0x5A, + 0x39, 0, 19, 0xB4,0x04,0xCF,0x05,0x25,0x05,0x79,0x05,0xC3,0x06,0x03,0x06,0x80,0x06,0xE1,0x07,0x3B,0x07,0x93, + 0x39, 0, 15, 0xB5,0x08,0x27,0x08,0xA5,0x09,0x1A,0x09,0x4C,0x09,0x67,0x09,0x80,0x09,0x80, + 0x39, 0, 19, 0xB6,0x00,0x00,0x03,0x3D,0x03,0x76,0x03,0xAF,0x03,0xDF,0x04,0x41,0x04,0xA4,0x05,0x06,0x05,0x55, + 0x39, 0, 19, 0xB7,0x05,0xF1,0x06,0x63,0x06,0xD4,0x07,0x2D,0x07,0x7D,0x08,0x1B,0x08,0x95,0x09,0x00,0x09,0x6A, + 0x39, 0, 15, 0xB8,0x0A,0x1E,0x0A,0xBE,0x0B,0x51,0x0B,0x93,0x0B,0xB7,0x0B,0xD9,0x0B,0xD9, + 0x39, 0, 2, 0xBF,0x41, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0xCF,0x03,0xCB,0x03,0xEB,0x04,0x0B,0x04,0x47,0x04,0x7E,0x04,0xCC,0x04,0xFD, + 0x39, 0, 19, 0xB1,0x05,0x2A,0x05,0x78,0x05,0xC9,0x06,0x12,0x06,0x99,0x06,0xE1,0x07,0x30,0x07,0x9A,0x07,0xF4, + 0x39, 0, 15, 0xB2,0x08,0x44,0x08,0xE8,0x09,0xAD,0x09,0xE6,0x0A,0x03,0x0A,0x1D,0x0A,0x20, + 0x39, 0, 19, 0xB3,0x00,0x00,0x02,0x4E,0x03,0x1D,0x03,0x39,0x03,0x52,0x03,0x76,0x03,0x9E,0x03,0xF0,0x04,0x23, + 0x39, 0, 19, 0xB4,0x04,0x50,0x04,0xA0,0x04,0xEE,0x05,0x2F,0x05,0xA9,0x05,0xE9,0x06,0x2E,0x06,0x8B,0x06,0xD5, + 0x39, 0, 15, 0xB5,0x07,0x1A,0x07,0xAA,0x08,0x52,0x08,0x82,0x08,0x9A,0x08,0xB1,0x08,0xB3, + 0x39, 0, 19, 0xB6,0x00,0x00,0x02,0x78,0x03,0x62,0x03,0x8D,0x03,0xB7,0x04,0x01,0x04,0x4C,0x04,0xC3,0x05,0x0C, + 0x39, 0, 19, 0xB7,0x05,0x48,0x05,0xB3,0x06,0x1A,0x06,0x71,0x07,0x0E,0x07,0x5C,0x07,0xB4,0x08,0x28,0x08,0x85, + 0x39, 0, 15, 0xB8,0x08,0xD9,0x09,0x86,0x0A,0x54,0x0A,0x91,0x0A,0xB0,0x0A,0xCD,0x0A,0xD0, + 0x39, 0, 2, 0xBF,0x40, + 0x39, 0, 19, 0xB0,0x00,0x00,0x03,0xCD,0x03,0xD2,0x03,0xD7,0x03,0xDC,0x03,0xF4,0x04,0x10,0x04,0x2A,0x04,0x42, + 0x39, 0, 19, 0xB1,0x04,0x6F,0x04,0x99,0x04,0xC1,0x04,0xF0,0x05,0x17,0x05,0x62,0x05,0xAB,0x05,0xED,0x06,0x2E, + 0x39, 0, 15, 0xB2,0x06,0x9C,0x06,0xFE,0x07,0x5C,0x07,0x8C,0x07,0xA0,0x07,0xB2,0x07,0xB2, + 0x39, 0, 19, 0xB3,0x00,0x00,0x03,0x2F,0x03,0x37,0x03,0x3F,0x03,0x44,0x03,0x4B,0x03,0x54,0x03,0x5B,0x03,0x6D, + 0x39, 0, 19, 0xB4,0x03,0x8F,0x03,0xB8,0x03,0xE0,0x04,0x0E,0x04,0x38,0x04,0x8A,0x04,0xCF,0x05,0x0D,0x05,0x49, + 0x39, 0, 15, 0xB5,0x05,0xAF,0x06,0x06,0x06,0x56,0x06,0x79,0x06,0x8C,0x06,0x9E,0x06,0x9E, + 0x39, 0, 19, 0xB6,0x00,0x00,0x03,0x72,0x03,0x78,0x03,0x7E,0x03,0x83,0x03,0x9B,0x03,0xB6,0x03,0xCF,0x03,0xF0, + 0x39, 0, 19, 0xB7,0x04,0x30,0x04,0x70,0x04,0xAE,0x04,0xF1,0x05,0x27,0x05,0x91,0x05,0xEF,0x06,0x3F,0x06,0x8D, + 0x39, 0, 15, 0xB8,0x07,0x11,0x07,0x80,0x07,0xE1,0x08,0x11,0x08,0x28,0x08,0x3D,0x08,0x3D, + 0x39, 0, 2, 0xCE,0x01, + 0x39, 0, 2, 0xCC,0x00, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 25, 0xB9,0x00,0x04,0x00,0x0C,0x00,0x14,0x00,0x1C,0x00,0x2C,0x00,0x3C,0x00,0x5C,0x00,0x7C,0x00,0x9C,0x00,0xBC,0x00,0xDC,0x00,0xFC, + 0x39, 0, 25, 0xBA,0x01,0x3C,0x01,0x7C,0x01,0xBC,0x01,0xFC,0x02,0x3C,0x02,0x7C,0x02,0xFC,0x03,0x7C,0x03,0xBC,0x03,0xDC,0x03,0xFC,0x03,0xFF, + + /////////#1_gamma.txt end/////////// + #endif + + + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x03, + 0x39, 0, 6, 0xB2,0x00,0x1F,0x1F,0x06,0x01, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 13, 0xB2,0x00,0x10,0x10,0x00,0x0F,0x0F,0x00,0x10,0x10,0x00,0x1F,0x1F, + 0x39, 0, 2, 0x6F,0x11, + 0x39, 0, 9, 0xB2,0x06,0x01,0x06,0x01,0x06,0x01,0x06,0x01, + 0x39, 0, 2, 0x6F,0x19, + 0x39, 0, 2, 0xB2,0x00, + 0x39, 0, 16, 0xB6,0xF0,0x1C,0x1C,0x00,0x10,0x01,0x00,0x10,0x01,0x00,0x10,0x01,0x00,0x1C,0x1C, + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 4, 0xB6,0x1F,0x00,0x0A, + 0x39, 0, 2, 0x6F,0x1A, + 0x39, 0, 4, 0xB6,0x0F,0x00,0x0A, + 0x39, 0, 2, 0x6F,0x25, + 0x39, 0, 4, 0xB6,0x0F,0x00,0x0A, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 4, 0xB6,0x0F,0x00,0x0A, + 0x39, 0, 17, 0xBB,0x11,0x00,0x1D,0x7E,0x00,0x0F,0x5E,0x00,0x0E,0x4C,0x00,0x00,0x00,0x00,0x1D,0x7E, + 0x39, 0, 17, 0xBC,0x22,0x10,0x1D,0x5C,0x00,0x0F,0x3C,0x00,0x0E,0x29,0x00,0x00,0x00,0x00,0x1D,0x5C, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x04, + 0x39, 0, 2, 0xC2,0x14, + 0x39, 0, 2, 0xB1,0x02, + 0x39, 0, 2, 0xB2,0x40, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 4, 0xB2,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x04, + 0x39, 0, 4, 0xB2,0x09,0xE3,0x40, + 0x39, 0, 2, 0x6F,0x07, + 0x39, 0, 4, 0xB2,0x09,0xE4,0x00, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 4, 0xB2,0x09,0xE3,0x40, + 0x39, 0, 2, 0xCB,0x86, + 0x39, 0, 5, 0xD0,0x00,0x00,0x00,0x10, + 0x39, 0, 2, 0x6F,0x04, + 0x39, 0, 2, 0xD0,0x01, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 6, 0xCB,0x05,0x0F,0x1F,0x3E,0x7C, + 0x39, 0, 2, 0x6F,0x06, + 0x39, 0, 11, 0xCB,0x00,0x08,0x00,0x3C,0x01,0x48,0x07,0xFF,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 6, 0xD2,0x12,0x0C,0x0C,0x0A,0x06, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 6, 0xD2,0x30,0x14,0x16,0x0E,0x0A, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 6, 0xD2,0x48,0x20,0x16,0x12,0x0E, + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 6, 0xD2,0x44,0x20,0x16,0x12,0x15, + 0x39, 0, 2, 0x6F,0x14, + 0x39, 0, 6, 0xD2,0x40,0x20,0x16,0x12,0x12, + 0x39, 0, 2, 0x6F,0x19, + 0x39, 0, 6, 0xD2,0xFF,0xE4,0xA9,0x40,0x30, + 0x39, 0, 2, 0x6F,0x1E, + 0x39, 0, 6, 0xD2,0xFF,0xD8,0x40,0x26,0x20, + 0x39, 0, 2, 0x6F,0x23, + 0x39, 0, 6, 0xD2,0xFF,0x8F,0x40,0x26,0x1F, + 0x39, 0, 2, 0x6F,0x28, + 0x39, 0, 6, 0xD2,0x9F,0x60,0x40,0x20,0x1B, + 0x39, 0, 2, 0x6F,0x2D, + 0x39, 0, 6, 0xD2,0x84,0x40,0x40,0x20,0x1B, + 0x39, 0, 2, 0x6F,0x32, + 0x39, 0, 6, 0xD2,0x12,0x08,0x10,0x10,0x06, + 0x39, 0, 2, 0x6F,0x37, + 0x39, 0, 6, 0xD2,0x30,0x08,0x15,0x0B,0x0A, + 0x39, 0, 2, 0x6F,0x3C, + 0x39, 0, 6, 0xD2,0x46,0x08,0x10,0x10,0x0C, + 0x39, 0, 2, 0x6F,0x41, + 0x39, 0, 6, 0xD2,0x30,0x1A,0x10,0x16,0x16, + 0x39, 0, 2, 0x6F,0x46, + 0x39, 0, 6, 0xD2,0x30,0x1A,0x10,0x12,0x12, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 6, 0xD4,0x08,0x08,0x04,0x0C,0x06, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 6, 0xD4,0x29,0x18,0x10,0x0D,0x0A, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 6, 0xD4,0x40,0x14,0x10,0x11,0x0C, + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 6, 0xD4,0x40,0x1F,0x13,0x14,0x10, + 0x39, 0, 2, 0x6F,0x14, + 0x39, 0, 6, 0xD4,0x5f,0x16,0x14,0x16,0x13, + 0x39, 0, 2, 0x6F,0x19, + 0x39, 0, 6, 0xD4,0xFF,0xFF,0xA0,0x50,0x2F, + 0x39, 0, 2, 0x6F,0x1E, + 0x39, 0, 6, 0xD4,0xFF,0xF0,0x9A,0x30,0x0C, + 0x39, 0, 2, 0x6F,0x23, + 0x39, 0, 6, 0xD4,0xFF,0xA0,0x6A,0x30,0x0F, + 0x39, 0, 2, 0x6F,0x28, + 0x39, 0, 6, 0xD4,0xF0,0x80,0x40,0x30,0x12, + 0x39, 0, 2, 0x6F,0x2D, + 0x39, 0, 6, 0xD4,0xB0,0x40,0x40,0x30,0x14, + 0x39, 0, 2, 0x6F,0x32, + 0x39, 0, 6, 0xD4,0x04,0x04,0x04,0x0A,0x05, + 0x39, 0, 2, 0x6F,0x37, + 0x39, 0, 6, 0xD4,0x32,0x14,0x10,0x0B,0x07, + 0x39, 0, 2, 0x6F,0x3C, + 0x39, 0, 6, 0xD4,0x40,0x18,0x10,0x0C,0x09, + 0x39, 0, 2, 0x6F,0x41, + 0x39, 0, 6, 0xD4,0x20,0x1C,0x1A,0x0E,0x0B, + 0x39, 0, 2, 0x6F,0x46, + 0x39, 0, 6, 0xD4,0xB5,0x18,0x18,0x08,0x0C, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x05, + 0x39, 0, 3, 0xC7,0x07,0x01, + 0x39, 0, 4, 0xB0,0x07,0x21,0x00, + 0x39, 0, 3, 0xB3,0x86,0x80, + 0x39, 0, 3, 0xB5,0x85,0x81, + 0x39, 0, 5, 0xB7,0x85,0x00,0x00,0x81, + 0x39, 0, 5, 0xB8,0x85,0x00,0x00,0x81, + 0x39, 0, 5, 0xB9,0x85,0x00,0x00,0x81, + 0x39, 0, 4, 0xD0,0x00,0x03,0x10, + 0x39, 0, 5, 0xE0,0x82,0x00,0x00,0x02, + 0x39, 0, 4, 0xD1,0x00,0x01,0x10, + 0x39, 0, 5, 0xE1,0x82,0x00,0x00,0x02, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x06, + 0x39, 0, 6, 0xB0,0x13,0x32,0x12,0x32,0x04, + 0x39, 0, 6, 0xB1,0x32,0x31,0x0E,0x32,0x31, + 0x39, 0, 6, 0xB2,0x32,0x00,0x32,0x31,0x32, + 0x39, 0, 2, 0xB3,0x0F, + 0x39, 0, 6, 0xB6,0x13,0x32,0x12,0x32,0x04, + 0x39, 0, 6, 0xB7,0x32,0x31,0x0E,0x32,0x31, + 0x39, 0, 6, 0xB8,0x32,0x00,0x32,0x31,0x32, + 0x39, 0, 2, 0xB9,0x0F, + 0x39, 0, 2, 0xD0,0x01, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x07, + 0x39, 0, 2, 0xB4,0xC0, + 0x39, 0, 6, 0xB0,0x84,0xC0,0x78,0x70,0x00, + 0x39, 0, 7, 0xB1,0x0C,0x1C,0x00,0x1C,0x0C,0x00, + 0x39, 0, 2, 0xB2,0x20, + 0x39, 0, 2, 0x6F,0x36, + 0x39, 0, 2, 0xB2,0x32, + 0x39, 0, 2, 0x6F,0x3F, + 0x39, 0, 2, 0xB2,0x04, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 2, 0xB2,0x20, + 0x39, 0, 2, 0x6F,0x48, + 0x39, 0, 2, 0xB2,0x32, + 0x39, 0, 2, 0x6F,0x51, + 0x39, 0, 2, 0xB2,0x04, + 0x39, 0, 2, 0x6F,0x12, + 0x39, 0, 2, 0xB2,0xF0, + 0x39, 0, 2, 0x6F,0x5A, + 0x39, 0, 2, 0xB2,0x03, + 0x39, 0, 2, 0x6F,0x63, + 0x39, 0, 2, 0xB2,0x9B, + 0x39, 0, 2, 0x6F,0x1B, + 0x39, 0, 2, 0xB2,0x20, + 0x39, 0, 2, 0x6F,0x6C, + 0x39, 0, 2, 0xB2,0x32, + 0x39, 0, 2, 0x6F,0x75, + 0x39, 0, 2, 0xB2,0x04, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 2, 0xB2,0x20, + 0x39, 0, 2, 0x6F,0x7E, + 0x39, 0, 2, 0xB2,0x32, + 0x39, 0, 2, 0x6F,0x87, + 0x39, 0, 2, 0xB2,0x04, + 0x39, 0, 2, 0x6F,0x2D, + 0x39, 0, 2, 0xB2,0xCC, + 0x39, 0, 2, 0x6F,0x90, + 0x39, 0, 2, 0xB2,0x03, + 0x39, 0, 2, 0x6F,0x99, + 0x39, 0, 2, 0xB2,0x3A, + 0x39, 0, 2, 0xB4,0xC0, + 0x39, 0, 3, 0xB7,0x00,0x00, + 0x39, 0, 6, 0xC0,0x01,0x01,0x00,0x00,0x55, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xC1,0x2C,0x00,0x1C,0x39,0x1C,0x39,0x38,0x72,0x3F,0xD9,0xA2,0x84,0x40,0x00,0xE7,0x18,0x80,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xC1,0x90,0x00,0x0A,0x90,0x59,0x5F,0x33,0xE0,0x00,0x00,0x0C,0xAB,0x59,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xC1,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xC2,0x2A,0x0F,0x1C,0x39,0x1C,0x39,0xC7,0x8E,0x00,0x12,0xBD,0xDA,0x40,0x14,0x86,0xBA,0xFF,0xF6,0x12,0xBF,0x8D, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xC2,0x93,0xDE,0x0A,0x94,0x37,0x5F,0x33,0xEF,0xE2,0x73,0x00,0x55,0x59,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xC2,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xC3,0x26,0x00,0x1C,0x39,0x1C,0x39,0x38,0x72,0x00,0x00,0x00,0x00,0x3F,0xD8,0xBB,0x6C,0x80,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xC3,0x03,0xDE,0x00,0x04,0x37,0x55,0x33,0x60,0x00,0x00,0x03,0x55,0xA7,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xC3,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xC4,0x20,0x0F,0x1C,0x39,0x1C,0x39,0xC7,0x8E,0x3F,0xEC,0x60,0x5E,0x3F,0xEC,0x5B,0x0E,0x80,0x03,0x69,0x3F,0xA9, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xC4,0x00,0x00,0x00,0x00,0x59,0x55,0x33,0x60,0x1D,0x8D,0x0F,0xAB,0xA7,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xC4,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xC5,0x21,0x00,0x03,0xC1,0x03,0x49,0x00,0x00,0x3F,0xFF,0x26,0x46,0x3F,0xFF,0x34,0x52,0x00,0x00,0x0C,0x55,0x09, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xC5,0x01,0xFE,0x14,0x02,0x1B,0x33,0x33,0x80,0x03,0x83,0x0F,0xE1,0xE3,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xC5,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xC6,0x27,0x00,0x03,0x84,0x03,0x49,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFF,0x3A,0xE4,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xC6,0x02,0x1C,0x14,0x02,0x39,0x32,0x33,0x80,0x00,0x00,0x03,0x1E,0xE3,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xC6,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xC7,0x2D,0x00,0x03,0x84,0x03,0x49,0x00,0x00,0x3F,0xFF,0x34,0x18,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xC7,0x01,0xFE,0x34,0x02,0x1B,0x52,0x33,0x50,0x00,0x00,0x0C,0xE2,0x1D,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xC7,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xC8,0x2B,0x00,0x03,0xC1,0x03,0x49,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0xF3,0xAA,0xF7, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xC8,0x02,0x1C,0x33,0x02,0x39,0x52,0x33,0x6F,0xFC,0x7D,0x00,0x1F,0x1D,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xC8,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xC9,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xC9,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xC9,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCA,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCB,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCB,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCB,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCC,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCD,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCD,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCD,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCE,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCF,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD0,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD1,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD1,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD1,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD2,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD2,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD3,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD3,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD3,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD4,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD5,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD5,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD5,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD6,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD7,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD7,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xD8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xD8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xD8,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x08, + 0x39, 0, 17, 0xB6,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 17, 0xB6,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE, + 0x39, 0, 2, 0x6F,0x20, + 0x39, 0, 7, 0xB6,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE, + 0x39, 0, 17, 0xB7,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 17, 0xB7,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0x20, + 0x39, 0, 7, 0xB7,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 17, 0xB8,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 17, 0xB8,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0x20, + 0x39, 0, 7, 0xB8,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 17, 0xB9,0x01,0x01,0x00,0x91,0x00,0x38,0x60,0x00,0x00,0x00,0xA6,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 17, 0xB9,0x00,0x00,0x00,0x00,0x01,0x00,0x05,0x00,0x0C,0x00,0x1F,0x00,0x44,0x00,0x86,0x00, + 0x39, 0, 2, 0x6F,0x20, + 0x39, 0, 17, 0xB9,0xF5,0x01,0xB3,0x02,0xD7,0x04,0x1C,0x05,0x61,0x06,0xA6,0x07,0xEB,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 17, 0xB9,0x00,0x00,0x00,0x00,0x01,0x00,0x02,0x00,0x05,0x00,0x0C,0x00,0x18,0x00,0x2C,0x00, + 0x39, 0, 2, 0x6F,0x40, + 0x39, 0, 17, 0xB9,0x4F,0x00,0xAD,0x01,0x27,0x01,0xA1,0x02,0x1B,0x02,0x95,0x03,0x0F,0x03,0x89,0x00, + 0x39, 0, 2, 0x6F,0x50, + 0x39, 0, 17, 0xB9,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x0D,0x00,0x1D,0x00, + 0x39, 0, 2, 0x6F,0x60, + 0x39, 0, 17, 0xB9,0x48,0x00,0x9D,0x01,0x34,0x02,0x32,0x03,0xE4,0x05,0xF6,0x08,0xF1,0x0B,0xEC,0x0E, + 0x39, 0, 2, 0x6F,0x70, + 0x39, 0, 17, 0xB9,0xE7,0x03,0xD0,0xB0,0xE0,0x0A,0x80,0x80,0x82,0x7D,0x7B,0x79,0x77,0x72,0x70,0x80, + 0x39, 0, 2, 0x6F,0x80, + 0x39, 0, 17, 0xB9,0x80,0x80,0x7D,0x7E,0x7B,0x7B,0x77,0x73,0x80,0x80,0x82,0x81,0x80,0x7F,0x7E,0x7B, + 0x39, 0, 2, 0x6F,0x90, + 0x39, 0, 17, 0xB9,0x78,0x80,0x80,0x81,0x82,0x82,0x82,0x81,0x7F,0x7C,0x80,0x80,0x80,0x83,0x86,0x86, + 0x39, 0, 2, 0x6F,0xA0, + 0x39, 0, 17, 0xB9,0x85,0x81,0x7D,0x80,0x80,0x82,0x81,0x84,0x85,0x87,0x85,0x88,0x80,0x80,0x81,0x8B, + 0x39, 0, 2, 0x6F,0xB0, + 0x39, 0, 17, 0xB9,0x88,0x8A,0x8C,0x8D,0x8E,0x80,0x80,0x84,0x87,0x8A,0x8C,0x8F,0x90,0x91,0x80,0x80, + 0x39, 0, 2, 0x6F,0xC0, + 0x39, 0, 17, 0xB9,0x84,0x87,0x8A,0x8D,0x91,0x91,0x92,0x80,0x80,0x85,0x88,0x8D,0x8F,0x8F,0x95,0x96, + 0x39, 0, 2, 0x6F,0xD0, + 0x39, 0, 17, 0xB9,0x80,0x80,0x7A,0x73,0x6E,0x69,0x66,0x60,0x5D,0x80,0x80,0x80,0x80,0x76,0x74,0x70, + 0x39, 0, 2, 0x6F,0xE0, + 0x39, 0, 17, 0xB9,0x6C,0x6A,0x80,0x80,0x81,0x7F,0x7F,0x7C,0x7B,0x76,0x73,0x80,0x80,0x83,0x83,0x83, + 0x39, 0, 2, 0x6F,0xF0, + 0x39, 0, 14, 0xB9,0x82,0x82,0x7F,0x7C,0x80,0x80,0x82,0x84,0x85,0x84,0x87,0x83,0x80, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x20, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x40, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x50, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x60, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x05,0xD1,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0x70, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0x80, + 0x39, 0, 17, 0xBA,0x08,0x00,0x05,0x3E,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36, + 0x39, 0, 2, 0x6F,0x90, + 0x39, 0, 17, 0xBA,0x07,0x36,0x07,0x36,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x05,0x3E,0x07,0x36, + 0x39, 0, 2, 0x6F,0xA0, + 0x39, 0, 17, 0xBA,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x08,0x00, + 0x39, 0, 2, 0x6F,0xB0, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x05,0xD1,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0xC0, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0xD0, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0xE0, + 0x39, 0, 11, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x20, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x00,0x01,0x00, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 17, 0xBB,0x01,0x00,0x01,0x00,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x40, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x50, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x60, + 0x39, 0, 17, 0xBB,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00, + 0x39, 0, 2, 0x6F,0x70, + 0x39, 0, 17, 0xBB,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00, + 0x39, 0, 2, 0x6F,0x80, + 0x39, 0, 17, 0xBB,0x01,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x90, + 0x39, 0, 17, 0xBB,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x10,0x10, + 0x39, 0, 2, 0x6F,0xA0, + 0x39, 0, 5, 0xBB,0x80,0x80,0x80,0x00, + 0x39, 0, 2, 0xEE,0x05, + 0x39, 0, 5, 0xFF,0xAA,0x55,0xA5,0x80, + 0x39, 0, 2, 0x6F,0x1D, + 0x39, 0, 2, 0xF2,0x05, + 0x39, 0, 5, 0x3B,0x00,0x14,0x00,0x12, + 0x39, 0, 2, 0x03,0x01, + 0x39, 0, 2, 0x90,0x02, + 0x39, 0, 19, 0x91,0x89,0x28,0x00,0x0C,0xC2,0x00,0x03,0x1C,0x01,0x7E,0x00,0x0F,0x08,0xBB,0x04,0x3D,0x10,0xF0, + 0x39, 0, 1, 0x2C, + 0x39, 0, 5, 0x51,0x07,0xFF,0x0F,0xFF, + 0x39, 0, 2, 0x53,0x20, + 0x39, 0, 1, 0x35, + 0x39, 0, 5, 0x2A,0x00,0x00,0x04,0x37, + 0x39, 0, 5, 0x2B,0x00,0x00,0x09,0x5F, + 0x39, 0, 2, 0x2F,0x01, + +#if FINGERPRINT_USE_DRIVERIC_FPR + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x07, +// ##Enable Round + 0x39, 0, 15, 0xC0,0x01,0x01,0x00,0x00,0x55,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xC9,0x21,0x00,0x2A,0x40,0x2A,0x40,0x00,0x00,0x3F,0xDD,0xAC,0x00,0x3F,0xDD,0xAC,0x00,0x80,0x06,0xF9,0x10,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xC9,0x61,0xB4,0xB0,0x72,0x1C,0x18,0x33,0xE0,0x2A,0x40,0x0F,0x98,0x98,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xC9,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCA,0x27,0x00,0x2A,0x40,0x2A,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xDD,0xAC,0x00,0x80,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCA,0x62,0x1D,0xB0,0x72,0x85,0x18,0x33,0xE0,0x00,0x00,0x03,0x68,0x98,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCA,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCB,0x2D,0x00,0x2A,0x40,0x2A,0x40,0x00,0x00,0x3F,0xDD,0xAC,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCB,0x71,0xB4,0x19,0x72,0x1C,0x81,0x33,0x90,0x00,0x00,0x0C,0x98,0x68,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCB,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCC,0x2B,0x00,0x2A,0x40,0x2A,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x7F,0xF9,0x06,0xF0,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCC,0x72,0x1D,0x19,0x72,0x85,0x81,0x33,0x9F,0xD5,0xC0,0x00,0x68,0x68,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCC,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + ///////////////// + + // ڸ +#if 0 + // Pixe6 աOKָ¼ + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 3, 0xD0,0x0D,0xE4, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 3, 0xD0,0x0E,0x00, + 0x39, 0, 2, 0x6F,0x0C, + 0x39, 0, 3, 0xD0,0x0F,0xC0, +#endif + +#if 1 + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0x6F,0x08, //R + 0x39, 0, 3, 0xD0,0x00,0xE4, + 0x39, 0, 2, 0x6F,0x0A,//G + 0x39, 0, 3, 0xD0,0x1E,0x00, + 0x39, 0, 2, 0x6F,0x0C,//B + 0x39, 0, 3, 0xD0,0x00,0xC0, +#endif + + 0x39, 0, 2, 0xD1,0x41, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 2, 0xD1,0x00, + 0x39, 0, 2, 0x6F,0x02, + 0x39, 0, 2, 0xD1,0x00, + + 0x39, 0, 2, 0x6F,0x03, + 0x39, 0, 5, 0xD1,0x02,0x1E,0x07,0x19, + 0x39, 0, 2, 0x6F,0x07, + 0x39, 0, 5, 0xD1,0x01,0xB0,0x06,0xB0, + 0x39, 0, 2, 0x6F,0x0B, + 0x39, 0, 5, 0xD1,0x02,0x88,0x07,0x81, + + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 7, 0xD1,0x3F,0xFF,0x20,0x00,0x30,0x00, +//////////////////////////////////// + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 2, 0x6F,0x17, + 0x39, 0, 3, 0xB2,0x07,0xFF, // DBV + 0x39, 0, 2, 0x6F,0x1F, + 0x39, 0, 3, 0xB2,0x00,0x50, +/////////////////// +// FPR1_CENTER_X=540, FPR1_CENTER_Y=2093 1080 2400[540 2110] +// FPR1_EN = 1 + 0x39, 0, 2, 0x88,0x01, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 5, 0x88,0x02,0x1D,0x08,0x3E, +///FPR ON +// 0x39, 0, 4, 0x87,0x13,0xFF,0x05, +///FPR OFF +// 0x39, 0, 2, 0x6F,0x02, +// 0x39, 0, 2, 0x87,0x04, +#endif + + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 2, 0xC0,0x77, +// 0x39, 0, 5, 0x3B,0x00,0x10,0x09,0x90, +// 0x39, 0, 2, 0x90,0x00, +// 0x05, 0, 1, 0x2C, +// 0x39, 0, 3, 0x51,0x03,0x00, + +}; +#endif + + +static void init_panel(void) +{ +// uint8_t data[10] = {0}; + /* reset panel*/ + tx_panel_reset(); + +// hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH);//LED_ON + + /* enter send initial code mode*/ + hal_dsi_tx_ctrl_enter_init_panel_mode(); + + +#if AMOLED_NT37701_CSOT667 +#if PANEL_INIT_CODE_ARRAY + send_panel_init_code(sizeof(panel_init_code), panel_init_code); + +#if 0 +// hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x01); //0FFF + hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH);//LED_ON + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); + delayMs(70); //20 + Gpio_swire_output(2, 38); //38 + delayMs(20); //100 +#else + hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x01); //0FFF + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); + hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH);//LED_ON + delayMs(90); + +#endif + +#endif +#endif + + /* exit send initial code mode*/ + hal_dsi_tx_ctrl_exit_init_panel_mode(); + delayMs(20); + TAU_LOGD("init code"); +} + +static void open_mipi_rx(void) +{ + /* TE */ + hal_gpio_set_mode(IO_PAD_AP_TE, IO_MODE_TEAR); + + if (g_rx_ctrl_handle == NULL) + { + /* rx ctrl handle */ + g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); + } + /* ò */ + g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; + g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; + g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; + g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; + g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; + g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; + g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; /* ɲ */ + g_rx_ctrl_handle->rx_vc = INPUT_VC; + g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; + g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; + g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; /* ע DCSб */ + g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; /* עdsc read ص,ѡ,˺Ϊʱcus_dcs_entry_tableִ */ + g_rx_ctrl_handle->pps_update_entry = pps_update_handle; +// g_rx_ctrl_handle->pq_marginal = PQ_TYPE_5; + g_rx_ctrl_handle->err_handler_level = ERR_HANDLE_L3; + +#if defined(ISP_568) || defined(ISP_368) + g_rx_ctrl_handle->base_info.extra_info.rot_angle = VIDOE_ROT_ANGLE_0; + g_rx_ctrl_handle->base_info.extra_info.mirror_en = false; + + g_rx_ctrl_handle->hight_performan_mode = HIGHT_PERFORMAN_NONE; //HIGHT_PERFORMAN_L2; +// g_rx_ctrl_handle->base_info.extra_info.ltpo = LTPO_MODE_2; +// g_rx_ctrl_handle->pu_optimize = true; +#endif + + /* ǰԤPPS, AP PPS cmdҲ */ + if (g_rx_ctrl_handle->compress_en == true) + { + uint8_t pps[128] = {0x11,0x00,0x00,0x89,0x30,0x80,0x09,0x60,0x04,0x38,0x00,0x1E,0x02,0x1C,0x02,0x1C, + 0x02,0x00,0x02,0x0E,0x00,0x20,0x02,0xE3,0x00,0x07,0x00,0x0C,0x03,0x50,0x03,0x64, + 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, + 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, + 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, + 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x63,0xF4,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; + + hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 128); + } + + /* ʼrx ctrl */ + hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); + + + hal_dsi_rx_ctrl_set_cus_sync_line(g_rx_ctrl_handle, 2200);// lss add, ˺1600 +// hal_dsi_rx_ctrl_hight_performan_mode(g_rx_ctrl_handle); +// hal_dsi_rx_ctrl_set_cus_esc_clk(g_rx_ctrl_handle,20000000); + + /* rx ctrl */ + hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +} + +static void init_mipi_tx(void) +{ + if (g_tx_ctrl_handle == NULL) + { + g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); + } + g_tx_ctrl_handle->channel_id = OUTPUT_VC; + g_tx_ctrl_handle->lane_num = OUTPUT_LANE_NUMBER; + g_tx_ctrl_handle->vid_mode = OUTPUT_VIDEO_MODEL; + g_tx_ctrl_handle->cmd_tx_type = _CMD_TYPE; + g_tx_ctrl_handle->dpi_vsa = OUTPUT_VSA; + g_tx_ctrl_handle->dpi_vbp = OUTPUT_VBP; + g_tx_ctrl_handle->dpi_vfp = OUTPUT_VFP; + g_tx_ctrl_handle->dpi_hsa = OUTPUT_HSA; + g_tx_ctrl_handle->dpi_hbp = OUTPUT_HBP; + g_tx_ctrl_handle->dpi_hfp = OUTPUT_HFP; + g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_tx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; + g_tx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; + g_tx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; + g_tx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; + g_tx_ctrl_handle->tx_line_delay = 800; + g_tx_ctrl_handle->tx_clkawayshs = false; + g_tx_ctrl_handle->tx_frame_rate = OUTPUT_FRAME_RATE; + + hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); + /* AP ûзʱĬϵʾɫ, Ϊ0 0 0(ɫ), ɫΪdebugʹ */ + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); + +// hal_dsi_tx_ctrl_set_partial_disp_area(0, 0, 2400, 540); +// hal_dsi_tx_ctrl_set_partial_disp(ENABLE); +} + + +static void tx_display_on(void) +{ + init_panel(); + + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + +#if 0 +// delayMs(20); + if (g_power_on_flag){ + TAU_LOGD("Power on delay"); + delayMs(500); //20 + } + else{ + delayMs(20); //100 + } + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); +#else + delayMs(100); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); + Gpio_swire_output(2, 40); +#endif + panel_display_done = true; + TAU_LOGD("29--"); +} + +//static void swire_timer_callback(void *data) +//{ +//#ifdef USE_FOR_SAMSUNG_NOTE20 +// if(Flag_blacklight_EN) +// { +// hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); +// } +// else if(s20_power_on_flag) +// { +// hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); +// } +// else +//#endif +// { +// hal_swire_start(12, 12, 12, 12, swire_num); +// } +//} + +//static void swire_callback(void *data) +//{ +// /* swire ǷҪһֱҪֻֻͬͬ */ +// //if(start_display_on == false) +// { +// hal_timer_start(SWIRE_TIMER, 26, swire_timer_callback, NULL); +// } +//} + +///* swire ʼ,ͨ hal_swire_start , ѭһֱ */ +//static void swire_init() +//{ +// hal_swire_open(DISABLE); +// hal_swire_init(); +// /* swire ηɺص */ +// hal_swire_register_callback(swire_callback); +// hal_swire_open(ENABLE); +// //hal_swire_start(12, 12, 12, 12, 43); +// hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); //3~27,~,9.45V~7.43V +// hal_timer_init(SWIRE_TIMER); +// hal_timer_start(SWIRE_TIMER, 26, swire_timer_callback, NULL); +//} + +static void soft_te_timer_cb(void *data) +{ + /* + S8 ӵTP1.8V, AC ҪȵTP1.8 ٳʼ, TP ǰҪͨTEֻֻ + */ + if (panel_display_done == false) + { + hal_dsi_rx_ctrl_gen_a_tear_signal(g_rx_ctrl_handle); + hal_timer_start(TE_TIMER, 17, soft_te_timer_cb, NULL); + } + else + { + hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); + //hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, 2100, TE_HW_MODE); + } +} + +static void soft_te_timer_init() +{ + TAU_LOGD("soft_te_timer_init"); + hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + hal_timer_init(TE_TIMER); + hal_timer_start(TE_TIMER, 1, soft_te_timer_cb, NULL); +} + +#ifdef ADD_TIMER3_FUNCTION +static void soft_timer3_cb(void *data) +{ + hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); + tp_sleep_count++; + + if (tp_sleep_clk_count < 0xF8) + tp_sleep_clk_count++; + if(phone_DisplayOFF_count>0) + { + phone_DisplayOFF_count++; + } + + if (g_panel_display_cnt) + g_panel_display_cnt--; + + //TAU_LOGD("time3 init\n"); + +#if AUTO_CAL_TP + if (g_exit_sleep_mode) //ֹ¼ʱУ׼ģʽ + { + if (g_cal_cnt > 0) + { + g_cal_cnt--; + if (g_cal_cnt == 0){ + g_calibration_flag = true; + TAU_LOGD("Start cal tp!\n"); + } + } + } +#endif +} +#endif + + +#if ADD_TP_CALIBRATION +void app_tp_calibration_exec(void) +{ + if(g_calibration_flag) + { + if (g_exit_sleep_mode) + { + g_calibration_flag = false; + ap_tp_calibration(); + TAU_LOGD("calibration successful \n"); + } + } +} +#endif + + +void ap_demo(void) +{ + hal_gpio_init_output(IO_PAD_TD_LEDPWM, IO_LVL_LOW); + hal_gpio_init_output(IO_PAD_AP_SWIRE, IO_LVL_LOW); + hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW); + hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_LOW); // LED_ON + + TAU_LOGD("Note20 368 CSOT667 [%s %s]", __DATE__, __TIME__); +// delayMs(20); + /* mipi rxʼ */ + open_mipi_rx(); + + tp_sleep_in = 1; + app_tp_I2C_init(); + +//#ifdef ADD_PWM_OUTPUT_FOR_BL +// PWM_init(); +//#endif + + /* TP1.8е֮ǰʹTEʾ֮лΪӲTE */ +// soft_te_timer_init(); + /* mipi tx ʼ*/ + delayMs(20); + init_mipi_tx(); + + /* touch ģʼ */ +#ifndef DISPLAY_ONLY + app_tp_init(); +#endif + +#ifdef ADD_TIMER3_FUNCTION + tp_sleep_count = 0; + tp_sleep_clk_count = 0; + phone_DisplayOFF_count=1; + hal_timer_init(TIMER_NUM3); + hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); + TAU_LOGD("start timer3"); +#endif + + while (1) + { + if (start_display_on == true) + { + if ((g_exit_sleep_mode == true) || (g_panel_display_cnt==0)) + { + tx_display_on(); + app_tp_phone_clear_reset_on(); + #ifndef DISABLE_TDDI_I2C_FUNCTION + /* TP ģͨѶʼ */ + app_tp_transfer_screen_start(); + #endif + g_panel_display_cnt = 0; + start_display_on = false; + } + } +// #ifdef ADD_PWM_OUTPUT_FOR_BL +// PWM_Task(); +// #endif + if(phone_DisplayOFF_flag==1) + { + if(phone_DisplayOFF_count>950) + { + phone_DisplayOFF_count=0; + phone_start_flag=1; + } + } + else + { + if(phone_DisplayOFF_count>20) + { + phone_DisplayOFF_count=0; + phone_start_flag=1; + hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW);//ͣ˫2~3s޴.jason_su + } + } + + #if ADD_TP_CALIBRATION + app_tp_calibration_exec(); + #endif + + #ifndef DISABLE_TDDI_I2C_FUNCTION + /* ȴ TP жϱTP Эת */ + app_tp_transfer_screen_int(); + #endif + + while (hal_dsi_rx_ctrl_dsc_async_handler(g_rx_ctrl_handle)) + { + } + + #if ENABLE_TP_WAKE_UP + if (g_need_enter_sleep_mode) + { +// hal_gpio_init_output(IO_PAD_TD_LEDPWM, IO_LVL_HIGH); + tp_sleep_in=1; + #if ENABLE_TP_WAKE_UP + hal_gpio_set_ap_reset_int(ENABLE, ap_reset_cb, DETECT_RISING_EDGE); + #endif + /* FIXME stop more model */ + hal_dsi_tx_ctrl_stop(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_deinit(g_tx_ctrl_handle); + hal_dsi_rx_ctrl_stop(g_rx_ctrl_handle); + hal_dsi_rx_ctrl_deinit(g_rx_ctrl_handle); + + hal_swire_open(DISABLE); + hal_swire_deinit(); + hal_timer_stop(SWIRE_TIMER); + hal_timer_deinit(SWIRE_TIMER); + + hal_system_set_vcc(false); + TAU_LOGD("disable video path \n"); + g_need_enter_sleep_mode = false; + } + #endif + + #if RUN_TEST + g_run_test_cnt++; + if (g_run_test_cnt > 0x7fffff) + { + TAU_LOGD("system run"); + g_run_test_cnt = 0; + } + #endif + + /* enter idle mode*/ + //hal_system_idle_mode(true); + } +} + + + diff --git a/src/app/demo/ap_demo.h b/src/app/demo/ap_demo.h new file mode 100644 index 0000000..ca972af --- /dev/null +++ b/src/app/demo/ap_demo.h @@ -0,0 +1,50 @@ +/******************************************************************************* +* +* +* File: s8_demo.h +* Description: s8ͷļ +* Version: V0.1 +* Date: 2021-02-22 +* Author: Tempest + *******************************************************************************/ + +#ifndef __AP_DEMO_H__ +#define __AP_DEMO_H__ + +//#define DISABLE_TDDI_I2C_FUNCTION +//#define USE_WL518_INTERNAL_FLASH + + +/* ͬѡѡѡ1*/ +#define USE_FOR_SAMSUNG_NOTE20 + + +#ifdef USE_FOR_SAMSUNG_NOTE20 +#define LCD_FT8719_DU48 0 +#define AMOLED_NT37701_CSOT667 1 + +#define PANEL_INIT_CODE_ARRAY 1 + +#define G_PHONE_INT_DEFAULT_LOW + +#define USE_FOR_S10_BLUE_MODE //S10ģʽ +#define ADD_PANEL_DISPLAY_MODE //Ļģʽܡƽ⹦ +#define ADD_TIMER3_FUNCTION +#define ENABLE_TP_SLEEP + +#define ADD_FINGERPRINT_FUNC //ָƹ + +//#define USE_FILTER_20220513 +//#define ADD_PWM_OUTPUT_FOR_BL //PWMƱ 20220510 +#endif + + + +/** +* @brief test system +* @param none +* @retval none +*/ +void ap_demo(void); +void app_tp_I2C_init(void); +#endif diff --git a/src/app/demo/app_tp_for_custom_s8.h b/src/app/demo/app_tp_for_custom_s8.h new file mode 100644 index 0000000..7b1bdfc --- /dev/null +++ b/src/app/demo/app_tp_for_custom_s8.h @@ -0,0 +1,156 @@ +/******************************************************************************* +* +* +* File: app_tp_for_custom.h +* Description tp Э鴦ļضõĺ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __APP_TP_FOR_CUSTOM_S8_H__ +#define __APP_TP_FOR_CUSTOM_S8_H__ +#include "test_cfg_global.h" + +#include "string.h" +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "app_tp_transfer.h" +#include "hal_gpio.h" + +#define AP_TP_TRANSFER 1 + +#if AMOLED_NT37280 + #define PHONE_SLAVE_TRANSFER_I2C 1 //1:ʾֻоƬ֮䣬touch ݲ I2C ͨţ + #define PHONE_SLAVE_TRANSFER_SPI 0 //1:ʾֻоƬ֮䣬touch ݲ SPI ͨţ + #define SCREEN_MASTER_TRANSFER_I2C 0 //1:ʾĻоƬ֮䣬touch ݲ I2C ͨţ + #define SCREEN_MASTER_TRANSFER_SPI 1 //1:ʾĻоƬ֮䣬touch ݲ SPI ͨţ +#elif LCD_HX83112A + #define PHONE_SLAVE_TRANSFER_I2C 1 //1:ʾֻоƬ֮䣬touch ݲ I2C ͨţ + #define PHONE_SLAVE_TRANSFER_SPI 0 //1:ʾֻоƬ֮䣬touch ݲ SPI ͨţ + #define SCREEN_MASTER_TRANSFER_I2C 0 //1:ʾĻоƬ֮䣬touch ݲ I2C ͨţ + #define SCREEN_MASTER_TRANSFER_SPI 0 //1:ʾĻоƬ֮䣬touch ݲ SPI ͨţ +#else // #if LCD_TD4310 + #define PHONE_SLAVE_TRANSFER_I2C 1 //1:ʾֻоƬ֮䣬touch ݲ I2C ͨţ + #define PHONE_SLAVE_TRANSFER_SPI 0 //1:ʾֻоƬ֮䣬touch ݲ SPI ͨţ + #define SCREEN_MASTER_TRANSFER_I2C 1 //1:ʾĻоƬ֮䣬touch ݲ I2C ͨţ + #define SCREEN_MASTER_TRANSFER_SPI 0 //1:ʾĻоƬ֮䣬touch ݲ SPI ͨţ +#endif + +#ifdef USE_FOR_SAMSUNG_NOTE20 +#define CHIP_I2C_ADDRESS 0x48 //оƬ I2C ӻַ.I2Cַ +#define SCREEN_I2C_ADDRESS 0x49 //Ļ I2C ӻַ + +#elif defined(USE_FOR_SUMSUNG_S9PLUS) +#define CHIP_I2C_ADDRESS 0x48 //оƬ I2C ӻַ +#define SCREEN_I2C_ADDRESS 0x20 //Ļ I2C ӻַ + +#else +#define CHIP_I2C_ADDRESS 0x48 //оƬ I2C ӻַ +#define SCREEN_I2C_ADDRESS 0x49 //Ļ I2C ӻַ +#endif + +#define CHIP_I2C_ADDR_BITS I2C_ADDR_BITS_7 //Ļ I2C ַλ 7/10ĬΪ7 +#define SCREEN_I2C_ADDR_BITS I2C_ADDR_BITS_7 //Ļ I2C ַλ 7/10ĬΪ7 +#define I2C_MASTER_SPEED 800000 // I2C ͨ + +#define SPI_MASTER_SPEED 10000000 // SPI ͨ + +#define BUFFER_SIZE_MAX 200 // bufrer ֽ + +#define INPUT_WIDTH_VALUE 1440 //ԭװ X ֵֵ +#define INPUT_HEIGHT_VALUE 3200 //ԭװ Y ֵֵ + +#if LCD_FT8006S_TRULY59 +#define OUTPUT_WIDTH_VALUE 720 //ά X ֵֵ +#define OUTPUT_HEIGHT_VALUE 1520 //ά Y ֵֵ + +#else +#define OUTPUT_WIDTH_VALUE 1080 //ά X ֵֵ +#define OUTPUT_HEIGHT_VALUE 2400//2340 //ά Y ֵֵ +#endif + + +#define SCREEN_TRANSFER_WRITE false //յscreen ioжϣ֮ö +#define SCREEN_TRANSFER_READ true //յscreen ioжϣ֮Ҫ + +typedef enum +{ + I2C_ADDR_BITS_7 = 7, + I2C_ADDR_BITS_10 = 10 +} en_I2C_ADDR_BITS_mdoe; + +typedef struct +{ + uint8_t *buffer; //յscreen ioжϺͨŵķbufferָ + size_t txbuffer_size; // buffer ݳȣҪʱĿǰֻ֧4ֽ + size_t rxbuffer_size; //֮Ҫصݳ + bool read_flag; //true յscreen ioжϣ֮Ҫ +} st_screen_data; + +typedef struct +{ + const uint8_t *buffer; //ͨŵķbufferָ + size_t txbuffer_size; // buffer ݳȣҪʱĿǰֻ֧4ֽ + size_t rxbuffer_size; //֮Ҫصݳ + bool read_flag; //true յscreen ioжϣ֮Ҫ +} st_screen_const_data; + +typedef struct +{ + uint8_t reg_size; //bufferĸ + size_t write_back_size; //Ҫ͵ݳ + const uint8_t *reg_data; //buffer + const uint8_t *write_back; //bufer +} st_reg_const_data; + +typedef struct +{ + uint8_t reg_size; //bufferĸ + size_t write_back_size; //Ҫ͵ݳ + uint8_t *reg_data; //buffer + uint8_t *write_back; //bufer +} st_reg_data; + +extern io_pad_e g_screen_input_rst_pad; +extern io_pad_e g_screen_input_int_pad; +extern io_pad_e g_phone_input_rst_pad; +extern io_pad_e g_phone_output_int_pad; + +extern uint8_t phone_start_flag; +extern uint8_t phone_touch_flag; +extern const uint8_t screen_reg_int_data_size; +extern const uint8_t screen_reg_start_data_size; +extern st_screen_data screen_reg_int_data[]; +extern st_screen_const_data screen_reg_start_data[]; +//extern st_reg_const_data phone_reg_const_data[]; + +/************************************************************************** +* @name : app_tp_screen_analysis_const +* @brief : screen start ׶ݽɿͻ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +uint8_t app_tp_screen_analysis_const(uint8_t transfer_now, uint8_t *rxbuffer, size_t data_size); + +/************************************************************************** +* @name : app_tp_screen_analysis_int +* @brief : screen IOжϺ ݽɿͻ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +uint8_t app_tp_screen_analysis_int(uint8_t transfer_now, uint8_t *rxbuffer, size_t data_size); + +/************************************************************************** +* @name : app_tp_phone_analysis_data +* @brief : phone ݽɿͻ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_phone_analysis_data(uint8_t *rxbuffer, size_t rxbuffer_size, const uint8_t **txbuffer, size_t *txbuffer_size); + + +#endif + diff --git a/src/app/demo/app_tp_screen_transfer_data_s8.h b/src/app/demo/app_tp_screen_transfer_data_s8.h new file mode 100644 index 0000000..c511a3e --- /dev/null +++ b/src/app/demo/app_tp_screen_transfer_data_s8.h @@ -0,0 +1,23 @@ +/******************************************************************************* +* +* +* File: hal_tp_screen_transfer_data.h +* Description start/sleep/awake ģʽҪ͵ֵ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __HAL_TP_SCREEN_TRANSFER_DATA_S8_H__ +#define __HAL_TP_SCREEN_TRANSFER_DATA_S8_H__ + +#include "tau_common.h" + +/***************send to screen***************/ +const uint8_t screen_87_data[] = {0x87}; +const uint8_t screen_a0_00_ff_data[] = {0xa0, 0x00, 0xff}; +const uint8_t screen_a4_06_c1_data[] = {0xa4, 0x06, 0xc1}; + +/*******************************************/ + +#endif + diff --git a/src/app/demo/app_tp_transfer.c b/src/app/demo/app_tp_transfer.c new file mode 100644 index 0000000..3c747d2 --- /dev/null +++ b/src/app/demo/app_tp_transfer.c @@ -0,0 +1,912 @@ +/******************************************************************************* +* +* +* File: app_tp_transfer.c +* Description touch I2C/SPI ʼԼͨ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#include "test_cfg_global.h" +#include "app_tp_transfer.h" +#include "hal_i2c_master.h" +#include "hal_i2c_slave.h" +#include "hal_spi_master.h" +#include "hal_spi_slave.h" +#include "tau_log.h" +#include "tau_delay.h" + +#if 1//def AP_TP_TRANSFER +uint8_t read_point; //ǰҪıһ8BYTE +uint8_t s_screen_number[2]; +uint8_t s_screen_temp[2]; +//uint8_t s_screen_read_bak[200]; +static uint8_t s_screen_read_buffer[BUFFER_SIZE_MAX]; +static uint8_t s_phone_read_buffer[BUFFER_SIZE_MAX]; + +static bool s_spim_write = false; //¼SPIǷ÷ͣǵĻҪRXFIFO +static bool s_screen_int_flag = false; //¼ǷյĻıж +static bool s_phone_reset_flag = false; //¼ǷյֻĿλź +static bool s_screen_int_transfer_status = false; //¼ǷѾʼͨ +bool s_screen_init_complate = false; //ĻTPʼɱ־ +static uint8_t s_screen_const_transfer_count = 0xff; //¼ǰͨŵһ,ʼֵ screen_reg_start_data_size + +#ifdef USE_FOR_SUMSUNG_S20 +uint16_t u16TouchID; +#endif + +static void app_tp_transfer_phone(size_t recieve_num); +//static void app_tp_reset_callback(void *data); +#if PHONE_SLAVE_TRANSFER_I2C //warning + static void app_tp_i2cs_callback(e_i2c_s_int_status int_status, size_t recieve_num); +#endif +#if PHONE_SLAVE_TRANSFER_SPI //warning + static void app_tp_spis_callback(hal_spis_event_e event, hal_spi_packet_info_t *packet_info); +#endif + +#ifdef USE_FOR_SAMSUNG_NOTE20 +uint8_t MI10_PRO_screen_init_data1[3] = {0xA0,0x00,0x01}; +uint8_t MI10_PRO_screen_init_data2[6] = {0xA2,0x03,0x00,0x00,0x00,0x03}; +uint8_t MI10_PRO_screen_init_data3[3] = {0xA2,0x02,0x00}; +uint8_t MI10_PRO_screen_init_data4[3] = {0xC0,0x07,0x01}; + +uint8_t MI10_PRO_screen_init_data5[3] = {0xA4,0x06,0x70}; +uint8_t MI10_PRO_screen_init_data6[3] = {0xA6,0x00,0x00}; +uint8_t MI10_PRO_screen_init_data7[5] = {0xFA,0x20,0x00,0x00,0x78}; + +uint8_t MI10_PRO_screen_init_data8[6] = {0xA2,0x03,0x20,0x00,0x00,0x00}; +uint8_t MI10_PRO_screen_init_data9[2] = {0xA0,0x01}; +uint8_t MI10_PRO_screen_init_data10[3] = {0xA0,0x00,0x00}; +#endif + + + +uint8_t MI10_PRO_TP_Tuning_data2[3] = {0xA4,0x00,0x03}; // FPnl Init +uint8_t MI10_PRO_TP_Tuning_data3[3] = {0xA4,0x00,0x02}; // Pnl Init +uint8_t MI10_PRO_TP_Tuning_data4[4] = {0xA4,0x03,0x13,0x00}; // TuneM +uint8_t MI10_PRO_TP_Tuning_data5[4] = {0xA4,0x03,0x0C,0x00}; // TuneS +uint8_t MI10_PRO_TP_Tuning_data6[3] = {0xA4,0x05,0x01}; // SvCfg +uint8_t MI10_PRO_TP_Tuning_data7[3] = {0xA4,0x05,0x02}; // SvCx +uint8_t MI10_PRO_TP_Tuning_data8[3] = {0xA4,0x05,0x04}; // SvPnl + + + + + +/************************************************************************** +* @name : app_tp_screen_int_callback +* @brief : screen ж ص +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_screen_int_callback(void *data) +{ + s_screen_int_flag = true; +} + +/************************************************************************** +* @name : app_tp_screen_int_lvl_low +* @brief : ȡ screen ж IO ƽ +* @param[in] : +* @return : trueIO Ϊ͵ƽ +* @retval : +**************************************************************************/ +static bool app_tp_screen_int_lvl_low(void) +{ +#if SCREEN_MASTER_TRANSFER_I2C + return false; +#elif SCREEN_MASTER_TRANSFER_SPI + return !hal_gpio_get_input_data(g_screen_input_int_pad); //ӦSPIͨŹżͻȻCS ͨ쳣 +#else + return false; +#endif +} + +/************************************************************************** +* @name : app_tp_screen_int_init +* @brief : screen ж IO ʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_screen_int_init(void) +{ + hal_gpio_set_pull_state(g_screen_input_int_pad, ENABLE, DISABLE); // 1. + hal_gpio_ctrl_eint(g_screen_input_int_pad, DISABLE); // 2.رж + hal_gpio_init_eint(g_screen_input_int_pad, DETECT_FALLING_EDGE); // 3.жϳʼ,TPһ㶼½شж + hal_gpio_reg_eint_cb(g_screen_input_int_pad, app_tp_screen_int_callback); // 4.עص + hal_gpio_ctrl_eint(g_screen_input_int_pad, ENABLE); // 5.ʹж +} + +#if 0 +/************************************************************************** +* @name : app_tp_phone_reset_init +* @brief : phone reset ж IO ʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_phone_reset_init(void) +{ + /*0.Ϊ*/ + hal_gpio_init_input(g_phone_input_rst_pad); + /*1.رж*/ + hal_gpio_ctrl_eint(g_phone_input_rst_pad, DISABLE); + /*2.жϳʼ*/ + hal_gpio_init_eint(g_phone_input_rst_pad, DETECT_RISING_EDGE); + /*3.עص*/ + hal_gpio_reg_eint_cb(g_phone_input_rst_pad, app_tp_reset_callback); + /*4.ʹж*/ + hal_gpio_ctrl_eint(g_phone_input_rst_pad, ENABLE); +} +#endif + + +/************************************************************************** +* @name : app_tp_screen_init +* @brief : screen IO 䣬ʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_screen_init(void) +{ + hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); + delayUs(200); + hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_LOW); + delayUs(200); + hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); +} + +void app_tp_I2C_init(void) +{ + hal_i2c_s_init(CHIP_I2C_ADDRESS, CHIP_I2C_ADDR_BITS); + hal_i2c_s_set_transfer(app_tp_i2cs_callback); + hal_i2c_s_nonblocking_read(s_phone_read_buffer, BUFFER_SIZE_MAX); //ý buffer +} + + + +/************************************************************************** +* @name : app_tp_init +* @brief : ʼͨ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_init(void) +{ +#ifdef DISABLE_TDDI_I2C_FUNCTION + hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO + hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET + + hal_gpio_set_mode(IO_PAD_TD_SPIM_CLK,IO_MODE_I2C1_SCL); + hal_gpio_set_mode(IO_PAD_TD_SPIM_CSN,IO_MODE_I2C1_SDA); + + return; +#else + hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CLK, ENABLE, DISABLE); + hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CSN, ENABLE, DISABLE); +#endif + + app_tp_screen_init(); //ʼֻλIO +//app_tp_screen_int_init(); //screenж +#ifdef G_PHONE_INT_DEFAULT_LOW + hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_LOW); //phoneжIO +#else + hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO +#endif + hal_gpio_init_input(g_screen_input_int_pad); + hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET + +#if SCREEN_MASTER_TRANSFER_I2C + hal_i2c_m_dma_init(SCREEN_I2C_ADDRESS, SCREEN_I2C_ADDR_BITS, I2C_MASTER_SPEED); +#elif SCREEN_MASTER_TRANSFER_SPI + hal_spi_m_dma_init(SPI_MASTER_SPEED, SCREEN_SPI_CPHA, SCREEN_SPI_CPOL); +#endif + +#if PHONE_SLAVE_TRANSFER_I2C +// hal_i2c_s_init(CHIP_I2C_ADDRESS, CHIP_I2C_ADDR_BITS); +// hal_i2c_s_set_transfer(app_tp_i2cs_callback); +// hal_i2c_s_nonblocking_read(s_phone_read_buffer, BUFFER_SIZE_MAX); //ý buffer +#elif PHONE_SLAVE_TRANSFER_SPI + hal_spi_slave_init(PHONE_SPI_CPHA, PHONE_SPI_CPOL, true); // ʼspiԼdma + hal_spi_slave_register_callback(app_tp_spis_callback); // עص + hal_spi_slave_auto_transfer_abort(); // ֹͣ + hal_spi_slave_flush_fifo(); // Flush FIFO + + /* ÿpacketԶ, circle mode Ϊfalse, յbuffer max sizeݺbufferٸ, packetɺûص */ + hal_spi_slave_set_auto_rx_buffer(s_phone_read_buffer, BUFFER_SIZE_MAX, false); // auto rx buffer + hal_spi_slave_set_auto_tx_buffer(phone_reg_const_data[0].write_back, phone_reg_const_data[0].write_back_size, false); // TX BUFFER + + hal_spi_slave_enable(); // spis + hal_spi_slave_auto_transfer_start(); // rxԶ +#endif +} + + +/************************************************************************** +* @name : app_tp_m_transfer_complate +* @brief : ȡͨ״̬ +* @param[in] : +* @return :true: ͨ +* @retval : +**************************************************************************/ +bool app_tp_m_transfer_complate(void) +{ +#if SCREEN_MASTER_TRANSFER_I2C + return hal_i2c_m_transfer_complate(); +#elif SCREEN_MASTER_TRANSFER_SPI + return hal_spi_m_get_transfer_complate(); +#else + return true; +#endif +} + +/************************************************************************** +* @name : app_tp_s_transfer_complate +* @brief : ȡӻͨ״̬ +* @param[in] : +* @return :true: ͨ +* @retval : +**************************************************************************/ +bool app_tp_s_transfer_complate(void) +{ +#if SCREEN_MASTER_TRANSFER_I2C + return hal_i2c_s_write_complate() && hal_i2c_s_read_complate(); +#elif SCREEN_MASTER_TRANSFER_SPI + return !hal_spi_slave_busy(); +#else + return true; +#endif +} + +/************************************************************************** +* @name : app_tp_m_write +* @brief : ͨŷʽ÷txbufferе +* @param[in] :txbuffer: buffer ͷַ +* @param[in] :buffer_size: buffer +* @return : +* @retval : +**************************************************************************/ +static void app_tp_m_write(const uint8_t *txbuffer, size_t buffer_size) +{ +#if SCREEN_MASTER_TRANSFER_I2C + hal_i2c_m_dma_write(txbuffer, buffer_size); +#elif SCREEN_MASTER_TRANSFER_SPI + hal_spi_m_dma_write(txbuffer, buffer_size); + s_spim_write = true; +#endif +} + +/************************************************************************** +* @name : app_tp_m_read +* @brief : ͨŷʽ÷txbufferеݺrxbuffer +* @param[in] :cmd: buffer ͷַ +* @param[in] :cmd_size: buffer +* @param[in] :data_buffer: ȡ buffer ͷַ +* @param[in] :data_size: ȡ buffer +* @return : +* @retval : +**************************************************************************/ +static void app_tp_m_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size) +{ +#if SCREEN_MASTER_TRANSFER_I2C + uint8_t i = 0; + uint32_t address = 0; + + for (i = 0; i < cmd_size; i++) //ȽҪ͵ϵ address + { + address |= (uint32_t)cmd[i] << i * 8; + } + hal_i2c_m_dma_read(address, cmd_size, data_buffer, data_size); +#elif SCREEN_MASTER_TRANSFER_SPI + hal_spi_m_dma_read(cmd, cmd_size, data_buffer, data_size); +#endif +} + +/************************************************************************** +* @name : app_tp_s_write +* @brief : ͨŷʽ÷txbufferе +* @param[in] :txbuffer: buffer ͷַ +* @param[in] :buffer_size: buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size) +{ +#if PHONE_SLAVE_TRANSFER_I2C + hal_i2c_s_dma_write(txbuffer, buffer_size); +#elif PHONE_SLAVE_TRANSFER_SPI + //while (hal_spi_slave_busy()); + hal_spi_slave_auto_transfer_abort(); + hal_spi_slave_flush_fifo(); + hal_spi_slave_set_auto_tx_buffer(txbuffer, buffer_size, true); + hal_spi_slave_auto_transfer_start(); +#endif +} + +/************************************************************************** +* @name : app_tp_s_read +* @brief : ͨŷʽrxbuffer +* @param[in] :rxBuffer: ȡ buffer ͷַ +* @param[in] :data_size: ȡ buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_s_read(void *rxBuffer, size_t data_size) +{ +#if PHONE_SLAVE_TRANSFER_I2C + hal_i2c_s_nonblocking_read(rxBuffer, data_size); +#endif +} + +/************************************************************************** +* @name : app_tp_spis_callback +* @brief : SPI slave жϴ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +#if PHONE_SLAVE_TRANSFER_I2C //warning +//ԡint_status=0Ϊ=2ΪSTOP=1δԵ +//recieve_numΪյָ +static void app_tp_i2cs_callback(e_i2c_s_int_status int_status, size_t recieve_num) +{ +#if 0 // 1: test + if (int_status >2) + { + s_phone_read_buffer[2]=int_status; + s_phone_read_buffer[3]=recieve_num; + app_tp_m_write(s_phone_read_buffer, 4); + } +#endif + app_tp_transfer_phone(recieve_num); +} +#endif + +/************************************************************************** +* @name : app_tp_spis_callback +* @brief : SPI slave жϴ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +#if PHONE_SLAVE_TRANSFER_SPI //warning +static void app_tp_spis_callback(hal_spis_event_e event, hal_spi_packet_info_t *packet_info) +{ + app_tp_transfer_phone(packet_info->packet_size); +} +#endif + +#if 0 +/************************************************************************** +* @name : app_tp_reset_callback +* @brief : ֻ IO临λжϴ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_reset_callback(void *data) +{ + TAU_LOGD("app_tp_reset_callback\n"); + s_phone_reset_flag = true; + app_tp_s_write(phone_reg_const_data[0].write_back, phone_reg_const_data[0].write_back_size); +#if PHONE_SLAVE_TRANSFER_SPI + hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW); +#endif +} +#endif + + +void S20_Start_init(void) +{ + uint8_t len=0; + // if(phone_start_flag==1) + { + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + delayMs(2); + while(!hal_gpio_get_input_data(g_screen_input_int_pad)) + { + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + delayMs(2); + } + app_tp_m_write(MI10_PRO_screen_init_data1, sizeof(MI10_PRO_screen_init_data1));//0xA0,0x00,0x01 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_screen_init_data2, sizeof(MI10_PRO_screen_init_data2));//0xA2,0x03,0x00,0x00,0x00,0x03 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_screen_init_data3, sizeof(MI10_PRO_screen_init_data3));//0xA2,0x02,0x00 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_screen_init_data4, sizeof(MI10_PRO_screen_init_data4));//0xC0,0x07,0x01 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + if(s_screen_read_buffer[7]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, len); + while(!hal_i2c_m_transfer_complate()); + } +#endif + if(hal_gpio_get_input_data(g_screen_input_int_pad)) + { + s_screen_init_complate = true; + app_tp_screen_int_init(); + phone_start_flag=0; + } + } +} + +/************************************************************************** +* @name : ap_tp_calibration +* @brief : ����У׼���� +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_calibration(void) +{ + // app_tp_m_write(MI10_PRO_TP_Tuning_data1, sizeof(MI10_PRO_TP_Tuning_data1)); // System Reset + // while(!hal_i2c_m_transfer_complate()); + // delayMs(10); + app_tp_m_write(MI10_PRO_TP_Tuning_data2, sizeof(MI10_PRO_TP_Tuning_data2)); // FPnl Init + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data3, sizeof(MI10_PRO_TP_Tuning_data3)); // Pnl Init + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data4, sizeof(MI10_PRO_TP_Tuning_data4)); // TuneM + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data5, sizeof(MI10_PRO_TP_Tuning_data5)); // TuneS + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data6, sizeof(MI10_PRO_TP_Tuning_data6)); // SvCfg + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data7, sizeof(MI10_PRO_TP_Tuning_data7)); // SvCx + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_TP_Tuning_data8, sizeof(MI10_PRO_TP_Tuning_data8)); // SvPnl + while(!hal_i2c_m_transfer_complate()); + delayMs(1); +} + +/************************************************************************** +* @name : app_tp_transfer_screen_const +* @brief : flowдscreen screen ʼ +* @param[in] : +* @return : +* @retval : +*޸TP1ģʼ +*ִscreen_reg_start_data[] +**************************************************************************/ +static void app_tp_transfer_screen_const(void) +{ +// static bool screen_const_transfer_buffer_ready = true; // buffer Ƿ׼ + uint8_t ii; +// uint8_t len=0; + /**** 1. жϵǰ״̬ͨѽ, ״̬ͨѽҿʼ̻δ****/ +#if 0 // test + uint8_t test_master_read_buffer[10] = {0x08, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; + uint8_t write_buffer[10] = {0x04, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; + +// for (ii =0x20; ii<0x7F; ii++) + { + //hal_i2c_m_dma_init(ii, SCREEN_I2C_ADDR_BITS); + //delayMs(100); + if (hal_i2c_m_dma_write(write_buffer, 1)) + { + //break; + } + while(!hal_i2c_m_transfer_complate()); + hal_i2c_m_dma_read(test_master_read_buffer, 1, test_master_read_buffer, 2); + } +#endif + + + if (app_tp_m_transfer_complate() && (s_screen_const_transfer_count < screen_reg_start_data_size)) + { + if (s_spim_write) //SPI дݺҪѽFIFOݶȻӰһζȡ + { + hal_spi_m_clear_rxfifo(); + s_spim_write = false; + } + + #if 1 + +// #ifndef USE_FOR_SUMSUNG_S20 +// for (ii =0; ii= screen_reg_start_data_size) + { + s_screen_init_complate = true; + } + } + #endif + } +} + +/************************************************************************** +* @name : app_tp_transfer_screen_start +* @brief : flowдscreenʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_transfer_screen_start(void) +{ +// s_screen_init_complate = false; + s_screen_const_transfer_count = 0; + //app_tp_screen_init(); +#ifndef DISABLE_I2C_INIT_CODE + app_tp_transfer_screen_const(); +#endif +// s_screen_int_flag = false; +} + +/************************************************************************** +* @name : app_tp_transfer_screen_int +* @brief : screenжϺ󣬰flowдscreenЭת +* @param[in] : +* @return : +* @retval : +*޸TP2ȡģ鱨㣡 +*ִscreen_reg_int_data[]ҲԼд +**************************************************************************/ +void app_tp_transfer_screen_int(void) +{ + uint8_t len=0; + bool screen_gpio_int = false; + static uint8_t screen_int_transfer_count = 0; //¼ǰͨŵһ + static bool screen_int_transfer_buffer_ready = true; // buffer Ƿ׼ + // static uint8_t test_flag = 0; + // s_screen_init_complate=false;//Ϊ¼⽫ƬΪ·ݣFT8719̩ĹͨѶ + if (!s_screen_init_complate) //TP ʼδɣȽгʼ + { + app_tp_transfer_screen_const(); + return; + } + +#if 0 //test + test_flag++; + if (test_flag >1000000) + { + test_flag =0; + //TAU_LOGD("Run ok!!\n"); + //app_tp_m_read(screen_reg_int_data[0].buffer, screen_reg_int_data[0].txbuffer_size, s_screen_number, screen_reg_int_data[0].rxbuffer_size); + //while(!hal_i2c_m_transfer_complate()); + } +#endif + + /**** 1. ж screen Ƿ񷢳жź ****/ + // s_screen_int_flag: жźű־λ + // app_tp_screen_int_lvl_low : SPI ʱͨʱżcsߵͨ쳣ñ־λڽ + screen_gpio_int = s_screen_int_flag || app_tp_screen_int_lvl_low(); + if (((screen_gpio_int) || (s_screen_int_transfer_status)) && app_tp_m_transfer_complate()) //жϵǰͨ״̬׼ͨ + { + s_screen_int_flag = false; + if (s_spim_write) //SPI дݺҪѽFIFOݶȻӰһζȡ + { + hal_spi_m_clear_rxfifo(); + s_spim_write = false; + } + + /**** 2. ͻȡӻ ****/ + if (screen_int_transfer_buffer_ready) + { + #ifndef READ_MODULE_TP_ONE_BY_ONE + screen_int_transfer_buffer_ready = false; + s_screen_int_transfer_status = true; + #ifdef USE_FOR_SAMSUNG_NOTE20 + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + if(s_screen_read_buffer[7]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); + while(!hal_i2c_m_transfer_complate()); + } + delayMs(2); + while(!hal_gpio_get_input_data(g_screen_input_int_pad)) + { + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + delayMs(2); + if(s_screen_read_buffer[7]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); + while(!hal_i2c_m_transfer_complate()); + delayMs(2); + } + } + #else + app_tp_m_read(screen_reg_int_data[0].buffer, screen_reg_int_data[0].txbuffer_size, s_screen_temp, screen_reg_int_data[0].rxbuffer_size); + while(!hal_i2c_m_transfer_complate()); + app_tp_m_read(screen_reg_int_data[1].buffer, screen_reg_int_data[1].txbuffer_size, s_screen_number, screen_reg_int_data[1].rxbuffer_size); + while(!hal_i2c_m_transfer_complate()); + //TAU_LOGD("s_screen_number[%4x], size[%4x]", ((s_screen_number[1]<<8)|s_screen_number[0]), ((s_screen_temp[1]<<8)|s_screen_temp[0])); + + if(s_screen_number[1]) + { + if (s_screen_number[1]>3) + { + read_point =1; + s_screen_int_transfer_status = false; + } + else if (s_screen_number[1] &0x02) + read_point =10; + else + read_point =9; + } + else + { + if(s_screen_number[0] &0x80) + read_point =8; + else if(s_screen_number[0] &0x40) + read_point =7; + else if(s_screen_number[0] &0x20) + read_point =6; + else if(s_screen_number[0] &0x10) + read_point =5; + else if(s_screen_number[0] &0x08) + read_point =4; + else if(s_screen_number[0] &0x04) + read_point =3; + else if(s_screen_number[0] &0x02) + read_point =2; + else + read_point =1; + } + read_point =8*read_point; + app_tp_m_read(screen_reg_int_data[2].buffer, screen_reg_int_data[2].txbuffer_size, s_screen_read_buffer, read_point); + while(!hal_i2c_m_transfer_complate()); + #endif + #else + if (!screen_reg_int_data[screen_int_transfer_count].read_flag) //ǰͨŲҪأֱд + { + app_tp_m_write(screen_reg_int_data[screen_int_transfer_count].buffer, screen_reg_int_data[screen_int_transfer_count].txbuffer_size); + } + else //ǰͨҪأдٶ + { + s_screen_int_transfer_status = true; + if (screen_int_transfer_count==0) + { + app_tp_m_read(screen_reg_int_data[screen_int_transfer_count].buffer, screen_reg_int_data[screen_int_transfer_count].txbuffer_size, \ + s_screen_temp, screen_reg_int_data[screen_int_transfer_count].rxbuffer_size); + screen_int_transfer_count =1; + } + else if (screen_int_transfer_count==1) + { + app_tp_m_read(screen_reg_int_data[screen_int_transfer_count].buffer, screen_reg_int_data[screen_int_transfer_count].txbuffer_size, \ + s_screen_number, screen_reg_int_data[screen_int_transfer_count].rxbuffer_size); + screen_int_transfer_count =2; + } + else if (screen_int_transfer_count==2) + { + if(s_screen_number[1]) + { + TAU_LOGD("s_screen_number[%4x], size[%4x]", ((s_screen_number[1]<<8)|s_screen_number[0]), ((s_screen_temp[1]<<8)|s_screen_temp[0])); + if (s_screen_number[1] &0x02) + read_point =10; + else + read_point =9; + } + else + { + if(s_screen_number[0] &0x80) + read_point =8; + else if(s_screen_number[0] &0x40) + read_point =7; + else if(s_screen_number[0] &0x20) + read_point =6; + else if(s_screen_number[0] &0x10) + read_point =5; + else if(s_screen_number[0] &0x08) + read_point =4; + else if(s_screen_number[0] &0x04) + read_point =3; + else if(s_screen_number[0] &0x02) + read_point =2; + else + read_point =1; + } + read_point =8*read_point; + + app_tp_m_read(screen_reg_int_data[screen_int_transfer_count].buffer, screen_reg_int_data[screen_int_transfer_count].txbuffer_size, \ + s_screen_read_buffer, read_point); + screen_int_transfer_count =0; + screen_int_transfer_buffer_ready = false; + } + } + #endif + app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer,screen_reg_int_data[2].rxbuffer_size); + } + /**** 3. ͨݣ׼һͨŵbuffer ****/ + else + { + #if 1 + #ifdef USE_FOR_SUMSUNG_S20 + u16TouchID=0x0000; + #endif + screen_int_transfer_buffer_ready = true; + screen_int_transfer_count = app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer,screen_reg_int_data[2].rxbuffer_size); + screen_int_transfer_count = 0; + s_screen_int_transfer_status = false; + + #else + screen_int_transfer_buffer_ready = true; + screen_int_transfer_count = app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer, \ + screen_reg_int_data[screen_int_transfer_count].rxbuffer_size); + + if (screen_int_transfer_count > screen_reg_int_data_size) //ҪһͨŽһݽֹͣͨ + { + screen_int_transfer_count = 0; + s_screen_int_transfer_status = false; + return; + } + #endif + } + } +} + +/************************************************************************** +* @name : app_tp_transfer_phone +* @brief : ݽӦĴ +* @param[in] : recieve_numݳ +* @return : +* @retval : +**************************************************************************/ +static void app_tp_transfer_phone(size_t recieve_num) +{ + const uint8_t *phone_write_buffer; + size_t phone_write_buffer_size = 0; + /* ݽжǷҪԼ𸴵bufferָ */ + if (recieve_num > 0) + { + #if 0// 1: test + s_phone_read_buffer[3]=recieve_num; + app_tp_m_write(s_phone_read_buffer, 4); + #endif + app_tp_phone_analysis_data(s_phone_read_buffer, recieve_num, &phone_write_buffer, &phone_write_buffer_size); + } + + app_tp_s_read(s_phone_read_buffer, BUFFER_SIZE_MAX); + if (phone_write_buffer_size) //0ʾҪֻ÷buffer + { + app_tp_s_write(phone_write_buffer, phone_write_buffer_size); + } +} + +/************************************************************************** +* @name : app_tp_phone_reset_on +* @brief : ȡֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +bool app_tp_phone_reset_on(void) +{ + return s_phone_reset_flag; +} + +/************************************************************************** +* @name : app_tp_phone_clear_reset_on +* @brief : ֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_phone_clear_reset_on(void) +{ + s_phone_reset_flag = false; +} + +#else + +void app_tp_screen_init(void) +{ + +} + +void app_tp_init(void) +{ + +} + +void app_tp_transfer_screen_int(void) +{ + +} + +void app_tp_transfer_screen_start(void) +{ + +} + +bool app_tp_phone_reset_on(void) +{ + return false; +} + +void app_tp_phone_clear_reset_on(void) +{ + +} + +void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size) +{ + +} + +bool app_tp_enter_sleep_on(void) +{ + return false; +} + +#endif + diff --git a/src/app/demo/app_tp_transfer.h b/src/app/demo/app_tp_transfer.h new file mode 100644 index 0000000..877620c --- /dev/null +++ b/src/app/demo/app_tp_transfer.h @@ -0,0 +1,105 @@ +/******************************************************************************* +* +* +* File: app_tp_transfer.h +* Description touch I2C/SPI ͨغ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __APP_TP_TRANSFER_H__ +#define __APP_TP_TRANSFER_H__ + +#include "string.h" +#include "tau_device_datatype.h" +#include "tau_common.h" + +#define SCREEN_TRANSFER_WRITE false //յscreen ioжϣ֮ö +#define SCREEN_TRANSFER_READ true //յscreen ioжϣ֮Ҫ + +/************************************************************************** +* @name : ap_tp_calibration +* @brief : ����У׼���� +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_calibration(void); + + +/************************************************************************** +* @name : app_tp_screen_init +* @brief : screen IO 䣬ʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_screen_init(void); + +/************************************************************************** +* @name : app_tp_init +* @brief : ʼͨ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_init(void); + +/************************************************************************** +* @name : app_tp_transfer_screen_int +* @brief : screenжϺ󣬰flowдscreenЭת +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_transfer_screen_int(void); + +/************************************************************************** +* @name : app_tp_transfer_screen_start +* @brief : flowдscreenʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_transfer_screen_start(void); + +/************************************************************************** +* @name : app_tp_phone_reset_on +* @brief : ȡֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +bool app_tp_phone_reset_on(void); + +/************************************************************************** +* @name : app_tp_phone_clear_reset_on +* @brief : ֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_phone_clear_reset_on(void); + +/************************************************************************** +* @name : app_tp_s_write +* @brief : ͨŷʽ÷txbufferе +* @param[in] :txbuffer: buffer ͷַ +* @param[in] :buffer_size: buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size); + +/************************************************************************** +* @name : app_tp_enter_sleep_on +* @brief : ȡ tp ͨ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +bool app_tp_enter_sleep_on(void); + +#endif + diff --git a/src/app/main.c b/src/app/main.c new file mode 100644 index 0000000..a3b4715 --- /dev/null +++ b/src/app/main.c @@ -0,0 +1,26 @@ +#include +#include +#include +#include "test_cfg_global.h" +#include "tau_log.h" +#include "hal_system.h" +#include "board.h" +#include "tau_delay.h" + + + +//test_cfg_global.h file choice what you want test or completely demo of S8 or S8+ Felix + +int main() +{ +// hal_system_init(); + board_Init(); + + while (1) + { +#if _DEMO_S8_EN + ap_demo(); +#endif + while (1); + } +} diff --git a/src/app/test_cfg_global.h b/src/app/test_cfg_global.h new file mode 100644 index 0000000..37f4546 --- /dev/null +++ b/src/app/test_cfg_global.h @@ -0,0 +1,84 @@ +/******************************************************************************* +* Copyright (C) 2019-2022, 518 Systems (R),All Rights Reserved. +* +* File: test_cfg_global.h +* Description ȫͷļ +* Version V0.1 +* Date 2021-05-01 +* Author kevin + *******************************************************************************/ + +#ifndef __TEST_GLOBAL_CONFIG_H__ +#define __TEST_GLOBAL_CONFIG_H__ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +#define _TEST_TIMER_EN 0 +#define _TEST_DSI_TX_EN 0 +#define _TEST_DSI_RX_EN 0 +#define _TEST_PWM_EN 0 +#define _TEST_SWIRE_EN 0 +#define _TEST_WDG_EN 0 +#define _TEST_GPIO_EN 0 +#define _TEST_I2C_EN 0 +#define _TEST_SPI_EN 0 + +#define _DEMO_S8_EN 1 +#define _DEMO_S8P_EN 0 +#if _TEST_TIMER_EN + #include "test_hal_timer.h" +#endif + +#if _TEST_I2C_EN + #include "test_hal_i2c.h" +#endif + +#if _TEST_SPI_EN + #include "test_hal_spi.h" +#endif + +#if _TEST_DSI_TX_EN + #include "test_hal_dsi_tx.h" +#endif + +#if _TEST_DSI_RX_EN + #include "test_hal_dsi_rx.h" +#endif + +#if _TEST_PWM_EN + #include "test_hal_pwm.h" +#endif + +#if _TEST_SWIRE_EN + #include "test_hal_swire.h" +#endif + +#if _TEST_WDG_EN + #include "test_hal_wdg.h" +#endif + +#if _TEST_GPIO_EN + #include "test_hal_gpio.h" +#endif + +#if _TEST_I2C_TP_EN + #include "test_hal_i2c_tp.h" +#endif + +#if _DEMO_S8_EN + #include "ap_demo.h" + #include "app_tp_for_custom_s8.h" +#endif + +#if _DEMO_S8P_EN + #include "s8p_demo.h" + #include "app_tp_for_custom_s8p.h" +#endif + +#endif + diff --git a/src/board/board.c b/src/board/board.c new file mode 100644 index 0000000..aea5ad9 --- /dev/null +++ b/src/board/board.c @@ -0,0 +1,26 @@ +/******************************************************************************* +* Copyright (C) 2019-2022, ISP Systems (R),All Rights Reserved. +* +* File: board.c +* Description 板级文件 +* Version V0.1 +* Date 2020-12-07 +* Author linyw +*******************************************************************************/ +#include "board.h" +#include "hal_system.h" +#include "ArmCM0.h" + +void board_Init(void) +{ + hal_system_init(SYSTEM_CLOCK); + hal_system_enable_systick(1); +#if !EDA_MODE + hal_system_init_console(115200); +#endif +#if defined(ISP_568) || defined(ISP_368) + /* 从EFUSE读取DPHY校准值并设置 */ + hal_system_set_phy_calibration(true); +#endif +} + diff --git a/src/board/board.h b/src/board/board.h new file mode 100644 index 0000000..b450fd3 --- /dev/null +++ b/src/board/board.h @@ -0,0 +1,16 @@ +/******************************************************************************* +* Copyright (C) 2019-2022, CVA Systems (R),All Rights Reserved. +* +* File: board.h +* Description: baord 初始化头文件 +* Version: V0.1 +* Date: 2020-01-08 +* Author: lzy + *******************************************************************************/ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +void board_Init(void); + +#endif diff --git a/src/board/startup/startup_ARMCM0.s b/src/board/startup/startup_ARMCM0.s new file mode 100644 index 0000000..4a17757 --- /dev/null +++ b/src/board/startup/startup_ARMCM0.s @@ -0,0 +1,226 @@ +;/**************************************************************************//** +; * @file startup_ARMCM0.s +; * @brief CMSIS Core Device Startup File for +; * ARMCM0 Device +; * @version V5.4.0 +; * @date 12. December 2018 +; ******************************************************************************/ +;/* +; * Copyright (c) 2009-2018 Arm Limited. All rights reserved. +; * +; * SPDX-License-Identifier: Apache-2.0 +; * +; * Licensed under the Apache License, Version 2.0 (the License); you may +; * not use this file except in compliance with the License. +; * You may obtain a copy of the License at +; * +; * www.apache.org/licenses/LICENSE-2.0 +; * +; * Unless required by applicable law or agreed to in writing, software +; * distributed under the License is distributed on an AS IS BASIS, WITHOUT +; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +; * See the License for the specific language governing permissions and +; * limitations under the License. +; */ + +;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ + + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00001000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +__stack_limit +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000C00 + + IF Heap_Size != 0 ; Heap is provided + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + ENDIF + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; -14 NMI Handler + DCD HardFault_Handler ; -13 Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; -5 SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; -2 PendSV Handler + DCD SysTick_Handler ; -1 SysTick Handler + + + ; Interrupts + DCD VIDC_IRQn_Handler ; 0 Interrupt 0 + DCD LCDC_IRQn_Handler ; 1 Interrupt 1 + DCD MIPI_RX_IRQn_Handler ; 2 Interrupt 2 + DCD MIPI_TX_IRQn_Handler ; 3 Interrupt 3 + DCD MEMC_IRQn_Handler ; 4 Interrupt 4 + DCD VPRE_IRQn_Handler ; 5 Interrupt 5 + DCD FLSCTRL_IRQn_Handler ; 6 Interrupt 6 + DCD DMA_IRQn_Handler ; 7 Interrupt 7 + DCD TIMER0_IRQn_Handler ; 8 Interrupt 8 + DCD TIMER1_IRQn_Handler ; 9 Interrupt 9 + DCD TIMER2_IRQn_Handler ; 10 Interrupt 10 + DCD TIMER3_IRQn_Handler ; 11 Interrupt 11 + DCD WDG_IRQn_Handler ; 12 Interrupt 12 + DCD UART_IRQn_Handler ; 13 Interrupt 13 + DCD I2C0_IRQn_Handler ; 14 Interrupt 14 + DCD I2C1_IRQn_Handler ; 15 Interrupt 15 + DCD SPIS_IRQn_Handler ; 16 Interrupt 16 + DCD SPIM_IRQn_Handler ; 17 Interrupt 17 + DCD ADC_IRQn_Handler ; 18 Interrupt 18 + DCD PWMDET_IRQn_Handler ; 19 Interrupt 19 + DCD OTP_IRQn_Handler ; 20 Interrupt 20 + DCD SWIRE_IRQn_Handler ; 21 Interrupt 21 + DCD PVD_IRQn_Handler ; 22 Interrupt 22 + DCD AP_NRESET_IRQn_Handler ; 23 Interrupt 23 + DCD EXTI_INT0_IRQn_Handler ; 24 Interrupt 24 + DCD EXTI_INT1_IRQn_Handler ; 25 Interrupt 25 + DCD EXTI_INT2_IRQn_Handler ; 26 Interrupt 26 + DCD EXTI_INT3_IRQn_Handler ; 27 Interrupt 27 + DCD EXTI_INT4_IRQn_Handler ; 28 Interrupt 28 + DCD EXTI_INT5_IRQn_Handler ; 29 Interrupt 29 + DCD EXTI_INT6_IRQn_Handler ; 30 Interrupt 30 + DCD EXTI_INT7_IRQn_Handler ; 31 Interrupt 31 + + SPACE ( 0 * 4) ; Interrupts 10 .. 31 are left out + +__Vectors_End +__Vectors_Size EQU __Vectors_End - __Vectors +_NVIC_ICER0 EQU 0xE000E180 ;清中断使能寄存器地址 +_NVIC_ICPR0 EQU 0xE000E280 ;清中断pending寄存器地址 + + AREA |.text|, CODE, READONLY + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + +;清中断使能和pending ——开始—— + CPSID I ; 屏蔽中断 + LDR R0, =_NVIC_ICER0 + LDR R1, =_NVIC_ICPR0 + LDR R2, =0xFFFFFFFF + MOVS R3, #1 ; 设置循环次数 M0只有1组(32个)中断，故只需要循环1次 +_irq_clear + ;CBZ R3, _irq_clear_end + CMP R3,#0 ; 循环次数等于0，跳转到_irq_clear_end + BEQ _irq_clear_end + STR R2, [R0] ;,#4 ; NVIC_ICER0 - 清 enable IRQ 寄存器 + STR R2, [R1] ;,#4 ; NVIC_ICPR0 - 清 pending IRQ 寄存器 + SUBS R3, #1 ; 循环数自减1 + B _irq_clear +_irq_clear_end +;清中断使能和pending ——结束—— + CPSIE I ; 开启中断 + LDR R0, =__main + BX R0 + ENDP + + +; Macro to define default exception/interrupt handlers. +; Default handler are weak symbols with an endless loop. +; They can be overwritten by real handlers. + MACRO + Set_Default_Handler $Handler_Name +$Handler_Name PROC + EXPORT $Handler_Name [WEAK] + B . + ENDP + MEND + + +; Default exception/interrupt handler + + Set_Default_Handler NMI_Handler + Set_Default_Handler HardFault_Handler + Set_Default_Handler SVC_Handler + Set_Default_Handler PendSV_Handler + Set_Default_Handler SysTick_Handler + + Set_Default_Handler VIDC_IRQn_Handler + Set_Default_Handler LCDC_IRQn_Handler + Set_Default_Handler MIPI_RX_IRQn_Handler + Set_Default_Handler MIPI_TX_IRQn_Handler + Set_Default_Handler MEMC_IRQn_Handler + Set_Default_Handler VPRE_IRQn_Handler + Set_Default_Handler FLSCTRL_IRQn_Handler + Set_Default_Handler DMA_IRQn_Handler + Set_Default_Handler TIMER0_IRQn_Handler + Set_Default_Handler TIMER1_IRQn_Handler + + Set_Default_Handler TIMER2_IRQn_Handler + Set_Default_Handler TIMER3_IRQn_Handler + Set_Default_Handler WDG_IRQn_Handler + Set_Default_Handler UART_IRQn_Handler + Set_Default_Handler I2C0_IRQn_Handler + Set_Default_Handler I2C1_IRQn_Handler + Set_Default_Handler SPIS_IRQn_Handler + Set_Default_Handler SPIM_IRQn_Handler + Set_Default_Handler ADC_IRQn_Handler + Set_Default_Handler PWMDET_IRQn_Handler + + Set_Default_Handler OTP_IRQn_Handler + Set_Default_Handler SWIRE_IRQn_Handler + Set_Default_Handler PVD_IRQn_Handler + Set_Default_Handler AP_NRESET_IRQn_Handler + Set_Default_Handler EXTI_INT0_IRQn_Handler + Set_Default_Handler EXTI_INT1_IRQn_Handler + Set_Default_Handler EXTI_INT2_IRQn_Handler + Set_Default_Handler EXTI_INT3_IRQn_Handler + Set_Default_Handler EXTI_INT4_IRQn_Handler + Set_Default_Handler EXTI_INT5_IRQn_Handler + + Set_Default_Handler EXTI_INT6_IRQn_Handler + Set_Default_Handler EXTI_INT7_IRQn_Handler + ALIGN + + +; User setup Stack & Heap + + IF :LNOT::DEF:__MICROLIB + IMPORT __use_two_region_memory + ENDIF + + EXPORT __stack_limit + EXPORT __initial_sp + IF Heap_Size != 0 ; Heap is provided + EXPORT __heap_base + EXPORT __heap_limit + ENDIF + + END diff --git a/src/common/tau_common.h b/src/common/tau_common.h new file mode 100644 index 0000000..575a466 --- /dev/null +++ b/src/common/tau_common.h @@ -0,0 +1,216 @@ +/******************************************************************************* +* +* +* File: tau_common.h +* Description ͨضͷļ +* Version V0.1 +* Date 2020-09-07 +* Author lzy + *******************************************************************************/ + +#ifndef __TAU_COMMON_H +#define __TAU_COMMON_H + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "stdint.h" +#include "math.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +/** + * \name ͨó + * @{ + */ +//#define ENABLE 1 +//#define DISABLE 0 + +#define ON 1 +#define OFF 0 + +#define NONE 0 +#define EOS '\0' + +/* +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif +*/ + +#ifndef __cplusplus + #define true 1 + #define false 0 + #define bool _Bool +#endif /* ifndef __cplusplus */ + +#ifndef NULL + #define NULL ((void *)0) +#endif + +#define TAU_LITTLE_ENDIAN 1234 /**< \brief Сģʽ */ +#define TAU_BIG_ENDIAN 3412 /**< \brief ģʽ */ + +/** @} */ + +/******************************************************************************/ + +/** + * \name ú궨 + * @{ + */ + +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +#define TAU_INLINE inline +#define TAU_STATIC_INLINE static inline +#define TAU_STATIC static +#define TAU_CONST const +#define TAU_EXTERN extern + +#define MIN(x, y) (((x) < (y)) ? (x) : (y)) +#define MAX(x, y) (((x) > (y)) ? (x) : (y)) + +/** + * \brief ṹԱƫ + * \attention ͬƽ̨ϣڳԱСڴԭ + * ͬһṹԱƫƿDzһ + * + * \par ʾ + * \code + * struct my_struct { + * int m1; + * char m2; + * }; + * int offset_m2; + * + * offset_m2 = TAU_OFFSET(struct my_struct, m2); + * \endcode + */ +#define TAU_OFFSET(structure, member) ((uint32_t)(&(((structure *)0)->member))) + +/** @} */ + +/** + * \brief ͨṹԱָȡýṹԱĽṹ + * + * \param ptr ָṹԱָ + * \param type ṹ + * \param member ṹиóԱ + * + * \par ʾ + * \code + * struct my_struct = { + * int m1; + * char m2; + * }; + * struct my_struct my_st; + * char *p_m2 = &my_st.m2; + * struct my_struct *p_st = TAU_CONTAINER_OF(p_m2, struct my_struct, m2); + * \endcode + */ +#define TAU_CONTAINER_OF(ptr, type, member) \ + ((type *)((char *)(ptr)-TAU_OFFSET(type, member))) + +/** + * \brief ṹԱĴС + * + * \code + * struct a = { + * uint32_t m1; + * uint32_t m2; + * }; + * int size_m2; + * + * size_m2 = TAU_MEMBER_SIZE(a, m2); //size_m2 = 4 + * \endcode + */ +#define TAU_MEMBER_SIZE(structure, member) (sizeof(((structure *)0)->member)) + +/** + * \brief Ԫظ + * + * \code + * int a[] = {0, 1, 2, 3}; + * int element_a = TAU_NELEMENTS(a); // element_a = 4 + * \endcode + */ +#define TAU_NELEMENTS(array) (sizeof(array) / sizeof((array)[0])) + +/** + * \brief + * + * \param x + * \param align + * + * \code + * int size = TAU_ROUND_UP(15, 4); // size = 16 + * \endcode + */ +#define TAU_ROUND_UP(x, align) (((int)(x)/(align))*(align) + (((int)(x)%(align)) ? (align) : 0)) + +/** + * \brief + * + * \param x + * \param align + * + * \code + * int size = TAU_ROUND_DOWN(15, 4); // size = 12 + * \endcode + */ +#define TAU_ROUND_DOWN(x, align) (((int)(x)/(align))*(align)) + +/** \brief */ +#define TAU_DIV_ROUND_UP(n, d) (((n) + (d)-1) / (d)) + +/** + * \brief Ƿ + * + * \param x + * \param align أΪ2ij˷ + * + * \code + * if (TAU_ALIGNED(x, 4) { + * ; // x + * } else { + * ; // x + * } + * \endcode + */ +#define TAU_ALIGNED(x, align) (((int)(x) & (align - 1)) == 0) + +/** \brief 1ֽBCDתΪ16 */ +#define TAU_BCD_TO_HEX(val) (((val)&0x0f) + ((val) >> 4) * 10) + +/** \brief 1ֽ16תΪBCD */ +#define TAU_HEX_TO_BCD(val) ((((val) / 10) << 4) + (val) % 10) + +/** + * \brief ȡ + */ +#define TAU_CEIL(val) ceil(val) + + +/*! @brief Construct the version number for drivers. */ +#define MAKE_VERSION(major, minor, bugfix) (((major) << 16) | ((minor) << 8) | (bugfix)) + + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/* \brief ͨûصָ붨 */ +typedef void (*fcb_type)(void *data); + +#endif /* __TAU_COMMON_H */ diff --git a/src/common/tau_delay.h b/src/common/tau_delay.h new file mode 100644 index 0000000..aa3a2bf --- /dev/null +++ b/src/common/tau_delay.h @@ -0,0 +1,34 @@ +/** + * File Name: tau_delay.h + * + * + * + * Author: Fortsense 3D Firmware Team + * + * Date: 2020/12/04 + * + * Project: Taurus + * + * Description: + * + * HISTORY: +**/ +#ifndef _DELAY_H_ +#define _DELAY_H_ +#include "stdint.h" + +/** +* @brief delay ms ,2% +* @param ms:delayʱ +* @retval none +*/ +void delayMs(uint32_t ms); + +/** +* @brief delay us ,2% +* @param us:delayʱ +* @retval none +*/ +void delayUs(uint32_t us); + +#endif diff --git a/src/common/tau_device_datatype.h b/src/common/tau_device_datatype.h new file mode 100644 index 0000000..c121f0c --- /dev/null +++ b/src/common/tau_device_datatype.h @@ -0,0 +1,167 @@ +/******************************************************************************* + * + * + * File: tau_device_datatype.h + * Description device datatype + * Version V0.1 + * Date 2020-12-04 + * Author kevin + *******************************************************************************/ + +#ifndef _TAU_DEVICE_DATATYPE_H_ +#define _TAU_DEVICE_DATATYPE_H_ + + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +#include "stdint.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief ״̬ */ +#define MAKE_STATUS(group, code) ((((group)*100) + (code))) + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief ״ֵ̬ */ +enum _status_groups +{ + STATUS_GROUP_GENERIC = 0, + STATUS_GROUP_I2C = 1, + STATUS_GROUP_UART = 2, + STATUS_GROUP_SPI = 3, + kStatusGroup_Timer = 4, +}; + +/*! @brief ״̬ */ +enum _generic_status +{ + STATUS_SUCCESS = MAKE_STATUS(STATUS_GROUP_GENERIC, 0), + STATUS_FAIL = MAKE_STATUS(STATUS_GROUP_GENERIC, 1), + STATUS_READ_ONLY = MAKE_STATUS(STATUS_GROUP_GENERIC, 2), + STATUS_OUT_OF_RANGE = MAKE_STATUS(STATUS_GROUP_GENERIC, 3), + STATUS_INVALID_ARGUMENT = MAKE_STATUS(STATUS_GROUP_GENERIC, 4), + STATUS_TIME_OUT = MAKE_STATUS(STATUS_GROUP_GENERIC, 5), + STATUS_NO_TRANSFER_IN_PROGRESS = MAKE_STATUS(STATUS_GROUP_GENERIC, 6), +}; + +/*! + * @brief timer״̬ + */ +typedef enum +{ + TIMER_STATUS_IDLE = MAKE_STATUS(kStatusGroup_Timer, 0), /*!< */ + TIMER_STATUS_RUNNING = MAKE_STATUS(kStatusGroup_Timer, 1), /*!< */ + TIMER_STATUS_TIMEOUT = MAKE_STATUS(kStatusGroup_Timer, 2), /*!< ʱ */ +} timer_status_e; + +/*! + * @brief system¼(ж/λ)ģʽ + */ +typedef enum +{ + DETECT_HIGH_LVL = 0, + DETECT_LOW_LVL, + DETECT_RISING_EDGE, + DETECT_FALLING_EDGE +} sys_cfg_trigger_e; + +/** +* @brief GPIO interrupt type +*/ +typedef enum +{ + TIMER_NUM0 = 0, + TIMER_NUM1, + TIMER_NUM2, + TIMER_NUM3, + TIMER_NUM_MAX +} timer_num_e; + +/** +* @brief GPIO interrupt type +*/ +typedef enum +{ + GPIO_INT_EXTI_INT0 = 0, + GPIO_INT_EXTI_INT1, + GPIO_INT_EXTI_INT2, + GPIO_INT_EXTI_INT3, + GPIO_INT_EXTI_INT4, + GPIO_INT_EXTI_INT5, + GPIO_INT_EXTI_INT6, + GPIO_INT_EXTI_INT7, + GPIO_INT_MAX +} gpio_int_e; + +/*! @brief PWMIж */ +typedef enum _pwm_int_type +{ + PWM_INT_HIGH_OVERFLOW = 0, + PWM_INT_LOW_OVERFLOW, + PWM_INT_TOTAL_OVERFLOW, + PWM_INT_HIGH_DONE, + PWM_INT_LOW_DONE, + PWM_INT_TOTAL_DONE, + PWM_INT_MAX +} pwm_int_type_e; + +/** +* @brief I2C chose +*/ +typedef enum +{ + I2C_SELECT_0 = 0, //slave + I2C_SELECT_1, //master +} i2c_select_e; + +/*! + * @brief ٶ + * @note + */ +typedef enum _i2c_rate +{ + I2C_RATE_STANDARD = 1, //100kHz + I2C_RATE_FAST, //400kHz + I2C_RATE_HIGH, //1MHz +} i2c_rate_e; + +/*! @brief DMA channel type */ +typedef enum +{ + DMA_CH0 = 0, /*!< SPIM */ + DMA_CH1 = 1, /*!< IIC0 */ + DMA_CH2 = 2, /*!< SPIS */ + DMA_CH3 = 3, /*!< IIC1 */ + DMA_CH4 = 4, /*!< SPI FLASH */ + DMA_CH5 = 5, /*!< UART */ +} dma_channel_e; + + +/*! @brief Type used for all status and error return values. */ + +typedef enum +{ + DISABLE = 0, + ENABLE = !DISABLE +} function_state_e; +/*!< @brief ڷ״̬ʹ */ +typedef int32_t status_t; + + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +#endif + diff --git a/src/common/tau_dsi_datatype.h b/src/common/tau_dsi_datatype.h new file mode 100644 index 0000000..c25630c --- /dev/null +++ b/src/common/tau_dsi_datatype.h @@ -0,0 +1,374 @@ +/******************************************************************************* +* +* +* File: tau_dsi_datatype.h +* Description: mipi dsi ͨͷļ +* Version: V0.1 +* Date: 2021-01-13 +* Author: lzy + *******************************************************************************/ + +#ifndef __MIPI_DSI_COMMON_H__ +#define __MIPI_DSI_COMMON_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#define DSC_PPS_SIZE 128 + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/** +* @brief Data Types for Peripheral-sourced Packets,From Mipi DSI Spec +*/ +typedef enum +{ + DSI_ACK_DT_ERROR = 0x02, + DSI_ACK_DT_EOTP = 0x08, + DSI_ACK_DT_GEN_SHORT_RESPONSE_1B = 0x11, + DSI_ACK_DT_GEN_SHORT_RESPONSE_2B = 0x12, + DSI_ACK_DT_GEN_LONG_RESPONSE = 0x1A, + DSI_ACK_DT_DSC_LONG_RESPONSE = 0x1C, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B = 0x21, + DSI_ACK_DT_DSC_SHORT_RESPONSE_2B = 0x22, + DSI_ACK_DT_MAX +} dsi_ack_data_type_e; + +/** +* @brief Software handle data types +*/ +typedef enum +{ + DSI_RECV_DT_PPS = 0x0A, //Picture Parameter Set + DSI_RECV_DT_GEN_WRITE_1B = 0x13, //Generic Short WRITE, 1 parameter + DSI_RECV_DT_GEN_WRITE_2B = 0x23, //Generic Short WRITE, 2 parameters + DSI_RECV_DT_GEN_READ_0B = 0x04, //Generic READ, no parameters + DSI_RECV_DT_GEN_READ_1B = 0x14, //Generic READ, 1 parameter + DSI_RECV_DT_GEN_READ_2B = 0x24, //Generic READ, 2 parameters + DSI_RECV_DT_DCS_WRITE_0B = 0x05, //DCS Short WRITE, no parameters + DSI_RECV_DT_DCS_WRITE_1B = 0x15, //DCS Short WRITE, 1 parameter + DSI_RECV_DT_DCS_READ_0B = 0x06, //DCS READ, no parameters + DSI_RECV_DT_GEN_WRITE_LONG = 0x29, //Generic Long Write + DSI_RECV_DT_DCS_WRITE_LONG = 0x39, //DCS Long Write/write_LUT Command Packet + DSI_RECV_DT_MAX +} dsi_data_type_e; + +typedef enum +{ + DCS_ENTER_IDLE_MODE = 0x39, + DCS_ENTER_INVERT_MODE = 0x21, + DCS_ENTER_NORMAL_MODE = 0x13, + DCS_ENTER_PARTIAL_MODE = 0x12, + DCS_ENTER_SLEEP_MODE = 0x10, + DCS_EXIT_IDLE_MODE = 0x38, + DCS_EXIT_INVERT_MODE = 0x20, + DCS_EXIT_SLEEP_MODE = 0x11, + DCS_GET_3D_CONTROL = 0x3F, + DCS_GET_ADDRESS_MODE = 0x0B, + DCS_GET_BLUE_CHANNEL = 0x08, + DCS_GET_COMPRESSION_MODE = 0x03, + DCS_GET_DIAGNOSTIC_RESULT = 0x0F, + DCS_GET_DISPLAY_MODE = 0x0D, + DCS_GET_GREEN_CHANNEL = 0x07, + DCS_GET_PIXEL_FORMAT = 0x0C, + DCS_GET_POWER_MODE = 0x0A, + DCS_GET_RED_CHANNEL = 0x06, + DCS_GET_SCANLINE = 0x45, + DCS_GET_SIGNAL_MODE = 0x0E, + DCS_NOP = 0x00, + DCS_READ_DDB_CONTINUE = 0xA8, + DCS_READ_DDB_START = 0xA1, + DCS_READ_MEMORY_CONTINUE = 0x3E, + DCS_READ_MEMORY_START = 0x2E, + DCS_SET_3D_CONTROL = 0x3D, + DCS_SET_ADDRESS_MODE = 0x36, + DCS_SET_COLUMN_ADDRESS = 0x2A, + DCS_SET_DISPLAY_OFF = 0x28, + DCS_SET_DISPLAY_ON = 0x29, + DCS_SET_GAMMA_CURVE = 0x26, + DCS_SET_PAGE_ADDRESS = 0x2B, + DCS_SET_PARTIAL_COLUMNS = 0x31, + DCS_SET_PARTIAL_ROWS = 0x30, + DCS_SET_PIXEL_FORMAT = 0x3A, + DCS_SET_SCROLL_AREA = 0x33, + DCS_SET_SCROLL_START = 0x37, + DCS_SET_TEAR_OFF = 0x34, + DCS_SET_TEAR_ON = 0x35, + DCS_SET_TEAR_SCANLINE = 0x44, + DCS_SET_VSYNC_TIMING = 0x40, + DCS_SOFT_RESET = 0x01, + DCS_WRITE_LUT = 0x2D, + DCS_WRITE_MEMORY_CONTINUE = 0x3C, + DCS_WRITE_MEMORY_START = 0x2C +} dsi_dcs_cmd_type_e; + +/** +* @brief video data transfer mode +*/ +typedef enum +{ + DSI_DATA_VIDEO_MODE = 0, + DSI_DATA_CMD_MODE = 1, + DSI_DATA_MODE_MAX +} dsi_video_data_mode_e; + +/** +* @brief dsi virtual channel +*/ +typedef enum +{ + DSI_VC_0 = 0, + DSI_VC_1 = 1, + DSI_VC_2 = 2, + DSI_VC_3 = 3, + DSI_VC_MAX +} dsi_virtual_channel_e; + +/** +* @brief video data mode +*/ +typedef enum +{ + DSI_FRAME_RATE_60HZ = 0, + DSI_FRAME_RATE_90HZ = 1, + DSI_FRAME_RATE_120HZ = 2, + DSI_FRAME_RATE_144HZ = 3, + DSI_FRAME_RATE_160HZ = 4, + DSI_FRAME_RATE_MAX +} dsi_video_frame_rate_e; + +/** +* @brief dsi rx color coding +*/ +typedef enum +{ + DSI_RGB565 = 1, + DSI_RGB666 = 2, /*!< 18 bbp(18bits per pixel) */ + DSI_RGB666_LOOSELY = 3, /*!< 24 bbp(24bits per pixel) */ + DSI_RGB888 = 4, /*!< 24 bbp(24bits per pixel) */ + DSI_RGB10_10_10 = 5, + DSI_RGB12_12_12 = 6, + DSI_YCbCr422_16 = 7, + DSI_PENTILE_16 = DSI_YCbCr422_16, + DSI_YCbCr422_20_LOOSELY = 8, + DSI_YCbCr422_24 = 9, + DSI_YCbCr420_12 = 10, + DSI_COLOR_CODE_MAX +} dsi_color_code_e; + +/** +* @brief dpi endianness type +*/ +typedef enum +{ + DPI_ENDIAN_RGB = 0, + DPI_ENDIAN_BGR +} dpi_endianness_type_e; + +/** +* @brief dpi polarity type +*/ +typedef enum +{ + DPI_SIG_ACTIVE_HIGH = 0, + DPI_SIG_ACTIVE_LOW = 1 +} dpi_polarity_e; + +/** +* @brief mipi lane number +*/ +typedef enum +{ + DSI_LANE_1 = 1, + DSI_LANE_2 = 2, + DSI_LANE_3 = 3, + DSI_LANE_4 = 4, + DSI_LANE_NUME_MAX +} dsi_lane_nume_e; + +/** +* @brief video mode +*/ +typedef enum +{ + DSI_NONBURST_PULSE = 0, + DSI_NONBURST_EVENT = 1, + DSI_BURST_MODE = 2, + DSI_VIDEO_MODE_MAX +} dsi_video_mode_type_e; + +/** +* @brief panel init cmd transfer type +*/ +typedef enum +{ + DSI_CMD_TX_HS = 0, + DSI_CMD_TX_LP = 1 +} dsi_tx_cmd_tx_type_e; + +/** +* @brief dpi tx vpg style +*/ +typedef enum +{ + TX_VPG_V_COLOR = 0, + TX_VPG_H_COLOR = 1, + TX_VPG_V_BER = 2, + TX_VPG_FLICKER = 3, + TX_VPG_CHESSBOARD = 4, + TX_VPG_MAX +} dsi_tx_vpg_style_e; + +#if defined(ISP_568) || defined(ISP_368) +/** +* @brief angle of rotation +*/ +typedef enum +{ + VIDOE_ROT_ANGLE_0 = 0, /* ת */ + VIDOE_ROT_ANGLE_90 = 1, /* ת90 */ + VIDOE_ROT_ANGLE_180 = 2, /* ת180 */ + VIDOE_ROT_ANGLE_270 = 3, /* תת270 */ + VIDOE_ROT_ANGLE_MAX +} video_rotate_angle_e; + +/** +* @brief mipi rx lane swap +*/ +typedef enum +{ + RX_LANE_ORDER_DEFAULT = 0x0, + RX_LANE_ORDER_3012 = RX_LANE_ORDER_DEFAULT, + RX_LANE_ORDER_3210 = 0x1, + RX_LANE_ORDER_MAX +} dsi_rx_lane_swap_e; + +/** +* @brief LTPO mode +*/ +typedef enum +{ + LTPO_MODE_NONE = 0, + LTPO_MODE_1 = 1, + LTPO_MODE_2 = 2, + LTPO_MODE_MAX +} ltpo_mode_e; + +/** +* @brief transform Ϣ +*/ +typedef struct +{ + ltpo_mode_e ltpo; /* ltpo ģʽ */ + bool mirror_en; /* video ˮƽ־λ */ + video_rotate_angle_e rot_angle; /* video תĽǶ */ + dsi_video_data_mode_e dst_mode; /* mipi tx video ݴģʽ(video/cmd mode) */ + dsi_rx_lane_swap_e rx_lane_swap; /* rx lane swap */ +} dsi_base_extra_info_t; +#endif + +/** +* @brief mipi P/N lane swap flag +* eg: pn_swap = RX_LANE_0_PN_SWAP | RX_LANE_CLK_PN_SWAP; +* ʾ lane0 CLK PNlane +*/ +typedef enum +{ + RX_LANE_0_PN_SWAP = 0x1, + RX_LANE_1_PN_SWAP = 0x2, + RX_LANE_2_PN_SWAP = 0x4, + RX_LANE_3_PN_SWAP = 0x8, + RX_LANE_CLK_PN_SWAP = 0x10 +} dsi_rx_lane_pn_swap_e; + +/** +* @brief error processing level +*/ +typedef enum +{ + ERR_HANDLE_NONE = 0, + ERR_HANDLE_L1 = 1, + ERR_HANDLE_L2 = 2, + ERR_HANDLE_L3 = 3, + ERR_HANDLE_MAX +} hal_err_handle_level_e; + +/** +* @brief transform Ϣ +*/ +typedef struct +{ + uint32_t src_w; /* mipi rx յ width */ + uint32_t src_h; /* mipi rx յ height */ + uint32_t dst_w; /* mipi tx ͵ width */ + uint32_t dst_h; /* mipi tx ͵ height */ + dsi_video_frame_rate_e src_frate; /* mipi rx յframe rate */ + dsi_video_data_mode_e src_mode; /* mipi rx video ݴģʽ(video/cmd mode) */ + uint16_t pn_swap; /* mipi rx P/N swap־λ */ +#if defined(ISP_568) || defined(ISP_368) + dsi_base_extra_info_t extra_info; /* ISP_568/ISP_368 */ +#endif +} dsi_base_trans_info_t; + +/** +* @brief ccmϵ +*/ +typedef struct +{ + uint32_t coef_c00; + uint32_t coef_c01; + uint32_t coef_c02; + uint32_t coef_c10; + uint32_t coef_c11; + uint32_t coef_c12; + uint32_t coef_c20; + uint32_t coef_c21; + uint32_t coef_c22; +} ccm_coef_t; + +/** +* @brief video mode display timing +*/ +typedef struct +{ + uint32_t vsa; + uint32_t vbp; + uint32_t vact; + uint32_t vfp; + uint32_t hsa; + uint32_t hbp; + uint32_t hact; + uint32_t hfp; +} vid_disp_timing_t; + +/** +* @brief dpi +*/ +typedef struct +{ + dpi_polarity_e vsync_active_level; //vsync + dpi_polarity_e hsync_active_level; //hsync + dpi_polarity_e dataen_active_level; //dataen + dpi_polarity_e shutdown_active_level; //shutdown + dpi_polarity_e colorm_active_level; //colorm +} dpi_polarity_t; + +/** +* @brief hight performan mode level +*/ +typedef enum +{ + HIGHT_PERFORMAN_NONE = 0, + HIGHT_PERFORMAN_L1 = 1, + HIGHT_PERFORMAN_L2 = 2, + HIGHT_PERFORMAN_MAX +} hight_performan_mode_e; + + +#endif //__MIPI_DSI_COMMON_H__ diff --git a/src/common/tau_log.h b/src/common/tau_log.h new file mode 100644 index 0000000..669976b --- /dev/null +++ b/src/common/tau_log.h @@ -0,0 +1,108 @@ +/******************************************************************************* +* +* +* File: tau_log.h +* Description log file +* Version V0.1 +* Date 2020-12-08 +* Author linyw +*******************************************************************************/ +#ifndef _TAU_LOG_H_ +#define _TAU_LOG_H_ + + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include +#include +#include +#include "ArmCM0.h" +#if LOG_MODE_RTT + #include "SEGGER_RTT.h" +#endif +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +#ifdef LOG_TAG + #undef LOG_TAG +#endif +#define LOG_TAG "tau_log" +#define LOG_CURREN_LEVEL kLOG_LEVEL_DBG /* ôӡȼ TODO:ÿģôӡȼ */ + +/* + * Using the following three macros for conveniently logging. + */ +#if EDA_MODE +#define TAU_LOGD(format,...) +#define TAU_LOGI(format,...) +#define TAU_LOGE(format,...) +#else +#if LOG_MODE_RTT +#define TAU_LOGD(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_DBG) { \ + SEGGER_RTT_printf(0,"[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + + +#define TAU_LOGI(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_INF) { \ + SEGGER_RTT_printf(0,"[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + +#define TAU_LOGE(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_ERR) { \ + SEGGER_RTT_printf(0,"error [%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) +#else +#define TAU_LOGD(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_DBG) { \ + LOG_printf("[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + + +#define TAU_LOGI(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_INF) { \ + LOG_printf("[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + +#define TAU_LOGE(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_ERR) { \ + LOG_printf("error [%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) +#endif +#endif +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef enum +{ + kLOG_LEVEL_DBG = 0, + kLOG_LEVEL_INF, + kLOG_LEVEL_ERR, + kLOG_LEVEL_NONE /* ӡκβ */ +} log_level_t; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +void LOG_printf(const char *fmt, ...); + +#endif diff --git a/src/common/tau_operations.h b/src/common/tau_operations.h new file mode 100644 index 0000000..35862b3 --- /dev/null +++ b/src/common/tau_operations.h @@ -0,0 +1,229 @@ +/******************************************************************************* +* +* +* File: tau_operations.h +* Description λֽڲضͷļ +* Version V0.1 +* Date 2020-09-07 +* Author lzy + *******************************************************************************/ +#ifndef __TAU_BYTEOPS_H +#define __TAU_BYTEOPS_H + +/** + * \name ͨλ + * @{ + */ + +/** \brief λ */ +#ifndef TAU_BITS_PER_LONG + #define TAU_BITS_PER_LONG 32 +#endif + +/** \brief ֽλ */ +#define TAU_BITS_PER_BYTE 8 + +/** @} */ + + +/******************************************************************************/ + +/** + * \name ͨλ + * @{ + */ + +/** \brief bitλ + * TAU_BIT(2) is 0x4 + */ +#define TAU_BIT(bit) (1u << (bit)) + +/** \brief ֵλ + * TAU_SBF(0xFF, 8) is 0xff00 + */ +#define TAU_SBF(value, field) ((value) << (field)) + +/** \brief bitλ + * TAU_BIT_SET(0, 8) is 0x100 + */ +#define TAU_BIT_SET(data, bit) ((data) |= TAU_BIT(bit)) + +/** \brief bit + * TAU_BIT_CLR(0xFF, 2) is 0xfb + */ +#define TAU_BIT_CLR(data, bit) ((data) &= ~TAU_BIT(bit)) + +/** \brief bitλ, mask ָλ + * TAU_BIT_SET_MASK(0xF0F0, 0xF00) is 0xfff0 + */ +#define TAU_BIT_SET_MASK(data, mask) ((data) |= (mask)) + +/** \brief bit, mask ָλ + * TAU_BIT_CLR_MASK(0xFFFF, 0xFF00) is 0xff + */ +#define TAU_BIT_CLR_MASK(data, mask) ((data) &= ~(mask)) + +/** \brief bitת + * TAU_BIT_TOGGLE(0xFFFF, 0) is 0xfffe + * TAU_BIT_TOGGLE(0x0000, 1) is 0x2 + */ +#define TAU_BIT_TOGGLE(data, bit) ((data) ^= TAU_BIT(bit)) + +/** \brief bit޸ + * TAU_BIT_MODIFY(0, 8, 1) is 0x100 + * TAU_BIT_MODIFY(0xFFFF, 1, 0) is 0xfffd + */ +#define TAU_BIT_MODIFY(data, bit, value) \ + ((value) ? TAU_BIT_SET(data, bit) : TAU_BIT_CLR(data, bit)) + +/** \brief bitǷλ + * TAU_BIT_ISSET(0xF0F1, 1) is 0 + * TAU_BIT_ISSET(0xF0F2, 1) is 2 + */ +#define TAU_BIT_ISSET(data, bit) ((data) & TAU_BIT(bit)) + +/** \brief ȡbitֵ + * TAU_BIT_GET(0xF0F1, 1) is 0 + * TAU_BIT_GET(0xF0F2, 1) is 1 + */ +#define TAU_BIT_GET(data, bit) (TAU_BIT_ISSET(data, bit) ? 1 : 0) + +/** \brief bitֵ + * TAU_BIT_CHECK(0xF5FF, 4) is 1 + */ +#define TAU_BIT_CHECK(data, bit) \ + (((data) & TAU_BIT(bit)) ? 1 : 0) + +/** \brief ȡ n bits ֵ + * TAU_BITS_MASK(2) is 0x3 + */ +#define TAU_BITS_MASK(n) (~((~0u) << (n))) + +/** \brief ȡλֵ + * TAU_BITS_GET(0xF5FF, 0x0F00, 8) is 0x5 + */ +#define TAU_BITS_GET(data, mask, pos) \ + (((data) & (mask)) >> (pos)) + +/** \brief ȡλֵ + * TAU_BITS_CHECK(0xF5FF, 0x0F00) is 1 + */ +#define TAU_BITS_CHECK(data, mask) \ + (((data) & (mask)) ? 1 : 0) + +/** \brief ޸λֵ + * TAU_BITS_MODIFY(0xF5FF, 0x0FF0, 0x8A0) is 0xF8AF +*/ +#define TAU_BITS_MODIFY(data, clear_mask, set_mask) \ + (data) = (((data) & (~(clear_mask))) | (set_mask)) + +/** \brief λֵ + * TAU_WRITE_REG32(0x05FF, 0xFFFA) is 0xFFFA +*/ +#define TAU_WRITE_REG32(data, value) ((data) = (value)) + +/** \brief λֵ + * TAU_READ_REG32(0x05FF) is 0x05FF +*/ +#define TAU_READ_REG32(data) (data) + + +/** @} */ + +/******************************************************************************/ + +/** + * \brief ȡ2-byteĸλbyte + * + * \par ʾ + * \code + * uint16_t a = 0x1234; + * uint16_t b; + * + * b = TAU_MSB(a); //b=0x12 + * \endcode + */ +#define TAU_MSB(x) (((x) >> 8) & 0xff) + +/** + * \brief ȡ2-byteĵλbyte + * + * \par ʾ + * \code + * uint16_t a = 0x1234; + * uint16_t b; + * + * b = TAU_LSB(a); //b=0x34 + * \endcode + */ +#define TAU_LSB(x) ((x) & 0xff) + +/** + * \brief ȡ2-wordĸλword + * + * \par ʾ + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_MSW(a); //b=0x1234 + * \endcode + */ +#define TAU_MSW(x) (((x) >> 16) & 0xffff) + +/** + * \brief ȡ2-wordĵλword + * + * \par ʾ + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_LSW(a); //b=0x5678 + * \endcode + */ +#define TAU_LSW(x) ((x) & 0xffff) + +/** + * \brief 32-bitĸλword͵λword + * + * \par ʾ + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_WORDSWAP(a); //b=0x56781234 + * \endcode + */ +#define TAU_WORDSWAP(x) (TAU_MSW(x) | (TAU_LSW(x) << 16)) + +/** + * \brief 32-bitֽ˳ + * + * \par ʾ + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_LONGSWAP(a); //b=0x78563412 + * \endcode + */ +#define TAU_LONGSWAP(x) ((TAU_LLSB(x) << 24) | \ + (TAU_LNLSB(x) << 16) | \ + (TAU_LNMSB(x) << 8) | \ + (TAU_LMSB(x))) + +#define TAU_LLSB(x) ((x) & 0xff) /**< \brief ȡ32bit1ֽ */ +#define TAU_LNLSB(x) (((x) >> 8) & 0xff) /**< \brief ȡ32bit2ֽ */ +#define TAU_LNMSB(x) (((x) >> 16) & 0xff) /**< \brief ȡ32bit3ֽ */ +#define TAU_LMSB(x) (((x) >> 24) & 0xff) /**< \brief ȡ32bit4ֽ */ +#define TAU_LNSB(x,n) (((x) >> ((n) * 8) ) & 0xff) /**< \brief ȡ32bitnֽ , 0 - 3*/ + +/** + * @} + */ + +#endif /* __TAU_BYTEOPS_H */ + +/* end of file */ + diff --git a/src/sdk/CVWL368/lib/CVWL368.lib b/src/sdk/CVWL368/lib/CVWL368.lib new file mode 100644 index 0000000..713a2d3 Binary files /dev/null and b/src/sdk/CVWL368/lib/CVWL368.lib differ diff --git a/src/sdk/CVWL368/lib/WL368_NOTE20_CSOT667_TP.lib b/src/sdk/CVWL368/lib/WL368_NOTE20_CSOT667_TP.lib new file mode 100644 index 0000000..b5868ac Binary files /dev/null and b/src/sdk/CVWL368/lib/WL368_NOTE20_CSOT667_TP.lib differ diff --git a/src/sdk/include/M0/ArmCM0.h b/src/sdk/include/M0/ArmCM0.h new file mode 100644 index 0000000..0683670 --- /dev/null +++ b/src/sdk/include/M0/ArmCM0.h @@ -0,0 +1,213 @@ +/**************************************************************************//** + * @file ARMCM0.h + * @brief CMSIS Core Peripheral Access Layer Header File for + * ARMCM0 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ARMCM0_H +#define ARMCM0_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ + /* ------------------- Processor Exceptions Numbers ----------------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + + /* ------------------- Processor Interrupt Numbers ------------------------------ */ + VIDC_IRQn = 0, + LCDC_IRQn = 1, + MIPI_RX_IRQn = 2, + MIPI_TX_IRQn = 3, + MEMC_IRQn = 4, + VPRE_IRQn = 5, + FLSCTRL_IRQn = 6, + DMA_IRQn = 7, + TIMER0_IRQn = 8, + TIMER1_IRQn = 9, + TIMER2_IRQn = 10, + TIMER3_IRQn = 11, + WDG_IRQn = 12, + UART_IRQn = 13, + I2C0_IRQn = 14, + I2C1_IRQn = 15, + SPIS_IRQn = 16, + SPIM_IRQn = 17, + ADC_IRQn = 18, + PWMDET_IRQn = 19, + OTP_IRQn = 20, + SWIRE_IRQn = 21, + PVD_IRQn = 22, + AP_NRESET_IRQn = 23, + EXTI_INT0_IRQn = 24, + EXTI_INT1_IRQn = 25, + EXTI_INT2_IRQn = 26, + EXTI_INT3_IRQn = 27, + EXTI_INT4_IRQn = 28, + EXTI_INT5_IRQn = 29, + EXTI_INT6_IRQn = 30, + EXTI_INT7_IRQn = 31 + /* Interrupts 10 .. 31 are left out */ +} IRQn_Type; + + + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------- Start of section using anonymous unions and disabling warnings ------- */ +#if defined (__CC_ARM) +#pragma push +#pragma anon_unions +#elif defined (__ICCARM__) +#pragma language=extended +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Wc11-extensions" +#pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined (__GNUC__) +/* anonymous unions are enabled by default */ +#elif defined (__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined (__TASKING__) +#pragma warning 586 +#elif defined (__CSMC__) +/* anonymous unions are enabled by default */ +#else +#warning Not supported compiler type +#endif + +/* -------- Configuration of Core Peripherals ----------------------------------- */ +#define __CM0_REV 0x0000U /* Core revision r0p0 */ +#define __MPU_PRESENT 0U /* no MPU present */ +#define __VTOR_PRESENT 0U /* no VTOR present */ +#define __NVIC_PRIO_BITS 2U /* Number of Bits used for Priority Levels */ //20220228 +#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */ + +#define __FPU_PRESENT 0U /* Set to 1 if FPU is present */ +#define __FPU_DP 0U /* single precision FPU */ +#define __ICACHE_PRESENT 0U /* Set to 1 if I-CACHE is present */ +#define __DCACHE_PRESENT 0U /* Set to 1 if D-CACHE is present */ +#define __DSP_PRESENT 0U /* no DSP extension present */ + +#define FPGA_MODE 0 +#define EDA_MODE 0 +#define EXTERN_24M 0 +#define CPU_CLK_100M 0 + +#define LOG_MODE_RTT 0 /* 0:UART MODE 1: rtt MODE */ + +#include "core_cm0.h" /* Processor and core peripherals */ +#include "system_ARMCM0.h" /* System Header */ + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (500000000UL) /* Oscillator frequency */ + +#if FPGA_MODE +#define SYSTEM_CLOCK (33300000U) +#else +/* ʹⲿʱ,ϵͳʱֻ100M,ʹⲿʱ,ϵͳʱӿ100M/80M*/ +#if EXTERN_24M +#define SYSTEM_CLOCK (100000000U) +#else +#if CPU_CLK_100M +#define SYSTEM_CLOCK (100000000U) +#else +#define SYSTEM_CLOCK (80000000U) +#endif +#endif +#endif + +/* -------- End of section using anonymous unions and disabling warnings -------- */ +#if defined (__CC_ARM) +#pragma pop +#elif defined (__ICCARM__) +/* leave anonymous unions enabled */ +#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) +#pragma clang diagnostic pop +#elif defined (__GNUC__) +/* anonymous unions are enabled by default */ +#elif defined (__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined (__TASKING__) +#pragma warning restore +#elif defined (__CSMC__) +/* anonymous unions are enabled by default */ +#else +#warning Not supported compiler type +#endif + +/* In HS mode and when the DMA is used, all variables and data structures dealing + with the DMA during the transaction process should be 4-bytes aligned */ +#define DMA_WORD_ALIGN_EN +#ifdef DMA_WORD_ALIGN_EN +#if defined (__GNUC__) /* GNU Compiler */ +#define __ALIGN_END __attribute__ ((aligned (4))) +#define __ALIGN_BEGIN +#else +#define __ALIGN_END +#if defined (__CC_ARM) /* ARM Compiler */ +#define __ALIGN_BEGIN __align(4) +#elif defined (__ICCARM__) /* IAR Compiler */ +#define __ALIGN_BEGIN +#elif defined (__TASKING__) /* TASKING Compiler */ +#define __ALIGN_BEGIN __align(4) +#endif /* __CC_ARM */ +#endif /* __GNUC__ */ +#else + +#define __ALIGN_BEGIN +#define __ALIGN_END + +#define __ALIGN_END_1 __attribute__ ((aligned (1))) +#endif /* DMA_WORD_ALIGN_EN */ + +/* __packed keyword used to decrease the data type alignment to 1-byte */ +#if defined (__CC_ARM) /* ARM Compiler */ +#define __packed __packed +#elif defined (__ICCARM__) /* IAR Compiler */ +#define __packed __packed +#elif defined ( __GNUC__ ) /* GNU Compiler */ +#define __packed __attribute__ ((__packed__)) +#define __weak __attribute__((weak)) +#elif defined (__TASKING__) /* TASKING Compiler */ +#define __packed __unaligned +#endif /* __CC_ARM */ + +#ifdef __cplusplus +} +#endif + +#endif /* ARMCM0_H */ diff --git a/src/sdk/include/hal_dsi_rx_ctrl.h b/src/sdk/include/hal_dsi_rx_ctrl.h new file mode 100644 index 0000000..7786929 --- /dev/null +++ b/src/sdk/include/hal_dsi_rx_ctrl.h @@ -0,0 +1,558 @@ +/******************************************************************************* +* +* +* File: hal_dsi_rx_ctrl.h +* Description: hal mipi dsi rx path control ͷļ +* Version: V0.1 +* Date: 2021-04-06 +* Author: lzy + *******************************************************************************/ +#ifndef __HAL_DSI_RX_CTRL_H__ +#define __HAL_DSI_RX_CTRL_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#define RX_DCS_QUEUE_MAX_SIZE 20 /* DCS洢г */ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef struct hal_dcs_execute_entry_t hal_dcs_execute_entry_t; + +typedef struct hal_dcs_packet_t hal_dcs_packet_t; + +typedef struct hal_dsi_rx_ctrl_handle_t hal_dsi_rx_ctrl_handle_t; + +/* DCS CMD ص, עcus_dcs_entry_table, ƥӦDCS ص*/ +typedef bool (*hal_dsi_rx_ctrl_dcs_execute)(hal_dsi_rx_ctrl_handle_t *rx_handle, hal_dcs_packet_t *dcs_packet); + +/* AP cmd ص, ҪٻCMD ʱע, ΪNULL ʱDSC ָдָparsecus_dcs_entry_tableص */ +typedef bool (*hal_dsi_rx_ctrl_read_entry)(uint8_t data_type, uint8_t dcs_cmd, uint8_t param); + +/* AP PPS »ص,ΪPPS ԼPPS picture width/height, ڷֱл, עýӿʱڲPPS */ +typedef bool (*hal_dsi_rx_ctrl_pps_entry)(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height); + +/** +* @brief hal_rx_dbg_event_e select +*/ +typedef enum hal_rx_dbg_event_e +{ + HAL_RX_DBG_FS = 0, /* Frame start */ + HAL_RX_DBG_EVENT_MAX +} hal_rx_dbg_event_e; + +/* RX debug ص,ڻȡframe start ȹdebug */ +typedef void (*hal_dsi_rx_ctrl_dbg_entry)(hal_rx_dbg_event_e event); + +/** +* @brief dsi rx ctrl handle struct +*/ +typedef struct hal_dsi_rx_ctrl_handle_t +{ + dsi_base_trans_info_t base_info; /* mipi video תϢ */ + dsi_color_code_e rx_color_mode; /* color mode */ + dsi_lane_nume_e rx_lanes; /* mipi data lane */ + dsi_video_mode_type_e rx_nonburst_models; /* transmission packet sequences */ + dsi_virtual_channel_e rx_vc; /* virtual channel number */ + bool compress_en; /* DSC ѹ־ */ + uint32_t rx_hsclk_rate; /* mipi źlane rate */ + uint8_t rx_dsc_pps[DSC_PPS_SIZE]; /* DSC ѹPPS */ + const hal_dcs_execute_entry_t *cus_dcs_entry_table; /* DCSб */ + hal_dsi_rx_ctrl_read_entry rx_dcs_read_entry; /* Hostָݺ,ΪNULLʱrx_dcs_queueעcmd */ + hal_dsi_rx_ctrl_pps_entry pps_update_entry; /* PPS Update ʱص,ڷֱлPPS,ΪNULLʱڲ */ + bool used; /* handleʹñ־λ */ + uint8_t pq_marginal; /* picture quality,Ϊhal_rx_pq_marginal_type_e */ + bool direct_mode; /* video mode ֱͨģʽ,Ԥ,debugʹ */ + hal_dsi_rx_ctrl_dbg_entry rx_debug_cb; /* rx debug ص,ĿǰΪյframe start֮صԤdebug */ + hal_err_handle_level_e err_handler_level; /* RXմʱģresetȼ, ȼԽresetģԽ */ + bool draw_mode; /* ģʽ,debugʹ */ +#if defined(ISP_568) || defined(ISP_368) + uint8_t rx_strength; /* ڵRXźǿȣڿУ׼ģʽλ0~7Ĭ3 */ + hight_performan_mode_e hight_performan_mode; /* ģʽȼ,οhight_performan_mode_e */ + bool pu_optimize; /* ŻPUʾЧĬΪfalse;true:ŻPUʾʾЧ,߹;false:ͨPUģʽ,͹ */ +#endif + bool video_auto_sync; /* Video mode Զͬ */ +} hal_dsi_rx_ctrl_handle_t; + +/** +* @brief DCS command execute entry +*/ +typedef struct hal_dcs_execute_entry_t +{ + uint32_t dcs_command; /* DCS command */ + hal_dsi_rx_ctrl_dcs_execute execute_func; /* command Ӧ */ + bool immediately_func; /* ִл:true-жִ,false-DCS첽ִ */ +} hal_dcs_execute_entry_t; + +/** +* @brief 洢 DCS packet ṹ +*/ +typedef struct hal_dcs_packet_t +{ + uint32_t data_type; /* data type */ + uint32_t dcs_command; /* dcs command */ + uint32_t param_length; /* dcs param length */ + uint8_t *packet_param; /* dcs param */ + const hal_dcs_execute_entry_t *dcs_execute_entry; /* dcs packet */ +} hal_dcs_packet_t; + +/** +* @brief dcs command filter select +*/ +typedef enum +{ + HAL_RX_DCS_FILTER_0 = 0, + HAL_RX_DCS_FILTER_1 = 1, + HAL_RX_DCS_FILTER_2 = 2, + HAL_RX_DCS_FILTER_3 = 3, + HAL_RX_DCS_FILTER_4 = 4, + HAL_RX_DCS_FILTER_5 = 5, + HAL_RX_DCS_FILTER_6 = 6, + HAL_RX_DCS_FILTER_7 = 7, + HAL_RX_DCS_FILTER_MAX +} hal_rx_dcs_filter_sel_e; + +/** +* @brief pentile source color format +*/ +typedef enum +{ + PENTILE_SRC_FORMAT_RGB = 0x0, + PENTILE_SRC_FORMAT_BGR = 0x1, + PENTILE_SRC_FORMAT_RGBG_BGRG = 0x8, + PENTILE_SRC_FORMAT_GBGR_GRGB = 0x9, + PENTILE_SRC_FORMAT_BGRG_RGBG = 0xA, + PENTILE_SRC_FORMAT_GRGB_GBGR = 0xB, + PENTILE_SRC_FORMAT_RGBG_RGBG = 0xC, + PENTILE_SRC_FORMAT_GBGR_GBGR = 0xD, + PENTILE_SRC_FORMAT_BGRG_BGRG = 0xE, + PENTILE_SRC_FORMAT_GRGB_GRGB = 0xF, + PENTILE_SRC_FORMAT_MAX +} pentile_src_format_e; + +/** +* @brief pential G0 G1 swap mode +*/ +typedef enum +{ + PENTILE_G0G1 = 0, + PENTILE_G1G0 = 1 +} pentile_g_swap_e; + +/** +* @brief pential R B swap mode +*/ +typedef enum +{ + PENTILE_RGBG_BGRG = 0, + PENTILE_GGRB_RBGG = 1, + PENTILE_GGBR_BRGG = 3 +} pentile_rb_swap_e; + +/** +* @brief TE źŲģʽ +*/ +typedef enum +{ + TE_HW_MODE = 0, /* TEӲ,Ƶ֡һ */ + TE_USER_MODE = 1, /* ײ㲻TE, hal_dsi_rx_ctrl_gen_a_tear_signal ӿڲ */ + TE_SOFT_60HZ_MODE = 2, /* ײͬ60Hz TE */ + TE_SOFT_90HZ_MODE = 4, /* ײͬ90Hz TE */ + TE_SOFT_120HZ_MODE = 5, /* ײͬ120Hz TE */ + TE_HW_MAX +} te_mode_e; + +/** +* @brief pq_marginal_type select +*/ +typedef enum +{ + PQ_TYPE_0 = 0x0, + PQ_TYPE_1 = 0x1, + PQ_TYPE_2 = 0x3, + PQ_TYPE_3 = 0x2, + PQ_TYPE_4 = 0xA, + PQ_TYPE_5 = 0xE, + PQ_TYPE_6 = 0xC, + PQ_TYPE_7 = 0x1A, + PQ_TYPE_8 = 0x18, + PQ_TYPE_MAX +} hal_rx_pq_marginal_type_e; + +/** +* @brief RX CLK +*/ +typedef enum +{ + RX_CLK_100M = 0, + RX_CLK_150M = 1, + RX_CLK_200M = 2, + RX_CLK_300M = 3, + RX_CLK_MAX +} hal_rx_clk_e; + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief dsi rx ctrl handle (ͷʱhal_dsi_rx_ctrl_release_handle) +* @param none +* @retval dsi rx handle +*/ +hal_dsi_rx_ctrl_handle_t *hal_dsi_rx_ctrl_create_handle(void); + +/** +* @brief ͷdsi rx ctrl handle +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_release_handle(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief rx ctrl handle PPS +* @param rx_ctrl_handle: dsi rx handle +* @param pps: pps +* @param pps_size: pps +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_pre_init_pps(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t pps[], uint32_t pps_size); + +/** +* @brief ʼdsi rx ģ +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_init(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief dsi rx ģȥʼ +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_deinit(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief dsi rx +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_start(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief dsi rxָ״̬ (debugʹ, rx_ctrl_handleøýӿ) +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_restart(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief ֹͣdsi rx +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_stop(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief ֶRX clk,һRX CLK ɵײԶ,video modeFIFO FULLʹ +* @param rxbr_clk: rx clk, Ҫhs_lane_rate/8 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_rx_clk(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, hal_rx_clk_e rxbr_clk); + +/** +* @brief MIPI HOSTĶӦ CMD +* @param rx_ctrl_handle: dsi rx handle +* @param data_type: data type +* @param vc: virtual channel +* @param cmd_count: ack command ij +* @param ... : Ҫ͵command(cmd_count һ) +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_send_ack_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, dsi_ack_data_type_e data_type, dsi_virtual_channel_e vc, uint8_t cmd_count, ...); + +/** +* @brief ʹ鷽ʽظ̰,hal_dsi_rx_ctrl_send_ack_cmdһ +* @param rx_ctrl_handle: dsi rx handle +* @param data_size: 鳤,̶Ϊ4 +* @param data: ظcmd,ϸ涨: +* data[0]:DI(data type) +* data[1]:data 0 +* data[2]:data 1 +* data[3]:ڲpkt type,̶̰Ϊ0 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_ack_short_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t data_size, uint8_t data[]); + +/** +* @brief ʹ鷽ʽظ,hal_dsi_rx_ctrl_send_ack_cmdһ +* @param rx_ctrl_handle: dsi rx handle +* @param data_size: 鳤,ΪWord Count + header (header̶Ϊ4) +* @param data: ظcmd,ϸ涨: +* data[0]:DI(data type) +* data[1]:wc 0 (Word Count Ͱλ) +* data[2]:wc 1 (Word Count ߰λ) +* data[3]:ڲpkt type,̶Ϊ1 +* data[N]: +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_ack_long_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t data_size, uint8_t data[]); + +/** +* @brief 첽DSCӿ,ִcus_dcs_entry_tableӦDCS immediately_funcΪfalseĺ +* @param rx_ctrl_handle: dsi rx handle +* @retval true - 1DSC , false - DSC +*/ +bool hal_dsi_rx_ctrl_dsc_async_handler(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief ʹӲfilterҪCMD,MCUԴЧCMDռ +* @param rx_ctrl_handle: dsi rx handle +* @param filter_number: filter (0-7) +* @param cmd_start: Ҫcommand codeʼλ +* @param cmd_end: Ҫcommand codeֹλ +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_hw_cmd_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, + hal_rx_dcs_filter_sel_e filter_number, + uint32_t cmd_start, uint32_t cmd_end); + +/** +* @brief ͬ,ڵͼ˺ +* @param rx_ctrl_handle: dsi rx handle +* @param line_num: ͬк,Χ1 ~ input height +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_sync_line(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t line_num); + +/** +* @brief ʹpatternmipi(ڲ) +* @param rx_ctrl_handle: dsi rx handle +* @param pg_orient: pattern (0:Vertical mode ; 1:Horizontal mode) +* @param enable: /رpattern +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_enable_test_pattern(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t pg_orient, bool enable); + +/** +* @brief TEź +* @param rx_ctrl_handle: dsi rx handle +* @param inverse_poly: tearźż +* @param te_width: tearźſ(0-1023) +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_te_waveform(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, bool inverse_poly, uint32_t te_width); + +/** +* @brief ƻscld filter,ͼ +* @param rx_ctrl_handle: dsi rx handle +* @param scld_filter_h: ˮƽfilter +* @param scld_filter_v: ֱfilter +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_scld_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t scld_filter_h[32][2], uint32_t scld_filter_v[32][2]); + +/** +* @brief ȡAP BTAظsize +* @param rx_ctrl_handle: dsi rx handle +* @retval ݴС +*/ +uint32_t hal_dsi_rx_ctrl_get_max_ret_size(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief ȡAP Compression Mode Command,ĬΪ0,ʹ +* @param rx_ctrl_handle: dsi rx handle +* @retval AP compressen_en +*/ +bool hal_dsi_rx_ctrl_get_compressen_en(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief һTEź +* @param rx_ctrl_handle: dsi rx handle +* @retval none +*/ +bool hal_dsi_rx_ctrl_gen_a_tear_signal(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief ֱлӿ +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_toggle_resolution(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief ģʽ,ͨΪdebugʹ +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_hight_performan_mode(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief TEźΪģʽ +* @param rx_ctrl_handle: dsi rx handle +* @retval none +*/ +bool hal_dsi_rx_ctrl_set_sw_tear_mode(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief TEźΪӲģʽ +* @param rx_ctrl_handle: dsi rx handle +* @retval none +*/ +bool hal_dsi_rx_ctrl_set_hw_tear_mode(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief pentileʽ +* @param rx_ctrl_handle: dsi rx handle +* @param src_format: pentile format +* @param g_swap: swap G0 G1 +* @param rb_swap: swap R B +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_pentile_format(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, pentile_src_format_e src_format, pentile_g_swap_e g_swap, pentile_rb_swap_e rb_swap); + +/** +* @brief RX escape clk +* @param rx_ctrl_handle: dsi rx handle +* @param esc_clk: escape clk λHz,10000000ʱCMDΪ10Mhz +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_esc_clk(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t esc_clk); + +/** +* @brief Զ㲢Ӳfilter +* @param rx_ctrl_handle: dsi rx handle +* @param enable: /ر Ӳfilter +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_auto_hw_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, bool enable); + +/* +* @brief DCS cmd ͸ģʽ, Tx init ֮Ч +* @param enable/disable +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_dcs_direct_mode(bool enable); + +/* +* @brief ֡޸(video mode) +* @param rx_ctrl_handle: dsi rx handle +* @param frame_rateframe rate +*/ +bool hal_dsi_rx_ctrl_toggle_input_frame_rate(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, dsi_video_frame_rate_e frame_rate); + +/** +* @brief TEģʽչӿ +* @param line_num: ͬк,Χ1 ~ input height +ʼ,stepΪ100𲽼С,ֱȫ˺ +* @param te_mode: te ģʽ,ʹHW mode +* @retval none +*/ +bool hal_dsi_rx_ctrl_set_tear_mode_ex(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t line_num, te_mode_e te_mode); + +/** +* @brief ֱлչӿ +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_toggle_resolution_ex(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +#if !defined(ISP_568) && !defined(ISP_368) + /* ISP_518/ISP_308 ӿ */ + /** + * @brief ƻ Channel Gain ,ͼ + * @param rx_ctrl_handle: dsi rx handle + * @param gain_r: channel gain coefficient for R + * @param gain_g: channel gain coefficient for G + * @param gain_b: channel gain coefficient for B + * @retval true/false + */ + bool hal_dsi_rx_ctrl_set_cus_pq_gain(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, int r_gain, int g_gain, int b_gain); + + /** + * @brief ƻenhance for luma,ͼ + * @param rx_ctrl_handle: dsi rx handle + * @param enhl_str: Enhance Str + * @param enhl_edgeslope: Enhance Edge Slope + * @retval none + */ + bool hal_dsi_rx_ctrl_set_cus_pq_enh_lum(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t enhl_str, uint32_t enhl_edgeslope); + + /** + * @brief ƻfalse color remove for chroma,ͼ + * @param rx_ctrl_handle: dsi rx handle + * @param desatstr: Ͷȵ Χ:0-4095 + * @param desatslope: Ͷȵб Χ:0-4095 + * @retval none + */ + bool hal_dsi_rx_ctrl_set_cus_pq_enh_chr(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t desatstr, uint32_t desatslope); + + /** + * @brief ƻfalse color remove for chroma2,ͼ + * @param rx_ctrl_handle: dsi rx handle + * @param desatmode: Ͷȵģʽ 0-ͱͶ 1-Ͷ + * @param fc_final_alpha: Ͷȵ Χ:0 - 255 + * @param edge_med_slope: Ͷȵ Χ:0 - 4095 + * @retval none + */ + bool hal_dsi_rx_ctrl_set_cus_pq_enh_chr2(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t desatmode, uint32_t fc_final_alpha, uint32_t edge_med_slope); + +#else + /* ISP_568/ISP_368 ӿ */ + /** + * @brief üvideoಿ֣ڲֻͱmipi900x1792,ʵЧΪ828x1792,ڲüұ߸± + * @param rx_ctrl_handle: dsi rx handle + * @param crop_width: Ҫü + * @param crop_height: Ҫü + * @retval true/false + */ + bool hal_dsi_rx_ctrl_crop_video(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t crop_width, uint32_t crop_height); + + /* + * @brief ʼģʽ,ȫֵ + * @param rx_ctrl_handle: dsi rx handle + * @param red_data: صR + * @param green_data: صG + * @param blue_data: صB + * @retval none + */ + void hal_dsi_rx_ctrl_draw_mode_init(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t red_data, uint8_t green_data, uint8_t blue_data); + + /* + * @brief ɫ + * @param rx_ctrl_handle: dsi rx handle + * @param x: صx + * @param y: صy + * @param red_data: صR + * @param green_data: صG + * @param blue_data: صB + * @retval none + */ + void hal_dsi_rx_ctrl_set_pixel_data(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, int x, int y, uint8_t red_data, uint8_t green_data, uint8_t blue_data); + + /* + * @brief ɫ + * @param rx_ctrl_handle: dsi rx handle + * @param x1,y1: ʼ + * @param x2,y2: յ + * @param red_data: صR + * @param green_data: صG + * @param blue_data: صB + * @retval none + */ + void hal_dsi_rx_ctrl_set_rect_pixel_data(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, int x1, int x2, int y1, int y2, uint8_t red_data, uint8_t green_data, uint8_t blue_data); +#endif + +#endif //__HAL_DSI_RX_CTRL_H__ diff --git a/src/sdk/include/hal_dsi_tx_ctrl.h b/src/sdk/include/hal_dsi_tx_ctrl.h new file mode 100644 index 0000000..cfcb976 --- /dev/null +++ b/src/sdk/include/hal_dsi_tx_ctrl.h @@ -0,0 +1,284 @@ +/******************************************************************************* +* +* +* File: hal_dsi_tx_ctrl.h +* Description: hal mipi dsi tx ͷļ +* Version: V0.1 +* Date: 2021-04-23 +* Author: wuc + *******************************************************************************/ +#ifndef __HAL_DSI_TX_CTRL_H__ +#define __HAL_DSI_TX_CTRL_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "hal_gpio.h" +#include "stdint.h" +#include "stdbool.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/** +* @brief ƻMIPI TXṹ +*/ +typedef struct +{ + bool used; /* handleʹñ־λ */ + uint8_t lane_num; + dsi_virtual_channel_e channel_id; + dsi_video_mode_type_e vid_mode; + dsi_tx_cmd_tx_type_e cmd_tx_type; /* ʼģʽʽ0:HS; 1:LP */ + uint8_t pclk_offset; /* lane byte clkHFPLONG HTP */ + uint32_t dpi_vsa; + uint32_t dpi_vbp; + uint32_t dpi_vfp; + uint32_t dpi_hsa; + uint32_t dpi_hbp; + uint32_t dpi_hfp; + dsi_base_trans_info_t base_info; /* mipi video תϢ */ + uint32_t tx_line_delay; /* tx ʾӳ,˾,ڷֱлʱȷлʱ */ + float tx_frame_rate; /* Ĭ60Hz,Ϊ,Ϊdebugʹ */ + bool tx_clkawayshs; /* ĬΪfalse, Ϊtrueʱvideo modeڼclkLP */ + uint8_t blank_rows; /* ĬΪ0, ʹã0ʱЧʾ²blank_rows */ + uint8_t blank_columns; /* ĬΪ0, ʹã0ʱЧʾҲblank_columns */ + bool lp_exit_lpdt; /* ÿһLP CMD˳LPDT */ + bool tx_cmd_mode_sync; /* TX command mode ͬ */ +} hal_dsi_tx_ctrl_handle_t; + +/** +* @brief crop parameters +*/ +typedef struct +{ + uint16_t crop_top; + uint16_t crop_bottom; + uint16_t crop_left; + uint16_t crop_right; +} hal_dsi_tx_crop_t; + +/** +* @brief MIPI TXʼ +* @param tx_ctrl_handle: MIPI TXʵ +* @retval ɹ:0 ʧ:-1 +*/ +bool hal_dsi_tx_ctrl_init(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TXʼ +* @param tx_ctrl_handle: MIPI TXʵ +* @retval ɹ:0 ʧ:-1 +*/ +bool hal_dsi_tx_ctrl_deinit(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TXʵ +* @param +* @retval tx_ctrl_handle: MIPI TXʵ +*/ +hal_dsi_tx_ctrl_handle_t *hal_dsi_tx_ctrl_create_handle(void); + +/** +* @brief MIPI TXͷʵ +* @param tx_ctrl_handle: MIPI TXʵ +* @retval ɹ:0 ʧ:-1 +*/ +bool hal_dsi_tx_ctrl_release_handle(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TXʼ +* @param tx_ctrl_handle: MIPI TXʵ +* @retval ɹ:0 ʧ:-1 +*/ +bool hal_dsi_tx_ctrl_start(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TXֹͣ +* @param tx_ctrl_handle: MIPI TXʵ +* @retval ɹ:0 ʧ:-1 +*/ +bool hal_dsi_tx_ctrl_stop(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief ʼpanel +* @param +* @retval +*/ +void hal_dsi_tx_ctrl_enter_init_panel_mode(void); + +/** +* @brief ˳ʼpanel +* @param +* @retval +*/ +void hal_dsi_tx_ctrl_exit_init_panel_mode(void); + +/** +* @brief MIPI TX +* @param data_type: ͣοödsi_data_type_e +* @param vc: ͨţοödsi_virtual_channel_e +* @param cmd: DCSָ +* @param size: ȡݳ +* @param data: ݴŵַ +* @retval +*/ +void hal_dsi_tx_ctrl_read_cmd(uint8_t data_type, uint8_t vc, uint8_t cmd, uint8_t size, uint8_t *data); + +/** +* @brief MIPI TX +* @param data_type: ͣοödsi_data_type_e +* @param vc: ͨţοödsi_virtual_channel_e +* @param cmd_count: ɱ +* @param ...: ɱ +* @retval +*/ +void hal_dsi_tx_ctrl_write_cmd(uint8_t data_type, uint8_t vc, uint8_t cmd_count, ...); + +/** +* @brief MIPI TX +* @param data_type: ͣοödsi_data_type_e +* @param vc: ͨţοödsi_virtual_channel_e +* @param size: data +* @param data: data +* @retval +*/ +void hal_dsi_tx_ctrl_write_array_cmd(uint8_t data_type, uint8_t vc, uint8_t size, const uint8_t *data); + +/** +* @brief TXʱӷƵϵͳ +* @param esc_div: TXʱӷƵϵ +* @retval +*/ +void hal_dsi_tx_ctrl_set_escape_clock_div(uint8_t esc_div); + +/** +* @brief ˸λŲ +* @param state: Resetߡ +* @retval +*/ +void hal_dsi_tx_ctrl_panel_reset_pin(gpio_level_e state); + +/** +* @brief òʾ +* @param st_line: ʼ +* @param st_col: ʼ +* @param end_line: +* @param end_col: +* @retval +*/ +void hal_dsi_tx_ctrl_set_partial_disp_area(uint32_t st_line, uint32_t st_col, uint32_t end_line, uint32_t end_col); + +/** +* @brief ʾܿ +* @param pd_en: زʾ +* @retval +*/ +void hal_dsi_tx_ctrl_set_partial_disp(function_state_e pd_en); + +/** +* @brief øдɫ +* @param R: RGBR +* @param G: RGBG +* @param B: RGBB +* @retval +*/ +void hal_dsi_tx_ctrl_set_overwrite_rgb(uint8_t R, uint8_t G, uint8_t B); + +/** +* @brief ȫд +* @param ow_en: ȫд +* @retval +*/ +void hal_dsi_tx_ctrl_set_overwrite(function_state_e ow_en); + +/** +* @brief RGBBGR +* @param endianness: ѡRGBBGRʾ +* @retval +*/ +void hal_dsi_tx_ctrl_set_endianness(dpi_endianness_type_e endianness); + +/** +* @brief CCM +* @param coef: ƻοṹccm_coef_t +* @retval +*/ +void hal_dsi_tx_ctrl_set_ccm(ccm_coef_t coef); + +/** +* @brief TX VPG +* @param vpg_en: ʹVPG +* @param style: VPGʽ +* @retval +*/ +void hal_dsi_tx_ctrl_set_vpg(function_state_e vpg_en, dsi_tx_vpg_style_e style); + +/** +* @brief video modeʹLP CMD +* @param lp_en:ʹLP CMD +* @retval +*/ +void hal_dsi_tx_ctrl_set_lp_cmd(function_state_e lp_en); + +/** +* @brief ütxͼ +* @param tx_ctrl_handle: dsi tx handle +* @param crop: ü +* @retval +*/ +void hal_dsi_tx_crop_pic(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, hal_dsi_tx_crop_t *crop); + +#if !defined(ISP_568) && !defined(ISP_368) + /* ISP_518/ISP_308 ӿ */ + /** + * @brief ˮƽת + * @param flip_en: ˮƽת + * @retval + */ + void hal_dsi_tx_ctrl_set_horizon_flip(function_state_e flip_en); + + /** + * @brief tx filter + * @param tx_ctrl_handle: dsi tx handle + * @param filter_h: ˮƽfilter + * @param filter_v: ֱfilter + * @retval true/false + */ + bool hal_dsi_tx_ctrl_set_cus_pq_filter(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint32_t filter_h[32][2], uint32_t filter_v[32][2]); + + /** + * @brief txԵ,ֻ + * @param tx_ctrl_handle: dsi tx handle + * @param threshold: Եǿǿ + * @param slope: ԵǿΧ + * @retval true/false + */ + bool hal_dsi_tx_ctrl_set_cus_pq_edge(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint8_t threshold, uint16_t slope); +#else + /* ISP_568/ISP_368 ӿ */ + /** + * @brief tx filter + * @param tx_ctrl_handle: dsi tx handle + * @param filter: tx filter + * @retval true/false + */ + bool hal_dsi_tx_ctrl_set_cus_pq_filter(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint32_t filter[32]); + + /** + * @brief TX command mode ͬӿ,յTEźźãֹ˺ + * @param tx_ctrl_handle: dsi tx handle + * @retval true/false + */ + bool hal_dsi_tx_ctrl_cmd_mode_rcv_te(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); +#endif + +#endif //__HAL_DSI_TX_CTRL_H__ diff --git a/src/sdk/include/hal_gpio.h b/src/sdk/include/hal_gpio.h new file mode 100644 index 0000000..3c8ae01 --- /dev/null +++ b/src/sdk/include/hal_gpio.h @@ -0,0 +1,537 @@ +/******************************************************************************* +* +* +* File: hal_gpio.h +* Description gpio HALͷļ +* Version V0.1 +* Date 2021-03-17 +* Author wuc + *******************************************************************************/ +#ifndef __HAL_GPIO_H__ +#define __HAL_GPIO_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +/** +* @brief GPIO pin +*/ +typedef enum +{ + /*GPIOPIN*/ + IO_PAD_GPIO0 = 0, + IO_PAD_GPIO1, + IO_PAD_GPIO2, + IO_PAD_GPIO3, + IO_PAD_GPIO4, + IO_PAD_GPIO5, + IO_PAD_GPIO6, + IO_PAD_RESV, + IO_PAD_GPIO8, + IO_PAD_GPIO9, + IO_PAD_GPIO10, + IO_PAD_GPIO11, + IO_PAD_GPIO12, + IO_PAD_GPIO13, + IO_PAD_GPIO14, + IO_PAD_RESV1, + IO_PAD_RESV2, + IO_PAD_GPIO17, + IO_PAD_GPIO18, + IO_PAD_GPIO19, + IO_PAD_GPIO20, + IO_PAD_GPIO21, + + /*ʵPAD NAMEPIN*/ + IO_PAD_AP_SPIS_MISO = IO_PAD_GPIO0, + IO_PAD_AP_SPIS_MOSI = IO_PAD_GPIO1, + IO_PAD_AP_INT = IO_PAD_GPIO2, + IO_PAD_AP_TE = IO_PAD_GPIO3, + IO_PAD_AP_SWIRE = IO_PAD_GPIO4, + IO_PAD_TD_SPIM_MISO = IO_PAD_GPIO5, + IO_PAD_TD_SPIM_MOSI = IO_PAD_GPIO6, + IO_PAD_TD_RSTN = IO_PAD_RESV, + IO_PAD_TD_TPRSTN = IO_PAD_GPIO8, + IO_PAD_TD_INT = IO_PAD_GPIO9, + IO_PAD_TD_LEDPWM = IO_PAD_GPIO10, + IO_PAD_TD_FC_CLK = IO_PAD_GPIO11, + IO_PAD_TD_FC_CSN = IO_PAD_GPIO12, + IO_PAD_TD_FC_MISO = IO_PAD_GPIO13, + IO_PAD_TD_FC_MOSI = IO_PAD_GPIO14, + IO_PAD_UART_RX = IO_PAD_GPIO17, + IO_PAD_UART_TX = IO_PAD_GPIO18, + IO_PAD_PWMEN = IO_PAD_GPIO19, + IO_PAD_ADCIN = IO_PAD_GPIO20, + IO_PAD_AP_TPRSTN = IO_PAD_GPIO21, + + IO_PAD_AP_SPIS_CLK, + IO_PAD_AP_SPIS_CSN, + IO_PAD_TD_SPIM_CLK, + IO_PAD_TD_SPIM_CSN, + IO_PAD_SFC_CLK, + IO_PAD_SFC_CSN, + IO_PAD_SFC_IO0, + IO_PAD_SFC_IO1, + + IO_PAD_MAX, + + /*ʵBALLPIN*/ + IO_PIN_A1 = IO_PAD_TD_TPRSTN, + IO_PIN_A2 = IO_PAD_TD_FC_CSN, + IO_PIN_A3 = IO_PAD_TD_SPIM_MISO, + IO_PIN_A4 = IO_PAD_TD_SPIM_CLK, + IO_PIN_A5 = IO_PAD_PWMEN, + IO_PIN_A6 = IO_PAD_ADCIN, + IO_PIN_A7 = IO_PAD_AP_INT, + IO_PIN_A8 = IO_PAD_AP_SPIS_MOSI, + IO_PIN_B1 = IO_PAD_TD_FC_CLK, + IO_PIN_B2 = IO_PAD_TD_FC_MISO, + IO_PIN_B3 = IO_PAD_TD_SPIM_MOSI, + IO_PIN_B4 = IO_PAD_TD_SPIM_CSN, + IO_PIN_B5 = IO_PAD_AP_SWIRE, + IO_PIN_B7 = IO_PAD_AP_SPIS_MISO, + IO_PIN_B8 = IO_PAD_AP_SPIS_CSN, + IO_PIN_C1 = IO_PAD_TD_FC_MOSI, + IO_PIN_C2 = IO_PAD_TD_LEDPWM, + IO_PIN_C4 = IO_PAD_UART_TX, + IO_PIN_C5 = IO_PAD_UART_RX, + IO_PIN_C6 = IO_PAD_AP_TE, + IO_PIN_D1 = IO_PAD_TD_RSTN, + IO_PIN_D2 = IO_PAD_TD_INT, + IO_PIN_D7 = IO_PAD_AP_TPRSTN, + IO_PIN_D8 = IO_PAD_AP_SPIS_CLK, +} io_pad_e; + +/** +* @brief PAD_AP_SPIS_CLKѡmode +*/ +typedef enum +{ + IO_MODE_JTAG_TCK = 0, + IO_MODE_SPIS_SCLK = 1, + IO_MODE_I2C0_SCL = 3, +} pad_ap_spis_clk_mode_e; + +/** +* @brief PAD_AP_SPIS_CSNѡmode +*/ +typedef enum +{ + IO_MODE_JTAG_TRSTN = 0, + IO_MODE_SPIS_CSN = 1, + IO_MODE_I2C0_SDA = 3, +} pad_ap_spis_csn_mode_e; + +/** +* @brief PAD_AP_SPIS_MISOѡmode +*/ +typedef enum +{ + IO_MODE_JTAG_TDO = 0, + IO_MODE_SPIS_MISO = 1, + IO_MODE_GPIO0 = 2, + IO_MODE_UART_RX_AP = 3, + IO_MODE_SPIM_MISO_AP = 4, +} pad_ap_spis_miso_mode_e; + +/** +* @brief PAD_AP_SPIS_MOSIѡmode +*/ +typedef enum +{ + IO_MODE_JTAG_TMS = 0, + IO_MODE_SPIS_MOSI = 1, + IO_MODE_GPIO1 = 2, + IO_MODE_UART_TX_AP = 3, + IO_MODE_SPIM_MOSI_AP = 4, +} pad_ap_spis_mosi_mode_e; + +/** +* @brief PAD_AP_TPRSTNѡmode +*/ +typedef enum +{ + IO_MODE_JTAG_TDI = 0, + IO_MODE_GPIO21 = 2, +} pad_ap_tprstn_mode_e; + +/** +* @brief PAD_AP_INTѡmode +*/ +typedef enum +{ + IO_MODE_GPIO2 = 2, +} pad_ap_int_mode_e; + +/** +* @brief PAD_AP_TEѡmode +*/ +typedef enum +{ + IO_MODE_TEAR = 0, + IO_MODE_GPIO3 = 2, +} pad_ap_te_mode_e; + +/** +* @brief PAD_AP_SWIREѡmode +*/ +typedef enum +{ + IO_MODE_SWIRE = 0, + IO_MODE_PWMO = 1, + IO_MODE_GPIO4 = 2, +} pad_ap_swire_mode_e; + +/** +* @brief PAD_TD_SPIM_CLKѡmode +*/ +typedef enum +{ + IO_MODE_SPIM_SCLK = 0, + IO_MODE_I2C1_SCL = 1, +} pad_td_spim_clk_mode_e; + +/** +* @brief PAD_TD_SPIM_CSNѡmode +*/ +typedef enum +{ + IO_MODE_SPIM_CSN = 0, + IO_MODE_I2C1_SDA = 1, +} pad_td_spim_csn_mode_e; + +/** +* @brief PAD_TD_SPIM_MISOѡmode +*/ +typedef enum +{ + IO_MODE_SPIM_MISO = 0, +#if defined(ISP_568) || defined(ISP_368) + IO_MODE_PWMO1 = 1, +#endif + IO_MODE_GPIO5 = 2, +} pad_td_spim_miso_mode_e; + +/** +* @brief PAD_TD_SPIM_MOSIѡmode +*/ +typedef enum +{ + IO_MODE_SPIM_MOSI = 0, + IO_MODE_GPIO6 = 2, +} pad_td_spim_mosi_mode_e; + +/** +* @brief PAD_TD_TPRSTNѡmode +*/ +typedef enum +{ + IO_MODE_GPIO8 = 2, +} pad_td_tprstn_mode_e; + +/** +* @brief PAD_TD_INTѡmode +*/ +typedef enum +{ + IO_MODE_GPIO9_FUNC = 0, + IO_MODE_GPIO9 = 2, +} pad_td_int_mode_e; + +/** +* @brief PAD_TD_LEDPWMѡmode +*/ +typedef enum +{ + IO_MODE_PWMI = 0, +#if defined(ISP_568) || defined(ISP_368) + IO_MODE_PWMO2 = 1, +#endif + IO_MODE_GPIO10 = 2, +} pad_td_ledpwm_mode_e; + +/** +* @brief PAD_TD_FC_CLKѡmode +*/ +typedef enum +{ + IO_MODE_TSPIS_CLK = 0, + IO_MODE_GPIO11 = 2, +} pad_td_fc_clk_mode_e; + +/** +* @brief PAD_TD_FC_CSNѡmode +*/ +typedef enum +{ + IO_MODE_TSPIS_CSN = 0, + IO_MODE_GPIO12 = 2, +} pad_td_fc_csn_mode_e; + +/** +* @brief PAD_TD_FC_MISOѡmode +*/ +typedef enum +{ + IO_MODE_TSPIS_MISO = 0, + IO_MODE_GPIO13 = 2, +} pad_td_fc_miso_mode_e; + +/** +* @brief PAD_TD_FC_MOSIѡmode +*/ +typedef enum +{ + IO_MODE_TSPIS_MOSI = 0, + IO_MODE_GPIO14 = 2, +} pad_td_fc_mosi_mode_e; + +/** +* @brief PAD_UART_RXѡmode +*/ +typedef enum +{ + IO_MODE_UART_RX = 0, + IO_MODE_GPIO17 = 2, +} pad_uart_rx_mode_e; + +/** +* @brief PAD_UART_TXѡmode +*/ +typedef enum +{ + IO_MODE_UART_TX = 0, + IO_MODE_GPIO18 = 2, +} pad_uart_tx_mode_e; + +/** +* @brief PAD_PWMENѡmode +*/ +typedef enum +{ + IO_MODE_GPIO19 = 2, +} pad_pwmen_mode_e; + +/** +* @brief PAD_ADCINѡmode +*/ +typedef enum +{ + IO_MODE_GPIO20 = 2, +} pad_adcin_mode_e; + +/** +* @brief PAD_SFC_CLKѡmode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_CLK = 0, + IO_MODE_EXT_FLS_CLK = 1, +} pad_sfc_clk_mode_e; + +/** +* @brief PAD_SFC_CSNѡmode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_CSN = 0, + IO_MODE_EXT_FLS_CSN = 1, +} pad_sfc_csn_mode_e; + +/** +* @brief PAD_SFC_IO0ѡmode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_IO0 = 0, + IO_MODE_EXT_FLS_MISO = 1, +} pad_sfc_io0_mode_e; + +/** +* @brief PAD_SFC_IO1ѡmode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_IO1 = 0, + IO_MODE_EXT_FLS_MOSI = 1, +} pad_sfc_io1_mode_e; + +/** +* @brief PADѹת +*/ +typedef enum +{ + IO_SLEW_RATE_SLOW = 0, + IO_SLEW_RATE_FAST = 1, +} pad_slew_rate_e; + +/******************************************************************************* +* IOE +*******************************************************************************/ +/** +* @brief GPIO io +*/ +typedef enum +{ + IO_IOE_INPUT = 0, + IO_IOE_OUTPUT +} gpio_ioe_direct_e; + +/** +* @brief GPIO level +*/ +typedef enum +{ + IO_LVL_LOW = 0, + IO_LVL_HIGH +} gpio_level_e; + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief ָPADΪGPIO modeΪinputָжϴʽ +* @param padGPIOţοögpio_pad_e +* @param trig4жϴʽοösys_cfg_trigger_e +* @retval +*/ +void hal_gpio_init_eint(io_pad_e pad, sys_cfg_trigger_e trig); + +/** +* @brief עGPIOжϻص +* @param padGPIOţοögpio_pad_e +* @param cb_funcصַ +* @param dataصַ +* @retval +*/ +void hal_gpio_reg_eint_cb(io_pad_e pad, fcb_type cb_func); + +/** +* @brief GPIOж +* @param padGPIOţοögpio_pad_e +* @param stateؿ +* @retval +*/ +void hal_gpio_ctrl_eint(io_pad_e pad, function_state_e state); + +/** +* @brief ȡGPIOж +* @param padGPIOţοögpio_pad_e +* @retval +*/ +gpio_int_e hal_gpio_get_int_type(io_pad_e pad); + +/** +* @brief ָPADΪGPIO modeΪoutputָʼƽ +* @param padGPIOţοögpio_pad_e +* @param lvlʼƽοögpio_level_e +* @retval +*/ +void hal_gpio_init_output(io_pad_e pad, gpio_level_e lvl); + +/** +* @brief װӿ +* @param padGPIOţοögpio_pad_e +* @param lvlʼƽοögpio_level_e +* @retval +*/ +void hal_gpio_set_output_data(io_pad_e pad, gpio_level_e lvl); + +/** +* @brief װӿչ֧ͬʱ֪ͨIOƽ +* @param pad1GPIOţοögpio_pad_e +* @param pad1_lvlõƽοögpio_level_e +* @param pad2GPIOţοögpio_pad_e +* @param pad2_lvlõƽοögpio_level_e +* @retval +*/ +void hal_gpio_set_output_data_ex(io_pad_e pad1, gpio_level_e pad1_lvl, io_pad_e pad2, gpio_level_e pad2_lvl); + +/** +* @brief ָPADΪGPIO modeΪinput +* @param padGPIOţοögpio_pad_e +* @retval +*/ +void hal_gpio_init_input(io_pad_e pad); + +/** +* @brief ȡƽ +* @param padGPIOţοögpio_pad_e +* @retval +*/ +gpio_level_e hal_gpio_get_input_data(io_pad_e pad); + +/** +* @brief io mode +* @param padGPIOţοögpio_pad_e +* @param modeģʽοPADӦmodeö +* @retval +*/ +void hal_gpio_set_mode(io_pad_e pad, uint8_t mode); + +/** +* @brief ȡָPADĬ״̬ +* @param padGPIOţοögpio_pad_e +* @param up_enableĬ״̬ +* @param down_enableĬ״̬ +* @retval +*/ +void hal_gpio_get_pull_state(io_pad_e pad, function_state_e *up_enable, function_state_e *down_enable); + +/** +* @brief ָPADĬ״̬ +* @param padGPIOţοögpio_pad_e +* @param up_enableĬ״̬ +* @param down_enableĬ״̬ +* @retval +*/ +void hal_gpio_set_pull_state(io_pad_e pad, function_state_e up_enable, function_state_e down_enable); + +/** +* @brief ָPADǷΪʩش +* @param padGPIOţοögpio_pad_e +* @param st_enable1Ϊʩش0Ϊ +* @retval +*/ +void hal_gpio_set_schmitt_trigger(io_pad_e pad, function_state_e st_enable); + +/** +* @brief ָPAD +* @param padGPIOţοögpio_pad_e +* @param strengthǿȣȡֵΪ0~3 +* @retval +*/ +void hal_gpio_set_driving_strength(io_pad_e pad, uint8_t strength); + +/** +* @brief ָPADĵѹת +* @param padGPIOţοögpio_pad_e +* @param rateǿȣȡֵΪ0~3 +* @retval +*/ +void hal_gpio_set_slew_rate(io_pad_e pad, pad_slew_rate_e rate); + +/** +* @brief AP_RSTNж +* @param enable: жϿ +* @param cb_funcص +* @param trigģʽ +* @retval +*/ +void hal_gpio_set_ap_reset_int(bool enable, fcb_type cb_func, sys_cfg_trigger_e trig); + +#endif /* __HAL_GPIO_H__ */ diff --git a/src/sdk/include/hal_i2c_master.h b/src/sdk/include/hal_i2c_master.h new file mode 100644 index 0000000..7d60cb3 --- /dev/null +++ b/src/sdk/include/hal_i2c_master.h @@ -0,0 +1,80 @@ +/******************************************************************************* +* +* +* File: hal_i2c_master.h +* Description i2c hal file +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ + +#ifndef __HAL_I2C_MASTER_H__ +#define __HAL_I2C_MASTER_H__ + +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +/************************************************************************** +* @name : hal_i2c_m_dma_init +* @brief : i2c master dma ʼ +* @param[in] : slave_addrĿӻַ +* @param[in] : addr_bitsĿӻַλ +* @param[in] : i2c_speed_hz: ͨ +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_m_dma_init(uint8_t slave_addr, uint8_t addr_bits, uint32_t i2c_speed_hz); + +/************************************************************************** +* @name : hal_i2c_m_dma_write +* @brief : i2c master dma +* @param[in] : txBufferbuffer +* @param[in] : data_sizeݸ +* @return : STATUS_SUCCESS DMA ͨһȫ +* @return : ͳҪµú +* @retval : +**************************************************************************/ +status_t hal_i2c_m_dma_write(const uint8_t *txBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_m_dma_read +* @brief : i2c master dma +* @param[in] : reg_addressȷͼĴַӻ +* @param[in] : reg_sizeַֽ +* @param[in] : rxBufferbuffer +* @param[in] : data_sizeݳ +* @return : STATUS_SUCCESSĴַͳɹDMAͨһɽ +* @return : ճҪµú +* @retval : +**************************************************************************/ +status_t hal_i2c_m_dma_read(uint32_t reg_address, size_t reg_size, uint8_t *rxBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_m_transfer_complate +* @brief : ȡ i2c master ״̬ +* @param[in] : +* @return : trueݷ +* @return : falseݻڷ +* @retval : +**************************************************************************/ +bool hal_i2c_m_transfer_complate(void); + +/************************************************************************** +* @name : hal_i2c_m_set_high_impedance +* @brief : I2C IOΪ̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_m_set_high_impedance(void); +/************************************************************************** +* @name : hal_i2c_m_deinit +* @brief : i2c IPȥʼصʹܡʱӣ +* @param[in] : +* @return : +* @retval : +***************************************************************************/ +void hal_i2c_m_deinit(void); +#endif /* __HAL_I2C_MASTER_H__*/ + diff --git a/src/sdk/include/hal_i2c_slave.h b/src/sdk/include/hal_i2c_slave.h new file mode 100644 index 0000000..96ecb00 --- /dev/null +++ b/src/sdk/include/hal_i2c_slave.h @@ -0,0 +1,179 @@ +/******************************************************************************* +* +* +* File: hal_i2c_slave.h +* Description i2c hal file +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ + +#ifndef __HAL_I2C_SLAVE_H__ +#define __HAL_I2C_SLAVE_H__ + +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +typedef enum +{ + I2C_S_INT_READ = 0, // ж + I2C_S_INT_RX, // ж + I2C_S_INT_STOP // stop ж +} e_i2c_s_int_status; + +#if defined(ISP_568) || defined(ISP_368) +typedef enum +{ + I2C_S_0 = 0, + I2C_S_1, + I2C_S_MAX +} i2c_s_index_e; +#endif + +typedef void (*hal_i2c_s_callback_t)(e_i2c_s_int_status int_status, size_t receive_num); + +/************************************************************************** +* @name : hal_i2c_s_init +* @brief : i2c slave ʼ +* @param[in] : slave_addrӻַ +* @param[in] : addr_bitsӻַλ +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_init(uint8_t slave_addr, uint8_t addr_bits); + +/************************************************************************** +* @name : hal_i2c_s_dma_write +* @brief : i2c slave dma +* @param[in] : txBufferbuffer +* @param[in] : data_sizeݸ +* @return : STATUS_SUCCESS DMA ͨһȫ +* @return : ͳҪµú +* @retval : +**************************************************************************/ +status_t hal_i2c_s_dma_write(const uint8_t *txBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_s_nonblocking_read +* @brief : i2c slave ׼ +* @param[in] : rxBufferbuffer +* @param[in] : data_size +* @return : STATUS_SUCCESS׼գʱͨŲһʼ +* @return : óҪµú +* @retval : +**************************************************************************/ +status_t hal_i2c_s_nonblocking_read(uint8_t *rxBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_s_transfer_complate +* @brief : ȡ i2c slave ״̬ +* @param[in] : +* @return : trueݷ +* @return : falseݻڷ +* @retval : +**************************************************************************/ +bool hal_i2c_s_write_complate(void); + +/************************************************************************** +* @name : hal_i2c_s_read_complate +* @brief : ȡ i2c slave ״̬ +* @param[in] : +* @return : ݽո +* @retval : +**************************************************************************/ +uint8_t hal_i2c_s_read_complate(void); + +/************************************************************************** +* @name : hal_i2c_s_read_complate_clear +* @brief : i2c slave ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_read_complate_clear(void); + +/************************************************************************** +* @name : hal_i2c_s_set_dma_tx_cycle +* @brief : I2C cycle ģʽ +* @param[in] : +* @return : ENABLEcycleģʽDISABLEcycleģʽ +* @retval : +**************************************************************************/ +void hal_i2c_s_set_dma_tx_cycle(bool enable); + +/************************************************************************** +* @name : hal_i2c_s_set_transfer +* @brief : i2c ӻݽ +* @param[in] :hal_tp_transfer_phone_tmpָ +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_set_transfer(hal_i2c_s_callback_t hal_i2c_s_callback_tmp); + +/************************************************************************** +* @name : hal_i2c_s_read_data +* @brief :read data +* @param[in] : rx_data: +* @return : 1: ɹȡ +* @return : 0: fifo Ϊ +* @retval : +**************************************************************************/ +status_t hal_i2c_s_read_data(uint8_t *rx_data); + +/************************************************************************** +* @name : hal_i2c_s_write_data +* @brief :write data +* @param[in] : tx_data: ׼͵ +* @return : 1: ÷ͳɹ +* @return : 0: fifo +* @retval : +**************************************************************************/ +status_t hal_i2c_s_write_data(const uint8_t tx_data); + +/************************************************************************** + * @name : hal_i2c_s_rxfifo_notempty + * @brief : жϵǰ rxfifo Ƿ + * @param[in] : + * @return : true: rxfifo + * @return : false: rxfifo û + * @retval : + **************************************************************************/ +bool hal_i2c_s_rxfifo_notempty(void); + +/************************************************************************** +* @name : hal_i2c_s_set_high_impedance +* @brief : I2C ӻIOΪ̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_set_high_impedance(void); +/************************************************************************** +* @name : hal_i2c_s_get_tx_byte_num +* @brief : ȡI2Cӻͳɹֽ +* @param[in] : +* @return :ֽ +* @retval : +**************************************************************************/ +int hal_i2c_s_get_tx_byte_num(void); +/************************************************************************** +* @name : hal_i2c_s_deinit +* @brief : i2c IPȥʼصʹܡʱӣ +* @param[in] :slave_num ӻ +* @return : +* @retval : +***************************************************************************/ +void hal_i2c_s_deinit(void); +#if defined(ISP_568) || defined(ISP_368) + /************************************************************************** + * @name : hal_i2c_s_sel + * @brief : i2c slave ѡ + * @param[in] : slaverӻ + * @return : + * @retval : + **************************************************************************/ + void hal_i2c_s_sel(i2c_s_index_e slaver); +#endif +#endif /* __HAL_I2C_SLAVE_H__*/ + diff --git a/src/sdk/include/hal_pwm.h b/src/sdk/include/hal_pwm.h new file mode 100644 index 0000000..9741707 --- /dev/null +++ b/src/sdk/include/hal_pwm.h @@ -0,0 +1,219 @@ +/******************************************************************************* +* +* +* File: hal_pwm.h +* Description pwm HALͷļ +* Version V0.1 +* Date 2021-03-17 +* Author wuc + *******************************************************************************/ +#ifndef __HAL_PWM_H__ +#define __HAL_PWM_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "hal_gpio.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief PWMܵĶ */ +typedef enum _pwm_out_ctrl_e +{ + PWMO_CTRL_KEEP = 0, + PWMO_CTRL_LOW = 1, + PWMO_CTRL_HIGH = 2, + PWMO_CTRL_TOGGLE = 3, + PWMO_CTRL_MAX +} pwm_out_ctrl_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief PWMOʼ +* @param +* @retval +*/ +void hal_pwm_out_init(void); + +/** +* @brief PWMOʼ +* @param +* @retval +*/ +void hal_pwm_out_deinit(void); + +/** +* @brief PWMOָͣ +* @param stateؿ +* @retval +*/ +void hal_pwm_out_pause(function_state_e state); + +/** +* @brief PWMO岢ʼ +* @param ctl0ֵthr0ʱIJοöpwm_out_ctrl_e +* @param ctl1ֵthr1ʱIJοöpwm_out_ctrl_e +* @param thr0ֵ0λus +* @param thr1ֵ1λus +* @param periodһڵʱ䣬λus +* @retval +*/ +void hal_pwm_out_config_all(pwm_out_ctrl_e ctl0, pwm_out_ctrl_e ctl1, uint32_t thr0, uint32_t thr1, uint32_t period); + +/** +* @brief ͬģʽPWMOв +* @param ctl0ֵthr0ʱIJοöpwm_out_ctrl_e +* @param ctl1ֵthr1ʱIJοöpwm_out_ctrl_e +* @param thr0ֵ0λus +* @param thr1ֵ1λus +* @param periodһڵʱ䣬λus +* @retval +*/ +void hal_pwm_out_sync_all(pwm_out_ctrl_e ctl0, pwm_out_ctrl_e ctl1, uint32_t thr0, uint32_t thr1, uint32_t period); + +/** +* @brief pwmԿƱ +* @param polarity: ԣfalse:ȸߺͣtrue:ȵͺ +* @param duty_ratio: ռձ(0-total_ratio) +* @param total_ratio: ϸ +* @param frequency: ƵʣλHZ +* @retval +*/ +void hal_pwm_out_config_duty_ratio(bool polarity, uint16_t duty_ratio, uint16_t total_ratio, uint32_t frequency); + +/** +* @brief ͬģʽPWMO +* @param periodһڵʱ䣬λus +* @retval +*/ +void hal_pwm_out_sync_period(uint32_t period); + +/** +* @brief ͬģʽPWMOĿ +* @param ctl0ֵthr0ʱIJοöpwm_out_ctrl_e +* @param ctl1ֵthr1ʱIJοöpwm_out_ctrl_e +* @retval +*/ +void hal_pwm_out_sync_ctl(pwm_out_ctrl_e ctl0, pwm_out_ctrl_e ctl1); + +/** +* @brief ֵͬģʽPWMOֵ +* @param thr0ֵ0λus +* @param thr1ֵ1λus +* @retval +*/ +void hal_pwm_out_sync_thr(uint32_t thr0, uint32_t thr1); + +/** +* @brief ͬͣģʽָͣPWMO +* @param pause_stateָͣ +* @retval +*/ +void hal_pwm_out_sync_pause(function_state_e pause_state); + +/** +* @brief PWMIʼ +* @param +* @retval +*/ +void hal_pwm_in_init(void); + +/** +* @brief PWMIʼ +* @param +* @retval +*/ +void hal_pwm_in_deinit(void); + +/** +* @brief עPWMIжϻصشPWMIжָ룬οpwm_int_type_e +* @param cb_funcصַ +* @retval +*/ +void hal_pwm_in_register_callback(fcb_type cb_func); + +/** +* @brief PWMIжϵĿ +* @param high_overflow_enhigh overflowжʹܿ +* @param low_overflow_enlow overflowжʹܿ +* @param total_overflow_entotal overflowжʹܿ +* @param high_done_enhigh doneжʹܿ +* @param low_done_enlow doneжʹܿ +* @param total_done_entotal doneжʹܿ +* @retval +*/ +void hal_pwm_in_config_int(function_state_e high_overflow_en, function_state_e low_overflow_en, function_state_e total_overflow_en, + function_state_e high_done_en, function_state_e low_done_en, function_state_e total_done_en); + +/** +* @brief PWMIжϵĿ +* @param pwm_intжͣοöpwm_int_type_e +* @param enableƿ +* @retval +*/ +void hal_pwm_in_set_int(pwm_int_type_e pwm_int, function_state_e enable); + +/** +* @brief رPWMIж +* @param +* @retval +*/ +void hal_pwm_in_clear_int(void); + +/** +* @brief PWMIж +* @param stateؿ +* @retval +*/ +void hal_pwm_in_ctrl_int(function_state_e state); + +/** +* @brief ȡPWMIʱ +* @param +* @retval ʱλus +*/ +uint32_t hal_pwm_in_get_total_period(void); + +/** +* @brief ȡPWMIߵƽʱ +* @param +* @retval ߵƽʱλus +*/ +uint32_t hal_pwm_in_get_high_period(void); + +/** +* @brief ȡPWMI͵ƽʱ +* @param +* @retval ͵ƽʱλus +*/ +uint32_t hal_pwm_in_get_low_period(void); + +/** +* @brief ȡPWMIۻ +* @param +* @retval ģʹܵǰʱظ32λ¼ +*/ +uint32_t hal_pwm_in_get_current_count(void); + +#if defined(ISP_568) || defined(ISP_368) + /** + * @brief ѡPWMOIO + * @param pad: PWMOIO,ĬΪIO_PAD_AP_SWIRE,ѡͨIO_PAD_TD_SPIM_MISOIO_PAD_TD_LEDPWM + * @retval + */ + void hal_pwm_out_sel_io(io_pad_e pad); +#endif +#endif /* __HAL_PWM_H__ */ diff --git a/src/sdk/include/hal_spi_master.h b/src/sdk/include/hal_spi_master.h new file mode 100644 index 0000000..00c9b50 --- /dev/null +++ b/src/sdk/include/hal_spi_master.h @@ -0,0 +1,89 @@ +/******************************************************************************* +* +* +* File: hal_spi_touch.h +* Description spi hal file +* Version V0.1 +* Date 2021-10-25 +* Author zhanghz +*******************************************************************************/ + +#ifndef __HAL_SPI_MASTER_H__ +#define __HAL_SPI_MASTER_H__ + +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +/************************************************************************** +* @name : hal_spi_m_dma_init +* @brief : SPIM DMA ʼ +* @param[in] :speedͨ +* @param[in] :cpha: õһʱػߵڶʱЧ +* @param[in] :cpol: ߿ʱʱӵƽ +* @return : +* @retval : +**************************************************************************/ +void hal_spi_m_dma_init(uint32_t speed, uint8_t cpha, uint8_t cpol); + +/************************************************************************** +* @name : hal_spi_m_dma_write +* @brief : SPIM +* @param[in] :data_buffer: buffer ͷַ +* @param[in] :data_size: buffer +* @return :STATUS_SUCCESS: óɹݲһ +* @return :òɹҪ÷ +* @retval : +**************************************************************************/ +status_t hal_spi_m_dma_write(const uint8_t *data_buffer, size_t data_size); + +/************************************************************************** +* @name : hal_spi_m_dma_read +* @brief : SPIM ȡ +* @param[in] :cmd: buffer ͷַ +* @param[in] :cmd_size: buffer +* @param[in] :data_buffer: ȡ buffer ͷַ +* @param[in] :data_size: ȡ buffer +* @return :STATUS_SUCCESS: óɹݲһȡ +* @return :òɹҪ÷ +* @retval : +**************************************************************************/ +status_t hal_spi_m_dma_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size); + +/************************************************************************** +* @name : hal_spi_m_get_transfer_complate +* @brief : ȡ SPIM ͨ״̬ +* @param[in] : +* @return :trueͨ +* @retval : +**************************************************************************/ +bool hal_spi_m_get_transfer_complate(void); + +/************************************************************************** +* @name : hal_spi_m_clear_rxfifo +* @brief : rxfifo е +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_spi_m_clear_rxfifo(void); + +/************************************************************************** +* @name : hal_spi_m_set_high_impedance +* @brief : SPI IOΪ̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_spi_m_set_high_impedance(void); +/************************************************************************** +* @name : hal_spi_m_deinit +* @brief : SPI ȥʼ(صSPIM) +* @param[in] : +* @return :true +* @retval : +**************************************************************************/ +bool hal_spi_m_deinit(void); + +#endif + diff --git a/src/sdk/include/hal_spi_slave.h b/src/sdk/include/hal_spi_slave.h new file mode 100644 index 0000000..fc0c57f --- /dev/null +++ b/src/sdk/include/hal_spi_slave.h @@ -0,0 +1,181 @@ +/******************************************************************************* +* Copyright (C) 2021-2022, All Rights Reserved. +* +* File: hal_spi_slave.h +* Description spi slave hal file +* Version V0.1 +* Date 2021-10-23 +* Author lzy +*******************************************************************************/ +#ifndef __HAL_SPI_SLAVE_H__ +#define __HAL_SPI_SLAVE_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/* +Զģʽevent eg:rx_buffer_size=8, host16byte, +յǰ8byteʱSPI_EVENT_RCV_FULL¼,¼, +ɺhostCS,SPI_EVENT_RCV_CS_HIGH¼ +*/ +typedef enum +{ + SPI_EVENT_RCV_DATA = 0, /* ֶģʽ£SPIS ÿһݼ¼ */ + SPI_EVENT_RCV_FULL, /* Զģʽ SPIS ݵbuffer size¼ */ + SPI_EVENT_RCV_CS_HIGH, /* Զģʽ SPIS յCS ߵź */ +} hal_spis_event_e; + +typedef struct hal_spi_packet_info_t +{ + uint8_t *rx_buffer; /* buffer */ + uint32_t rx_buffer_size; /* buffer size */ + bool rx_circle; /* circle mode */ + const uint8_t *tx_buffer; /* buffer */ + uint32_t tx_buffer_size; /* buffer size */ + bool tx_circle; /* circle mode */ + uint32_t packet_size; /* packet size */ +} hal_spi_packet_info_t; + +typedef void (*hal_spi_slave_cb)(hal_spis_event_e event, hal_spi_packet_info_t *packet_info); + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief ʼspi slave ģ +* @param cpha: λ +* @param cpol: +* @param dma: ԶģʽDMA enable +* @retval true/false +*/ +bool hal_spi_slave_init(uint8_t cpha, uint8_t cpol, bool dma); + +/** +* @brief spi slave ģȥʼ +* @param none +* @retval true/false +*/ +bool hal_spi_slave_deinit(void); + +/** +* @brief spi slave עص +* @param cbcall back +* @retval true/false +*/ +bool hal_spi_slave_register_callback(hal_spi_slave_cb cb); + +/** +* @brief spi slave enable +* @param none +* @retval true/false +*/ +bool hal_spi_slave_enable(void); + +/** +* @brief spi slave disable +* @param none +* @retval true/false +*/ +bool hal_spi_slave_disable(void); + +/** +* @brief spi slave Զbuffer, ײԶݺcallback, bufferΪNULLʱΪԶģʽ +* @param bufferԶģʽݽbuffer +* @param size Զģʽݽbuffer size +* @param circlecircle modepacket size buffer size ʱoffset 0д(ݲ֧) +* @retval true/false +*/ +bool hal_spi_slave_set_auto_rx_buffer(uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief spi slave Զbuffer +* @param bufferԶģʽݷbuffer, bufferΪNULLΪлΪԶģʽ +* @param size Զģʽݷbuffer size +* @param circlecircle modeظbuffer +* @retval true/false +*/ +bool hal_spi_slave_set_auto_tx_buffer(const uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief spi slave Զ +* @param none +* @retval true/false +*/ +bool hal_spi_slave_auto_transfer_start(void); + +/** +* @brief spi slave ֹͣԶ(circle mode packetʹ) +* @param none +* @retval true/false +*/ +bool hal_spi_slave_auto_transfer_abort(void); + +/** +* @brief spi slave flush fifo(circle mode packetʹ) +* @param none +* @retval true/false +*/ +bool hal_spi_slave_flush_fifo(void); + +/** +* @brief reset spis tx,spis +* @param bufferԶģʽݷbuffer +* @param size Զģʽݷbuffer size +* @param circlecircle modeظbuffer +* @retval true/false +*/ +bool hal_spi_slave_reset_tx(const uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief check spi slave busy(CS status) +* @param none +* @retval true/false +*/ +bool hal_spi_slave_busy(void); + +/** +* @brief ȡrx fifo ǿ +* @param none +* @retval true/false +*/ +bool hal_spi_slave_get_rxfifo_notempty(void); + +/** +* @brief ֶģʽ´rx fifo ȡ +* @param none +* @retval true/false +*/ +bool hal_spi_slave_read_data(uint32_t *data); + +/** +* @brief ֶģʽtx fifo д +* @param none +* @retval true/false +*/ +bool hal_spi_slave_write_data(const uint8_t data); + +/************************************************************************** +* @name : hal_spi_s_set_high_impedance +* @brief : SPI ӻIOΪ̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_spi_s_set_high_impedance(void); + +#endif /* __HAL_SPI_SLAVE_H__*/ + diff --git a/src/sdk/include/hal_swire.h b/src/sdk/include/hal_swire.h new file mode 100644 index 0000000..9660e83 --- /dev/null +++ b/src/sdk/include/hal_swire.h @@ -0,0 +1,75 @@ +/******************************************************************************* +* +* +* File: hal_swire.h +* Description swire HALͷļ +* Version V0.1 +* Date 2021-03-17 +* Author wuc + *******************************************************************************/ +#ifndef __HAL_SWIRE_H__ +#define __HAL_SWIRE_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief SWIREʼ +* @param +* @retval +*/ +void hal_swire_init(void); + +/** +* @brief SWIREʼ +* @param +* @retval +*/ +void hal_swire_deinit(void); + +/** +* @brief SWIRE岢ʼ +* @param start_timeʼʱλus +* @param stop_timeʱλus300us +* @param high_timeߵƽʱλus +* @param low_time͵ƽʱλus +* @param pulseظ +* @retval +*/ +void hal_swire_start(uint32_t start_time, uint32_t stop_time, + uint32_t high_time, uint32_t low_time, + uint32_t pulse); + +/** +* @brief 򿪻رձ +* @param stateؿ +* @retval +*/ +void hal_swire_open(function_state_e state); + +/** +* @brief עص +* @param cb_funcصַ +* @retval +*/ +void hal_swire_register_callback(fcb_type cb_func); + +#endif /* __HAL_SWIRE_H__ */ diff --git a/src/sdk/include/hal_system.h b/src/sdk/include/hal_system.h new file mode 100644 index 0000000..84f7320 --- /dev/null +++ b/src/sdk/include/hal_system.h @@ -0,0 +1,181 @@ +/******************************************************************************* +* +* +* File: hal_system.h +* Description hal ͨϵͳӿͷļ +* Version V0.1 +* Date 2021-05-21 +* Author lzy + *******************************************************************************/ +#ifndef __HAL_SYSTEM_H__ +#define __HAL_SYSTEM_H__ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief system ʼ +* @param none +* @retval none +*/ +void hal_system_init(uint32_t sysclk); + +/** +* @brief system ʼ console +* @param baud_rate +* @retval none +*/ +void hal_system_init_console(uint32_t baud_rate); + +/** +* @brief mcuidleģʽ,ȴжϻ +* @param disable_systick: idleʱǷرsystick(˳idle ָsystick) +* @retval none +*/ +void hal_system_idle_mode(bool disable_systick); + +/** +* @brief עsystickص +* @param cb_funcصַ +* @retval +*/ +void hal_system_register_systick_cb(fcb_type cb_func); + +/** +* @brief sys tickt +* @param ms: sys tickt , Χ1-10ms +* @retval true/false +*/ +bool hal_system_enable_systick(uint8_t ms); + +/** +* @brief ȡsystickt +* @param none +* @retval ǰsysticktֵ +*/ +bool hal_system_disable_systick(void); + +/** +* @brief ȡsystickt +* @param none +* @retval ǰsysticktֵ +*/ +uint32_t hal_system_get_tick(void); + +/** +* @brief deep sleep mode ģʽ, ȴAP_RSTN +* @param polarity true:ػ, false:½ػ +* @retval none +*/ +void hal_system_deep_sleep_mode(bool polarity); + +/** +* @brief ùflash(ʹùעر,Ļ) +* @param enable:true:ͨF_SPIڲflash , false:ͨF_SPIڲflash +* @retval true/false +*/ +bool hal_system_share_flash_mode(bool enable); + +/** +* @brief sleep mode +* @param enable +* @retval none +*/ +void hal_system_sleep_mode(bool enable); + +/** +* @brief reset chip +* @param none +* @retval none +*/ +void hal_system_reset_chip(void); + +/** +* @brief PVD +* @param none +* @retval none +*/ +void hal_system_set_pvd(bool enable); + +/** +* @brief VCCԴأ +* ʹó: VCC磬13D13MʹԴʱرڲVCC,ֹԴ +* @param enable: true:CP, false:رCP +* @retval none +*/ +void hal_system_set_vcc(bool enable); + +/** +* @brief ûֽʽflashȡ,ҳȡÿҳ1024ֽ +* @param *usr_cfg_t_addr(׵ַ), + usr_cfg_t_size(СԳ1024԰ҳҲҳ) + flash_page ҳ0~63 +* @retval bool +*/ +bool hal_system_flash_read(uint8_t *usr_cfg_t_addr, uint16_t usr_cfg_t_size, uint8_t flash_page); + +/** +* @brief ûֽʽflash(ޣƵд),ҳд룬ÿҳ1024ֽ +* @param *usr_cfg_t_addr(׵ַ), + usr_cfg_t_size(СԳ1024԰ҳдҲҳд) + Ƽҳ˳д뷽ʽһα0ҳʼд룬ſ1~63ҳд + flash_page дҳ0~63 +* @retval bool УsizeǷ񳬳 +*/ +bool hal_system_flash_write(uint8_t *usr_cfg_t_addr, uint16_t usr_cfg_t_size, uint8_t flash_page); + +/** +* @brief flash˳deep sleep power mode +* @param 0xABָ +* @retval null +*/ +void hal_system_flash_release_power_down(void); + +/** +* @brief flashdeep sleep power mode +* @param 0xB9ָ +* @retval null +*/ +void hal_system_flash_power_down(void); + +#if defined(ISP_568) || defined(ISP_368) + /** + * @brief DPHYڲУ׼ + * @param en: ʹܿ + * @retval none + */ + void hal_system_set_phy_calibration(bool en); +#endif + +/** +* @brief ȡλõdebug state +* @param none +* @retval debug state +*/ +uint32_t hal_system_get_debug_state(void); + +/** +* @brief clear debug state(debug only) +* @param none +* @retval none +*/ +void hal_system_clear_debug_state(void); + +#endif //__HAL_SYSTEM_H__ diff --git a/src/sdk/include/hal_timer.h b/src/sdk/include/hal_timer.h new file mode 100644 index 0000000..4930676 --- /dev/null +++ b/src/sdk/include/hal_timer.h @@ -0,0 +1,92 @@ +/******************************************************************************* +* +* +* File: hal_timer.h +* Description timer HALͷļ +* Version V0.1 +* Date 2021-03-16 +* Author wuc + *******************************************************************************/ +#ifndef __HAL_TIMER_H__ +#define __HAL_TIMER_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief ָʱʼ +* @param indexʵ(0~3)οötimer_num_e +* @retval +*/ +void hal_timer_init(timer_num_e index); + +/** +* @brief ָʱʼ +* @param indexʵ(0~3)οötimer_num_e +* @retval +*/ +void hal_timer_deinit(timer_num_e index); + +/** +* @brief ָʱ +* @param indexʵ(0~3)οötimer_num_e +* @param msʱʱ䣬λmsӦóһmsģӦÿҪʱ + ֱʱ䣬ڽӿڲʱмĴá +* @param cb_funcصַҪNULL +* @param dataصIJַҪNULL +* @retval +*/ +void hal_timer_start(timer_num_e index, uint32_t ms, fcb_type cb_func, void *data); + +/** +* @brief ָʱ +* @param indexʵ(0~3)οötimer_num_e +* @param usʱʱ䣬λusӦóһusģӦÿҪʱ + ֱʱ䣬ڽӿڲʱмĴá +* @param cb_funcصַҪNULL +* @param dataصIJַҪNULL +* @retval +*/ +void hal_timer_start_ex(timer_num_e index, uint32_t us, fcb_type cb_func, void *data); + +/** +* @brief ָֹͣʱ +* @param indexʵ(0~3)οötimer_num_e +* @retval +*/ +void hal_timer_stop(timer_num_e index); + +/** +* @brief öʱǷѭʱ +* @param indexʵ(0~3)οötimer_num_e +* @param bool enableѭʱʹ +* @retval +*/ +void hal_timer_set_repeat(timer_num_e index, bool repeat); + +/** +* @brief ȡָָʾ״̬ +* @param indexʵ(0~3)οötimer_num_e +* @retval οtimer_status_e +*/ +timer_status_e hal_timer_get_status(timer_num_e index); + +#endif /* __HAL_TIMER_H__ */ diff --git a/src/sdk/include/hal_uart.h b/src/sdk/include/hal_uart.h new file mode 100644 index 0000000..82efe74 --- /dev/null +++ b/src/sdk/include/hal_uart.h @@ -0,0 +1,131 @@ +/******************************************************************************* +* +* +* File: hal_uart.h +* Description +* Version V0.1 +* Date 2021-11-24 +* Author kc +*******************************************************************************/ + +#ifndef __HAL_UART_H__ +#define __HAL_UART_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "stdint.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef enum +{ + HAL_UART_STOPBIT_1 = 0, + HAL_UART_STOPBIT_2 = 1 +} hal_uart_stopbit_e; + +typedef enum +{ + HAL_UART_PARITY_NO = 0, + HAL_UART_PARITY_ODD = 0x01, + HAL_UART_PARITY_EVEN = 0x03, +} hal_uart_parity_e; + +typedef enum +{ + HAL_UART_DATAWIDTH_6 = 1, + HAL_UART_DATAWIDTH_7 = 2, + HAL_UART_DATAWIDTH_8 = 3 +} hal_uart_datawidth_e; + + +typedef struct +{ + uint32_t baudrate; + hal_uart_stopbit_e stopbits; + hal_uart_datawidth_e data_width; + hal_uart_parity_e parity; +} hal_uart_config_t; + + +typedef struct _hal_uart_handle_t +{ + hal_uart_config_t uart_config; + void (* txdmacallback)(void); + void (* rxdmacallback)(void); +} hal_uart_handle_t; + + +typedef enum +{ + HAL_UART_OK = 0x00U, + HAL_UART_ERROR = 0x01U, + HAL_UART_BUSY = 0x02U, + HAL_UART_TIMEOUT = 0x03U +} hal_uart_status; + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief ʼuart IJʡλȲ +* @param hal_uart_handle_t +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_init(hal_uart_handle_t *huart); + +/** +* @brief رuart +* @param hal_uart_handle_t +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_deinit(hal_uart_handle_t *huart); + +/** +* @brief ʽ +* @param hal_uart_handle_t +* @param pdata:ָ +* @param size:ݴС +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_transmit_blocking(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +/** +* @brief ʽ +* @param hal_uart_handle_t +* @param pdata:ָ +* @param size:ݴС +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_receive_blocking(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +/** +* @brief ʹDMAݣTXRXһDMA ͨҪTX/RXܽRX/TXĴ +* @param hal_uart_handle_t +* @param pdata:ָ +* @param size:ݴС +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_transmit_dma(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +/** +* @brief ʹDMAݣTXRXһDMA ͨҪTX/RXܽRX/TXĴ +* @param hal_uart_handle_t +* @param pdata:ָ +* @param size:ݴС +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_receive_dma(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +#endif /* __HAL_UART_H__ */ diff --git a/src/sdk/include/hal_wdg.h b/src/sdk/include/hal_wdg.h new file mode 100644 index 0000000..2cc0247 --- /dev/null +++ b/src/sdk/include/hal_wdg.h @@ -0,0 +1,94 @@ +/******************************************************************************* +* +* +* File: hal_wdg.h +* Description wdg HALͷļ +* Version V0.1 +* Date 2021-03-16 +* Author wuc + *******************************************************************************/ +#ifndef __HAL_WDG_H__ +#define __HAL_WDG_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! + * @brief watch dogģʽ + */ +typedef enum +{ + WDG_MODE_RESET = 0, //λģʽܷɸλ + WDG_MODE_INTERRUPT = 1 //жģʽܷɽж +} wdg_mode_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief Źʼ +* @param +* @retval +*/ +void hal_wdg_init(void); + +/** +* @brief Źʼ +* @param +* @retval +*/ +void hal_wdg_deinit(void); + +/** +* @brief Ź +* @param wdg_mode_e modeSel: λжģʽ +* @param uint32_t load: ʱʱ䣬λms +* @retval +*/ +void hal_wdg_start(wdg_mode_e modeSel, uint32_t load); + +/** +* @brief ֹͣŹ +* @param +* @retval +*/ +void hal_wdg_stop(void); + +/** +* @brief WDGǷѭʱ +* @param enableѭʱʹ +* @retval +*/ +void hal_wdg_set_repeat(bool repeat); + +/** +* @brief עжϻص +* @param cb_funcصַ +* @param dataصַ +* @retval +*/ +void hal_wdg_register_callback(fcb_type cb_func, void *data); + +/** +* @brief ι +* @param +* @retval +*/ +void hal_wdg_kick_dog(void); + +#endif /* __HAL_WDG_H__ */ diff --git a/src/sdk/sdk_version.h b/src/sdk/sdk_version.h new file mode 100644 index 0000000..def350e --- /dev/null +++ b/src/sdk/sdk_version.h @@ -0,0 +1 @@ +#define SDK_REVISION 4243 \ No newline at end of file diff --git a/~$调试记录_Note20_NT37701AH_CSOT667_20230324(WL368).xlsx b/~$调试记录_Note20_NT37701AH_CSOT667_20230324(WL368).xlsx new file mode 100644 index 0000000..34cab21 Binary files /dev/null and b/~$调试记录_Note20_NT37701AH_CSOT667_20230324(WL368).xlsx differ