commit b9747ed1c74d47e2df3bb4f61365e65138fdb813 Author: “苏飞源” Date: Fri Jul 14 14:35:50 2023 +0800 1、首次提交 2、解决偶发触摸卡问题：将ST触摸芯片的软件复位全部改成硬件复位。 3、增加版本号打印和BIN文件版本 4、增加INT被拉死问题，强制硬件复位 diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..243d6b9 --- /dev/null +++ b/.gitignore @@ -0,0 +1,85 @@ +# A .gitignore for Keil projects. +# Taken mostly from http://www.keil.com/support/man/docs/uv4/uv4_b_filetypes.htm + +# User-specific uVision files +*.opt +*.uvopt +*.uvoptx +*.uvgui +*.uvgui.* +*.uvguix.* + +# Listing files +#*.cod +#*.map +#*.m51 +#*.m66 +*._ip +*.i +*.lst +*/Listings/*.txt + +# define exception below if needed +*.scr + +# Object and HEX files +*.axf +*.b[0-3][0-9] +*.hex +*.d +*.crf +*.elf +*.hex +*.h86 +*.obj +*.o +*.sbr +*.htm + +# Build files +# define exception below if needed +*.bat +*._ia +*.__i +*._ii + +# Generated output files +/Listings/* +/Objects/* + +# Debugger files +# define exception below if needed +*.ini + +# Other files +*.build_log.htm +*.cdb +*.dep +*.ic +*.lin +*.lnp +*.orc +# define exception below if needed +*.pack +# define exception below if needed +*.pdsc +*.plg +# define exception below if needed +*.sct +*.sfd +*.sfr + +# Miscellaneous +*.tra +*.fed +*.l1p +*.l2p +*.iex + + +/si/ +!*.bin +!*.map + +# To explicitly override the above, define any exceptions here; e.g.: +# !my_customized_scatter_file.sct diff --git a/project/ISP_368/ISP_368.uvprojx b/project/ISP_368/ISP_368.uvprojx new file mode 100644 index 0000000..38ab6b0 --- /dev/null +++ b/project/ISP_368/ISP_368.uvprojx @@ -0,0 +1,532 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + ISP_368 + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + ARMCM0 + ARM + ARM.CMSIS.5.5.1 + http://www.keil.com/pack/ + IRAM(0x20000000,0x00020000) IROM(0x00000000,0x00040000) CPUTYPE("Cortex-M0") CLOCK(12000000) ESEL ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000) + 0 + $$Device:ARMCM0$Device\ARM\ARMCM0\Include\ARMCM0.h + + + + + + + + + + $$Device:ARMCM0$Device\ARM\SVD\ARMCM0.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\Objects\ + WL368_S10LITE_CSOT667_V100_20230714 + 1 + 0 + 1 + 1 + 1 + .\Listings\ + 1 + 0 + 1 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin -o .\Objects\@L.bin .\Objects\@L.axf + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + + DARMCM1.DLL + -pCM0 + SARMCM3.DLL + + TARMCM1.DLL + -pCM0 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + "Cortex-M0" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 16 + 1 + 1 + 0 + 0 + 4 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x40000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x2000 + + + 1 + 0x10000 + 0x10000 + + + 0 + 0x70000 + 0xf0 + + + 0 + 0x70100 + 0xd0 + + + 0 + 0x701d0 + 0x7e30 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 2 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + ISP_368 + + ..\..\src;..\..\src\board;..\..\src\common;..\..\src\sdk\include;..\..\src\app\demo;..\..\src\sdk\include\M0;..\..\src\app;..\..\src\app\module_demo;..\..\src\app\touch;..\..\src\app\S8;..\..\src\app\S9;..\CVWL368 + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x00000000 + 0x20000000 + + + + + + + + + + + + + app + + + main.c + 1 + ..\..\src\app\main.c + + + ap_demo.c + 1 + ..\..\src\app\demo\ap_demo.c + + + app_tp_transfer.c + 1 + ..\..\src\app\demo\app_tp_transfer.c + + + app_tp_for_custom_s8.c + 1 + ..\..\src\app\demo\app_tp_for_custom_s8.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + app_tp_st_touch.c + 1 + ..\..\src\app\demo\app_tp_st_touch.c + + + + + driver + + + CVWL368.lib + 4 + ..\..\src\sdk\CVWL368\lib\CVWL368.lib + + + WL368_S10LITE_CSOT667_TP.lib + 4 + ..\..\src\sdk\CVWL368\lib\WL368_S10LITE_CSOT667_TP.lib + + + + + board + + + board.c + 1 + ..\..\src\board\board.c + + + + + startup + + + startup_ARMCM0.s + 2 + ..\..\src\board\startup\startup_ARMCM0.s + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + RTE\Device\ARMCM0\startup_ARMCM0.s + + + + + + RTE\Device\ARMCM0\system_ARMCM0.c + + + + + + + + diff --git a/project/ISP_368/Listings/WL368_MAT30_F6419.map b/project/ISP_368/Listings/WL368_MAT30_F6419.map new file mode 100644 index 0000000..f1df6ba --- /dev/null +++ b/project/ISP_368/Listings/WL368_MAT30_F6419.map @@ -0,0 +1,5320 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.PWM_OUTPUT_TEST) refers to ap_demo.o(i.test_pwm_out_adjust) for test_pwm_out_adjust + ap_demo.o(i.PWM_OUTPUT_TEST) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.PWM_Task) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.PWM_Task) refers to app_tp_for_custom_s8.o(.data) for Flag_blacklight_EN + ap_demo.o(i.PWM_Task) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight_51) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.ap_set_backlight_51) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_update_frame_rate) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) for hal_dsi_rx_ctrl_set_tear_mode_ex + ap_demo.o(i.ap_update_frame_rate) refers to ap_demo.o(.data) for .data + ap_demo.o(i.app_tp_calibration_exec) refers to app_tp_transfer.o(i.ap_tp_calibration) for ap_tp_calibration + ap_demo.o(i.app_tp_calibration_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) for hal_dsi_tx_ctrl_read_cmd + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.init_panel) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) for hal_dsi_rx_ctrl_set_cus_scld_filter + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) for hal_dsi_rx_ctrl_get_compressen_en + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) for hal_dsi_rx_ctrl_toggle_resolution_ex + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.test_pwm_out_adjust) refers to uidiv.o(.text) for __aeabi_uidivmod + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_init) for hal_pwm_out_init + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_config_all) for hal_pwm_out_config_all + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_sync_all) for hal_pwm_out_sync_all + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight_51) for ap_set_backlight_51 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.ap_tp_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.ap_tp_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) for hal_internal_sync_input_resolution_change_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_dsi_tx_ctrl.o(.conststring) for .conststring + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) for hal_internal_vsync_update_lcdc_addr + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te) refers to hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) for hal_internal_sync_cmd_mode_rcv_te + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) for hal_dsi_tx_ctrl_set_rect_pixel_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) for hal_dsi_tx_ctrl_draw_flicker + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) for hal_dsi_tx_ctrl_draw_chessboard + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_set_prefetch) for drv_lcdc_set_prefetch + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_config_intr) for drv_i2c_s_config_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c0_set_callback) for drv_i2c0_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_sel) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_pwm.o(i.hal_pwm_in_clear_int) refers to drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all) for drv_pwm_in_clear_pwm_int_all + hal_pwm.o(i.hal_pwm_in_config_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_in_ctrl_int) refers to drv_pwm.o(i.drv_pwm_in_set_sys_int) for drv_pwm_in_set_sys_int + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_get_current_count) refers to drv_pwm.o(i.drv_pwm_in_get_current_count) for drv_pwm_in_get_current_count + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_pwm.o(i.drv_pwm_in_get_high_period) for drv_pwm_in_get_high_period + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_pwm.o(i.drv_pwm_in_get_low_period) for drv_pwm_in_get_low_period + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_pwm.o(i.drv_pwm_in_get_counter_period) for drv_pwm_in_get_counter_period + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_in_init) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_register_callback) refers to drv_pwm.o(i.drv_pwm_in_register_callback) for drv_pwm_in_register_callback + hal_pwm.o(i.hal_pwm_in_set_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_config_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(i.hal_pwm_out_common_config) for hal_pwm_out_common_config + hal_pwm.o(i.hal_pwm_out_convert_time) refers to tau_delay.o(i.delayUs) for delayUs + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_get_sync_flag) for drv_pwm_out_get_sync_flag + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_deinit) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sel_io) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_out_sync_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_common.o(.data) for g_system_clock + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_system.o(i.hal_system_flash_read) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_dual_read) for norflash_dual_read + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_erase_block) for norflash_erase_block + hal_system.o(i.hal_system_flash_write) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_write) for norflash_write + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c1_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c0_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_slave_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(i.PWM_OUTPUT_TEST), (44 bytes). + Removing ap_demo.o(i.PWM_Task), (108 bytes). + Removing ap_demo.o(i.test_pwm_out_adjust), (104 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.app_tp_m_transfer_complate), (8 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_clear_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (5 bytes). + Removing app_tp_transfer.o(.data), (6 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (1 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (56 bytes). + Removing app_tp_for_custom_s8.o(.bss), (200 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1440 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (11 bytes). + Removing app_tp_for_custom_s8.o(.data), (10 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode), (100 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data), (268 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (188 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution), (32 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (148 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te), (10 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard), (280 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker), (172 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init), (30 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data), (272 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (80 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (32 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (40 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_sel), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (32 bytes). + Removing hal_pwm.o(.rev16_text), (4 bytes). + Removing hal_pwm.o(.revsh_text), (4 bytes). + Removing hal_pwm.o(i.hal_pwm_in_clear_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_config_int), (60 bytes). + Removing hal_pwm.o(i.hal_pwm_in_ctrl_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_deinit), (18 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_current_count), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_high_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_low_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_total_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_init), (26 bytes). + Removing hal_pwm.o(i.hal_pwm_in_register_callback), (10 bytes). + Removing hal_pwm.o(i.hal_pwm_in_set_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_common_config), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_config_all), (16 bytes). + Removing hal_pwm.o(i.hal_pwm_out_config_duty_ratio), (76 bytes). + Removing hal_pwm.o(i.hal_pwm_out_convert_time), (164 bytes). + Removing hal_pwm.o(i.hal_pwm_out_deinit), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_init), (12 bytes). + Removing hal_pwm.o(i.hal_pwm_out_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sel_io), (38 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_all), (16 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_ctl), (30 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_pause), (28 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_period), (48 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_thr), (52 bytes). + Removing hal_pwm.o(.data), (1 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (112 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_flash_read), (52 bytes). + Removing hal_system.o(i.hal_system_flash_write), (60 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (412 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_clocks), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (24 bytes). + Removing drv_dma.o(i.drv_dma_enable_cycle), (44 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_clear_irq_status), (6 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (130 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (30 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (16 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (64 bytes). + Removing drv_pwm.o(i.drv_pwm_out_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_control), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_threshold), (12 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_set_frame_buff_pd), (28 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (108 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (60 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (220 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (88 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (72 bytes). + Removing drv_spi_dma.o(.bss), (480 bytes). + Removing drv_spi_dma.o(.data), (16 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (168 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change), (556 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr), (48 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (6 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (56 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (20 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing dflti.o(.text), (40 bytes). + +602 unused section(s) (total 27623 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/zerorunl2.c 0x00000000 Number 0 __dczerorl2.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../fplib/microlib/fpsqrt.c 0x00000000 Number 0 dsqrt.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt_x.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_pwm.c 0x00000000 Number 0 hal_pwm.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\..\..\src\sdk\robin\src\hal\internal\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\..\src\app\demo\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\..\src\app\demo\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\..\src\app\demo\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\..\src\app\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\..\src\board\board.c 0x00000000 Number 0 board.o ABSOLUTE + ..\..\src\board\startup\startup_ARMCM0.s 0x00000000 Number 0 startup_armcm0.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\\..\\..\\src\\common\\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\\..\\..\\src\\driver\\robin\\src\\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\drv\\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\\..\\..\\src\\driver\\source\\robin\\hal\\internal\\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_dma.c 0x00000000 Number 0 drv_i2c_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_master.c 0x00000000 Number 0 drv_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_i2c_slave.c 0x00000000 Number 0 drv_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_param_init.c 0x00000000 Number 0 drv_param_init.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwm.c 0x00000000 Number 0 drv_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_pwr.c 0x00000000 Number 0 drv_pwr.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_dma.c 0x00000000 Number 0 drv_spi_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_master.c 0x00000000 Number 0 drv_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_spi_slave.c 0x00000000 Number 0 drv_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_swire.c 0x00000000 Number 0 drv_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_sys_cfg.c 0x00000000 Number 0 drv_sys_cfg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_timer.c 0x00000000 Number 0 drv_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart.c 0x00000000 Number 0 drv_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_pwm.c 0x00000000 Number 0 hal_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\internal\\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\\..\\src\\app\\demo\\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdcmple.s 0x00000000 Number 0 cdcmple.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 fadd.o(.text) + .text 0x0001029a Section 0 fmul.o(.text) + .text 0x00010314 Section 0 fdiv.o(.text) + .text 0x00010390 Section 0 fscalb.o(.text) + .text 0x000103a8 Section 0 dadd.o(.text) + .text 0x0001050c Section 0 dmul.o(.text) + .text 0x000105dc Section 0 ddiv.o(.text) + .text 0x000106cc Section 0 fflti.o(.text) + .text 0x000106e2 Section 0 ffltui.o(.text) + .text 0x000106f0 Section 0 dfltui.o(.text) + .text 0x0001070c Section 0 ffixi.o(.text) + .text 0x0001073e Section 0 ffixui.o(.text) + .text 0x00010768 Section 0 dfixi.o(.text) + .text 0x000107b0 Section 0 dfixui.o(.text) + .text 0x000107ec Section 0 f2d.o(.text) + .text 0x00010814 Section 40 cdcmple.o(.text) + .text 0x0001083c Section 20 cfrcmple.o(.text) + .text 0x00010850 Section 0 uldiv.o(.text) + .text 0x000108b0 Section 0 llshl.o(.text) + .text 0x000108d0 Section 0 llushr.o(.text) + .text 0x000108f2 Section 0 llsshr.o(.text) + .text 0x00010918 Section 0 fepilogue.o(.text) + .text 0x00010918 Section 0 iusefp.o(.text) + .text 0x0001099a Section 0 depilogue.o(.text) + .text 0x00010a58 Section 0 dsqrt.o(.text) + .text 0x00010afc Section 0 dfixul.o(.text) + .text 0x00010b3c Section 40 cdrcmple.o(.text) + .text 0x00010b64 Section 36 init.o(.text) + .text 0x00010b88 Section 0 __dczerorl2.o(.text) + i.ADC_IRQn_Handler 0x00010be0 Section 0 irq_redirect .o(i.ADC_IRQn_Handler) + i.AP_NRESET_IRQn_Handler 0x00010bf8 Section 0 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + i.DMA_IRQn_Handler 0x00010c10 Section 0 irq_redirect .o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010c24 Section 0 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010c40 Section 0 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010c5c Section 0 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010c78 Section 0 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010c94 Section 0 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010cb0 Section 0 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010ccc Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010ce8 Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.FLSCTRL_IRQn_Handler 0x00010d04 Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.Gpio_swire_output 0x00010d18 Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00010d68 Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010d7c Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010d94 Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010dac Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010dc4 Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010dec Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010e04 Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010e1c Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010e34 Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.S20_Start_init 0x00010e50 Section 0 app_tp_transfer.o(i.S20_Start_init) + i.SPIM_IRQn_Handler 0x00010f9c Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.SPIS_IRQn_Handler 0x00010fb8 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.SWIRE_IRQn_Handler 0x00010fd4 Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.UART_DisableDma 0x00010ff0 Section 0 drv_uart.o(i.UART_DisableDma) + i.UART_GetInstance 0x00010ff2 Section 0 drv_uart.o(i.UART_GetInstance) + i.__scatterload_null 0x00010ff6 Section 2 handlers.o(i.__scatterload_null) + i.ap_set_display_on 0x00010ff8 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x00010ff9 Thumb Code 4 ap_demo.o(i.ap_set_display_on) + i.drv_dsi_rx_set_inten 0x00010ffc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.drv_dsi_tx_command_get_payload 0x00011014 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) + .ARM.__at_0x11018 0x00011018 Section 4 drv_common.o(.ARM.__at_0x11018) + i.SysTick_Handler 0x0001101c Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00011034 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x0001104c Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00011064 Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x0001107c Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART0_IRQ_Handle 0x00011094 Section 0 drv_uart.o(i.UART0_IRQ_Handle) + i.UART_IRQn_Handler 0x000110b0 Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_ResetRxFIFO 0x000110c8 Section 0 drv_uart.o(i.UART_ResetRxFIFO) + i.UART_SetBaudRate 0x000110ec Section 0 drv_uart.o(i.UART_SetBaudRate) + i.UART_SwitchSCLK 0x00011134 Section 0 drv_uart.o(i.UART_SwitchSCLK) + i.UART_TransferHandleIRQ 0x0001114e Section 0 drv_uart.o(i.UART_TransferHandleIRQ) + i.UART_WriteBlocking 0x00011282 Section 0 drv_uart.o(i.UART_WriteBlocking) + i.UART_init 0x0001129c Section 0 drv_uart.o(i.UART_init) + i.VIDC_IRQn_Handler 0x00011358 Section 0 irq_redirect .o(i.VIDC_IRQn_Handler) + i.VPRE_IRQn_Handler 0x00011370 Section 0 irq_redirect .o(i.VPRE_IRQn_Handler) + i.WDG_IRQn_Handler 0x00011388 Section 0 irq_redirect .o(i.WDG_IRQn_Handler) + i.__0printf 0x000113a0 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x000113c0 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x000113e4 Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x00011412 Section 0 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + i.__NVIC_ClearPendingIRQ 0x0001142c Section 0 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x0001142d Thumb Code 18 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x00011444 Section 0 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011445 Thumb Code 18 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_DisableIRQ 0x0001145c Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x0001145d Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x0001147c Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x0001147d Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__NVIC_SetPriority 0x00011494 Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x00011495 Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_copy 0x000114d8 Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_zeroinit 0x000114e6 Section 14 handlers.o(i.__scatterload_zeroinit) + i.__set_errno 0x000114f4 Section 0 errno.o(i.__set_errno) + i._fp_digits 0x00011500 Section 0 printfa.o(i._fp_digits) + _fp_digits 0x00011501 Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x00011674 Section 0 printfa.o(i._printf_core) + _printf_core 0x00011675 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011d60 Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011d61 Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011d80 Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011d81 Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011dac Section 0 printfa.o(i._sputc) + _sputc 0x00011dad Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011db8 Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011db9 Thumb Code 3094 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x000129d0 Section 0 ap_demo.o(i.ap_demo) + i.ap_get_reg_df 0x00012ae4 Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x00012ae5 Thumb Code 146 ap_demo.o(i.ap_get_reg_df) + i.ap_reset_cb 0x00012b7c Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x00012b7d Thumb Code 38 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight_51 0x00012bac Section 0 ap_demo.o(i.ap_set_backlight_51) + ap_set_backlight_51 0x00012bad Thumb Code 68 ap_demo.o(i.ap_set_backlight_51) + i.ap_set_display_off 0x00012bf4 Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x00012bf5 Thumb Code 18 ap_demo.o(i.ap_set_display_off) + i.ap_set_enter_sleep_mode 0x00012c08 Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x00012c09 Thumb Code 62 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x00012c4c Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x00012c4d Thumb Code 8 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_tp_calibration 0x00012c58 Section 0 app_tp_transfer.o(i.ap_tp_calibration) + i.ap_update_frame_rate 0x00012d08 Section 0 ap_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x00012d09 Thumb Code 38 ap_demo.o(i.ap_update_frame_rate) + i.app_ADC_IRQn_Handler 0x00012d34 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x00012d50 Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x00012d74 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x00012d90 Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x00012dac Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x00012dc8 Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x00012de4 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x00012e00 Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x00012e1c Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x00012e38 Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x00012e54 Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x00012e9c Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x00012eb4 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00012ec4 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00012ff4 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x0001307c Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00013314 Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x000133b4 Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x000133fc Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x0001342c Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x0001362c Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x0001364c Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x00013664 Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x0001366e Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x00013678 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x00013682 Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x0001368c Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x00013694 Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x000136b0 Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x000136cc Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x00013704 Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x00013714 Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x00013744 Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x00013768 Section 0 ap_demo.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x00013780 Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x00013781 Thumb Code 42 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x000137b0 Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x000137f4 Section 0 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_read 0x000137f5 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_write 0x00013814 Section 0 app_tp_transfer.o(i.app_tp_m_write) + app_tp_m_write 0x00013815 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x0001381c Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_s_read 0x00013b74 Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x00013b7c Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x00013b84 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x00013e34 Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x00013e64 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00013e65 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_transfer_screen_const 0x00013e70 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00013e71 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00013eb0 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x00013fbc Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.board_Init 0x00013fd0 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x00013ff4 Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x00014468 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x00014530 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x00014531 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x0001455c Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x0001455d Thumb Code 90 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x000145f0 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x00014648 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x00014660 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x000146a4 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x000146c8 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x000146c9 Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x000146e4 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x000146fc Section 0 tau_delay.o(i.delayUs) + i.drv_ap_rst_trig_edge_detect 0x00014720 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x00014758 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x00014764 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x000147a4 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x0001486c Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x00014880 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x000148d8 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x000148e0 Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x000148f0 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x00014904 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x00014918 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x00014938 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x0001494c Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x00014964 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x00014978 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x0001498c Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x000149a0 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x000149b4 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x000149c8 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x000149dc Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x000149f0 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x00014a04 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x00014a18 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x00014a30 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x00014a48 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x00014a5c Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x00014a70 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x00014a84 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x00014a9c Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x00014ab8 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x00014ac8 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00014ad8 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x00014afc Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00014b08 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x00014b98 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x00014baa Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x00014bc4 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x00014bcc Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00014c10 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x00014c46 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00014c54 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00014cc8 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00014cd2 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00014cfc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00014e00 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00014e40 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00014e41 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00014e90 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00014e91 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00014eac Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00014eb4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00014eba Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00014ec8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00014ee8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_ipi_cfg 0x00014ef8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00014f08 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00014f4e Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00014f74 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00015078 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_header 0x00015086 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x0001509a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00015106 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x0001510a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00015122 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x0001512a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00015132 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x0001513c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00015160 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x00015164 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00015168 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x0001516c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x00015184 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x0001519e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x000151aa Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x0001520e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x0001524c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00015380 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x0001539e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x000153a6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x000153c2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x000153da Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x000153e8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x00015428 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x00015438 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x00015440 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00015462 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x0001546a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x00015490 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x0001553a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x00015550 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x00015568 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x00015588 Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x00015594 Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x000155c6 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x000155e0 Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x000155f8 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x00015604 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00015618 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x00015668 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x00015688 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x00015698 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x000156a8 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x000156b8 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x000156c8 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x000156c9 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x000156e8 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c0_set_callback 0x00015818 Section 0 drv_i2c_slave.o(i.drv_i2c0_set_callback) + i.drv_i2c1_set_callback 0x00015824 Section 0 drv_i2c_master.o(i.drv_i2c1_set_callback) + i.drv_i2c_dma_callback 0x00015830 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x00015831 Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x00015864 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x00015910 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x0001592a Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x00015944 Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x000159a4 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x000159b4 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_master_init 0x000159ec Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x00015a78 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x00015ad4 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x00015b10 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x00015b11 Thumb Code 46 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x00015b3e Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_config_intr 0x00015b80 Section 0 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + i.drv_i2c_s_enable 0x00015b84 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable) + i.drv_i2c_s_get_fifo_status 0x00015b8c Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_intr 0x00015ba0 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + i.drv_i2c_s_write_data 0x00015bf0 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x00015c0c Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x00015c64 Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x00015c98 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x00015cb0 Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x00015cc8 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x00015cf8 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x00015d0e Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00015d32 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x00015d58 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x00015d6e Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x00015d84 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x00015d90 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00015dae Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00015dd0 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00015df2 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x00015dfe Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00015e18 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x00015e3a Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00015e54 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x00015e60 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00015eac Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00015eb2 Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00015ec4 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00015ee4 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_prefetch 0x00015f24 Section 0 drv_lcdc.o(i.drv_lcdc_set_prefetch) + i.drv_lcdc_set_video_hw_mode 0x00015f3c Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00015f50 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x00015f70 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00015f7c Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00015fbc Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00015fc8 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x00015fda Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00015fea Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00015ff8 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x0001600c Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00016018 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x00016028 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x0001603a Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x0001604a Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x00016060 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00016078 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x00016092 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x000160a0 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x000160c8 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x000160d8 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x000160e0 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x000160f4 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x00016108 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x00016110 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_init_set_scld_filter 0x00016124 Section 0 drv_param_init.o(i.drv_param_init_set_scld_filter) + i.drv_param_p2r_filter_init 0x00016188 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x000161ac Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x000161bc Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x000161f8 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x00016258 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x000162ac Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x000162bc Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x000162d4 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x000162f4 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x0001631a Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x00016338 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x00016339 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x00016358 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x00016378 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x00016390 Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x000163c8 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x000163c9 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x000163d4 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x000163d5 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x000163e4 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x000163e5 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x000163f8 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x000163f9 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x0001640e Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00016418 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x0001641c Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x00016478 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x0001648c Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x000164f0 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x000164f4 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x000164f5 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x00016506 Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x0001650a Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x0001650b Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x0001651c Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00016528 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x00016530 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x0001653c Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x00016548 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x0001655c Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x00016628 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x0001663c Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x00016650 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x00016660 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x00016686 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x0001668e Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x00016698 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_enable 0x000166b8 Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_set_int 0x000166d4 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x00016728 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x00016744 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00016750 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x00016778 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x00016790 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x000167ac Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x000167d0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x000167f4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x00016804 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x00016814 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x00016838 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x00016839 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x00016852 Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x00016874 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x00016884 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x00016894 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x00016895 Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x000168d8 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x000168ec Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x000168fc Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x00016950 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x00016978 Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_clear 0x00016988 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x00016989 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x00016992 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x000169ae Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x000169ca Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x000169cb Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x000169dc Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x000169dd Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x000169f0 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x000169f1 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00016a00 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00016a08 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00016a20 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x00016a60 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x00016a74 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x00016a9c Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x00016aa8 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x00016aae Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x00016aea Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00016afe Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x00016b0e Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x00016b16 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x00016b3c Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x00016b64 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x00016b7c Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x00016b86 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x00016b96 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00016ba0 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x00016baa Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00016bbc Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00016bc6 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00016bd0 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x00016be8 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00016bf8 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00016bf9 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00016c08 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00016c09 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00016c18 Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x00016c58 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x00016c62 Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x00016c78 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x00016cac Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00016d48 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016dcc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_compressen_en 0x00016df4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00016e04 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00016e2c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00016e8c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00016e8d Thumb Code 332 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00017030 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00017031 Thumb Code 184 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00017108 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00017109 Thumb Code 334 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x00017260 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x00017261 Thumb Code 294 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x00017398 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x00017399 Thumb Code 546 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x000175c8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_scld_filter 0x000176b8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x00017724 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00017758 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00017759 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x00017790 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x00017791 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017804 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_set_tear_mode_ex 0x00017838 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + i.hal_dsi_rx_ctrl_start 0x00017848 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x00017884 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution_ex 0x000178c0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) + i.hal_dsi_tx_calc_video_chunks 0x000178e0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x000178e1 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x00017a70 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x00017a71 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x00017aa4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x00017aa5 Thumb Code 1022 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x00017ef4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00017f20 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00017fa4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017ff0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x00018018 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x000180bc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x000180bd Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x000180e0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_read_cmd 0x000180ec Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) + i.hal_dsi_tx_ctrl_set_ccm 0x00018178 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018198 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x000181ac Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x000181bc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x000181e0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x0001827c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x000182c0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00018398 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x00018448 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x00018449 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x0001848c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x0001848d Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x000184bc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x000184bd Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x000184dc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x000184dd Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x000184fc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x000184fd Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x00018590 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x00018591 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x000185e8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x000185e9 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x0001862c Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x00018644 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x00018658 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x00018698 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x000186b8 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x000186e0 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x000186f8 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x00018748 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x000187a8 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x000187b0 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x000187d0 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x0001883c Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x0001885c Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x00018878 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x00018884 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x00018885 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x000188a4 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x000188a5 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x000188b4 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x00018900 Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x000189c8 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x000189dc Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x000189e8 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x000189e9 Thumb Code 354 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x00018b5c Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x00018c58 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_get_hight_performan_mode 0x00018c68 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change_ex 0x00018c78 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) + i.hal_internal_vsync_deinit 0x00018e4c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00018e74 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00018e80 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tear_mode 0x00018e98 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + i.hal_internal_vsync_get_tx_state 0x00018ea4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00018eb0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00018fc8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x00019078 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x00019194 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x000191a8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x000191cc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x0001921c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x0001929c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x0001929d Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x000192c0 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x000192c1 Thumb Code 84 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x00019318 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x00019319 Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x0001932c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x0001932d Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x00019490 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00019491 Thumb Code 78 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x000194e4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x000194e5 Thumb Code 392 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x00019674 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x00019675 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_m_clear_rxfifo 0x000196b4 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_deinit 0x000196c2 Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_open 0x000196d4 Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x000196ea Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x000196f4 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x0001977c Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x00019798 Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x000197a0 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x000197a8 Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_deinit 0x000197b0 Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x000197de Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x000197f8 Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x00019840 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x00019868 Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x000198f4 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.hal_vsync_reset_lcdc_scaler 0x00019904 Section 0 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + hal_vsync_reset_lcdc_scaler 0x00019905 Thumb Code 460 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + i.handle_init 0x00019ae0 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x00019bf0 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x00019bf1 Thumb Code 90 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x00019c50 Section 0 ap_demo.o(i.init_panel) + init_panel 0x00019c51 Thumb Code 264 ap_demo.o(i.init_panel) + i.main 0x00019da4 Section 0 main.o(i.main) + i.open_mipi_rx 0x00019db0 Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x00019db1 Thumb Code 128 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x00019e48 Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x00019e49 Thumb Code 52 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x00019e80 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x00019e81 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x0001a274 Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x0001a275 Thumb Code 358 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001a3ec Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001a3ed Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001a478 Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001a479 Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x0001a5f8 Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001a5f9 Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001a69c Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001a69d Thumb Code 282 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.soft_gen_te 0x0001a850 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001a851 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x0001a914 Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x0001a915 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_timer3_cb 0x0001a9d4 Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001a9d5 Thumb Code 36 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001aa04 Section 0 sqrt.o(i.sqrt) + i.vidc_callback 0x0001aa4c Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001aa4d Thumb Code 232 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001ab54 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001ab55 Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001ac24 Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001ac25 Thumb Code 300 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001adf0 Section 10069 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001adf0 Data 96 ap_demo.o(.constdata) + .constdata 0x0001d545 Section 8294 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001f5ab Section 1 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001f5ac Section 36 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001f5d0 Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001f5d0 Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001f648 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001f6a4 Section 32 hal_i2c_slave.o(.constdata) + sg_i2c_s_config 0x0001f6a4 Data 32 hal_i2c_slave.o(.constdata) + .constdata 0x0001f6c4 Section 8 drv_param_init.o(.constdata) + .constdata 0x0001f6cc Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001f6cc Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001f784 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001f804 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001f834 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001f854 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001f89c Section 67 hal_dsi_tx_ctrl.o(.conststring) + .conststring 0x0001f8e0 Section 224 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 556 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701d0 Data 1 ap_demo.o(.data) + g_calibration_flag 0x000701d1 Data 1 ap_demo.o(.data) + start_display_on 0x000701d2 Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701d3 Data 1 ap_demo.o(.data) + panel_display_done 0x000701d4 Data 1 ap_demo.o(.data) + R60_Parma_backup 0x000701d7 Data 1 ap_demo.o(.data) + read_A1_count 0x000701d9 Data 1 ap_demo.o(.data) + read_6e_10 0x000701da Data 1 ap_demo.o(.data) + read_6e_24 0x000701db Data 1 ap_demo.o(.data) + read_6e_38 0x000701dc Data 1 ap_demo.o(.data) + read_6e_52 0x000701dd Data 1 ap_demo.o(.data) + read_6e_66 0x000701de Data 1 ap_demo.o(.data) + read_6e_70 0x000701df Data 1 ap_demo.o(.data) + read_5a_39 0x000701e0 Data 1 ap_demo.o(.data) + read_7F_count 0x000701e1 Data 1 ap_demo.o(.data) + read_bl_data 0x000701e4 Data 2 ap_demo.o(.data) + read_bl_data_bak 0x000701e6 Data 2 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701f0 Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701f4 Data 4 ap_demo.o(.data) + value_reg_df 0x000701f8 Data 4 ap_demo.o(.data) + .data 0x000703fc Section 46 app_tp_transfer.o(.data) + s_spim_write 0x000703fc Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x000703fd Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x000703fe Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x000703ff Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x00070401 Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x00070402 Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x00070403 Data 1 app_tp_transfer.o(.data) + .data 0x0007042a Section 228 app_tp_for_custom_s8.o(.data) + app_tp_count 0x00070434 Data 1 app_tp_for_custom_s8.o(.data) + phone_85_flag 0x00070435 Data 1 app_tp_for_custom_s8.o(.data) + phone_F6_flag 0x00070436 Data 1 app_tp_for_custom_s8.o(.data) + phone_E4_flag 0x00070437 Data 1 app_tp_for_custom_s8.o(.data) + phone_72_flag 0x00070438 Data 1 app_tp_for_custom_s8.o(.data) + phone_75_flag 0x00070439 Data 1 app_tp_for_custom_s8.o(.data) + phone_92_flag 0x0007043a Data 1 app_tp_for_custom_s8.o(.data) + phone_74_flag 0x0007043b Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x0007043e Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x00070440 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x00070442 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x00070444 Data 2 app_tp_for_custom_s8.o(.data) + .data 0x0007050e Section 1 app_tp_for_custom_s8.o(.data) + .data 0x0007050f Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00070510 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00070511 Section 3 app_tp_for_custom_s8.o(.data) + .data 0x00070514 Section 5 app_tp_for_custom_s8.o(.data) + .data 0x0007051c Section 48 app_tp_for_custom_s8.o(.data) + .data 0x0007054c Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x0007054c Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00070550 Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00070554 Section 3 hal_dsi_tx_ctrl.o(.data) + g_tx_vcom_en 0x00070554 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_vpg_en 0x00070555 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x00070556 Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x00070557 Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x00070557 Data 1 hal_i2c_master.o(.data) + .data 0x00070558 Section 32 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00070558 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00070559 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x0007055a Data 1 hal_i2c_slave.o(.data) + sg_i2c_s_index 0x0007055b Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x0007055c Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x00070560 Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x00070564 Data 4 hal_i2c_slave.o(.data) + sg_tx_byte_num 0x00070568 Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x0007056c Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x00070570 Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00070574 Data 4 hal_i2c_slave.o(.data) + .data 0x00070578 Section 18 norflash.o(.data) + tmprg 0x00070580 Data 4 norflash.o(.data) + .data 0x0007058c Section 12 drv_common.o(.data) + s_my_tick 0x0007058c Data 4 drv_common.o(.data) + .data 0x00070598 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x00070598 Data 4 drv_gpio.o(.data) + .data 0x0007059c Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x0007059c Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x000705a0 Data 4 drv_i2c_dma.o(.data) + .data 0x000705a4 Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x000705a4 Data 4 drv_i2c_master.o(.data) + .data 0x000705a8 Section 4 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x000705a8 Data 4 drv_i2c_slave.o(.data) + .data 0x000705ac Section 1188 drv_param_init.o(.data) + .data 0x00070a50 Section 12 drv_pwm.o(.data) + s_pwm_type 0x00070a50 Data 1 drv_pwm.o(.data) + s_pwm_cb 0x00070a54 Data 8 drv_pwm.o(.data) + .data 0x00070a5c Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x00070a5c Data 4 drv_spi_master.o(.data) + .data 0x00070a60 Section 8 drv_swire.o(.data) + s_swire_cb 0x00070a60 Data 8 drv_swire.o(.data) + .data 0x00070a68 Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x00070a68 Data 1 drv_sys_cfg.o(.data) + .data 0x00070a6c Section 80 drv_timer.o(.data) + sg_timer_info 0x00070a6c Data 80 drv_timer.o(.data) + .data 0x00070abc Section 12 hal_internal_vsync.o(.data) + sg_cmd_mode_tx_start 0x00070abc Data 1 hal_internal_vsync.o(.data) + sg_cur_te_info 0x00070ac0 Data 4 hal_internal_vsync.o(.data) + .data 0x00070ac8 Section 8 drv_rxbr.o(.data) + .data 0x00070ad0 Section 4 drv_vidc.o(.data) + .data 0x00070ad4 Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x00070ad4 Data 1 drv_phy_common.o(.data) + .data 0x00070ad8 Section 12 drv_chip_info.o(.data) + sg_chip_info 0x00070ad8 Data 4 drv_chip_info.o(.data) + sg_chip_function 0x00070adc Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x00070ae0 Data 4 drv_chip_info.o(.data) + .data 0x00070ae4 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x00070ae4 Data 4 drv_uart.o(.data) + uart_userData 0x00070ae8 Data 4 drv_uart.o(.data) + .data 0x00070aec Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x00070aec Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x00070af0 Data 8 drv_wdg.o(.data) + .data 0x00070af8 Section 4 stdout.o(.data) + .data 0x00070afc Section 4 errno.o(.data) + _errno 0x00070afc Data 4 errno.o(.data) + .bss 0x00070b00 Section 400 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x00070b00 Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x00070bc8 Data 200 app_tp_transfer.o(.bss) + .bss 0x00070c90 Section 196 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x00070c90 Data 196 hal_dsi_rx_ctrl.o(.bss) + .bss 0x00070d54 Section 76 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x00070d54 Data 76 hal_dsi_tx_ctrl.o(.bss) + .bss 0x00070da0 Section 256 tau_log.o(.bss) + .bss 0x00070ea0 Section 208 hal_uart.o(.bss) + .bss 0x00070f70 Section 28 drv_dma.o(.bss) + s_dma_handle 0x00070f70 Data 28 drv_dma.o(.bss) + .bss 0x00070f8c Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x00070f8c Data 64 drv_gpio.o(.bss) + .bss 0x00070fcc Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x00070fcc Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x0007106c Data 160 drv_i2c_dma.o(.bss) + .bss 0x0007110c Section 2416 hal_internal_vsync.o(.bss) + g_imm_buffer 0x0007195c Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x00071a5c Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x00071a68 Data 20 hal_internal_vsync.o(.bss) + .bss 0x00071a7c Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x00072aac Section 32 hal_spi_slave.o(.bss) + STACK 0x00072ad0 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfrcmple 0x0001083d Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010851 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108b1 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108b1 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108d1 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108d1 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000108f3 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000108f3 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010919 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010919 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010929 Thumb Code 114 fepilogue.o(.text) + _double_round 0x0001099b Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109b5 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a59 Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010afd Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b3d Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b65 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b65 Thumb Code 0 init.o(.text) + __decompress 0x00010b89 Thumb Code 0 __dczerorl2.o(.text) + __decompress1 0x00010b89 Thumb Code 86 __dczerorl2.o(.text) + ADC_IRQn_Handler 0x00010be1 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010bf9 Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010c11 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c25 Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c41 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010c5d Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010c79 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010c95 Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010cb1 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010ccd Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010ce9 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + FLSCTRL_IRQn_Handler 0x00010d05 Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010d19 Thumb Code 78 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010d69 Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010d7d Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010d95 Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010dad Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010dc5 Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010ded Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010e05 Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010e1d Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010e35 Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + S20_Start_init 0x00010e51 Thumb Code 306 app_tp_transfer.o(i.S20_Start_init) + SPIM_IRQn_Handler 0x00010f9d Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + SPIS_IRQn_Handler 0x00010fb9 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + SWIRE_IRQn_Handler 0x00010fd5 Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + UART_DisableDma 0x00010ff1 Thumb Code 2 drv_uart.o(i.UART_DisableDma) + UART_GetInstance 0x00010ff3 Thumb Code 4 drv_uart.o(i.UART_GetInstance) + __scatterload_null 0x00010ff7 Thumb Code 2 handlers.o(i.__scatterload_null) + drv_dsi_rx_set_inten 0x00010ffd Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + drv_dsi_tx_command_get_payload 0x00011015 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) + s_debug_state 0x00011018 Data 4 drv_common.o(.ARM.__at_0x11018) + SysTick_Handler 0x0001101d Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00011035 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x0001104d Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00011065 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x0001107d Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x00011095 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + UART_IRQn_Handler 0x000110b1 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x000110c9 Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SetBaudRate 0x000110ed Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x00011135 Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x0001114f Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x00011283 Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x0001129d Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x00011359 Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x00011371 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x00011389 Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x000113a1 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x000113a1 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x000113a1 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x000113a1 Thumb Code 0 printfa.o(i.__0printf) + printf 0x000113a1 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x000113c1 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x000113c1 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x000113c1 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x000113c1 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x000113c1 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x000113e5 Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x00011413 Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_copy 0x000114d9 Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x000114e7 Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x000114f5 Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x000129d1 Thumb Code 254 ap_demo.o(i.ap_demo) + ap_tp_calibration 0x00012c59 Thumb Code 170 app_tp_transfer.o(i.ap_tp_calibration) + app_ADC_IRQn_Handler 0x00012d35 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x00012d51 Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x00012d75 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x00012d91 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x00012dad Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x00012dc9 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x00012de5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x00012e01 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x00012e1d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00012e39 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x00012e55 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x00012e9d Thumb Code 14 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00012eb5 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00012ec5 Thumb Code 146 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00012ff5 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x0001307d Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00013315 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x000133b5 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x000133fd Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x0001342d Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x0001362d Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x0001364d Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x00013665 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x0001366f Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x00013679 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x00013683 Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x0001368d Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x00013695 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x000136b1 Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x000136cd Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x00013705 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x00013715 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x00013745 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x00013769 Thumb Code 20 ap_demo.o(i.app_tp_calibration_exec) + app_tp_init 0x000137b1 Thumb Code 56 app_tp_transfer.o(i.app_tp_init) + app_tp_phone_analysis_data 0x0001381d Thumb Code 806 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_s_read 0x00013b75 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x00013b7d Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x00013b85 Thumb Code 680 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x00013e35 Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x00013eb1 Thumb Code 250 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x00013fbd Thumb Code 16 app_tp_transfer.o(i.app_tp_transfer_screen_start) + board_Init 0x00013fd1 Thumb Code 30 board.o(i.board_Init) + calc_framebuffer_setting 0x00013ff5 Thumb Code 1138 hal_internal_vsync.o(i.calc_framebuffer_setting) + ceil 0x00014469 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x000145f1 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x00014649 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x00014661 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x000146a5 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x000146e5 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x000146fd Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x00014721 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x00014759 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x00014765 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x000147a5 Thumb Code 122 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x0001486d Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x00014881 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x000148d9 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x000148e1 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x000148f1 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x00014905 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x00014919 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x00014939 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x0001494d Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x00014965 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x00014979 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x0001498d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x000149a1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x000149b5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x000149c9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x000149dd Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x000149f1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x00014a05 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x00014a19 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x00014a31 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x00014a49 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x00014a5d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x00014a71 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x00014a85 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x00014a9d Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x00014ab9 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x00014ac9 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00014ad9 Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x00014afd Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00014b09 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x00014b99 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x00014bab Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x00014bc5 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x00014bcd Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00014c11 Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x00014c47 Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00014c55 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00014cc9 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00014cd3 Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x00014cfd Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00014e01 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00014ead Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00014eb5 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00014ebb Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00014ec9 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00014ee9 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_ipi_cfg 0x00014ef9 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00014f09 Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00014f4f Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00014f75 Thumb Code 256 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00015079 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_header 0x00015087 Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x0001509b Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00015107 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x0001510b Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00015123 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x0001512b Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00015133 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x0001513d Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00015161 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x00015165 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00015169 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x0001516d Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x00015185 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x0001519f Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x000151ab Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x0001520f Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x0001524d Thumb Code 308 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00015381 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x0001539f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x000153a7 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x000153c3 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x000153db Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x000153e9 Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x00015429 Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x00015439 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x00015441 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00015463 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x0001546b Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x00015491 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x0001553b Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x00015551 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x00015569 Thumb Code 32 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x00015589 Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x00015595 Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x000155c7 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x000155e1 Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x000155f9 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x00015605 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00015619 Thumb Code 74 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x00015669 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x00015689 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x00015699 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x000156a9 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x000156b9 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x000156e9 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c0_set_callback 0x00015819 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c0_set_callback) + drv_i2c1_set_callback 0x00015825 Thumb Code 6 drv_i2c_master.o(i.drv_i2c1_set_callback) + drv_i2c_dma_init 0x00015865 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x00015911 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x0001592b Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x00015945 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x000159a5 Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x000159b5 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_master_init 0x000159ed Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x00015a79 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x00015ad5 Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x00015b3f Thumb Code 66 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_config_intr 0x00015b81 Thumb Code 4 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + drv_i2c_s_enable 0x00015b85 Thumb Code 8 drv_i2c_slave.o(i.drv_i2c_s_enable) + drv_i2c_s_get_fifo_status 0x00015b8d Thumb Code 20 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_intr 0x00015ba1 Thumb Code 74 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + drv_i2c_s_write_data 0x00015bf1 Thumb Code 28 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x00015c0d Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x00015c65 Thumb Code 50 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x00015c99 Thumb Code 20 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x00015cb1 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x00015cc9 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x00015cf9 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x00015d0f Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00015d33 Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x00015d59 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x00015d6f Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x00015d85 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x00015d91 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00015daf Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00015dd1 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00015df3 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x00015dff Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00015e19 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x00015e3b Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00015e55 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x00015e61 Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00015ead Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00015eb3 Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00015ec5 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00015ee5 Thumb Code 58 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_prefetch 0x00015f25 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_set_prefetch) + drv_lcdc_set_video_hw_mode 0x00015f3d Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00015f51 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x00015f71 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00015f7d Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00015fbd Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00015fc9 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x00015fdb Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00015feb Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00015ff9 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x0001600d Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00016019 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x00016029 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x0001603b Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x0001604b Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x00016061 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00016079 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x00016093 Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x000160a1 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x000160c9 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x000160d9 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x000160e1 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x000160f5 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x00016109 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x00016111 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_init_set_scld_filter 0x00016125 Thumb Code 92 drv_param_init.o(i.drv_param_init_set_scld_filter) + drv_param_p2r_filter_init 0x00016189 Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x000161ad Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x000161bd Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x000161f9 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x00016259 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x000162ad Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x000162bd Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x000162d5 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x000162f5 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x0001631b Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x00016359 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x00016379 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x00016391 Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x0001640f Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00016419 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x0001641d Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x00016479 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x0001648d Thumb Code 66 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x000164f1 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x00016507 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x0001651d Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x00016529 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x00016531 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x0001653d Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x00016549 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x0001655d Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x00016629 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x0001663d Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x00016651 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x00016661 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x00016687 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x0001668f Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x00016699 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_enable 0x000166b9 Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_set_int 0x000166d5 Thumb Code 76 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x00016729 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x00016745 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00016751 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x00016779 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x00016791 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x000167ad Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x000167d1 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x000167f5 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x00016805 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x00016815 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x00016853 Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x00016875 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x00016885 Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x000168d9 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x000168ed Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x000168fd Thumb Code 80 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x00016951 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x00016979 Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x00016993 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x000169af Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00016a01 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00016a09 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00016a21 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x00016a61 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x00016a75 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x00016a9d Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x00016aa9 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x00016aaf Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x00016aeb Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00016aff Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x00016b0f Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x00016b17 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x00016b3d Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x00016b65 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x00016b7d Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x00016b87 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x00016b97 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00016ba1 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x00016bab Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00016bbd Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00016bc7 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00016bd1 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x00016be9 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00016c19 Thumb Code 60 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x00016c59 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x00016c63 Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00016c79 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x00016cad Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00016d49 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016dcd Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_compressen_en 0x00016df5 Thumb Code 10 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) + hal_dsi_rx_ctrl_get_max_ret_size 0x00016e05 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00016e2d Thumb Code 88 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_send_ack_cmd 0x000175c9 Thumb Code 214 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_scld_filter 0x000176b9 Thumb Code 98 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) + hal_dsi_rx_ctrl_set_cus_sync_line 0x00017725 Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017805 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_set_tear_mode_ex 0x00017839 Thumb Code 14 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + hal_dsi_rx_ctrl_start 0x00017849 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x00017885 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution_ex 0x000178c1 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) + hal_dsi_tx_ctrl_create_handle 0x00017ef5 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00017f21 Thumb Code 118 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x00017fa5 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017ff1 Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x00018019 Thumb Code 154 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x000180e1 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_read_cmd 0x000180ed Thumb Code 134 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) + hal_dsi_tx_ctrl_set_ccm 0x00018179 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018199 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x000181ad Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x000181bd Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x000181e1 Thumb Code 140 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x0001827d Thumb Code 56 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x000182c1 Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00018399 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x0001862d Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x00018645 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x00018659 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x00018699 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x000186b9 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x000186e1 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x000186f9 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x00018749 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x000187a9 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x000187b1 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x000187d1 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x0001883d Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x0001885d Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x00018879 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x000188b5 Thumb Code 62 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x00018901 Thumb Code 176 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x000189c9 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x000189dd Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x00018b5d Thumb Code 170 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x00018c59 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_get_hight_performan_mode 0x00018c69 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change_ex 0x00018c79 Thumb Code 362 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) + hal_internal_vsync_deinit 0x00018e4d Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00018e75 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00018e81 Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tear_mode 0x00018e99 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + hal_internal_vsync_get_tx_state 0x00018ea5 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00018eb1 Thumb Code 236 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00018fc9 Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x00019079 Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x00019195 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x000191a9 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x000191cd Thumb Code 72 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x0001921d Thumb Code 118 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_spi_m_clear_rxfifo 0x000196b5 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_deinit 0x000196c3 Thumb Code 18 hal_swire.o(i.hal_swire_deinit) + hal_swire_open 0x000196d5 Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x000196eb Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x000196f5 Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x0001977d Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x00019799 Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x000197a1 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x000197a9 Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_deinit 0x000197b1 Thumb Code 46 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x000197df Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x000197f9 Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x00019841 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x00019869 Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x000198f5 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x00019ae1 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x00019da5 Thumb Code 10 main.o(i.main) + sqrt 0x0001aa05 Thumb Code 66 sqrt.o(i.sqrt) + panel_init_code 0x0001ae50 Data 9973 ap_demo.o(.constdata) + phone_data_21 0x0001d545 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001d546 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_00 0x0001d547 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_1 0x0001d548 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_2 0x0001d549 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_3 0x0001d54a Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_F5_4 0x0001d54b Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_30 0x0001d54c Data 2 app_tp_for_custom_s8.o(.constdata) + phone_data_92_F0 0x0001d54e Data 2 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001d550 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_92_15 0x0001d553 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001d557 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001d55b Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001d55f Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001d563 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001d567 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001d56b Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_92_0A 0x0001d570 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_1 0x0001d576 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_2 0x0001d57c Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_3 0x0001d582 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_F6_4 0x0001d588 Data 6 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001d58e Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001d59e Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_02 0x0001d5a9 Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_85_20 0x0001d5c5 Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001d5e1 Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_05 0x0001d5eb Data 1440 app_tp_for_custom_s8.o(.constdata) + phone_data_72_13 0x0001db8b Data 1440 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7401_7D01 0x0001e12b Data 728 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7401_7D02 0x0001e403 Data 728 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7401_7D03 0x0001e6db Data 728 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7403_7D01 0x0001e9b3 Data 728 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7403_7D03 0x0001ec8b Data 728 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7D05 0x0001ef63 Data 728 app_tp_for_custom_s8.o(.constdata) + phone_data_75_7403_7D07 0x0001f23b Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_00 0x0001f35b Data 288 app_tp_for_custom_s8.o(.constdata) + phone_data_75_FF 0x0001f47b Data 288 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001f59b Data 16 app_tp_for_custom_s8.o(.constdata) + screen_reg_start_data_size 0x0001f5ab Data 1 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001f9c0 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001f9f0 Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_start_flag 0x000701d5 Data 1 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701d6 Data 1 ap_demo.o(.data) + panel_mode 0x000701d8 Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701e2 Data 2 ap_demo.o(.data) + panel_r 0x000701e8 Data 2 ap_demo.o(.data) + panel_g 0x000701ea Data 2 ap_demo.o(.data) + panel_b 0x000701ec Data 2 ap_demo.o(.data) + rx_filter_1080_h_4_96 0x000701fc Data 256 ap_demo.o(.data) + rx_filter_2400_v_4_96 0x000702fc Data 256 ap_demo.o(.data) + s_screen_init_complate 0x00070400 Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x00070404 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x00070407 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x0007040a Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data2 0x0007040d Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data3 0x00070410 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data6 0x00070413 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data7 0x00070416 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data8 0x00070419 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data4 0x0007041c Data 4 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data5 0x00070420 Data 4 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x00070424 Data 6 app_tp_transfer.o(.data) + phone_data_E4 0x0007042a Data 1 app_tp_for_custom_s8.o(.data) + tp_flag 0x0007042b Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x0007042c Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x0007042d Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x0007042e Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x0007042f Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x00070430 Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x00070431 Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x00070432 Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x00070433 Data 1 app_tp_for_custom_s8.o(.data) + phone_data_B1 0x0007043c Data 2 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x00070446 Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x0007050e Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x0007050f Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x00070510 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x00070511 Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x00070514 Data 5 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x0007051c Data 48 app_tp_for_custom_s8.o(.data) + g_fls_w_cmd 0x00070578 Data 1 norflash.o(.data) + g_fls_r_cmd 0x00070579 Data 1 norflash.o(.data) + g_fls_write_en_status 0x0007057a Data 1 norflash.o(.data) + isFlsTransferEnd 0x0007057b Data 1 norflash.o(.data) + isFlsFifoReq 0x0007057c Data 1 norflash.o(.data) + isNandWriteCompleted 0x0007057d Data 1 norflash.o(.data) + isNandReadCompleted 0x0007057e Data 1 norflash.o(.data) + g_fls_error_info 0x00070584 Data 6 norflash.o(.data) + g_systick_cb_func 0x00070590 Data 4 drv_common.o(.data) + g_system_clock 0x00070594 Data 4 drv_common.o(.data) + g_scld_fhd_filter_h 0x000705ac Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x000706ac Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x000707ac Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x000708ac Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x000709ac Data 128 drv_param_init.o(.data) + g_ccm_setting 0x00070a2c Data 36 drv_param_init.o(.data) + g_sof_gen_te_func 0x00070ac4 Data 4 hal_internal_vsync.o(.data) + g_int_rxbr_irq0_cb_func 0x00070ac8 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x00070acc Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x00070ad0 Data 4 drv_vidc.o(.data) + __stdout 0x00070af8 Data 4 stdout.o(.data) + string 0x00070da0 Data 256 tau_log.o(.bss) + hal_dmahandle 0x00070ea0 Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x00070f40 Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x00070f60 Data 16 hal_uart.o(.bss) + g_vsync_hande 0x0007110c Data 80 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x0007115c Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x00071a7c Data 4144 dcs_packet_fifo.o(.bss) + g_spis_ctrl_handle 0x00072aac Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x00072ad0 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00073ad0 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x00010320, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000ff3c]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000f9f0, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 514 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2594 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2904 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2907 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2909 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2911 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2912 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2914 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2916 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2905 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 515 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2597 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2599 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2601 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2603 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 2868 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 2870 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 2872 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 2874 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 2876 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 2878 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 2880 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 2882 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 2884 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 2888 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 2890 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 2892 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 2894 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 2896 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 2898 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 2900 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 2902 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 2919 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 2921 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 2923 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 2925 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 2934 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 2935 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 2937 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 2941 .text mf_p.l(dsqrt.o) + 0x00010afa 0x00010afa 0x00000002 PAD + 0x00010afc 0x00010afc 0x00000040 Code RO 2943 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 2945 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 2947 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000056 Code RO 2957 .text mc_p.l(__dczerorl2.o) + 0x00010bde 0x00010bde 0x00000002 PAD + 0x00010be0 0x00010be0 0x00000018 Code RO 2228 i.ADC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010bf8 0x00010bf8 0x00000018 Code RO 2229 i.AP_NRESET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c10 0x00010c10 0x00000014 Code RO 2230 i.DMA_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c24 0x00010c24 0x0000001c Code RO 2231 i.EXTI_INT0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c40 0x00010c40 0x0000001c Code RO 2232 i.EXTI_INT1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c5c 0x00010c5c 0x0000001c Code RO 2233 i.EXTI_INT2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c78 0x00010c78 0x0000001c Code RO 2234 i.EXTI_INT3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c94 0x00010c94 0x0000001c Code RO 2235 i.EXTI_INT4_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cb0 0x00010cb0 0x0000001c Code RO 2236 i.EXTI_INT5_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ccc 0x00010ccc 0x0000001c Code RO 2237 i.EXTI_INT6_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ce8 0x00010ce8 0x0000001c Code RO 2238 i.EXTI_INT7_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d04 0x00010d04 0x00000014 Code RO 2239 i.FLSCTRL_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d18 0x00010d18 0x0000004e Code RO 99 i.Gpio_swire_output ap_demo.o + 0x00010d66 0x00010d66 0x00000002 PAD + 0x00010d68 0x00010d68 0x00000014 Code RO 2240 i.HardFault_Handler CVWL368.lib(irq_redirect .o) + 0x00010d7c 0x00010d7c 0x00000018 Code RO 2241 i.I2C0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d94 0x00010d94 0x00000018 Code RO 2242 i.I2C1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010dac 0x00010dac 0x00000018 Code RO 2243 i.LCDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010dc4 0x00010dc4 0x00000028 Code RO 976 i.LOG_printf CVWL368.lib(tau_log.o) + 0x00010dec 0x00010dec 0x00000018 Code RO 2244 i.MEMC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e04 0x00010e04 0x00000018 Code RO 2245 i.MIPI_RX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e1c 0x00010e1c 0x00000018 Code RO 2246 i.MIPI_TX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e34 0x00010e34 0x0000001c Code RO 2247 i.PWMDET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e50 0x00010e50 0x0000014c Code RO 262 i.S20_Start_init app_tp_transfer.o + 0x00010f9c 0x00010f9c 0x0000001c Code RO 2248 i.SPIM_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010fb8 0x00010fb8 0x0000001c Code RO 2249 i.SPIS_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010fd4 0x00010fd4 0x0000001c Code RO 2250 i.SWIRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ff0 0x00010ff0 0x00000002 Code RO 2476 i.UART_DisableDma CVWL368.lib(drv_uart.o) + 0x00010ff2 0x00010ff2 0x00000004 Code RO 2482 i.UART_GetInstance CVWL368.lib(drv_uart.o) + 0x00010ff6 0x00010ff6 0x00000002 Code RO 2952 i.__scatterload_null mc_p.l(handlers.o) + 0x00010ff8 0x00010ff8 0x00000004 Code RO 108 i.ap_set_display_on ap_demo.o + 0x00010ffc 0x00010ffc 0x00000004 Code RO 1812 i.drv_dsi_rx_set_inten CVWL368.lib(drv_dsi_rx.o) + 0x00011000 0x00011000 0x00000014 Data RO 1098 .ARM.__at_0x11000 CVWL368.lib(drv_common.o) + 0x00011014 0x00011014 0x00000004 Code RO 1855 i.drv_dsi_tx_command_get_payload CVWL368.lib(drv_dsi_tx.o) + 0x00011018 0x00011018 0x00000004 Data RO 1099 .ARM.__at_0x11018 CVWL368.lib(drv_common.o) + 0x0001101c 0x0001101c 0x00000018 Code RO 2251 i.SysTick_Handler CVWL368.lib(irq_redirect .o) + 0x00011034 0x00011034 0x00000018 Code RO 2252 i.TIMER0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001104c 0x0001104c 0x00000018 Code RO 2253 i.TIMER1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011064 0x00011064 0x00000018 Code RO 2254 i.TIMER2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001107c 0x0001107c 0x00000018 Code RO 2255 i.TIMER3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011094 0x00011094 0x0000001c Code RO 2472 i.UART0_IRQ_Handle CVWL368.lib(drv_uart.o) + 0x000110b0 0x000110b0 0x00000018 Code RO 2256 i.UART_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110c8 0x000110c8 0x00000024 Code RO 2490 i.UART_ResetRxFIFO CVWL368.lib(drv_uart.o) + 0x000110ec 0x000110ec 0x00000048 Code RO 2493 i.UART_SetBaudRate CVWL368.lib(drv_uart.o) + 0x00011134 0x00011134 0x0000001a Code RO 2494 i.UART_SwitchSCLK CVWL368.lib(drv_uart.o) + 0x0001114e 0x0001114e 0x00000134 Code RO 2496 i.UART_TransferHandleIRQ CVWL368.lib(drv_uart.o) + 0x00011282 0x00011282 0x0000001a Code RO 2498 i.UART_WriteBlocking CVWL368.lib(drv_uart.o) + 0x0001129c 0x0001129c 0x000000bc Code RO 2499 i.UART_init CVWL368.lib(drv_uart.o) + 0x00011358 0x00011358 0x00000018 Code RO 2257 i.VIDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011370 0x00011370 0x00000018 Code RO 2258 i.VPRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011388 0x00011388 0x00000018 Code RO 2259 i.WDG_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113a0 0x000113a0 0x00000020 Code RO 2840 i.__0printf mc_p.l(printfa.o) + 0x000113c0 0x000113c0 0x00000024 Code RO 2846 i.__0vsprintf mc_p.l(printfa.o) + 0x000113e4 0x000113e4 0x0000002e Code RO 2939 i.__ARM_clz mf_p.l(depilogue.o) + 0x00011412 0x00011412 0x0000001a Code RO 612 i.__ARM_common_switch8 CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001142c 0x0001142c 0x00000018 Code RO 1419 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_i2c_master.o) + 0x00011444 0x00011444 0x00000018 Code RO 1582 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_spi_master.o) + 0x0001145c 0x0001145c 0x00000020 Code RO 2082 i.__NVIC_DisableIRQ CVWL368.lib(drv_rxbr.o) + 0x0001147c 0x0001147c 0x00000018 Code RO 2083 i.__NVIC_EnableIRQ CVWL368.lib(drv_rxbr.o) + 0x00011494 0x00011494 0x00000044 Code RO 2378 i.__NVIC_SetPriority CVWL368.lib(hal_spi_slave.o) + 0x000114d8 0x000114d8 0x0000000e Code RO 2951 i.__scatterload_copy mc_p.l(handlers.o) + 0x000114e6 0x000114e6 0x0000000e Code RO 2953 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x000114f4 0x000114f4 0x0000000c Code RO 2929 i.__set_errno mc_p.l(errno.o) + 0x00011500 0x00011500 0x00000174 Code RO 2847 i._fp_digits mc_p.l(printfa.o) + 0x00011674 0x00011674 0x000006ec Code RO 2848 i._printf_core mc_p.l(printfa.o) + 0x00011d60 0x00011d60 0x00000020 Code RO 2849 i._printf_post_padding mc_p.l(printfa.o) + 0x00011d80 0x00011d80 0x0000002c Code RO 2850 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011dac 0x00011dac 0x0000000a Code RO 2852 i._sputc mc_p.l(printfa.o) + 0x00011db6 0x00011db6 0x00000002 PAD + 0x00011db8 0x00011db8 0x00000c16 Code RO 102 i.ap_dcs_read ap_demo.o + 0x000129ce 0x000129ce 0x00000002 PAD + 0x000129d0 0x000129d0 0x00000114 Code RO 103 i.ap_demo ap_demo.o + 0x00012ae4 0x00012ae4 0x00000098 Code RO 104 i.ap_get_reg_df ap_demo.o + 0x00012b7c 0x00012b7c 0x00000030 Code RO 105 i.ap_reset_cb ap_demo.o + 0x00012bac 0x00012bac 0x00000048 Code RO 106 i.ap_set_backlight_51 ap_demo.o + 0x00012bf4 0x00012bf4 0x00000012 Code RO 107 i.ap_set_display_off ap_demo.o + 0x00012c06 0x00012c06 0x00000002 PAD + 0x00012c08 0x00012c08 0x00000044 Code RO 109 i.ap_set_enter_sleep_mode ap_demo.o + 0x00012c4c 0x00012c4c 0x0000000c Code RO 110 i.ap_set_exit_sleep_mode ap_demo.o + 0x00012c58 0x00012c58 0x000000b0 Code RO 263 i.ap_tp_calibration app_tp_transfer.o + 0x00012d08 0x00012d08 0x0000002c Code RO 111 i.ap_update_frame_rate ap_demo.o + 0x00012d34 0x00012d34 0x0000001c Code RO 2084 i.app_ADC_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00012d50 0x00012d50 0x00000024 Code RO 1343 i.app_AP_NRESET_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012d74 0x00012d74 0x0000001c Code RO 1344 i.app_EXTI_INT0_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012d90 0x00012d90 0x0000001c Code RO 1345 i.app_EXTI_INT1_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012dac 0x00012dac 0x0000001c Code RO 1346 i.app_EXTI_INT2_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012dc8 0x00012dc8 0x0000001c Code RO 1347 i.app_EXTI_INT3_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012de4 0x00012de4 0x0000001c Code RO 1348 i.app_EXTI_INT4_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012e00 0x00012e00 0x0000001c Code RO 1349 i.app_EXTI_INT5_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012e1c 0x00012e1c 0x0000001c Code RO 1350 i.app_EXTI_INT6_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012e38 0x00012e38 0x0000001c Code RO 1351 i.app_EXTI_INT7_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012e54 0x00012e54 0x00000048 Code RO 1090 i.app_HardFault_Handler CVWL368.lib(drv_common.o) + 0x00012e9c 0x00012e9c 0x00000018 Code RO 1454 i.app_I2C0_IRQn_Handler CVWL368.lib(drv_i2c_slave.o) + 0x00012eb4 0x00012eb4 0x00000010 Code RO 1420 i.app_I2C1_IRQn_Handler CVWL368.lib(drv_i2c_master.o) + 0x00012ec4 0x00012ec4 0x00000130 Code RO 1700 i.app_LCDC_IRQn_Handler CVWL368.lib(hal_internal_vsync.o) + 0x00012ff4 0x00012ff4 0x00000088 Code RO 2026 i.app_MEMC_IRQn_Handler CVWL368.lib(drv_memc.o) + 0x0001307c 0x0001307c 0x00000298 Code RO 1798 i.app_MIPI_RX_IRQn_Handler CVWL368.lib(drv_dsi_rx.o) + 0x00013314 0x00013314 0x000000a0 Code RO 1854 i.app_MIPI_TX_IRQn_Handler CVWL368.lib(drv_dsi_tx.o) + 0x000133b4 0x000133b4 0x00000048 Code RO 1503 i.app_PWMDET_IRQn_Handler CVWL368.lib(drv_pwm.o) + 0x000133fc 0x000133fc 0x00000030 Code RO 1583 i.app_SPIM_IRQn_Handler CVWL368.lib(drv_spi_master.o) + 0x0001342c 0x0001342c 0x00000200 Code RO 2379 i.app_SPIS_IRQn_Handler CVWL368.lib(hal_spi_slave.o) + 0x0001362c 0x0001362c 0x00000020 Code RO 1615 i.app_SWIRE_IRQn_Handler CVWL368.lib(drv_swire.o) + 0x0001364c 0x0001364c 0x00000018 Code RO 1091 i.app_SysTick_Handler CVWL368.lib(drv_common.o) + 0x00013664 0x00013664 0x0000000a Code RO 1665 i.app_TIMER0_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x0001366e 0x0001366e 0x0000000a Code RO 1666 i.app_TIMER1_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x00013678 0x00013678 0x0000000a Code RO 1667 i.app_TIMER2_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x00013682 0x00013682 0x0000000a Code RO 1668 i.app_TIMER3_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x0001368c 0x0001368c 0x00000008 Code RO 2500 i.app_UART_IRQn_Handler CVWL368.lib(drv_uart.o) + 0x00013694 0x00013694 0x0000001c Code RO 2149 i.app_VIDC_IRQn_Handler CVWL368.lib(drv_vidc.o) + 0x000136b0 0x000136b0 0x0000001c Code RO 2085 i.app_VPRE_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x000136cc 0x000136cc 0x00000038 Code RO 2559 i.app_WDG_IRQn_Handler CVWL368.lib(drv_wdg.o) + 0x00013704 0x00013704 0x00000010 Code RO 1205 i.app_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00013714 0x00013714 0x00000030 Code RO 1006 i.app_fls_ctrl_Handler CVWL368.lib(norflash.o) + 0x00013744 0x00013744 0x00000024 Code RO 264 i.app_tp_I2C_init app_tp_transfer.o + 0x00013768 0x00013768 0x00000018 Code RO 112 i.app_tp_calibration_exec ap_demo.o + 0x00013780 0x00013780 0x00000030 Code RO 265 i.app_tp_i2cs_callback app_tp_transfer.o + 0x000137b0 0x000137b0 0x00000044 Code RO 266 i.app_tp_init app_tp_transfer.o + 0x000137f4 0x000137f4 0x00000020 Code RO 267 i.app_tp_m_read app_tp_transfer.o + 0x00013814 0x00013814 0x00000008 Code RO 269 i.app_tp_m_write app_tp_transfer.o + 0x0001381c 0x0001381c 0x00000358 Code RO 406 i.app_tp_phone_analysis_data app_tp_for_custom_s8.o + 0x00013b74 0x00013b74 0x00000008 Code RO 272 i.app_tp_s_read app_tp_transfer.o + 0x00013b7c 0x00013b7c 0x00000008 Code RO 274 i.app_tp_s_write app_tp_transfer.o + 0x00013b84 0x00013b84 0x000002b0 Code RO 408 i.app_tp_screen_analysis_int app_tp_for_custom_s8.o + 0x00013e34 0x00013e34 0x00000030 Code RO 275 i.app_tp_screen_init app_tp_transfer.o + 0x00013e64 0x00013e64 0x0000000c Code RO 276 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00013e70 0x00013e70 0x00000040 Code RO 277 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00013eb0 0x00013eb0 0x0000010c Code RO 278 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x00013fbc 0x00013fbc 0x00000014 Code RO 279 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x00013fd0 0x00013fd0 0x00000024 Code RO 494 i.board_Init board.o + 0x00013ff4 0x00013ff4 0x00000472 Code RO 1701 i.calc_framebuffer_setting CVWL368.lib(hal_internal_vsync.o) + 0x00014466 0x00014466 0x00000002 PAD + 0x00014468 0x00014468 0x000000c8 Code RO 2583 i.ceil m_ps.l(ceil.o) + 0x00014530 0x00014530 0x0000002c Code RO 1702 i.check_mipi_rx_tx_video_info CVWL368.lib(hal_internal_vsync.o) + 0x0001455c 0x0001455c 0x00000094 Code RO 1703 i.check_pkt_buf_rev CVWL368.lib(hal_internal_vsync.o) + 0x000145f0 0x000145f0 0x00000058 Code RO 1785 i.dcs_packet_fifo_alloc CVWL368.lib(dcs_packet_fifo.o) + 0x00014648 0x00014648 0x00000018 Code RO 1786 i.dcs_packet_fifo_init CVWL368.lib(dcs_packet_fifo.o) + 0x00014660 0x00014660 0x00000044 Code RO 1787 i.dcs_packet_free_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x000146a4 0x000146a4 0x00000024 Code RO 1788 i.dcs_packet_get_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x000146c8 0x000146c8 0x0000001c Code RO 1704 i.dcs_sw_filter CVWL368.lib(hal_internal_vsync.o) + 0x000146e4 0x000146e4 0x00000018 Code RO 968 i.delayMs CVWL368.lib(tau_delay.o) + 0x000146fc 0x000146fc 0x00000022 Code RO 969 i.delayUs CVWL368.lib(tau_delay.o) + 0x0001471e 0x0001471e 0x00000002 PAD + 0x00014720 0x00014720 0x00000038 Code RO 1634 i.drv_ap_rst_trig_edge_detect CVWL368.lib(drv_sys_cfg.o) + 0x00014758 0x00014758 0x0000000c Code RO 2349 i.drv_chip_info_get_info CVWL368.lib(drv_chip_info.o) + 0x00014764 0x00014764 0x00000040 Code RO 2350 i.drv_chip_info_init CVWL368.lib(drv_chip_info.o) + 0x000147a4 0x000147a4 0x000000c8 Code RO 2351 i.drv_chip_rx_info_check CVWL368.lib(drv_chip_info.o) + 0x0001486c 0x0001486c 0x00000014 Code RO 2352 i.drv_chip_rx_init_done CVWL368.lib(drv_chip_info.o) + 0x00014880 0x00014880 0x00000058 Code RO 1093 i.drv_common_enable_systick CVWL368.lib(drv_common.o) + 0x000148d8 0x000148d8 0x00000008 Code RO 1096 i.drv_common_system_init CVWL368.lib(drv_common.o) + 0x000148e0 0x000148e0 0x00000010 Code RO 1118 i.drv_crgu_config_reset_modules CVWL368.lib(drv_crgu.o) + 0x000148f0 0x000148f0 0x00000014 Code RO 1131 i.drv_crgu_set_ahb_pre_div CVWL368.lib(drv_crgu.o) + 0x00014904 0x00014904 0x00000014 Code RO 1132 i.drv_crgu_set_ahb_src CVWL368.lib(drv_crgu.o) + 0x00014918 0x00014918 0x00000020 Code RO 1135 i.drv_crgu_set_clock CVWL368.lib(drv_crgu.o) + 0x00014938 0x00014938 0x00000014 Code RO 1136 i.drv_crgu_set_dpi_mux_src CVWL368.lib(drv_crgu.o) + 0x0001494c 0x0001494c 0x00000018 Code RO 1137 i.drv_crgu_set_dpi_pre_div CVWL368.lib(drv_crgu.o) + 0x00014964 0x00014964 0x00000014 Code RO 1138 i.drv_crgu_set_dpi_pre_src CVWL368.lib(drv_crgu.o) + 0x00014978 0x00014978 0x00000014 Code RO 1139 i.drv_crgu_set_dsc_core_div CVWL368.lib(drv_crgu.o) + 0x0001498c 0x0001498c 0x00000014 Code RO 1140 i.drv_crgu_set_dsco_src CVWL368.lib(drv_crgu.o) + 0x000149a0 0x000149a0 0x00000014 Code RO 1141 i.drv_crgu_set_dsco_src_div CVWL368.lib(drv_crgu.o) + 0x000149b4 0x000149b4 0x00000014 Code RO 1142 i.drv_crgu_set_fb_div CVWL368.lib(drv_crgu.o) + 0x000149c8 0x000149c8 0x00000014 Code RO 1143 i.drv_crgu_set_fb_src CVWL368.lib(drv_crgu.o) + 0x000149dc 0x000149dc 0x00000014 Code RO 1146 i.drv_crgu_set_lcdc_div CVWL368.lib(drv_crgu.o) + 0x000149f0 0x000149f0 0x00000014 Code RO 1147 i.drv_crgu_set_lcdc_src CVWL368.lib(drv_crgu.o) + 0x00014a04 0x00014a04 0x00000014 Code RO 1148 i.drv_crgu_set_mipi_cfg_src CVWL368.lib(drv_crgu.o) + 0x00014a18 0x00014a18 0x00000018 Code RO 1149 i.drv_crgu_set_mipi_ref_src CVWL368.lib(drv_crgu.o) + 0x00014a30 0x00014a30 0x00000018 Code RO 1152 i.drv_crgu_set_reset CVWL368.lib(drv_crgu.o) + 0x00014a48 0x00014a48 0x00000014 Code RO 1153 i.drv_crgu_set_rxbr_div CVWL368.lib(drv_crgu.o) + 0x00014a5c 0x00014a5c 0x00000014 Code RO 1154 i.drv_crgu_set_rxbr_src CVWL368.lib(drv_crgu.o) + 0x00014a70 0x00014a70 0x00000014 Code RO 1156 i.drv_crgu_set_vidc_src CVWL368.lib(drv_crgu.o) + 0x00014a84 0x00014a84 0x00000018 Code RO 1209 i.drv_dma_clear_flag CVWL368.lib(drv_dma.o) + 0x00014a9c 0x00014a9c 0x0000001c Code RO 1210 i.drv_dma_create_handle CVWL368.lib(drv_dma.o) + 0x00014ab8 0x00014ab8 0x00000010 Code RO 1212 i.drv_dma_disenable_channel CVWL368.lib(drv_dma.o) + 0x00014ac8 0x00014ac8 0x00000010 Code RO 1214 i.drv_dma_enable_channel CVWL368.lib(drv_dma.o) + 0x00014ad8 0x00014ad8 0x00000024 Code RO 1215 i.drv_dma_enable_channel_interrupts CVWL368.lib(drv_dma.o) + 0x00014afc 0x00014afc 0x0000000c Code RO 1217 i.drv_dma_get_channel_flag CVWL368.lib(drv_dma.o) + 0x00014b08 0x00014b08 0x00000090 Code RO 1220 i.drv_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00014b98 0x00014b98 0x00000012 Code RO 1222 i.drv_dma_prepar_transfer CVWL368.lib(drv_dma.o) + 0x00014baa 0x00014baa 0x0000001a Code RO 1224 i.drv_dma_set_burst CVWL368.lib(drv_dma.o) + 0x00014bc4 0x00014bc4 0x00000006 Code RO 1225 i.drv_dma_set_callback CVWL368.lib(drv_dma.o) + 0x00014bca 0x00014bca 0x00000002 PAD + 0x00014bcc 0x00014bcc 0x00000044 Code RO 1227 i.drv_dma_set_transfer CVWL368.lib(drv_dma.o) + 0x00014c10 0x00014c10 0x00000036 Code RO 2362 i.drv_dsc_dec_convert_pps_rc_parameter CVWL368.lib(drv_dsc_dec.o) + 0x00014c46 0x00014c46 0x0000000c Code RO 2363 i.drv_dsc_dec_disable CVWL368.lib(drv_dsc_dec.o) + 0x00014c52 0x00014c52 0x00000002 PAD + 0x00014c54 0x00014c54 0x00000074 Code RO 2364 i.drv_dsc_dec_enable CVWL368.lib(drv_dsc_dec.o) + 0x00014cc8 0x00014cc8 0x0000000a Code RO 2365 i.drv_dsc_dec_get_nslc CVWL368.lib(drv_dsc_dec.o) + 0x00014cd2 0x00014cd2 0x00000028 Code RO 2367 i.drv_dsc_dec_set_u8_pps CVWL368.lib(drv_dsc_dec.o) + 0x00014cfa 0x00014cfa 0x00000002 PAD + 0x00014cfc 0x00014cfc 0x00000104 Code RO 1799 i.drv_dsi_rx_calc_ipi_tx_delay CVWL368.lib(drv_dsi_rx.o) + 0x00014e00 0x00014e00 0x00000040 Code RO 1800 i.drv_dsi_rx_enable_irq CVWL368.lib(drv_dsi_rx.o) + 0x00014e40 0x00014e40 0x00000050 Code RO 1801 i.drv_dsi_rx_get_color_bpp CVWL368.lib(drv_dsi_rx.o) + 0x00014e90 0x00014e90 0x0000001c Code RO 1802 i.drv_dsi_rx_get_color_pcc CVWL368.lib(drv_dsi_rx.o) + 0x00014eac 0x00014eac 0x00000008 Code RO 1803 i.drv_dsi_rx_get_compression_en CVWL368.lib(drv_dsi_rx.o) + 0x00014eb4 0x00014eb4 0x00000006 Code RO 1804 i.drv_dsi_rx_get_max_ret_size CVWL368.lib(drv_dsi_rx.o) + 0x00014eba 0x00014eba 0x0000000e Code RO 1808 i.drv_dsi_rx_power_up CVWL368.lib(drv_dsi_rx.o) + 0x00014ec8 0x00014ec8 0x00000020 Code RO 1809 i.drv_dsi_rx_set_ctrl_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014ee8 0x00014ee8 0x00000010 Code RO 1810 i.drv_dsi_rx_set_ddi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014ef8 0x00014ef8 0x00000010 Code RO 1813 i.drv_dsi_rx_set_ipi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014f08 0x00014f08 0x00000046 Code RO 1815 i.drv_dsi_rx_set_lane_swap CVWL368.lib(drv_dsi_rx.o) + 0x00014f4e 0x00014f4e 0x00000026 Code RO 1816 i.drv_dsi_rx_set_resp_cnt CVWL368.lib(drv_dsi_rx.o) + 0x00014f74 0x00014f74 0x00000104 Code RO 1817 i.drv_dsi_rx_set_up_phy CVWL368.lib(drv_dsi_rx.o) + 0x00015078 0x00015078 0x0000000e Code RO 1818 i.drv_dsi_rx_shut_down CVWL368.lib(drv_dsi_rx.o) + 0x00015086 0x00015086 0x00000014 Code RO 1856 i.drv_dsi_tx_command_header CVWL368.lib(drv_dsi_tx.o) + 0x0001509a 0x0001509a 0x0000006c Code RO 1857 i.drv_dsi_tx_command_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00015106 0x00015106 0x00000004 Code RO 1858 i.drv_dsi_tx_command_put_payload CVWL368.lib(drv_dsi_tx.o) + 0x0001510a 0x0001510a 0x00000018 Code RO 1859 i.drv_dsi_tx_config_eotp CVWL368.lib(drv_dsi_tx.o) + 0x00015122 0x00015122 0x00000008 Code RO 1860 i.drv_dsi_tx_config_int CVWL368.lib(drv_dsi_tx.o) + 0x0001512a 0x0001512a 0x00000008 Code RO 1861 i.drv_dsi_tx_dpi_lpcmd_time CVWL368.lib(drv_dsi_tx.o) + 0x00015132 0x00015132 0x0000000a Code RO 1862 i.drv_dsi_tx_dpi_mode CVWL368.lib(drv_dsi_tx.o) + 0x0001513c 0x0001513c 0x00000024 Code RO 1863 i.drv_dsi_tx_dpi_polarity CVWL368.lib(drv_dsi_tx.o) + 0x00015160 0x00015160 0x00000004 Code RO 1864 i.drv_dsi_tx_edpi_cmd_size CVWL368.lib(drv_dsi_tx.o) + 0x00015164 0x00015164 0x00000004 Code RO 1866 i.drv_dsi_tx_get_cmd_status CVWL368.lib(drv_dsi_tx.o) + 0x00015168 0x00015168 0x00000004 Code RO 1868 i.drv_dsi_tx_mode CVWL368.lib(drv_dsi_tx.o) + 0x0001516c 0x0001516c 0x00000018 Code RO 1869 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL368.lib(drv_dsi_tx.o) + 0x00015184 0x00015184 0x0000001a Code RO 1870 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL368.lib(drv_dsi_tx.o) + 0x0001519e 0x0001519e 0x0000000c Code RO 1872 i.drv_dsi_tx_phy_lane_mode CVWL368.lib(drv_dsi_tx.o) + 0x000151aa 0x000151aa 0x00000064 Code RO 1876 i.drv_dsi_tx_phy_status_ready CVWL368.lib(drv_dsi_tx.o) + 0x0001520e 0x0001520e 0x0000003e Code RO 1877 i.drv_dsi_tx_phy_status_stopstate CVWL368.lib(drv_dsi_tx.o) + 0x0001524c 0x0001524c 0x00000134 Code RO 1879 i.drv_dsi_tx_phy_test_setup CVWL368.lib(drv_dsi_tx.o) + 0x00015380 0x00015380 0x0000001e Code RO 1880 i.drv_dsi_tx_phy_time_cfg CVWL368.lib(drv_dsi_tx.o) + 0x0001539e 0x0001539e 0x00000008 Code RO 1884 i.drv_dsi_tx_powerup CVWL368.lib(drv_dsi_tx.o) + 0x000153a6 0x000153a6 0x0000001c Code RO 1885 i.drv_dsi_tx_response_mode CVWL368.lib(drv_dsi_tx.o) + 0x000153c2 0x000153c2 0x00000018 Code RO 1888 i.drv_dsi_tx_set_bta_ack CVWL368.lib(drv_dsi_tx.o) + 0x000153da 0x000153da 0x0000000c Code RO 1889 i.drv_dsi_tx_set_esc_div CVWL368.lib(drv_dsi_tx.o) + 0x000153e6 0x000153e6 0x00000002 PAD + 0x000153e8 0x000153e8 0x00000040 Code RO 1890 i.drv_dsi_tx_set_int CVWL368.lib(drv_dsi_tx.o) + 0x00015428 0x00015428 0x00000010 Code RO 1891 i.drv_dsi_tx_set_time_out_div CVWL368.lib(drv_dsi_tx.o) + 0x00015438 0x00015438 0x00000008 Code RO 1892 i.drv_dsi_tx_set_video_chunk CVWL368.lib(drv_dsi_tx.o) + 0x00015440 0x00015440 0x00000022 Code RO 1893 i.drv_dsi_tx_set_video_timing CVWL368.lib(drv_dsi_tx.o) + 0x00015462 0x00015462 0x00000008 Code RO 1895 i.drv_dsi_tx_shutdown CVWL368.lib(drv_dsi_tx.o) + 0x0001546a 0x0001546a 0x00000026 Code RO 1896 i.drv_dsi_tx_timeout_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00015490 0x00015490 0x000000aa Code RO 1899 i.drv_dsi_tx_video_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x0001553a 0x0001553a 0x00000016 Code RO 1900 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL368.lib(drv_dsi_tx.o) + 0x00015550 0x00015550 0x00000018 Code RO 1901 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL368.lib(drv_dsi_tx.o) + 0x00015568 0x00015568 0x00000020 Code RO 2300 i.drv_efuse_enter_inactive CVWL368.lib(drv_efuse.o) + 0x00015588 0x00015588 0x0000000c Code RO 2303 i.drv_efuse_int_enable CVWL368.lib(drv_efuse.o) + 0x00015594 0x00015594 0x00000032 Code RO 2304 i.drv_efuse_read CVWL368.lib(drv_efuse.o) + 0x000155c6 0x000155c6 0x00000018 Code RO 2305 i.drv_efuse_read_req CVWL368.lib(drv_efuse.o) + 0x000155de 0x000155de 0x00000002 PAD + 0x000155e0 0x000155e0 0x00000018 Code RO 1352 i.drv_gpio_get_input_data CVWL368.lib(drv_gpio.o) + 0x000155f8 0x000155f8 0x0000000c Code RO 1354 i.drv_gpio_register_ap_reset_callback CVWL368.lib(drv_gpio.o) + 0x00015604 0x00015604 0x00000014 Code RO 1355 i.drv_gpio_register_callback CVWL368.lib(drv_gpio.o) + 0x00015618 0x00015618 0x00000050 Code RO 1357 i.drv_gpio_set_int CVWL368.lib(drv_gpio.o) + 0x00015668 0x00015668 0x00000020 Code RO 1358 i.drv_gpio_set_ioe CVWL368.lib(drv_gpio.o) + 0x00015688 0x00015688 0x00000010 Code RO 1359 i.drv_gpio_set_mode0 CVWL368.lib(drv_gpio.o) + 0x00015698 0x00015698 0x00000010 Code RO 1360 i.drv_gpio_set_mode1 CVWL368.lib(drv_gpio.o) + 0x000156a8 0x000156a8 0x00000010 Code RO 1361 i.drv_gpio_set_mode2 CVWL368.lib(drv_gpio.o) + 0x000156b8 0x000156b8 0x00000010 Code RO 1362 i.drv_gpio_set_mode3 CVWL368.lib(drv_gpio.o) + 0x000156c8 0x000156c8 0x00000020 Code RO 720 i.drv_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x000156e8 0x000156e8 0x00000130 Code RO 1363 i.drv_gpio_set_pull_state CVWL368.lib(drv_gpio.o) + 0x00015818 0x00015818 0x0000000c Code RO 1455 i.drv_i2c0_set_callback CVWL368.lib(drv_i2c_slave.o) + 0x00015824 0x00015824 0x0000000c Code RO 1421 i.drv_i2c1_set_callback CVWL368.lib(drv_i2c_master.o) + 0x00015830 0x00015830 0x00000034 Code RO 1395 i.drv_i2c_dma_callback CVWL368.lib(drv_i2c_dma.o) + 0x00015864 0x00015864 0x000000ac Code RO 1396 i.drv_i2c_dma_init CVWL368.lib(drv_i2c_dma.o) + 0x00015910 0x00015910 0x0000001a Code RO 1397 i.drv_i2c_enable_rx_dma CVWL368.lib(drv_i2c_dma.o) + 0x0001592a 0x0001592a 0x00000018 Code RO 1398 i.drv_i2c_enable_tx_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015942 0x00015942 0x00000002 PAD + 0x00015944 0x00015944 0x00000060 Code RO 1423 i.drv_i2c_m_clear_it_pending_bit CVWL368.lib(drv_i2c_master.o) + 0x000159a4 0x000159a4 0x00000010 Code RO 1426 i.drv_i2c_m_enable CVWL368.lib(drv_i2c_master.o) + 0x000159b4 0x000159b4 0x00000038 Code RO 1427 i.drv_i2c_m_enable_intr CVWL368.lib(drv_i2c_master.o) + 0x000159ec 0x000159ec 0x0000008c Code RO 1433 i.drv_i2c_master_init CVWL368.lib(drv_i2c_master.o) + 0x00015a78 0x00015a78 0x0000005c Code RO 1399 i.drv_i2c_master_read_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015ad4 0x00015ad4 0x0000003c Code RO 1400 i.drv_i2c_master_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015b10 0x00015b10 0x0000002e Code RO 1401 i.drv_i2c_master_write_read_cmd CVWL368.lib(drv_i2c_dma.o) + 0x00015b3e 0x00015b3e 0x00000042 Code RO 1456 i.drv_i2c_s_clear_it_pending_bit CVWL368.lib(drv_i2c_slave.o) + 0x00015b80 0x00015b80 0x00000004 Code RO 1457 i.drv_i2c_s_config_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015b84 0x00015b84 0x00000008 Code RO 1458 i.drv_i2c_s_enable CVWL368.lib(drv_i2c_slave.o) + 0x00015b8c 0x00015b8c 0x00000014 Code RO 1459 i.drv_i2c_s_get_fifo_status CVWL368.lib(drv_i2c_slave.o) + 0x00015ba0 0x00015ba0 0x00000050 Code RO 1462 i.drv_i2c_s_set_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015bf0 0x00015bf0 0x0000001c Code RO 1463 i.drv_i2c_s_write_data CVWL368.lib(drv_i2c_slave.o) + 0x00015c0c 0x00015c0c 0x00000058 Code RO 1402 i.drv_i2c_set_dma_irq_callback CVWL368.lib(drv_i2c_dma.o) + 0x00015c64 0x00015c64 0x00000032 Code RO 1464 i.drv_i2c_slave_init CVWL368.lib(drv_i2c_slave.o) + 0x00015c96 0x00015c96 0x00000002 PAD + 0x00015c98 0x00015c98 0x00000018 Code RO 1403 i.drv_i2c_slave_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015cb0 0x00015cb0 0x00000018 Code RO 1968 i.drv_lcdc_config_bypass CVWL368.lib(drv_lcdc.o) + 0x00015cc8 0x00015cc8 0x00000030 Code RO 1969 i.drv_lcdc_config_ccm CVWL368.lib(drv_lcdc.o) + 0x00015cf8 0x00015cf8 0x00000016 Code RO 1970 i.drv_lcdc_config_disp_mode CVWL368.lib(drv_lcdc.o) + 0x00015d0e 0x00015d0e 0x00000024 Code RO 1971 i.drv_lcdc_config_dpi_polarity CVWL368.lib(drv_lcdc.o) + 0x00015d32 0x00015d32 0x00000026 Code RO 1972 i.drv_lcdc_config_dpi_timing CVWL368.lib(drv_lcdc.o) + 0x00015d58 0x00015d58 0x00000016 Code RO 1973 i.drv_lcdc_config_edpi_mode CVWL368.lib(drv_lcdc.o) + 0x00015d6e 0x00015d6e 0x00000016 Code RO 1974 i.drv_lcdc_config_endianness CVWL368.lib(drv_lcdc.o) + 0x00015d84 0x00015d84 0x0000000c Code RO 1975 i.drv_lcdc_config_input_size CVWL368.lib(drv_lcdc.o) + 0x00015d90 0x00015d90 0x0000001e Code RO 1976 i.drv_lcdc_config_int CVWL368.lib(drv_lcdc.o) + 0x00015dae 0x00015dae 0x00000022 Code RO 1977 i.drv_lcdc_config_int_single CVWL368.lib(drv_lcdc.o) + 0x00015dd0 0x00015dd0 0x00000022 Code RO 1978 i.drv_lcdc_config_overwrite CVWL368.lib(drv_lcdc.o) + 0x00015df2 0x00015df2 0x0000000c Code RO 1979 i.drv_lcdc_config_overwrite_rgb CVWL368.lib(drv_lcdc.o) + 0x00015dfe 0x00015dfe 0x0000001a Code RO 1980 i.drv_lcdc_config_partial_display_area CVWL368.lib(drv_lcdc.o) + 0x00015e18 0x00015e18 0x00000022 Code RO 1981 i.drv_lcdc_config_partial_display_enable CVWL368.lib(drv_lcdc.o) + 0x00015e3a 0x00015e3a 0x0000001a Code RO 1983 i.drv_lcdc_config_scale_up_coef CVWL368.lib(drv_lcdc.o) + 0x00015e54 0x00015e54 0x0000000c Code RO 1984 i.drv_lcdc_config_scale_up_step CVWL368.lib(drv_lcdc.o) + 0x00015e60 0x00015e60 0x0000004c Code RO 1985 i.drv_lcdc_config_src_parameter CVWL368.lib(drv_lcdc.o) + 0x00015eac 0x00015eac 0x00000006 Code RO 1986 i.drv_lcdc_config_thresh CVWL368.lib(drv_lcdc.o) + 0x00015eb2 0x00015eb2 0x00000012 Code RO 1987 i.drv_lcdc_ctrl_flow CVWL368.lib(drv_lcdc.o) + 0x00015ec4 0x00015ec4 0x00000020 Code RO 1989 i.drv_lcdc_enable_shadow_reg CVWL368.lib(drv_lcdc.o) + 0x00015ee4 0x00015ee4 0x00000040 Code RO 1990 i.drv_lcdc_set_int CVWL368.lib(drv_lcdc.o) + 0x00015f24 0x00015f24 0x00000018 Code RO 1991 i.drv_lcdc_set_prefetch CVWL368.lib(drv_lcdc.o) + 0x00015f3c 0x00015f3c 0x00000014 Code RO 1992 i.drv_lcdc_set_video_hw_mode CVWL368.lib(drv_lcdc.o) + 0x00015f50 0x00015f50 0x00000020 Code RO 1993 i.drv_lcdc_start CVWL368.lib(drv_lcdc.o) + 0x00015f70 0x00015f70 0x0000000c Code RO 2027 i.drv_memc_clear_status CVWL368.lib(drv_memc.o) + 0x00015f7c 0x00015f7c 0x00000040 Code RO 2028 i.drv_memc_enable_irq CVWL368.lib(drv_memc.o) + 0x00015fbc 0x00015fbc 0x0000000c Code RO 2029 i.drv_memc_gen_a_tear_signal CVWL368.lib(drv_memc.o) + 0x00015fc8 0x00015fc8 0x00000012 Code RO 2030 i.drv_memc_get_status CVWL368.lib(drv_memc.o) + 0x00015fda 0x00015fda 0x00000010 Code RO 2031 i.drv_memc_rate_transfer_sel CVWL368.lib(drv_memc.o) + 0x00015fea 0x00015fea 0x0000000e Code RO 2032 i.drv_memc_sel_vsync CVWL368.lib(drv_memc.o) + 0x00015ff8 0x00015ff8 0x00000014 Code RO 2033 i.drv_memc_set_active_height CVWL368.lib(drv_memc.o) + 0x0001600c 0x0001600c 0x0000000c Code RO 2034 i.drv_memc_set_data_mode CVWL368.lib(drv_memc.o) + 0x00016018 0x00016018 0x00000010 Code RO 2037 i.drv_memc_set_double_buffer CVWL368.lib(drv_memc.o) + 0x00016028 0x00016028 0x00000012 Code RO 2038 i.drv_memc_set_double_buffer_reverse CVWL368.lib(drv_memc.o) + 0x0001603a 0x0001603a 0x00000010 Code RO 2040 i.drv_memc_set_fs_en_conditions CVWL368.lib(drv_memc.o) + 0x0001604a 0x0001604a 0x00000014 Code RO 2041 i.drv_memc_set_inten CVWL368.lib(drv_memc.o) + 0x0001605e 0x0001605e 0x00000002 PAD + 0x00016060 0x00016060 0x00000018 Code RO 2042 i.drv_memc_set_lcdc_st_conditions CVWL368.lib(drv_memc.o) + 0x00016078 0x00016078 0x0000001a Code RO 2043 i.drv_memc_set_ltpo_mode CVWL368.lib(drv_memc.o) + 0x00016092 0x00016092 0x0000000e Code RO 2047 i.drv_memc_set_tear_mode CVWL368.lib(drv_memc.o) + 0x000160a0 0x000160a0 0x00000028 Code RO 2048 i.drv_memc_set_tear_waveform CVWL368.lib(drv_memc.o) + 0x000160c8 0x000160c8 0x0000000e Code RO 2050 i.drv_memc_set_vidc_sync_cnt CVWL368.lib(drv_memc.o) + 0x000160d6 0x000160d6 0x00000002 PAD + 0x000160d8 0x000160d8 0x00000008 Code RO 1481 i.drv_param_init_get_ccm CVWL368.lib(drv_param_init.o) + 0x000160e0 0x000160e0 0x00000014 Code RO 1482 i.drv_param_init_get_scld_filter_h CVWL368.lib(drv_param_init.o) + 0x000160f4 0x000160f4 0x00000014 Code RO 1483 i.drv_param_init_get_scld_filter_v CVWL368.lib(drv_param_init.o) + 0x00016108 0x00016108 0x00000008 Code RO 1484 i.drv_param_init_get_sclu_filter CVWL368.lib(drv_param_init.o) + 0x00016110 0x00016110 0x00000014 Code RO 1485 i.drv_param_init_set_ccm CVWL368.lib(drv_param_init.o) + 0x00016124 0x00016124 0x00000064 Code RO 1486 i.drv_param_init_set_scld_filter CVWL368.lib(drv_param_init.o) + 0x00016188 0x00016188 0x00000024 Code RO 1488 i.drv_param_p2r_filter_init CVWL368.lib(drv_param_init.o) + 0x000161ac 0x000161ac 0x00000010 Code RO 2321 i.drv_phy_enable_calibration CVWL368.lib(drv_phy_common.o) + 0x000161bc 0x000161bc 0x0000003c Code RO 2322 i.drv_phy_get_calibration CVWL368.lib(drv_phy_common.o) + 0x000161f8 0x000161f8 0x00000060 Code RO 2323 i.drv_phy_get_pll_para CVWL368.lib(drv_phy_common.o) + 0x00016258 0x00016258 0x00000054 Code RO 2324 i.drv_phy_get_rate_para CVWL368.lib(drv_phy_common.o) + 0x000162ac 0x000162ac 0x00000010 Code RO 2325 i.drv_phy_test_clear CVWL368.lib(drv_phy_common.o) + 0x000162bc 0x000162bc 0x00000018 Code RO 2326 i.drv_phy_test_lock CVWL368.lib(drv_phy_common.o) + 0x000162d4 0x000162d4 0x00000020 Code RO 2328 i.drv_phy_test_write_1_byte CVWL368.lib(drv_phy_common.o) + 0x000162f4 0x000162f4 0x00000026 Code RO 2329 i.drv_phy_test_write_2_byte CVWL368.lib(drv_phy_common.o) + 0x0001631a 0x0001631a 0x0000001e Code RO 2330 i.drv_phy_test_write_code CVWL368.lib(drv_phy_common.o) + 0x00016338 0x00016338 0x00000020 Code RO 2331 i.drv_phy_test_write_data CVWL368.lib(drv_phy_common.o) + 0x00016358 0x00016358 0x00000020 Code RO 1543 i.drv_pwr_set_cp_mode CVWL368.lib(drv_pwr.o) + 0x00016378 0x00016378 0x00000018 Code RO 1545 i.drv_pwr_set_pvd_mode CVWL368.lib(drv_pwr.o) + 0x00016390 0x00016390 0x00000038 Code RO 1546 i.drv_pwr_set_system_clk_src CVWL368.lib(drv_pwr.o) + 0x000163c8 0x000163c8 0x0000000c Code RO 1819 i.drv_rx_phy_test_clear CVWL368.lib(drv_dsi_rx.o) + 0x000163d4 0x000163d4 0x00000010 Code RO 1820 i.drv_rx_phy_test_lock CVWL368.lib(drv_dsi_rx.o) + 0x000163e4 0x000163e4 0x00000014 Code RO 1822 i.drv_rx_phy_test_write_1_byte CVWL368.lib(drv_dsi_rx.o) + 0x000163f8 0x000163f8 0x00000016 Code RO 1823 i.drv_rx_phy_test_write_2_byte CVWL368.lib(drv_dsi_rx.o) + 0x0001640e 0x0001640e 0x0000000a Code RO 2086 i.drv_rxbr_clear_pkt_buffer CVWL368.lib(drv_rxbr.o) + 0x00016418 0x00016418 0x00000004 Code RO 2087 i.drv_rxbr_clear_status0 CVWL368.lib(drv_rxbr.o) + 0x0001641c 0x0001641c 0x0000005a Code RO 2089 i.drv_rxbr_enable_irq CVWL368.lib(drv_rxbr.o) + 0x00016476 0x00016476 0x00000002 PAD + 0x00016478 0x00016478 0x00000014 Code RO 2090 i.drv_rxbr_frame_drop_cfg CVWL368.lib(drv_rxbr.o) + 0x0001648c 0x0001648c 0x00000064 Code RO 2091 i.drv_rxbr_get_clk CVWL368.lib(drv_rxbr.o) + 0x000164f0 0x000164f0 0x00000004 Code RO 2092 i.drv_rxbr_get_col_addr CVWL368.lib(drv_rxbr.o) + 0x000164f4 0x000164f4 0x00000012 Code RO 1705 i.drv_rxbr_get_int_source CVWL368.lib(hal_internal_vsync.o) + 0x00016506 0x00016506 0x00000004 Code RO 2095 i.drv_rxbr_get_page_addr CVWL368.lib(drv_rxbr.o) + 0x0001650a 0x0001650a 0x00000012 Code RO 1706 i.drv_rxbr_get_status0 CVWL368.lib(hal_internal_vsync.o) + 0x0001651c 0x0001651c 0x0000000c Code RO 2097 i.drv_rxbr_hline_rcv0_cfg CVWL368.lib(drv_rxbr.o) + 0x00016528 0x00016528 0x00000008 Code RO 2098 i.drv_rxbr_hline_rcv_cfg CVWL368.lib(drv_rxbr.o) + 0x00016530 0x00016530 0x0000000c Code RO 2099 i.drv_rxbr_register_irq0_callback CVWL368.lib(drv_rxbr.o) + 0x0001653c 0x0001653c 0x0000000c Code RO 2100 i.drv_rxbr_register_irq1_callback CVWL368.lib(drv_rxbr.o) + 0x00016548 0x00016548 0x00000014 Code RO 2101 i.drv_rxbr_set_ack_pkt_header CVWL368.lib(drv_rxbr.o) + 0x0001655c 0x0001655c 0x000000cc Code RO 2102 i.drv_rxbr_set_cmd_filter CVWL368.lib(drv_rxbr.o) + 0x00016628 0x00016628 0x00000014 Code RO 2104 i.drv_rxbr_set_color_format CVWL368.lib(drv_rxbr.o) + 0x0001663c 0x0001663c 0x00000014 Code RO 2106 i.drv_rxbr_set_inten CVWL368.lib(drv_rxbr.o) + 0x00016650 0x00016650 0x00000010 Code RO 2107 i.drv_rxbr_set_ltpo_drop_th CVWL368.lib(drv_rxbr.o) + 0x00016660 0x00016660 0x00000026 Code RO 2109 i.drv_rxbr_set_usr_cfg CVWL368.lib(drv_rxbr.o) + 0x00016686 0x00016686 0x00000008 Code RO 2110 i.drv_rxbr_set_usr_col CVWL368.lib(drv_rxbr.o) + 0x0001668e 0x0001668e 0x00000008 Code RO 2111 i.drv_rxbr_set_usr_row CVWL368.lib(drv_rxbr.o) + 0x00016696 0x00016696 0x00000002 PAD + 0x00016698 0x00016698 0x00000020 Code RO 1591 i.drv_spi_m_read_data CVWL368.lib(drv_spi_master.o) + 0x000166b8 0x000166b8 0x0000001c Code RO 1616 i.drv_swire_enable CVWL368.lib(drv_swire.o) + 0x000166d4 0x000166d4 0x00000054 Code RO 1619 i.drv_swire_set_int CVWL368.lib(drv_swire.o) + 0x00016728 0x00016728 0x0000001c Code RO 1620 i.drv_swire_set_power_down CVWL368.lib(drv_swire.o) + 0x00016744 0x00016744 0x0000000c Code RO 1635 i.drv_sys_cfg_clear_all_int CVWL368.lib(drv_sys_cfg.o) + 0x00016750 0x00016750 0x00000028 Code RO 1636 i.drv_sys_cfg_clear_pending CVWL368.lib(drv_sys_cfg.o) + 0x00016778 0x00016778 0x00000018 Code RO 1639 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL368.lib(drv_sys_cfg.o) + 0x00016790 0x00016790 0x0000001c Code RO 1640 i.drv_sys_cfg_sel_ap_rst_trig CVWL368.lib(drv_sys_cfg.o) + 0x000167ac 0x000167ac 0x00000024 Code RO 1641 i.drv_sys_cfg_sel_gpio_group CVWL368.lib(drv_sys_cfg.o) + 0x000167d0 0x000167d0 0x00000024 Code RO 1642 i.drv_sys_cfg_sel_int_trig CVWL368.lib(drv_sys_cfg.o) + 0x000167f4 0x000167f4 0x00000010 Code RO 1644 i.drv_sys_cfg_set_dma_rx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016804 0x00016804 0x00000010 Code RO 1645 i.drv_sys_cfg_set_dma_tx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016814 0x00016814 0x00000024 Code RO 1646 i.drv_sys_cfg_set_int CVWL368.lib(drv_sys_cfg.o) + 0x00016838 0x00016838 0x0000001a Code RO 1669 i.drv_timer_clear_status_flags CVWL368.lib(drv_timer.o) + 0x00016852 0x00016852 0x00000020 Code RO 1670 i.drv_timer_enable CVWL368.lib(drv_timer.o) + 0x00016872 0x00016872 0x00000002 PAD + 0x00016874 0x00016874 0x00000010 Code RO 1671 i.drv_timer_get_instance CVWL368.lib(drv_timer.o) + 0x00016884 0x00016884 0x00000010 Code RO 1672 i.drv_timer_get_prescaler CVWL368.lib(drv_timer.o) + 0x00016894 0x00016894 0x00000044 Code RO 1674 i.drv_timer_handle_interrupt CVWL368.lib(drv_timer.o) + 0x000168d8 0x000168d8 0x00000014 Code RO 1675 i.drv_timer_register_callback CVWL368.lib(drv_timer.o) + 0x000168ec 0x000168ec 0x00000010 Code RO 1676 i.drv_timer_set_compare_val CVWL368.lib(drv_timer.o) + 0x000168fc 0x000168fc 0x00000054 Code RO 1677 i.drv_timer_set_int CVWL368.lib(drv_timer.o) + 0x00016950 0x00016950 0x00000028 Code RO 1678 i.drv_timer_set_prescaler CVWL368.lib(drv_timer.o) + 0x00016978 0x00016978 0x00000010 Code RO 1679 i.drv_timer_set_repeat CVWL368.lib(drv_timer.o) + 0x00016988 0x00016988 0x0000000a Code RO 1902 i.drv_tx_phy_test_clear CVWL368.lib(drv_dsi_tx.o) + 0x00016992 0x00016992 0x0000001c Code RO 1903 i.drv_tx_phy_test_enter CVWL368.lib(drv_dsi_tx.o) + 0x000169ae 0x000169ae 0x0000001c Code RO 1904 i.drv_tx_phy_test_exit CVWL368.lib(drv_dsi_tx.o) + 0x000169ca 0x000169ca 0x00000012 Code RO 1906 i.drv_tx_phy_test_write_1_byte CVWL368.lib(drv_dsi_tx.o) + 0x000169dc 0x000169dc 0x00000014 Code RO 1907 i.drv_tx_phy_test_write_2_byte CVWL368.lib(drv_dsi_tx.o) + 0x000169f0 0x000169f0 0x00000010 Code RO 1908 i.drv_tx_phy_test_write_code CVWL368.lib(drv_dsi_tx.o) + 0x00016a00 0x00016a00 0x00000008 Code RO 2150 i.drv_vidc_clear_irq CVWL368.lib(drv_vidc.o) + 0x00016a08 0x00016a08 0x00000018 Code RO 2154 i.drv_vidc_enable CVWL368.lib(drv_vidc.o) + 0x00016a20 0x00016a20 0x00000040 Code RO 2155 i.drv_vidc_enable_irq CVWL368.lib(drv_vidc.o) + 0x00016a60 0x00016a60 0x00000012 Code RO 2157 i.drv_vidc_get_irq_status CVWL368.lib(drv_vidc.o) + 0x00016a72 0x00016a72 0x00000002 PAD + 0x00016a74 0x00016a74 0x00000028 Code RO 2161 i.drv_vidc_init_module_enable CVWL368.lib(drv_vidc.o) + 0x00016a9c 0x00016a9c 0x0000000c Code RO 2162 i.drv_vidc_register_callback CVWL368.lib(drv_vidc.o) + 0x00016aa8 0x00016aa8 0x00000006 Code RO 2163 i.drv_vidc_reset CVWL368.lib(drv_vidc.o) + 0x00016aae 0x00016aae 0x0000003c Code RO 2165 i.drv_vidc_set_dst_parameter CVWL368.lib(drv_vidc.o) + 0x00016aea 0x00016aea 0x00000014 Code RO 2169 i.drv_vidc_set_irqen CVWL368.lib(drv_vidc.o) + 0x00016afe 0x00016afe 0x00000010 Code RO 2170 i.drv_vidc_set_mirror CVWL368.lib(drv_vidc.o) + 0x00016b0e 0x00016b0e 0x00000008 Code RO 2173 i.drv_vidc_set_p2r_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016b16 0x00016b16 0x00000026 Code RO 2174 i.drv_vidc_set_p2r_hinitb CVWL368.lib(drv_vidc.o) + 0x00016b3c 0x00016b3c 0x00000026 Code RO 2175 i.drv_vidc_set_p2r_hinitr CVWL368.lib(drv_vidc.o) + 0x00016b62 0x00016b62 0x00000002 PAD + 0x00016b64 0x00016b64 0x00000018 Code RO 2176 i.drv_vidc_set_pentile_swap CVWL368.lib(drv_vidc.o) + 0x00016b7c 0x00016b7c 0x0000000a Code RO 2177 i.drv_vidc_set_pu_ctrl CVWL368.lib(drv_vidc.o) + 0x00016b86 0x00016b86 0x00000010 Code RO 2178 i.drv_vidc_set_rotation CVWL368.lib(drv_vidc.o) + 0x00016b96 0x00016b96 0x0000000a Code RO 2179 i.drv_vidc_set_scld_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016ba0 0x00016ba0 0x0000000a Code RO 2180 i.drv_vidc_set_scld_hcoef1 CVWL368.lib(drv_vidc.o) + 0x00016baa 0x00016baa 0x00000012 Code RO 2181 i.drv_vidc_set_scld_step CVWL368.lib(drv_vidc.o) + 0x00016bbc 0x00016bbc 0x0000000a Code RO 2182 i.drv_vidc_set_scld_vcoef0 CVWL368.lib(drv_vidc.o) + 0x00016bc6 0x00016bc6 0x0000000a Code RO 2183 i.drv_vidc_set_scld_vcoef1 CVWL368.lib(drv_vidc.o) + 0x00016bd0 0x00016bd0 0x00000016 Code RO 2184 i.drv_vidc_set_src_parameter CVWL368.lib(drv_vidc.o) + 0x00016be6 0x00016be6 0x00000002 PAD + 0x00016be8 0x00016be8 0x00000010 Code RO 2560 i.drv_wdg_clear_counter CVWL368.lib(drv_wdg.o) + 0x00016bf8 0x00016bf8 0x00000010 Code RO 2561 i.drv_wdg_clear_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016c08 0x00016c08 0x00000010 Code RO 2564 i.drv_wdg_read_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016c18 0x00016c18 0x00000040 Code RO 2567 i.drv_wdg_set_int CVWL368.lib(drv_wdg.o) + 0x00016c58 0x00016c58 0x0000000a Code RO 1264 i.fls_clr_interrupt_flag CVWL368.lib(drv_fls.o) + 0x00016c62 0x00016c62 0x00000014 Code RO 978 i.fputc CVWL368.lib(tau_log.o) + 0x00016c76 0x00016c76 0x00000002 PAD + 0x00016c78 0x00016c78 0x00000034 Code RO 523 i.hal_dsi_rx_ctrl_create_handle CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016cac 0x00016cac 0x0000009c Code RO 525 i.hal_dsi_rx_ctrl_deinit CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016d48 0x00016d48 0x00000084 Code RO 527 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016dcc 0x00016dcc 0x00000028 Code RO 529 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016df4 0x00016df4 0x00000010 Code RO 530 i.hal_dsi_rx_ctrl_get_compressen_en CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e04 0x00016e04 0x00000028 Code RO 531 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e2c 0x00016e2c 0x00000060 Code RO 533 i.hal_dsi_rx_ctrl_init CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e8c 0x00016e8c 0x000001a4 Code RO 534 i.hal_dsi_rx_ctrl_init_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017030 0x00017030 0x000000d8 Code RO 535 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017108 0x00017108 0x00000158 Code RO 536 i.hal_dsi_rx_ctrl_init_memc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017260 0x00017260 0x00000138 Code RO 537 i.hal_dsi_rx_ctrl_init_rxbr CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017398 0x00017398 0x00000230 Code RO 538 i.hal_dsi_rx_ctrl_init_vidc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000175c8 0x000175c8 0x000000f0 Code RO 542 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000176b8 0x000176b8 0x0000006c Code RO 545 i.hal_dsi_rx_ctrl_set_cus_scld_filter CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017724 0x00017724 0x00000034 Code RO 546 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017758 0x00017758 0x00000038 Code RO 550 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017790 0x00017790 0x00000072 Code RO 555 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017802 0x00017802 0x00000002 PAD + 0x00017804 0x00017804 0x00000034 Code RO 556 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017838 0x00017838 0x0000000e Code RO 558 i.hal_dsi_rx_ctrl_set_tear_mode_ex CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017846 0x00017846 0x00000002 PAD + 0x00017848 0x00017848 0x0000003c Code RO 559 i.hal_dsi_rx_ctrl_start CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017884 0x00017884 0x0000003c Code RO 560 i.hal_dsi_rx_ctrl_stop CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000178c0 0x000178c0 0x00000020 Code RO 563 i.hal_dsi_rx_ctrl_toggle_resolution_ex CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000178e0 0x000178e0 0x00000190 Code RO 616 i.hal_dsi_tx_calc_video_chunks CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017a70 0x00017a70 0x00000034 Code RO 617 i.hal_dsi_tx_config_params_for_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017aa4 0x00017aa4 0x00000450 Code RO 618 i.hal_dsi_tx_count_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017ef4 0x00017ef4 0x0000002c Code RO 621 i.hal_dsi_tx_ctrl_create_handle CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f20 0x00017f20 0x00000084 Code RO 622 i.hal_dsi_tx_ctrl_deinit CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017fa4 0x00017fa4 0x0000004c Code RO 626 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017ff0 0x00017ff0 0x00000028 Code RO 628 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018018 0x00018018 0x000000a4 Code RO 630 i.hal_dsi_tx_ctrl_init CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180bc 0x000180bc 0x00000024 Code RO 631 i.hal_dsi_tx_ctrl_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180e0 0x000180e0 0x0000000c Code RO 632 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180ec 0x000180ec 0x0000008c Code RO 633 i.hal_dsi_tx_ctrl_read_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018178 0x00018178 0x00000020 Code RO 635 i.hal_dsi_tx_ctrl_set_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018198 0x00018198 0x00000014 Code RO 641 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181ac 0x000181ac 0x00000010 Code RO 642 i.hal_dsi_tx_ctrl_set_partial_disp CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181bc 0x000181bc 0x00000024 Code RO 643 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181e0 0x000181e0 0x0000009c Code RO 646 i.hal_dsi_tx_ctrl_start CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001827c 0x0001827c 0x00000044 Code RO 647 i.hal_dsi_tx_ctrl_stop CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000182c0 0x000182c0 0x000000d8 Code RO 648 i.hal_dsi_tx_ctrl_write_array_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018398 0x00018398 0x000000b0 Code RO 649 i.hal_dsi_tx_ctrl_write_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018448 0x00018448 0x00000044 Code RO 650 i.hal_dsi_tx_init_data_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001848c 0x0001848c 0x00000030 Code RO 651 i.hal_dsi_tx_init_dpi_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000184bc 0x000184bc 0x00000020 Code RO 652 i.hal_dsi_tx_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000184dc 0x000184dc 0x00000020 Code RO 653 i.hal_dsi_tx_init_phy_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000184fc 0x000184fc 0x00000094 Code RO 654 i.hal_dsi_tx_init_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018590 0x00018590 0x00000058 Code RO 655 i.hal_dsi_tx_init_video_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000185e8 0x000185e8 0x00000044 Code RO 656 i.hal_dsi_tx_send_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001862c 0x0001862c 0x00000018 Code RO 721 i.hal_gpio_ctrl_eint CVWL368.lib(hal_gpio.o) + 0x00018644 0x00018644 0x00000012 Code RO 722 i.hal_gpio_get_input_data CVWL368.lib(hal_gpio.o) + 0x00018656 0x00018656 0x00000002 PAD + 0x00018658 0x00018658 0x00000040 Code RO 725 i.hal_gpio_init_eint CVWL368.lib(hal_gpio.o) + 0x00018698 0x00018698 0x00000020 Code RO 726 i.hal_gpio_init_input CVWL368.lib(hal_gpio.o) + 0x000186b8 0x000186b8 0x00000028 Code RO 727 i.hal_gpio_init_output CVWL368.lib(hal_gpio.o) + 0x000186e0 0x000186e0 0x00000018 Code RO 728 i.hal_gpio_reg_eint_cb CVWL368.lib(hal_gpio.o) + 0x000186f8 0x000186f8 0x00000050 Code RO 729 i.hal_gpio_set_ap_reset_int CVWL368.lib(hal_gpio.o) + 0x00018748 0x00018748 0x00000060 Code RO 731 i.hal_gpio_set_mode CVWL368.lib(hal_gpio.o) + 0x000187a8 0x000187a8 0x00000008 Code RO 732 i.hal_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x000187b0 0x000187b0 0x00000020 Code RO 734 i.hal_gpio_set_pull_state CVWL368.lib(hal_gpio.o) + 0x000187d0 0x000187d0 0x0000006c Code RO 760 i.hal_i2c_m_dma_init CVWL368.lib(hal_i2c_master.o) + 0x0001883c 0x0001883c 0x00000020 Code RO 761 i.hal_i2c_m_dma_read CVWL368.lib(hal_i2c_master.o) + 0x0001885c 0x0001885c 0x0000001c Code RO 762 i.hal_i2c_m_dma_write CVWL368.lib(hal_i2c_master.o) + 0x00018878 0x00018878 0x0000000c Code RO 764 i.hal_i2c_m_transfer_complate CVWL368.lib(hal_i2c_master.o) + 0x00018884 0x00018884 0x00000020 Code RO 765 i.hal_i2c_master_irq_callback CVWL368.lib(hal_i2c_master.o) + 0x000188a4 0x000188a4 0x00000010 Code RO 779 i.hal_i2c_s_dma_user_callback CVWL368.lib(hal_i2c_slave.o) + 0x000188b4 0x000188b4 0x0000004c Code RO 780 i.hal_i2c_s_dma_write CVWL368.lib(hal_i2c_slave.o) + 0x00018900 0x00018900 0x000000c8 Code RO 782 i.hal_i2c_s_init CVWL368.lib(hal_i2c_slave.o) + 0x000189c8 0x000189c8 0x00000014 Code RO 783 i.hal_i2c_s_nonblocking_read CVWL368.lib(hal_i2c_slave.o) + 0x000189dc 0x000189dc 0x0000000c Code RO 791 i.hal_i2c_s_set_transfer CVWL368.lib(hal_i2c_slave.o) + 0x000189e8 0x000189e8 0x00000174 Code RO 794 i.hal_i2c_slave_irq_callback CVWL368.lib(hal_i2c_slave.o) + 0x00018b5c 0x00018b5c 0x000000fc Code RO 1707 i.hal_internal_init_memc CVWL368.lib(hal_internal_vsync.o) + 0x00018c58 0x00018c58 0x00000010 Code RO 1709 i.hal_internal_sync_get_fb_setting CVWL368.lib(hal_internal_vsync.o) + 0x00018c68 0x00018c68 0x00000010 Code RO 1710 i.hal_internal_sync_get_hight_performan_mode CVWL368.lib(hal_internal_vsync.o) + 0x00018c78 0x00018c78 0x000001d4 Code RO 1712 i.hal_internal_sync_input_resolution_change_ex CVWL368.lib(hal_internal_vsync.o) + 0x00018e4c 0x00018e4c 0x00000028 Code RO 1714 i.hal_internal_vsync_deinit CVWL368.lib(hal_internal_vsync.o) + 0x00018e74 0x00018e74 0x0000000c Code RO 1715 i.hal_internal_vsync_get_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018e80 0x00018e80 0x00000018 Code RO 1716 i.hal_internal_vsync_get_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00018e98 0x00018e98 0x0000000c Code RO 1717 i.hal_internal_vsync_get_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x00018ea4 0x00018ea4 0x0000000c Code RO 1718 i.hal_internal_vsync_get_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018eb0 0x00018eb0 0x00000118 Code RO 1719 i.hal_internal_vsync_init_rx CVWL368.lib(hal_internal_vsync.o) + 0x00018fc8 0x00018fc8 0x000000b0 Code RO 1720 i.hal_internal_vsync_init_tx CVWL368.lib(hal_internal_vsync.o) + 0x00019078 0x00019078 0x0000011c Code RO 1721 i.hal_internal_vsync_set_auto_hw_filter CVWL368.lib(hal_internal_vsync.o) + 0x00019194 0x00019194 0x00000014 Code RO 1723 i.hal_internal_vsync_set_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x000191a8 0x000191a8 0x00000024 Code RO 1724 i.hal_internal_vsync_set_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x000191cc 0x000191cc 0x00000050 Code RO 1725 i.hal_internal_vsync_set_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x0001921c 0x0001921c 0x00000080 Code RO 1726 i.hal_internal_vsync_set_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x0001929c 0x0001929c 0x00000024 Code RO 657 i.hal_lcdc_config_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000192c0 0x000192c0 0x00000058 Code RO 658 i.hal_lcdc_config_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019318 0x00019318 0x00000014 Code RO 659 i.hal_lcdc_config_rgb_to_pentile CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001932c 0x0001932c 0x00000164 Code RO 660 i.hal_lcdc_config_upscaler CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019490 0x00019490 0x00000054 Code RO 661 i.hal_lcdc_init_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000194e4 0x000194e4 0x00000190 Code RO 662 i.hal_lcdc_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019674 0x00019674 0x00000040 Code RO 663 i.hal_lcdc_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000196b4 0x000196b4 0x0000000e Code RO 872 i.hal_spi_m_clear_rxfifo CVWL368.lib(hal_spi_master.o) + 0x000196c2 0x000196c2 0x00000012 Code RO 896 i.hal_swire_deinit CVWL368.lib(hal_swire.o) + 0x000196d4 0x000196d4 0x00000016 Code RO 898 i.hal_swire_open CVWL368.lib(hal_swire.o) + 0x000196ea 0x000196ea 0x00000008 Code RO 913 i.hal_system_enable_systick CVWL368.lib(hal_system.o) + 0x000196f2 0x000196f2 0x00000002 PAD + 0x000196f4 0x000196f4 0x00000088 Code RO 919 i.hal_system_init CVWL368.lib(hal_system.o) + 0x0001977c 0x0001977c 0x0000001c Code RO 920 i.hal_system_init_console CVWL368.lib(hal_system.o) + 0x00019798 0x00019798 0x00000008 Code RO 923 i.hal_system_set_phy_calibration CVWL368.lib(hal_system.o) + 0x000197a0 0x000197a0 0x00000008 Code RO 924 i.hal_system_set_pvd CVWL368.lib(hal_system.o) + 0x000197a8 0x000197a8 0x00000008 Code RO 925 i.hal_system_set_vcc CVWL368.lib(hal_system.o) + 0x000197b0 0x000197b0 0x0000002e Code RO 950 i.hal_timer_deinit CVWL368.lib(hal_timer.o) + 0x000197de 0x000197de 0x0000001a Code RO 952 i.hal_timer_init CVWL368.lib(hal_timer.o) + 0x000197f8 0x000197f8 0x00000048 Code RO 954 i.hal_timer_start CVWL368.lib(hal_timer.o) + 0x00019840 0x00019840 0x00000028 Code RO 956 i.hal_timer_stop CVWL368.lib(hal_timer.o) + 0x00019868 0x00019868 0x0000008c Code RO 989 i.hal_uart_init CVWL368.lib(hal_uart.o) + 0x000198f4 0x000198f4 0x00000010 Code RO 992 i.hal_uart_transmit_blocking CVWL368.lib(hal_uart.o) + 0x00019904 0x00019904 0x000001dc Code RO 1728 i.hal_vsync_reset_lcdc_scaler CVWL368.lib(hal_internal_vsync.o) + 0x00019ae0 0x00019ae0 0x00000110 Code RO 2260 i.handle_init CVWL368.lib(irq_redirect .o) + 0x00019bf0 0x00019bf0 0x00000060 Code RO 113 i.init_mipi_tx ap_demo.o + 0x00019c50 0x00019c50 0x00000154 Code RO 114 i.init_panel ap_demo.o + 0x00019da4 0x00019da4 0x0000000a Code RO 3 i.main main.o + 0x00019dae 0x00019dae 0x00000002 PAD + 0x00019db0 0x00019db0 0x00000098 Code RO 115 i.open_mipi_rx ap_demo.o + 0x00019e48 0x00019e48 0x00000038 Code RO 116 i.pps_update_handle ap_demo.o + 0x00019e80 0x00019e80 0x000003f4 Code RO 1729 i.rx_get_dcs_packet_data CVWL368.lib(hal_internal_vsync.o) + 0x0001a274 0x0001a274 0x00000178 Code RO 1730 i.rx_partial_update CVWL368.lib(hal_internal_vsync.o) + 0x0001a3ec 0x0001a3ec 0x0000008c Code RO 1731 i.rx_receive_packet CVWL368.lib(hal_internal_vsync.o) + 0x0001a478 0x0001a478 0x00000180 Code RO 1732 i.rx_receive_pps CVWL368.lib(hal_internal_vsync.o) + 0x0001a5f8 0x0001a5f8 0x000000a4 Code RO 1733 i.rxbr_irq0_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a69c 0x0001a69c 0x000001b4 Code RO 1734 i.rxbr_irq1_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a850 0x0001a850 0x000000c4 Code RO 1735 i.soft_gen_te CVWL368.lib(hal_internal_vsync.o) + 0x0001a914 0x0001a914 0x000000c0 Code RO 1736 i.soft_gen_te_double_buffer CVWL368.lib(hal_internal_vsync.o) + 0x0001a9d4 0x0001a9d4 0x00000030 Code RO 117 i.soft_timer3_cb ap_demo.o + 0x0001aa04 0x0001aa04 0x00000048 Code RO 2587 i.sqrt m_ps.l(sqrt.o) + 0x0001aa4c 0x0001aa4c 0x00000108 Code RO 1737 i.vidc_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001ab54 0x0001ab54 0x000000d0 Code RO 1738 i.vpre_err_reset CVWL368.lib(hal_internal_vsync.o) + 0x0001ac24 0x0001ac24 0x000001cc Code RO 1739 i.vsync_set_te_mode CVWL368.lib(hal_internal_vsync.o) + 0x0001adf0 0x0001adf0 0x00002755 Data RO 119 .constdata ap_demo.o + 0x0001d545 0x0001d545 0x00002066 Data RO 410 .constdata app_tp_for_custom_s8.o + 0x0001f5ab 0x0001f5ab 0x00000001 Data RO 423 .constdata app_tp_for_custom_s8.o + 0x0001f5ac 0x0001f5ac 0x00000024 Data RO 665 .constdata CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001f5d0 0x0001f5d0 0x000000d2 Data RO 737 .constdata CVWL368.lib(hal_gpio.o) + 0x0001f6a2 0x0001f6a2 0x00000002 PAD + 0x0001f6a4 0x0001f6a4 0x00000020 Data RO 795 .constdata CVWL368.lib(hal_i2c_slave.o) + 0x0001f6c4 0x0001f6c4 0x00000008 Data RO 1489 .constdata CVWL368.lib(drv_param_init.o) + 0x0001f6cc 0x0001f6cc 0x00000186 Data RO 2332 .constdata CVWL368.lib(drv_phy_common.o) + 0x0001f852 0x0001f852 0x00000002 PAD + 0x0001f854 0x0001f854 0x00000048 Data RO 565 .conststring CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001f89c 0x0001f89c 0x00000043 Data RO 666 .conststring CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001f8df 0x0001f8df 0x00000001 PAD + 0x0001f8e0 0x0001f8e0 0x000000e0 Data RO 1741 .conststring CVWL368.lib(hal_internal_vsync.o) + 0x0001f9c0 0x0001f9c0 0x00000030 Data RO 2949 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001f9f0, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001f9f0, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2261 .ARM.__AT_0x00070100 CVWL368.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001f9f0, Size: 0x00003900, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x0000054c]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x0000022c Data RW 120 .data ap_demo.o + 0x000703fc COMPRESSED 0x0000002e Data RW 281 .data app_tp_transfer.o + 0x0007042a COMPRESSED 0x000000e4 Data RW 424 .data app_tp_for_custom_s8.o + 0x0007050e COMPRESSED 0x00000001 Data RW 427 .data app_tp_for_custom_s8.o + 0x0007050f COMPRESSED 0x00000001 Data RW 428 .data app_tp_for_custom_s8.o + 0x00070510 COMPRESSED 0x00000001 Data RW 433 .data app_tp_for_custom_s8.o + 0x00070511 COMPRESSED 0x00000003 Data RW 434 .data app_tp_for_custom_s8.o + 0x00070514 COMPRESSED 0x00000005 Data RW 435 .data app_tp_for_custom_s8.o + 0x00070519 COMPRESSED 0x00000003 PAD + 0x0007051c COMPRESSED 0x00000030 Data RW 445 .data app_tp_for_custom_s8.o + 0x0007054c COMPRESSED 0x00000008 Data RW 566 .data CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00070554 COMPRESSED 0x00000003 Data RW 667 .data CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00070557 COMPRESSED 0x00000001 Data RW 766 .data CVWL368.lib(hal_i2c_master.o) + 0x00070558 COMPRESSED 0x00000020 Data RW 796 .data CVWL368.lib(hal_i2c_slave.o) + 0x00070578 COMPRESSED 0x00000012 Data RW 1046 .data CVWL368.lib(norflash.o) + 0x0007058a COMPRESSED 0x00000002 PAD + 0x0007058c COMPRESSED 0x0000000c Data RW 1100 .data CVWL368.lib(drv_common.o) + 0x00070598 COMPRESSED 0x00000004 Data RW 1367 .data CVWL368.lib(drv_gpio.o) + 0x0007059c COMPRESSED 0x00000008 Data RW 1405 .data CVWL368.lib(drv_i2c_dma.o) + 0x000705a4 COMPRESSED 0x00000004 Data RW 1434 .data CVWL368.lib(drv_i2c_master.o) + 0x000705a8 COMPRESSED 0x00000004 Data RW 1465 .data CVWL368.lib(drv_i2c_slave.o) + 0x000705ac COMPRESSED 0x000004a4 Data RW 1490 .data CVWL368.lib(drv_param_init.o) + 0x00070a50 COMPRESSED 0x0000000c Data RW 1520 .data CVWL368.lib(drv_pwm.o) + 0x00070a5c COMPRESSED 0x00000004 Data RW 1596 .data CVWL368.lib(drv_spi_master.o) + 0x00070a60 COMPRESSED 0x00000008 Data RW 1622 .data CVWL368.lib(drv_swire.o) + 0x00070a68 COMPRESSED 0x00000001 Data RW 1647 .data CVWL368.lib(drv_sys_cfg.o) + 0x00070a69 COMPRESSED 0x00000003 PAD + 0x00070a6c COMPRESSED 0x00000050 Data RW 1680 .data CVWL368.lib(drv_timer.o) + 0x00070abc COMPRESSED 0x0000000c Data RW 1742 .data CVWL368.lib(hal_internal_vsync.o) + 0x00070ac8 COMPRESSED 0x00000008 Data RW 2113 .data CVWL368.lib(drv_rxbr.o) + 0x00070ad0 COMPRESSED 0x00000004 Data RW 2186 .data CVWL368.lib(drv_vidc.o) + 0x00070ad4 COMPRESSED 0x00000001 Data RW 2333 .data CVWL368.lib(drv_phy_common.o) + 0x00070ad5 COMPRESSED 0x00000003 PAD + 0x00070ad8 COMPRESSED 0x0000000c Data RW 2353 .data CVWL368.lib(drv_chip_info.o) + 0x00070ae4 COMPRESSED 0x00000008 Data RW 2502 .data CVWL368.lib(drv_uart.o) + 0x00070aec COMPRESSED 0x0000000c Data RW 2569 .data CVWL368.lib(drv_wdg.o) + 0x00070af8 COMPRESSED 0x00000004 Data RW 2918 .data mc_p.l(stdout.o) + 0x00070afc COMPRESSED 0x00000004 Data RW 2930 .data mc_p.l(errno.o) + 0x00070b00 - 0x00000190 Zero RW 280 .bss app_tp_transfer.o + 0x00070c90 - 0x000000c4 Zero RW 564 .bss CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00070d54 - 0x0000004c Zero RW 664 .bss CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00070da0 - 0x00000100 Zero RW 979 .bss CVWL368.lib(tau_log.o) + 0x00070ea0 - 0x000000d0 Zero RW 994 .bss CVWL368.lib(hal_uart.o) + 0x00070f70 - 0x0000001c Zero RW 1229 .bss CVWL368.lib(drv_dma.o) + 0x00070f8c - 0x00000040 Zero RW 1366 .bss CVWL368.lib(drv_gpio.o) + 0x00070fcc - 0x00000140 Zero RW 1404 .bss CVWL368.lib(drv_i2c_dma.o) + 0x0007110c - 0x00000970 Zero RW 1740 .bss CVWL368.lib(hal_internal_vsync.o) + 0x00071a7c - 0x00001030 Zero RW 1790 .bss CVWL368.lib(dcs_packet_fifo.o) + 0x00072aac - 0x00000020 Zero RW 2397 .bss CVWL368.lib(hal_spi_slave.o) + 0x00072acc COMPRESSED 0x00000004 PAD + 0x00072ad0 - 0x00001000 Zero RW 512 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 4582 240 10069 556 0 32993 ap_demo.o + 1544 58 8295 287 0 13840 app_tp_for_custom_s8.o + 1128 106 0 46 400 12040 app_tp_transfer.o + 36 6 0 0 0 445 board.o + 10 0 0 0 0 9519 main.o + 120 18 192 0 4096 2032 startup_armcm0.o + + ---------------------------------------------------------------------- + 7428 428 18604 892 4496 70869 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 8 0 0 3 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 296 96 0 12 0 256 drv_chip_info.o + 192 82 24 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 410 28 0 0 28 796 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1644 494 0 0 0 1336 drv_dsi_rx.o + 1532 118 0 0 0 2488 drv_dsi_tx.o + 118 0 0 0 0 256 drv_efuse.o + 10 0 0 0 0 60 drv_fls.o + 796 112 0 4 64 1236 drv_gpio.o + 584 82 0 8 320 624 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 292 36 0 4 0 580 drv_i2c_slave.o + 704 6 0 0 0 1504 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 212 44 8 1188 0 452 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 72 10 0 12 0 76 drv_pwm.o + 112 24 0 0 0 180 drv_pwr.o + 722 84 0 8 0 1456 drv_rxbr.o + 104 24 0 4 0 188 drv_spi_master.o + 172 20 0 8 0 260 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 374 34 0 80 0 932 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 168 22 0 12 0 316 drv_wdg.o + 3198 318 72 8 196 1680 hal_dsi_rx_ctrl.o + 4452 308 103 3 76 2492 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 696 72 32 32 0 408 hal_i2c_slave.o + 7862 1614 224 12 2416 2556 hal_internal_vsync.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 40 0 0 0 0 136 hal_swire.o + 196 32 0 0 0 408 hal_system.o + 184 6 0 0 0 276 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 86 0 0 0 0 0 __dczerorl2.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 36884 4758 1068 1460 7936 35048 Library Totals + 52 0 5 8 4 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 31452 4552 1063 1444 7932 31772 CVWL368.lib + 272 26 0 0 0 152 m_ps.l + 2838 126 0 8 0 1264 mc_p.l + 2270 54 0 0 0 1860 mf_p.l + + ---------------------------------------------------------------------- + 36884 4758 1068 1460 7936 35048 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 44312 5186 19672 2352 12432 81917 Grand Totals + 44312 5186 19672 1356 12432 81917 ELF Image Totals (compressed) + 44312 5186 19672 1356 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 63984 ( 62.48kB) + Total RW Size (RW Data + ZI Data) 14784 ( 14.44kB) + Total ROM Size (Code + RO Data + RW Data) 65340 ( 63.81kB) + +============================================================================== + diff --git a/project/ISP_368/Listings/WL368_S10LITE_CSOT667.map b/project/ISP_368/Listings/WL368_S10LITE_CSOT667.map new file mode 100644 index 0000000..6a0ceca --- /dev/null +++ b/project/ISP_368/Listings/WL368_S10LITE_CSOT667.map @@ -0,0 +1,5505 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.PWM_OUTPUT_TEST) refers to ap_demo.o(i.test_pwm_out_adjust) for test_pwm_out_adjust + ap_demo.o(i.PWM_OUTPUT_TEST) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.PWM_Task) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.PWM_Task) refers to app_tp_for_custom_s8.o(.data) for Flag_blacklight_EN + ap_demo.o(i.PWM_Task) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) for ap_get_tp_calibration_status_01 + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tx_display_on) for tx_display_on + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) for ap_tp_st_touch_scan_point_record_event_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + ap_demo.o(i.ap_demo) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_53) refers to app_tp_for_custom_s8.o(.data) for fingerprint_flag + ap_demo.o(i.ap_get_reg_53) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_get_reg_7A) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight_51) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.ap_set_backlight_51) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_backlight_51) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_tp_calibration_04) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_update_frame_rate) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) for hal_dsi_rx_ctrl_set_tear_mode_ex + ap_demo.o(i.ap_update_frame_rate) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to ap_demo.o(i.tx_panel_reset) for tx_panel_reset + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.init_panel) refers to ap_demo.o(i.send_panel_init_code) for send_panel_init_code + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) for hal_dsi_tx_ctrl_read_cmd + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.init_panel) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) for hal_dsi_rx_ctrl_set_cus_scld_filter + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) for hal_dsi_rx_ctrl_get_compressen_en + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) for hal_dsi_rx_ctrl_toggle_resolution_ex + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.send_panel_init_code) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.test_pwm_out_adjust) refers to uidiv.o(.text) for __aeabi_uidivmod + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_init) for hal_pwm_out_init + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_config_all) for hal_pwm_out_config_all + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_sync_all) for hal_pwm_out_sync_all + ap_demo.o(i.tx_display_on) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.tx_display_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.tx_display_on) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.tx_display_on) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.tx_display_on) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.tx_display_on) refers to ap_demo.o(.data) for .data + ap_demo.o(i.tx_panel_reset) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.tx_panel_reset) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight_51) for ap_set_backlight_51 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_53) for ap_get_reg_53 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_7A) for ap_get_reg_7A + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_tp_calibration_04) for ap_set_tp_calibration_04 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_init) for app_tp_screen_int_init + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_transfer_phone) for app_tp_transfer_phone + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.app_tp_screen_int_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_screen_int_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.app_tp_screen_int_lvl_low) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_screen_int_lvl_low) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.app_tp_m_transfer_complate) for app_tp_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_screen_int_lvl_low) for app_tp_screen_int_lvl_low + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) for ap_tp_st_touch_scan_point_record_event + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) for ap_tp_st_touch_error_handler_FF + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) for ap_tp_st_touch_error_handler_F3 + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for .data + app_tp_st_touch.o(i.CRC16_2) refers to app_tp_st_touch.o(.constdata) for .constdata + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to printfa.o(i.__0printf) for __2printf + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(i.CRC16_2) for CRC16_2 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) refers to app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) for ap_tp_st_touch_software_reset + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) refers to app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) for ap_tp_st_touch_software_reset + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to printfa.o(i.__0printf) for __2printf + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_calibration) for ap_tp_st_touch_calibration + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) for ap_tp_st_touch_get_calibration_success_mark + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(.data) for .data + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) for hal_internal_vsync_toggle_input_frame_rate + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) for hal_internal_sync_input_resolution_change_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_dsi_tx_ctrl.o(.conststring) for .conststring + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) for hal_internal_vsync_update_lcdc_addr + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te) refers to hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) for hal_internal_sync_cmd_mode_rcv_te + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) for hal_dsi_tx_ctrl_set_rect_pixel_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) for hal_dsi_tx_ctrl_draw_flicker + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) for hal_dsi_tx_ctrl_draw_chessboard + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_update_dpi_param) for hal_internal_update_dpi_param + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_config_intr) for drv_i2c_s_config_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c0_set_callback) for drv_i2c0_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_sel) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_pwm.o(i.hal_pwm_in_clear_int) refers to drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all) for drv_pwm_in_clear_pwm_int_all + hal_pwm.o(i.hal_pwm_in_config_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_in_ctrl_int) refers to drv_pwm.o(i.drv_pwm_in_set_sys_int) for drv_pwm_in_set_sys_int + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_get_current_count) refers to drv_pwm.o(i.drv_pwm_in_get_current_count) for drv_pwm_in_get_current_count + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_pwm.o(i.drv_pwm_in_get_high_period) for drv_pwm_in_get_high_period + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_pwm.o(i.drv_pwm_in_get_low_period) for drv_pwm_in_get_low_period + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_pwm.o(i.drv_pwm_in_get_counter_period) for drv_pwm_in_get_counter_period + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_in_init) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_register_callback) refers to drv_pwm.o(i.drv_pwm_in_register_callback) for drv_pwm_in_register_callback + hal_pwm.o(i.hal_pwm_in_set_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_config_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(i.hal_pwm_out_common_config) for hal_pwm_out_common_config + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_deinit) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sel_io) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_out_sync_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sync_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_common.o(.data) for g_system_clock + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_flash_power_down) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_power_down) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_system.o(i.hal_system_flash_read) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_dual_read) for norflash_dual_read + hal_system.o(i.hal_system_flash_release_power_down) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_release_power_down) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_erase_block) for norflash_erase_block + hal_system.o(i.hal_system_flash_write) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_write) for norflash_write + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c1_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c0_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_slave_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_update_dpi_param) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ceil.o(i.ceil) for ceil + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) for hal_internal_video_mode_auto_sync + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(i.PWM_OUTPUT_TEST), (44 bytes). + Removing ap_demo.o(i.PWM_Task), (108 bytes). + Removing ap_demo.o(i.test_pwm_out_adjust), (104 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_clear_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (5 bytes). + Removing app_tp_transfer.o(.data), (6 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (1 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_st_touch.o(.rev16_text), (4 bytes). + Removing app_tp_st_touch.o(.revsh_text), (4 bytes). + Removing app_tp_st_touch.o(i.CRC16_2), (64 bytes). + Removing app_tp_st_touch.o(i.ap_set_tp_calibration_04), (152 bytes). + Removing app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset), (196 bytes). + Removing app_tp_st_touch.o(.constdata), (32 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode), (100 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data), (268 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution), (32 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (148 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te), (10 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard), (280 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker), (172 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init), (30 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data), (272 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (80 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (32 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (40 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_sel), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (32 bytes). + Removing hal_pwm.o(.rev16_text), (4 bytes). + Removing hal_pwm.o(.revsh_text), (4 bytes). + Removing hal_pwm.o(i.hal_pwm_in_clear_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_config_int), (60 bytes). + Removing hal_pwm.o(i.hal_pwm_in_ctrl_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_deinit), (18 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_current_count), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_high_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_low_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_total_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_init), (26 bytes). + Removing hal_pwm.o(i.hal_pwm_in_register_callback), (10 bytes). + Removing hal_pwm.o(i.hal_pwm_in_set_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_common_config), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_config_all), (16 bytes). + Removing hal_pwm.o(i.hal_pwm_out_config_duty_ratio), (76 bytes). + Removing hal_pwm.o(i.hal_pwm_out_convert_time), (136 bytes). + Removing hal_pwm.o(i.hal_pwm_out_deinit), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_init), (12 bytes). + Removing hal_pwm.o(i.hal_pwm_out_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sel_io), (38 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_all), (16 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_ctl), (12 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_period), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_thr), (48 bytes). + Removing hal_pwm.o(.data), (1 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (108 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_flash_power_down), (20 bytes). + Removing hal_system.o(i.hal_system_flash_read), (52 bytes). + Removing hal_system.o(i.hal_system_flash_release_power_down), (20 bytes). + Removing hal_system.o(i.hal_system_flash_write), (60 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (56 bytes). + Removing app_tp_for_custom_s8.o(.bss), (200 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (2 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (4 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (11 bytes). + Removing app_tp_for_custom_s8.o(.data), (10 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (412 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_clocks), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (24 bytes). + Removing drv_dma.o(i.drv_dma_enable_cycle), (44 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_clear_irq_status), (6 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (130 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (30 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (16 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (64 bytes). + Removing drv_pwm.o(i.drv_pwm_out_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_control), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_threshold), (12 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_set_frame_buff_pd), (28 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (108 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (60 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (220 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (88 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (72 bytes). + Removing drv_spi_dma.o(.bss), (480 bytes). + Removing drv_spi_dma.o(.data), (16 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (168 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change), (556 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate), (560 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr), (48 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (6 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_set_prefetch), (24 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (56 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (20 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing dflti.o(.text), (40 bytes). + +621 unused section(s) (total 27023 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/lz77c.c 0x00000000 Number 0 __dclz77c.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../fplib/microlib/fpsqrt.c 0x00000000 Number 0 dsqrt.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt_x.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + 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tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010df4 Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010e0c Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010e24 Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010e3c Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.S20_Start_init 0x00010e58 Section 0 app_tp_transfer.o(i.S20_Start_init) + i.SPIM_IRQn_Handler 0x00010f7c Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.SPIS_IRQn_Handler 0x00010f98 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.SWIRE_IRQn_Handler 0x00010fb4 Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00010fd0 Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00010fe8 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.UART_DisableDma 0x00011014 Section 0 drv_uart.o(i.UART_DisableDma) + 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app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + i.ap_reset_cb 0x000124b0 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x000124b1 Thumb Code 38 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight_51 0x000124e0 Section 0 ap_demo.o(i.ap_set_backlight_51) + ap_set_backlight_51 0x000124e1 Thumb Code 88 ap_demo.o(i.ap_set_backlight_51) + i.ap_set_display_off 0x0001253c Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x0001253d Thumb Code 30 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x00012580 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x00012581 Thumb Code 4 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x00012584 Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x00012585 Thumb Code 72 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x00012600 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x00012601 Thumb Code 20 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x00012644 Section 0 ap_demo.o(i.ap_set_tp_calibration_04) + ap_set_tp_calibration_04 0x00012645 Thumb Code 28 ap_demo.o(i.ap_set_tp_calibration_04) + i.ap_tp_st_touch_calibration 0x00012664 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + i.ap_tp_st_touch_error_handler_F3 0x00012714 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) + i.ap_tp_st_touch_error_handler_FF 0x0001272e Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) + i.ap_tp_st_touch_get_calibration_success_mark 0x00012750 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + i.ap_tp_st_touch_scan_point_init 0x000127f8 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + i.ap_tp_st_touch_scan_point_record_event 0x00012814 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) + i.ap_tp_st_touch_scan_point_record_event_exec 0x000128b0 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + i.ap_tp_st_touch_simulate_finger_release_event 0x00012900 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + i.ap_tp_st_touch_software_reset 0x00012934 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) + i.ap_update_frame_rate 0x000129e0 Section 0 ap_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x000129e1 Thumb Code 44 ap_demo.o(i.ap_update_frame_rate) + i.app_ADC_IRQn_Handler 0x00012a10 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x00012a2c Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x00012a50 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x00012a6c Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x00012a88 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x00012aa4 Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x00012ac0 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x00012adc Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x00012af8 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x00012b14 Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x00012b30 Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x00012b78 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x00012b90 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00012ba0 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00012d44 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00012dcc Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00013064 Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00013104 Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x0001314c Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x0001317c Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x0001337c Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x0001339c Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x000133b4 Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x000133be Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x000133c8 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x000133d2 Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x000133dc Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x000133e4 Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x00013400 Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x0001341c Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x00013454 Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x00013464 Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x00013494 Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x000134b8 Section 0 app_tp_st_touch.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x00013560 Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x00013561 Thumb Code 10 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x0001356c Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x000135b0 Section 0 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_transfer_complate 0x000135d0 Section 0 app_tp_transfer.o(i.app_tp_m_transfer_complate) + i.app_tp_m_write 0x000135d8 Section 0 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x000135e0 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_s_read 0x000139e8 Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x000139f0 Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x000139f8 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x00013da8 Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x00013dd8 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00013dd9 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_screen_int_init 0x00013de4 Section 0 app_tp_transfer.o(i.app_tp_screen_int_init) + app_tp_screen_int_init 0x00013de5 Thumb Code 48 app_tp_transfer.o(i.app_tp_screen_int_init) + i.app_tp_screen_int_lvl_low 0x00013e1c Section 0 app_tp_transfer.o(i.app_tp_screen_int_lvl_low) + app_tp_screen_int_lvl_low 0x00013e1d Thumb Code 22 app_tp_transfer.o(i.app_tp_screen_int_lvl_low) + i.app_tp_transfer_phone 0x00013e38 Section 0 app_tp_transfer.o(i.app_tp_transfer_phone) + app_tp_transfer_phone 0x00013e39 Thumb Code 44 app_tp_transfer.o(i.app_tp_transfer_phone) + i.app_tp_transfer_screen_const 0x00013e68 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00013e69 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00013ea8 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x00013fcc Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.board_Init 0x00013fe0 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x00014004 Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x000144f4 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x000145bc Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x000145bd Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x000145e8 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x000145e9 Thumb Code 90 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x0001467c Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x000146d4 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x000146ec Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x00014730 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x00014754 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x00014755 Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x00014770 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x00014788 Section 0 tau_delay.o(i.delayUs) + i.drv_ap_rst_trig_edge_detect 0x000147ac Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x000147e4 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x000147f0 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x00014830 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x000148e0 Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x000148f4 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x0001494c Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x00014954 Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x00014964 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x00014978 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x0001498c Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x000149ac Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x000149c0 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x000149d8 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x000149ec Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x00014a00 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x00014a14 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x00014a28 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x00014a3c Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x00014a50 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x00014a64 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x00014a78 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x00014a8c Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x00014aa4 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x00014abc Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x00014ad0 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x00014ae4 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x00014af8 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x00014b10 Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x00014b2c Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x00014b3c Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00014b4c Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x00014b70 Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00014b7c Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x00014c0c Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x00014c1e Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x00014c38 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x00014c40 Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00014c84 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x00014cba Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00014cc8 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00014d3c Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00014d46 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00014d70 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00014e74 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00014eb4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00014eb5 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00014f04 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00014f05 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00014f20 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00014f28 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00014f2e Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00014f3c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00014f5c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00014f6c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00014f70 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00014f80 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00014fc6 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00014fec Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x000150f0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_get_payload 0x000150fe Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) + i.drv_dsi_tx_command_header 0x00015102 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00015116 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00015182 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x00015186 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x0001519e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x000151a6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x000151ae Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x000151b8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x000151dc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x000151e0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x000151e4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x000151e8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x00015200 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x0001521a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00015226 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x0001528a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x000152c8 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x000153fc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x0001541a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00015422 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x0001543e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x00015456 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x00015464 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x000154a4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x000154b4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x000154bc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x000154de Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x000154e6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x0001550c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x000155b6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x000155cc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x000155e4 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x00015612 Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x0001561e Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x00015650 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x00015668 Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x00015680 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x0001568c Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x000156a0 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x000156f0 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x00015710 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x00015720 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x00015730 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x00015740 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00015750 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00015751 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x00015770 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c0_set_callback 0x000158a0 Section 0 drv_i2c_slave.o(i.drv_i2c0_set_callback) + i.drv_i2c1_set_callback 0x000158ac Section 0 drv_i2c_master.o(i.drv_i2c1_set_callback) + i.drv_i2c_dma_callback 0x000158b8 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x000158b9 Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x000158ec Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x00015998 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x000159b2 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x000159cc Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x00015a2c Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x00015a3c Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_master_init 0x00015a74 Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x00015b00 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x00015b5c Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x00015b98 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x00015b99 Thumb Code 62 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x00015bd6 Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_config_intr 0x00015c18 Section 0 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + i.drv_i2c_s_enable 0x00015c1c Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable) + i.drv_i2c_s_get_fifo_status 0x00015c24 Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_intr 0x00015c38 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + i.drv_i2c_s_write_data 0x00015c88 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x00015ca4 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x00015cfc Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x00015d30 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x00015d48 Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x00015d60 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x00015d90 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x00015da6 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00015dca Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x00015df0 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x00015e06 Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x00015e1c Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x00015e28 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00015e46 Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00015e68 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00015e8a Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x00015e96 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00015eb0 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x00015ed2 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00015eec Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x00015ef8 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00015f44 Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00015f4a Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00015f5c Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00015f7c Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_video_hw_mode 0x00015fbc Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00015fd0 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x00015ff0 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00015ffc Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x0001603c Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00016048 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x0001605a Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x0001606a Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00016078 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x0001608c Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00016098 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x000160a8 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x000160ba Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x000160ca Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x000160e0 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x000160f8 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x00016112 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00016120 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00016148 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x00016158 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x00016160 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x00016174 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x00016188 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x00016190 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_init_set_scld_filter 0x000161a4 Section 0 drv_param_init.o(i.drv_param_init_set_scld_filter) + i.drv_param_p2r_filter_init 0x00016208 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x0001622c Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x0001623c Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x00016278 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x000162d8 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x0001632c Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x0001633c Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x00016354 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x00016374 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x0001639a Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x000163b8 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x000163b9 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x000163d8 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x000163f8 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x00016410 Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x00016448 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x00016449 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x00016454 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x00016455 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x00016464 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x00016465 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x00016478 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x00016479 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x0001648e Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00016498 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x0001649c Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x000164f8 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x0001650c Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x00016570 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x00016574 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00016575 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x00016586 Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x0001658a Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x0001658b Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x0001659c Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x000165a8 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x000165b0 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x000165bc Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x000165c8 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x000165dc Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x000166a8 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x000166bc Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x000166d0 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x000166e0 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x00016706 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x0001670e Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x00016718 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_enable 0x00016738 Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_set_int 0x00016754 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x000167a8 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x000167c4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x000167d0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x000167f8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x00016810 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x0001682c Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x00016850 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x00016874 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x00016884 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x00016894 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x000168b8 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x000168b9 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x000168d2 Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x000168f4 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x00016904 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x00016914 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x00016915 Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x00016958 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x0001696c Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x0001697c Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x000169d0 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x000169f8 Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_clear 0x00016a08 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x00016a09 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x00016a12 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x00016a2e Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x00016a4a Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x00016a4b Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x00016a5c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x00016a5d Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x00016a70 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x00016a71 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00016a80 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00016a88 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00016aa0 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x00016ae0 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x00016af4 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x00016b1c Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x00016b28 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x00016b2e Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x00016b6a Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00016b7e Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x00016b8e Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x00016b96 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x00016bbc Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x00016be4 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x00016bfc Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x00016c06 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x00016c16 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00016c20 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x00016c2a Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00016c3c Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00016c46 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00016c50 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x00016c68 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00016c78 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00016c79 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00016c88 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00016c89 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00016c98 Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x00016cd8 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x00016ce2 Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x00016cf8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x00016d2c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00016dc8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016e4c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_compressen_en 0x00016e74 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00016e84 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00016eac Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00016f0c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00016f0d Thumb Code 332 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x000170b0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x000170b1 Thumb Code 184 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00017188 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00017189 Thumb Code 334 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x000172e0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x000172e1 Thumb Code 312 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x00017428 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x00017429 Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00017654 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_scld_filter 0x00017744 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x000177b0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x000177e4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x000177e5 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x0001781c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x0001781d Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017890 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_set_tear_mode_ex 0x000178c4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + i.hal_dsi_rx_ctrl_start 0x000178d4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x00017910 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution_ex 0x0001794c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) + i.hal_dsi_tx_calc_video_chunks 0x0001796c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x0001796d Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x00017afc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x00017afd Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x00017b30 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x00017b31 Thumb Code 1022 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x00017f80 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00017fac Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018030 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x0001807c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x000180a4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00018148 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00018149 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x0001816c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_read_cmd 0x00018178 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) + i.hal_dsi_tx_ctrl_set_ccm 0x00018204 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018224 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x00018238 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x00018248 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x0001826c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00018308 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x0001834c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00018424 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x000184d4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x000184d5 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x00018518 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x00018519 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x00018548 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x00018549 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x00018568 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00018569 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x00018588 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x00018589 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x0001861c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x0001861d Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x00018674 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x00018675 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x000186b8 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x000186d0 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x000186e4 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x00018724 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x00018744 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x0001876c Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x00018784 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x000187d4 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x00018834 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x0001883c Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x0001885c Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x000188c8 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x000188e8 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x00018904 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x00018910 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x00018911 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x00018930 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x00018931 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x00018940 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x0001898c Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x00018a54 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x00018a68 Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x00018a74 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x00018a75 Thumb Code 354 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x00018be8 Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x00018ce4 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_get_hight_performan_mode 0x00018cf4 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change_ex 0x00018d04 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) + i.hal_internal_update_dpi_param 0x00018ed8 Section 0 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + i.hal_internal_video_mode_auto_sync 0x00018ee8 Section 0 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + i.hal_internal_vsync_deinit 0x00018ff4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x0001901c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00019028 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tear_mode 0x00019040 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + i.hal_internal_vsync_get_tx_state 0x0001904c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00019058 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00019170 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x00019220 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x0001933c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x00019350 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x00019374 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x000193c4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x00019444 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x00019445 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x00019468 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x00019469 Thumb Code 84 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x000194c0 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x000194c1 Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x000194d4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x000194d5 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x00019638 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x00019639 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x00019678 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x00019679 Thumb Code 422 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x00019828 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x00019829 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_m_clear_rxfifo 0x00019868 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_deinit 0x00019876 Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_open 0x00019888 Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x0001989e Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x000198a8 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x00019930 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x0001994c Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x00019954 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x0001995c Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_deinit 0x00019964 Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x00019992 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x000199ac Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x000199f4 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x00019a1c Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x00019aa8 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.hal_vsync_reset_lcdc_scaler 0x00019ab8 Section 0 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + hal_vsync_reset_lcdc_scaler 0x00019ab9 Thumb Code 460 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + i.handle_init 0x00019c94 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x00019da4 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x00019da5 Thumb Code 92 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x00019e04 Section 0 ap_demo.o(i.init_panel) + init_panel 0x00019e05 Thumb Code 146 ap_demo.o(i.init_panel) + i.main 0x00019ee4 Section 0 main.o(i.main) + i.open_mipi_rx 0x00019ef0 Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x00019ef1 Thumb Code 132 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x00019f8c Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x00019f8d Thumb Code 52 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x00019fc4 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x00019fc5 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x0001a3b8 Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x0001a3b9 Thumb Code 358 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001a530 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001a531 Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001a5bc Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001a5bd Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x0001a73c Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001a73d Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001a7e0 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001a7e1 Thumb Code 316 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.send_panel_init_code 0x0001a9b4 Section 0 ap_demo.o(i.send_panel_init_code) + send_panel_init_code 0x0001a9b5 Thumb Code 36 ap_demo.o(i.send_panel_init_code) + i.soft_gen_te 0x0001a9d8 Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001a9d9 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x0001aa9c Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x0001aa9d Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_timer3_cb 0x0001ab5c Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001ab5d Thumb Code 48 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001ab9c Section 0 sqrt.o(i.sqrt) + i.tx_display_on 0x0001abe4 Section 0 ap_demo.o(i.tx_display_on) + tx_display_on 0x0001abe5 Thumb Code 44 ap_demo.o(i.tx_display_on) + i.tx_panel_reset 0x0001ac44 Section 0 ap_demo.o(i.tx_panel_reset) + tx_panel_reset 0x0001ac45 Thumb Code 40 ap_demo.o(i.tx_panel_reset) + i.vidc_callback 0x0001ac6c Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001ac6d Thumb Code 232 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001ad74 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001ad75 Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001ae44 Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001ae45 Thumb Code 300 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001b010 Section 10582 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001b010 Data 132 ap_demo.o(.constdata) + .constdata 0x0001d968 Section 36 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001d98c Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001d98c Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001da04 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001da60 Section 32 hal_i2c_slave.o(.constdata) + sg_i2c_s_config 0x0001da60 Data 32 hal_i2c_slave.o(.constdata) + .constdata 0x0001da80 Section 4006 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001ea26 Section 1 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001ea28 Section 8 drv_param_init.o(.constdata) + .constdata 0x0001ea30 Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001ea30 Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001eae8 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001eb68 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001eb98 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001ebb8 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001ec00 Section 67 hal_dsi_tx_ctrl.o(.conststring) + .conststring 0x0001ec44 Section 224 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 552 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701d0 Data 1 ap_demo.o(.data) + g_calibration_flag 0x000701d1 Data 1 ap_demo.o(.data) + hbm_mode 0x000701d2 Data 1 ap_demo.o(.data) + hbm_mode_cnt 0x000701d3 Data 1 ap_demo.o(.data) + start_display_on 0x000701d4 Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701d5 Data 1 ap_demo.o(.data) + panel_display_done 0x000701d6 Data 1 ap_demo.o(.data) + R60_Parma_backup 0x000701d9 Data 1 ap_demo.o(.data) + read_bl_data 0x000701de Data 2 ap_demo.o(.data) + read_bl_data_bak 0x000701e0 Data 2 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701ec Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701f0 Data 4 ap_demo.o(.data) + value_reg_df 0x000701f4 Data 4 ap_demo.o(.data) + .data 0x000703f8 Section 23 app_tp_transfer.o(.data) + s_spim_write 0x000703f8 Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x000703f9 Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x000703fa Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x000703fb Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x000703fd Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x000703fe Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x000703ff Data 1 app_tp_transfer.o(.data) + .data 0x0007040f Section 40 app_tp_st_touch.o(.data) + s_calibration_flag 0x0007040f Data 1 app_tp_st_touch.o(.data) + s_calibration_correct_flag 0x00070410 Data 1 app_tp_st_touch.o(.data) + .data 0x00070438 Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00070438 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x0007043c Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00070440 Section 3 hal_dsi_tx_ctrl.o(.data) + g_tx_vcom_en 0x00070440 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_vpg_en 0x00070441 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x00070442 Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x00070443 Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x00070443 Data 1 hal_i2c_master.o(.data) + .data 0x00070444 Section 32 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00070444 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00070445 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x00070446 Data 1 hal_i2c_slave.o(.data) + sg_i2c_s_index 0x00070447 Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x00070448 Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x0007044c Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x00070450 Data 4 hal_i2c_slave.o(.data) + sg_tx_byte_num 0x00070454 Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x00070458 Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x0007045c Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00070460 Data 4 hal_i2c_slave.o(.data) + .data 0x00070464 Section 5766 app_tp_for_custom_s8.o(.data) + fingerprint_enable 0x0007046f Data 1 app_tp_for_custom_s8.o(.data) + app_tp_count 0x00070470 Data 1 app_tp_for_custom_s8.o(.data) + phone_85_flag 0x00070471 Data 1 app_tp_for_custom_s8.o(.data) + phone_E4_flag 0x00070472 Data 1 app_tp_for_custom_s8.o(.data) + phone_72_flag 0x00070473 Data 1 app_tp_for_custom_s8.o(.data) + phone_75_flag 0x00070474 Data 1 app_tp_for_custom_s8.o(.data) + phone_92_flag 0x00070475 Data 1 app_tp_for_custom_s8.o(.data) + phone_74_flag 0x00070476 Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x0007047a Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x0007047c Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x0007047e Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x00070480 Data 2 app_tp_for_custom_s8.o(.data) + .data 0x00071aea Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00071aeb Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00071aec Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00071aed Section 3 app_tp_for_custom_s8.o(.data) + .data 0x00071af0 Section 5 app_tp_for_custom_s8.o(.data) + .data 0x00071af5 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00071af8 Section 48 app_tp_for_custom_s8.o(.data) + .data 0x00071b28 Section 18 norflash.o(.data) + tmprg 0x00071b30 Data 4 norflash.o(.data) + .data 0x00071b3c Section 12 drv_common.o(.data) + s_my_tick 0x00071b3c Data 4 drv_common.o(.data) + .data 0x00071b48 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x00071b48 Data 4 drv_gpio.o(.data) + .data 0x00071b4c Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x00071b4c Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x00071b50 Data 4 drv_i2c_dma.o(.data) + .data 0x00071b54 Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x00071b54 Data 4 drv_i2c_master.o(.data) + .data 0x00071b58 Section 4 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x00071b58 Data 4 drv_i2c_slave.o(.data) + .data 0x00071b5c Section 1188 drv_param_init.o(.data) + .data 0x00072000 Section 12 drv_pwm.o(.data) + s_pwm_type 0x00072000 Data 1 drv_pwm.o(.data) + s_pwm_cb 0x00072004 Data 8 drv_pwm.o(.data) + .data 0x0007200c Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x0007200c Data 4 drv_spi_master.o(.data) + .data 0x00072010 Section 8 drv_swire.o(.data) + s_swire_cb 0x00072010 Data 8 drv_swire.o(.data) + .data 0x00072018 Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x00072018 Data 1 drv_sys_cfg.o(.data) + .data 0x0007201c Section 80 drv_timer.o(.data) + sg_timer_info 0x0007201c Data 80 drv_timer.o(.data) + .data 0x0007206c Section 12 hal_internal_vsync.o(.data) + sg_cmd_mode_tx_start 0x0007206c Data 1 hal_internal_vsync.o(.data) + sg_cur_te_info 0x00072070 Data 4 hal_internal_vsync.o(.data) + .data 0x00072078 Section 8 drv_rxbr.o(.data) + .data 0x00072080 Section 4 drv_vidc.o(.data) + .data 0x00072084 Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x00072084 Data 1 drv_phy_common.o(.data) + .data 0x00072088 Section 12 drv_chip_info.o(.data) + sg_chip_info 0x00072088 Data 4 drv_chip_info.o(.data) + sg_chip_function 0x0007208c Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x00072090 Data 4 drv_chip_info.o(.data) + .data 0x00072094 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x00072094 Data 4 drv_uart.o(.data) + uart_userData 0x00072098 Data 4 drv_uart.o(.data) + .data 0x0007209c Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x0007209c Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x000720a0 Data 8 drv_wdg.o(.data) + .data 0x000720a8 Section 4 stdout.o(.data) + .data 0x000720ac Section 4 errno.o(.data) + _errno 0x000720ac Data 4 errno.o(.data) + .bss 0x000720b0 Section 400 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x000720b0 Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x00072178 Data 200 app_tp_transfer.o(.bss) + .bss 0x00072240 Section 12 app_tp_st_touch.o(.bss) + .bss 0x0007224c Section 196 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x0007224c Data 196 hal_dsi_rx_ctrl.o(.bss) + .bss 0x00072310 Section 76 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x00072310 Data 76 hal_dsi_tx_ctrl.o(.bss) + .bss 0x0007235c Section 256 tau_log.o(.bss) + .bss 0x0007245c Section 654 app_tp_for_custom_s8.o(.bss) + .bss 0x000726ec Section 208 hal_uart.o(.bss) + .bss 0x000727bc Section 28 drv_dma.o(.bss) + s_dma_handle 0x000727bc Data 28 drv_dma.o(.bss) + .bss 0x000727d8 Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x000727d8 Data 64 drv_gpio.o(.bss) + .bss 0x00072818 Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x00072818 Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x000728b8 Data 160 drv_i2c_dma.o(.bss) + .bss 0x00072958 Section 2436 hal_internal_vsync.o(.bss) + g_imm_buffer 0x000731bc Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x000732bc Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x000732c8 Data 20 hal_internal_vsync.o(.bss) + .bss 0x000732dc Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x0007430c Section 32 hal_spi_slave.o(.bss) + STACK 0x00074330 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfrcmple 0x0001083d Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010851 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108b1 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108b1 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108d1 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108d1 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000108f3 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000108f3 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010919 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010919 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010929 Thumb Code 114 fepilogue.o(.text) + _double_round 0x0001099b Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109b5 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a59 Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010afd Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b3d Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b65 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b65 Thumb Code 0 init.o(.text) + __decompress 0x00010b89 Thumb Code 0 __dclz77c.o(.text) + __decompress2 0x00010b89 Thumb Code 96 __dclz77c.o(.text) + ADC_IRQn_Handler 0x00010be9 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010c01 Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010c19 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c2d Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c49 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010c65 Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010c81 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010c9d Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010cb9 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010cd5 Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010cf1 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + FLSCTRL_IRQn_Handler 0x00010d0d Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010d21 Thumb Code 78 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010d71 Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010d85 Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010d9d Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010db5 Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010dcd Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010df5 Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010e0d Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010e25 Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010e3d Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + S20_Start_init 0x00010e59 Thumb Code 270 app_tp_transfer.o(i.S20_Start_init) + SPIM_IRQn_Handler 0x00010f7d Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + SPIS_IRQn_Handler 0x00010f99 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + SWIRE_IRQn_Handler 0x00010fb5 Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00010fd1 Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00010fe9 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + UART_DisableDma 0x00011015 Thumb Code 2 drv_uart.o(i.UART_DisableDma) + __scatterload_null 0x00011017 Thumb Code 2 handlers.o(i.__scatterload_null) + s_debug_state 0x00011018 Data 4 drv_common.o(.ARM.__at_0x11018) + TIMER1_IRQn_Handler 0x0001101d Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00011035 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x0001104d Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x00011065 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + UART_GetInstance 0x00011081 Thumb Code 4 drv_uart.o(i.UART_GetInstance) + UART_IRQn_Handler 0x00011085 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x0001109d Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SetBaudRate 0x000110c1 Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x00011109 Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x00011123 Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x00011257 Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x00011271 Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x0001132d Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x00011345 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x0001135d Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x00011375 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x00011375 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x00011375 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x00011375 Thumb Code 0 printfa.o(i.__0printf) + printf 0x00011375 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x00011395 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x00011395 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x00011395 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x00011395 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x00011395 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x000113b9 Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x000113e7 Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_copy 0x000114ad Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x000114bb Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x000114c9 Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x00012171 Thumb Code 372 ap_demo.o(i.ap_demo) + ap_get_tp_calibration_status_01 0x00012481 Thumb Code 44 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + ap_tp_st_touch_calibration 0x00012665 Thumb Code 170 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + ap_tp_st_touch_error_handler_F3 0x00012715 Thumb Code 26 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) + ap_tp_st_touch_error_handler_FF 0x0001272f Thumb Code 32 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) + ap_tp_st_touch_get_calibration_success_mark 0x00012751 Thumb Code 152 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + ap_tp_st_touch_scan_point_init 0x000127f9 Thumb Code 24 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + ap_tp_st_touch_scan_point_record_event 0x00012815 Thumb Code 150 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) + ap_tp_st_touch_scan_point_record_event_exec 0x000128b1 Thumb Code 50 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + ap_tp_st_touch_simulate_finger_release_event 0x00012901 Thumb Code 44 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + ap_tp_st_touch_software_reset 0x00012935 Thumb Code 118 app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) + app_ADC_IRQn_Handler 0x00012a11 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x00012a2d Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x00012a51 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x00012a6d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x00012a89 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x00012aa5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x00012ac1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x00012add Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x00012af9 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00012b15 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x00012b31 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x00012b79 Thumb Code 14 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00012b91 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00012ba1 Thumb Code 208 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00012d45 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00012dcd Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00013065 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00013105 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x0001314d Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x0001317d Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x0001337d Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x0001339d Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x000133b5 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x000133bf Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x000133c9 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x000133d3 Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x000133dd Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x000133e5 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x00013401 Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x0001341d Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x00013455 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x00013465 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x00013495 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x000134b9 Thumb Code 78 app_tp_st_touch.o(i.app_tp_calibration_exec) + app_tp_init 0x0001356d Thumb Code 56 app_tp_transfer.o(i.app_tp_init) + app_tp_m_read 0x000135b1 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_transfer_complate 0x000135d1 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_transfer_complate) + app_tp_m_write 0x000135d9 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + app_tp_phone_analysis_data 0x000135e1 Thumb Code 968 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_s_read 0x000139e9 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x000139f1 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x000139f9 Thumb Code 922 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x00013da9 Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x00013ea9 Thumb Code 274 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x00013fcd Thumb Code 16 app_tp_transfer.o(i.app_tp_transfer_screen_start) + board_Init 0x00013fe1 Thumb Code 30 board.o(i.board_Init) + calc_framebuffer_setting 0x00014005 Thumb Code 1258 hal_internal_vsync.o(i.calc_framebuffer_setting) + ceil 0x000144f5 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x0001467d Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x000146d5 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x000146ed Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x00014731 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x00014771 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x00014789 Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x000147ad Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x000147e5 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x000147f1 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x00014831 Thumb Code 98 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x000148e1 Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x000148f5 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x0001494d Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x00014955 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x00014965 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x00014979 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x0001498d Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x000149ad Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x000149c1 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x000149d9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x000149ed Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x00014a01 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x00014a15 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x00014a29 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x00014a3d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x00014a51 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x00014a65 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x00014a79 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x00014a8d Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x00014aa5 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x00014abd Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x00014ad1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x00014ae5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x00014af9 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x00014b11 Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x00014b2d Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x00014b3d Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00014b4d Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x00014b71 Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00014b7d Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x00014c0d Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x00014c1f Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x00014c39 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x00014c41 Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00014c85 Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x00014cbb Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00014cc9 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00014d3d Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00014d47 Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x00014d71 Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00014e75 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00014f21 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00014f29 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00014f2f Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00014f3d Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00014f5d Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00014f6d Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00014f71 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00014f81 Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00014fc7 Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00014fed Thumb Code 256 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x000150f1 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_get_payload 0x000150ff Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) + drv_dsi_tx_command_header 0x00015103 Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00015117 Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00015183 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x00015187 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x0001519f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x000151a7 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x000151af Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x000151b9 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x000151dd Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x000151e1 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x000151e5 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x000151e9 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x00015201 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x0001521b Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00015227 Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x0001528b Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x000152c9 Thumb Code 308 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x000153fd Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x0001541b Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00015423 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x0001543f Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x00015457 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x00015465 Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x000154a5 Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x000154b5 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x000154bd Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x000154df Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x000154e7 Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x0001550d Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x000155b7 Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x000155cd Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x000155e5 Thumb Code 46 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x00015613 Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x0001561f Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x00015651 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x00015669 Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x00015681 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x0001568d Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x000156a1 Thumb Code 74 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x000156f1 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x00015711 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x00015721 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x00015731 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x00015741 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x00015771 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c0_set_callback 0x000158a1 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c0_set_callback) + drv_i2c1_set_callback 0x000158ad Thumb Code 6 drv_i2c_master.o(i.drv_i2c1_set_callback) + drv_i2c_dma_init 0x000158ed Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x00015999 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x000159b3 Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x000159cd Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x00015a2d Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x00015a3d Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_master_init 0x00015a75 Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x00015b01 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x00015b5d Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x00015bd7 Thumb Code 66 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_config_intr 0x00015c19 Thumb Code 4 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + drv_i2c_s_enable 0x00015c1d Thumb Code 8 drv_i2c_slave.o(i.drv_i2c_s_enable) + drv_i2c_s_get_fifo_status 0x00015c25 Thumb Code 20 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_intr 0x00015c39 Thumb Code 74 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + drv_i2c_s_write_data 0x00015c89 Thumb Code 28 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x00015ca5 Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x00015cfd Thumb Code 50 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x00015d31 Thumb Code 20 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x00015d49 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x00015d61 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x00015d91 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x00015da7 Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00015dcb Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x00015df1 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x00015e07 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x00015e1d Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x00015e29 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00015e47 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00015e69 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00015e8b Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x00015e97 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00015eb1 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x00015ed3 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00015eed Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x00015ef9 Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00015f45 Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00015f4b Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00015f5d Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00015f7d Thumb Code 58 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_video_hw_mode 0x00015fbd Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00015fd1 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x00015ff1 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00015ffd Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x0001603d Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00016049 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x0001605b Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x0001606b Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00016079 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x0001608d Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00016099 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x000160a9 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x000160bb Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x000160cb Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x000160e1 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x000160f9 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x00016113 Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00016121 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00016149 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x00016159 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x00016161 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x00016175 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x00016189 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x00016191 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_init_set_scld_filter 0x000161a5 Thumb Code 92 drv_param_init.o(i.drv_param_init_set_scld_filter) + drv_param_p2r_filter_init 0x00016209 Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x0001622d Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x0001623d Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x00016279 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x000162d9 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x0001632d Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x0001633d Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x00016355 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x00016375 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x0001639b Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x000163d9 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x000163f9 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x00016411 Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x0001648f Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00016499 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x0001649d Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x000164f9 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x0001650d Thumb Code 66 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x00016571 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x00016587 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x0001659d Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x000165a9 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x000165b1 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x000165bd Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x000165c9 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x000165dd Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x000166a9 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x000166bd Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x000166d1 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x000166e1 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x00016707 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x0001670f Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x00016719 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_enable 0x00016739 Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_set_int 0x00016755 Thumb Code 76 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x000167a9 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x000167c5 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x000167d1 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x000167f9 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x00016811 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x0001682d Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x00016851 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x00016875 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x00016885 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x00016895 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x000168d3 Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x000168f5 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x00016905 Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x00016959 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x0001696d Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x0001697d Thumb Code 80 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x000169d1 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x000169f9 Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x00016a13 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x00016a2f Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00016a81 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00016a89 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00016aa1 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x00016ae1 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x00016af5 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x00016b1d Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x00016b29 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x00016b2f Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x00016b6b Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00016b7f Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x00016b8f Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x00016b97 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x00016bbd Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x00016be5 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x00016bfd Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x00016c07 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x00016c17 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00016c21 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x00016c2b Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00016c3d Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00016c47 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00016c51 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x00016c69 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00016c99 Thumb Code 60 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x00016cd9 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x00016ce3 Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00016cf9 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x00016d2d Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00016dc9 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016e4d Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_compressen_en 0x00016e75 Thumb Code 10 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) + hal_dsi_rx_ctrl_get_max_ret_size 0x00016e85 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00016ead Thumb Code 88 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_send_ack_cmd 0x00017655 Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_scld_filter 0x00017745 Thumb Code 98 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) + hal_dsi_rx_ctrl_set_cus_sync_line 0x000177b1 Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017891 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_set_tear_mode_ex 0x000178c5 Thumb Code 14 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + hal_dsi_rx_ctrl_start 0x000178d5 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x00017911 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution_ex 0x0001794d Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) + hal_dsi_tx_ctrl_create_handle 0x00017f81 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00017fad Thumb Code 118 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x00018031 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x0001807d Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x000180a5 Thumb Code 154 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x0001816d Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_read_cmd 0x00018179 Thumb Code 134 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) + hal_dsi_tx_ctrl_set_ccm 0x00018205 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00018225 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x00018239 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x00018249 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x0001826d Thumb Code 140 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00018309 Thumb Code 56 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x0001834d Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00018425 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x000186b9 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x000186d1 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x000186e5 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x00018725 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x00018745 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x0001876d Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x00018785 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x000187d5 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x00018835 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x0001883d Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x0001885d Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x000188c9 Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x000188e9 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x00018905 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x00018941 Thumb Code 62 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x0001898d Thumb Code 176 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x00018a55 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x00018a69 Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x00018be9 Thumb Code 170 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x00018ce5 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_get_hight_performan_mode 0x00018cf5 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change_ex 0x00018d05 Thumb Code 362 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) + hal_internal_update_dpi_param 0x00018ed9 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + hal_internal_video_mode_auto_sync 0x00018ee9 Thumb Code 238 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + hal_internal_vsync_deinit 0x00018ff5 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x0001901d Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00019029 Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tear_mode 0x00019041 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + hal_internal_vsync_get_tx_state 0x0001904d Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00019059 Thumb Code 236 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00019171 Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x00019221 Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x0001933d Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x00019351 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x00019375 Thumb Code 72 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x000193c5 Thumb Code 118 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_spi_m_clear_rxfifo 0x00019869 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_deinit 0x00019877 Thumb Code 18 hal_swire.o(i.hal_swire_deinit) + hal_swire_open 0x00019889 Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x0001989f Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x000198a9 Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x00019931 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x0001994d Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x00019955 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x0001995d Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_deinit 0x00019965 Thumb Code 46 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x00019993 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x000199ad Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x000199f5 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x00019a1d Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x00019aa9 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x00019c95 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x00019ee5 Thumb Code 10 main.o(i.main) + sqrt 0x0001ab9d Thumb Code 66 sqrt.o(i.sqrt) + panel_init_code 0x0001b094 Data 10450 ap_demo.o(.constdata) + phone_data_21 0x0001da80 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001da81 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_00 0x0001da82 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_30 0x0001da83 Data 2 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001da85 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001da88 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001da8c Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001da90 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001da94 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001da98 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001da9c Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001daa1 Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001dab1 Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_02 0x0001dabc Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001dad8 Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_03 0x0001dae2 Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_05 0x0001dfee Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_1D 0x0001e4fa Data 1292 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001ea06 Data 16 app_tp_for_custom_s8.o(.constdata) + sleep_click_on 0x0001ea16 Data 16 app_tp_for_custom_s8.o(.constdata) + screen_reg_start_data_size 0x0001ea26 Data 1 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001ed24 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001ed54 Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_start_flag 0x000701d7 Data 1 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701d8 Data 1 ap_demo.o(.data) + panel_mode 0x000701da Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701dc Data 2 ap_demo.o(.data) + rd_51_val2 0x000701e2 Data 2 ap_demo.o(.data) + panel_r 0x000701e4 Data 2 ap_demo.o(.data) + panel_g 0x000701e6 Data 2 ap_demo.o(.data) + panel_b 0x000701e8 Data 2 ap_demo.o(.data) + rx_filter_1080_h_4_96 0x000701f8 Data 256 ap_demo.o(.data) + rx_filter_2400_v_4_96 0x000702f8 Data 256 ap_demo.o(.data) + s_screen_init_complate 0x000703fc Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x00070400 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x00070403 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x00070406 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x00070409 Data 6 app_tp_transfer.o(.data) + st_touch_init_sensor_off 0x00070411 Data 3 app_tp_st_touch.o(.data) + st_touch_init_sensor_on 0x00070414 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_reset 0x00070417 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_FpnlInit 0x0007041a Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_PnlInit 0x0007041d Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCfg 0x00070420 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCx 0x00070423 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvPnl 0x00070426 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clearfifo 0x00070429 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clkreset 0x0007042c Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneM 0x0007042f Data 4 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneS 0x00070433 Data 4 app_tp_st_touch.o(.data) + phone_data_E4 0x00070464 Data 1 app_tp_for_custom_s8.o(.data) + tp_flag 0x00070465 Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x00070466 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x00070467 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x00070468 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_clk_count 0x00070469 Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x0007046a Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x0007046b Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x0007046c Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x0007046d Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x0007046e Data 1 app_tp_for_custom_s8.o(.data) + phone_data_B1 0x00070477 Data 2 app_tp_for_custom_s8.o(.data) + phone_data_72_13 0x00070482 Data 1292 app_tp_for_custom_s8.o(.data) + phone_data_75_7401_7D01 0x0007098e Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_7401_7D03 0x00070c1c Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_7402_7D01 0x00070eaa Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_7402_7D03 0x00071138 Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_7403_7D01 0x000713c6 Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_7403_7D03 0x00071654 Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_FF 0x000718e2 Data 288 app_tp_for_custom_s8.o(.data) + fingerprint_arr_on 0x00071a02 Data 16 app_tp_for_custom_s8.o(.data) + fingerprint_arr_off 0x00071a12 Data 16 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x00071a22 Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x00071aea Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x00071aeb Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x00071aec Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x00071aed Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x00071af0 Data 5 app_tp_for_custom_s8.o(.data) + fingerprint_flag 0x00071af5 Data 1 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x00071af8 Data 48 app_tp_for_custom_s8.o(.data) + g_fls_w_cmd 0x00071b28 Data 1 norflash.o(.data) + g_fls_r_cmd 0x00071b29 Data 1 norflash.o(.data) + g_fls_write_en_status 0x00071b2a Data 1 norflash.o(.data) + isFlsTransferEnd 0x00071b2b Data 1 norflash.o(.data) + isFlsFifoReq 0x00071b2c Data 1 norflash.o(.data) + isNandWriteCompleted 0x00071b2d Data 1 norflash.o(.data) + isNandReadCompleted 0x00071b2e Data 1 norflash.o(.data) + g_fls_error_info 0x00071b34 Data 6 norflash.o(.data) + g_systick_cb_func 0x00071b40 Data 4 drv_common.o(.data) + g_system_clock 0x00071b44 Data 4 drv_common.o(.data) + g_scld_fhd_filter_h 0x00071b5c Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x00071c5c Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x00071d5c Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x00071e5c Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x00071f5c Data 128 drv_param_init.o(.data) + g_ccm_setting 0x00071fdc Data 36 drv_param_init.o(.data) + g_sof_gen_te_func 0x00072074 Data 4 hal_internal_vsync.o(.data) + g_int_rxbr_irq0_cb_func 0x00072078 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x0007207c Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x00072080 Data 4 drv_vidc.o(.data) + __stdout 0x000720a8 Data 4 stdout.o(.data) + tp_scan_data 0x00072240 Data 12 app_tp_st_touch.o(.bss) + string 0x0007235c Data 256 tau_log.o(.bss) + phone_data_75_7401_7D02 0x0007245c Data 654 app_tp_for_custom_s8.o(.bss) + hal_dmahandle 0x000726ec Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x0007278c Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x000727ac Data 16 hal_uart.o(.bss) + g_vsync_hande 0x00072958 Data 100 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x000729bc Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x000732dc Data 4144 dcs_packet_fifo.o(.bss) + g_spis_ctrl_handle 0x0007430c Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x00074330 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00075330 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x00010c34, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000fdc8]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000ed54, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 570 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2803 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 3113 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 3116 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 3118 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 3120 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 3121 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 3123 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 3125 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 3114 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 571 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2806 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2808 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2810 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2812 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 3077 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 3079 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 3081 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 3083 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 3085 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 3087 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 3089 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 3091 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 3093 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 3097 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 3099 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 3101 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 3103 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 3105 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 3107 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 3109 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 3111 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 3128 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 3130 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 3132 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 3134 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 3143 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 3144 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 3146 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 3150 .text mf_p.l(dsqrt.o) + 0x00010afa 0x00010afa 0x00000002 PAD + 0x00010afc 0x00010afc 0x00000040 Code RO 3152 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 3154 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 3156 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000060 Code RO 3166 .text mc_p.l(__dclz77c.o) + 0x00010be8 0x00010be8 0x00000018 Code RO 2437 i.ADC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c00 0x00010c00 0x00000018 Code RO 2438 i.AP_NRESET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c18 0x00010c18 0x00000014 Code RO 2439 i.DMA_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c2c 0x00010c2c 0x0000001c Code RO 2440 i.EXTI_INT0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c48 0x00010c48 0x0000001c Code RO 2441 i.EXTI_INT1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c64 0x00010c64 0x0000001c Code RO 2442 i.EXTI_INT2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c80 0x00010c80 0x0000001c Code RO 2443 i.EXTI_INT3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c9c 0x00010c9c 0x0000001c Code RO 2444 i.EXTI_INT4_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cb8 0x00010cb8 0x0000001c Code RO 2445 i.EXTI_INT5_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cd4 0x00010cd4 0x0000001c Code RO 2446 i.EXTI_INT6_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cf0 0x00010cf0 0x0000001c Code RO 2447 i.EXTI_INT7_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d0c 0x00010d0c 0x00000014 Code RO 2448 i.FLSCTRL_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d20 0x00010d20 0x0000004e Code RO 99 i.Gpio_swire_output ap_demo.o + 0x00010d6e 0x00010d6e 0x00000002 PAD + 0x00010d70 0x00010d70 0x00000014 Code RO 2449 i.HardFault_Handler CVWL368.lib(irq_redirect .o) + 0x00010d84 0x00010d84 0x00000018 Code RO 2450 i.I2C0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d9c 0x00010d9c 0x00000018 Code RO 2451 i.I2C1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010db4 0x00010db4 0x00000018 Code RO 2452 i.LCDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010dcc 0x00010dcc 0x00000028 Code RO 1036 i.LOG_printf CVWL368.lib(tau_log.o) + 0x00010df4 0x00010df4 0x00000018 Code RO 2453 i.MEMC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e0c 0x00010e0c 0x00000018 Code RO 2454 i.MIPI_RX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e24 0x00010e24 0x00000018 Code RO 2455 i.MIPI_TX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e3c 0x00010e3c 0x0000001c Code RO 2456 i.PWMDET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e58 0x00010e58 0x00000124 Code RO 290 i.S20_Start_init app_tp_transfer.o + 0x00010f7c 0x00010f7c 0x0000001c Code RO 2457 i.SPIM_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010f98 0x00010f98 0x0000001c Code RO 2458 i.SPIS_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010fb4 0x00010fb4 0x0000001c Code RO 2459 i.SWIRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010fd0 0x00010fd0 0x00000018 Code RO 2460 i.SysTick_Handler CVWL368.lib(irq_redirect .o) + 0x00010fe8 0x00010fe8 0x00000018 Code RO 2461 i.TIMER0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011000 0x00011000 0x00000014 Data RO 1301 .ARM.__at_0x11000 CVWL368.lib(drv_common.o) + 0x00011014 0x00011014 0x00000002 Code RO 2685 i.UART_DisableDma CVWL368.lib(drv_uart.o) + 0x00011016 0x00011016 0x00000002 Code RO 3161 i.__scatterload_null mc_p.l(handlers.o) + 0x00011018 0x00011018 0x00000004 Data RO 1302 .ARM.__at_0x11018 CVWL368.lib(drv_common.o) + 0x0001101c 0x0001101c 0x00000018 Code RO 2462 i.TIMER1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011034 0x00011034 0x00000018 Code RO 2463 i.TIMER2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001104c 0x0001104c 0x00000018 Code RO 2464 i.TIMER3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011064 0x00011064 0x0000001c Code RO 2681 i.UART0_IRQ_Handle CVWL368.lib(drv_uart.o) + 0x00011080 0x00011080 0x00000004 Code RO 2691 i.UART_GetInstance CVWL368.lib(drv_uart.o) + 0x00011084 0x00011084 0x00000018 Code RO 2465 i.UART_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001109c 0x0001109c 0x00000024 Code RO 2699 i.UART_ResetRxFIFO CVWL368.lib(drv_uart.o) + 0x000110c0 0x000110c0 0x00000048 Code RO 2702 i.UART_SetBaudRate CVWL368.lib(drv_uart.o) + 0x00011108 0x00011108 0x0000001a Code RO 2703 i.UART_SwitchSCLK CVWL368.lib(drv_uart.o) + 0x00011122 0x00011122 0x00000134 Code RO 2705 i.UART_TransferHandleIRQ CVWL368.lib(drv_uart.o) + 0x00011256 0x00011256 0x0000001a Code RO 2707 i.UART_WriteBlocking CVWL368.lib(drv_uart.o) + 0x00011270 0x00011270 0x000000bc Code RO 2708 i.UART_init CVWL368.lib(drv_uart.o) + 0x0001132c 0x0001132c 0x00000018 Code RO 2466 i.VIDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011344 0x00011344 0x00000018 Code RO 2467 i.VPRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001135c 0x0001135c 0x00000018 Code RO 2468 i.WDG_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011374 0x00011374 0x00000020 Code RO 3049 i.__0printf mc_p.l(printfa.o) + 0x00011394 0x00011394 0x00000024 Code RO 3055 i.__0vsprintf mc_p.l(printfa.o) + 0x000113b8 0x000113b8 0x0000002e Code RO 3148 i.__ARM_clz mf_p.l(depilogue.o) + 0x000113e6 0x000113e6 0x0000001a Code RO 668 i.__ARM_common_switch8 CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00011400 0x00011400 0x00000018 Code RO 1622 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_i2c_master.o) + 0x00011418 0x00011418 0x00000018 Code RO 1785 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_spi_master.o) + 0x00011430 0x00011430 0x00000020 Code RO 2291 i.__NVIC_DisableIRQ CVWL368.lib(drv_rxbr.o) + 0x00011450 0x00011450 0x00000018 Code RO 2292 i.__NVIC_EnableIRQ CVWL368.lib(drv_rxbr.o) + 0x00011468 0x00011468 0x00000044 Code RO 2587 i.__NVIC_SetPriority CVWL368.lib(hal_spi_slave.o) + 0x000114ac 0x000114ac 0x0000000e Code RO 3160 i.__scatterload_copy mc_p.l(handlers.o) + 0x000114ba 0x000114ba 0x0000000e Code RO 3162 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x000114c8 0x000114c8 0x0000000c Code RO 3138 i.__set_errno mc_p.l(errno.o) + 0x000114d4 0x000114d4 0x00000174 Code RO 3056 i._fp_digits mc_p.l(printfa.o) + 0x00011648 0x00011648 0x000006ec Code RO 3057 i._printf_core mc_p.l(printfa.o) + 0x00011d34 0x00011d34 0x00000020 Code RO 3058 i._printf_post_padding mc_p.l(printfa.o) + 0x00011d54 0x00011d54 0x0000002c Code RO 3059 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011d80 0x00011d80 0x0000000a Code RO 3061 i._sputc mc_p.l(printfa.o) + 0x00011d8a 0x00011d8a 0x00000002 PAD + 0x00011d8c 0x00011d8c 0x000003e4 Code RO 102 i.ap_dcs_read ap_demo.o + 0x00012170 0x00012170 0x000001f4 Code RO 103 i.ap_demo ap_demo.o + 0x00012364 0x00012364 0x0000002c Code RO 104 i.ap_get_reg_53 ap_demo.o + 0x00012390 0x00012390 0x00000054 Code RO 105 i.ap_get_reg_7A ap_demo.o + 0x000123e4 0x000123e4 0x0000009c Code RO 106 i.ap_get_reg_df ap_demo.o + 0x00012480 0x00012480 0x00000030 Code RO 448 i.ap_get_tp_calibration_status_01 app_tp_st_touch.o + 0x000124b0 0x000124b0 0x00000030 Code RO 107 i.ap_reset_cb ap_demo.o + 0x000124e0 0x000124e0 0x0000005c Code RO 108 i.ap_set_backlight_51 ap_demo.o + 0x0001253c 0x0001253c 0x00000044 Code RO 109 i.ap_set_display_off ap_demo.o + 0x00012580 0x00012580 0x00000004 Code RO 110 i.ap_set_display_on ap_demo.o + 0x00012584 0x00012584 0x0000007c Code RO 111 i.ap_set_enter_sleep_mode ap_demo.o + 0x00012600 0x00012600 0x00000044 Code RO 112 i.ap_set_exit_sleep_mode ap_demo.o + 0x00012644 0x00012644 0x00000020 Code RO 113 i.ap_set_tp_calibration_04 ap_demo.o + 0x00012664 0x00012664 0x000000b0 Code RO 450 i.ap_tp_st_touch_calibration app_tp_st_touch.o + 0x00012714 0x00012714 0x0000001a Code RO 451 i.ap_tp_st_touch_error_handler_F3 app_tp_st_touch.o + 0x0001272e 0x0001272e 0x00000020 Code RO 452 i.ap_tp_st_touch_error_handler_FF app_tp_st_touch.o + 0x0001274e 0x0001274e 0x00000002 PAD + 0x00012750 0x00012750 0x000000a8 Code RO 453 i.ap_tp_st_touch_get_calibration_success_mark app_tp_st_touch.o + 0x000127f8 0x000127f8 0x0000001c Code RO 455 i.ap_tp_st_touch_scan_point_init app_tp_st_touch.o + 0x00012814 0x00012814 0x0000009c Code RO 456 i.ap_tp_st_touch_scan_point_record_event app_tp_st_touch.o + 0x000128b0 0x000128b0 0x00000050 Code RO 457 i.ap_tp_st_touch_scan_point_record_event_exec app_tp_st_touch.o + 0x00012900 0x00012900 0x00000034 Code RO 458 i.ap_tp_st_touch_simulate_finger_release_event app_tp_st_touch.o + 0x00012934 0x00012934 0x000000ac Code RO 459 i.ap_tp_st_touch_software_reset app_tp_st_touch.o + 0x000129e0 0x000129e0 0x00000030 Code RO 114 i.ap_update_frame_rate ap_demo.o + 0x00012a10 0x00012a10 0x0000001c Code RO 2293 i.app_ADC_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00012a2c 0x00012a2c 0x00000024 Code RO 1546 i.app_AP_NRESET_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012a50 0x00012a50 0x0000001c Code RO 1547 i.app_EXTI_INT0_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012a6c 0x00012a6c 0x0000001c Code RO 1548 i.app_EXTI_INT1_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012a88 0x00012a88 0x0000001c Code RO 1549 i.app_EXTI_INT2_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012aa4 0x00012aa4 0x0000001c Code RO 1550 i.app_EXTI_INT3_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012ac0 0x00012ac0 0x0000001c Code RO 1551 i.app_EXTI_INT4_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012adc 0x00012adc 0x0000001c Code RO 1552 i.app_EXTI_INT5_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012af8 0x00012af8 0x0000001c Code RO 1553 i.app_EXTI_INT6_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012b14 0x00012b14 0x0000001c Code RO 1554 i.app_EXTI_INT7_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012b30 0x00012b30 0x00000048 Code RO 1293 i.app_HardFault_Handler CVWL368.lib(drv_common.o) + 0x00012b78 0x00012b78 0x00000018 Code RO 1657 i.app_I2C0_IRQn_Handler CVWL368.lib(drv_i2c_slave.o) + 0x00012b90 0x00012b90 0x00000010 Code RO 1623 i.app_I2C1_IRQn_Handler CVWL368.lib(drv_i2c_master.o) + 0x00012ba0 0x00012ba0 0x000001a4 Code RO 1903 i.app_LCDC_IRQn_Handler CVWL368.lib(hal_internal_vsync.o) + 0x00012d44 0x00012d44 0x00000088 Code RO 2235 i.app_MEMC_IRQn_Handler CVWL368.lib(drv_memc.o) + 0x00012dcc 0x00012dcc 0x00000298 Code RO 2007 i.app_MIPI_RX_IRQn_Handler CVWL368.lib(drv_dsi_rx.o) + 0x00013064 0x00013064 0x000000a0 Code RO 2063 i.app_MIPI_TX_IRQn_Handler CVWL368.lib(drv_dsi_tx.o) + 0x00013104 0x00013104 0x00000048 Code RO 1706 i.app_PWMDET_IRQn_Handler CVWL368.lib(drv_pwm.o) + 0x0001314c 0x0001314c 0x00000030 Code RO 1786 i.app_SPIM_IRQn_Handler CVWL368.lib(drv_spi_master.o) + 0x0001317c 0x0001317c 0x00000200 Code RO 2588 i.app_SPIS_IRQn_Handler CVWL368.lib(hal_spi_slave.o) + 0x0001337c 0x0001337c 0x00000020 Code RO 1818 i.app_SWIRE_IRQn_Handler CVWL368.lib(drv_swire.o) + 0x0001339c 0x0001339c 0x00000018 Code RO 1294 i.app_SysTick_Handler CVWL368.lib(drv_common.o) + 0x000133b4 0x000133b4 0x0000000a Code RO 1868 i.app_TIMER0_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000133be 0x000133be 0x0000000a Code RO 1869 i.app_TIMER1_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000133c8 0x000133c8 0x0000000a Code RO 1870 i.app_TIMER2_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000133d2 0x000133d2 0x0000000a Code RO 1871 i.app_TIMER3_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x000133dc 0x000133dc 0x00000008 Code RO 2709 i.app_UART_IRQn_Handler CVWL368.lib(drv_uart.o) + 0x000133e4 0x000133e4 0x0000001c Code RO 2358 i.app_VIDC_IRQn_Handler CVWL368.lib(drv_vidc.o) + 0x00013400 0x00013400 0x0000001c Code RO 2294 i.app_VPRE_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x0001341c 0x0001341c 0x00000038 Code RO 2768 i.app_WDG_IRQn_Handler CVWL368.lib(drv_wdg.o) + 0x00013454 0x00013454 0x00000010 Code RO 1408 i.app_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00013464 0x00013464 0x00000030 Code RO 1209 i.app_fls_ctrl_Handler CVWL368.lib(norflash.o) + 0x00013494 0x00013494 0x00000024 Code RO 291 i.app_tp_I2C_init app_tp_transfer.o + 0x000134b8 0x000134b8 0x000000a8 Code RO 460 i.app_tp_calibration_exec app_tp_st_touch.o + 0x00013560 0x00013560 0x0000000a Code RO 292 i.app_tp_i2cs_callback app_tp_transfer.o + 0x0001356a 0x0001356a 0x00000002 PAD + 0x0001356c 0x0001356c 0x00000044 Code RO 293 i.app_tp_init app_tp_transfer.o + 0x000135b0 0x000135b0 0x00000020 Code RO 294 i.app_tp_m_read app_tp_transfer.o + 0x000135d0 0x000135d0 0x00000008 Code RO 295 i.app_tp_m_transfer_complate app_tp_transfer.o + 0x000135d8 0x000135d8 0x00000008 Code RO 296 i.app_tp_m_write app_tp_transfer.o + 0x000135e0 0x000135e0 0x00000408 Code RO 1047 i.app_tp_phone_analysis_data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x000139e8 0x000139e8 0x00000008 Code RO 299 i.app_tp_s_read app_tp_transfer.o + 0x000139f0 0x000139f0 0x00000008 Code RO 301 i.app_tp_s_write app_tp_transfer.o + 0x000139f8 0x000139f8 0x000003b0 Code RO 1049 i.app_tp_screen_analysis_int WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00013da8 0x00013da8 0x00000030 Code RO 302 i.app_tp_screen_init app_tp_transfer.o + 0x00013dd8 0x00013dd8 0x0000000c Code RO 303 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00013de4 0x00013de4 0x00000038 Code RO 304 i.app_tp_screen_int_init app_tp_transfer.o + 0x00013e1c 0x00013e1c 0x0000001c Code RO 305 i.app_tp_screen_int_lvl_low app_tp_transfer.o + 0x00013e38 0x00013e38 0x00000030 Code RO 306 i.app_tp_transfer_phone app_tp_transfer.o + 0x00013e68 0x00013e68 0x00000040 Code RO 307 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00013ea8 0x00013ea8 0x00000124 Code RO 308 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x00013fcc 0x00013fcc 0x00000014 Code RO 309 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x00013fe0 0x00013fe0 0x00000024 Code RO 550 i.board_Init board.o + 0x00014004 0x00014004 0x000004f0 Code RO 1904 i.calc_framebuffer_setting CVWL368.lib(hal_internal_vsync.o) + 0x000144f4 0x000144f4 0x000000c8 Code RO 2792 i.ceil m_ps.l(ceil.o) + 0x000145bc 0x000145bc 0x0000002c Code RO 1905 i.check_mipi_rx_tx_video_info CVWL368.lib(hal_internal_vsync.o) + 0x000145e8 0x000145e8 0x00000094 Code RO 1906 i.check_pkt_buf_rev CVWL368.lib(hal_internal_vsync.o) + 0x0001467c 0x0001467c 0x00000058 Code RO 1994 i.dcs_packet_fifo_alloc CVWL368.lib(dcs_packet_fifo.o) + 0x000146d4 0x000146d4 0x00000018 Code RO 1995 i.dcs_packet_fifo_init CVWL368.lib(dcs_packet_fifo.o) + 0x000146ec 0x000146ec 0x00000044 Code RO 1996 i.dcs_packet_free_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x00014730 0x00014730 0x00000024 Code RO 1997 i.dcs_packet_get_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x00014754 0x00014754 0x0000001c Code RO 1907 i.dcs_sw_filter CVWL368.lib(hal_internal_vsync.o) + 0x00014770 0x00014770 0x00000018 Code RO 1028 i.delayMs CVWL368.lib(tau_delay.o) + 0x00014788 0x00014788 0x00000022 Code RO 1029 i.delayUs CVWL368.lib(tau_delay.o) + 0x000147aa 0x000147aa 0x00000002 PAD + 0x000147ac 0x000147ac 0x00000038 Code RO 1837 i.drv_ap_rst_trig_edge_detect CVWL368.lib(drv_sys_cfg.o) + 0x000147e4 0x000147e4 0x0000000c Code RO 2558 i.drv_chip_info_get_info CVWL368.lib(drv_chip_info.o) + 0x000147f0 0x000147f0 0x00000040 Code RO 2559 i.drv_chip_info_init CVWL368.lib(drv_chip_info.o) + 0x00014830 0x00014830 0x000000b0 Code RO 2560 i.drv_chip_rx_info_check CVWL368.lib(drv_chip_info.o) + 0x000148e0 0x000148e0 0x00000014 Code RO 2561 i.drv_chip_rx_init_done CVWL368.lib(drv_chip_info.o) + 0x000148f4 0x000148f4 0x00000058 Code RO 1296 i.drv_common_enable_systick CVWL368.lib(drv_common.o) + 0x0001494c 0x0001494c 0x00000008 Code RO 1299 i.drv_common_system_init CVWL368.lib(drv_common.o) + 0x00014954 0x00014954 0x00000010 Code RO 1321 i.drv_crgu_config_reset_modules CVWL368.lib(drv_crgu.o) + 0x00014964 0x00014964 0x00000014 Code RO 1334 i.drv_crgu_set_ahb_pre_div CVWL368.lib(drv_crgu.o) + 0x00014978 0x00014978 0x00000014 Code RO 1335 i.drv_crgu_set_ahb_src CVWL368.lib(drv_crgu.o) + 0x0001498c 0x0001498c 0x00000020 Code RO 1338 i.drv_crgu_set_clock CVWL368.lib(drv_crgu.o) + 0x000149ac 0x000149ac 0x00000014 Code RO 1339 i.drv_crgu_set_dpi_mux_src CVWL368.lib(drv_crgu.o) + 0x000149c0 0x000149c0 0x00000018 Code RO 1340 i.drv_crgu_set_dpi_pre_div CVWL368.lib(drv_crgu.o) + 0x000149d8 0x000149d8 0x00000014 Code RO 1341 i.drv_crgu_set_dpi_pre_src CVWL368.lib(drv_crgu.o) + 0x000149ec 0x000149ec 0x00000014 Code RO 1342 i.drv_crgu_set_dsc_core_div CVWL368.lib(drv_crgu.o) + 0x00014a00 0x00014a00 0x00000014 Code RO 1343 i.drv_crgu_set_dsco_src CVWL368.lib(drv_crgu.o) + 0x00014a14 0x00014a14 0x00000014 Code RO 1344 i.drv_crgu_set_dsco_src_div CVWL368.lib(drv_crgu.o) + 0x00014a28 0x00014a28 0x00000014 Code RO 1345 i.drv_crgu_set_fb_div CVWL368.lib(drv_crgu.o) + 0x00014a3c 0x00014a3c 0x00000014 Code RO 1346 i.drv_crgu_set_fb_src CVWL368.lib(drv_crgu.o) + 0x00014a50 0x00014a50 0x00000014 Code RO 1349 i.drv_crgu_set_lcdc_div CVWL368.lib(drv_crgu.o) + 0x00014a64 0x00014a64 0x00000014 Code RO 1350 i.drv_crgu_set_lcdc_src CVWL368.lib(drv_crgu.o) + 0x00014a78 0x00014a78 0x00000014 Code RO 1351 i.drv_crgu_set_mipi_cfg_src CVWL368.lib(drv_crgu.o) + 0x00014a8c 0x00014a8c 0x00000018 Code RO 1352 i.drv_crgu_set_mipi_ref_src CVWL368.lib(drv_crgu.o) + 0x00014aa4 0x00014aa4 0x00000018 Code RO 1355 i.drv_crgu_set_reset CVWL368.lib(drv_crgu.o) + 0x00014abc 0x00014abc 0x00000014 Code RO 1356 i.drv_crgu_set_rxbr_div CVWL368.lib(drv_crgu.o) + 0x00014ad0 0x00014ad0 0x00000014 Code RO 1357 i.drv_crgu_set_rxbr_src CVWL368.lib(drv_crgu.o) + 0x00014ae4 0x00014ae4 0x00000014 Code RO 1359 i.drv_crgu_set_vidc_src CVWL368.lib(drv_crgu.o) + 0x00014af8 0x00014af8 0x00000018 Code RO 1412 i.drv_dma_clear_flag CVWL368.lib(drv_dma.o) + 0x00014b10 0x00014b10 0x0000001c Code RO 1413 i.drv_dma_create_handle CVWL368.lib(drv_dma.o) + 0x00014b2c 0x00014b2c 0x00000010 Code RO 1415 i.drv_dma_disenable_channel CVWL368.lib(drv_dma.o) + 0x00014b3c 0x00014b3c 0x00000010 Code RO 1417 i.drv_dma_enable_channel CVWL368.lib(drv_dma.o) + 0x00014b4c 0x00014b4c 0x00000024 Code RO 1418 i.drv_dma_enable_channel_interrupts CVWL368.lib(drv_dma.o) + 0x00014b70 0x00014b70 0x0000000c Code RO 1420 i.drv_dma_get_channel_flag CVWL368.lib(drv_dma.o) + 0x00014b7c 0x00014b7c 0x00000090 Code RO 1423 i.drv_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00014c0c 0x00014c0c 0x00000012 Code RO 1425 i.drv_dma_prepar_transfer CVWL368.lib(drv_dma.o) + 0x00014c1e 0x00014c1e 0x0000001a Code RO 1427 i.drv_dma_set_burst CVWL368.lib(drv_dma.o) + 0x00014c38 0x00014c38 0x00000006 Code RO 1428 i.drv_dma_set_callback CVWL368.lib(drv_dma.o) + 0x00014c3e 0x00014c3e 0x00000002 PAD + 0x00014c40 0x00014c40 0x00000044 Code RO 1430 i.drv_dma_set_transfer CVWL368.lib(drv_dma.o) + 0x00014c84 0x00014c84 0x00000036 Code RO 2571 i.drv_dsc_dec_convert_pps_rc_parameter CVWL368.lib(drv_dsc_dec.o) + 0x00014cba 0x00014cba 0x0000000c Code RO 2572 i.drv_dsc_dec_disable CVWL368.lib(drv_dsc_dec.o) + 0x00014cc6 0x00014cc6 0x00000002 PAD + 0x00014cc8 0x00014cc8 0x00000074 Code RO 2573 i.drv_dsc_dec_enable CVWL368.lib(drv_dsc_dec.o) + 0x00014d3c 0x00014d3c 0x0000000a Code RO 2574 i.drv_dsc_dec_get_nslc CVWL368.lib(drv_dsc_dec.o) + 0x00014d46 0x00014d46 0x00000028 Code RO 2576 i.drv_dsc_dec_set_u8_pps CVWL368.lib(drv_dsc_dec.o) + 0x00014d6e 0x00014d6e 0x00000002 PAD + 0x00014d70 0x00014d70 0x00000104 Code RO 2008 i.drv_dsi_rx_calc_ipi_tx_delay CVWL368.lib(drv_dsi_rx.o) + 0x00014e74 0x00014e74 0x00000040 Code RO 2009 i.drv_dsi_rx_enable_irq CVWL368.lib(drv_dsi_rx.o) + 0x00014eb4 0x00014eb4 0x00000050 Code RO 2010 i.drv_dsi_rx_get_color_bpp CVWL368.lib(drv_dsi_rx.o) + 0x00014f04 0x00014f04 0x0000001c Code RO 2011 i.drv_dsi_rx_get_color_pcc CVWL368.lib(drv_dsi_rx.o) + 0x00014f20 0x00014f20 0x00000008 Code RO 2012 i.drv_dsi_rx_get_compression_en CVWL368.lib(drv_dsi_rx.o) + 0x00014f28 0x00014f28 0x00000006 Code RO 2013 i.drv_dsi_rx_get_max_ret_size CVWL368.lib(drv_dsi_rx.o) + 0x00014f2e 0x00014f2e 0x0000000e Code RO 2017 i.drv_dsi_rx_power_up CVWL368.lib(drv_dsi_rx.o) + 0x00014f3c 0x00014f3c 0x00000020 Code RO 2018 i.drv_dsi_rx_set_ctrl_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014f5c 0x00014f5c 0x00000010 Code RO 2019 i.drv_dsi_rx_set_ddi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014f6c 0x00014f6c 0x00000004 Code RO 2021 i.drv_dsi_rx_set_inten CVWL368.lib(drv_dsi_rx.o) + 0x00014f70 0x00014f70 0x00000010 Code RO 2022 i.drv_dsi_rx_set_ipi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014f80 0x00014f80 0x00000046 Code RO 2024 i.drv_dsi_rx_set_lane_swap CVWL368.lib(drv_dsi_rx.o) + 0x00014fc6 0x00014fc6 0x00000026 Code RO 2025 i.drv_dsi_rx_set_resp_cnt CVWL368.lib(drv_dsi_rx.o) + 0x00014fec 0x00014fec 0x00000104 Code RO 2026 i.drv_dsi_rx_set_up_phy CVWL368.lib(drv_dsi_rx.o) + 0x000150f0 0x000150f0 0x0000000e Code RO 2027 i.drv_dsi_rx_shut_down CVWL368.lib(drv_dsi_rx.o) + 0x000150fe 0x000150fe 0x00000004 Code RO 2064 i.drv_dsi_tx_command_get_payload CVWL368.lib(drv_dsi_tx.o) + 0x00015102 0x00015102 0x00000014 Code RO 2065 i.drv_dsi_tx_command_header CVWL368.lib(drv_dsi_tx.o) + 0x00015116 0x00015116 0x0000006c Code RO 2066 i.drv_dsi_tx_command_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00015182 0x00015182 0x00000004 Code RO 2067 i.drv_dsi_tx_command_put_payload CVWL368.lib(drv_dsi_tx.o) + 0x00015186 0x00015186 0x00000018 Code RO 2068 i.drv_dsi_tx_config_eotp CVWL368.lib(drv_dsi_tx.o) + 0x0001519e 0x0001519e 0x00000008 Code RO 2069 i.drv_dsi_tx_config_int CVWL368.lib(drv_dsi_tx.o) + 0x000151a6 0x000151a6 0x00000008 Code RO 2070 i.drv_dsi_tx_dpi_lpcmd_time CVWL368.lib(drv_dsi_tx.o) + 0x000151ae 0x000151ae 0x0000000a Code RO 2071 i.drv_dsi_tx_dpi_mode CVWL368.lib(drv_dsi_tx.o) + 0x000151b8 0x000151b8 0x00000024 Code RO 2072 i.drv_dsi_tx_dpi_polarity CVWL368.lib(drv_dsi_tx.o) + 0x000151dc 0x000151dc 0x00000004 Code RO 2073 i.drv_dsi_tx_edpi_cmd_size CVWL368.lib(drv_dsi_tx.o) + 0x000151e0 0x000151e0 0x00000004 Code RO 2075 i.drv_dsi_tx_get_cmd_status CVWL368.lib(drv_dsi_tx.o) + 0x000151e4 0x000151e4 0x00000004 Code RO 2077 i.drv_dsi_tx_mode CVWL368.lib(drv_dsi_tx.o) + 0x000151e8 0x000151e8 0x00000018 Code RO 2078 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL368.lib(drv_dsi_tx.o) + 0x00015200 0x00015200 0x0000001a Code RO 2079 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL368.lib(drv_dsi_tx.o) + 0x0001521a 0x0001521a 0x0000000c Code RO 2081 i.drv_dsi_tx_phy_lane_mode CVWL368.lib(drv_dsi_tx.o) + 0x00015226 0x00015226 0x00000064 Code RO 2085 i.drv_dsi_tx_phy_status_ready CVWL368.lib(drv_dsi_tx.o) + 0x0001528a 0x0001528a 0x0000003e Code RO 2086 i.drv_dsi_tx_phy_status_stopstate CVWL368.lib(drv_dsi_tx.o) + 0x000152c8 0x000152c8 0x00000134 Code RO 2088 i.drv_dsi_tx_phy_test_setup CVWL368.lib(drv_dsi_tx.o) + 0x000153fc 0x000153fc 0x0000001e Code RO 2089 i.drv_dsi_tx_phy_time_cfg CVWL368.lib(drv_dsi_tx.o) + 0x0001541a 0x0001541a 0x00000008 Code RO 2093 i.drv_dsi_tx_powerup CVWL368.lib(drv_dsi_tx.o) + 0x00015422 0x00015422 0x0000001c Code RO 2094 i.drv_dsi_tx_response_mode CVWL368.lib(drv_dsi_tx.o) + 0x0001543e 0x0001543e 0x00000018 Code RO 2097 i.drv_dsi_tx_set_bta_ack CVWL368.lib(drv_dsi_tx.o) + 0x00015456 0x00015456 0x0000000c Code RO 2098 i.drv_dsi_tx_set_esc_div CVWL368.lib(drv_dsi_tx.o) + 0x00015462 0x00015462 0x00000002 PAD + 0x00015464 0x00015464 0x00000040 Code RO 2099 i.drv_dsi_tx_set_int CVWL368.lib(drv_dsi_tx.o) + 0x000154a4 0x000154a4 0x00000010 Code RO 2100 i.drv_dsi_tx_set_time_out_div CVWL368.lib(drv_dsi_tx.o) + 0x000154b4 0x000154b4 0x00000008 Code RO 2101 i.drv_dsi_tx_set_video_chunk CVWL368.lib(drv_dsi_tx.o) + 0x000154bc 0x000154bc 0x00000022 Code RO 2102 i.drv_dsi_tx_set_video_timing CVWL368.lib(drv_dsi_tx.o) + 0x000154de 0x000154de 0x00000008 Code RO 2104 i.drv_dsi_tx_shutdown CVWL368.lib(drv_dsi_tx.o) + 0x000154e6 0x000154e6 0x00000026 Code RO 2105 i.drv_dsi_tx_timeout_cfg CVWL368.lib(drv_dsi_tx.o) + 0x0001550c 0x0001550c 0x000000aa Code RO 2108 i.drv_dsi_tx_video_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x000155b6 0x000155b6 0x00000016 Code RO 2109 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL368.lib(drv_dsi_tx.o) + 0x000155cc 0x000155cc 0x00000018 Code RO 2110 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL368.lib(drv_dsi_tx.o) + 0x000155e4 0x000155e4 0x0000002e Code RO 2509 i.drv_efuse_enter_inactive CVWL368.lib(drv_efuse.o) + 0x00015612 0x00015612 0x0000000c Code RO 2512 i.drv_efuse_int_enable CVWL368.lib(drv_efuse.o) + 0x0001561e 0x0001561e 0x00000032 Code RO 2513 i.drv_efuse_read CVWL368.lib(drv_efuse.o) + 0x00015650 0x00015650 0x00000018 Code RO 2514 i.drv_efuse_read_req CVWL368.lib(drv_efuse.o) + 0x00015668 0x00015668 0x00000018 Code RO 1555 i.drv_gpio_get_input_data CVWL368.lib(drv_gpio.o) + 0x00015680 0x00015680 0x0000000c Code RO 1557 i.drv_gpio_register_ap_reset_callback CVWL368.lib(drv_gpio.o) + 0x0001568c 0x0001568c 0x00000014 Code RO 1558 i.drv_gpio_register_callback CVWL368.lib(drv_gpio.o) + 0x000156a0 0x000156a0 0x00000050 Code RO 1560 i.drv_gpio_set_int CVWL368.lib(drv_gpio.o) + 0x000156f0 0x000156f0 0x00000020 Code RO 1561 i.drv_gpio_set_ioe CVWL368.lib(drv_gpio.o) + 0x00015710 0x00015710 0x00000010 Code RO 1562 i.drv_gpio_set_mode0 CVWL368.lib(drv_gpio.o) + 0x00015720 0x00015720 0x00000010 Code RO 1563 i.drv_gpio_set_mode1 CVWL368.lib(drv_gpio.o) + 0x00015730 0x00015730 0x00000010 Code RO 1564 i.drv_gpio_set_mode2 CVWL368.lib(drv_gpio.o) + 0x00015740 0x00015740 0x00000010 Code RO 1565 i.drv_gpio_set_mode3 CVWL368.lib(drv_gpio.o) + 0x00015750 0x00015750 0x00000020 Code RO 776 i.drv_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x00015770 0x00015770 0x00000130 Code RO 1566 i.drv_gpio_set_pull_state CVWL368.lib(drv_gpio.o) + 0x000158a0 0x000158a0 0x0000000c Code RO 1658 i.drv_i2c0_set_callback CVWL368.lib(drv_i2c_slave.o) + 0x000158ac 0x000158ac 0x0000000c Code RO 1624 i.drv_i2c1_set_callback CVWL368.lib(drv_i2c_master.o) + 0x000158b8 0x000158b8 0x00000034 Code RO 1598 i.drv_i2c_dma_callback CVWL368.lib(drv_i2c_dma.o) + 0x000158ec 0x000158ec 0x000000ac Code RO 1599 i.drv_i2c_dma_init CVWL368.lib(drv_i2c_dma.o) + 0x00015998 0x00015998 0x0000001a Code RO 1600 i.drv_i2c_enable_rx_dma CVWL368.lib(drv_i2c_dma.o) + 0x000159b2 0x000159b2 0x00000018 Code RO 1601 i.drv_i2c_enable_tx_dma CVWL368.lib(drv_i2c_dma.o) + 0x000159ca 0x000159ca 0x00000002 PAD + 0x000159cc 0x000159cc 0x00000060 Code RO 1626 i.drv_i2c_m_clear_it_pending_bit CVWL368.lib(drv_i2c_master.o) + 0x00015a2c 0x00015a2c 0x00000010 Code RO 1629 i.drv_i2c_m_enable CVWL368.lib(drv_i2c_master.o) + 0x00015a3c 0x00015a3c 0x00000038 Code RO 1630 i.drv_i2c_m_enable_intr CVWL368.lib(drv_i2c_master.o) + 0x00015a74 0x00015a74 0x0000008c Code RO 1636 i.drv_i2c_master_init CVWL368.lib(drv_i2c_master.o) + 0x00015b00 0x00015b00 0x0000005c Code RO 1602 i.drv_i2c_master_read_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015b5c 0x00015b5c 0x0000003c Code RO 1603 i.drv_i2c_master_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015b98 0x00015b98 0x0000003e Code RO 1604 i.drv_i2c_master_write_read_cmd CVWL368.lib(drv_i2c_dma.o) + 0x00015bd6 0x00015bd6 0x00000042 Code RO 1659 i.drv_i2c_s_clear_it_pending_bit CVWL368.lib(drv_i2c_slave.o) + 0x00015c18 0x00015c18 0x00000004 Code RO 1660 i.drv_i2c_s_config_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015c1c 0x00015c1c 0x00000008 Code RO 1661 i.drv_i2c_s_enable CVWL368.lib(drv_i2c_slave.o) + 0x00015c24 0x00015c24 0x00000014 Code RO 1662 i.drv_i2c_s_get_fifo_status CVWL368.lib(drv_i2c_slave.o) + 0x00015c38 0x00015c38 0x00000050 Code RO 1665 i.drv_i2c_s_set_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015c88 0x00015c88 0x0000001c Code RO 1666 i.drv_i2c_s_write_data CVWL368.lib(drv_i2c_slave.o) + 0x00015ca4 0x00015ca4 0x00000058 Code RO 1605 i.drv_i2c_set_dma_irq_callback CVWL368.lib(drv_i2c_dma.o) + 0x00015cfc 0x00015cfc 0x00000032 Code RO 1667 i.drv_i2c_slave_init CVWL368.lib(drv_i2c_slave.o) + 0x00015d2e 0x00015d2e 0x00000002 PAD + 0x00015d30 0x00015d30 0x00000018 Code RO 1606 i.drv_i2c_slave_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015d48 0x00015d48 0x00000018 Code RO 2177 i.drv_lcdc_config_bypass CVWL368.lib(drv_lcdc.o) + 0x00015d60 0x00015d60 0x00000030 Code RO 2178 i.drv_lcdc_config_ccm CVWL368.lib(drv_lcdc.o) + 0x00015d90 0x00015d90 0x00000016 Code RO 2179 i.drv_lcdc_config_disp_mode CVWL368.lib(drv_lcdc.o) + 0x00015da6 0x00015da6 0x00000024 Code RO 2180 i.drv_lcdc_config_dpi_polarity CVWL368.lib(drv_lcdc.o) + 0x00015dca 0x00015dca 0x00000026 Code RO 2181 i.drv_lcdc_config_dpi_timing CVWL368.lib(drv_lcdc.o) + 0x00015df0 0x00015df0 0x00000016 Code RO 2182 i.drv_lcdc_config_edpi_mode CVWL368.lib(drv_lcdc.o) + 0x00015e06 0x00015e06 0x00000016 Code RO 2183 i.drv_lcdc_config_endianness CVWL368.lib(drv_lcdc.o) + 0x00015e1c 0x00015e1c 0x0000000c Code RO 2184 i.drv_lcdc_config_input_size CVWL368.lib(drv_lcdc.o) + 0x00015e28 0x00015e28 0x0000001e Code RO 2185 i.drv_lcdc_config_int CVWL368.lib(drv_lcdc.o) + 0x00015e46 0x00015e46 0x00000022 Code RO 2186 i.drv_lcdc_config_int_single CVWL368.lib(drv_lcdc.o) + 0x00015e68 0x00015e68 0x00000022 Code RO 2187 i.drv_lcdc_config_overwrite CVWL368.lib(drv_lcdc.o) + 0x00015e8a 0x00015e8a 0x0000000c Code RO 2188 i.drv_lcdc_config_overwrite_rgb CVWL368.lib(drv_lcdc.o) + 0x00015e96 0x00015e96 0x0000001a Code RO 2189 i.drv_lcdc_config_partial_display_area CVWL368.lib(drv_lcdc.o) + 0x00015eb0 0x00015eb0 0x00000022 Code RO 2190 i.drv_lcdc_config_partial_display_enable CVWL368.lib(drv_lcdc.o) + 0x00015ed2 0x00015ed2 0x0000001a Code RO 2192 i.drv_lcdc_config_scale_up_coef CVWL368.lib(drv_lcdc.o) + 0x00015eec 0x00015eec 0x0000000c Code RO 2193 i.drv_lcdc_config_scale_up_step CVWL368.lib(drv_lcdc.o) + 0x00015ef8 0x00015ef8 0x0000004c Code RO 2194 i.drv_lcdc_config_src_parameter CVWL368.lib(drv_lcdc.o) + 0x00015f44 0x00015f44 0x00000006 Code RO 2195 i.drv_lcdc_config_thresh CVWL368.lib(drv_lcdc.o) + 0x00015f4a 0x00015f4a 0x00000012 Code RO 2196 i.drv_lcdc_ctrl_flow CVWL368.lib(drv_lcdc.o) + 0x00015f5c 0x00015f5c 0x00000020 Code RO 2198 i.drv_lcdc_enable_shadow_reg CVWL368.lib(drv_lcdc.o) + 0x00015f7c 0x00015f7c 0x00000040 Code RO 2199 i.drv_lcdc_set_int CVWL368.lib(drv_lcdc.o) + 0x00015fbc 0x00015fbc 0x00000014 Code RO 2201 i.drv_lcdc_set_video_hw_mode CVWL368.lib(drv_lcdc.o) + 0x00015fd0 0x00015fd0 0x00000020 Code RO 2202 i.drv_lcdc_start CVWL368.lib(drv_lcdc.o) + 0x00015ff0 0x00015ff0 0x0000000c Code RO 2236 i.drv_memc_clear_status CVWL368.lib(drv_memc.o) + 0x00015ffc 0x00015ffc 0x00000040 Code RO 2237 i.drv_memc_enable_irq CVWL368.lib(drv_memc.o) + 0x0001603c 0x0001603c 0x0000000c Code RO 2238 i.drv_memc_gen_a_tear_signal CVWL368.lib(drv_memc.o) + 0x00016048 0x00016048 0x00000012 Code RO 2239 i.drv_memc_get_status CVWL368.lib(drv_memc.o) + 0x0001605a 0x0001605a 0x00000010 Code RO 2240 i.drv_memc_rate_transfer_sel CVWL368.lib(drv_memc.o) + 0x0001606a 0x0001606a 0x0000000e Code RO 2241 i.drv_memc_sel_vsync CVWL368.lib(drv_memc.o) + 0x00016078 0x00016078 0x00000014 Code RO 2242 i.drv_memc_set_active_height CVWL368.lib(drv_memc.o) + 0x0001608c 0x0001608c 0x0000000c Code RO 2243 i.drv_memc_set_data_mode CVWL368.lib(drv_memc.o) + 0x00016098 0x00016098 0x00000010 Code RO 2246 i.drv_memc_set_double_buffer CVWL368.lib(drv_memc.o) + 0x000160a8 0x000160a8 0x00000012 Code RO 2247 i.drv_memc_set_double_buffer_reverse CVWL368.lib(drv_memc.o) + 0x000160ba 0x000160ba 0x00000010 Code RO 2249 i.drv_memc_set_fs_en_conditions CVWL368.lib(drv_memc.o) + 0x000160ca 0x000160ca 0x00000014 Code RO 2250 i.drv_memc_set_inten CVWL368.lib(drv_memc.o) + 0x000160de 0x000160de 0x00000002 PAD + 0x000160e0 0x000160e0 0x00000018 Code RO 2251 i.drv_memc_set_lcdc_st_conditions CVWL368.lib(drv_memc.o) + 0x000160f8 0x000160f8 0x0000001a Code RO 2252 i.drv_memc_set_ltpo_mode CVWL368.lib(drv_memc.o) + 0x00016112 0x00016112 0x0000000e Code RO 2256 i.drv_memc_set_tear_mode CVWL368.lib(drv_memc.o) + 0x00016120 0x00016120 0x00000028 Code RO 2257 i.drv_memc_set_tear_waveform CVWL368.lib(drv_memc.o) + 0x00016148 0x00016148 0x0000000e Code RO 2259 i.drv_memc_set_vidc_sync_cnt CVWL368.lib(drv_memc.o) + 0x00016156 0x00016156 0x00000002 PAD + 0x00016158 0x00016158 0x00000008 Code RO 1684 i.drv_param_init_get_ccm CVWL368.lib(drv_param_init.o) + 0x00016160 0x00016160 0x00000014 Code RO 1685 i.drv_param_init_get_scld_filter_h CVWL368.lib(drv_param_init.o) + 0x00016174 0x00016174 0x00000014 Code RO 1686 i.drv_param_init_get_scld_filter_v CVWL368.lib(drv_param_init.o) + 0x00016188 0x00016188 0x00000008 Code RO 1687 i.drv_param_init_get_sclu_filter CVWL368.lib(drv_param_init.o) + 0x00016190 0x00016190 0x00000014 Code RO 1688 i.drv_param_init_set_ccm CVWL368.lib(drv_param_init.o) + 0x000161a4 0x000161a4 0x00000064 Code RO 1689 i.drv_param_init_set_scld_filter CVWL368.lib(drv_param_init.o) + 0x00016208 0x00016208 0x00000024 Code RO 1691 i.drv_param_p2r_filter_init CVWL368.lib(drv_param_init.o) + 0x0001622c 0x0001622c 0x00000010 Code RO 2530 i.drv_phy_enable_calibration CVWL368.lib(drv_phy_common.o) + 0x0001623c 0x0001623c 0x0000003c Code RO 2531 i.drv_phy_get_calibration CVWL368.lib(drv_phy_common.o) + 0x00016278 0x00016278 0x00000060 Code RO 2532 i.drv_phy_get_pll_para CVWL368.lib(drv_phy_common.o) + 0x000162d8 0x000162d8 0x00000054 Code RO 2533 i.drv_phy_get_rate_para CVWL368.lib(drv_phy_common.o) + 0x0001632c 0x0001632c 0x00000010 Code RO 2534 i.drv_phy_test_clear CVWL368.lib(drv_phy_common.o) + 0x0001633c 0x0001633c 0x00000018 Code RO 2535 i.drv_phy_test_lock CVWL368.lib(drv_phy_common.o) + 0x00016354 0x00016354 0x00000020 Code RO 2537 i.drv_phy_test_write_1_byte CVWL368.lib(drv_phy_common.o) + 0x00016374 0x00016374 0x00000026 Code RO 2538 i.drv_phy_test_write_2_byte CVWL368.lib(drv_phy_common.o) + 0x0001639a 0x0001639a 0x0000001e Code RO 2539 i.drv_phy_test_write_code CVWL368.lib(drv_phy_common.o) + 0x000163b8 0x000163b8 0x00000020 Code RO 2540 i.drv_phy_test_write_data CVWL368.lib(drv_phy_common.o) + 0x000163d8 0x000163d8 0x00000020 Code RO 1746 i.drv_pwr_set_cp_mode CVWL368.lib(drv_pwr.o) + 0x000163f8 0x000163f8 0x00000018 Code RO 1748 i.drv_pwr_set_pvd_mode CVWL368.lib(drv_pwr.o) + 0x00016410 0x00016410 0x00000038 Code RO 1749 i.drv_pwr_set_system_clk_src CVWL368.lib(drv_pwr.o) + 0x00016448 0x00016448 0x0000000c Code RO 2028 i.drv_rx_phy_test_clear CVWL368.lib(drv_dsi_rx.o) + 0x00016454 0x00016454 0x00000010 Code RO 2029 i.drv_rx_phy_test_lock CVWL368.lib(drv_dsi_rx.o) + 0x00016464 0x00016464 0x00000014 Code RO 2031 i.drv_rx_phy_test_write_1_byte CVWL368.lib(drv_dsi_rx.o) + 0x00016478 0x00016478 0x00000016 Code RO 2032 i.drv_rx_phy_test_write_2_byte CVWL368.lib(drv_dsi_rx.o) + 0x0001648e 0x0001648e 0x0000000a Code RO 2295 i.drv_rxbr_clear_pkt_buffer CVWL368.lib(drv_rxbr.o) + 0x00016498 0x00016498 0x00000004 Code RO 2296 i.drv_rxbr_clear_status0 CVWL368.lib(drv_rxbr.o) + 0x0001649c 0x0001649c 0x0000005a Code RO 2298 i.drv_rxbr_enable_irq CVWL368.lib(drv_rxbr.o) + 0x000164f6 0x000164f6 0x00000002 PAD + 0x000164f8 0x000164f8 0x00000014 Code RO 2299 i.drv_rxbr_frame_drop_cfg CVWL368.lib(drv_rxbr.o) + 0x0001650c 0x0001650c 0x00000064 Code RO 2300 i.drv_rxbr_get_clk CVWL368.lib(drv_rxbr.o) + 0x00016570 0x00016570 0x00000004 Code RO 2301 i.drv_rxbr_get_col_addr CVWL368.lib(drv_rxbr.o) + 0x00016574 0x00016574 0x00000012 Code RO 1908 i.drv_rxbr_get_int_source CVWL368.lib(hal_internal_vsync.o) + 0x00016586 0x00016586 0x00000004 Code RO 2304 i.drv_rxbr_get_page_addr CVWL368.lib(drv_rxbr.o) + 0x0001658a 0x0001658a 0x00000012 Code RO 1909 i.drv_rxbr_get_status0 CVWL368.lib(hal_internal_vsync.o) + 0x0001659c 0x0001659c 0x0000000c Code RO 2306 i.drv_rxbr_hline_rcv0_cfg CVWL368.lib(drv_rxbr.o) + 0x000165a8 0x000165a8 0x00000008 Code RO 2307 i.drv_rxbr_hline_rcv_cfg CVWL368.lib(drv_rxbr.o) + 0x000165b0 0x000165b0 0x0000000c Code RO 2308 i.drv_rxbr_register_irq0_callback CVWL368.lib(drv_rxbr.o) + 0x000165bc 0x000165bc 0x0000000c Code RO 2309 i.drv_rxbr_register_irq1_callback CVWL368.lib(drv_rxbr.o) + 0x000165c8 0x000165c8 0x00000014 Code RO 2310 i.drv_rxbr_set_ack_pkt_header CVWL368.lib(drv_rxbr.o) + 0x000165dc 0x000165dc 0x000000cc Code RO 2311 i.drv_rxbr_set_cmd_filter CVWL368.lib(drv_rxbr.o) + 0x000166a8 0x000166a8 0x00000014 Code RO 2313 i.drv_rxbr_set_color_format CVWL368.lib(drv_rxbr.o) + 0x000166bc 0x000166bc 0x00000014 Code RO 2315 i.drv_rxbr_set_inten CVWL368.lib(drv_rxbr.o) + 0x000166d0 0x000166d0 0x00000010 Code RO 2316 i.drv_rxbr_set_ltpo_drop_th CVWL368.lib(drv_rxbr.o) + 0x000166e0 0x000166e0 0x00000026 Code RO 2318 i.drv_rxbr_set_usr_cfg CVWL368.lib(drv_rxbr.o) + 0x00016706 0x00016706 0x00000008 Code RO 2319 i.drv_rxbr_set_usr_col CVWL368.lib(drv_rxbr.o) + 0x0001670e 0x0001670e 0x00000008 Code RO 2320 i.drv_rxbr_set_usr_row CVWL368.lib(drv_rxbr.o) + 0x00016716 0x00016716 0x00000002 PAD + 0x00016718 0x00016718 0x00000020 Code RO 1794 i.drv_spi_m_read_data CVWL368.lib(drv_spi_master.o) + 0x00016738 0x00016738 0x0000001c Code RO 1819 i.drv_swire_enable CVWL368.lib(drv_swire.o) + 0x00016754 0x00016754 0x00000054 Code RO 1822 i.drv_swire_set_int CVWL368.lib(drv_swire.o) + 0x000167a8 0x000167a8 0x0000001c Code RO 1823 i.drv_swire_set_power_down CVWL368.lib(drv_swire.o) + 0x000167c4 0x000167c4 0x0000000c Code RO 1838 i.drv_sys_cfg_clear_all_int CVWL368.lib(drv_sys_cfg.o) + 0x000167d0 0x000167d0 0x00000028 Code RO 1839 i.drv_sys_cfg_clear_pending CVWL368.lib(drv_sys_cfg.o) + 0x000167f8 0x000167f8 0x00000018 Code RO 1842 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL368.lib(drv_sys_cfg.o) + 0x00016810 0x00016810 0x0000001c Code RO 1843 i.drv_sys_cfg_sel_ap_rst_trig CVWL368.lib(drv_sys_cfg.o) + 0x0001682c 0x0001682c 0x00000024 Code RO 1844 i.drv_sys_cfg_sel_gpio_group CVWL368.lib(drv_sys_cfg.o) + 0x00016850 0x00016850 0x00000024 Code RO 1845 i.drv_sys_cfg_sel_int_trig CVWL368.lib(drv_sys_cfg.o) + 0x00016874 0x00016874 0x00000010 Code RO 1847 i.drv_sys_cfg_set_dma_rx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016884 0x00016884 0x00000010 Code RO 1848 i.drv_sys_cfg_set_dma_tx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016894 0x00016894 0x00000024 Code RO 1849 i.drv_sys_cfg_set_int CVWL368.lib(drv_sys_cfg.o) + 0x000168b8 0x000168b8 0x0000001a Code RO 1872 i.drv_timer_clear_status_flags CVWL368.lib(drv_timer.o) + 0x000168d2 0x000168d2 0x00000020 Code RO 1873 i.drv_timer_enable CVWL368.lib(drv_timer.o) + 0x000168f2 0x000168f2 0x00000002 PAD + 0x000168f4 0x000168f4 0x00000010 Code RO 1874 i.drv_timer_get_instance CVWL368.lib(drv_timer.o) + 0x00016904 0x00016904 0x00000010 Code RO 1875 i.drv_timer_get_prescaler CVWL368.lib(drv_timer.o) + 0x00016914 0x00016914 0x00000044 Code RO 1877 i.drv_timer_handle_interrupt CVWL368.lib(drv_timer.o) + 0x00016958 0x00016958 0x00000014 Code RO 1878 i.drv_timer_register_callback CVWL368.lib(drv_timer.o) + 0x0001696c 0x0001696c 0x00000010 Code RO 1879 i.drv_timer_set_compare_val CVWL368.lib(drv_timer.o) + 0x0001697c 0x0001697c 0x00000054 Code RO 1880 i.drv_timer_set_int CVWL368.lib(drv_timer.o) + 0x000169d0 0x000169d0 0x00000028 Code RO 1881 i.drv_timer_set_prescaler CVWL368.lib(drv_timer.o) + 0x000169f8 0x000169f8 0x00000010 Code RO 1882 i.drv_timer_set_repeat CVWL368.lib(drv_timer.o) + 0x00016a08 0x00016a08 0x0000000a Code RO 2111 i.drv_tx_phy_test_clear CVWL368.lib(drv_dsi_tx.o) + 0x00016a12 0x00016a12 0x0000001c Code RO 2112 i.drv_tx_phy_test_enter CVWL368.lib(drv_dsi_tx.o) + 0x00016a2e 0x00016a2e 0x0000001c Code RO 2113 i.drv_tx_phy_test_exit CVWL368.lib(drv_dsi_tx.o) + 0x00016a4a 0x00016a4a 0x00000012 Code RO 2115 i.drv_tx_phy_test_write_1_byte CVWL368.lib(drv_dsi_tx.o) + 0x00016a5c 0x00016a5c 0x00000014 Code RO 2116 i.drv_tx_phy_test_write_2_byte CVWL368.lib(drv_dsi_tx.o) + 0x00016a70 0x00016a70 0x00000010 Code RO 2117 i.drv_tx_phy_test_write_code CVWL368.lib(drv_dsi_tx.o) + 0x00016a80 0x00016a80 0x00000008 Code RO 2359 i.drv_vidc_clear_irq CVWL368.lib(drv_vidc.o) + 0x00016a88 0x00016a88 0x00000018 Code RO 2363 i.drv_vidc_enable CVWL368.lib(drv_vidc.o) + 0x00016aa0 0x00016aa0 0x00000040 Code RO 2364 i.drv_vidc_enable_irq CVWL368.lib(drv_vidc.o) + 0x00016ae0 0x00016ae0 0x00000012 Code RO 2366 i.drv_vidc_get_irq_status CVWL368.lib(drv_vidc.o) + 0x00016af2 0x00016af2 0x00000002 PAD + 0x00016af4 0x00016af4 0x00000028 Code RO 2370 i.drv_vidc_init_module_enable CVWL368.lib(drv_vidc.o) + 0x00016b1c 0x00016b1c 0x0000000c Code RO 2371 i.drv_vidc_register_callback CVWL368.lib(drv_vidc.o) + 0x00016b28 0x00016b28 0x00000006 Code RO 2372 i.drv_vidc_reset CVWL368.lib(drv_vidc.o) + 0x00016b2e 0x00016b2e 0x0000003c Code RO 2374 i.drv_vidc_set_dst_parameter CVWL368.lib(drv_vidc.o) + 0x00016b6a 0x00016b6a 0x00000014 Code RO 2378 i.drv_vidc_set_irqen CVWL368.lib(drv_vidc.o) + 0x00016b7e 0x00016b7e 0x00000010 Code RO 2379 i.drv_vidc_set_mirror CVWL368.lib(drv_vidc.o) + 0x00016b8e 0x00016b8e 0x00000008 Code RO 2382 i.drv_vidc_set_p2r_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016b96 0x00016b96 0x00000026 Code RO 2383 i.drv_vidc_set_p2r_hinitb CVWL368.lib(drv_vidc.o) + 0x00016bbc 0x00016bbc 0x00000026 Code RO 2384 i.drv_vidc_set_p2r_hinitr CVWL368.lib(drv_vidc.o) + 0x00016be2 0x00016be2 0x00000002 PAD + 0x00016be4 0x00016be4 0x00000018 Code RO 2385 i.drv_vidc_set_pentile_swap CVWL368.lib(drv_vidc.o) + 0x00016bfc 0x00016bfc 0x0000000a Code RO 2386 i.drv_vidc_set_pu_ctrl CVWL368.lib(drv_vidc.o) + 0x00016c06 0x00016c06 0x00000010 Code RO 2387 i.drv_vidc_set_rotation CVWL368.lib(drv_vidc.o) + 0x00016c16 0x00016c16 0x0000000a Code RO 2388 i.drv_vidc_set_scld_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016c20 0x00016c20 0x0000000a Code RO 2389 i.drv_vidc_set_scld_hcoef1 CVWL368.lib(drv_vidc.o) + 0x00016c2a 0x00016c2a 0x00000012 Code RO 2390 i.drv_vidc_set_scld_step CVWL368.lib(drv_vidc.o) + 0x00016c3c 0x00016c3c 0x0000000a Code RO 2391 i.drv_vidc_set_scld_vcoef0 CVWL368.lib(drv_vidc.o) + 0x00016c46 0x00016c46 0x0000000a Code RO 2392 i.drv_vidc_set_scld_vcoef1 CVWL368.lib(drv_vidc.o) + 0x00016c50 0x00016c50 0x00000016 Code RO 2393 i.drv_vidc_set_src_parameter CVWL368.lib(drv_vidc.o) + 0x00016c66 0x00016c66 0x00000002 PAD + 0x00016c68 0x00016c68 0x00000010 Code RO 2769 i.drv_wdg_clear_counter CVWL368.lib(drv_wdg.o) + 0x00016c78 0x00016c78 0x00000010 Code RO 2770 i.drv_wdg_clear_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016c88 0x00016c88 0x00000010 Code RO 2773 i.drv_wdg_read_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016c98 0x00016c98 0x00000040 Code RO 2776 i.drv_wdg_set_int CVWL368.lib(drv_wdg.o) + 0x00016cd8 0x00016cd8 0x0000000a Code RO 1467 i.fls_clr_interrupt_flag CVWL368.lib(drv_fls.o) + 0x00016ce2 0x00016ce2 0x00000014 Code RO 1038 i.fputc CVWL368.lib(tau_log.o) + 0x00016cf6 0x00016cf6 0x00000002 PAD + 0x00016cf8 0x00016cf8 0x00000034 Code RO 579 i.hal_dsi_rx_ctrl_create_handle CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016d2c 0x00016d2c 0x0000009c Code RO 581 i.hal_dsi_rx_ctrl_deinit CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016dc8 0x00016dc8 0x00000084 Code RO 583 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e4c 0x00016e4c 0x00000028 Code RO 585 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e74 0x00016e74 0x00000010 Code RO 586 i.hal_dsi_rx_ctrl_get_compressen_en CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e84 0x00016e84 0x00000028 Code RO 587 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016eac 0x00016eac 0x00000060 Code RO 589 i.hal_dsi_rx_ctrl_init CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016f0c 0x00016f0c 0x000001a4 Code RO 590 i.hal_dsi_rx_ctrl_init_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000170b0 0x000170b0 0x000000d8 Code RO 591 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017188 0x00017188 0x00000158 Code RO 592 i.hal_dsi_rx_ctrl_init_memc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000172e0 0x000172e0 0x00000148 Code RO 593 i.hal_dsi_rx_ctrl_init_rxbr CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017428 0x00017428 0x0000022c Code RO 594 i.hal_dsi_rx_ctrl_init_vidc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017654 0x00017654 0x000000f0 Code RO 598 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017744 0x00017744 0x0000006c Code RO 601 i.hal_dsi_rx_ctrl_set_cus_scld_filter CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000177b0 0x000177b0 0x00000034 Code RO 602 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000177e4 0x000177e4 0x00000038 Code RO 606 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001781c 0x0001781c 0x00000072 Code RO 611 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001788e 0x0001788e 0x00000002 PAD + 0x00017890 0x00017890 0x00000034 Code RO 612 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000178c4 0x000178c4 0x0000000e Code RO 614 i.hal_dsi_rx_ctrl_set_tear_mode_ex CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000178d2 0x000178d2 0x00000002 PAD + 0x000178d4 0x000178d4 0x0000003c Code RO 615 i.hal_dsi_rx_ctrl_start CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017910 0x00017910 0x0000003c Code RO 616 i.hal_dsi_rx_ctrl_stop CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001794c 0x0001794c 0x00000020 Code RO 619 i.hal_dsi_rx_ctrl_toggle_resolution_ex CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001796c 0x0001796c 0x00000190 Code RO 672 i.hal_dsi_tx_calc_video_chunks CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017afc 0x00017afc 0x00000034 Code RO 673 i.hal_dsi_tx_config_params_for_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017b30 0x00017b30 0x00000450 Code RO 674 i.hal_dsi_tx_count_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017f80 0x00017f80 0x0000002c Code RO 677 i.hal_dsi_tx_ctrl_create_handle CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017fac 0x00017fac 0x00000084 Code RO 678 i.hal_dsi_tx_ctrl_deinit CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018030 0x00018030 0x0000004c Code RO 682 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001807c 0x0001807c 0x00000028 Code RO 684 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180a4 0x000180a4 0x000000a4 Code RO 686 i.hal_dsi_tx_ctrl_init CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018148 0x00018148 0x00000024 Code RO 687 i.hal_dsi_tx_ctrl_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001816c 0x0001816c 0x0000000c Code RO 688 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018178 0x00018178 0x0000008c Code RO 689 i.hal_dsi_tx_ctrl_read_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018204 0x00018204 0x00000020 Code RO 691 i.hal_dsi_tx_ctrl_set_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018224 0x00018224 0x00000014 Code RO 697 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018238 0x00018238 0x00000010 Code RO 698 i.hal_dsi_tx_ctrl_set_partial_disp CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018248 0x00018248 0x00000024 Code RO 699 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001826c 0x0001826c 0x0000009c Code RO 702 i.hal_dsi_tx_ctrl_start CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018308 0x00018308 0x00000044 Code RO 703 i.hal_dsi_tx_ctrl_stop CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001834c 0x0001834c 0x000000d8 Code RO 704 i.hal_dsi_tx_ctrl_write_array_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018424 0x00018424 0x000000b0 Code RO 705 i.hal_dsi_tx_ctrl_write_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000184d4 0x000184d4 0x00000044 Code RO 706 i.hal_dsi_tx_init_data_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018518 0x00018518 0x00000030 Code RO 707 i.hal_dsi_tx_init_dpi_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018548 0x00018548 0x00000020 Code RO 708 i.hal_dsi_tx_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018568 0x00018568 0x00000020 Code RO 709 i.hal_dsi_tx_init_phy_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018588 0x00018588 0x00000094 Code RO 710 i.hal_dsi_tx_init_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001861c 0x0001861c 0x00000058 Code RO 711 i.hal_dsi_tx_init_video_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018674 0x00018674 0x00000044 Code RO 712 i.hal_dsi_tx_send_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000186b8 0x000186b8 0x00000018 Code RO 777 i.hal_gpio_ctrl_eint CVWL368.lib(hal_gpio.o) + 0x000186d0 0x000186d0 0x00000012 Code RO 778 i.hal_gpio_get_input_data CVWL368.lib(hal_gpio.o) + 0x000186e2 0x000186e2 0x00000002 PAD + 0x000186e4 0x000186e4 0x00000040 Code RO 781 i.hal_gpio_init_eint CVWL368.lib(hal_gpio.o) + 0x00018724 0x00018724 0x00000020 Code RO 782 i.hal_gpio_init_input CVWL368.lib(hal_gpio.o) + 0x00018744 0x00018744 0x00000028 Code RO 783 i.hal_gpio_init_output CVWL368.lib(hal_gpio.o) + 0x0001876c 0x0001876c 0x00000018 Code RO 784 i.hal_gpio_reg_eint_cb CVWL368.lib(hal_gpio.o) + 0x00018784 0x00018784 0x00000050 Code RO 785 i.hal_gpio_set_ap_reset_int CVWL368.lib(hal_gpio.o) + 0x000187d4 0x000187d4 0x00000060 Code RO 787 i.hal_gpio_set_mode CVWL368.lib(hal_gpio.o) + 0x00018834 0x00018834 0x00000008 Code RO 788 i.hal_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x0001883c 0x0001883c 0x00000020 Code RO 790 i.hal_gpio_set_pull_state CVWL368.lib(hal_gpio.o) + 0x0001885c 0x0001885c 0x0000006c Code RO 816 i.hal_i2c_m_dma_init CVWL368.lib(hal_i2c_master.o) + 0x000188c8 0x000188c8 0x00000020 Code RO 817 i.hal_i2c_m_dma_read CVWL368.lib(hal_i2c_master.o) + 0x000188e8 0x000188e8 0x0000001c Code RO 818 i.hal_i2c_m_dma_write CVWL368.lib(hal_i2c_master.o) + 0x00018904 0x00018904 0x0000000c Code RO 820 i.hal_i2c_m_transfer_complate CVWL368.lib(hal_i2c_master.o) + 0x00018910 0x00018910 0x00000020 Code RO 821 i.hal_i2c_master_irq_callback CVWL368.lib(hal_i2c_master.o) + 0x00018930 0x00018930 0x00000010 Code RO 835 i.hal_i2c_s_dma_user_callback CVWL368.lib(hal_i2c_slave.o) + 0x00018940 0x00018940 0x0000004c Code RO 836 i.hal_i2c_s_dma_write CVWL368.lib(hal_i2c_slave.o) + 0x0001898c 0x0001898c 0x000000c8 Code RO 838 i.hal_i2c_s_init CVWL368.lib(hal_i2c_slave.o) + 0x00018a54 0x00018a54 0x00000014 Code RO 839 i.hal_i2c_s_nonblocking_read CVWL368.lib(hal_i2c_slave.o) + 0x00018a68 0x00018a68 0x0000000c Code RO 847 i.hal_i2c_s_set_transfer CVWL368.lib(hal_i2c_slave.o) + 0x00018a74 0x00018a74 0x00000174 Code RO 850 i.hal_i2c_slave_irq_callback CVWL368.lib(hal_i2c_slave.o) + 0x00018be8 0x00018be8 0x000000fc Code RO 1910 i.hal_internal_init_memc CVWL368.lib(hal_internal_vsync.o) + 0x00018ce4 0x00018ce4 0x00000010 Code RO 1912 i.hal_internal_sync_get_fb_setting CVWL368.lib(hal_internal_vsync.o) + 0x00018cf4 0x00018cf4 0x00000010 Code RO 1913 i.hal_internal_sync_get_hight_performan_mode CVWL368.lib(hal_internal_vsync.o) + 0x00018d04 0x00018d04 0x000001d4 Code RO 1915 i.hal_internal_sync_input_resolution_change_ex CVWL368.lib(hal_internal_vsync.o) + 0x00018ed8 0x00018ed8 0x00000010 Code RO 1917 i.hal_internal_update_dpi_param CVWL368.lib(hal_internal_vsync.o) + 0x00018ee8 0x00018ee8 0x0000010c Code RO 1918 i.hal_internal_video_mode_auto_sync CVWL368.lib(hal_internal_vsync.o) + 0x00018ff4 0x00018ff4 0x00000028 Code RO 1919 i.hal_internal_vsync_deinit CVWL368.lib(hal_internal_vsync.o) + 0x0001901c 0x0001901c 0x0000000c Code RO 1920 i.hal_internal_vsync_get_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00019028 0x00019028 0x00000018 Code RO 1921 i.hal_internal_vsync_get_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00019040 0x00019040 0x0000000c Code RO 1922 i.hal_internal_vsync_get_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x0001904c 0x0001904c 0x0000000c Code RO 1923 i.hal_internal_vsync_get_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00019058 0x00019058 0x00000118 Code RO 1924 i.hal_internal_vsync_init_rx CVWL368.lib(hal_internal_vsync.o) + 0x00019170 0x00019170 0x000000b0 Code RO 1925 i.hal_internal_vsync_init_tx CVWL368.lib(hal_internal_vsync.o) + 0x00019220 0x00019220 0x0000011c Code RO 1926 i.hal_internal_vsync_set_auto_hw_filter CVWL368.lib(hal_internal_vsync.o) + 0x0001933c 0x0001933c 0x00000014 Code RO 1928 i.hal_internal_vsync_set_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00019350 0x00019350 0x00000024 Code RO 1929 i.hal_internal_vsync_set_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00019374 0x00019374 0x00000050 Code RO 1930 i.hal_internal_vsync_set_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x000193c4 0x000193c4 0x00000080 Code RO 1931 i.hal_internal_vsync_set_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00019444 0x00019444 0x00000024 Code RO 713 i.hal_lcdc_config_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019468 0x00019468 0x00000058 Code RO 714 i.hal_lcdc_config_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000194c0 0x000194c0 0x00000014 Code RO 715 i.hal_lcdc_config_rgb_to_pentile CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000194d4 0x000194d4 0x00000164 Code RO 716 i.hal_lcdc_config_upscaler CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019638 0x00019638 0x00000040 Code RO 717 i.hal_lcdc_init_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019678 0x00019678 0x000001b0 Code RO 718 i.hal_lcdc_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019828 0x00019828 0x00000040 Code RO 719 i.hal_lcdc_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019868 0x00019868 0x0000000e Code RO 928 i.hal_spi_m_clear_rxfifo CVWL368.lib(hal_spi_master.o) + 0x00019876 0x00019876 0x00000012 Code RO 952 i.hal_swire_deinit CVWL368.lib(hal_swire.o) + 0x00019888 0x00019888 0x00000016 Code RO 954 i.hal_swire_open CVWL368.lib(hal_swire.o) + 0x0001989e 0x0001989e 0x00000008 Code RO 969 i.hal_system_enable_systick CVWL368.lib(hal_system.o) + 0x000198a6 0x000198a6 0x00000002 PAD + 0x000198a8 0x000198a8 0x00000088 Code RO 977 i.hal_system_init CVWL368.lib(hal_system.o) + 0x00019930 0x00019930 0x0000001c Code RO 978 i.hal_system_init_console CVWL368.lib(hal_system.o) + 0x0001994c 0x0001994c 0x00000008 Code RO 981 i.hal_system_set_phy_calibration CVWL368.lib(hal_system.o) + 0x00019954 0x00019954 0x00000008 Code RO 982 i.hal_system_set_pvd CVWL368.lib(hal_system.o) + 0x0001995c 0x0001995c 0x00000008 Code RO 983 i.hal_system_set_vcc CVWL368.lib(hal_system.o) + 0x00019964 0x00019964 0x0000002e Code RO 1010 i.hal_timer_deinit CVWL368.lib(hal_timer.o) + 0x00019992 0x00019992 0x0000001a Code RO 1012 i.hal_timer_init CVWL368.lib(hal_timer.o) + 0x000199ac 0x000199ac 0x00000048 Code RO 1014 i.hal_timer_start CVWL368.lib(hal_timer.o) + 0x000199f4 0x000199f4 0x00000028 Code RO 1016 i.hal_timer_stop CVWL368.lib(hal_timer.o) + 0x00019a1c 0x00019a1c 0x0000008c Code RO 1192 i.hal_uart_init CVWL368.lib(hal_uart.o) + 0x00019aa8 0x00019aa8 0x00000010 Code RO 1195 i.hal_uart_transmit_blocking CVWL368.lib(hal_uart.o) + 0x00019ab8 0x00019ab8 0x000001dc Code RO 1934 i.hal_vsync_reset_lcdc_scaler CVWL368.lib(hal_internal_vsync.o) + 0x00019c94 0x00019c94 0x00000110 Code RO 2469 i.handle_init CVWL368.lib(irq_redirect .o) + 0x00019da4 0x00019da4 0x00000060 Code RO 115 i.init_mipi_tx ap_demo.o + 0x00019e04 0x00019e04 0x000000e0 Code RO 116 i.init_panel ap_demo.o + 0x00019ee4 0x00019ee4 0x0000000a Code RO 3 i.main main.o + 0x00019eee 0x00019eee 0x00000002 PAD + 0x00019ef0 0x00019ef0 0x0000009c Code RO 117 i.open_mipi_rx ap_demo.o + 0x00019f8c 0x00019f8c 0x00000038 Code RO 118 i.pps_update_handle ap_demo.o + 0x00019fc4 0x00019fc4 0x000003f4 Code RO 1935 i.rx_get_dcs_packet_data CVWL368.lib(hal_internal_vsync.o) + 0x0001a3b8 0x0001a3b8 0x00000178 Code RO 1936 i.rx_partial_update CVWL368.lib(hal_internal_vsync.o) + 0x0001a530 0x0001a530 0x0000008c Code RO 1937 i.rx_receive_packet CVWL368.lib(hal_internal_vsync.o) + 0x0001a5bc 0x0001a5bc 0x00000180 Code RO 1938 i.rx_receive_pps CVWL368.lib(hal_internal_vsync.o) + 0x0001a73c 0x0001a73c 0x000000a4 Code RO 1939 i.rxbr_irq0_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a7e0 0x0001a7e0 0x000001d4 Code RO 1940 i.rxbr_irq1_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a9b4 0x0001a9b4 0x00000024 Code RO 119 i.send_panel_init_code ap_demo.o + 0x0001a9d8 0x0001a9d8 0x000000c4 Code RO 1941 i.soft_gen_te CVWL368.lib(hal_internal_vsync.o) + 0x0001aa9c 0x0001aa9c 0x000000c0 Code RO 1942 i.soft_gen_te_double_buffer CVWL368.lib(hal_internal_vsync.o) + 0x0001ab5c 0x0001ab5c 0x00000040 Code RO 120 i.soft_timer3_cb ap_demo.o + 0x0001ab9c 0x0001ab9c 0x00000048 Code RO 2796 i.sqrt m_ps.l(sqrt.o) + 0x0001abe4 0x0001abe4 0x00000060 Code RO 122 i.tx_display_on ap_demo.o + 0x0001ac44 0x0001ac44 0x00000028 Code RO 123 i.tx_panel_reset ap_demo.o + 0x0001ac6c 0x0001ac6c 0x00000108 Code RO 1943 i.vidc_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001ad74 0x0001ad74 0x000000d0 Code RO 1944 i.vpre_err_reset CVWL368.lib(hal_internal_vsync.o) + 0x0001ae44 0x0001ae44 0x000001cc Code RO 1945 i.vsync_set_te_mode CVWL368.lib(hal_internal_vsync.o) + 0x0001b010 0x0001b010 0x00002956 Data RO 124 .constdata ap_demo.o + 0x0001d966 0x0001d966 0x00000002 PAD + 0x0001d968 0x0001d968 0x00000024 Data RO 721 .constdata CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001d98c 0x0001d98c 0x000000d2 Data RO 793 .constdata CVWL368.lib(hal_gpio.o) + 0x0001da5e 0x0001da5e 0x00000002 PAD + 0x0001da60 0x0001da60 0x00000020 Data RO 851 .constdata CVWL368.lib(hal_i2c_slave.o) + 0x0001da80 0x0001da80 0x00000fa6 Data RO 1052 .constdata WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x0001ea26 0x0001ea26 0x00000001 Data RO 1075 .constdata WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x0001ea27 0x0001ea27 0x00000001 PAD + 0x0001ea28 0x0001ea28 0x00000008 Data RO 1692 .constdata CVWL368.lib(drv_param_init.o) + 0x0001ea30 0x0001ea30 0x00000186 Data RO 2541 .constdata CVWL368.lib(drv_phy_common.o) + 0x0001ebb6 0x0001ebb6 0x00000002 PAD + 0x0001ebb8 0x0001ebb8 0x00000048 Data RO 621 .conststring CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001ec00 0x0001ec00 0x00000043 Data RO 722 .conststring CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001ec43 0x0001ec43 0x00000001 PAD + 0x0001ec44 0x0001ec44 0x000000e0 Data RO 1947 .conststring CVWL368.lib(hal_internal_vsync.o) + 0x0001ed24 0x0001ed24 0x00000030 Data RO 3158 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001ed54, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001ed54, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2470 .ARM.__AT_0x00070100 CVWL368.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001ed54, Size: 0x00005160, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x00001074]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x00000228 Data RW 125 .data ap_demo.o + 0x000703f8 COMPRESSED 0x00000017 Data RW 311 .data app_tp_transfer.o + 0x0007040f COMPRESSED 0x00000028 Data RW 463 .data app_tp_st_touch.o + 0x00070437 COMPRESSED 0x00000001 PAD + 0x00070438 COMPRESSED 0x00000008 Data RW 622 .data CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00070440 COMPRESSED 0x00000003 Data RW 723 .data CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00070443 COMPRESSED 0x00000001 Data RW 822 .data CVWL368.lib(hal_i2c_master.o) + 0x00070444 COMPRESSED 0x00000020 Data RW 852 .data CVWL368.lib(hal_i2c_slave.o) + 0x00070464 COMPRESSED 0x00001686 Data RW 1076 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071aea COMPRESSED 0x00000001 Data RW 1079 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071aeb COMPRESSED 0x00000001 Data RW 1080 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071aec COMPRESSED 0x00000001 Data RW 1085 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071aed COMPRESSED 0x00000003 Data RW 1086 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071af0 COMPRESSED 0x00000005 Data RW 1087 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071af5 COMPRESSED 0x00000001 Data RW 1097 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071af6 COMPRESSED 0x00000002 PAD + 0x00071af8 COMPRESSED 0x00000030 Data RW 1098 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071b28 COMPRESSED 0x00000012 Data RW 1249 .data CVWL368.lib(norflash.o) + 0x00071b3a COMPRESSED 0x00000002 PAD + 0x00071b3c COMPRESSED 0x0000000c Data RW 1303 .data CVWL368.lib(drv_common.o) + 0x00071b48 COMPRESSED 0x00000004 Data RW 1570 .data CVWL368.lib(drv_gpio.o) + 0x00071b4c COMPRESSED 0x00000008 Data RW 1608 .data CVWL368.lib(drv_i2c_dma.o) + 0x00071b54 COMPRESSED 0x00000004 Data RW 1637 .data CVWL368.lib(drv_i2c_master.o) + 0x00071b58 COMPRESSED 0x00000004 Data RW 1668 .data CVWL368.lib(drv_i2c_slave.o) + 0x00071b5c COMPRESSED 0x000004a4 Data RW 1693 .data CVWL368.lib(drv_param_init.o) + 0x00072000 COMPRESSED 0x0000000c Data RW 1723 .data CVWL368.lib(drv_pwm.o) + 0x0007200c COMPRESSED 0x00000004 Data RW 1799 .data CVWL368.lib(drv_spi_master.o) + 0x00072010 COMPRESSED 0x00000008 Data RW 1825 .data CVWL368.lib(drv_swire.o) + 0x00072018 COMPRESSED 0x00000001 Data RW 1850 .data CVWL368.lib(drv_sys_cfg.o) + 0x00072019 COMPRESSED 0x00000003 PAD + 0x0007201c COMPRESSED 0x00000050 Data RW 1883 .data CVWL368.lib(drv_timer.o) + 0x0007206c COMPRESSED 0x0000000c Data RW 1948 .data CVWL368.lib(hal_internal_vsync.o) + 0x00072078 COMPRESSED 0x00000008 Data RW 2322 .data CVWL368.lib(drv_rxbr.o) + 0x00072080 COMPRESSED 0x00000004 Data RW 2395 .data CVWL368.lib(drv_vidc.o) + 0x00072084 COMPRESSED 0x00000001 Data RW 2542 .data CVWL368.lib(drv_phy_common.o) + 0x00072085 COMPRESSED 0x00000003 PAD + 0x00072088 COMPRESSED 0x0000000c Data RW 2562 .data CVWL368.lib(drv_chip_info.o) + 0x00072094 COMPRESSED 0x00000008 Data RW 2711 .data CVWL368.lib(drv_uart.o) + 0x0007209c COMPRESSED 0x0000000c Data RW 2778 .data CVWL368.lib(drv_wdg.o) + 0x000720a8 COMPRESSED 0x00000004 Data RW 3127 .data mc_p.l(stdout.o) + 0x000720ac COMPRESSED 0x00000004 Data RW 3139 .data mc_p.l(errno.o) + 0x000720b0 - 0x00000190 Zero RW 310 .bss app_tp_transfer.o + 0x00072240 - 0x0000000c Zero RW 461 .bss app_tp_st_touch.o + 0x0007224c - 0x000000c4 Zero RW 620 .bss CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00072310 - 0x0000004c Zero RW 720 .bss CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0007235c - 0x00000100 Zero RW 1039 .bss CVWL368.lib(tau_log.o) + 0x0007245c - 0x0000028e Zero RW 1050 .bss WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x000726ea COMPRESSED 0x00000002 PAD + 0x000726ec - 0x000000d0 Zero RW 1197 .bss CVWL368.lib(hal_uart.o) + 0x000727bc - 0x0000001c Zero RW 1432 .bss CVWL368.lib(drv_dma.o) + 0x000727d8 - 0x00000040 Zero RW 1569 .bss CVWL368.lib(drv_gpio.o) + 0x00072818 - 0x00000140 Zero RW 1607 .bss CVWL368.lib(drv_i2c_dma.o) + 0x00072958 - 0x00000984 Zero RW 1946 .bss CVWL368.lib(hal_internal_vsync.o) + 0x000732dc - 0x00001030 Zero RW 1999 .bss CVWL368.lib(dcs_packet_fifo.o) + 0x0007430c - 0x00000020 Zero RW 2606 .bss CVWL368.lib(hal_spi_slave.o) + 0x0007432c COMPRESSED 0x00000004 PAD + 0x00074330 - 0x00001000 Zero RW 568 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 3110 534 10582 552 0 38056 ap_demo.o + 1106 218 0 40 12 9976 app_tp_st_touch.o + 1038 108 0 23 400 13662 app_tp_transfer.o + 36 6 0 0 0 505 board.o + 10 0 0 0 0 5655 main.o + 120 18 192 0 4096 2076 startup_armcm0.o + + ---------------------------------------------------------------------- + 5428 884 10824 616 4508 69930 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 8 0 2 1 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 272 96 0 12 0 256 drv_chip_info.o + 192 82 24 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 410 28 0 0 28 796 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1644 494 0 0 0 1336 drv_dsi_rx.o + 1532 118 0 0 0 2488 drv_dsi_tx.o + 132 0 0 0 0 256 drv_efuse.o + 10 0 0 0 0 60 drv_fls.o + 796 112 0 4 64 1236 drv_gpio.o + 600 82 0 8 320 624 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 292 36 0 4 0 580 drv_i2c_slave.o + 680 6 0 0 0 1444 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 212 44 8 1188 0 452 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 72 10 0 12 0 76 drv_pwm.o + 112 24 0 0 0 180 drv_pwr.o + 722 84 0 8 0 1456 drv_rxbr.o + 104 24 0 4 0 188 drv_spi_master.o + 172 20 0 8 0 260 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 374 34 0 80 0 932 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 168 22 0 12 0 316 drv_wdg.o + 3210 316 72 8 196 1680 hal_dsi_rx_ctrl.o + 4464 308 103 3 76 2492 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 696 72 32 32 0 408 hal_i2c_slave.o + 8420 1710 224 12 2436 2696 hal_internal_vsync.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 40 0 0 0 0 136 hal_swire.o + 196 32 0 0 0 408 hal_system.o + 184 6 0 0 0 276 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 1976 86 4007 5826 654 18470 app_tp_for_custom_s8.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 96 0 0 0 0 0 __dclz77c.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 39428 4938 5076 7288 8612 53598 Library Totals + 46 0 6 10 6 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 32016 4646 1063 1444 7952 31852 CVWL368.lib + 1976 86 4007 5826 654 18470 WL368_S10LITE_CSOT667_TP.lib + 272 26 0 0 0 152 m_ps.l + 2848 126 0 8 0 1264 mc_p.l + 2270 54 0 0 0 1860 mf_p.l + + ---------------------------------------------------------------------- + 39428 4938 5076 7288 8612 53598 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 44856 5822 15900 7904 13120 98648 Grand Totals + 44856 5822 15900 4212 13120 98648 ELF Image Totals (compressed) + 44856 5822 15900 4212 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 60756 ( 59.33kB) + Total RW Size (RW Data + ZI Data) 21024 ( 20.53kB) + Total ROM Size (Code + RO Data + RW Data) 64968 ( 63.45kB) + +============================================================================== + diff --git a/project/ISP_368/Listings/WL368_S10LITE_CSOT667_V100_20230714.map b/project/ISP_368/Listings/WL368_S10LITE_CSOT667_V100_20230714.map new file mode 100644 index 0000000..f8e5c9d --- /dev/null +++ b/project/ISP_368/Listings/WL368_S10LITE_CSOT667_V100_20230714.map @@ -0,0 +1,5516 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.PWM_OUTPUT_TEST) refers to ap_demo.o(i.test_pwm_out_adjust) for test_pwm_out_adjust + ap_demo.o(i.PWM_OUTPUT_TEST) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.PWM_Task) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.PWM_Task) refers to app_tp_for_custom_s8.o(.data) for Flag_blacklight_EN + ap_demo.o(i.PWM_Task) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) for ap_get_tp_calibration_status_01 + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tx_display_on) for tx_display_on + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tp_heartbeat_exec) for tp_heartbeat_exec + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) for ap_tp_st_touch_scan_point_record_event_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + ap_demo.o(i.ap_demo) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_53) refers to app_tp_for_custom_s8.o(.data) for fingerprint_flag + ap_demo.o(i.ap_get_reg_53) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_get_reg_7A) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight_51) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.ap_set_backlight_51) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_backlight_51) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_update_frame_rate) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) for hal_dsi_rx_ctrl_set_tear_mode_ex + ap_demo.o(i.ap_update_frame_rate) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to ap_demo.o(i.tx_panel_reset) for tx_panel_reset + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.init_panel) refers to ap_demo.o(i.send_panel_init_code) for send_panel_init_code + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) for hal_dsi_tx_ctrl_read_cmd + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.init_panel) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) for hal_dsi_rx_ctrl_set_cus_scld_filter + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) for hal_dsi_rx_ctrl_get_compressen_en + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) for hal_dsi_rx_ctrl_toggle_resolution_ex + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.send_panel_init_code) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.test_pwm_out_adjust) refers to uidiv.o(.text) for __aeabi_uidivmod + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_init) for hal_pwm_out_init + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_config_all) for hal_pwm_out_config_all + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_sync_all) for hal_pwm_out_sync_all + ap_demo.o(i.tp_heartbeat_exec) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + ap_demo.o(i.tp_heartbeat_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) for ap_tp_st_touch_hardware_reset + ap_demo.o(i.tp_heartbeat_exec) refers to app_tp_transfer.o(.data) for s_screen_init_complate + ap_demo.o(i.tp_heartbeat_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(i.tx_display_on) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.tx_display_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.tx_display_on) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.tx_display_on) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.tx_display_on) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.tx_display_on) refers to ap_demo.o(.data) for .data + ap_demo.o(i.tx_panel_reset) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.tx_panel_reset) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight_51) for ap_set_backlight_51 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_53) for ap_get_reg_53 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_7A) for ap_get_reg_7A + ap_demo.o(.constdata) refers to app_tp_st_touch.o(i.ap_set_tp_calibration_04) for ap_set_tp_calibration_04 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_init) for app_tp_screen_int_init + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_transfer_phone) for app_tp_transfer_phone + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.app_tp_screen_int_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_screen_int_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.app_tp_screen_int_lvl_low) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_screen_int_lvl_low) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.app_tp_m_transfer_complate) for app_tp_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_screen_int_lvl_low) for app_tp_screen_int_lvl_low + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) for ap_tp_st_touch_scan_point_record_event + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) for ap_tp_st_touch_error_handler_FF + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) for ap_tp_st_touch_error_handler_F3 + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for .data + app_tp_st_touch.o(i.CRC16_2) refers to app_tp_st_touch.o(.constdata) for .constdata + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to printfa.o(i.__0printf) for __2printf + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(i.CRC16_2) for CRC16_2 + app_tp_st_touch.o(i.ap_set_tp_calibration_04) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_calibration) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) refers to app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) for ap_tp_st_touch_hardware_reset + app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) refers to app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) for ap_tp_st_touch_hardware_reset + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to memseta.o(.text) for __aeabi_memclr4 + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to printfa.o(i.__0printf) for __2printf + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) refers to app_tp_st_touch.o(.bss) for .bss + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) for ap_tp_st_touch_simulate_finger_release_event + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) for ap_tp_st_touch_scan_point_init + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.ap_tp_st_touch_software_reset) refers to app_tp_st_touch.o(.data) for .data + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_calibration) for ap_tp_st_touch_calibration + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) for ap_tp_st_touch_get_calibration_success_mark + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + app_tp_st_touch.o(i.app_tp_calibration_exec) refers to app_tp_st_touch.o(.data) for .data + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) for hal_internal_vsync_toggle_input_frame_rate + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) for hal_internal_sync_input_resolution_change_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_dsi_tx_ctrl.o(.conststring) for .conststring + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) for hal_internal_vsync_update_lcdc_addr + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te) refers to hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) for hal_internal_sync_cmd_mode_rcv_te + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) for hal_dsi_tx_ctrl_set_rect_pixel_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) for hal_dsi_tx_ctrl_draw_flicker + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) for hal_dsi_tx_ctrl_draw_chessboard + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_update_dpi_param) for hal_internal_update_dpi_param + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_config_intr) for drv_i2c_s_config_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c0_set_callback) for drv_i2c0_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_sel) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_pwm.o(i.hal_pwm_in_clear_int) refers to drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all) for drv_pwm_in_clear_pwm_int_all + hal_pwm.o(i.hal_pwm_in_config_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_in_ctrl_int) refers to drv_pwm.o(i.drv_pwm_in_set_sys_int) for drv_pwm_in_set_sys_int + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_get_current_count) refers to drv_pwm.o(i.drv_pwm_in_get_current_count) for drv_pwm_in_get_current_count + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_pwm.o(i.drv_pwm_in_get_high_period) for drv_pwm_in_get_high_period + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_pwm.o(i.drv_pwm_in_get_low_period) for drv_pwm_in_get_low_period + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_pwm.o(i.drv_pwm_in_get_counter_period) for drv_pwm_in_get_counter_period + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_in_init) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_register_callback) refers to drv_pwm.o(i.drv_pwm_in_register_callback) for drv_pwm_in_register_callback + hal_pwm.o(i.hal_pwm_in_set_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_config_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(i.hal_pwm_out_common_config) for hal_pwm_out_common_config + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_deinit) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sel_io) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_out_sync_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sync_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_common.o(.data) for g_system_clock + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_flash_power_down) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_power_down) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_system.o(i.hal_system_flash_read) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_dual_read) for norflash_dual_read + hal_system.o(i.hal_system_flash_release_power_down) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_release_power_down) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_erase_block) for norflash_erase_block + hal_system.o(i.hal_system_flash_write) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_write) for norflash_write + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c1_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c0_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_slave_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_update_dpi_param) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ceil.o(i.ceil) for ceil + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) for hal_internal_video_mode_auto_sync + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(i.PWM_OUTPUT_TEST), (44 bytes). + Removing ap_demo.o(i.PWM_Task), (108 bytes). + Removing ap_demo.o(i.test_pwm_out_adjust), (104 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_clear_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (5 bytes). + Removing app_tp_transfer.o(.data), (6 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (1 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_st_touch.o(.rev16_text), (4 bytes). + Removing app_tp_st_touch.o(.revsh_text), (4 bytes). + Removing app_tp_st_touch.o(i.ap_tp_st_touch_software_reset), (172 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode), (100 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data), (268 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution), (32 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (148 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te), (10 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard), (280 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker), (172 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init), (30 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data), (272 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (80 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (32 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (40 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_sel), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (32 bytes). + Removing hal_pwm.o(.rev16_text), (4 bytes). + Removing hal_pwm.o(.revsh_text), (4 bytes). + Removing hal_pwm.o(i.hal_pwm_in_clear_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_config_int), (60 bytes). + Removing hal_pwm.o(i.hal_pwm_in_ctrl_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_deinit), (18 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_current_count), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_high_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_low_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_total_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_init), (26 bytes). + Removing hal_pwm.o(i.hal_pwm_in_register_callback), (10 bytes). + Removing hal_pwm.o(i.hal_pwm_in_set_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_common_config), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_config_all), (16 bytes). + Removing hal_pwm.o(i.hal_pwm_out_config_duty_ratio), (76 bytes). + Removing hal_pwm.o(i.hal_pwm_out_convert_time), (136 bytes). + Removing hal_pwm.o(i.hal_pwm_out_deinit), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_init), (12 bytes). + Removing hal_pwm.o(i.hal_pwm_out_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sel_io), (38 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_all), (16 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_ctl), (12 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_period), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_thr), (48 bytes). + Removing hal_pwm.o(.data), (1 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (108 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_flash_power_down), (20 bytes). + Removing hal_system.o(i.hal_system_flash_read), (52 bytes). + Removing hal_system.o(i.hal_system_flash_release_power_down), (20 bytes). + Removing hal_system.o(i.hal_system_flash_write), (60 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (56 bytes). + Removing app_tp_for_custom_s8.o(.bss), (200 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (2 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (4 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (11 bytes). + Removing app_tp_for_custom_s8.o(.data), (10 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (412 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_clocks), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (24 bytes). + Removing drv_dma.o(i.drv_dma_enable_cycle), (44 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_clear_irq_status), (6 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (130 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (30 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (16 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (64 bytes). + Removing drv_pwm.o(i.drv_pwm_out_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_control), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_threshold), (12 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_set_frame_buff_pd), (28 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (108 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (60 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (220 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (88 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (72 bytes). + Removing drv_spi_dma.o(.bss), (480 bytes). + Removing drv_spi_dma.o(.data), (16 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (168 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change), (556 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate), (560 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr), (48 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (6 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_set_prefetch), (24 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (56 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (20 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing dflti.o(.text), (40 bytes). + +618 unused section(s) (total 26751 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/lz77c.c 0x00000000 Number 0 __dclz77c.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../fplib/microlib/fpsqrt.c 0x00000000 Number 0 dsqrt.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt_x.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + 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..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_uart_dma.c 0x00000000 Number 0 drv_uart_dma.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\drv\\drv_wdg.c 0x00000000 Number 0 drv_wdg.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_rx_ctrl.c 0x00000000 Number 0 hal_dsi_rx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_dsi_tx_ctrl.c 0x00000000 Number 0 hal_dsi_tx_ctrl.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_gpio.c 0x00000000 Number 0 hal_gpio.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_master.c 0x00000000 Number 0 hal_i2c_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_i2c_slave.c 0x00000000 Number 0 hal_i2c_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_pwm.c 0x00000000 Number 0 hal_pwm.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_master.c 0x00000000 Number 0 hal_spi_master.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_spi_slave.c 0x00000000 Number 0 hal_spi_slave.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_swire.c 0x00000000 Number 0 hal_swire.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_system.c 0x00000000 Number 0 hal_system.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_timer.c 0x00000000 Number 0 hal_timer.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\hal_uart.c 0x00000000 Number 0 hal_uart.o ABSOLUTE + ..\\..\\..\\src\\sdk\\robin\\src\\hal\\internal\\norflash.c 0x00000000 Number 0 norflash.o ABSOLUTE + ..\\..\\src\\app\\demo\\ap_demo.c 0x00000000 Number 0 ap_demo.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_for_custom_s8.c 0x00000000 Number 0 app_tp_for_custom_s8.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_st_touch.c 0x00000000 Number 0 app_tp_st_touch.o ABSOLUTE + ..\\..\\src\\app\\demo\\app_tp_transfer.c 0x00000000 Number 0 app_tp_transfer.o ABSOLUTE + ..\\..\\src\\app\\main.c 0x00000000 Number 0 main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdcmple.s 0x00000000 Number 0 cdcmple.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 fadd.o(.text) + .text 0x0001029a Section 0 fmul.o(.text) + .text 0x00010314 Section 0 fdiv.o(.text) + .text 0x00010390 Section 0 fscalb.o(.text) + .text 0x000103a8 Section 0 dadd.o(.text) + .text 0x0001050c Section 0 dmul.o(.text) + .text 0x000105dc Section 0 ddiv.o(.text) + .text 0x000106cc Section 0 fflti.o(.text) + .text 0x000106e2 Section 0 ffltui.o(.text) + .text 0x000106f0 Section 0 dfltui.o(.text) + .text 0x0001070c Section 0 ffixi.o(.text) + .text 0x0001073e Section 0 ffixui.o(.text) + .text 0x00010768 Section 0 dfixi.o(.text) + .text 0x000107b0 Section 0 dfixui.o(.text) + .text 0x000107ec Section 0 f2d.o(.text) + .text 0x00010814 Section 40 cdcmple.o(.text) + .text 0x0001083c Section 20 cfrcmple.o(.text) + .text 0x00010850 Section 0 uldiv.o(.text) + .text 0x000108b0 Section 0 llshl.o(.text) + .text 0x000108d0 Section 0 llushr.o(.text) + .text 0x000108f2 Section 0 llsshr.o(.text) + .text 0x00010918 Section 0 fepilogue.o(.text) + .text 0x00010918 Section 0 iusefp.o(.text) + .text 0x0001099a Section 0 depilogue.o(.text) + .text 0x00010a58 Section 0 dsqrt.o(.text) + .text 0x00010afc Section 0 dfixul.o(.text) + .text 0x00010b3c Section 40 cdrcmple.o(.text) + .text 0x00010b64 Section 36 init.o(.text) + .text 0x00010b88 Section 0 __dclz77c.o(.text) + i.ADC_IRQn_Handler 0x00010be8 Section 0 irq_redirect .o(i.ADC_IRQn_Handler) + i.AP_NRESET_IRQn_Handler 0x00010c00 Section 0 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + i.CRC16_2 0x00010c18 Section 0 app_tp_st_touch.o(i.CRC16_2) + i.DMA_IRQn_Handler 0x00010c58 Section 0 irq_redirect .o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010c6c Section 0 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010c88 Section 0 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010ca4 Section 0 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010cc0 Section 0 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010cdc Section 0 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010cf8 Section 0 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010d14 Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010d30 Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.FLSCTRL_IRQn_Handler 0x00010d4c Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.Gpio_swire_output 0x00010d60 Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00010db0 Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010dc4 Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010ddc Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010df4 Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010e0c Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010e34 Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010e4c Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010e64 Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010e7c Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.S20_Start_init 0x00010e98 Section 0 app_tp_transfer.o(i.S20_Start_init) + i.SPIM_IRQn_Handler 0x00010fbc Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.SPIS_IRQn_Handler 0x00010fd8 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.UART_DisableDma 0x00010ff4 Section 0 drv_uart.o(i.UART_DisableDma) + i.UART_GetInstance 0x00010ff6 Section 0 drv_uart.o(i.UART_GetInstance) + i.__scatterload_null 0x00010ffa Section 2 handlers.o(i.__scatterload_null) + i.ap_set_display_on 0x00010ffc Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x00010ffd Thumb Code 4 ap_demo.o(i.ap_set_display_on) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.drv_dsi_rx_set_inten 0x00011014 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + .ARM.__at_0x11018 0x00011018 Section 4 drv_common.o(.ARM.__at_0x11018) + i.SWIRE_IRQn_Handler 0x0001101c Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00011038 Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00011050 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + i.TIMER1_IRQn_Handler 0x00011068 Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00011080 Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x00011098 Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART0_IRQ_Handle 0x000110b0 Section 0 drv_uart.o(i.UART0_IRQ_Handle) + i.UART_IRQn_Handler 0x000110cc Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_ResetRxFIFO 0x000110e4 Section 0 drv_uart.o(i.UART_ResetRxFIFO) + i.UART_SetBaudRate 0x00011108 Section 0 drv_uart.o(i.UART_SetBaudRate) + i.UART_SwitchSCLK 0x00011150 Section 0 drv_uart.o(i.UART_SwitchSCLK) + i.UART_TransferHandleIRQ 0x0001116a Section 0 drv_uart.o(i.UART_TransferHandleIRQ) + i.UART_WriteBlocking 0x0001129e Section 0 drv_uart.o(i.UART_WriteBlocking) + i.UART_init 0x000112b8 Section 0 drv_uart.o(i.UART_init) + i.VIDC_IRQn_Handler 0x00011374 Section 0 irq_redirect .o(i.VIDC_IRQn_Handler) + i.VPRE_IRQn_Handler 0x0001138c Section 0 irq_redirect .o(i.VPRE_IRQn_Handler) + i.WDG_IRQn_Handler 0x000113a4 Section 0 irq_redirect .o(i.WDG_IRQn_Handler) + i.__0printf 0x000113bc Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x000113dc Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x00011400 Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x0001142e Section 0 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + i.__NVIC_ClearPendingIRQ 0x00011448 Section 0 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011449 Thumb Code 18 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_ClearPendingIRQ 0x00011460 Section 0 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011461 Thumb Code 18 drv_spi_master.o(i.__NVIC_ClearPendingIRQ) + i.__NVIC_DisableIRQ 0x00011478 Section 0 drv_rxbr.o(i.__NVIC_DisableIRQ) + __NVIC_DisableIRQ 0x00011479 Thumb Code 26 drv_rxbr.o(i.__NVIC_DisableIRQ) + i.__NVIC_EnableIRQ 0x00011498 Section 0 drv_rxbr.o(i.__NVIC_EnableIRQ) + __NVIC_EnableIRQ 0x00011499 Thumb Code 18 drv_rxbr.o(i.__NVIC_EnableIRQ) + i.__NVIC_SetPriority 0x000114b0 Section 0 hal_spi_slave.o(i.__NVIC_SetPriority) + __NVIC_SetPriority 0x000114b1 Thumb Code 60 hal_spi_slave.o(i.__NVIC_SetPriority) + i.__scatterload_copy 0x000114f4 Section 14 handlers.o(i.__scatterload_copy) + i.__scatterload_zeroinit 0x00011502 Section 14 handlers.o(i.__scatterload_zeroinit) + i.__set_errno 0x00011510 Section 0 errno.o(i.__set_errno) + i._fp_digits 0x0001151c Section 0 printfa.o(i._fp_digits) + _fp_digits 0x0001151d Thumb Code 344 printfa.o(i._fp_digits) + i._printf_core 0x00011690 Section 0 printfa.o(i._printf_core) + _printf_core 0x00011691 Thumb Code 1754 printfa.o(i._printf_core) + i._printf_post_padding 0x00011d7c Section 0 printfa.o(i._printf_post_padding) + _printf_post_padding 0x00011d7d Thumb Code 32 printfa.o(i._printf_post_padding) + i._printf_pre_padding 0x00011d9c Section 0 printfa.o(i._printf_pre_padding) + _printf_pre_padding 0x00011d9d Thumb Code 44 printfa.o(i._printf_pre_padding) + i._sputc 0x00011dc8 Section 0 printfa.o(i._sputc) + _sputc 0x00011dc9 Thumb Code 10 printfa.o(i._sputc) + i.ap_dcs_read 0x00011dd4 Section 0 ap_demo.o(i.ap_dcs_read) + ap_dcs_read 0x00011dd5 Thumb Code 942 ap_demo.o(i.ap_dcs_read) + i.ap_demo 0x000121b8 Section 0 ap_demo.o(i.ap_demo) + i.ap_get_reg_53 0x0001239c Section 0 ap_demo.o(i.ap_get_reg_53) + ap_get_reg_53 0x0001239d Thumb Code 36 ap_demo.o(i.ap_get_reg_53) + i.ap_get_reg_7A 0x000123c8 Section 0 ap_demo.o(i.ap_get_reg_7A) + ap_get_reg_7A 0x000123c9 Thumb Code 84 ap_demo.o(i.ap_get_reg_7A) + i.ap_get_reg_df 0x0001241c Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x0001241d Thumb Code 150 ap_demo.o(i.ap_get_reg_df) + i.ap_get_tp_calibration_status_01 0x000124b8 Section 0 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + i.ap_reset_cb 0x000124e8 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x000124e9 Thumb Code 38 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight_51 0x00012518 Section 0 ap_demo.o(i.ap_set_backlight_51) + ap_set_backlight_51 0x00012519 Thumb Code 88 ap_demo.o(i.ap_set_backlight_51) + i.ap_set_display_off 0x00012574 Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x00012575 Thumb Code 30 ap_demo.o(i.ap_set_display_off) + i.ap_set_enter_sleep_mode 0x000125b8 Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x000125b9 Thumb Code 72 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x00012634 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x00012635 Thumb Code 20 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_set_tp_calibration_04 0x00012678 Section 0 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + i.ap_tp_st_touch_calibration 0x00012710 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + i.ap_tp_st_touch_error_handler_F3 0x000127c0 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) + i.ap_tp_st_touch_error_handler_FF 0x000127ce Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) + i.ap_tp_st_touch_get_calibration_success_mark 0x000127f0 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + i.ap_tp_st_touch_hardware_reset 0x00012898 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) + i.ap_tp_st_touch_scan_point_init 0x0001295c Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + i.ap_tp_st_touch_scan_point_record_event 0x00012978 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) + i.ap_tp_st_touch_scan_point_record_event_exec 0x00012a14 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + i.ap_tp_st_touch_simulate_finger_release_event 0x00012a64 Section 0 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + i.ap_update_frame_rate 0x00012a98 Section 0 ap_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x00012a99 Thumb Code 44 ap_demo.o(i.ap_update_frame_rate) + i.app_ADC_IRQn_Handler 0x00012ac8 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x00012ae4 Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x00012b08 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x00012b24 Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x00012b40 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x00012b5c Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x00012b78 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x00012b94 Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x00012bb0 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x00012bcc Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x00012be8 Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x00012c30 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x00012c48 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00012c58 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x00012dfc Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00012e84 Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x0001311c Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x000131bc Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00013204 Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x00013234 Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x00013434 Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x00013454 Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x0001346c Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x00013476 Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x00013480 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x0001348a Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x00013494 Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x0001349c Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x000134b8 Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x000134d4 Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x0001350c Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x0001351c Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x0001354c Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x00013570 Section 0 app_tp_st_touch.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x00013618 Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x00013619 Thumb Code 10 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x00013624 Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x00013668 Section 0 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_transfer_complate 0x00013688 Section 0 app_tp_transfer.o(i.app_tp_m_transfer_complate) + i.app_tp_m_write 0x00013690 Section 0 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x00013698 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_s_read 0x00013aa0 Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x00013aa8 Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x00013ab0 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x00013e60 Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x00013e90 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x00013e91 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_screen_int_init 0x00013e9c Section 0 app_tp_transfer.o(i.app_tp_screen_int_init) + app_tp_screen_int_init 0x00013e9d Thumb Code 48 app_tp_transfer.o(i.app_tp_screen_int_init) + i.app_tp_screen_int_lvl_low 0x00013ed4 Section 0 app_tp_transfer.o(i.app_tp_screen_int_lvl_low) + app_tp_screen_int_lvl_low 0x00013ed5 Thumb Code 22 app_tp_transfer.o(i.app_tp_screen_int_lvl_low) + i.app_tp_transfer_phone 0x00013ef0 Section 0 app_tp_transfer.o(i.app_tp_transfer_phone) + app_tp_transfer_phone 0x00013ef1 Thumb Code 44 app_tp_transfer.o(i.app_tp_transfer_phone) + i.app_tp_transfer_screen_const 0x00013f20 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00013f21 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00013f60 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x00014084 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.board_Init 0x00014098 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x000140bc Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x000145ac Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x00014674 Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x00014675 Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x000146a0 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x000146a1 Thumb Code 90 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x00014734 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x0001478c Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x000147a4 Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x000147e8 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x0001480c Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x0001480d Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x00014828 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x00014840 Section 0 tau_delay.o(i.delayUs) + i.drv_ap_rst_trig_edge_detect 0x00014864 Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x0001489c Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x000148a8 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x000148e8 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x00014998 Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x000149ac Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x00014a04 Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x00014a0c Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x00014a1c Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x00014a30 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x00014a44 Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x00014a64 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x00014a78 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x00014a90 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x00014aa4 Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x00014ab8 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x00014acc Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x00014ae0 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x00014af4 Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x00014b08 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x00014b1c Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x00014b30 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x00014b44 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x00014b5c Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x00014b74 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x00014b88 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x00014b9c Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x00014bb0 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x00014bc8 Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x00014be4 Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x00014bf4 Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x00014c04 Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x00014c28 Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x00014c34 Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x00014cc4 Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x00014cd6 Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x00014cf0 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x00014cf8 Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00014d3c Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x00014d72 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00014d80 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x00014df4 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x00014dfe Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00014e28 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00014f2c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00014f6c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00014f6d Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00014fbc Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00014fbd Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00014fd8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00014fe0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00014fe6 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00014ff4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00015014 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_ipi_cfg 0x00015024 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00015034 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x0001507a Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x000150a0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x000151a4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_get_payload 0x000151b2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) + i.drv_dsi_tx_command_header 0x000151b6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x000151ca Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00015236 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x0001523a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00015252 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x0001525a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00015262 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x0001526c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00015290 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x00015294 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00015298 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x0001529c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x000152b4 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x000152ce Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x000152da Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x0001533e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x0001537c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x000154b0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x000154ce Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x000154d6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x000154f2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x0001550a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x00015518 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x00015558 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x00015568 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x00015570 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x00015592 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x0001559a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x000155c0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x0001566a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x00015680 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x00015698 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x000156c6 Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x000156d2 Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x00015704 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x0001571c Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x00015734 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x00015740 Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00015754 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x000157a4 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x000157c4 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x000157d4 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x000157e4 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x000157f4 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00015804 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00015805 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x00015824 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c0_set_callback 0x00015954 Section 0 drv_i2c_slave.o(i.drv_i2c0_set_callback) + i.drv_i2c1_set_callback 0x00015960 Section 0 drv_i2c_master.o(i.drv_i2c1_set_callback) + i.drv_i2c_dma_callback 0x0001596c Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x0001596d Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x000159a0 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x00015a4c Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x00015a66 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x00015a80 Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x00015ae0 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x00015af0 Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_master_init 0x00015b28 Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x00015bb4 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x00015c10 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x00015c4c Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x00015c4d Thumb Code 62 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x00015c8a Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_config_intr 0x00015ccc Section 0 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + i.drv_i2c_s_enable 0x00015cd0 Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable) + i.drv_i2c_s_get_fifo_status 0x00015cd8 Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_intr 0x00015cec Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + i.drv_i2c_s_write_data 0x00015d3c Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x00015d58 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x00015db0 Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x00015de4 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x00015dfc Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x00015e14 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x00015e44 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x00015e5a Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x00015e7e Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x00015ea4 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x00015eba Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x00015ed0 Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x00015edc Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x00015efa Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00015f1c Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00015f3e Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x00015f4a Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00015f64 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x00015f86 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00015fa0 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x00015fac Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00015ff8 Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00015ffe Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00016010 Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00016030 Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_video_hw_mode 0x00016070 Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00016084 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x000160a4 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x000160b0 Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x000160f0 Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x000160fc Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x0001610e Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x0001611e Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x0001612c Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x00016140 Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x0001614c Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x0001615c Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x0001616e Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x0001617e Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x00016194 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x000161ac Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x000161c6 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x000161d4 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x000161fc Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x0001620c Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x00016214 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x00016228 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x0001623c Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x00016244 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_init_set_scld_filter 0x00016258 Section 0 drv_param_init.o(i.drv_param_init_set_scld_filter) + i.drv_param_p2r_filter_init 0x000162bc Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x000162e0 Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x000162f0 Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x0001632c Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x0001638c Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x000163e0 Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x000163f0 Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x00016408 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x00016428 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x0001644e Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x0001646c Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x0001646d Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x0001648c Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x000164ac Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x000164c4 Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x000164fc Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x000164fd Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x00016508 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x00016509 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x00016518 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x00016519 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x0001652c Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x0001652d Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x00016542 Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x0001654c Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x00016550 Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x000165ac Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x000165c0 Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x00016624 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x00016628 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00016629 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x0001663a Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x0001663e Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x0001663f Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x00016650 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x0001665c Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x00016664 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x00016670 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x0001667c Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x00016690 Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x0001675c Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x00016770 Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x00016784 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x00016794 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x000167ba Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x000167c2 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x000167cc Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_enable 0x000167ec Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_set_int 0x00016808 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x0001685c Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x00016878 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00016884 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x000168ac Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x000168c4 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x000168e0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x00016904 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x00016928 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x00016938 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x00016948 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x0001696c Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x0001696d Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x00016986 Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x000169a8 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x000169b8 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x000169c8 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x000169c9 Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x00016a0c Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x00016a20 Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x00016a30 Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x00016a84 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x00016aac Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_clear 0x00016abc Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x00016abd Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x00016ac6 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x00016ae2 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x00016afe Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x00016aff Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x00016b10 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x00016b11 Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x00016b24 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x00016b25 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00016b34 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00016b3c Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00016b54 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x00016b94 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x00016ba8 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x00016bd0 Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x00016bdc Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x00016be2 Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x00016c1e Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x00016c32 Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x00016c42 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x00016c4a Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x00016c70 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x00016c98 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x00016cb0 Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x00016cba Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x00016cca Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x00016cd4 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x00016cde Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x00016cf0 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x00016cfa Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00016d04 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x00016d1c Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00016d2c Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00016d2d Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00016d3c Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00016d3d Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00016d4c Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x00016d8c Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x00016d96 Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x00016dac Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x00016de0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00016e7c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016f00 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_compressen_en 0x00016f28 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00016f38 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00016f60 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00016fc0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00016fc1 Thumb Code 332 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00017164 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00017165 Thumb Code 184 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x0001723c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x0001723d Thumb Code 334 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x00017394 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x00017395 Thumb Code 312 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x000174dc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x000174dd Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00017708 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_scld_filter 0x000177f8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x00017864 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00017898 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00017899 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x000178d0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x000178d1 Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017944 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_set_tear_mode_ex 0x00017978 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + i.hal_dsi_rx_ctrl_start 0x00017988 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x000179c4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution_ex 0x00017a00 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) + i.hal_dsi_tx_calc_video_chunks 0x00017a20 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x00017a21 Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x00017bb0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x00017bb1 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x00017be4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x00017be5 Thumb Code 1022 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x00018034 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00018060 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x000180e4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018130 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x00018158 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x000181fc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x000181fd Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x00018220 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_read_cmd 0x0001822c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) + i.hal_dsi_tx_ctrl_set_ccm 0x000182b8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x000182d8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x000182ec Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x000182fc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x00018320 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x000183bc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00018400 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x000184d8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x00018588 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x00018589 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x000185cc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x000185cd Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x000185fc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x000185fd Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x0001861c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x0001861d Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x0001863c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x0001863d Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x000186d0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x000186d1 Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x00018728 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x00018729 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x0001876c Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x00018784 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x00018798 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x000187d8 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x000187f8 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x00018820 Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x00018838 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x00018888 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x000188e8 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x000188f0 Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x00018910 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x0001897c Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x0001899c Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x000189b8 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x000189c4 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x000189c5 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x000189e4 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x000189e5 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x000189f4 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x00018a40 Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x00018b08 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x00018b1c Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x00018b28 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x00018b29 Thumb Code 354 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x00018c9c Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x00018d98 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_get_hight_performan_mode 0x00018da8 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change_ex 0x00018db8 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) + i.hal_internal_update_dpi_param 0x00018f8c Section 0 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + i.hal_internal_video_mode_auto_sync 0x00018f9c Section 0 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + i.hal_internal_vsync_deinit 0x000190a8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x000190d0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x000190dc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tear_mode 0x000190f4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + i.hal_internal_vsync_get_tx_state 0x00019100 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x0001910c Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00019224 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x000192d4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x000193f0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x00019404 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x00019428 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00019478 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x000194f8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x000194f9 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x0001951c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x0001951d Thumb Code 84 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x00019574 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x00019575 Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x00019588 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x00019589 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x000196ec Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x000196ed Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x0001972c Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x0001972d Thumb Code 422 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x000198dc Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x000198dd Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_m_clear_rxfifo 0x0001991c Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_deinit 0x0001992a Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_open 0x0001993c Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x00019952 Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x0001995c Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x000199e4 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x00019a00 Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x00019a08 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x00019a10 Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_deinit 0x00019a18 Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x00019a46 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x00019a60 Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x00019aa8 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x00019ad0 Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x00019b5c Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.hal_vsync_reset_lcdc_scaler 0x00019b6c Section 0 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + hal_vsync_reset_lcdc_scaler 0x00019b6d Thumb Code 460 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + i.handle_init 0x00019d48 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x00019e58 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x00019e59 Thumb Code 92 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x00019eb8 Section 0 ap_demo.o(i.init_panel) + init_panel 0x00019eb9 Thumb Code 146 ap_demo.o(i.init_panel) + i.main 0x00019f98 Section 0 main.o(i.main) + i.open_mipi_rx 0x00019fa4 Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x00019fa5 Thumb Code 132 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x0001a040 Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x0001a041 Thumb Code 52 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x0001a078 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x0001a079 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x0001a46c Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x0001a46d Thumb Code 358 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001a5e4 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001a5e5 Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001a670 Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001a671 Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x0001a7f0 Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001a7f1 Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001a894 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001a895 Thumb Code 316 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.send_panel_init_code 0x0001aa68 Section 0 ap_demo.o(i.send_panel_init_code) + send_panel_init_code 0x0001aa69 Thumb Code 36 ap_demo.o(i.send_panel_init_code) + i.soft_gen_te 0x0001aa8c Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001aa8d Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x0001ab50 Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x0001ab51 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_timer3_cb 0x0001ac10 Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001ac11 Thumb Code 48 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001ac50 Section 0 sqrt.o(i.sqrt) + i.tp_heartbeat_exec 0x0001ac98 Section 0 ap_demo.o(i.tp_heartbeat_exec) + i.tx_display_on 0x0001ad04 Section 0 ap_demo.o(i.tx_display_on) + tx_display_on 0x0001ad05 Thumb Code 44 ap_demo.o(i.tx_display_on) + i.tx_panel_reset 0x0001ad64 Section 0 ap_demo.o(i.tx_panel_reset) + tx_panel_reset 0x0001ad65 Thumb Code 40 ap_demo.o(i.tx_panel_reset) + i.vidc_callback 0x0001ad8c Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001ad8d Thumb Code 232 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001ae94 Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001ae95 Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001af64 Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001af65 Thumb Code 300 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001b130 Section 10582 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001b130 Data 132 ap_demo.o(.constdata) + .constdata 0x0001da86 Section 32 app_tp_st_touch.o(.constdata) + .constdata 0x0001daa8 Section 36 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001dacc Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001dacc Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001db44 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001dba0 Section 32 hal_i2c_slave.o(.constdata) + sg_i2c_s_config 0x0001dba0 Data 32 hal_i2c_slave.o(.constdata) + .constdata 0x0001dbc0 Section 4006 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001eb66 Section 1 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001eb68 Section 8 drv_param_init.o(.constdata) + .constdata 0x0001eb70 Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001eb70 Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001ec28 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001eca8 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001ecd8 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001ecf8 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001ed40 Section 67 hal_dsi_tx_ctrl.o(.conststring) + .conststring 0x0001ed84 Section 224 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 552 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701d0 Data 1 ap_demo.o(.data) + hbm_mode 0x000701d1 Data 1 ap_demo.o(.data) + hbm_mode_cnt 0x000701d2 Data 1 ap_demo.o(.data) + start_display_on 0x000701d3 Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701d4 Data 1 ap_demo.o(.data) + panel_display_done 0x000701d5 Data 1 ap_demo.o(.data) + R60_Parma_backup 0x000701d8 Data 1 ap_demo.o(.data) + read_bl_data 0x000701dc Data 2 ap_demo.o(.data) + read_bl_data_bak 0x000701de Data 2 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701e8 Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701ec Data 4 ap_demo.o(.data) + value_reg_df 0x000701f4 Data 4 ap_demo.o(.data) + .data 0x000703f8 Section 23 app_tp_transfer.o(.data) + s_spim_write 0x000703f8 Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x000703f9 Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x000703fa Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x000703fb Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x000703fd Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x000703fe Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x000703ff Data 1 app_tp_transfer.o(.data) + .data 0x0007040f Section 40 app_tp_st_touch.o(.data) + s_calibration_flag 0x0007040f Data 1 app_tp_st_touch.o(.data) + s_calibration_correct_flag 0x00070410 Data 1 app_tp_st_touch.o(.data) + .data 0x00070438 Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00070438 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x0007043c Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00070440 Section 3 hal_dsi_tx_ctrl.o(.data) + g_tx_vcom_en 0x00070440 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_vpg_en 0x00070441 Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x00070442 Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x00070443 Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x00070443 Data 1 hal_i2c_master.o(.data) + .data 0x00070444 Section 32 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00070444 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00070445 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x00070446 Data 1 hal_i2c_slave.o(.data) + sg_i2c_s_index 0x00070447 Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x00070448 Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x0007044c Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x00070450 Data 4 hal_i2c_slave.o(.data) + sg_tx_byte_num 0x00070454 Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x00070458 Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x0007045c Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00070460 Data 4 hal_i2c_slave.o(.data) + .data 0x00070464 Section 5766 app_tp_for_custom_s8.o(.data) + fingerprint_enable 0x0007046f Data 1 app_tp_for_custom_s8.o(.data) + app_tp_count 0x00070470 Data 1 app_tp_for_custom_s8.o(.data) + phone_85_flag 0x00070471 Data 1 app_tp_for_custom_s8.o(.data) + phone_E4_flag 0x00070472 Data 1 app_tp_for_custom_s8.o(.data) + phone_72_flag 0x00070473 Data 1 app_tp_for_custom_s8.o(.data) + phone_75_flag 0x00070474 Data 1 app_tp_for_custom_s8.o(.data) + phone_92_flag 0x00070475 Data 1 app_tp_for_custom_s8.o(.data) + phone_74_flag 0x00070476 Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x0007047a Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x0007047c Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x0007047e Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x00070480 Data 2 app_tp_for_custom_s8.o(.data) + .data 0x00071aea Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00071aeb Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00071aec Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00071aed Section 3 app_tp_for_custom_s8.o(.data) + .data 0x00071af0 Section 5 app_tp_for_custom_s8.o(.data) + .data 0x00071af5 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00071af8 Section 48 app_tp_for_custom_s8.o(.data) + .data 0x00071b28 Section 18 norflash.o(.data) + tmprg 0x00071b30 Data 4 norflash.o(.data) + .data 0x00071b3c Section 12 drv_common.o(.data) + s_my_tick 0x00071b3c Data 4 drv_common.o(.data) + .data 0x00071b48 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x00071b48 Data 4 drv_gpio.o(.data) + .data 0x00071b4c Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x00071b4c Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x00071b50 Data 4 drv_i2c_dma.o(.data) + .data 0x00071b54 Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x00071b54 Data 4 drv_i2c_master.o(.data) + .data 0x00071b58 Section 4 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x00071b58 Data 4 drv_i2c_slave.o(.data) + .data 0x00071b5c Section 1188 drv_param_init.o(.data) + .data 0x00072000 Section 12 drv_pwm.o(.data) + s_pwm_type 0x00072000 Data 1 drv_pwm.o(.data) + s_pwm_cb 0x00072004 Data 8 drv_pwm.o(.data) + .data 0x0007200c Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x0007200c Data 4 drv_spi_master.o(.data) + .data 0x00072010 Section 8 drv_swire.o(.data) + s_swire_cb 0x00072010 Data 8 drv_swire.o(.data) + .data 0x00072018 Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x00072018 Data 1 drv_sys_cfg.o(.data) + .data 0x0007201c Section 80 drv_timer.o(.data) + sg_timer_info 0x0007201c Data 80 drv_timer.o(.data) + .data 0x0007206c Section 12 hal_internal_vsync.o(.data) + sg_cmd_mode_tx_start 0x0007206c Data 1 hal_internal_vsync.o(.data) + sg_cur_te_info 0x00072070 Data 4 hal_internal_vsync.o(.data) + .data 0x00072078 Section 8 drv_rxbr.o(.data) + .data 0x00072080 Section 4 drv_vidc.o(.data) + .data 0x00072084 Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x00072084 Data 1 drv_phy_common.o(.data) + .data 0x00072088 Section 12 drv_chip_info.o(.data) + sg_chip_info 0x00072088 Data 4 drv_chip_info.o(.data) + sg_chip_function 0x0007208c Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x00072090 Data 4 drv_chip_info.o(.data) + .data 0x00072094 Section 8 drv_uart.o(.data) + s_UartFcrReg 0x00072094 Data 4 drv_uart.o(.data) + uart_userData 0x00072098 Data 4 drv_uart.o(.data) + .data 0x0007209c Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x0007209c Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x000720a0 Data 8 drv_wdg.o(.data) + .data 0x000720a8 Section 4 stdout.o(.data) + .data 0x000720ac Section 4 errno.o(.data) + _errno 0x000720ac Data 4 errno.o(.data) + .bss 0x000720b0 Section 400 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x000720b0 Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x00072178 Data 200 app_tp_transfer.o(.bss) + .bss 0x00072240 Section 12 app_tp_st_touch.o(.bss) + .bss 0x0007224c Section 196 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x0007224c Data 196 hal_dsi_rx_ctrl.o(.bss) + .bss 0x00072310 Section 76 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x00072310 Data 76 hal_dsi_tx_ctrl.o(.bss) + .bss 0x0007235c Section 256 tau_log.o(.bss) + .bss 0x0007245c Section 654 app_tp_for_custom_s8.o(.bss) + .bss 0x000726ec Section 208 hal_uart.o(.bss) + .bss 0x000727bc Section 28 drv_dma.o(.bss) + s_dma_handle 0x000727bc Data 28 drv_dma.o(.bss) + .bss 0x000727d8 Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x000727d8 Data 64 drv_gpio.o(.bss) + .bss 0x00072818 Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x00072818 Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x000728b8 Data 160 drv_i2c_dma.o(.bss) + .bss 0x00072958 Section 2436 hal_internal_vsync.o(.bss) + g_imm_buffer 0x000731bc Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x000732bc Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x000732c8 Data 20 hal_internal_vsync.o(.bss) + .bss 0x000732dc Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x0007430c Section 32 hal_spi_slave.o(.bss) + STACK 0x00074330 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfrcmple 0x0001083d Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010851 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108b1 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108b1 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108d1 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108d1 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000108f3 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000108f3 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010919 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010919 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010929 Thumb Code 114 fepilogue.o(.text) + _double_round 0x0001099b Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109b5 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a59 Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010afd Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b3d Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b65 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b65 Thumb Code 0 init.o(.text) + __decompress 0x00010b89 Thumb Code 0 __dclz77c.o(.text) + __decompress2 0x00010b89 Thumb Code 96 __dclz77c.o(.text) + ADC_IRQn_Handler 0x00010be9 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010c01 Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + CRC16_2 0x00010c19 Thumb Code 54 app_tp_st_touch.o(i.CRC16_2) + DMA_IRQn_Handler 0x00010c59 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c6d Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c89 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010ca5 Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010cc1 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010cdd Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010cf9 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010d15 Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010d31 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + FLSCTRL_IRQn_Handler 0x00010d4d Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010d61 Thumb Code 78 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010db1 Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010dc5 Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010ddd Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010df5 Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010e0d Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010e35 Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010e4d Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010e65 Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010e7d Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + S20_Start_init 0x00010e99 Thumb Code 270 app_tp_transfer.o(i.S20_Start_init) + SPIM_IRQn_Handler 0x00010fbd Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + SPIS_IRQn_Handler 0x00010fd9 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + UART_DisableDma 0x00010ff5 Thumb Code 2 drv_uart.o(i.UART_DisableDma) + UART_GetInstance 0x00010ff7 Thumb Code 4 drv_uart.o(i.UART_GetInstance) + __scatterload_null 0x00010ffb Thumb Code 2 handlers.o(i.__scatterload_null) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + drv_dsi_rx_set_inten 0x00011015 Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + s_debug_state 0x00011018 Data 4 drv_common.o(.ARM.__at_0x11018) + SWIRE_IRQn_Handler 0x0001101d Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00011039 Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00011051 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + TIMER1_IRQn_Handler 0x00011069 Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00011081 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x00011099 Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x000110b1 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + UART_IRQn_Handler 0x000110cd Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x000110e5 Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SetBaudRate 0x00011109 Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x00011151 Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x0001116b Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x0001129f Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x000112b9 Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x00011375 Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x0001138d Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x000113a5 Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x000113bd Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x000113bd Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x000113bd Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x000113bd Thumb Code 0 printfa.o(i.__0printf) + printf 0x000113bd Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x000113dd Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x000113dd Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x000113dd Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x000113dd Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x000113dd Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x00011401 Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x0001142f Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_copy 0x000114f5 Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x00011503 Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x00011511 Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x000121b9 Thumb Code 370 ap_demo.o(i.ap_demo) + ap_get_tp_calibration_status_01 0x000124b9 Thumb Code 44 app_tp_st_touch.o(i.ap_get_tp_calibration_status_01) + ap_set_tp_calibration_04 0x00012679 Thumb Code 140 app_tp_st_touch.o(i.ap_set_tp_calibration_04) + ap_tp_st_touch_calibration 0x00012711 Thumb Code 170 app_tp_st_touch.o(i.ap_tp_st_touch_calibration) + ap_tp_st_touch_error_handler_F3 0x000127c1 Thumb Code 14 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_F3) + ap_tp_st_touch_error_handler_FF 0x000127cf Thumb Code 32 app_tp_st_touch.o(i.ap_tp_st_touch_error_handler_FF) + ap_tp_st_touch_get_calibration_success_mark 0x000127f1 Thumb Code 152 app_tp_st_touch.o(i.ap_tp_st_touch_get_calibration_success_mark) + ap_tp_st_touch_hardware_reset 0x00012899 Thumb Code 138 app_tp_st_touch.o(i.ap_tp_st_touch_hardware_reset) + ap_tp_st_touch_scan_point_init 0x0001295d Thumb Code 24 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_init) + ap_tp_st_touch_scan_point_record_event 0x00012979 Thumb Code 150 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event) + ap_tp_st_touch_scan_point_record_event_exec 0x00012a15 Thumb Code 50 app_tp_st_touch.o(i.ap_tp_st_touch_scan_point_record_event_exec) + ap_tp_st_touch_simulate_finger_release_event 0x00012a65 Thumb Code 44 app_tp_st_touch.o(i.ap_tp_st_touch_simulate_finger_release_event) + app_ADC_IRQn_Handler 0x00012ac9 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x00012ae5 Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x00012b09 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x00012b25 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x00012b41 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x00012b5d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x00012b79 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x00012b95 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x00012bb1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x00012bcd Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x00012be9 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x00012c31 Thumb Code 14 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00012c49 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00012c59 Thumb Code 208 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x00012dfd Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00012e85 Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x0001311d Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x000131bd Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00013205 Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x00013235 Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x00013435 Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x00013455 Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x0001346d Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x00013477 Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x00013481 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x0001348b Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x00013495 Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x0001349d Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x000134b9 Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x000134d5 Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x0001350d Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x0001351d Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x0001354d Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x00013571 Thumb Code 78 app_tp_st_touch.o(i.app_tp_calibration_exec) + app_tp_init 0x00013625 Thumb Code 56 app_tp_transfer.o(i.app_tp_init) + app_tp_m_read 0x00013669 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_transfer_complate 0x00013689 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_transfer_complate) + app_tp_m_write 0x00013691 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + app_tp_phone_analysis_data 0x00013699 Thumb Code 968 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_s_read 0x00013aa1 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x00013aa9 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x00013ab1 Thumb Code 922 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x00013e61 Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x00013f61 Thumb Code 274 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x00014085 Thumb Code 16 app_tp_transfer.o(i.app_tp_transfer_screen_start) + board_Init 0x00014099 Thumb Code 30 board.o(i.board_Init) + calc_framebuffer_setting 0x000140bd Thumb Code 1258 hal_internal_vsync.o(i.calc_framebuffer_setting) + ceil 0x000145ad Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x00014735 Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x0001478d Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x000147a5 Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x000147e9 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x00014829 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x00014841 Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x00014865 Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x0001489d Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x000148a9 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x000148e9 Thumb Code 98 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x00014999 Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x000149ad Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x00014a05 Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x00014a0d Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x00014a1d Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x00014a31 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x00014a45 Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x00014a65 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x00014a79 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x00014a91 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x00014aa5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x00014ab9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x00014acd Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x00014ae1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x00014af5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x00014b09 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x00014b1d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x00014b31 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x00014b45 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x00014b5d Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x00014b75 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x00014b89 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x00014b9d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x00014bb1 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x00014bc9 Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x00014be5 Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x00014bf5 Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x00014c05 Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x00014c29 Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x00014c35 Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x00014cc5 Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x00014cd7 Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x00014cf1 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x00014cf9 Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00014d3d Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x00014d73 Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00014d81 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x00014df5 Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x00014dff Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x00014e29 Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00014f2d Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00014fd9 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00014fe1 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00014fe7 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00014ff5 Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00015015 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_ipi_cfg 0x00015025 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00015035 Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x0001507b Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x000150a1 Thumb Code 256 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x000151a5 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_get_payload 0x000151b3 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) + drv_dsi_tx_command_header 0x000151b7 Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x000151cb Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00015237 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x0001523b Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00015253 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x0001525b Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00015263 Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x0001526d Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00015291 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x00015295 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00015299 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x0001529d Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x000152b5 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x000152cf Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x000152db Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x0001533f Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x0001537d Thumb Code 308 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x000154b1 Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x000154cf Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x000154d7 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x000154f3 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x0001550b Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x00015519 Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x00015559 Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x00015569 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x00015571 Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x00015593 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x0001559b Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x000155c1 Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x0001566b Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x00015681 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x00015699 Thumb Code 46 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x000156c7 Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x000156d3 Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x00015705 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x0001571d Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x00015735 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x00015741 Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00015755 Thumb Code 74 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x000157a5 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x000157c5 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x000157d5 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x000157e5 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x000157f5 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x00015825 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c0_set_callback 0x00015955 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c0_set_callback) + drv_i2c1_set_callback 0x00015961 Thumb Code 6 drv_i2c_master.o(i.drv_i2c1_set_callback) + drv_i2c_dma_init 0x000159a1 Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x00015a4d Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x00015a67 Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x00015a81 Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x00015ae1 Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x00015af1 Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_master_init 0x00015b29 Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x00015bb5 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x00015c11 Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x00015c8b Thumb Code 66 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_config_intr 0x00015ccd Thumb Code 4 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + drv_i2c_s_enable 0x00015cd1 Thumb Code 8 drv_i2c_slave.o(i.drv_i2c_s_enable) + drv_i2c_s_get_fifo_status 0x00015cd9 Thumb Code 20 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_intr 0x00015ced Thumb Code 74 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + drv_i2c_s_write_data 0x00015d3d Thumb Code 28 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x00015d59 Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x00015db1 Thumb Code 50 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x00015de5 Thumb Code 20 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x00015dfd Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x00015e15 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x00015e45 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x00015e5b Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x00015e7f Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x00015ea5 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x00015ebb Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x00015ed1 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x00015edd Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x00015efb Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00015f1d Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00015f3f Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x00015f4b Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00015f65 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x00015f87 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00015fa1 Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x00015fad Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00015ff9 Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00015fff Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00016011 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00016031 Thumb Code 58 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_video_hw_mode 0x00016071 Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00016085 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x000160a5 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x000160b1 Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x000160f1 Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x000160fd Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x0001610f Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x0001611f Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x0001612d Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x00016141 Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x0001614d Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x0001615d Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x0001616f Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x0001617f Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x00016195 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x000161ad Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x000161c7 Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x000161d5 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x000161fd Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x0001620d Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x00016215 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x00016229 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x0001623d Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x00016245 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_init_set_scld_filter 0x00016259 Thumb Code 92 drv_param_init.o(i.drv_param_init_set_scld_filter) + drv_param_p2r_filter_init 0x000162bd Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x000162e1 Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x000162f1 Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x0001632d Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x0001638d Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x000163e1 Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x000163f1 Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x00016409 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x00016429 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x0001644f Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x0001648d Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x000164ad Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x000164c5 Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x00016543 Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x0001654d Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x00016551 Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x000165ad Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x000165c1 Thumb Code 66 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x00016625 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x0001663b Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x00016651 Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x0001665d Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x00016665 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x00016671 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x0001667d Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x00016691 Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x0001675d Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x00016771 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x00016785 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x00016795 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x000167bb Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x000167c3 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x000167cd Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_enable 0x000167ed Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_set_int 0x00016809 Thumb Code 76 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x0001685d Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x00016879 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00016885 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x000168ad Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x000168c5 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x000168e1 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x00016905 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x00016929 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x00016939 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x00016949 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x00016987 Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x000169a9 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x000169b9 Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x00016a0d Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x00016a21 Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x00016a31 Thumb Code 80 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x00016a85 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x00016aad Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x00016ac7 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x00016ae3 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00016b35 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00016b3d Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00016b55 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x00016b95 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x00016ba9 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x00016bd1 Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x00016bdd Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x00016be3 Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x00016c1f Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x00016c33 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x00016c43 Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x00016c4b Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x00016c71 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x00016c99 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x00016cb1 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x00016cbb Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x00016ccb Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x00016cd5 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x00016cdf Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x00016cf1 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x00016cfb Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00016d05 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x00016d1d Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00016d4d Thumb Code 60 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x00016d8d Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x00016d97 Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x00016dad Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x00016de1 Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00016e7d Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x00016f01 Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_compressen_en 0x00016f29 Thumb Code 10 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) + hal_dsi_rx_ctrl_get_max_ret_size 0x00016f39 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00016f61 Thumb Code 88 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_send_ack_cmd 0x00017709 Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_scld_filter 0x000177f9 Thumb Code 98 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) + hal_dsi_rx_ctrl_set_cus_sync_line 0x00017865 Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017945 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_set_tear_mode_ex 0x00017979 Thumb Code 14 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + hal_dsi_rx_ctrl_start 0x00017989 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x000179c5 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution_ex 0x00017a01 Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) + hal_dsi_tx_ctrl_create_handle 0x00018035 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00018061 Thumb Code 118 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x000180e5 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00018131 Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x00018159 Thumb Code 154 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x00018221 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_read_cmd 0x0001822d Thumb Code 134 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) + hal_dsi_tx_ctrl_set_ccm 0x000182b9 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x000182d9 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x000182ed Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x000182fd Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x00018321 Thumb Code 140 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x000183bd Thumb Code 56 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00018401 Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x000184d9 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x0001876d Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x00018785 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x00018799 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x000187d9 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x000187f9 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x00018821 Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x00018839 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x00018889 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x000188e9 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x000188f1 Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x00018911 Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x0001897d Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x0001899d Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x000189b9 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x000189f5 Thumb Code 62 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x00018a41 Thumb Code 176 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x00018b09 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x00018b1d Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x00018c9d Thumb Code 170 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x00018d99 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_get_hight_performan_mode 0x00018da9 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change_ex 0x00018db9 Thumb Code 362 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) + hal_internal_update_dpi_param 0x00018f8d Thumb Code 10 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + hal_internal_video_mode_auto_sync 0x00018f9d Thumb Code 238 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + hal_internal_vsync_deinit 0x000190a9 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x000190d1 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x000190dd Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tear_mode 0x000190f5 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + hal_internal_vsync_get_tx_state 0x00019101 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x0001910d Thumb Code 236 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00019225 Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x000192d5 Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x000193f1 Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x00019405 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x00019429 Thumb Code 72 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00019479 Thumb Code 118 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_spi_m_clear_rxfifo 0x0001991d Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_deinit 0x0001992b Thumb Code 18 hal_swire.o(i.hal_swire_deinit) + hal_swire_open 0x0001993d Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x00019953 Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x0001995d Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x000199e5 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x00019a01 Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x00019a09 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x00019a11 Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_deinit 0x00019a19 Thumb Code 46 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x00019a47 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x00019a61 Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x00019aa9 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x00019ad1 Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x00019b5d Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x00019d49 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x00019f99 Thumb Code 10 main.o(i.main) + sqrt 0x0001ac51 Thumb Code 66 sqrt.o(i.sqrt) + tp_heartbeat_exec 0x0001ac99 Thumb Code 60 ap_demo.o(i.tp_heartbeat_exec) + panel_init_code 0x0001b1b4 Data 10450 ap_demo.o(.constdata) + wCRCTalbeAbs 0x0001da86 Data 32 app_tp_st_touch.o(.constdata) + phone_data_21 0x0001dbc0 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001dbc1 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_00 0x0001dbc2 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_30 0x0001dbc3 Data 2 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001dbc5 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001dbc8 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001dbcc Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001dbd0 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001dbd4 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001dbd8 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001dbdc Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001dbe1 Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001dbf1 Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_02 0x0001dbfc Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001dc18 Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_03 0x0001dc22 Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_05 0x0001e12e Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_1D 0x0001e63a Data 1292 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001eb46 Data 16 app_tp_for_custom_s8.o(.constdata) + sleep_click_on 0x0001eb56 Data 16 app_tp_for_custom_s8.o(.constdata) + screen_reg_start_data_size 0x0001eb66 Data 1 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001ee64 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001ee94 Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_start_flag 0x000701d6 Data 1 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701d7 Data 1 ap_demo.o(.data) + panel_mode 0x000701d9 Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701da Data 2 ap_demo.o(.data) + rd_51_val2 0x000701e0 Data 2 ap_demo.o(.data) + panel_r 0x000701e2 Data 2 ap_demo.o(.data) + panel_g 0x000701e4 Data 2 ap_demo.o(.data) + panel_b 0x000701e6 Data 2 ap_demo.o(.data) + s_heartbeat 0x000701f0 Data 4 ap_demo.o(.data) + rx_filter_1080_h_4_96 0x000701f8 Data 256 ap_demo.o(.data) + rx_filter_2400_v_4_96 0x000702f8 Data 256 ap_demo.o(.data) + s_screen_init_complate 0x000703fc Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x00070400 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x00070403 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x00070406 Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x00070409 Data 6 app_tp_transfer.o(.data) + st_touch_init_sensor_off 0x00070411 Data 3 app_tp_st_touch.o(.data) + st_touch_init_sensor_on 0x00070414 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_reset 0x00070417 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_FpnlInit 0x0007041a Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_PnlInit 0x0007041d Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCfg 0x00070420 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvCx 0x00070423 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_SvPnl 0x00070426 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clearfifo 0x00070429 Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_clkreset 0x0007042c Data 3 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneM 0x0007042f Data 4 app_tp_st_touch.o(.data) + st_touch_tp_tuning_TuneS 0x00070433 Data 4 app_tp_st_touch.o(.data) + phone_data_E4 0x00070464 Data 1 app_tp_for_custom_s8.o(.data) + tp_flag 0x00070465 Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x00070466 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x00070467 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x00070468 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_clk_count 0x00070469 Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x0007046a Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x0007046b Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x0007046c Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x0007046d Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x0007046e Data 1 app_tp_for_custom_s8.o(.data) + phone_data_B1 0x00070477 Data 2 app_tp_for_custom_s8.o(.data) + phone_data_72_13 0x00070482 Data 1292 app_tp_for_custom_s8.o(.data) + phone_data_75_7401_7D01 0x0007098e Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_7401_7D03 0x00070c1c Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_7402_7D01 0x00070eaa Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_7402_7D03 0x00071138 Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_7403_7D01 0x000713c6 Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_7403_7D03 0x00071654 Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_FF 0x000718e2 Data 288 app_tp_for_custom_s8.o(.data) + fingerprint_arr_on 0x00071a02 Data 16 app_tp_for_custom_s8.o(.data) + fingerprint_arr_off 0x00071a12 Data 16 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x00071a22 Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x00071aea Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x00071aeb Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x00071aec Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x00071aed Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x00071af0 Data 5 app_tp_for_custom_s8.o(.data) + fingerprint_flag 0x00071af5 Data 1 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x00071af8 Data 48 app_tp_for_custom_s8.o(.data) + g_fls_w_cmd 0x00071b28 Data 1 norflash.o(.data) + g_fls_r_cmd 0x00071b29 Data 1 norflash.o(.data) + g_fls_write_en_status 0x00071b2a Data 1 norflash.o(.data) + isFlsTransferEnd 0x00071b2b Data 1 norflash.o(.data) + isFlsFifoReq 0x00071b2c Data 1 norflash.o(.data) + isNandWriteCompleted 0x00071b2d Data 1 norflash.o(.data) + isNandReadCompleted 0x00071b2e Data 1 norflash.o(.data) + g_fls_error_info 0x00071b34 Data 6 norflash.o(.data) + g_systick_cb_func 0x00071b40 Data 4 drv_common.o(.data) + g_system_clock 0x00071b44 Data 4 drv_common.o(.data) + g_scld_fhd_filter_h 0x00071b5c Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x00071c5c Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x00071d5c Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x00071e5c Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x00071f5c Data 128 drv_param_init.o(.data) + g_ccm_setting 0x00071fdc Data 36 drv_param_init.o(.data) + g_sof_gen_te_func 0x00072074 Data 4 hal_internal_vsync.o(.data) + g_int_rxbr_irq0_cb_func 0x00072078 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x0007207c Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x00072080 Data 4 drv_vidc.o(.data) + __stdout 0x000720a8 Data 4 stdout.o(.data) + tp_scan_data 0x00072240 Data 12 app_tp_st_touch.o(.bss) + string 0x0007235c Data 256 tau_log.o(.bss) + phone_data_75_7401_7D02 0x0007245c Data 654 app_tp_for_custom_s8.o(.bss) + hal_dmahandle 0x000726ec Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x0007278c Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x000727ac Data 16 hal_uart.o(.bss) + g_vsync_hande 0x00072958 Data 100 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x000729bc Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x000732dc Data 4144 dcs_packet_fifo.o(.bss) + g_spis_ctrl_handle 0x0007430c Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x00074330 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00075330 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x00010d74, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000ff08]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000ee94, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 571 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2804 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 3114 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 3117 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 3119 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 3121 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 3122 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 3124 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 3126 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 3115 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 572 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2807 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2809 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2811 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2813 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 3078 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 3080 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 3082 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 3084 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 3086 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 3088 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 3090 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 3092 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 3094 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 3098 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 3100 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 3102 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 3104 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 3106 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 3108 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 3110 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 3112 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 3129 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 3131 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 3133 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 3135 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 3144 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 3145 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 3147 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 3151 .text mf_p.l(dsqrt.o) + 0x00010afa 0x00010afa 0x00000002 PAD + 0x00010afc 0x00010afc 0x00000040 Code RO 3153 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 3155 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 3157 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000060 Code RO 3167 .text mc_p.l(__dclz77c.o) + 0x00010be8 0x00010be8 0x00000018 Code RO 2438 i.ADC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c00 0x00010c00 0x00000018 Code RO 2439 i.AP_NRESET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c18 0x00010c18 0x00000040 Code RO 448 i.CRC16_2 app_tp_st_touch.o + 0x00010c58 0x00010c58 0x00000014 Code RO 2440 i.DMA_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c6c 0x00010c6c 0x0000001c Code RO 2441 i.EXTI_INT0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c88 0x00010c88 0x0000001c Code RO 2442 i.EXTI_INT1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ca4 0x00010ca4 0x0000001c Code RO 2443 i.EXTI_INT2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cc0 0x00010cc0 0x0000001c Code RO 2444 i.EXTI_INT3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cdc 0x00010cdc 0x0000001c Code RO 2445 i.EXTI_INT4_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cf8 0x00010cf8 0x0000001c Code RO 2446 i.EXTI_INT5_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d14 0x00010d14 0x0000001c Code RO 2447 i.EXTI_INT6_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d30 0x00010d30 0x0000001c Code RO 2448 i.EXTI_INT7_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d4c 0x00010d4c 0x00000014 Code RO 2449 i.FLSCTRL_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d60 0x00010d60 0x0000004e Code RO 99 i.Gpio_swire_output ap_demo.o + 0x00010dae 0x00010dae 0x00000002 PAD + 0x00010db0 0x00010db0 0x00000014 Code RO 2450 i.HardFault_Handler CVWL368.lib(irq_redirect .o) + 0x00010dc4 0x00010dc4 0x00000018 Code RO 2451 i.I2C0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ddc 0x00010ddc 0x00000018 Code RO 2452 i.I2C1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010df4 0x00010df4 0x00000018 Code RO 2453 i.LCDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e0c 0x00010e0c 0x00000028 Code RO 1037 i.LOG_printf CVWL368.lib(tau_log.o) + 0x00010e34 0x00010e34 0x00000018 Code RO 2454 i.MEMC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e4c 0x00010e4c 0x00000018 Code RO 2455 i.MIPI_RX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e64 0x00010e64 0x00000018 Code RO 2456 i.MIPI_TX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e7c 0x00010e7c 0x0000001c Code RO 2457 i.PWMDET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e98 0x00010e98 0x00000124 Code RO 291 i.S20_Start_init app_tp_transfer.o + 0x00010fbc 0x00010fbc 0x0000001c Code RO 2458 i.SPIM_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010fd8 0x00010fd8 0x0000001c Code RO 2459 i.SPIS_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010ff4 0x00010ff4 0x00000002 Code RO 2686 i.UART_DisableDma CVWL368.lib(drv_uart.o) + 0x00010ff6 0x00010ff6 0x00000004 Code RO 2692 i.UART_GetInstance CVWL368.lib(drv_uart.o) + 0x00010ffa 0x00010ffa 0x00000002 Code RO 3162 i.__scatterload_null mc_p.l(handlers.o) + 0x00010ffc 0x00010ffc 0x00000004 Code RO 110 i.ap_set_display_on ap_demo.o + 0x00011000 0x00011000 0x00000014 Data RO 1302 .ARM.__at_0x11000 CVWL368.lib(drv_common.o) + 0x00011014 0x00011014 0x00000004 Code RO 2022 i.drv_dsi_rx_set_inten CVWL368.lib(drv_dsi_rx.o) + 0x00011018 0x00011018 0x00000004 Data RO 1303 .ARM.__at_0x11018 CVWL368.lib(drv_common.o) + 0x0001101c 0x0001101c 0x0000001c Code RO 2460 i.SWIRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011038 0x00011038 0x00000018 Code RO 2461 i.SysTick_Handler CVWL368.lib(irq_redirect .o) + 0x00011050 0x00011050 0x00000018 Code RO 2462 i.TIMER0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011068 0x00011068 0x00000018 Code RO 2463 i.TIMER1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011080 0x00011080 0x00000018 Code RO 2464 i.TIMER2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011098 0x00011098 0x00000018 Code RO 2465 i.TIMER3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110b0 0x000110b0 0x0000001c Code RO 2682 i.UART0_IRQ_Handle CVWL368.lib(drv_uart.o) + 0x000110cc 0x000110cc 0x00000018 Code RO 2466 i.UART_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000110e4 0x000110e4 0x00000024 Code RO 2700 i.UART_ResetRxFIFO CVWL368.lib(drv_uart.o) + 0x00011108 0x00011108 0x00000048 Code RO 2703 i.UART_SetBaudRate CVWL368.lib(drv_uart.o) + 0x00011150 0x00011150 0x0000001a Code RO 2704 i.UART_SwitchSCLK CVWL368.lib(drv_uart.o) + 0x0001116a 0x0001116a 0x00000134 Code RO 2706 i.UART_TransferHandleIRQ CVWL368.lib(drv_uart.o) + 0x0001129e 0x0001129e 0x0000001a Code RO 2708 i.UART_WriteBlocking CVWL368.lib(drv_uart.o) + 0x000112b8 0x000112b8 0x000000bc Code RO 2709 i.UART_init CVWL368.lib(drv_uart.o) + 0x00011374 0x00011374 0x00000018 Code RO 2467 i.VIDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001138c 0x0001138c 0x00000018 Code RO 2468 i.VPRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113a4 0x000113a4 0x00000018 Code RO 2469 i.WDG_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x000113bc 0x000113bc 0x00000020 Code RO 3050 i.__0printf mc_p.l(printfa.o) + 0x000113dc 0x000113dc 0x00000024 Code RO 3056 i.__0vsprintf mc_p.l(printfa.o) + 0x00011400 0x00011400 0x0000002e Code RO 3149 i.__ARM_clz mf_p.l(depilogue.o) + 0x0001142e 0x0001142e 0x0000001a Code RO 669 i.__ARM_common_switch8 CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00011448 0x00011448 0x00000018 Code RO 1623 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_i2c_master.o) + 0x00011460 0x00011460 0x00000018 Code RO 1786 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_spi_master.o) + 0x00011478 0x00011478 0x00000020 Code RO 2292 i.__NVIC_DisableIRQ CVWL368.lib(drv_rxbr.o) + 0x00011498 0x00011498 0x00000018 Code RO 2293 i.__NVIC_EnableIRQ CVWL368.lib(drv_rxbr.o) + 0x000114b0 0x000114b0 0x00000044 Code RO 2588 i.__NVIC_SetPriority CVWL368.lib(hal_spi_slave.o) + 0x000114f4 0x000114f4 0x0000000e Code RO 3161 i.__scatterload_copy mc_p.l(handlers.o) + 0x00011502 0x00011502 0x0000000e Code RO 3163 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x00011510 0x00011510 0x0000000c Code RO 3139 i.__set_errno mc_p.l(errno.o) + 0x0001151c 0x0001151c 0x00000174 Code RO 3057 i._fp_digits mc_p.l(printfa.o) + 0x00011690 0x00011690 0x000006ec Code RO 3058 i._printf_core mc_p.l(printfa.o) + 0x00011d7c 0x00011d7c 0x00000020 Code RO 3059 i._printf_post_padding mc_p.l(printfa.o) + 0x00011d9c 0x00011d9c 0x0000002c Code RO 3060 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011dc8 0x00011dc8 0x0000000a Code RO 3062 i._sputc mc_p.l(printfa.o) + 0x00011dd2 0x00011dd2 0x00000002 PAD + 0x00011dd4 0x00011dd4 0x000003e4 Code RO 102 i.ap_dcs_read ap_demo.o + 0x000121b8 0x000121b8 0x000001e4 Code RO 103 i.ap_demo ap_demo.o + 0x0001239c 0x0001239c 0x0000002c Code RO 104 i.ap_get_reg_53 ap_demo.o + 0x000123c8 0x000123c8 0x00000054 Code RO 105 i.ap_get_reg_7A ap_demo.o + 0x0001241c 0x0001241c 0x0000009c Code RO 106 i.ap_get_reg_df ap_demo.o + 0x000124b8 0x000124b8 0x00000030 Code RO 449 i.ap_get_tp_calibration_status_01 app_tp_st_touch.o + 0x000124e8 0x000124e8 0x00000030 Code RO 107 i.ap_reset_cb ap_demo.o + 0x00012518 0x00012518 0x0000005c Code RO 108 i.ap_set_backlight_51 ap_demo.o + 0x00012574 0x00012574 0x00000044 Code RO 109 i.ap_set_display_off ap_demo.o + 0x000125b8 0x000125b8 0x0000007c Code RO 111 i.ap_set_enter_sleep_mode ap_demo.o + 0x00012634 0x00012634 0x00000044 Code RO 112 i.ap_set_exit_sleep_mode ap_demo.o + 0x00012678 0x00012678 0x00000098 Code RO 450 i.ap_set_tp_calibration_04 app_tp_st_touch.o + 0x00012710 0x00012710 0x000000b0 Code RO 451 i.ap_tp_st_touch_calibration app_tp_st_touch.o + 0x000127c0 0x000127c0 0x0000000e Code RO 452 i.ap_tp_st_touch_error_handler_F3 app_tp_st_touch.o + 0x000127ce 0x000127ce 0x00000020 Code RO 453 i.ap_tp_st_touch_error_handler_FF app_tp_st_touch.o + 0x000127ee 0x000127ee 0x00000002 PAD + 0x000127f0 0x000127f0 0x000000a8 Code RO 454 i.ap_tp_st_touch_get_calibration_success_mark app_tp_st_touch.o + 0x00012898 0x00012898 0x000000c4 Code RO 455 i.ap_tp_st_touch_hardware_reset app_tp_st_touch.o + 0x0001295c 0x0001295c 0x0000001c Code RO 456 i.ap_tp_st_touch_scan_point_init app_tp_st_touch.o + 0x00012978 0x00012978 0x0000009c Code RO 457 i.ap_tp_st_touch_scan_point_record_event app_tp_st_touch.o + 0x00012a14 0x00012a14 0x00000050 Code RO 458 i.ap_tp_st_touch_scan_point_record_event_exec app_tp_st_touch.o + 0x00012a64 0x00012a64 0x00000034 Code RO 459 i.ap_tp_st_touch_simulate_finger_release_event app_tp_st_touch.o + 0x00012a98 0x00012a98 0x00000030 Code RO 113 i.ap_update_frame_rate ap_demo.o + 0x00012ac8 0x00012ac8 0x0000001c Code RO 2294 i.app_ADC_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x00012ae4 0x00012ae4 0x00000024 Code RO 1547 i.app_AP_NRESET_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012b08 0x00012b08 0x0000001c Code RO 1548 i.app_EXTI_INT0_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012b24 0x00012b24 0x0000001c Code RO 1549 i.app_EXTI_INT1_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012b40 0x00012b40 0x0000001c Code RO 1550 i.app_EXTI_INT2_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012b5c 0x00012b5c 0x0000001c Code RO 1551 i.app_EXTI_INT3_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012b78 0x00012b78 0x0000001c Code RO 1552 i.app_EXTI_INT4_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012b94 0x00012b94 0x0000001c Code RO 1553 i.app_EXTI_INT5_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012bb0 0x00012bb0 0x0000001c Code RO 1554 i.app_EXTI_INT6_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012bcc 0x00012bcc 0x0000001c Code RO 1555 i.app_EXTI_INT7_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012be8 0x00012be8 0x00000048 Code RO 1294 i.app_HardFault_Handler CVWL368.lib(drv_common.o) + 0x00012c30 0x00012c30 0x00000018 Code RO 1658 i.app_I2C0_IRQn_Handler CVWL368.lib(drv_i2c_slave.o) + 0x00012c48 0x00012c48 0x00000010 Code RO 1624 i.app_I2C1_IRQn_Handler CVWL368.lib(drv_i2c_master.o) + 0x00012c58 0x00012c58 0x000001a4 Code RO 1904 i.app_LCDC_IRQn_Handler CVWL368.lib(hal_internal_vsync.o) + 0x00012dfc 0x00012dfc 0x00000088 Code RO 2236 i.app_MEMC_IRQn_Handler CVWL368.lib(drv_memc.o) + 0x00012e84 0x00012e84 0x00000298 Code RO 2008 i.app_MIPI_RX_IRQn_Handler CVWL368.lib(drv_dsi_rx.o) + 0x0001311c 0x0001311c 0x000000a0 Code RO 2064 i.app_MIPI_TX_IRQn_Handler CVWL368.lib(drv_dsi_tx.o) + 0x000131bc 0x000131bc 0x00000048 Code RO 1707 i.app_PWMDET_IRQn_Handler CVWL368.lib(drv_pwm.o) + 0x00013204 0x00013204 0x00000030 Code RO 1787 i.app_SPIM_IRQn_Handler CVWL368.lib(drv_spi_master.o) + 0x00013234 0x00013234 0x00000200 Code RO 2589 i.app_SPIS_IRQn_Handler CVWL368.lib(hal_spi_slave.o) + 0x00013434 0x00013434 0x00000020 Code RO 1819 i.app_SWIRE_IRQn_Handler CVWL368.lib(drv_swire.o) + 0x00013454 0x00013454 0x00000018 Code RO 1295 i.app_SysTick_Handler CVWL368.lib(drv_common.o) + 0x0001346c 0x0001346c 0x0000000a Code RO 1869 i.app_TIMER0_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x00013476 0x00013476 0x0000000a Code RO 1870 i.app_TIMER1_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x00013480 0x00013480 0x0000000a Code RO 1871 i.app_TIMER2_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x0001348a 0x0001348a 0x0000000a Code RO 1872 i.app_TIMER3_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x00013494 0x00013494 0x00000008 Code RO 2710 i.app_UART_IRQn_Handler CVWL368.lib(drv_uart.o) + 0x0001349c 0x0001349c 0x0000001c Code RO 2359 i.app_VIDC_IRQn_Handler CVWL368.lib(drv_vidc.o) + 0x000134b8 0x000134b8 0x0000001c Code RO 2295 i.app_VPRE_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x000134d4 0x000134d4 0x00000038 Code RO 2769 i.app_WDG_IRQn_Handler CVWL368.lib(drv_wdg.o) + 0x0001350c 0x0001350c 0x00000010 Code RO 1409 i.app_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x0001351c 0x0001351c 0x00000030 Code RO 1210 i.app_fls_ctrl_Handler CVWL368.lib(norflash.o) + 0x0001354c 0x0001354c 0x00000024 Code RO 292 i.app_tp_I2C_init app_tp_transfer.o + 0x00013570 0x00013570 0x000000a8 Code RO 461 i.app_tp_calibration_exec app_tp_st_touch.o + 0x00013618 0x00013618 0x0000000a Code RO 293 i.app_tp_i2cs_callback app_tp_transfer.o + 0x00013622 0x00013622 0x00000002 PAD + 0x00013624 0x00013624 0x00000044 Code RO 294 i.app_tp_init app_tp_transfer.o + 0x00013668 0x00013668 0x00000020 Code RO 295 i.app_tp_m_read app_tp_transfer.o + 0x00013688 0x00013688 0x00000008 Code RO 296 i.app_tp_m_transfer_complate app_tp_transfer.o + 0x00013690 0x00013690 0x00000008 Code RO 297 i.app_tp_m_write app_tp_transfer.o + 0x00013698 0x00013698 0x00000408 Code RO 1048 i.app_tp_phone_analysis_data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00013aa0 0x00013aa0 0x00000008 Code RO 300 i.app_tp_s_read app_tp_transfer.o + 0x00013aa8 0x00013aa8 0x00000008 Code RO 302 i.app_tp_s_write app_tp_transfer.o + 0x00013ab0 0x00013ab0 0x000003b0 Code RO 1050 i.app_tp_screen_analysis_int WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00013e60 0x00013e60 0x00000030 Code RO 303 i.app_tp_screen_init app_tp_transfer.o + 0x00013e90 0x00013e90 0x0000000c Code RO 304 i.app_tp_screen_int_callback app_tp_transfer.o + 0x00013e9c 0x00013e9c 0x00000038 Code RO 305 i.app_tp_screen_int_init app_tp_transfer.o + 0x00013ed4 0x00013ed4 0x0000001c Code RO 306 i.app_tp_screen_int_lvl_low app_tp_transfer.o + 0x00013ef0 0x00013ef0 0x00000030 Code RO 307 i.app_tp_transfer_phone app_tp_transfer.o + 0x00013f20 0x00013f20 0x00000040 Code RO 308 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00013f60 0x00013f60 0x00000124 Code RO 309 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x00014084 0x00014084 0x00000014 Code RO 310 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x00014098 0x00014098 0x00000024 Code RO 551 i.board_Init board.o + 0x000140bc 0x000140bc 0x000004f0 Code RO 1905 i.calc_framebuffer_setting CVWL368.lib(hal_internal_vsync.o) + 0x000145ac 0x000145ac 0x000000c8 Code RO 2793 i.ceil m_ps.l(ceil.o) + 0x00014674 0x00014674 0x0000002c Code RO 1906 i.check_mipi_rx_tx_video_info CVWL368.lib(hal_internal_vsync.o) + 0x000146a0 0x000146a0 0x00000094 Code RO 1907 i.check_pkt_buf_rev CVWL368.lib(hal_internal_vsync.o) + 0x00014734 0x00014734 0x00000058 Code RO 1995 i.dcs_packet_fifo_alloc CVWL368.lib(dcs_packet_fifo.o) + 0x0001478c 0x0001478c 0x00000018 Code RO 1996 i.dcs_packet_fifo_init CVWL368.lib(dcs_packet_fifo.o) + 0x000147a4 0x000147a4 0x00000044 Code RO 1997 i.dcs_packet_free_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x000147e8 0x000147e8 0x00000024 Code RO 1998 i.dcs_packet_get_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x0001480c 0x0001480c 0x0000001c Code RO 1908 i.dcs_sw_filter CVWL368.lib(hal_internal_vsync.o) + 0x00014828 0x00014828 0x00000018 Code RO 1029 i.delayMs CVWL368.lib(tau_delay.o) + 0x00014840 0x00014840 0x00000022 Code RO 1030 i.delayUs CVWL368.lib(tau_delay.o) + 0x00014862 0x00014862 0x00000002 PAD + 0x00014864 0x00014864 0x00000038 Code RO 1838 i.drv_ap_rst_trig_edge_detect CVWL368.lib(drv_sys_cfg.o) + 0x0001489c 0x0001489c 0x0000000c Code RO 2559 i.drv_chip_info_get_info CVWL368.lib(drv_chip_info.o) + 0x000148a8 0x000148a8 0x00000040 Code RO 2560 i.drv_chip_info_init CVWL368.lib(drv_chip_info.o) + 0x000148e8 0x000148e8 0x000000b0 Code RO 2561 i.drv_chip_rx_info_check CVWL368.lib(drv_chip_info.o) + 0x00014998 0x00014998 0x00000014 Code RO 2562 i.drv_chip_rx_init_done CVWL368.lib(drv_chip_info.o) + 0x000149ac 0x000149ac 0x00000058 Code RO 1297 i.drv_common_enable_systick CVWL368.lib(drv_common.o) + 0x00014a04 0x00014a04 0x00000008 Code RO 1300 i.drv_common_system_init CVWL368.lib(drv_common.o) + 0x00014a0c 0x00014a0c 0x00000010 Code RO 1322 i.drv_crgu_config_reset_modules CVWL368.lib(drv_crgu.o) + 0x00014a1c 0x00014a1c 0x00000014 Code RO 1335 i.drv_crgu_set_ahb_pre_div CVWL368.lib(drv_crgu.o) + 0x00014a30 0x00014a30 0x00000014 Code RO 1336 i.drv_crgu_set_ahb_src CVWL368.lib(drv_crgu.o) + 0x00014a44 0x00014a44 0x00000020 Code RO 1339 i.drv_crgu_set_clock CVWL368.lib(drv_crgu.o) + 0x00014a64 0x00014a64 0x00000014 Code RO 1340 i.drv_crgu_set_dpi_mux_src CVWL368.lib(drv_crgu.o) + 0x00014a78 0x00014a78 0x00000018 Code RO 1341 i.drv_crgu_set_dpi_pre_div CVWL368.lib(drv_crgu.o) + 0x00014a90 0x00014a90 0x00000014 Code RO 1342 i.drv_crgu_set_dpi_pre_src CVWL368.lib(drv_crgu.o) + 0x00014aa4 0x00014aa4 0x00000014 Code RO 1343 i.drv_crgu_set_dsc_core_div CVWL368.lib(drv_crgu.o) + 0x00014ab8 0x00014ab8 0x00000014 Code RO 1344 i.drv_crgu_set_dsco_src CVWL368.lib(drv_crgu.o) + 0x00014acc 0x00014acc 0x00000014 Code RO 1345 i.drv_crgu_set_dsco_src_div CVWL368.lib(drv_crgu.o) + 0x00014ae0 0x00014ae0 0x00000014 Code RO 1346 i.drv_crgu_set_fb_div CVWL368.lib(drv_crgu.o) + 0x00014af4 0x00014af4 0x00000014 Code RO 1347 i.drv_crgu_set_fb_src CVWL368.lib(drv_crgu.o) + 0x00014b08 0x00014b08 0x00000014 Code RO 1350 i.drv_crgu_set_lcdc_div CVWL368.lib(drv_crgu.o) + 0x00014b1c 0x00014b1c 0x00000014 Code RO 1351 i.drv_crgu_set_lcdc_src CVWL368.lib(drv_crgu.o) + 0x00014b30 0x00014b30 0x00000014 Code RO 1352 i.drv_crgu_set_mipi_cfg_src CVWL368.lib(drv_crgu.o) + 0x00014b44 0x00014b44 0x00000018 Code RO 1353 i.drv_crgu_set_mipi_ref_src CVWL368.lib(drv_crgu.o) + 0x00014b5c 0x00014b5c 0x00000018 Code RO 1356 i.drv_crgu_set_reset CVWL368.lib(drv_crgu.o) + 0x00014b74 0x00014b74 0x00000014 Code RO 1357 i.drv_crgu_set_rxbr_div CVWL368.lib(drv_crgu.o) + 0x00014b88 0x00014b88 0x00000014 Code RO 1358 i.drv_crgu_set_rxbr_src CVWL368.lib(drv_crgu.o) + 0x00014b9c 0x00014b9c 0x00000014 Code RO 1360 i.drv_crgu_set_vidc_src CVWL368.lib(drv_crgu.o) + 0x00014bb0 0x00014bb0 0x00000018 Code RO 1413 i.drv_dma_clear_flag CVWL368.lib(drv_dma.o) + 0x00014bc8 0x00014bc8 0x0000001c Code RO 1414 i.drv_dma_create_handle CVWL368.lib(drv_dma.o) + 0x00014be4 0x00014be4 0x00000010 Code RO 1416 i.drv_dma_disenable_channel CVWL368.lib(drv_dma.o) + 0x00014bf4 0x00014bf4 0x00000010 Code RO 1418 i.drv_dma_enable_channel CVWL368.lib(drv_dma.o) + 0x00014c04 0x00014c04 0x00000024 Code RO 1419 i.drv_dma_enable_channel_interrupts CVWL368.lib(drv_dma.o) + 0x00014c28 0x00014c28 0x0000000c Code RO 1421 i.drv_dma_get_channel_flag CVWL368.lib(drv_dma.o) + 0x00014c34 0x00014c34 0x00000090 Code RO 1424 i.drv_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00014cc4 0x00014cc4 0x00000012 Code RO 1426 i.drv_dma_prepar_transfer CVWL368.lib(drv_dma.o) + 0x00014cd6 0x00014cd6 0x0000001a Code RO 1428 i.drv_dma_set_burst CVWL368.lib(drv_dma.o) + 0x00014cf0 0x00014cf0 0x00000006 Code RO 1429 i.drv_dma_set_callback CVWL368.lib(drv_dma.o) + 0x00014cf6 0x00014cf6 0x00000002 PAD + 0x00014cf8 0x00014cf8 0x00000044 Code RO 1431 i.drv_dma_set_transfer CVWL368.lib(drv_dma.o) + 0x00014d3c 0x00014d3c 0x00000036 Code RO 2572 i.drv_dsc_dec_convert_pps_rc_parameter CVWL368.lib(drv_dsc_dec.o) + 0x00014d72 0x00014d72 0x0000000c Code RO 2573 i.drv_dsc_dec_disable CVWL368.lib(drv_dsc_dec.o) + 0x00014d7e 0x00014d7e 0x00000002 PAD + 0x00014d80 0x00014d80 0x00000074 Code RO 2574 i.drv_dsc_dec_enable CVWL368.lib(drv_dsc_dec.o) + 0x00014df4 0x00014df4 0x0000000a Code RO 2575 i.drv_dsc_dec_get_nslc CVWL368.lib(drv_dsc_dec.o) + 0x00014dfe 0x00014dfe 0x00000028 Code RO 2577 i.drv_dsc_dec_set_u8_pps CVWL368.lib(drv_dsc_dec.o) + 0x00014e26 0x00014e26 0x00000002 PAD + 0x00014e28 0x00014e28 0x00000104 Code RO 2009 i.drv_dsi_rx_calc_ipi_tx_delay CVWL368.lib(drv_dsi_rx.o) + 0x00014f2c 0x00014f2c 0x00000040 Code RO 2010 i.drv_dsi_rx_enable_irq CVWL368.lib(drv_dsi_rx.o) + 0x00014f6c 0x00014f6c 0x00000050 Code RO 2011 i.drv_dsi_rx_get_color_bpp CVWL368.lib(drv_dsi_rx.o) + 0x00014fbc 0x00014fbc 0x0000001c Code RO 2012 i.drv_dsi_rx_get_color_pcc CVWL368.lib(drv_dsi_rx.o) + 0x00014fd8 0x00014fd8 0x00000008 Code RO 2013 i.drv_dsi_rx_get_compression_en CVWL368.lib(drv_dsi_rx.o) + 0x00014fe0 0x00014fe0 0x00000006 Code RO 2014 i.drv_dsi_rx_get_max_ret_size CVWL368.lib(drv_dsi_rx.o) + 0x00014fe6 0x00014fe6 0x0000000e Code RO 2018 i.drv_dsi_rx_power_up CVWL368.lib(drv_dsi_rx.o) + 0x00014ff4 0x00014ff4 0x00000020 Code RO 2019 i.drv_dsi_rx_set_ctrl_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00015014 0x00015014 0x00000010 Code RO 2020 i.drv_dsi_rx_set_ddi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00015024 0x00015024 0x00000010 Code RO 2023 i.drv_dsi_rx_set_ipi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00015034 0x00015034 0x00000046 Code RO 2025 i.drv_dsi_rx_set_lane_swap CVWL368.lib(drv_dsi_rx.o) + 0x0001507a 0x0001507a 0x00000026 Code RO 2026 i.drv_dsi_rx_set_resp_cnt CVWL368.lib(drv_dsi_rx.o) + 0x000150a0 0x000150a0 0x00000104 Code RO 2027 i.drv_dsi_rx_set_up_phy CVWL368.lib(drv_dsi_rx.o) + 0x000151a4 0x000151a4 0x0000000e Code RO 2028 i.drv_dsi_rx_shut_down CVWL368.lib(drv_dsi_rx.o) + 0x000151b2 0x000151b2 0x00000004 Code RO 2065 i.drv_dsi_tx_command_get_payload CVWL368.lib(drv_dsi_tx.o) + 0x000151b6 0x000151b6 0x00000014 Code RO 2066 i.drv_dsi_tx_command_header CVWL368.lib(drv_dsi_tx.o) + 0x000151ca 0x000151ca 0x0000006c Code RO 2067 i.drv_dsi_tx_command_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00015236 0x00015236 0x00000004 Code RO 2068 i.drv_dsi_tx_command_put_payload CVWL368.lib(drv_dsi_tx.o) + 0x0001523a 0x0001523a 0x00000018 Code RO 2069 i.drv_dsi_tx_config_eotp CVWL368.lib(drv_dsi_tx.o) + 0x00015252 0x00015252 0x00000008 Code RO 2070 i.drv_dsi_tx_config_int CVWL368.lib(drv_dsi_tx.o) + 0x0001525a 0x0001525a 0x00000008 Code RO 2071 i.drv_dsi_tx_dpi_lpcmd_time CVWL368.lib(drv_dsi_tx.o) + 0x00015262 0x00015262 0x0000000a Code RO 2072 i.drv_dsi_tx_dpi_mode CVWL368.lib(drv_dsi_tx.o) + 0x0001526c 0x0001526c 0x00000024 Code RO 2073 i.drv_dsi_tx_dpi_polarity CVWL368.lib(drv_dsi_tx.o) + 0x00015290 0x00015290 0x00000004 Code RO 2074 i.drv_dsi_tx_edpi_cmd_size CVWL368.lib(drv_dsi_tx.o) + 0x00015294 0x00015294 0x00000004 Code RO 2076 i.drv_dsi_tx_get_cmd_status CVWL368.lib(drv_dsi_tx.o) + 0x00015298 0x00015298 0x00000004 Code RO 2078 i.drv_dsi_tx_mode CVWL368.lib(drv_dsi_tx.o) + 0x0001529c 0x0001529c 0x00000018 Code RO 2079 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL368.lib(drv_dsi_tx.o) + 0x000152b4 0x000152b4 0x0000001a Code RO 2080 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL368.lib(drv_dsi_tx.o) + 0x000152ce 0x000152ce 0x0000000c Code RO 2082 i.drv_dsi_tx_phy_lane_mode CVWL368.lib(drv_dsi_tx.o) + 0x000152da 0x000152da 0x00000064 Code RO 2086 i.drv_dsi_tx_phy_status_ready CVWL368.lib(drv_dsi_tx.o) + 0x0001533e 0x0001533e 0x0000003e Code RO 2087 i.drv_dsi_tx_phy_status_stopstate CVWL368.lib(drv_dsi_tx.o) + 0x0001537c 0x0001537c 0x00000134 Code RO 2089 i.drv_dsi_tx_phy_test_setup CVWL368.lib(drv_dsi_tx.o) + 0x000154b0 0x000154b0 0x0000001e Code RO 2090 i.drv_dsi_tx_phy_time_cfg CVWL368.lib(drv_dsi_tx.o) + 0x000154ce 0x000154ce 0x00000008 Code RO 2094 i.drv_dsi_tx_powerup CVWL368.lib(drv_dsi_tx.o) + 0x000154d6 0x000154d6 0x0000001c Code RO 2095 i.drv_dsi_tx_response_mode CVWL368.lib(drv_dsi_tx.o) + 0x000154f2 0x000154f2 0x00000018 Code RO 2098 i.drv_dsi_tx_set_bta_ack CVWL368.lib(drv_dsi_tx.o) + 0x0001550a 0x0001550a 0x0000000c Code RO 2099 i.drv_dsi_tx_set_esc_div CVWL368.lib(drv_dsi_tx.o) + 0x00015516 0x00015516 0x00000002 PAD + 0x00015518 0x00015518 0x00000040 Code RO 2100 i.drv_dsi_tx_set_int CVWL368.lib(drv_dsi_tx.o) + 0x00015558 0x00015558 0x00000010 Code RO 2101 i.drv_dsi_tx_set_time_out_div CVWL368.lib(drv_dsi_tx.o) + 0x00015568 0x00015568 0x00000008 Code RO 2102 i.drv_dsi_tx_set_video_chunk CVWL368.lib(drv_dsi_tx.o) + 0x00015570 0x00015570 0x00000022 Code RO 2103 i.drv_dsi_tx_set_video_timing CVWL368.lib(drv_dsi_tx.o) + 0x00015592 0x00015592 0x00000008 Code RO 2105 i.drv_dsi_tx_shutdown CVWL368.lib(drv_dsi_tx.o) + 0x0001559a 0x0001559a 0x00000026 Code RO 2106 i.drv_dsi_tx_timeout_cfg CVWL368.lib(drv_dsi_tx.o) + 0x000155c0 0x000155c0 0x000000aa Code RO 2109 i.drv_dsi_tx_video_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x0001566a 0x0001566a 0x00000016 Code RO 2110 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL368.lib(drv_dsi_tx.o) + 0x00015680 0x00015680 0x00000018 Code RO 2111 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL368.lib(drv_dsi_tx.o) + 0x00015698 0x00015698 0x0000002e Code RO 2510 i.drv_efuse_enter_inactive CVWL368.lib(drv_efuse.o) + 0x000156c6 0x000156c6 0x0000000c Code RO 2513 i.drv_efuse_int_enable CVWL368.lib(drv_efuse.o) + 0x000156d2 0x000156d2 0x00000032 Code RO 2514 i.drv_efuse_read CVWL368.lib(drv_efuse.o) + 0x00015704 0x00015704 0x00000018 Code RO 2515 i.drv_efuse_read_req CVWL368.lib(drv_efuse.o) + 0x0001571c 0x0001571c 0x00000018 Code RO 1556 i.drv_gpio_get_input_data CVWL368.lib(drv_gpio.o) + 0x00015734 0x00015734 0x0000000c Code RO 1558 i.drv_gpio_register_ap_reset_callback CVWL368.lib(drv_gpio.o) + 0x00015740 0x00015740 0x00000014 Code RO 1559 i.drv_gpio_register_callback CVWL368.lib(drv_gpio.o) + 0x00015754 0x00015754 0x00000050 Code RO 1561 i.drv_gpio_set_int CVWL368.lib(drv_gpio.o) + 0x000157a4 0x000157a4 0x00000020 Code RO 1562 i.drv_gpio_set_ioe CVWL368.lib(drv_gpio.o) + 0x000157c4 0x000157c4 0x00000010 Code RO 1563 i.drv_gpio_set_mode0 CVWL368.lib(drv_gpio.o) + 0x000157d4 0x000157d4 0x00000010 Code RO 1564 i.drv_gpio_set_mode1 CVWL368.lib(drv_gpio.o) + 0x000157e4 0x000157e4 0x00000010 Code RO 1565 i.drv_gpio_set_mode2 CVWL368.lib(drv_gpio.o) + 0x000157f4 0x000157f4 0x00000010 Code RO 1566 i.drv_gpio_set_mode3 CVWL368.lib(drv_gpio.o) + 0x00015804 0x00015804 0x00000020 Code RO 777 i.drv_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x00015824 0x00015824 0x00000130 Code RO 1567 i.drv_gpio_set_pull_state CVWL368.lib(drv_gpio.o) + 0x00015954 0x00015954 0x0000000c Code RO 1659 i.drv_i2c0_set_callback CVWL368.lib(drv_i2c_slave.o) + 0x00015960 0x00015960 0x0000000c Code RO 1625 i.drv_i2c1_set_callback CVWL368.lib(drv_i2c_master.o) + 0x0001596c 0x0001596c 0x00000034 Code RO 1599 i.drv_i2c_dma_callback CVWL368.lib(drv_i2c_dma.o) + 0x000159a0 0x000159a0 0x000000ac Code RO 1600 i.drv_i2c_dma_init CVWL368.lib(drv_i2c_dma.o) + 0x00015a4c 0x00015a4c 0x0000001a Code RO 1601 i.drv_i2c_enable_rx_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015a66 0x00015a66 0x00000018 Code RO 1602 i.drv_i2c_enable_tx_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015a7e 0x00015a7e 0x00000002 PAD + 0x00015a80 0x00015a80 0x00000060 Code RO 1627 i.drv_i2c_m_clear_it_pending_bit CVWL368.lib(drv_i2c_master.o) + 0x00015ae0 0x00015ae0 0x00000010 Code RO 1630 i.drv_i2c_m_enable CVWL368.lib(drv_i2c_master.o) + 0x00015af0 0x00015af0 0x00000038 Code RO 1631 i.drv_i2c_m_enable_intr CVWL368.lib(drv_i2c_master.o) + 0x00015b28 0x00015b28 0x0000008c Code RO 1637 i.drv_i2c_master_init CVWL368.lib(drv_i2c_master.o) + 0x00015bb4 0x00015bb4 0x0000005c Code RO 1603 i.drv_i2c_master_read_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015c10 0x00015c10 0x0000003c Code RO 1604 i.drv_i2c_master_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015c4c 0x00015c4c 0x0000003e Code RO 1605 i.drv_i2c_master_write_read_cmd CVWL368.lib(drv_i2c_dma.o) + 0x00015c8a 0x00015c8a 0x00000042 Code RO 1660 i.drv_i2c_s_clear_it_pending_bit CVWL368.lib(drv_i2c_slave.o) + 0x00015ccc 0x00015ccc 0x00000004 Code RO 1661 i.drv_i2c_s_config_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015cd0 0x00015cd0 0x00000008 Code RO 1662 i.drv_i2c_s_enable CVWL368.lib(drv_i2c_slave.o) + 0x00015cd8 0x00015cd8 0x00000014 Code RO 1663 i.drv_i2c_s_get_fifo_status CVWL368.lib(drv_i2c_slave.o) + 0x00015cec 0x00015cec 0x00000050 Code RO 1666 i.drv_i2c_s_set_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015d3c 0x00015d3c 0x0000001c Code RO 1667 i.drv_i2c_s_write_data CVWL368.lib(drv_i2c_slave.o) + 0x00015d58 0x00015d58 0x00000058 Code RO 1606 i.drv_i2c_set_dma_irq_callback CVWL368.lib(drv_i2c_dma.o) + 0x00015db0 0x00015db0 0x00000032 Code RO 1668 i.drv_i2c_slave_init CVWL368.lib(drv_i2c_slave.o) + 0x00015de2 0x00015de2 0x00000002 PAD + 0x00015de4 0x00015de4 0x00000018 Code RO 1607 i.drv_i2c_slave_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015dfc 0x00015dfc 0x00000018 Code RO 2178 i.drv_lcdc_config_bypass CVWL368.lib(drv_lcdc.o) + 0x00015e14 0x00015e14 0x00000030 Code RO 2179 i.drv_lcdc_config_ccm CVWL368.lib(drv_lcdc.o) + 0x00015e44 0x00015e44 0x00000016 Code RO 2180 i.drv_lcdc_config_disp_mode CVWL368.lib(drv_lcdc.o) + 0x00015e5a 0x00015e5a 0x00000024 Code RO 2181 i.drv_lcdc_config_dpi_polarity CVWL368.lib(drv_lcdc.o) + 0x00015e7e 0x00015e7e 0x00000026 Code RO 2182 i.drv_lcdc_config_dpi_timing CVWL368.lib(drv_lcdc.o) + 0x00015ea4 0x00015ea4 0x00000016 Code RO 2183 i.drv_lcdc_config_edpi_mode CVWL368.lib(drv_lcdc.o) + 0x00015eba 0x00015eba 0x00000016 Code RO 2184 i.drv_lcdc_config_endianness CVWL368.lib(drv_lcdc.o) + 0x00015ed0 0x00015ed0 0x0000000c Code RO 2185 i.drv_lcdc_config_input_size CVWL368.lib(drv_lcdc.o) + 0x00015edc 0x00015edc 0x0000001e Code RO 2186 i.drv_lcdc_config_int CVWL368.lib(drv_lcdc.o) + 0x00015efa 0x00015efa 0x00000022 Code RO 2187 i.drv_lcdc_config_int_single CVWL368.lib(drv_lcdc.o) + 0x00015f1c 0x00015f1c 0x00000022 Code RO 2188 i.drv_lcdc_config_overwrite CVWL368.lib(drv_lcdc.o) + 0x00015f3e 0x00015f3e 0x0000000c Code RO 2189 i.drv_lcdc_config_overwrite_rgb CVWL368.lib(drv_lcdc.o) + 0x00015f4a 0x00015f4a 0x0000001a Code RO 2190 i.drv_lcdc_config_partial_display_area CVWL368.lib(drv_lcdc.o) + 0x00015f64 0x00015f64 0x00000022 Code RO 2191 i.drv_lcdc_config_partial_display_enable CVWL368.lib(drv_lcdc.o) + 0x00015f86 0x00015f86 0x0000001a Code RO 2193 i.drv_lcdc_config_scale_up_coef CVWL368.lib(drv_lcdc.o) + 0x00015fa0 0x00015fa0 0x0000000c Code RO 2194 i.drv_lcdc_config_scale_up_step CVWL368.lib(drv_lcdc.o) + 0x00015fac 0x00015fac 0x0000004c Code RO 2195 i.drv_lcdc_config_src_parameter CVWL368.lib(drv_lcdc.o) + 0x00015ff8 0x00015ff8 0x00000006 Code RO 2196 i.drv_lcdc_config_thresh CVWL368.lib(drv_lcdc.o) + 0x00015ffe 0x00015ffe 0x00000012 Code RO 2197 i.drv_lcdc_ctrl_flow CVWL368.lib(drv_lcdc.o) + 0x00016010 0x00016010 0x00000020 Code RO 2199 i.drv_lcdc_enable_shadow_reg CVWL368.lib(drv_lcdc.o) + 0x00016030 0x00016030 0x00000040 Code RO 2200 i.drv_lcdc_set_int CVWL368.lib(drv_lcdc.o) + 0x00016070 0x00016070 0x00000014 Code RO 2202 i.drv_lcdc_set_video_hw_mode CVWL368.lib(drv_lcdc.o) + 0x00016084 0x00016084 0x00000020 Code RO 2203 i.drv_lcdc_start CVWL368.lib(drv_lcdc.o) + 0x000160a4 0x000160a4 0x0000000c Code RO 2237 i.drv_memc_clear_status CVWL368.lib(drv_memc.o) + 0x000160b0 0x000160b0 0x00000040 Code RO 2238 i.drv_memc_enable_irq CVWL368.lib(drv_memc.o) + 0x000160f0 0x000160f0 0x0000000c Code RO 2239 i.drv_memc_gen_a_tear_signal CVWL368.lib(drv_memc.o) + 0x000160fc 0x000160fc 0x00000012 Code RO 2240 i.drv_memc_get_status CVWL368.lib(drv_memc.o) + 0x0001610e 0x0001610e 0x00000010 Code RO 2241 i.drv_memc_rate_transfer_sel CVWL368.lib(drv_memc.o) + 0x0001611e 0x0001611e 0x0000000e Code RO 2242 i.drv_memc_sel_vsync CVWL368.lib(drv_memc.o) + 0x0001612c 0x0001612c 0x00000014 Code RO 2243 i.drv_memc_set_active_height CVWL368.lib(drv_memc.o) + 0x00016140 0x00016140 0x0000000c Code RO 2244 i.drv_memc_set_data_mode CVWL368.lib(drv_memc.o) + 0x0001614c 0x0001614c 0x00000010 Code RO 2247 i.drv_memc_set_double_buffer CVWL368.lib(drv_memc.o) + 0x0001615c 0x0001615c 0x00000012 Code RO 2248 i.drv_memc_set_double_buffer_reverse CVWL368.lib(drv_memc.o) + 0x0001616e 0x0001616e 0x00000010 Code RO 2250 i.drv_memc_set_fs_en_conditions CVWL368.lib(drv_memc.o) + 0x0001617e 0x0001617e 0x00000014 Code RO 2251 i.drv_memc_set_inten CVWL368.lib(drv_memc.o) + 0x00016192 0x00016192 0x00000002 PAD + 0x00016194 0x00016194 0x00000018 Code RO 2252 i.drv_memc_set_lcdc_st_conditions CVWL368.lib(drv_memc.o) + 0x000161ac 0x000161ac 0x0000001a Code RO 2253 i.drv_memc_set_ltpo_mode CVWL368.lib(drv_memc.o) + 0x000161c6 0x000161c6 0x0000000e Code RO 2257 i.drv_memc_set_tear_mode CVWL368.lib(drv_memc.o) + 0x000161d4 0x000161d4 0x00000028 Code RO 2258 i.drv_memc_set_tear_waveform CVWL368.lib(drv_memc.o) + 0x000161fc 0x000161fc 0x0000000e Code RO 2260 i.drv_memc_set_vidc_sync_cnt CVWL368.lib(drv_memc.o) + 0x0001620a 0x0001620a 0x00000002 PAD + 0x0001620c 0x0001620c 0x00000008 Code RO 1685 i.drv_param_init_get_ccm CVWL368.lib(drv_param_init.o) + 0x00016214 0x00016214 0x00000014 Code RO 1686 i.drv_param_init_get_scld_filter_h CVWL368.lib(drv_param_init.o) + 0x00016228 0x00016228 0x00000014 Code RO 1687 i.drv_param_init_get_scld_filter_v CVWL368.lib(drv_param_init.o) + 0x0001623c 0x0001623c 0x00000008 Code RO 1688 i.drv_param_init_get_sclu_filter CVWL368.lib(drv_param_init.o) + 0x00016244 0x00016244 0x00000014 Code RO 1689 i.drv_param_init_set_ccm CVWL368.lib(drv_param_init.o) + 0x00016258 0x00016258 0x00000064 Code RO 1690 i.drv_param_init_set_scld_filter CVWL368.lib(drv_param_init.o) + 0x000162bc 0x000162bc 0x00000024 Code RO 1692 i.drv_param_p2r_filter_init CVWL368.lib(drv_param_init.o) + 0x000162e0 0x000162e0 0x00000010 Code RO 2531 i.drv_phy_enable_calibration CVWL368.lib(drv_phy_common.o) + 0x000162f0 0x000162f0 0x0000003c Code RO 2532 i.drv_phy_get_calibration CVWL368.lib(drv_phy_common.o) + 0x0001632c 0x0001632c 0x00000060 Code RO 2533 i.drv_phy_get_pll_para CVWL368.lib(drv_phy_common.o) + 0x0001638c 0x0001638c 0x00000054 Code RO 2534 i.drv_phy_get_rate_para CVWL368.lib(drv_phy_common.o) + 0x000163e0 0x000163e0 0x00000010 Code RO 2535 i.drv_phy_test_clear CVWL368.lib(drv_phy_common.o) + 0x000163f0 0x000163f0 0x00000018 Code RO 2536 i.drv_phy_test_lock CVWL368.lib(drv_phy_common.o) + 0x00016408 0x00016408 0x00000020 Code RO 2538 i.drv_phy_test_write_1_byte CVWL368.lib(drv_phy_common.o) + 0x00016428 0x00016428 0x00000026 Code RO 2539 i.drv_phy_test_write_2_byte CVWL368.lib(drv_phy_common.o) + 0x0001644e 0x0001644e 0x0000001e Code RO 2540 i.drv_phy_test_write_code CVWL368.lib(drv_phy_common.o) + 0x0001646c 0x0001646c 0x00000020 Code RO 2541 i.drv_phy_test_write_data CVWL368.lib(drv_phy_common.o) + 0x0001648c 0x0001648c 0x00000020 Code RO 1747 i.drv_pwr_set_cp_mode CVWL368.lib(drv_pwr.o) + 0x000164ac 0x000164ac 0x00000018 Code RO 1749 i.drv_pwr_set_pvd_mode CVWL368.lib(drv_pwr.o) + 0x000164c4 0x000164c4 0x00000038 Code RO 1750 i.drv_pwr_set_system_clk_src CVWL368.lib(drv_pwr.o) + 0x000164fc 0x000164fc 0x0000000c Code RO 2029 i.drv_rx_phy_test_clear CVWL368.lib(drv_dsi_rx.o) + 0x00016508 0x00016508 0x00000010 Code RO 2030 i.drv_rx_phy_test_lock CVWL368.lib(drv_dsi_rx.o) + 0x00016518 0x00016518 0x00000014 Code RO 2032 i.drv_rx_phy_test_write_1_byte CVWL368.lib(drv_dsi_rx.o) + 0x0001652c 0x0001652c 0x00000016 Code RO 2033 i.drv_rx_phy_test_write_2_byte CVWL368.lib(drv_dsi_rx.o) + 0x00016542 0x00016542 0x0000000a Code RO 2296 i.drv_rxbr_clear_pkt_buffer CVWL368.lib(drv_rxbr.o) + 0x0001654c 0x0001654c 0x00000004 Code RO 2297 i.drv_rxbr_clear_status0 CVWL368.lib(drv_rxbr.o) + 0x00016550 0x00016550 0x0000005a Code RO 2299 i.drv_rxbr_enable_irq CVWL368.lib(drv_rxbr.o) + 0x000165aa 0x000165aa 0x00000002 PAD + 0x000165ac 0x000165ac 0x00000014 Code RO 2300 i.drv_rxbr_frame_drop_cfg CVWL368.lib(drv_rxbr.o) + 0x000165c0 0x000165c0 0x00000064 Code RO 2301 i.drv_rxbr_get_clk CVWL368.lib(drv_rxbr.o) + 0x00016624 0x00016624 0x00000004 Code RO 2302 i.drv_rxbr_get_col_addr CVWL368.lib(drv_rxbr.o) + 0x00016628 0x00016628 0x00000012 Code RO 1909 i.drv_rxbr_get_int_source CVWL368.lib(hal_internal_vsync.o) + 0x0001663a 0x0001663a 0x00000004 Code RO 2305 i.drv_rxbr_get_page_addr CVWL368.lib(drv_rxbr.o) + 0x0001663e 0x0001663e 0x00000012 Code RO 1910 i.drv_rxbr_get_status0 CVWL368.lib(hal_internal_vsync.o) + 0x00016650 0x00016650 0x0000000c Code RO 2307 i.drv_rxbr_hline_rcv0_cfg CVWL368.lib(drv_rxbr.o) + 0x0001665c 0x0001665c 0x00000008 Code RO 2308 i.drv_rxbr_hline_rcv_cfg CVWL368.lib(drv_rxbr.o) + 0x00016664 0x00016664 0x0000000c Code RO 2309 i.drv_rxbr_register_irq0_callback CVWL368.lib(drv_rxbr.o) + 0x00016670 0x00016670 0x0000000c Code RO 2310 i.drv_rxbr_register_irq1_callback CVWL368.lib(drv_rxbr.o) + 0x0001667c 0x0001667c 0x00000014 Code RO 2311 i.drv_rxbr_set_ack_pkt_header CVWL368.lib(drv_rxbr.o) + 0x00016690 0x00016690 0x000000cc Code RO 2312 i.drv_rxbr_set_cmd_filter CVWL368.lib(drv_rxbr.o) + 0x0001675c 0x0001675c 0x00000014 Code RO 2314 i.drv_rxbr_set_color_format CVWL368.lib(drv_rxbr.o) + 0x00016770 0x00016770 0x00000014 Code RO 2316 i.drv_rxbr_set_inten CVWL368.lib(drv_rxbr.o) + 0x00016784 0x00016784 0x00000010 Code RO 2317 i.drv_rxbr_set_ltpo_drop_th CVWL368.lib(drv_rxbr.o) + 0x00016794 0x00016794 0x00000026 Code RO 2319 i.drv_rxbr_set_usr_cfg CVWL368.lib(drv_rxbr.o) + 0x000167ba 0x000167ba 0x00000008 Code RO 2320 i.drv_rxbr_set_usr_col CVWL368.lib(drv_rxbr.o) + 0x000167c2 0x000167c2 0x00000008 Code RO 2321 i.drv_rxbr_set_usr_row CVWL368.lib(drv_rxbr.o) + 0x000167ca 0x000167ca 0x00000002 PAD + 0x000167cc 0x000167cc 0x00000020 Code RO 1795 i.drv_spi_m_read_data CVWL368.lib(drv_spi_master.o) + 0x000167ec 0x000167ec 0x0000001c Code RO 1820 i.drv_swire_enable CVWL368.lib(drv_swire.o) + 0x00016808 0x00016808 0x00000054 Code RO 1823 i.drv_swire_set_int CVWL368.lib(drv_swire.o) + 0x0001685c 0x0001685c 0x0000001c Code RO 1824 i.drv_swire_set_power_down CVWL368.lib(drv_swire.o) + 0x00016878 0x00016878 0x0000000c Code RO 1839 i.drv_sys_cfg_clear_all_int CVWL368.lib(drv_sys_cfg.o) + 0x00016884 0x00016884 0x00000028 Code RO 1840 i.drv_sys_cfg_clear_pending CVWL368.lib(drv_sys_cfg.o) + 0x000168ac 0x000168ac 0x00000018 Code RO 1843 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL368.lib(drv_sys_cfg.o) + 0x000168c4 0x000168c4 0x0000001c Code RO 1844 i.drv_sys_cfg_sel_ap_rst_trig CVWL368.lib(drv_sys_cfg.o) + 0x000168e0 0x000168e0 0x00000024 Code RO 1845 i.drv_sys_cfg_sel_gpio_group CVWL368.lib(drv_sys_cfg.o) + 0x00016904 0x00016904 0x00000024 Code RO 1846 i.drv_sys_cfg_sel_int_trig CVWL368.lib(drv_sys_cfg.o) + 0x00016928 0x00016928 0x00000010 Code RO 1848 i.drv_sys_cfg_set_dma_rx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016938 0x00016938 0x00000010 Code RO 1849 i.drv_sys_cfg_set_dma_tx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016948 0x00016948 0x00000024 Code RO 1850 i.drv_sys_cfg_set_int CVWL368.lib(drv_sys_cfg.o) + 0x0001696c 0x0001696c 0x0000001a Code RO 1873 i.drv_timer_clear_status_flags CVWL368.lib(drv_timer.o) + 0x00016986 0x00016986 0x00000020 Code RO 1874 i.drv_timer_enable CVWL368.lib(drv_timer.o) + 0x000169a6 0x000169a6 0x00000002 PAD + 0x000169a8 0x000169a8 0x00000010 Code RO 1875 i.drv_timer_get_instance CVWL368.lib(drv_timer.o) + 0x000169b8 0x000169b8 0x00000010 Code RO 1876 i.drv_timer_get_prescaler CVWL368.lib(drv_timer.o) + 0x000169c8 0x000169c8 0x00000044 Code RO 1878 i.drv_timer_handle_interrupt CVWL368.lib(drv_timer.o) + 0x00016a0c 0x00016a0c 0x00000014 Code RO 1879 i.drv_timer_register_callback CVWL368.lib(drv_timer.o) + 0x00016a20 0x00016a20 0x00000010 Code RO 1880 i.drv_timer_set_compare_val CVWL368.lib(drv_timer.o) + 0x00016a30 0x00016a30 0x00000054 Code RO 1881 i.drv_timer_set_int CVWL368.lib(drv_timer.o) + 0x00016a84 0x00016a84 0x00000028 Code RO 1882 i.drv_timer_set_prescaler CVWL368.lib(drv_timer.o) + 0x00016aac 0x00016aac 0x00000010 Code RO 1883 i.drv_timer_set_repeat CVWL368.lib(drv_timer.o) + 0x00016abc 0x00016abc 0x0000000a Code RO 2112 i.drv_tx_phy_test_clear CVWL368.lib(drv_dsi_tx.o) + 0x00016ac6 0x00016ac6 0x0000001c Code RO 2113 i.drv_tx_phy_test_enter CVWL368.lib(drv_dsi_tx.o) + 0x00016ae2 0x00016ae2 0x0000001c Code RO 2114 i.drv_tx_phy_test_exit CVWL368.lib(drv_dsi_tx.o) + 0x00016afe 0x00016afe 0x00000012 Code RO 2116 i.drv_tx_phy_test_write_1_byte CVWL368.lib(drv_dsi_tx.o) + 0x00016b10 0x00016b10 0x00000014 Code RO 2117 i.drv_tx_phy_test_write_2_byte CVWL368.lib(drv_dsi_tx.o) + 0x00016b24 0x00016b24 0x00000010 Code RO 2118 i.drv_tx_phy_test_write_code CVWL368.lib(drv_dsi_tx.o) + 0x00016b34 0x00016b34 0x00000008 Code RO 2360 i.drv_vidc_clear_irq CVWL368.lib(drv_vidc.o) + 0x00016b3c 0x00016b3c 0x00000018 Code RO 2364 i.drv_vidc_enable CVWL368.lib(drv_vidc.o) + 0x00016b54 0x00016b54 0x00000040 Code RO 2365 i.drv_vidc_enable_irq CVWL368.lib(drv_vidc.o) + 0x00016b94 0x00016b94 0x00000012 Code RO 2367 i.drv_vidc_get_irq_status CVWL368.lib(drv_vidc.o) + 0x00016ba6 0x00016ba6 0x00000002 PAD + 0x00016ba8 0x00016ba8 0x00000028 Code RO 2371 i.drv_vidc_init_module_enable CVWL368.lib(drv_vidc.o) + 0x00016bd0 0x00016bd0 0x0000000c Code RO 2372 i.drv_vidc_register_callback CVWL368.lib(drv_vidc.o) + 0x00016bdc 0x00016bdc 0x00000006 Code RO 2373 i.drv_vidc_reset CVWL368.lib(drv_vidc.o) + 0x00016be2 0x00016be2 0x0000003c Code RO 2375 i.drv_vidc_set_dst_parameter CVWL368.lib(drv_vidc.o) + 0x00016c1e 0x00016c1e 0x00000014 Code RO 2379 i.drv_vidc_set_irqen CVWL368.lib(drv_vidc.o) + 0x00016c32 0x00016c32 0x00000010 Code RO 2380 i.drv_vidc_set_mirror CVWL368.lib(drv_vidc.o) + 0x00016c42 0x00016c42 0x00000008 Code RO 2383 i.drv_vidc_set_p2r_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016c4a 0x00016c4a 0x00000026 Code RO 2384 i.drv_vidc_set_p2r_hinitb CVWL368.lib(drv_vidc.o) + 0x00016c70 0x00016c70 0x00000026 Code RO 2385 i.drv_vidc_set_p2r_hinitr CVWL368.lib(drv_vidc.o) + 0x00016c96 0x00016c96 0x00000002 PAD + 0x00016c98 0x00016c98 0x00000018 Code RO 2386 i.drv_vidc_set_pentile_swap CVWL368.lib(drv_vidc.o) + 0x00016cb0 0x00016cb0 0x0000000a Code RO 2387 i.drv_vidc_set_pu_ctrl CVWL368.lib(drv_vidc.o) + 0x00016cba 0x00016cba 0x00000010 Code RO 2388 i.drv_vidc_set_rotation CVWL368.lib(drv_vidc.o) + 0x00016cca 0x00016cca 0x0000000a Code RO 2389 i.drv_vidc_set_scld_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016cd4 0x00016cd4 0x0000000a Code RO 2390 i.drv_vidc_set_scld_hcoef1 CVWL368.lib(drv_vidc.o) + 0x00016cde 0x00016cde 0x00000012 Code RO 2391 i.drv_vidc_set_scld_step CVWL368.lib(drv_vidc.o) + 0x00016cf0 0x00016cf0 0x0000000a Code RO 2392 i.drv_vidc_set_scld_vcoef0 CVWL368.lib(drv_vidc.o) + 0x00016cfa 0x00016cfa 0x0000000a Code RO 2393 i.drv_vidc_set_scld_vcoef1 CVWL368.lib(drv_vidc.o) + 0x00016d04 0x00016d04 0x00000016 Code RO 2394 i.drv_vidc_set_src_parameter CVWL368.lib(drv_vidc.o) + 0x00016d1a 0x00016d1a 0x00000002 PAD + 0x00016d1c 0x00016d1c 0x00000010 Code RO 2770 i.drv_wdg_clear_counter CVWL368.lib(drv_wdg.o) + 0x00016d2c 0x00016d2c 0x00000010 Code RO 2771 i.drv_wdg_clear_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016d3c 0x00016d3c 0x00000010 Code RO 2774 i.drv_wdg_read_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016d4c 0x00016d4c 0x00000040 Code RO 2777 i.drv_wdg_set_int CVWL368.lib(drv_wdg.o) + 0x00016d8c 0x00016d8c 0x0000000a Code RO 1468 i.fls_clr_interrupt_flag CVWL368.lib(drv_fls.o) + 0x00016d96 0x00016d96 0x00000014 Code RO 1039 i.fputc CVWL368.lib(tau_log.o) + 0x00016daa 0x00016daa 0x00000002 PAD + 0x00016dac 0x00016dac 0x00000034 Code RO 580 i.hal_dsi_rx_ctrl_create_handle CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016de0 0x00016de0 0x0000009c Code RO 582 i.hal_dsi_rx_ctrl_deinit CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e7c 0x00016e7c 0x00000084 Code RO 584 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016f00 0x00016f00 0x00000028 Code RO 586 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016f28 0x00016f28 0x00000010 Code RO 587 i.hal_dsi_rx_ctrl_get_compressen_en CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016f38 0x00016f38 0x00000028 Code RO 588 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016f60 0x00016f60 0x00000060 Code RO 590 i.hal_dsi_rx_ctrl_init CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016fc0 0x00016fc0 0x000001a4 Code RO 591 i.hal_dsi_rx_ctrl_init_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017164 0x00017164 0x000000d8 Code RO 592 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001723c 0x0001723c 0x00000158 Code RO 593 i.hal_dsi_rx_ctrl_init_memc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017394 0x00017394 0x00000148 Code RO 594 i.hal_dsi_rx_ctrl_init_rxbr CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000174dc 0x000174dc 0x0000022c Code RO 595 i.hal_dsi_rx_ctrl_init_vidc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017708 0x00017708 0x000000f0 Code RO 599 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000177f8 0x000177f8 0x0000006c Code RO 602 i.hal_dsi_rx_ctrl_set_cus_scld_filter CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017864 0x00017864 0x00000034 Code RO 603 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017898 0x00017898 0x00000038 Code RO 607 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000178d0 0x000178d0 0x00000072 Code RO 612 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017942 0x00017942 0x00000002 PAD + 0x00017944 0x00017944 0x00000034 Code RO 613 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017978 0x00017978 0x0000000e Code RO 615 i.hal_dsi_rx_ctrl_set_tear_mode_ex CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017986 0x00017986 0x00000002 PAD + 0x00017988 0x00017988 0x0000003c Code RO 616 i.hal_dsi_rx_ctrl_start CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000179c4 0x000179c4 0x0000003c Code RO 617 i.hal_dsi_rx_ctrl_stop CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017a00 0x00017a00 0x00000020 Code RO 620 i.hal_dsi_rx_ctrl_toggle_resolution_ex CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017a20 0x00017a20 0x00000190 Code RO 673 i.hal_dsi_tx_calc_video_chunks CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017bb0 0x00017bb0 0x00000034 Code RO 674 i.hal_dsi_tx_config_params_for_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017be4 0x00017be4 0x00000450 Code RO 675 i.hal_dsi_tx_count_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018034 0x00018034 0x0000002c Code RO 678 i.hal_dsi_tx_ctrl_create_handle CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018060 0x00018060 0x00000084 Code RO 679 i.hal_dsi_tx_ctrl_deinit CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180e4 0x000180e4 0x0000004c Code RO 683 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018130 0x00018130 0x00000028 Code RO 685 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018158 0x00018158 0x000000a4 Code RO 687 i.hal_dsi_tx_ctrl_init CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181fc 0x000181fc 0x00000024 Code RO 688 i.hal_dsi_tx_ctrl_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018220 0x00018220 0x0000000c Code RO 689 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001822c 0x0001822c 0x0000008c Code RO 690 i.hal_dsi_tx_ctrl_read_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000182b8 0x000182b8 0x00000020 Code RO 692 i.hal_dsi_tx_ctrl_set_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000182d8 0x000182d8 0x00000014 Code RO 698 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000182ec 0x000182ec 0x00000010 Code RO 699 i.hal_dsi_tx_ctrl_set_partial_disp CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000182fc 0x000182fc 0x00000024 Code RO 700 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018320 0x00018320 0x0000009c Code RO 703 i.hal_dsi_tx_ctrl_start CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000183bc 0x000183bc 0x00000044 Code RO 704 i.hal_dsi_tx_ctrl_stop CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018400 0x00018400 0x000000d8 Code RO 705 i.hal_dsi_tx_ctrl_write_array_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000184d8 0x000184d8 0x000000b0 Code RO 706 i.hal_dsi_tx_ctrl_write_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018588 0x00018588 0x00000044 Code RO 707 i.hal_dsi_tx_init_data_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000185cc 0x000185cc 0x00000030 Code RO 708 i.hal_dsi_tx_init_dpi_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000185fc 0x000185fc 0x00000020 Code RO 709 i.hal_dsi_tx_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001861c 0x0001861c 0x00000020 Code RO 710 i.hal_dsi_tx_init_phy_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001863c 0x0001863c 0x00000094 Code RO 711 i.hal_dsi_tx_init_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000186d0 0x000186d0 0x00000058 Code RO 712 i.hal_dsi_tx_init_video_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018728 0x00018728 0x00000044 Code RO 713 i.hal_dsi_tx_send_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001876c 0x0001876c 0x00000018 Code RO 778 i.hal_gpio_ctrl_eint CVWL368.lib(hal_gpio.o) + 0x00018784 0x00018784 0x00000012 Code RO 779 i.hal_gpio_get_input_data CVWL368.lib(hal_gpio.o) + 0x00018796 0x00018796 0x00000002 PAD + 0x00018798 0x00018798 0x00000040 Code RO 782 i.hal_gpio_init_eint CVWL368.lib(hal_gpio.o) + 0x000187d8 0x000187d8 0x00000020 Code RO 783 i.hal_gpio_init_input CVWL368.lib(hal_gpio.o) + 0x000187f8 0x000187f8 0x00000028 Code RO 784 i.hal_gpio_init_output CVWL368.lib(hal_gpio.o) + 0x00018820 0x00018820 0x00000018 Code RO 785 i.hal_gpio_reg_eint_cb CVWL368.lib(hal_gpio.o) + 0x00018838 0x00018838 0x00000050 Code RO 786 i.hal_gpio_set_ap_reset_int CVWL368.lib(hal_gpio.o) + 0x00018888 0x00018888 0x00000060 Code RO 788 i.hal_gpio_set_mode CVWL368.lib(hal_gpio.o) + 0x000188e8 0x000188e8 0x00000008 Code RO 789 i.hal_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x000188f0 0x000188f0 0x00000020 Code RO 791 i.hal_gpio_set_pull_state CVWL368.lib(hal_gpio.o) + 0x00018910 0x00018910 0x0000006c Code RO 817 i.hal_i2c_m_dma_init CVWL368.lib(hal_i2c_master.o) + 0x0001897c 0x0001897c 0x00000020 Code RO 818 i.hal_i2c_m_dma_read CVWL368.lib(hal_i2c_master.o) + 0x0001899c 0x0001899c 0x0000001c Code RO 819 i.hal_i2c_m_dma_write CVWL368.lib(hal_i2c_master.o) + 0x000189b8 0x000189b8 0x0000000c Code RO 821 i.hal_i2c_m_transfer_complate CVWL368.lib(hal_i2c_master.o) + 0x000189c4 0x000189c4 0x00000020 Code RO 822 i.hal_i2c_master_irq_callback CVWL368.lib(hal_i2c_master.o) + 0x000189e4 0x000189e4 0x00000010 Code RO 836 i.hal_i2c_s_dma_user_callback CVWL368.lib(hal_i2c_slave.o) + 0x000189f4 0x000189f4 0x0000004c Code RO 837 i.hal_i2c_s_dma_write CVWL368.lib(hal_i2c_slave.o) + 0x00018a40 0x00018a40 0x000000c8 Code RO 839 i.hal_i2c_s_init CVWL368.lib(hal_i2c_slave.o) + 0x00018b08 0x00018b08 0x00000014 Code RO 840 i.hal_i2c_s_nonblocking_read CVWL368.lib(hal_i2c_slave.o) + 0x00018b1c 0x00018b1c 0x0000000c Code RO 848 i.hal_i2c_s_set_transfer CVWL368.lib(hal_i2c_slave.o) + 0x00018b28 0x00018b28 0x00000174 Code RO 851 i.hal_i2c_slave_irq_callback CVWL368.lib(hal_i2c_slave.o) + 0x00018c9c 0x00018c9c 0x000000fc Code RO 1911 i.hal_internal_init_memc CVWL368.lib(hal_internal_vsync.o) + 0x00018d98 0x00018d98 0x00000010 Code RO 1913 i.hal_internal_sync_get_fb_setting CVWL368.lib(hal_internal_vsync.o) + 0x00018da8 0x00018da8 0x00000010 Code RO 1914 i.hal_internal_sync_get_hight_performan_mode CVWL368.lib(hal_internal_vsync.o) + 0x00018db8 0x00018db8 0x000001d4 Code RO 1916 i.hal_internal_sync_input_resolution_change_ex CVWL368.lib(hal_internal_vsync.o) + 0x00018f8c 0x00018f8c 0x00000010 Code RO 1918 i.hal_internal_update_dpi_param CVWL368.lib(hal_internal_vsync.o) + 0x00018f9c 0x00018f9c 0x0000010c Code RO 1919 i.hal_internal_video_mode_auto_sync CVWL368.lib(hal_internal_vsync.o) + 0x000190a8 0x000190a8 0x00000028 Code RO 1920 i.hal_internal_vsync_deinit CVWL368.lib(hal_internal_vsync.o) + 0x000190d0 0x000190d0 0x0000000c Code RO 1921 i.hal_internal_vsync_get_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x000190dc 0x000190dc 0x00000018 Code RO 1922 i.hal_internal_vsync_get_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x000190f4 0x000190f4 0x0000000c Code RO 1923 i.hal_internal_vsync_get_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x00019100 0x00019100 0x0000000c Code RO 1924 i.hal_internal_vsync_get_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x0001910c 0x0001910c 0x00000118 Code RO 1925 i.hal_internal_vsync_init_rx CVWL368.lib(hal_internal_vsync.o) + 0x00019224 0x00019224 0x000000b0 Code RO 1926 i.hal_internal_vsync_init_tx CVWL368.lib(hal_internal_vsync.o) + 0x000192d4 0x000192d4 0x0000011c Code RO 1927 i.hal_internal_vsync_set_auto_hw_filter CVWL368.lib(hal_internal_vsync.o) + 0x000193f0 0x000193f0 0x00000014 Code RO 1929 i.hal_internal_vsync_set_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00019404 0x00019404 0x00000024 Code RO 1930 i.hal_internal_vsync_set_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00019428 0x00019428 0x00000050 Code RO 1931 i.hal_internal_vsync_set_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x00019478 0x00019478 0x00000080 Code RO 1932 i.hal_internal_vsync_set_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x000194f8 0x000194f8 0x00000024 Code RO 714 i.hal_lcdc_config_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001951c 0x0001951c 0x00000058 Code RO 715 i.hal_lcdc_config_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019574 0x00019574 0x00000014 Code RO 716 i.hal_lcdc_config_rgb_to_pentile CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019588 0x00019588 0x00000164 Code RO 717 i.hal_lcdc_config_upscaler CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000196ec 0x000196ec 0x00000040 Code RO 718 i.hal_lcdc_init_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001972c 0x0001972c 0x000001b0 Code RO 719 i.hal_lcdc_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000198dc 0x000198dc 0x00000040 Code RO 720 i.hal_lcdc_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001991c 0x0001991c 0x0000000e Code RO 929 i.hal_spi_m_clear_rxfifo CVWL368.lib(hal_spi_master.o) + 0x0001992a 0x0001992a 0x00000012 Code RO 953 i.hal_swire_deinit CVWL368.lib(hal_swire.o) + 0x0001993c 0x0001993c 0x00000016 Code RO 955 i.hal_swire_open CVWL368.lib(hal_swire.o) + 0x00019952 0x00019952 0x00000008 Code RO 970 i.hal_system_enable_systick CVWL368.lib(hal_system.o) + 0x0001995a 0x0001995a 0x00000002 PAD + 0x0001995c 0x0001995c 0x00000088 Code RO 978 i.hal_system_init CVWL368.lib(hal_system.o) + 0x000199e4 0x000199e4 0x0000001c Code RO 979 i.hal_system_init_console CVWL368.lib(hal_system.o) + 0x00019a00 0x00019a00 0x00000008 Code RO 982 i.hal_system_set_phy_calibration CVWL368.lib(hal_system.o) + 0x00019a08 0x00019a08 0x00000008 Code RO 983 i.hal_system_set_pvd CVWL368.lib(hal_system.o) + 0x00019a10 0x00019a10 0x00000008 Code RO 984 i.hal_system_set_vcc CVWL368.lib(hal_system.o) + 0x00019a18 0x00019a18 0x0000002e Code RO 1011 i.hal_timer_deinit CVWL368.lib(hal_timer.o) + 0x00019a46 0x00019a46 0x0000001a Code RO 1013 i.hal_timer_init CVWL368.lib(hal_timer.o) + 0x00019a60 0x00019a60 0x00000048 Code RO 1015 i.hal_timer_start CVWL368.lib(hal_timer.o) + 0x00019aa8 0x00019aa8 0x00000028 Code RO 1017 i.hal_timer_stop CVWL368.lib(hal_timer.o) + 0x00019ad0 0x00019ad0 0x0000008c Code RO 1193 i.hal_uart_init CVWL368.lib(hal_uart.o) + 0x00019b5c 0x00019b5c 0x00000010 Code RO 1196 i.hal_uart_transmit_blocking CVWL368.lib(hal_uart.o) + 0x00019b6c 0x00019b6c 0x000001dc Code RO 1935 i.hal_vsync_reset_lcdc_scaler CVWL368.lib(hal_internal_vsync.o) + 0x00019d48 0x00019d48 0x00000110 Code RO 2470 i.handle_init CVWL368.lib(irq_redirect .o) + 0x00019e58 0x00019e58 0x00000060 Code RO 114 i.init_mipi_tx ap_demo.o + 0x00019eb8 0x00019eb8 0x000000e0 Code RO 115 i.init_panel ap_demo.o + 0x00019f98 0x00019f98 0x0000000a Code RO 3 i.main main.o + 0x00019fa2 0x00019fa2 0x00000002 PAD + 0x00019fa4 0x00019fa4 0x0000009c Code RO 116 i.open_mipi_rx ap_demo.o + 0x0001a040 0x0001a040 0x00000038 Code RO 117 i.pps_update_handle ap_demo.o + 0x0001a078 0x0001a078 0x000003f4 Code RO 1936 i.rx_get_dcs_packet_data CVWL368.lib(hal_internal_vsync.o) + 0x0001a46c 0x0001a46c 0x00000178 Code RO 1937 i.rx_partial_update CVWL368.lib(hal_internal_vsync.o) + 0x0001a5e4 0x0001a5e4 0x0000008c Code RO 1938 i.rx_receive_packet CVWL368.lib(hal_internal_vsync.o) + 0x0001a670 0x0001a670 0x00000180 Code RO 1939 i.rx_receive_pps CVWL368.lib(hal_internal_vsync.o) + 0x0001a7f0 0x0001a7f0 0x000000a4 Code RO 1940 i.rxbr_irq0_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a894 0x0001a894 0x000001d4 Code RO 1941 i.rxbr_irq1_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001aa68 0x0001aa68 0x00000024 Code RO 118 i.send_panel_init_code ap_demo.o + 0x0001aa8c 0x0001aa8c 0x000000c4 Code RO 1942 i.soft_gen_te CVWL368.lib(hal_internal_vsync.o) + 0x0001ab50 0x0001ab50 0x000000c0 Code RO 1943 i.soft_gen_te_double_buffer CVWL368.lib(hal_internal_vsync.o) + 0x0001ac10 0x0001ac10 0x00000040 Code RO 119 i.soft_timer3_cb ap_demo.o + 0x0001ac50 0x0001ac50 0x00000048 Code RO 2797 i.sqrt m_ps.l(sqrt.o) + 0x0001ac98 0x0001ac98 0x0000006c Code RO 121 i.tp_heartbeat_exec ap_demo.o + 0x0001ad04 0x0001ad04 0x00000060 Code RO 122 i.tx_display_on ap_demo.o + 0x0001ad64 0x0001ad64 0x00000028 Code RO 123 i.tx_panel_reset ap_demo.o + 0x0001ad8c 0x0001ad8c 0x00000108 Code RO 1944 i.vidc_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001ae94 0x0001ae94 0x000000d0 Code RO 1945 i.vpre_err_reset CVWL368.lib(hal_internal_vsync.o) + 0x0001af64 0x0001af64 0x000001cc Code RO 1946 i.vsync_set_te_mode CVWL368.lib(hal_internal_vsync.o) + 0x0001b130 0x0001b130 0x00002956 Data RO 124 .constdata ap_demo.o + 0x0001da86 0x0001da86 0x00000020 Data RO 463 .constdata app_tp_st_touch.o + 0x0001daa6 0x0001daa6 0x00000002 PAD + 0x0001daa8 0x0001daa8 0x00000024 Data RO 722 .constdata CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001dacc 0x0001dacc 0x000000d2 Data RO 794 .constdata CVWL368.lib(hal_gpio.o) + 0x0001db9e 0x0001db9e 0x00000002 PAD + 0x0001dba0 0x0001dba0 0x00000020 Data RO 852 .constdata CVWL368.lib(hal_i2c_slave.o) + 0x0001dbc0 0x0001dbc0 0x00000fa6 Data RO 1053 .constdata WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x0001eb66 0x0001eb66 0x00000001 Data RO 1076 .constdata WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x0001eb67 0x0001eb67 0x00000001 PAD + 0x0001eb68 0x0001eb68 0x00000008 Data RO 1693 .constdata CVWL368.lib(drv_param_init.o) + 0x0001eb70 0x0001eb70 0x00000186 Data RO 2542 .constdata CVWL368.lib(drv_phy_common.o) + 0x0001ecf6 0x0001ecf6 0x00000002 PAD + 0x0001ecf8 0x0001ecf8 0x00000048 Data RO 622 .conststring CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001ed40 0x0001ed40 0x00000043 Data RO 723 .conststring CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001ed83 0x0001ed83 0x00000001 PAD + 0x0001ed84 0x0001ed84 0x000000e0 Data RO 1948 .conststring CVWL368.lib(hal_internal_vsync.o) + 0x0001ee64 0x0001ee64 0x00000030 Data RO 3159 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001ee94, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001ee94, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2471 .ARM.__AT_0x00070100 CVWL368.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001ee94, Size: 0x00005160, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x00001074]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x00000228 Data RW 125 .data ap_demo.o + 0x000703f8 COMPRESSED 0x00000017 Data RW 312 .data app_tp_transfer.o + 0x0007040f COMPRESSED 0x00000028 Data RW 464 .data app_tp_st_touch.o + 0x00070437 COMPRESSED 0x00000001 PAD + 0x00070438 COMPRESSED 0x00000008 Data RW 623 .data CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00070440 COMPRESSED 0x00000003 Data RW 724 .data CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00070443 COMPRESSED 0x00000001 Data RW 823 .data CVWL368.lib(hal_i2c_master.o) + 0x00070444 COMPRESSED 0x00000020 Data RW 853 .data CVWL368.lib(hal_i2c_slave.o) + 0x00070464 COMPRESSED 0x00001686 Data RW 1077 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071aea COMPRESSED 0x00000001 Data RW 1080 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071aeb COMPRESSED 0x00000001 Data RW 1081 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071aec COMPRESSED 0x00000001 Data RW 1086 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071aed COMPRESSED 0x00000003 Data RW 1087 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071af0 COMPRESSED 0x00000005 Data RW 1088 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071af5 COMPRESSED 0x00000001 Data RW 1098 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071af6 COMPRESSED 0x00000002 PAD + 0x00071af8 COMPRESSED 0x00000030 Data RW 1099 .data WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x00071b28 COMPRESSED 0x00000012 Data RW 1250 .data CVWL368.lib(norflash.o) + 0x00071b3a COMPRESSED 0x00000002 PAD + 0x00071b3c COMPRESSED 0x0000000c Data RW 1304 .data CVWL368.lib(drv_common.o) + 0x00071b48 COMPRESSED 0x00000004 Data RW 1571 .data CVWL368.lib(drv_gpio.o) + 0x00071b4c COMPRESSED 0x00000008 Data RW 1609 .data CVWL368.lib(drv_i2c_dma.o) + 0x00071b54 COMPRESSED 0x00000004 Data RW 1638 .data CVWL368.lib(drv_i2c_master.o) + 0x00071b58 COMPRESSED 0x00000004 Data RW 1669 .data CVWL368.lib(drv_i2c_slave.o) + 0x00071b5c COMPRESSED 0x000004a4 Data RW 1694 .data CVWL368.lib(drv_param_init.o) + 0x00072000 COMPRESSED 0x0000000c Data RW 1724 .data CVWL368.lib(drv_pwm.o) + 0x0007200c COMPRESSED 0x00000004 Data RW 1800 .data CVWL368.lib(drv_spi_master.o) + 0x00072010 COMPRESSED 0x00000008 Data RW 1826 .data CVWL368.lib(drv_swire.o) + 0x00072018 COMPRESSED 0x00000001 Data RW 1851 .data CVWL368.lib(drv_sys_cfg.o) + 0x00072019 COMPRESSED 0x00000003 PAD + 0x0007201c COMPRESSED 0x00000050 Data RW 1884 .data CVWL368.lib(drv_timer.o) + 0x0007206c COMPRESSED 0x0000000c Data RW 1949 .data CVWL368.lib(hal_internal_vsync.o) + 0x00072078 COMPRESSED 0x00000008 Data RW 2323 .data CVWL368.lib(drv_rxbr.o) + 0x00072080 COMPRESSED 0x00000004 Data RW 2396 .data CVWL368.lib(drv_vidc.o) + 0x00072084 COMPRESSED 0x00000001 Data RW 2543 .data CVWL368.lib(drv_phy_common.o) + 0x00072085 COMPRESSED 0x00000003 PAD + 0x00072088 COMPRESSED 0x0000000c Data RW 2563 .data CVWL368.lib(drv_chip_info.o) + 0x00072094 COMPRESSED 0x00000008 Data RW 2712 .data CVWL368.lib(drv_uart.o) + 0x0007209c COMPRESSED 0x0000000c Data RW 2779 .data CVWL368.lib(drv_wdg.o) + 0x000720a8 COMPRESSED 0x00000004 Data RW 3128 .data mc_p.l(stdout.o) + 0x000720ac COMPRESSED 0x00000004 Data RW 3140 .data mc_p.l(errno.o) + 0x000720b0 - 0x00000190 Zero RW 311 .bss app_tp_transfer.o + 0x00072240 - 0x0000000c Zero RW 462 .bss app_tp_st_touch.o + 0x0007224c - 0x000000c4 Zero RW 621 .bss CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00072310 - 0x0000004c Zero RW 721 .bss CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0007235c - 0x00000100 Zero RW 1040 .bss CVWL368.lib(tau_log.o) + 0x0007245c - 0x0000028e Zero RW 1051 .bss WL368_S10LITE_CSOT667_TP.lib(app_tp_for_custom_s8.o) + 0x000726ea COMPRESSED 0x00000002 PAD + 0x000726ec - 0x000000d0 Zero RW 1198 .bss CVWL368.lib(hal_uart.o) + 0x000727bc - 0x0000001c Zero RW 1433 .bss CVWL368.lib(drv_dma.o) + 0x000727d8 - 0x00000040 Zero RW 1570 .bss CVWL368.lib(drv_gpio.o) + 0x00072818 - 0x00000140 Zero RW 1608 .bss CVWL368.lib(drv_i2c_dma.o) + 0x00072958 - 0x00000984 Zero RW 1947 .bss CVWL368.lib(hal_internal_vsync.o) + 0x000732dc - 0x00001030 Zero RW 2000 .bss CVWL368.lib(dcs_packet_fifo.o) + 0x0007430c - 0x00000020 Zero RW 2607 .bss CVWL368.lib(hal_spi_slave.o) + 0x0007432c COMPRESSED 0x00000004 PAD + 0x00074330 - 0x00001000 Zero RW 569 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 3170 564 10582 552 0 39219 ap_demo.o + 1334 244 32 40 12 12389 app_tp_st_touch.o + 1038 108 0 23 400 14462 app_tp_transfer.o + 36 6 0 0 0 545 board.o + 10 0 0 0 0 5695 main.o + 120 18 192 0 4096 2104 startup_armcm0.o + + ---------------------------------------------------------------------- + 5716 940 10856 616 4508 74414 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 8 0 2 1 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 272 96 0 12 0 256 drv_chip_info.o + 192 82 24 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 410 28 0 0 28 796 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1644 494 0 0 0 1336 drv_dsi_rx.o + 1532 118 0 0 0 2488 drv_dsi_tx.o + 132 0 0 0 0 256 drv_efuse.o + 10 0 0 0 0 60 drv_fls.o + 796 112 0 4 64 1236 drv_gpio.o + 600 82 0 8 320 624 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 292 36 0 4 0 580 drv_i2c_slave.o + 680 6 0 0 0 1444 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 212 44 8 1188 0 452 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 72 10 0 12 0 76 drv_pwm.o + 112 24 0 0 0 180 drv_pwr.o + 722 84 0 8 0 1456 drv_rxbr.o + 104 24 0 4 0 188 drv_spi_master.o + 172 20 0 8 0 260 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 374 34 0 80 0 932 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 168 22 0 12 0 316 drv_wdg.o + 3210 316 72 8 196 1680 hal_dsi_rx_ctrl.o + 4464 308 103 3 76 2492 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 696 72 32 32 0 408 hal_i2c_slave.o + 8420 1710 224 12 2436 2696 hal_internal_vsync.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 40 0 0 0 0 136 hal_swire.o + 196 32 0 0 0 408 hal_system.o + 184 6 0 0 0 276 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 1976 86 4007 5826 654 18470 app_tp_for_custom_s8.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 96 0 0 0 0 0 __dclz77c.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 39428 4938 5076 7288 8612 53598 Library Totals + 46 0 6 10 6 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 32016 4646 1063 1444 7952 31852 CVWL368.lib + 1976 86 4007 5826 654 18470 WL368_S10LITE_CSOT667_TP.lib + 272 26 0 0 0 152 m_ps.l + 2848 126 0 8 0 1264 mc_p.l + 2270 54 0 0 0 1860 mf_p.l + + ---------------------------------------------------------------------- + 39428 4938 5076 7288 8612 53598 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 45144 5878 15932 7904 13120 103044 Grand Totals + 45144 5878 15932 4212 13120 103044 ELF Image Totals (compressed) + 45144 5878 15932 4212 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 61076 ( 59.64kB) + Total RW Size (RW Data + ZI Data) 21024 ( 20.53kB) + Total ROM Size (Code + RO Data + RW Data) 65288 ( 63.76kB) + +============================================================================== + diff --git a/project/ISP_368/Listings/WL368_S10LITE_HX667.map b/project/ISP_368/Listings/WL368_S10LITE_HX667.map new file mode 100644 index 0000000..35c2ca2 --- /dev/null +++ b/project/ISP_368/Listings/WL368_S10LITE_HX667.map @@ -0,0 +1,5398 @@ +Component: ARM Compiler 5.06 update 6 (build 750) Tool: armlink [4d35ed] + +============================================================================== + +Section Cross References + + main.o(i.main) refers to board.o(i.board_Init) for board_Init + main.o(i.main) refers to ap_demo.o(i.ap_demo) for ap_demo + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.Gpio_swire_output) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.Gpio_swire_output) refers to tau_delay.o(i.delayUs) for delayUs + ap_demo.o(i.PWM_OUTPUT_TEST) refers to ap_demo.o(i.test_pwm_out_adjust) for test_pwm_out_adjust + ap_demo.o(i.PWM_OUTPUT_TEST) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.PWM_Task) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.PWM_Task) refers to app_tp_for_custom_s8.o(.data) for Flag_blacklight_EN + ap_demo.o(i.PWM_Task) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) for hal_dsi_rx_ctrl_get_max_ret_size + ap_demo.o(i.ap_dcs_read) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) for hal_dsi_rx_ctrl_send_ack_cmd + ap_demo.o(i.ap_dcs_read) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_dcs_read) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.open_mipi_rx) for open_mipi_rx + ap_demo.o(i.ap_demo) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_I2C_init) for app_tp_I2C_init + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.init_mipi_tx) for init_mipi_tx + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_init) for app_tp_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_init) for hal_timer_init + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_start) for app_tp_transfer_screen_start + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.tx_display_on) for tx_display_on + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_ap_reset_int) for hal_gpio_set_ap_reset_int + ap_demo.o(i.ap_demo) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_demo) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.app_tp_calibration_exec) for app_tp_calibration_exec + ap_demo.o(i.ap_demo) refers to app_tp_transfer.o(i.app_tp_transfer_screen_int) for app_tp_transfer_screen_int + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) for hal_dsi_tx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) for hal_dsi_tx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) for hal_dsi_rx_ctrl_stop + ap_demo.o(i.ap_demo) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) for hal_dsi_rx_ctrl_deinit + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_open) for hal_swire_open + ap_demo.o(i.ap_demo) refers to hal_swire.o(i.hal_swire_deinit) for hal_swire_deinit + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_stop) for hal_timer_stop + ap_demo.o(i.ap_demo) refers to hal_timer.o(i.hal_timer_deinit) for hal_timer_deinit + ap_demo.o(i.ap_demo) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_demo) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.ap_demo) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.soft_timer3_cb) for soft_timer3_cb + ap_demo.o(i.ap_demo) refers to ap_demo.o(i.ap_reset_cb) for ap_reset_cb + ap_demo.o(i.ap_get_reg_53) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_get_reg_53) refers to app_tp_for_custom_s8.o(.data) for fingerprint_flag + ap_demo.o(i.ap_get_reg_53) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_get_reg_7A) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_get_reg_df) refers to memcpya.o(.text) for __aeabi_memcpy4 + ap_demo.o(i.ap_get_reg_df) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) for hal_dsi_tx_ctrl_set_ccm + ap_demo.o(i.ap_get_reg_df) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_reset_cb) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_pvd) for hal_system_set_pvd + ap_demo.o(i.ap_reset_cb) refers to hal_system.o(i.hal_system_set_vcc) for hal_system_set_vcc + ap_demo.o(i.ap_set_backlight_51) refers to idiv.o(.text) for __aeabi_idivmod + ap_demo.o(i.ap_set_backlight_51) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_backlight_51) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_display_off) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_display_off) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) for hal_dsi_rx_ctrl_set_sw_tear_mode + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.ap_set_enter_sleep_mode) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + ap_demo.o(i.ap_set_enter_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_enter_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_set_exit_sleep_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.ap_set_exit_sleep_mode) refers to ap_demo.o(.data) for .data + ap_demo.o(i.ap_update_frame_rate) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) for hal_dsi_rx_ctrl_set_tear_mode_ex + ap_demo.o(i.ap_update_frame_rate) refers to ap_demo.o(.data) for .data + ap_demo.o(i.app_tp_calibration_exec) refers to app_tp_transfer.o(i.ap_tp_calibration) for ap_tp_calibration + ap_demo.o(i.app_tp_calibration_exec) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.app_tp_calibration_exec) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) for hal_dsi_tx_ctrl_create_handle + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + ap_demo.o(i.init_mipi_tx) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) for hal_dsi_tx_ctrl_set_overwrite_rgb + ap_demo.o(i.init_mipi_tx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.init_panel) refers to ap_demo.o(i.tx_panel_reset) for tx_panel_reset + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) for hal_dsi_tx_ctrl_enter_init_panel_mode + ap_demo.o(i.init_panel) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.init_panel) refers to ap_demo.o(i.send_panel_init_code) for send_panel_init_code + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) for hal_dsi_tx_ctrl_read_cmd + ap_demo.o(i.init_panel) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.init_panel) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + ap_demo.o(i.init_panel) refers to ap_demo.o(i.Gpio_swire_output) for Gpio_swire_output + ap_demo.o(i.init_panel) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) for hal_dsi_tx_ctrl_exit_init_panel_mode + ap_demo.o(i.init_panel) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) for hal_dsi_rx_ctrl_create_handle + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) for hal_dsi_rx_ctrl_set_cus_sync_line + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) for hal_dsi_rx_ctrl_set_cus_scld_filter + ap_demo.o(i.open_mipi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.data) for .data + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(.constdata) for .constdata + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.ap_dcs_read) for ap_dcs_read + ap_demo.o(i.open_mipi_rx) refers to ap_demo.o(i.pps_update_handle) for pps_update_handle + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) for hal_dsi_rx_ctrl_get_compressen_en + ap_demo.o(i.pps_update_handle) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) for hal_dsi_rx_ctrl_toggle_resolution_ex + ap_demo.o(i.pps_update_handle) refers to ap_demo.o(.data) for .data + ap_demo.o(i.send_panel_init_code) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) for hal_dsi_tx_ctrl_write_array_cmd + ap_demo.o(i.soft_timer3_cb) refers to hal_timer.o(i.hal_timer_start) for hal_timer_start + ap_demo.o(i.soft_timer3_cb) refers to app_tp_for_custom_s8.o(.data) for tp_sleep_count + ap_demo.o(i.soft_timer3_cb) refers to ap_demo.o(.data) for .data + ap_demo.o(i.test_pwm_out_adjust) refers to uidiv.o(.text) for __aeabi_uidivmod + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_init) for hal_pwm_out_init + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_config_all) for hal_pwm_out_config_all + ap_demo.o(i.test_pwm_out_adjust) refers to hal_pwm.o(i.hal_pwm_out_sync_all) for hal_pwm_out_sync_all + ap_demo.o(i.tx_display_on) refers to ap_demo.o(i.init_panel) for init_panel + ap_demo.o(i.tx_display_on) refers to tau_log.o(i.LOG_printf) for LOG_printf + ap_demo.o(i.tx_display_on) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + ap_demo.o(i.tx_display_on) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(i.tx_display_on) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) for hal_dsi_tx_ctrl_write_cmd + ap_demo.o(i.tx_display_on) refers to ap_demo.o(.data) for .data + ap_demo.o(i.tx_panel_reset) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) for hal_dsi_tx_ctrl_panel_reset_pin + ap_demo.o(i.tx_panel_reset) refers to tau_delay.o(i.delayMs) for delayMs + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_on) for ap_set_display_on + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_display_off) for ap_set_display_off + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_df) for ap_get_reg_df + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_backlight_51) for ap_set_backlight_51 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_update_frame_rate) for ap_update_frame_rate + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_53) for ap_get_reg_53 + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_get_reg_7A) for ap_get_reg_7A + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_enter_sleep_mode) for ap_set_enter_sleep_mode + ap_demo.o(.constdata) refers to ap_demo.o(i.ap_set_exit_sleep_mode) for ap_set_exit_sleep_mode + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.S20_Start_init) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.S20_Start_init) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.S20_Start_init) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(i.app_tp_screen_int_init) for app_tp_screen_int_init + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.S20_Start_init) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.S20_Start_init) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(i.app_tp_m_write) for app_tp_m_write + app_tp_transfer.o(i.ap_tp_calibration) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.ap_tp_calibration) refers to tau_delay.o(i.delayMs) for delayMs + app_tp_transfer.o(i.ap_tp_calibration) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_init) for hal_i2c_s_init + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_set_transfer) for hal_i2c_s_set_transfer + app_tp_transfer.o(i.app_tp_I2C_init) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(i.app_tp_i2cs_callback) for app_tp_i2cs_callback + app_tp_transfer.o(i.app_tp_I2C_init) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_i2cs_callback) refers to app_tp_transfer.o(i.app_tp_transfer_phone) for app_tp_transfer_phone + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_init) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_init) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + app_tp_transfer.o(i.app_tp_init) refers to hal_i2c_master.o(i.hal_i2c_m_dma_init) for hal_i2c_m_dma_init + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_phone_output_int_pad + app_tp_transfer.o(i.app_tp_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_m_read) refers to hal_i2c_master.o(i.hal_i2c_m_dma_read) for hal_i2c_m_dma_read + app_tp_transfer.o(i.app_tp_m_transfer_complate) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_m_write) refers to hal_i2c_master.o(i.hal_i2c_m_dma_write) for hal_i2c_m_dma_write + app_tp_transfer.o(i.app_tp_phone_clear_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_phone_reset_on) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_s_read) refers to hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) for hal_i2c_s_nonblocking_read + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_write_complate) for hal_i2c_s_write_complate + app_tp_transfer.o(i.app_tp_s_transfer_complate) refers to hal_i2c_slave.o(i.hal_i2c_s_read_complate) for hal_i2c_s_read_complate + app_tp_transfer.o(i.app_tp_s_write) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_write) for hal_i2c_s_dma_write + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_init_output) for hal_gpio_init_output + app_tp_transfer.o(i.app_tp_screen_init) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_screen_init) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_transfer.o(i.app_tp_screen_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_rst_pad + app_tp_transfer.o(i.app_tp_screen_int_callback) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_ctrl_eint) for hal_gpio_ctrl_eint + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_init_eint) for hal_gpio_init_eint + app_tp_transfer.o(i.app_tp_screen_int_init) refers to hal_gpio.o(i.hal_gpio_reg_eint_cb) for hal_gpio_reg_eint_cb + app_tp_transfer.o(i.app_tp_screen_int_init) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_screen_int_init) refers to app_tp_transfer.o(i.app_tp_screen_int_callback) for app_tp_screen_int_callback + app_tp_transfer.o(i.app_tp_screen_int_lvl_low) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_screen_int_lvl_low) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) for app_tp_phone_analysis_data + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(i.app_tp_s_read) for app_tp_s_read + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(i.app_tp_s_write) for app_tp_s_write + app_tp_transfer.o(i.app_tp_transfer_phone) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.app_tp_m_transfer_complate) for app_tp_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to hal_spi_master.o(i.hal_spi_m_clear_rxfifo) for hal_spi_m_clear_rxfifo + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(i.S20_Start_init) for S20_Start_init + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to app_tp_for_custom_s8.o(.constdata) for screen_reg_start_data_size + app_tp_transfer.o(i.app_tp_transfer_screen_const) refers to ap_demo.o(.data) for phone_start_flag + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_screen_int_lvl_low) for app_tp_screen_int_lvl_low + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(i.app_tp_m_read) for app_tp_m_read + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_i2c_master.o(i.hal_i2c_m_transfer_complate) for hal_i2c_m_transfer_complate + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to tau_delay.o(i.delayUs) for delayUs + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to hal_gpio.o(i.hal_gpio_get_input_data) for hal_gpio_get_input_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) for app_tp_screen_analysis_int + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.data) for .data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for screen_reg_int_data + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_transfer.o(.bss) for .bss + app_tp_transfer.o(i.app_tp_transfer_screen_int) refers to app_tp_for_custom_s8.o(.data) for g_screen_input_int_pad + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(i.app_tp_transfer_screen_const) for app_tp_transfer_screen_const + app_tp_transfer.o(i.app_tp_transfer_screen_start) refers to app_tp_transfer.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.constdata) for .constdata + app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) refers to app_tp_for_custom_s8.o(.bss) for .bss + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_transfer.o(i.app_tp_screen_init) for app_tp_screen_init + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to uidiv.o(.text) for __aeabi_uidivmod + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) refers to app_tp_for_custom_s8.o(.data) for .data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_1 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_2 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_3 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_4 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_5 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_6 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for screen_data_write_7 + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_point_back + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_data + app_tp_for_custom_s8.o(.data) refers to app_tp_for_custom_s8.o(.data) for phone_reg_coord_back + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init) for hal_system_init + board.o(i.board_Init) refers to hal_system.o(i.hal_system_enable_systick) for hal_system_enable_systick + board.o(i.board_Init) refers to hal_system.o(i.hal_system_init_console) for hal_system_init_console + board.o(i.board_Init) refers to hal_system.o(i.hal_system_set_phy_calibration) for hal_system_set_phy_calibration + startup_armcm0.o(RESET) refers to startup_armcm0.o(STACK) for __initial_sp + startup_armcm0.o(RESET) refers to startup_armcm0.o(.text) for Reset_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.HardFault_Handler) for HardFault_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SysTick_Handler) for SysTick_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VIDC_IRQn_Handler) for VIDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.LCDC_IRQn_Handler) for LCDC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_RX_IRQn_Handler) for MIPI_RX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MIPI_TX_IRQn_Handler) for MIPI_TX_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.MEMC_IRQn_Handler) for MEMC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.VPRE_IRQn_Handler) for VPRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.FLSCTRL_IRQn_Handler) for FLSCTRL_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.DMA_IRQn_Handler) for DMA_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER0_IRQn_Handler) for TIMER0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER1_IRQn_Handler) for TIMER1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER2_IRQn_Handler) for TIMER2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.TIMER3_IRQn_Handler) for TIMER3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.WDG_IRQn_Handler) for WDG_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.UART_IRQn_Handler) for UART_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C0_IRQn_Handler) for I2C0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.I2C1_IRQn_Handler) for I2C1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIS_IRQn_Handler) for SPIS_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SPIM_IRQn_Handler) for SPIM_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.ADC_IRQn_Handler) for ADC_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.PWMDET_IRQn_Handler) for PWMDET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.SWIRE_IRQn_Handler) for SWIRE_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.AP_NRESET_IRQn_Handler) for AP_NRESET_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT0_IRQn_Handler) for EXTI_INT0_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT1_IRQn_Handler) for EXTI_INT1_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT2_IRQn_Handler) for EXTI_INT2_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT3_IRQn_Handler) for EXTI_INT3_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT4_IRQn_Handler) for EXTI_INT4_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT5_IRQn_Handler) for EXTI_INT5_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT6_IRQn_Handler) for EXTI_INT6_IRQn_Handler + startup_armcm0.o(RESET) refers to irq_redirect .o(i.EXTI_INT7_IRQn_Handler) for EXTI_INT7_IRQn_Handler + startup_armcm0.o(.text) refers to entry.o(.ARM.Collect$$$$00000000) for __main + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video) refers to drv_vidc.o(i.drv_vidc_set_module_enable) for drv_vidc_set_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) for hal_internal_vsync_get_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) for dcs_packet_get_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) for dcs_packet_free_fifo_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg) for drv_dsi_rx_set_ddi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg) for drv_dsi_rx_set_ipi_pg_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to drv_memc.o(i.drv_memc_gen_a_tear_signal) for drv_memc_gen_a_tear_signal + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) for drv_dsi_rx_get_max_ret_size + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) for hal_dsi_rx_ctrl_init_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_rx) for hal_internal_vsync_init_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) for hal_dsi_rx_ctrl_init_dsi_rx + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) for hal_dsi_rx_ctrl_init_rxbr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_dsc_dec.o(i.drv_dsc_dec_disable) for drv_dsc_dec_disable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) for hal_dsi_rx_ctrl_init_vidc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) for hal_dsi_rx_ctrl_init_memc + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to drv_chip_info.o(i.drv_chip_rx_init_done) for drv_chip_rx_init_done + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_vidc_src) for drv_crgu_set_vidc_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_src) for drv_crgu_set_fb_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_fb_div) for drv_crgu_set_fb_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) for drv_dsi_rx_set_ctrl_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) for drv_dsi_rx_set_up_phy + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) for drv_dsi_rx_set_lane_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_inten) for drv_dsi_rx_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) for drv_dsi_rx_set_resp_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) for drv_dsi_rx_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_color_format) for drv_rxbr_set_color_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) for drv_rxbr_set_ltpo_drop_th + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_cfg) for drv_rxbr_set_usr_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_col) for drv_rxbr_set_usr_col + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_usr_row) for drv_rxbr_set_usr_row + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) for drv_rxbr_hline_rcv_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to drv_rxbr.o(i.drv_rxbr_enable_irq) for drv_rxbr_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_src_parameter) for drv_vidc_set_src_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_dst_parameter) for drv_vidc_set_dst_parameter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_init_module_enable) for drv_vidc_init_module_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_rotation) for drv_vidc_set_rotation + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_step) for drv_vidc_set_scld_step + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_h) for drv_param_init_get_scld_filter_h + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_init_get_scld_filter_v) for drv_param_init_get_scld_filter_v + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitr) for drv_vidc_set_p2r_hinitr + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hinitb) for drv_vidc_set_p2r_hinitb + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_param_init.o(i.drv_param_p2r_filter_init) for drv_param_p2r_filter_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) for drv_vidc_set_p2r_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_mirror) for drv_vidc_set_mirror + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_pu_ctrl) for drv_vidc_set_pu_ctrl + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to drv_vidc.o(i.drv_vidc_enable_irq) for drv_vidc_enable_irq + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) for hal_internal_vsync_get_tx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) for drv_rxbr_set_ack_pkt_header + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) refers to hal_dsi_rx_ctrl.o(.conststring) for .conststring + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef0) for drv_vidc_set_scld_hcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_hcoef1) for drv_vidc_set_scld_hcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef0) for drv_vidc_set_scld_vcoef0 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_vidc.o(i.drv_vidc_set_scld_vcoef1) for drv_vidc_set_scld_vcoef1 + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to drv_param_init.o(i.drv_param_init_set_scld_filter) for drv_param_init_set_scld_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) for hal_internal_vsync_set_sync_line + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) for hal_internal_vsync_set_dcs_direct_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) for drv_dsi_rx_calc_ipi_tx_delay + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) for drv_dsi_rx_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_update_src_format) for drv_vidc_update_src_format + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to drv_vidc.o(i.drv_vidc_set_pentile_swap) for drv_vidc_set_pentile_swap + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) for hal_dsi_rx_ctrl_set_rxbr_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) for drv_dsi_rx_set_ddi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) for hal_dsi_rx_ctrl_set_ipi_cfg + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk) refers to hal_dsi_rx_ctrl.o(.data) for .data + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_src) for drv_crgu_set_rxbr_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_rxbr_div) for drv_crgu_set_rxbr_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) for hal_internal_vsync_set_tear_mode + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to drv_dsi_rx.o(i.drv_dsi_rx_power_up) for drv_dsi_rx_power_up + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to drv_dsi_rx.o(i.drv_dsi_rx_shut_down) for drv_dsi_rx_shut_down + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) for hal_internal_vsync_set_rx_state + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) for hal_internal_vsync_toggle_input_frame_rate + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) for hal_internal_sync_input_resolution_change + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) for hal_internal_sync_input_resolution_change_ex + hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) refers to hal_dsi_rx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fscalb.o(.text) for __ARM_scalbnf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fflti.o(.text) for __aeabi_i2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) for drv_dsi_tx_set_video_chunk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) for drv_dsi_tx_set_video_timing + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to fadd.o(.text) for __aeabi_fadd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to ffixui.o(.text) for __aeabi_f2uiz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) refers to hal_dsi_tx_ctrl.o(.conststring) for .conststring + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic) refers to hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) for hal_internal_vsync_update_lcdc_addr + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te) refers to hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) for hal_internal_sync_cmd_mode_rcv_te + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) refers to hal_dsi_tx_ctrl.o(.constdata) for .constdata + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) for hal_dsi_tx_ctrl_set_rect_pixel_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init) for hal_dsi_tx_ctrl_draw_mode_init + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) for drv_dsi_tx_phy_ulps_enter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) for drv_dsi_tx_command_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) for drv_dsi_tx_phy_ulps_exit + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) for hal_dsi_tx_ctrl_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_init_tx) for hal_internal_vsync_init_tx + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) for hal_dsi_tx_config_params_for_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) for hal_dsi_tx_count_lane_rate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) for hal_dsi_tx_init_phy_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) for drv_dsi_tx_phy_test_setup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) for hal_lcdc_init_clk + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) for hal_lcdc_init_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) for hal_dsi_tx_init_dpi_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) for hal_dsi_tx_init_data_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) for hal_dsi_tx_init_remains + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) for hal_dsi_tx_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) for drv_dsi_tx_phy_status_ready + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to drv_dsi_tx.o(i.drv_dsi_tx_powerup) for drv_dsi_tx_powerup + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) refers to hal_gpio.o(i.hal_gpio_set_output_data) for hal_gpio_set_output_data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) for drv_dsi_tx_command_get_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) refers to memcpya.o(.text) for __aeabi_memcpy + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_param_init.o(i.drv_param_init_set_ccm) for drv_param_init_set_ccm + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter) refers to drv_param_init.o(i.drv_param_init_set_sclu_filter) for drv_param_init_set_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) for drv_lcdc_config_overwrite_rgb + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) for drv_lcdc_config_partial_display_enable + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) refers to drv_lcdc.o(i.drv_lcdc_config_partial_display_area) for drv_lcdc_config_partial_display_area + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dflti.o(.text) for __aeabi_i2d + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dmul.o(.text) for __aeabi_dmul + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to ddiv.o(.text) for __aeabi_ddiv + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to dfixi.o(.text) for __aeabi_d2iz + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_vpg) for drv_dsi_tx_set_vpg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker) for hal_dsi_tx_ctrl_draw_flicker + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard) for hal_dsi_tx_ctrl_draw_chessboard + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) for drv_lcdc_set_video_hw_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) for hal_internal_vsync_set_tx_state + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) for hal_dsi_tx_send_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_mode) for drv_dsi_tx_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) for drv_dsi_tx_edpi_cmd_size + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) for hal_dsi_tx_init_video_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) refers to hal_dsi_tx_ctrl.o(.data) for .data + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) for drv_dsi_tx_dpi_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) for drv_dsi_tx_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) for drv_dsi_tx_dpi_lpcmd_time + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_int) for drv_dsi_tx_set_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_int) for drv_dsi_tx_config_int + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) for drv_dsi_tx_phy_lane_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) for drv_dsi_tx_phy_time_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_response_mode) for drv_dsi_tx_response_mode + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) for drv_dsi_tx_set_esc_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) for drv_dsi_tx_set_time_out_div + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) for drv_dsi_tx_timeout_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) for drv_dsi_tx_config_eotp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) for drv_dsi_tx_phy_clock_lane_req_hs + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) for drv_dsi_tx_phy_clock_lane_auto_lp + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) for drv_dsi_tx_video_mode_cfg + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) for drv_dsi_tx_set_bta_ack + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) for drv_dsi_tx_video_mode_set_lp_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) for drv_dsi_tx_video_mode_disable_hact_cmd + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) for hal_dsi_tx_calc_video_chunks + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) for drv_dsi_tx_get_cmd_status + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_header) for drv_dsi_tx_command_header + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) refers to hal_dsi_tx_ctrl.o(.bss) for .bss + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_disp_mode) for drv_lcdc_config_disp_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_edpi_mode) for drv_lcdc_config_edpi_mode + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_endianness) for drv_lcdc_config_endianness + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_thresh) for drv_lcdc_config_thresh + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) for drv_lcdc_config_dpi_polarity + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) refers to drv_lcdc.o(i.drv_lcdc_config_src_parameter) for drv_lcdc_config_src_parameter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dadd.o(.text) for __aeabi_dadd + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_step) for drv_lcdc_config_scale_up_step + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) for hal_lcdc_config_upscaler + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) for hal_lcdc_config_ccm + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) for hal_lcdc_config_rgb_to_pentile + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to drv_lcdc.o(i.drv_lcdc_config_bypass) for drv_lcdc_config_bypass + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) for hal_lcdc_config_remains + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) refers to hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) for hal_lcdc_init_interrupt + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memseta.o(.text) for __aeabi_memclr4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffltui.o(.text) for __aeabi_ui2f + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_div) for drv_crgu_set_dpi_pre_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_pre_src) for drv_crgu_set_dpi_pre_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_dpi_mux_src) for drv_crgu_set_dpi_mux_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fmul.o(.text) for __aeabi_fmul + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to fdiv.o(.text) for __aeabi_fdiv + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to f2d.o(.text) for __aeabi_f2d + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ceil.o(i.ceil) for ceil + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_lcdc.o(i.drv_lcdc_config_dpi_timing) for drv_lcdc_config_dpi_timing + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_update_dpi_param) for hal_internal_update_dpi_param + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to ffixi.o(.text) for __aeabi_f2iz + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to idiv.o(.text) for __aeabi_idivmod + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_div) for drv_crgu_set_lcdc_div + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) refers to drv_crgu.o(i.drv_crgu_set_lcdc_src) for drv_crgu_set_lcdc_src + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) for hal_internal_vsync_get_sync_line + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_set_int) for drv_lcdc_set_int + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) refers to drv_lcdc.o(i.drv_lcdc_config_int) for drv_lcdc_config_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to drv_gpio.o(i.drv_gpio_set_int) for drv_gpio_set_int + hal_gpio.o(i.hal_gpio_ctrl_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_input_data) refers to drv_gpio.o(i.drv_gpio_get_input_data) for drv_gpio_get_input_data + hal_gpio.o(i.hal_gpio_get_int_type) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_get_pull_state) refers to drv_gpio.o(i.drv_gpio_get_pull_state) for drv_gpio_get_pull_state + hal_gpio.o(i.hal_gpio_get_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) for drv_sys_cfg_sel_gpio_group + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) for drv_sys_cfg_sel_int_trig + hal_gpio.o(i.hal_gpio_init_eint) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_init_eint) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_input) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_input) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_init_output) refers to drv_gpio.o(i.drv_gpio_set_ioe) for drv_gpio_set_ioe + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_gpio.o(i.hal_gpio_init_output) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to drv_gpio.o(i.drv_gpio_register_callback) for drv_gpio_register_callback + hal_gpio.o(i.hal_gpio_reg_eint_cb) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_gpio.o(i.drv_gpio_register_ap_reset_callback) for drv_gpio_register_ap_reset_callback + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) for drv_sys_cfg_sel_ap_rst_trig + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_gpio.o(i.hal_gpio_set_ap_reset_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to drv_gpio.o(i.drv_gpio_set_driving_strength) for drv_gpio_set_driving_strength + hal_gpio.o(i.hal_gpio_set_driving_strength) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode3) for drv_gpio_set_mode3 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode2) for drv_gpio_set_mode2 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode1) for drv_gpio_set_mode1 + hal_gpio.o(i.hal_gpio_set_mode) refers to drv_gpio.o(i.drv_gpio_set_mode0) for drv_gpio_set_mode0 + hal_gpio.o(i.hal_gpio_set_mode) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_output_data) refers to hal_gpio.o(i.drv_gpio_set_output_data) for drv_gpio_set_output_data + hal_gpio.o(i.hal_gpio_set_pull_state) refers to drv_gpio.o(i.drv_gpio_set_pull_state) for drv_gpio_set_pull_state + hal_gpio.o(i.hal_gpio_set_pull_state) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to drv_gpio.o(i.drv_gpio_set_schmitt_trigger) for drv_gpio_set_schmitt_trigger + hal_gpio.o(i.hal_gpio_set_schmitt_trigger) refers to hal_gpio.o(.constdata) for .constdata + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to drv_gpio.o(i.drv_gpio_set_slew_rate) for drv_gpio_set_slew_rate + hal_gpio.o(i.hal_gpio_set_slew_rate) refers to hal_gpio.o(.constdata) for .constdata + hal_i2c_master.o(i.hal_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_deinit) for drv_i2c_m_deinit + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_master_init) for drv_i2c_master_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_master.o(i.drv_i2c_m_enable_intr) for drv_i2c_m_enable_intr + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) for drv_i2c_enable_rx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_master.o(i.hal_i2c_m_dma_init) refers to hal_i2c_master.o(i.hal_i2c_master_irq_callback) for hal_i2c_master_irq_callback + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to drv_i2c_dma.o(i.drv_i2c_master_read_dma) for drv_i2c_master_read_dma + hal_i2c_master.o(i.hal_i2c_m_dma_read) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_master_write_dma) for drv_i2c_master_write_dma + hal_i2c_master.o(i.hal_i2c_m_dma_write) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_master.o(i.hal_i2c_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_master.o(i.hal_i2c_m_transfer_complate) refers to hal_i2c_master.o(.data) for .data + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) for drv_i2c_m_clear_it_pending_bit + hal_i2c_master.o(i.hal_i2c_master_irq_callback) refers to hal_i2c_master.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_deinit) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to drv_i2c_dma.o(i.drv_i2c_slave_write_dma) for drv_i2c_slave_write_dma + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_dma_write) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_slave_init) for drv_i2c_slave_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_master.o(i.drv_i2c1_set_callback) for drv_i2c1_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_config_intr) for drv_i2c_s_config_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c_s_set_intr) for drv_i2c_s_set_intr + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_dma_init) for drv_i2c_dma_init + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) for drv_i2c_set_dma_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) for drv_i2c_enable_tx_dma + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + hal_i2c_slave.o(i.hal_i2c_s_init) refers to drv_i2c_slave.o(i.drv_i2c0_set_callback) for drv_i2c0_set_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) for hal_i2c_slave_irq_callback + hal_i2c_slave.o(i.hal_i2c_s_init) refers to hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) for hal_i2c_s_dma_user_callback + hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_read_data) for drv_i2c_s_read_data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_read_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_sel) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_s_set_transfer) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_complate) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_s_write_data) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) for drv_i2c_s_clear_it_pending_bit + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to drv_i2c_slave.o(i.drv_i2c_s_write_data) for drv_i2c_s_write_data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.data) for .data + hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) refers to hal_i2c_slave.o(.constdata) for .constdata + hal_pwm.o(i.hal_pwm_in_clear_int) refers to drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all) for drv_pwm_in_clear_pwm_int_all + hal_pwm.o(i.hal_pwm_in_config_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_in_ctrl_int) refers to drv_pwm.o(i.drv_pwm_in_set_sys_int) for drv_pwm_in_set_sys_int + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_get_current_count) refers to drv_pwm.o(i.drv_pwm_in_get_current_count) for drv_pwm_in_get_current_count + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_pwm.o(i.drv_pwm_in_get_high_period) for drv_pwm_in_get_high_period + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_high_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_pwm.o(i.drv_pwm_in_get_low_period) for drv_pwm_in_get_low_period + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_low_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_pwm.o(i.drv_pwm_in_get_counter_period) for drv_pwm_in_get_counter_period + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_in_get_total_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_in_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_in_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_in_init) refers to drv_pwm.o(i.drv_pwm_in_enable) for drv_pwm_in_enable + hal_pwm.o(i.hal_pwm_in_register_callback) refers to drv_pwm.o(i.drv_pwm_in_register_callback) for drv_pwm_in_register_callback + hal_pwm.o(i.hal_pwm_in_set_int) refers to drv_pwm.o(i.drv_pwm_in_set_pwm_int) for drv_pwm_in_set_pwm_int + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_common_config) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_config_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_config_duty_ratio) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(i.hal_pwm_out_common_config) for hal_pwm_out_common_config + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_pwm.o(i.drv_pwm_out_set_sync_mode) for drv_pwm_out_set_sync_mode + hal_pwm.o(i.hal_pwm_out_convert_time) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_convert_time) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_pwm.o(i.drv_pwm_out_enable) for drv_pwm_out_enable + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_pwm.o(i.hal_pwm_out_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_deinit) refers to hal_pwm.o(.data) for .data + hal_pwm.o(i.hal_pwm_out_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_pwm.o(i.hal_pwm_out_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sel_io) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_pwm.o(i.hal_pwm_out_sync_all) refers to hal_pwm.o(i.hal_pwm_out_convert_time) for hal_pwm_out_convert_time + hal_pwm.o(i.hal_pwm_out_sync_ctl) refers to drv_pwm.o(i.drv_pwm_out_set_control) for drv_pwm_out_set_control + hal_pwm.o(i.hal_pwm_out_sync_pause) refers to drv_pwm.o(i.drv_pwm_out_pause) for drv_pwm_out_pause + hal_pwm.o(i.hal_pwm_out_sync_period) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_pwm.o(i.drv_pwm_out_set_period) for drv_pwm_out_set_period + hal_pwm.o(i.hal_pwm_out_sync_period) refers to drv_common.o(.data) for g_system_clock + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_pwm.o(i.drv_pwm_out_set_threshold) for drv_pwm_out_set_threshold + hal_pwm.o(i.hal_pwm_out_sync_thr) refers to drv_common.o(.data) for g_system_clock + hal_spi_master.o(i.hal_spi_m_callback) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_master.o(i.hal_spi_m_callback) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_clear_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_deinit) for drv_spi_m_deinit + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_gpio_init) for hal_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_master_init) for drv_spi_master_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_dma_ch6_init) for drv_spi_dma_ch6_init + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) for drv_spi_set_dma_ch6_irq_callback + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + hal_spi_master.o(i.hal_spi_m_dma_init) refers to hal_spi_master.o(i.hal_spi_m_callback) for hal_spi_m_callback + hal_spi_master.o(i.hal_spi_m_dma_read) refers to drv_spi_dma.o(i.drv_spim_dma_read) for drv_spim_dma_read + hal_spi_master.o(i.hal_spi_m_dma_read) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_dma_write) refers to drv_spi_dma.o(i.drv_spim_dma_write) for drv_spim_dma_write + hal_spi_master.o(i.hal_spi_m_dma_write) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_get_transfer_complate) refers to hal_spi_master.o(.data) for .data + hal_spi_master.o(i.hal_spi_m_gpio_init) refers to drv_spi_master.o(i.drv_spi_m_gpio_init) for drv_spi_m_gpio_init + hal_spi_master.o(i.hal_spi_m_read_rxfifo) refers to drv_spi_master.o(i.drv_spi_m_read_data) for drv_spi_m_read_data + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_master.o(i.hal_spi_m_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_swire.o(i.hal_swire_deinit) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_swire_div) for drv_crgu_set_swire_div + hal_swire.o(i.hal_swire_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_swire.o(i.hal_swire_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_swire.o(i.hal_swire_init) refers to drv_swire.o(i.drv_swire_enable) for drv_swire_enable + hal_swire.o(i.hal_swire_open) refers to drv_swire.o(i.drv_swire_set_power_down) for drv_swire_set_power_down + hal_swire.o(i.hal_swire_register_callback) refers to drv_swire.o(i.drv_swire_register_callback) for drv_swire_register_callback + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + hal_swire.o(i.hal_swire_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_bit_time) for drv_swire_set_bit_time + hal_swire.o(i.hal_swire_start) refers to drv_swire.o(i.drv_swire_set_pulse_count) for drv_swire_set_pulse_count + hal_swire.o(i.hal_swire_start) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_deep_sleep_mode) refers to drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode) for drv_pwr_enter_deep_sleep_mode + hal_system.o(i.hal_system_disable_systick) refers to drv_common.o(i.drv_common_disable_systick) for drv_common_disable_systick + hal_system.o(i.hal_system_enable_systick) refers to drv_common.o(i.drv_common_enable_systick) for drv_common_enable_systick + hal_system.o(i.hal_system_flash_power_down) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_power_down) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + hal_system.o(i.hal_system_flash_read) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_read) refers to norflash.o(i.norflash_dual_read) for norflash_dual_read + hal_system.o(i.hal_system_flash_release_power_down) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_release_power_down) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_init) for norflash_init + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_erase_block) for norflash_erase_block + hal_system.o(i.hal_system_flash_write) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_flash_write) refers to norflash.o(i.norflash_write) for norflash_write + hal_system.o(i.hal_system_get_tick) refers to drv_common.o(i.drv_common_get_tick) for drv_common_get_tick + hal_system.o(i.hal_system_idle_mode) refers to drv_common.o(i.drv_common_idle_mode) for drv_common_idle_mode + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_system_clk_src) for drv_pwr_set_system_clk_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_src) for drv_crgu_set_ahb_src + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_ahb_pre_div) for drv_crgu_set_ahb_pre_div + hal_system.o(i.hal_system_init) refers to irq_redirect .o(i.handle_init) for handle_init + hal_system.o(i.hal_system_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) for drv_sys_cfg_clear_all_int + hal_system.o(i.hal_system_init) refers to drv_common.o(i.drv_common_system_init) for drv_common_system_init + hal_system.o(i.hal_system_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_system.o(i.hal_system_init) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_init) refers to drv_common.o(.data) for g_system_clock + hal_system.o(i.hal_system_init_console) refers to hal_uart.o(i.hal_uart_init) for hal_uart_init + hal_system.o(i.hal_system_register_systick_cb) refers to drv_common.o(i.drv_common_systick_register_cb) for drv_common_systick_register_cb + hal_system.o(i.hal_system_set_phy_calibration) refers to drv_phy_common.o(i.drv_phy_enable_calibration) for drv_phy_enable_calibration + hal_system.o(i.hal_system_set_pvd) refers to drv_pwr.o(i.drv_pwr_set_pvd_mode) for drv_pwr_set_pvd_mode + hal_system.o(i.hal_system_set_vcc) refers to drv_pwr.o(i.drv_pwr_set_cp_mode) for drv_pwr_set_cp_mode + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_connect) for drv_fls_gpio_connect + hal_system.o(i.hal_system_share_flash_mode) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + hal_system.o(i.hal_system_sleep_mode) refers to drv_crgu.o(i.drv_crgu_config_clocks) for drv_crgu_config_clocks + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_deinit) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_timer.o(i.hal_timer_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_get_status) refers to drv_timer.o(i.drv_timer_get_status) for drv_timer_get_status + hal_timer.o(i.hal_timer_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + hal_timer.o(i.hal_timer_init) refers to drv_timer.o(i.drv_timer_set_prescaler) for drv_timer_set_prescaler + hal_timer.o(i.hal_timer_set_repeat) refers to drv_timer.o(i.drv_timer_set_repeat) for drv_timer_set_repeat + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_get_prescaler) for drv_timer_get_prescaler + hal_timer.o(i.hal_timer_start_ex) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_start_ex) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_start_ex) refers to drv_common.o(.data) for g_system_clock + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_register_callback) for drv_timer_register_callback + hal_timer.o(i.hal_timer_stop) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + tau_delay.o(i.delayMs) refers to tau_delay.o(i.delayUs) for delayUs + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0vsprintf) for vsprintf + tau_log.o(i.LOG_printf) refers to printfa.o(i.__0printf) for __2printf + tau_log.o(i.LOG_printf) refers to tau_log.o(.bss) for .bss + tau_log.o(i.fgetc) refers to hal_uart.o(i.hal_uart_receive_blocking) for hal_uart_receive_blocking + tau_log.o(i.fputc) refers to hal_uart.o(i.hal_uart_transmit_blocking) for hal_uart_transmit_blocking + hal_uart.o(i.hal_uart_deinit) refers to drv_dma.o(i.drv_dma_deinit) for drv_dma_deinit + hal_uart.o(i.hal_uart_deinit) refers to drv_uart.o(i.UART_Deinit) for UART_Deinit + hal_uart.o(i.hal_uart_dmacallback) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_init) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_uart.o(i.hal_uart_init) refers to memseta.o(.text) for __aeabi_memclr4 + hal_uart.o(i.hal_uart_init) refers to drv_uart.o(i.UART_init) for UART_init + hal_uart.o(i.hal_uart_init) refers to drv_common.o(.data) for g_system_clock + hal_uart.o(i.hal_uart_init) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_blocking) refers to drv_uart.o(i.UART_ReadBlocking) for UART_ReadBlocking + hal_uart.o(i.hal_uart_receive_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_receive_dma) refers to drv_uart_dma.o(i.UART_TransferReceiveDMA) for UART_TransferReceiveDMA + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_receive_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + hal_uart.o(i.hal_uart_transmit_blocking) refers to drv_uart.o(i.UART_WriteBlocking) for UART_WriteBlocking + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferCreateHandleDMA) for UART_TransferCreateHandleDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to drv_uart_dma.o(i.UART_TransferSendDMA) for UART_TransferSendDMA + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(.bss) for .bss + hal_uart.o(i.hal_uart_transmit_dma) refers to hal_uart.o(i.hal_uart_dmacallback) for hal_uart_dmacallback + norflash.o(i.app_fls_ctrl_Handler) refers to drv_fls.o(i.fls_clr_interrupt_flag) for fls_clr_interrupt_flag + norflash.o(i.app_fls_ctrl_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + norflash.o(i.app_fls_ctrl_Handler) refers to norflash.o(.data) for .data + norflash.o(i.norflash_best_cfg_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + norflash.o(i.norflash_best_cfg_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_check_id) refers to norflash.o(i.norflash_read_id) for norflash_read_id + norflash.o(i.norflash_check_id) refers to tau_delay.o(i.delayUs) for delayUs + norflash.o(i.norflash_check_id) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_callback) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_read_prepare) for fls_dma_read_prepare + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_read) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_read) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dma_read) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_read) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_create_handle_dma) for fls_transfer_create_handle_dma + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_write_prepare) for fls_dma_write_prepare + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_transfer_dma) for fls_transfer_dma + norflash.o(i.norflash_dma_write) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + norflash.o(i.norflash_dma_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_dma_write) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_dma_write) refers to norflash.o(i.norflash_dma_callback) for norflash_dma_callback + norflash.o(i.norflash_dma_write) refers to norflash.o(.data) for .data + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_dual_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_dual_write) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_dual_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_en4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_en_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_en_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_en_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_dual_hstatus) for norflash_get_dual_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_hstatus) for norflash_get_hstatus + norflash.o(i.norflash_en_quad_check) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_en_quad_check) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_block) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_block) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_chip) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_erase_chip) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_erase_sector) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_erase_sector) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_ex4b) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_read_config_reg) for norflash_read_config_reg + norflash.o(i.norflash_ex4b) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_exit_quad) refers to norflash.o(i.norflash_en_quad_check) for norflash_en_quad_check + norflash.o(i.norflash_exit_quad) refers to drv_fls.o(i.fls_busy_pending) for fls_busy_pending + norflash.o(i.norflash_exit_quad) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_dual_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_hstatus) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_get_status) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_spi_config) for fls_get_default_spi_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_fls_config) for fls_get_default_fls_config + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_get_default_tuning) for fls_get_default_tuning + norflash.o(i.norflash_init) refers to drv_fls.o(i.fls_init) for fls_init + norflash.o(i.norflash_init) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_init) refers to drv_fls.o(.data) for g_fls_tuning + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_qcmd_enable) for fls_qcmd_enable + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_quad_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_switch_fls_spi) for norflash_switch_fls_spi + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_quad_write) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_quad_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_read) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_config_reg) refers to drv_fls.o(i.fls_read_byte_data) for fls_read_byte_data + norflash.o(i.norflash_read_id) refers to drv_fls.o(i.fls_read_cmd) for fls_read_cmd + norflash.o(i.norflash_set_best_cfg) refers to memseta.o(.text) for __aeabi_memclr4 + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_read_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(i.norflash_en_quad) for norflash_en_quad + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.data) for .data + norflash.o(i.norflash_set_best_write_cfg) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_single_mode) for fls_single_mode + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_set_addr_dummy) for fls_set_addr_dummy + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_ddat_enable) for fls_ddat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qdat_enable) for fls_qdat_enable + norflash.o(i.norflash_switch_fls_spi) refers to drv_fls.o(i.fls_qadr_enable) for fls_qadr_enable + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + norflash.o(i.norflash_write_disable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_disable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_disable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_disable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to drv_fls.o(i.fls_write_cmd) for fls_write_cmd + norflash.o(i.norflash_write_enable) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_enable) refers to norflash.o(.bss) for .bss + norflash.o(i.norflash_write_enable) refers to norflash.o(.data) for .data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_enable) for norflash_write_enable + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_enable) for norflash_big_end_enable + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_en_scr) for fls_en_scr + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_write_byte_data) for fls_write_byte_data + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_big_end_clear) for norflash_big_end_clear + norflash.o(i.norflash_write_endian_scr) refers to drv_fls.o(i.fls_scr_clear) for fls_scr_clear + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_get_status) for norflash_get_status + norflash.o(i.norflash_write_endian_scr) refers to norflash.o(i.norflash_write_disable) for norflash_write_disable + drv_common.o(i.app_HardFault_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_common.o(i.app_SysTick_Handler) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_enable_systick) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_common.o(i.drv_common_enable_systick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_get_tick) refers to drv_common.o(.data) for .data + drv_common.o(i.drv_common_system_init) refers to drv_chip_info.o(i.drv_chip_info_init) for drv_chip_info_init + drv_common.o(i.drv_common_systick_register_cb) refers to drv_common.o(.data) for .data + drv_dma.o(i.app_dma_irq_handler) refers to drv_dma.o(i.drv_dma_irq_handler) for drv_dma_irq_handler + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_abort_transfer) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_set_ccr) for drv_dma_set_ccr + drv_dma.o(i.drv_dma_ahb_init) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_dma.o(i.drv_dma_clear_flag) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_create_handle) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_disenable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dma.o(i.drv_dma_enable_channel_interrupts) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dma.o(i.drv_dma_enable_cycle) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_get_remaining_bytes) refers to drv_dma.o(i.drv_dma_channel_is_active) for drv_dma_channel_is_active + drv_dma.o(i.drv_dma_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dma.o(i.drv_dma_init) refers to drv_dma.o(i.drv_dma_ahb_init) for drv_dma_ahb_init + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_get_channel_flag) for drv_dma_get_channel_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_dma.o(i.drv_dma_irq_handler) refers to drv_dma.o(.bss) for .bss + drv_dma.o(i.drv_dma_m2m_init) refers to memseta.o(.text) for __aeabi_memclr4 + drv_dma.o(i.drv_dma_m2m_init) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_dma.o(i.drv_dma_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_dma.o(i.drv_dma_set_burst) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_dma.o(i.drv_dma_set_transfer) refers to drv_dma.o(i.drv_dma_set_burst) for drv_dma_set_burst + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_dma.o(i.drv_dma_start_transfer) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_fls.o(i.drv_fls_gpio_connect) refers to drv_fls.o(i.drv_fls_gpio_disconnect) for drv_fls_gpio_disconnect + drv_fls.o(i.drv_fls_gpio_disconnect) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_EnableClk) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_busy_pending) refers to norflash.o(i.norflash_get_status) for norflash_get_status + drv_fls.o(i.fls_de_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_de_init) refers to drv_dma.o(i.drv_dma_clear_flag) for drv_dma_clear_flag + drv_fls.o(i.fls_de_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_disable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_fls.o(i.fls_enable_it) refers to drv_fls.o(i.fls_set_mc_irq_mask) for fls_set_mc_irq_mask + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_fls.o(i.fls_init) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_spi_init) for fls_spi_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_ctrl_cfg_init) for fls_ctrl_cfg_init + drv_fls.o(i.fls_init) refers to drv_fls.o(i.fls_set_tuning) for fls_set_tuning + drv_fls.o(i.fls_init) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_enable_it) for fls_enable_it + drv_fls.o(i.fls_read_cmd_it) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_fls.o(i.fls_set_mc_irq_mask) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_byte_data) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls.o(i.fls_write_cmd) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) for drv_ap_rst_trig_edge_detect + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_get_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_register_ap_reset_callback) refers to drv_gpio.o(.data) for .data + drv_gpio.o(i.drv_gpio_register_callback) refers to drv_gpio.o(.bss) for .bss + drv_gpio.o(i.drv_gpio_set_driving_strength) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_gpio.o(i.drv_gpio_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_gpio.o(i.drv_gpio_set_pull_state) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_schmitt_trigger) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_gpio.o(i.drv_gpio_set_slew_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_dma.o(i.drv_i2c_dma_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_master.o(i.drv_i2c_m_enable) for drv_i2c_m_enable + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_master_read_dma) refers to drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) for drv_i2c_master_write_read_cmd + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_set_transfer) for drv_dma_set_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_dma.o(i.drv_i2c_master_write_dma) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.data) for .data + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(.bss) for .bss + drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) refers to drv_i2c_dma.o(i.drv_i2c_dma_callback) for drv_i2c_dma_callback + drv_i2c_dma.o(i.drv_i2c_slave_write_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_i2c_master.o(i.app_I2C1_IRQn_Handler) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c1_set_callback) refers to drv_i2c_master.o(.data) for .data + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_i2c_master.o(i.drv_i2c_m_disable_intr) for drv_i2c_m_disable_intr + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_i2c_master.o(i.drv_i2c_m_deinit) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_i2c_master.o(i.drv_i2c_m_enable_intr) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_read_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_m_set_sys_mask) refers to drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_i2c_master.o(i.drv_i2c_m_write_data) refers to drv_i2c_master.o(i.drv_i2c_m_get_fifo_status) for drv_i2c_m_get_fifo_status + drv_i2c_master.o(i.drv_i2c_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_i2c_master.o(i.drv_i2c_master_init) refers to drv_common.o(.data) for g_system_clock + drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c0_set_callback) refers to drv_i2c_slave.o(.data) for .data + drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_i2c_slave.o(i.drv_i2c_s_read_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_i2c_slave.o(i.drv_i2c_s_set_intr) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_i2c_slave.o(i.drv_i2c_s_write_data) refers to drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) for drv_i2c_s_get_fifo_status + drv_i2c_slave.o(i.drv_i2c_slave_init) refers to drv_i2c_slave.o(i.drv_i2c_s_enable) for drv_i2c_s_enable + drv_param_init.o(i.drv_param_init_get_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_h) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_scld_filter_v) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_get_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_ccm) refers to memcpya.o(.text) for __aeabi_memcpy4 + drv_param_init.o(i.drv_param_init_set_ccm) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_scld_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_init_set_sclu_filter) refers to drv_param_init.o(.data) for .data + drv_param_init.o(i.drv_param_p2r_filter_init) refers to drv_param_init.o(.constdata) for .constdata + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.app_PWMDET_IRQn_Handler) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_register_callback) refers to drv_pwm.o(.data) for .data + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_pwm.o(i.drv_pwm_in_set_sys_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel) for drv_dma_disenable_channel + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_dma.o(i.drv_dma_disenable_channel_interrupts) for drv_dma_disenable_channel_interrupts + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_slave.o(i.drv_spi_s_enable_rx_dma) for drv_spi_s_enable_rx_dma + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_abort_dma) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_dma_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_ch6_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_dma.o(i.drv_spi_dma_init) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_create_handle) for drv_dma_create_handle + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) refers to drv_spi_dma.o(i.drv_spi_dma_callback) for drv_spi_dma_callback + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_rx_dma) for drv_spi_m_enable_rx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_read) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_master.o(i.drv_spi_m_enable_tx_dma) for drv_spi_m_enable_tx_dma + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel_interrupts) for drv_dma_enable_channel_interrupts + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spim_dma_write) refers to drv_spi_dma.o(.data) for .data + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_dma.o(i.drv_dma_enable_channel) for drv_dma_enable_channel + drv_spi_dma.o(i.drv_spis_dma_write) refers to drv_spi_dma.o(.bss) for .bss + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.app_SPIM_IRQn_Handler) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_m_deinit) refers to drv_spi_master.o(i.drv_spi_m_switch_sclk) for drv_spi_m_switch_sclk + drv_spi_master.o(i.drv_spi_m_disable_int) refers to drv_spi_master.o(i.__NVIC_ClearPendingIRQ) for __NVIC_ClearPendingIRQ + drv_spi_master.o(i.drv_spi_m_set_intr_callback) refers to drv_spi_master.o(.data) for .data + drv_spi_master.o(i.drv_spi_master_init) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_spi_master.o(i.drv_spi_master_init) refers to drv_common.o(.data) for g_system_clock + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(i.drv_swire_set_int) for drv_swire_set_int + drv_swire.o(i.app_SWIRE_IRQn_Handler) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_register_callback) refers to drv_swire.o(.data) for .data + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_swire.o(i.drv_swire_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) refers to drv_sys_cfg.o(.data) for .data + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) for drv_sys_cfg_sel_ap_rst_lvl_trig + drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) refers to drv_sys_cfg.o(.data) for .data + drv_timer.o(i.app_TIMER0_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER1_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER2_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.app_TIMER3_IRQn_Handler) refers to drv_timer.o(i.drv_timer_handle_interrupt) for drv_timer_handle_interrupt + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_clear_status_flags) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_enable) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_get_instance) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_get_status) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_clear_status_flags) for drv_timer_clear_status_flags + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_enable) for drv_timer_enable + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_int) for drv_timer_set_int + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(i.drv_timer_set_compare_val) for drv_timer_set_compare_val + drv_timer.o(i.drv_timer_handle_interrupt) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_register_callback) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_compare_val) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_timer.o(i.drv_timer_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(i.drv_timer_get_instance) for drv_timer_get_instance + drv_timer.o(i.drv_timer_set_prescaler) refers to drv_timer.o(.data) for .data + drv_timer.o(i.drv_timer_set_repeat) refers to drv_timer.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_param_init.o(i.drv_param_init_get_ccm) for drv_param_init_get_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_ccm) for drv_lcdc_config_ccm + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) for hal_internal_sync_get_hight_performan_mode + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to ddiv.o(.text) for __aeabi_ddiv + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to sqrt.o(i.sqrt) for sqrt + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dmul.o(.text) for __aeabi_dmul + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to cdcmple.o(.text) for __aeabi_cdcmple + hal_internal_vsync.o(i.calc_framebuffer_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.check_pkt_buf_rev) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.dcs_sw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_data_mode) for drv_memc_set_data_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_waveform) for drv_memc_set_tear_waveform + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) for hal_internal_vsync_get_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_ltpo_mode) for drv_memc_set_ltpo_mode + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_double_buffer) for drv_memc_set_double_buffer + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_active_height) for drv_memc_set_active_height + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_set_inten) for drv_memc_set_inten + hal_internal_vsync.o(i.hal_internal_init_memc) refers to drv_memc.o(i.drv_memc_enable_irq) for drv_memc_enable_irq + hal_internal_vsync.o(i.hal_internal_init_memc) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to drv_lcdc.o(i.drv_lcdc_start) for drv_lcdc_start + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_dsi_tx.o(i.drv_dsi_tx_shutdown) for drv_dsi_tx_shutdown + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) for hal_dsi_rx_ctrl_init + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) for hal_dsi_rx_ctrl_start + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) for drv_lcdc_enable_shadow_reg + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) for hal_dsi_rx_ctrl_gen_a_tear_signal + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to tau_delay.o(i.delayUs) for delayUs + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) for hal_vsync_reset_lcdc_scaler + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.hal_internal_update_dpi_param) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to fmul.o(.text) for __aeabi_fmul + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to f2d.o(.text) for __aeabi_f2d + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to ceil.o(i.ceil) for ceil + hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_deinit) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_chip_info.o(i.drv_chip_rx_info_check) for drv_chip_rx_info_check + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq0_callback) for drv_rxbr_register_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_rxbr.o(i.drv_rxbr_register_irq1_callback) for drv_rxbr_register_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to drv_vidc.o(i.drv_vidc_register_callback) for drv_vidc_register_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_init) for dcs_packet_fifo_init + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te) for soft_gen_te + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.soft_gen_te_double_buffer) for soft_gen_te_double_buffer + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq0_callback) for rxbr_irq0_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.rxbr_irq1_callback) for rxbr_irq1_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_rx) refers to hal_internal_vsync.o(i.vidc_callback) for vidc_callback + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to memcpya.o(.text) for __aeabi_memcpy4 + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) for check_mipi_rx_tx_video_info + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(i.calc_framebuffer_setting) for calc_framebuffer_setting + hal_internal_vsync.o(i.hal_internal_vsync_init_tx) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to drv_rxbr.o(i.drv_rxbr_set_cmd_filter) for drv_rxbr_set_cmd_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) for hal_internal_vsync_set_auto_hw_filter + hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to drv_vidc.o(i.drv_vidc_enable) for drv_vidc_enable + hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.hal_internal_vsync_deinit) for hal_internal_vsync_deinit + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(i.vsync_set_te_mode) for vsync_set_te_mode + hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) for drv_rxbr_frame_drop_cfg + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_get_clk) for drv_rxbr_get_clk + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to ffltui.o(.text) for __aeabi_ui2f + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to fdiv.o(.text) for __aeabi_fdiv + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to tau_delay.o(i.delayMs) for delayMs + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) for hal_internal_sync_get_fb_setting + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_fs_en_conditions) for drv_memc_set_fs_en_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_lcdc_st_conditions) for drv_memc_set_lcdc_st_conditions + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_sel_vsync) for drv_memc_sel_vsync + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_set_vidc_sync_cnt) for drv_memc_set_vidc_sync_cnt + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_memc.o(i.drv_memc_rate_transfer_sel) for drv_memc_rate_transfer_sel + hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate) refers to drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) for drv_rxbr_hline_rcv0_cfg + hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfltui.o(.text) for __aeabi_ui2d + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dadd.o(.text) for __aeabi_dadd + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to dfixui.o(.text) for __aeabi_d2uiz + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) for hal_dsi_tx_ctrl_set_partial_disp_area + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) for hal_dsi_tx_ctrl_set_partial_disp + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_param_init.o(i.drv_param_init_get_sclu_filter) for drv_param_init_get_sclu_filter + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) for drv_lcdc_config_scale_up_coef + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to drv_crgu.o(i.drv_crgu_config_reset_modules) for drv_crgu_config_reset_modules + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) for hal_dsi_tx_ctrl_init + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(i.hal_internal_init_memc) for hal_internal_init_memc + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) for hal_dsi_tx_ctrl_start + hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.dcs_sw_filter) for dcs_sw_filter + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) for dcs_packet_fifo_alloc + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) for hal_dsi_rx_ctrl_dsc_async_handler + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) for drv_dsi_tx_command_put_payload + hal_internal_vsync.o(i.rx_get_dcs_packet_data) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_col_addr) for drv_rxbr_get_col_addr + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_get_page_addr) for drv_rxbr_get_page_addr + hal_internal_vsync.o(i.rx_partial_update) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_partial_update) refers to drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) for drv_dsc_dec_get_nslc + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src) for drv_crgu_set_dsco_src + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsco_src_div) for drv_crgu_set_dsco_src_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_crgu.o(i.drv_crgu_set_dsc_core_div) for drv_crgu_set_dsc_core_div + hal_internal_vsync.o(i.rx_partial_update) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_partial_update) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_get_dcs_packet_data) for rx_get_dcs_packet_data + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(i.rx_receive_pps) for rx_receive_pps + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_packet) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rx_receive_packet) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rx_receive_pps) refers to memseta.o(.text) for __aeabi_memclr4 + hal_internal_vsync.o(i.rx_receive_pps) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(i.check_pkt_buf_rev) for check_pkt_buf_rev + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) for drv_dsc_dec_convert_pps_rc_parameter + hal_internal_vsync.o(i.rx_receive_pps) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) for drv_dsi_rx_get_compression_en + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_enable) for drv_dsc_dec_enable + hal_internal_vsync.o(i.rx_receive_pps) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.rx_receive_pps) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_status0) for drv_rxbr_get_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_receive_packet) for rx_receive_packet + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to drv_rxbr.o(i.drv_rxbr_set_inten) for drv_rxbr_set_inten + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq0_callback) refers to hal_internal_vsync.o(i.rx_partial_update) for rx_partial_update + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.drv_rxbr_get_int_source) for drv_rxbr_get_int_source + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) for hal_internal_video_mode_auto_sync + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_status0) for drv_rxbr_clear_status0 + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(i.vpre_err_reset) for vpre_err_reset + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_memc.o(i.drv_memc_set_double_buffer_reverse) for drv_memc_set_double_buffer_reverse + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) for drv_rxbr_clear_pkt_buffer + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.rxbr_irq1_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.soft_gen_te_double_buffer) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_get_irq_status) for drv_vidc_get_irq_status + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_overwrite) for drv_lcdc_config_overwrite + hal_internal_vsync.o(i.vidc_callback) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_clear_irq) for drv_vidc_clear_irq + hal_internal_vsync.o(i.vidc_callback) refers to drv_vidc.o(i.drv_vidc_set_irqen) for drv_vidc_set_irqen + hal_internal_vsync.o(i.vidc_callback) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vidc_callback) refers to hal_internal_vsync.o(.conststring) for .conststring + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_vidc.o(i.drv_vidc_reset) for drv_vidc_reset + hal_internal_vsync.o(i.vpre_err_reset) refers to drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) for drv_dsc_dec_set_u8_pps + hal_internal_vsync.o(i.vpre_err_reset) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_memc.o(i.drv_memc_set_tear_mode) for drv_memc_set_tear_mode + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_config_int_single) for drv_lcdc_config_int_single + hal_internal_vsync.o(i.vsync_set_te_mode) refers to drv_lcdc.o(i.drv_lcdc_ctrl_flow) for drv_lcdc_ctrl_flow + hal_internal_vsync.o(i.vsync_set_te_mode) refers to uidiv.o(.text) for __aeabi_uidivmod + hal_internal_vsync.o(i.vsync_set_te_mode) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.bss) for .bss + hal_internal_vsync.o(i.vsync_set_te_mode) refers to hal_internal_vsync.o(.data) for .data + hal_internal_vsync.o(.data) refers to hal_internal_vsync.o(.bss) for sg_te_info + dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_fifo_init) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) refers to dcs_packet_fifo.o(.bss) for .bss + dcs_packet_fifo.o(i.dcs_packet_get_fifo_size) refers to dcs_packet_fifo.o(.bss) for .bss + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to ffltui.o(.text) for __aeabi_ui2f + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fdiv.o(.text) for __aeabi_fdiv + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fmul.o(.text) for __aeabi_fmul + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) for drv_dsi_rx_get_color_bpp + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) for drv_dsi_rx_get_color_pcc + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to fadd.o(.text) for __aeabi_fadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to cfrcmple.o(.text) for __aeabi_cfrcmple + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to f2d.o(.text) for __aeabi_f2d + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dadd.o(.text) for __aeabi_dadd + drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) refers to dfixui.o(.text) for __aeabi_d2uiz + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to drv_dsi_rx.o(i.drv_rx_phy_test_read) for drv_rx_phy_test_read + drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_clear) for drv_rx_phy_test_clear + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) for drv_rx_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) for drv_rx_phy_test_write_2_byte + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) refers to drv_dsi_rx.o(i.drv_rx_phy_test_lock) for drv_rx_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_rx.o(i.drv_rx_phy_test_lock) refers to drv_phy_common.o(i.drv_phy_test_lock) for drv_phy_test_lock + drv_dsi_rx.o(i.drv_rx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to drv_dsi_tx.o(i.drv_tx_phy_test_read) for drv_tx_phy_test_read + drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_rate_para) for drv_phy_get_rate_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_pll_para) for drv_phy_get_pll_para + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_phy_common.o(i.drv_phy_get_calibration) for drv_phy_get_calibration + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_enter) for drv_tx_phy_test_enter + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_ref_src) for drv_crgu_set_mipi_ref_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) for drv_crgu_set_mipi_cfg_src + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_clear) for drv_tx_phy_test_clear + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) for drv_tx_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_code) for drv_tx_phy_test_write_code + drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) refers to drv_dsi_tx.o(i.drv_tx_phy_test_exit) for drv_tx_phy_test_exit + drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) for drv_dsi_tx_phy_status_stopstate + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot) for drv_dsi_tx_phy_status_ulpsactivenot + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) for drv_tx_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock) for drv_dsi_tx_phy_status_pll_lock + drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit) refers to drv_dsi_tx.o(i.drv_dsi_tx_version) for drv_dsi_tx_version + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_dsi_tx.o(i.drv_dsi_tx_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_dsi_tx.o(i.drv_tx_phy_test_clear) refers to drv_phy_common.o(i.drv_phy_test_clear) for drv_phy_test_clear + drv_dsi_tx.o(i.drv_tx_phy_test_read) refers to drv_phy_common.o(i.drv_phy_test_read) for drv_phy_test_read + drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_1_byte) for drv_phy_test_write_1_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_2_byte) for drv_phy_test_write_2_byte + drv_dsi_tx.o(i.drv_tx_phy_test_write_code) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_lcdc.o(i.drv_lcdc_config_src_parameter) refers to drv_lcdc.o(i.drv_lcdc_config_input_size) for drv_lcdc_config_input_size + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_lcdc.o(i.drv_lcdc_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_get_status) for drv_memc_get_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_memc.o(i.drv_memc_clear_status) for drv_memc_clear_status + drv_memc.o(i.app_MEMC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_memc.o(i.drv_memc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_ADC_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.app_VPRE_IRQn_Handler) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_EnableIRQ) for __NVIC_EnableIRQ + drv_rxbr.o(i.drv_rxbr_enable_irq) refers to drv_rxbr.o(i.__NVIC_DisableIRQ) for __NVIC_DisableIRQ + drv_rxbr.o(i.drv_rxbr_register_irq0_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_register_irq1_callback) refers to drv_rxbr.o(.data) for .data + drv_rxbr.o(i.drv_rxbr_set_cmd_filter) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + drv_rxbr.o(i.drv_rxbr_soft_reset) refers to drv_crgu.o(i.drv_crgu_set_reset) for drv_crgu_set_reset + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.app_VIDC_IRQn_Handler) refers to drv_vidc.o(.data) for .data + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_vidc.o(i.drv_vidc_enable_irq) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_vidc.o(i.drv_vidc_register_callback) refers to drv_vidc.o(.data) for .data + irq_redirect .o(i.ADC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.AP_NRESET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.DMA_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT4_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT5_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT6_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.EXTI_INT7_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.FLSCTRL_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.HardFault_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.I2C1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.LCDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MEMC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_RX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.MIPI_TX_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.PWMDET_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIM_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SPIS_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SWIRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.SysTick_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER0_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER1_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER2_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.TIMER3_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.UART_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VIDC_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.VPRE_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.WDG_IRQn_Handler) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to irq_redirect .o(.ARM.__AT_0x00070100) for .ARM.__AT_0x00070100 + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_SysTick_Handler) for app_SysTick_Handler + irq_redirect .o(i.handle_init) refers to hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) for app_LCDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) for app_MIPI_RX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) for app_MIPI_TX_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_dma.o(i.app_dma_irq_handler) for app_dma_irq_handler + irq_redirect .o(i.handle_init) refers to norflash.o(i.app_fls_ctrl_Handler) for app_fls_ctrl_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) for app_I2C0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_i2c_master.o(i.app_I2C1_IRQn_Handler) for app_I2C1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to hal_spi_slave.o(i.app_SPIS_IRQn_Handler) for app_SPIS_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_spi_master.o(i.app_SPIM_IRQn_Handler) for app_SPIM_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_VPRE_IRQn_Handler) for app_VPRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_rxbr.o(i.app_ADC_IRQn_Handler) for app_ADC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_vidc.o(i.app_VIDC_IRQn_Handler) for app_VIDC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_memc.o(i.app_MEMC_IRQn_Handler) for app_MEMC_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER0_IRQn_Handler) for app_TIMER0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER1_IRQn_Handler) for app_TIMER1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER2_IRQn_Handler) for app_TIMER2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_timer.o(i.app_TIMER3_IRQn_Handler) for app_TIMER3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_wdg.o(i.app_WDG_IRQn_Handler) for app_WDG_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_uart.o(i.app_UART_IRQn_Handler) for app_UART_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_pwm.o(i.app_PWMDET_IRQn_Handler) for app_PWMDET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_swire.o(i.app_SWIRE_IRQn_Handler) for app_SWIRE_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) for app_AP_NRESET_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) for app_EXTI_INT0_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) for app_EXTI_INT1_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) for app_EXTI_INT2_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) for app_EXTI_INT3_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) for app_EXTI_INT4_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) for app_EXTI_INT5_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) for app_EXTI_INT6_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) for app_EXTI_INT7_IRQn_Handler + irq_redirect .o(i.handle_init) refers to drv_common.o(i.app_HardFault_Handler) for app_HardFault_Handler + drv_efuse.o(i.drv_efuse_enter_inactive) refers to drv_efuse.o(i.drv_efuse_int_enable) for drv_efuse_int_enable + drv_efuse.o(i.drv_efuse_read) refers to drv_efuse.o(i.drv_efuse_read_req) for drv_efuse_read_req + drv_efuse.o(i.drv_efuse_write) refers to drv_efuse.o(i.drv_efuse_write_req) for drv_efuse_write_req + drv_phy_common.o(i.drv_phy_enable_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_chip_info.o(i.drv_chip_info_get_info) for drv_chip_info_get_info + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_phy_common.o(i.drv_phy_get_calibration) refers to drv_phy_common.o(.data) for .data + drv_phy_common.o(i.drv_phy_get_pll_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_get_rate_para) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_phy_common.o(i.drv_phy_get_rate_para) refers to drv_phy_common.o(.constdata) for .constdata + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_1_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_code) for drv_phy_test_write_code + drv_phy_common.o(i.drv_phy_test_write_2_byte) refers to drv_phy_common.o(i.drv_phy_test_write_data) for drv_phy_test_write_data + drv_chip_info.o(i.drv_chip_info_get_info) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_chip_info.o(i.drv_chip_info_init) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_chip_info.o(i.drv_chip_info_init) refers to drv_chip_info.o(.data) for .data + drv_chip_info.o(i.drv_chip_rx_info_check) refers to printfa.o(i.__0printf) for __2printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to tau_log.o(i.LOG_printf) for LOG_printf + drv_chip_info.o(i.drv_chip_rx_info_check) refers to drv_chip_info.o(.data) for .data + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_enter_inactive) for drv_efuse_enter_inactive + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to drv_efuse.o(i.drv_efuse_read) for drv_efuse_read + drv_dsc_dec.o(i.drv_dsc_dec_enable) refers to printfa.o(i.__0printf) for __2printf + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) for __ARM_common_switch8 + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(i.__NVIC_SetPriority) for __NVIC_SetPriority + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + hal_spi_slave.o(i.app_SPIS_IRQn_Handler) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_mode) for hal_gpio_set_mode + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_init_input) for hal_gpio_init_input + hal_spi_slave.o(i.hal_spi_s_set_high_impedance) refers to hal_gpio.o(i.hal_gpio_set_pull_state) for hal_gpio_set_pull_state + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort) refers to drv_spi_dma.o(i.drv_spi_abort_dma) for drv_spi_abort_dma + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_dma.o(i.drv_dma_enable_cycle) for drv_dma_enable_cycle + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to drv_spi_dma.o(i.drv_spis_dma_write) for drv_spis_dma_write + hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_deinit) refers to drv_spi_slave.o(i.drv_spi_s_deinit) for drv_spi_s_deinit + hal_spi_slave.o(i.hal_spi_slave_enable) refers to drv_spi_slave.o(i.drv_spi_s_enable_int) for drv_spi_s_enable_int + hal_spi_slave.o(i.hal_spi_slave_enable) refers to tau_log.o(i.LOG_printf) for LOG_printf + hal_spi_slave.o(i.hal_spi_slave_enable) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_gpio_init) refers to drv_spi_slave.o(i.drv_spi_s_gpio_init) for drv_spi_s_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(i.hal_spi_slave_gpio_init) for hal_spi_slave_gpio_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_slave_init) for drv_spi_slave_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_dma_init) for drv_spi_dma_init + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_dma.o(i.drv_spi_set_dma_irq_callback) for drv_spi_set_dma_irq_callback + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_spi_slave.o(i.drv_spi_s_enable_tx_dma) for drv_spi_s_enable_tx_dma + hal_spi_slave.o(i.hal_spi_slave_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + hal_spi_slave.o(i.hal_spi_slave_init) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_read_data) refers to drv_spi_slave.o(i.drv_spi_s_read_data) for drv_spi_s_read_data + hal_spi_slave.o(i.hal_spi_slave_register_callback) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_reset_tx) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer) refers to hal_spi_slave.o(.bss) for .bss + hal_spi_slave.o(i.hal_spi_slave_write_data) refers to drv_spi_slave.o(i.drv_spi_s_write_data) for drv_spi_s_write_data + drv_fls_dma.o(i.fls_abort_dma) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_abort_dma) refers to drv_fls_dma.o(i.fls_dma_disable) for fls_dma_disable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_set_read) for fls_set_read + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_read_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_clear_irq_status) for fls_clear_irq_status + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_swrst) for fls_swrst + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_set_write) for fls_set_write + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls_dma.o(i.fls_dma_enable) for fls_dma_enable + drv_fls_dma.o(i.fls_dma_write_prepare) refers to drv_fls.o(i.fls_spi_start) for fls_spi_start + drv_fls_dma.o(i.fls_read_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to memseta.o(.text) for __aeabi_memclr4 + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(.data) for .data + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_read_dmacallback) for fls_read_dmacallback + drv_fls_dma.o(i.fls_transfer_create_handle_dma) refers to drv_fls_dma.o(i.fls_write_dmacallback) for fls_write_dmacallback + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_fls_dma.o(i.fls_transfer_dma) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_fls_dma.o(i.fls_transfer_get_receive_count_dma) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_fls_dma.o(i.fls_write_dmacallback) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_spi_slave.o(i.drv_spi_s_deinit) refers to drv_spi_slave.o(i.drv_spi_s_switch_sclk) for drv_spi_s_switch_sclk + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(i.UART_TransferHandleIRQ) for UART_TransferHandleIRQ + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_uart.o(i.UART0_IRQ_Handle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortReceive) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_Disable_IT) for UART_Disable_IT + drv_uart.o(i.UART_AbortSend) refers to drv_uart.o(i.UART_ResetTxFIFO) for UART_ResetTxFIFO + drv_uart.o(i.UART_Deinit) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Disable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_Disable_IT) refers to drv_uart.o(.constdata) for .constdata + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) for drv_sys_cfg_set_dma_rx_req + drv_uart.o(i.UART_EnableDma) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) for drv_sys_cfg_set_dma_tx_req + drv_uart.o(i.UART_Enable_IT) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_Enable_IT) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_GetDefaultConfig) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_GetDefaultConfig) refers to drv_common.o(.data) for g_system_clock + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_GetFIFO_Ctrl) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetRxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_ResetTxFIFO) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_SetBaudRate) refers to uidiv.o(.text) for __aeabi_uidivmod + drv_uart.o(i.UART_SwitchSCLK) refers to drv_crgu.o(i.drv_crgu_set_clock) for drv_crgu_set_clock + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_TransferCreateHandle) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(i.UART_Enable_IT) for UART_Enable_IT + drv_uart.o(i.UART_TransferCreateHandle) refers to drv_uart.o(.data) for .data + drv_uart.o(i.UART_TransferHandleIRQ) refers to drv_uart.o(i.UART_ResetRxFIFO) for UART_ResetRxFIFO + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_DisableDma) for UART_DisableDma + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SwitchSCLK) for UART_SwitchSCLK + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart.o(i.UART_init) refers to drv_uart.o(i.UART_SetBaudRate) for UART_SetBaudRate + drv_uart.o(i.UART_init) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_uart.o(i.UART_init) refers to drv_uart.o(.data) for .data + drv_uart.o(i.app_UART_IRQn_Handler) refers to drv_uart.o(i.UART0_IRQ_Handle) for UART0_IRQ_Handle + drv_uart_dma.o(i.UART_DMAInit) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_DMAInit) refers to drv_dma.o(i.drv_dma_init) for drv_dma_init + drv_uart_dma.o(i.UART_TransferAbortReceiveDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferAbortSendDMA) refers to drv_dma.o(i.drv_dma_abort_transfer) for drv_dma_abort_transfer + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_GetInstance) for UART_GetInstance + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to memseta.o(.text) for __aeabi_memclr4 + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_DMAInit) for UART_DMAInit + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_dma.o(i.drv_dma_set_callback) for drv_dma_set_callback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(.data) for .data + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferReceiveDMACallback) for UART_TransferReceiveDMACallback + drv_uart_dma.o(i.UART_TransferCreateHandleDMA) refers to drv_uart_dma.o(i.UART_TransferSendDMACallback) for UART_TransferSendDMACallback + drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA) refers to drv_dma.o(i.drv_dma_get_remaining_bytes) for drv_dma_get_remaining_bytes + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferReceiveDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_prepar_transfer) for drv_dma_prepar_transfer + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_uart.o(i.UART_EnableDma) for UART_EnableDma + drv_uart_dma.o(i.UART_TransferSendDMA) refers to drv_dma.o(i.drv_dma_start_transfer) for drv_dma_start_transfer + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_set_int) for drv_wdg_set_int + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_counter) for drv_wdg_clear_counter + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_read_edge_flag) for drv_wdg_read_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(i.drv_wdg_clear_edge_flag) for drv_wdg_clear_edge_flag + drv_wdg.o(i.app_WDG_IRQn_Handler) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_register_callback) refers to drv_wdg.o(.data) for .data + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) for drv_sys_cfg_clear_pending + drv_wdg.o(i.drv_wdg_set_int) refers to drv_sys_cfg.o(i.drv_sys_cfg_set_int) for drv_sys_cfg_set_int + drv_wdg.o(i.drv_wdg_set_repeat) refers to drv_wdg.o(.data) for .data + ceil.o(i.__softfp_ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.__softfp_ceil) refers to ceil.o(i.ceil) for ceil + ceil.o(i.ceil) refers (Special) to iusefp.o(.text) for __I$use$fp + ceil.o(i.ceil) refers to dadd.o(.text) for __aeabi_dadd + ceil.o(i.ceil) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + sqrt.o(i.__softfp_sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.__softfp_sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.__softfp_sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt.o(i.sqrt) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt.o(i.sqrt) refers to dsqrt.o(.text) for _dsqrt + sqrt.o(i.sqrt) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.____softfp_sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.____softfp_sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.____softfp_sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + sqrt_x.o(i.__sqrt$lsc) refers (Special) to iusefp.o(.text) for __I$use$fp + sqrt_x.o(i.__sqrt$lsc) refers to cdcmple.o(.text) for __aeabi_cdcmple + sqrt_x.o(i.__sqrt$lsc) refers to errno.o(i.__set_errno) for __set_errno + sqrt_x.o(i.__sqrt$lsc) refers to dsqrt.o(.text) for _dsqrt + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry10a.o(.ARM.Collect$$$$0000000D) for __rt_final_cpp + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry11a.o(.ARM.Collect$$$$0000000F) for __rt_final_exit + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry7b.o(.ARM.Collect$$$$00000008) for _main_clock + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry8b.o(.ARM.Collect$$$$0000000A) for _main_cpp_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry9a.o(.ARM.Collect$$$$0000000B) for _main_init + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry5.o(.ARM.Collect$$$$00000004) for _main_scatterload + entry.o(.ARM.Collect$$$$00000000) refers (Special) to entry2.o(.ARM.Collect$$$$00000001) for _main_stk + idiv.o(.text) refers to uidiv.o(.text) for __aeabi_uidivmod + printfb.o(i.__0fprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0fprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0printf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0printf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0snprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0sprintf$bare) refers to printfb.o(i._sputc) for _sputc + printfb.o(i.__0vfprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vfprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vprintf$bare) refers to tau_log.o(i.fputc) for fputc + printfb.o(i.__0vprintf$bare) refers to stdout.o(.data) for __stdout + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsnprintf$bare) refers to printfb.o(i._snputc) for _snputc + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._printf_core) for _printf_core + printfb.o(i.__0vsprintf$bare) refers to printfb.o(i._sputc) for _sputc + printf0.o(i.__0fprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0fprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0printf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0printf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0snprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0snprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0sprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0sprintf$0) refers to printf0.o(i._sputc) for _sputc + printf0.o(i.__0vfprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vfprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vprintf$0) refers to tau_log.o(i.fputc) for fputc + printf0.o(i.__0vprintf$0) refers to stdout.o(.data) for __stdout + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsnprintf$0) refers to printf0.o(i._snputc) for _snputc + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._printf_core) for _printf_core + printf0.o(i.__0vsprintf$0) refers to printf0.o(i._sputc) for _sputc + printf1.o(i.__0fprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0fprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0printf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0printf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0snprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0snprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0sprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0sprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i.__0vfprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vfprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vprintf$1) refers to tau_log.o(i.fputc) for fputc + printf1.o(i.__0vprintf$1) refers to stdout.o(.data) for __stdout + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsnprintf$1) refers to printf1.o(i._snputc) for _snputc + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._printf_core) for _printf_core + printf1.o(i.__0vsprintf$1) refers to printf1.o(i._sputc) for _sputc + printf1.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf2.o(i.__0fprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0fprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0printf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0printf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0snprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0snprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0sprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0sprintf$2) refers to printf2.o(i._sputc) for _sputc + printf2.o(i.__0vfprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vfprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vprintf$2) refers to tau_log.o(i.fputc) for fputc + printf2.o(i.__0vprintf$2) refers to stdout.o(.data) for __stdout + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsnprintf$2) refers to printf2.o(i._snputc) for _snputc + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._printf_core) for _printf_core + printf2.o(i.__0vsprintf$2) refers to printf2.o(i._sputc) for _sputc + printf3.o(i.__0fprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0fprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0printf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0printf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0snprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0snprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0sprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0sprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i.__0vfprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vfprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vprintf$3) refers to tau_log.o(i.fputc) for fputc + printf3.o(i.__0vprintf$3) refers to stdout.o(.data) for __stdout + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsnprintf$3) refers to printf3.o(i._snputc) for _snputc + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._printf_core) for _printf_core + printf3.o(i.__0vsprintf$3) refers to printf3.o(i._sputc) for _sputc + printf3.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf4.o(i.__0fprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0fprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0printf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0printf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0snprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0snprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0sprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0sprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i.__0vfprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vfprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vprintf$4) refers to tau_log.o(i.fputc) for fputc + printf4.o(i.__0vprintf$4) refers to stdout.o(.data) for __stdout + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsnprintf$4) refers to printf4.o(i._snputc) for _snputc + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._printf_core) for _printf_core + printf4.o(i.__0vsprintf$4) refers to printf4.o(i._sputc) for _sputc + printf4.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf5.o(i.__0fprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0fprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0printf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0printf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0snprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0snprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0sprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0sprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i.__0vfprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vfprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vprintf$5) refers to tau_log.o(i.fputc) for fputc + printf5.o(i.__0vprintf$5) refers to stdout.o(.data) for __stdout + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsnprintf$5) refers to printf5.o(i._snputc) for _snputc + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._printf_core) for _printf_core + printf5.o(i.__0vsprintf$5) refers to printf5.o(i._sputc) for _sputc + printf5.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf6.o(i.__0fprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0fprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0printf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0printf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0snprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0snprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0sprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0sprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i.__0vfprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vfprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vprintf$6) refers to tau_log.o(i.fputc) for fputc + printf6.o(i.__0vprintf$6) refers to stdout.o(.data) for __stdout + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsnprintf$6) refers to printf6.o(i._snputc) for _snputc + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._printf_core) for _printf_core + printf6.o(i.__0vsprintf$6) refers to printf6.o(i._sputc) for _sputc + printf6.o(i._printf_core) refers to printf6.o(i._printf_pre_padding) for _printf_pre_padding + printf6.o(i._printf_core) refers to printf6.o(i._printf_post_padding) for _printf_post_padding + printf6.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printf7.o(i.__0fprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0fprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0printf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0printf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0snprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0snprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0sprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0sprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i.__0vfprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vfprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vprintf$7) refers to tau_log.o(i.fputc) for fputc + printf7.o(i.__0vprintf$7) refers to stdout.o(.data) for __stdout + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsnprintf$7) refers to printf7.o(i._snputc) for _snputc + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._printf_core) for _printf_core + printf7.o(i.__0vsprintf$7) refers to printf7.o(i._sputc) for _sputc + printf7.o(i._printf_core) refers to printf7.o(i._printf_pre_padding) for _printf_pre_padding + printf7.o(i._printf_core) refers to printf7.o(i._printf_post_padding) for _printf_post_padding + printf7.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printf8.o(i.__0fprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0fprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0printf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0printf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0snprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0snprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0sprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0sprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i.__0vfprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vfprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vprintf$8) refers to tau_log.o(i.fputc) for fputc + printf8.o(i.__0vprintf$8) refers to stdout.o(.data) for __stdout + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsnprintf$8) refers to printf8.o(i._snputc) for _snputc + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._printf_core) for _printf_core + printf8.o(i.__0vsprintf$8) refers to printf8.o(i._sputc) for _sputc + printf8.o(i._printf_core) refers to printf8.o(i._printf_pre_padding) for _printf_pre_padding + printf8.o(i._printf_core) refers to printf8.o(i._printf_post_padding) for _printf_post_padding + printf8.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i.__0fprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0fprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0fprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0printf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0printf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0printf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0snprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0snprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0snprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0sprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0sprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0sprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i.__0vfprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vfprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vfprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vprintf) refers to tau_log.o(i.fputc) for fputc + printfa.o(i.__0vprintf) refers to stdout.o(.data) for __stdout + printfa.o(i.__0vsnprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsnprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsnprintf) refers to printfa.o(i._snputc) for _snputc + printfa.o(i.__0vsprintf) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i.__0vsprintf) refers to printfa.o(i._printf_core) for _printf_core + printfa.o(i.__0vsprintf) refers to printfa.o(i._sputc) for _sputc + printfa.o(i._fp_digits) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._fp_digits) refers to dmul.o(.text) for __aeabi_dmul + printfa.o(i._fp_digits) refers to ddiv.o(.text) for __aeabi_ddiv + printfa.o(i._fp_digits) refers to cdrcmple.o(.text) for __aeabi_cdrcmple + printfa.o(i._fp_digits) refers to dadd.o(.text) for __aeabi_dadd + printfa.o(i._fp_digits) refers to dfixul.o(.text) for __aeabi_d2ulz + printfa.o(i._fp_digits) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_core) refers to printfa.o(i._printf_pre_padding) for _printf_pre_padding + printfa.o(i._printf_core) refers to uldiv.o(.text) for __aeabi_uldivmod + printfa.o(i._printf_core) refers to printfa.o(i._printf_post_padding) for _printf_post_padding + printfa.o(i._printf_core) refers to printfa.o(i._fp_digits) for _fp_digits + printfa.o(i._printf_core) refers to uidiv.o(.text) for __aeabi_uidivmod + printfa.o(i._printf_post_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._printf_pre_padding) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._snputc) refers (Special) to iusefp.o(.text) for __I$use$fp + printfa.o(i._sputc) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fadd.o(.text) refers to fepilogue.o(.text) for _float_epilogue + fmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fdiv.o(.text) refers to fepilogue.o(.text) for _float_round + fscalb.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dadd.o(.text) refers to llshl.o(.text) for __aeabi_llsl + dadd.o(.text) refers to llsshr.o(.text) for __aeabi_lasr + dadd.o(.text) refers to depilogue.o(.text) for _double_epilogue + dmul.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dmul.o(.text) refers to depilogue.o(.text) for _double_epilogue + ddiv.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ddiv.o(.text) refers to depilogue.o(.text) for _double_round + fflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + fflti.o(.text) refers to fepilogue.o(.text) for _float_epilogue + ffltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffltui.o(.text) refers to fepilogue.o(.text) for _float_epilogue + dflti.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dflti.o(.text) refers to depilogue.o(.text) for _double_epilogue + dfltui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfltui.o(.text) refers to depilogue.o(.text) for _double_epilogue + ffixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + ffixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixi.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixui.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + dfixui.o(.text) refers to llushr.o(.text) for __aeabi_llsr + f2d.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cdcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + cfrcmple.o(.text) refers (Special) to iusefp.o(.text) for __I$use$fp + entry2.o(.ARM.Collect$$$$00000001) refers to entry2.o(.ARM.Collect$$$$00002712) for __lit__00000000 + entry2.o(.ARM.Collect$$$$00002712) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to startup_armcm0.o(STACK) for __initial_sp + entry2.o(__vectab_stack_and_reset_area) refers to entry.o(.ARM.Collect$$$$00000000) for __main + entry5.o(.ARM.Collect$$$$00000004) refers to init.o(.text) for __scatterload + entry9a.o(.ARM.Collect$$$$0000000B) refers to main.o(i.main) for main + entry9b.o(.ARM.Collect$$$$0000000C) refers to main.o(i.main) for main + uldiv.o(.text) refers to llushr.o(.text) for __aeabi_llsr + uldiv.o(.text) refers to llshl.o(.text) for __aeabi_llsl + errno.o(i.__aeabi_errno_addr) refers to errno.o(.data) for .data + errno.o(i.__read_errno) refers to errno.o(.data) for .data + errno.o(i.__set_errno) refers to errno.o(.data) for .data + depilogue.o(.text) refers to depilogue.o(i.__ARM_clz) for __ARM_clz + depilogue.o(.text) refers to llshl.o(.text) for __aeabi_llsl + depilogue.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dsqrt.o(.text) refers to depilogue.o(.text) for _double_round + dfixul.o(.text) refers to llushr.o(.text) for __aeabi_llsr + dfixul.o(.text) refers to llshl.o(.text) for __aeabi_llsl + init.o(.text) refers to entry5.o(.ARM.Collect$$$$00000004) for __main_after_scatterload + + +============================================================================== + +Removing Unused input sections from the image. + + Removing main.o(.rev16_text), (4 bytes). + Removing main.o(.revsh_text), (4 bytes). + Removing ap_demo.o(.rev16_text), (4 bytes). + Removing ap_demo.o(.revsh_text), (4 bytes). + Removing ap_demo.o(i.PWM_OUTPUT_TEST), (44 bytes). + Removing ap_demo.o(i.PWM_Task), (108 bytes). + Removing ap_demo.o(i.test_pwm_out_adjust), (104 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing ap_demo.o(.data), (2 bytes). + Removing app_tp_transfer.o(.rev16_text), (4 bytes). + Removing app_tp_transfer.o(.revsh_text), (4 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_clear_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_phone_reset_on), (12 bytes). + Removing app_tp_transfer.o(i.app_tp_s_transfer_complate), (26 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (5 bytes). + Removing app_tp_transfer.o(.data), (6 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (3 bytes). + Removing app_tp_transfer.o(.data), (1 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_transfer.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.rev16_text), (4 bytes). + Removing app_tp_for_custom_s8.o(.revsh_text), (4 bytes). + Removing app_tp_for_custom_s8.o(i.app_tp_screen_analysis_const), (56 bytes). + Removing app_tp_for_custom_s8.o(.bss), (200 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (16 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (2 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (4 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (6 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (3 bytes). + Removing app_tp_for_custom_s8.o(.constdata), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (11 bytes). + Removing app_tp_for_custom_s8.o(.data), (10 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (64 bytes). + Removing app_tp_for_custom_s8.o(.data), (3 bytes). + Removing app_tp_for_custom_s8.o(.data), (2 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing app_tp_for_custom_s8.o(.data), (32 bytes). + Removing app_tp_for_custom_s8.o(.data), (1 bytes). + Removing board.o(.rev16_text), (4 bytes). + Removing board.o(.revsh_text), (4 bytes). + Removing startup_armcm0.o(HEAP), (3072 bytes). + Removing hal_dsi_rx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_long_cmd), (88 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_ack_short_cmd), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_crop_video), (228 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_draw_mode_init), (48 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_enable_test_pattern), (216 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_hight_performan_mode), (100 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_pre_init_pps), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_release_handle), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_restart), (80 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_auto_hw_filter), (28 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_esc_clk), (44 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_dcs_direct_mode), (8 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_cmd_filter), (40 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_hw_tear_mode), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pentile_format), (56 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_pixel_data), (148 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rect_pixel_data), (268 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rx_clk), (68 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_te_waveform), (52 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_input_frame_rate), (10 bytes). + Removing hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution), (32 bytes). + Removing hal_dsi_tx_ctrl.o(.rev16_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(.revsh_text), (4 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_crop_pic), (148 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_cmd_mode_rcv_te), (10 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_chessboard), (280 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_flicker), (172 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_draw_mode_init), (30 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_ulps_mode), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_release_handle), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_cus_pq_filter), (28 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_endianness), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_escape_clock_div), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_lp_cmd), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite), (16 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_rect_pixel_data), (272 bytes). + Removing hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_vpg), (80 bytes). + Removing hal_gpio.o(.rev16_text), (4 bytes). + Removing hal_gpio.o(.revsh_text), (4 bytes). + Removing hal_gpio.o(i.hal_gpio_get_int_type), (20 bytes). + Removing hal_gpio.o(i.hal_gpio_get_pull_state), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_driving_strength), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_output_data_ex), (36 bytes). + Removing hal_gpio.o(i.hal_gpio_set_schmitt_trigger), (32 bytes). + Removing hal_gpio.o(i.hal_gpio_set_slew_rate), (32 bytes). + Removing hal_i2c_master.o(.rev16_text), (4 bytes). + Removing hal_i2c_master.o(.revsh_text), (4 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_deinit), (8 bytes). + Removing hal_i2c_master.o(i.hal_i2c_m_set_high_impedance), (46 bytes). + Removing hal_i2c_slave.o(.rev16_text), (4 bytes). + Removing hal_i2c_slave.o(.revsh_text), (4 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_deinit), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_get_tx_byte_num), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_complate_clear), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_read_data), (32 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_rxfifo_notempty), (40 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_sel), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_dma_tx_cycle), (36 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_set_high_impedance), (88 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_complate), (12 bytes). + Removing hal_i2c_slave.o(i.hal_i2c_s_write_data), (32 bytes). + Removing hal_pwm.o(.rev16_text), (4 bytes). + Removing hal_pwm.o(.revsh_text), (4 bytes). + Removing hal_pwm.o(i.hal_pwm_in_clear_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_config_int), (60 bytes). + Removing hal_pwm.o(i.hal_pwm_in_ctrl_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_deinit), (18 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_current_count), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_high_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_low_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_get_total_period), (36 bytes). + Removing hal_pwm.o(i.hal_pwm_in_init), (26 bytes). + Removing hal_pwm.o(i.hal_pwm_in_register_callback), (10 bytes). + Removing hal_pwm.o(i.hal_pwm_in_set_int), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_common_config), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_config_all), (16 bytes). + Removing hal_pwm.o(i.hal_pwm_out_config_duty_ratio), (76 bytes). + Removing hal_pwm.o(i.hal_pwm_out_convert_time), (136 bytes). + Removing hal_pwm.o(i.hal_pwm_out_deinit), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_init), (12 bytes). + Removing hal_pwm.o(i.hal_pwm_out_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sel_io), (38 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_all), (16 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_ctl), (12 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_pause), (8 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_period), (32 bytes). + Removing hal_pwm.o(i.hal_pwm_out_sync_thr), (48 bytes). + Removing hal_pwm.o(.data), (1 bytes). + Removing hal_spi_master.o(.rev16_text), (4 bytes). + Removing hal_spi_master.o(.revsh_text), (4 bytes). + Removing hal_spi_master.o(i.hal_spi_m_callback), (24 bytes). + Removing hal_spi_master.o(i.hal_spi_m_deinit), (10 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_init), (104 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_read), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_dma_write), (40 bytes). + Removing hal_spi_master.o(i.hal_spi_m_get_transfer_complate), (36 bytes). + Removing hal_spi_master.o(i.hal_spi_m_gpio_init), (8 bytes). + Removing hal_spi_master.o(i.hal_spi_m_read_rxfifo), (28 bytes). + Removing hal_spi_master.o(i.hal_spi_m_set_high_impedance), (100 bytes). + Removing hal_spi_master.o(.data), (1 bytes). + Removing hal_swire.o(.rev16_text), (4 bytes). + Removing hal_swire.o(.revsh_text), (4 bytes). + Removing hal_swire.o(i.hal_swire_init), (32 bytes). + Removing hal_swire.o(i.hal_swire_register_callback), (10 bytes). + Removing hal_swire.o(i.hal_swire_start), (108 bytes). + Removing hal_system.o(.rev16_text), (4 bytes). + Removing hal_system.o(.revsh_text), (4 bytes). + Removing hal_system.o(i.hal_system_clear_debug_state), (10 bytes). + Removing hal_system.o(i.hal_system_deep_sleep_mode), (8 bytes). + Removing hal_system.o(i.hal_system_disable_systick), (8 bytes). + Removing hal_system.o(i.hal_system_flash_power_down), (20 bytes). + Removing hal_system.o(i.hal_system_flash_read), (52 bytes). + Removing hal_system.o(i.hal_system_flash_release_power_down), (20 bytes). + Removing hal_system.o(i.hal_system_flash_write), (60 bytes). + Removing hal_system.o(i.hal_system_get_debug_state), (8 bytes). + Removing hal_system.o(i.hal_system_get_tick), (8 bytes). + Removing hal_system.o(i.hal_system_idle_mode), (8 bytes). + Removing hal_system.o(i.hal_system_register_systick_cb), (8 bytes). + Removing hal_system.o(i.hal_system_reset_chip), (32 bytes). + Removing hal_system.o(i.hal_system_share_flash_mode), (20 bytes). + Removing hal_system.o(i.hal_system_sleep_mode), (48 bytes). + Removing hal_timer.o(.rev16_text), (4 bytes). + Removing hal_timer.o(.revsh_text), (4 bytes). + Removing hal_timer.o(i.hal_timer_get_status), (8 bytes). + Removing hal_timer.o(i.hal_timer_set_repeat), (8 bytes). + Removing hal_timer.o(i.hal_timer_start_ex), (72 bytes). + Removing tau_delay.o(.rev16_text), (4 bytes). + Removing tau_delay.o(.revsh_text), (4 bytes). + Removing tau_log.o(.rev16_text), (4 bytes). + Removing tau_log.o(.revsh_text), (4 bytes). + Removing tau_log.o(i.fgetc), (22 bytes). + Removing hal_uart.o(.rev16_text), (4 bytes). + Removing hal_uart.o(.revsh_text), (4 bytes). + Removing hal_uart.o(i.hal_uart_deinit), (28 bytes). + Removing hal_uart.o(i.hal_uart_dmacallback), (36 bytes). + Removing hal_uart.o(i.hal_uart_receive_blocking), (16 bytes). + Removing hal_uart.o(i.hal_uart_receive_dma), (76 bytes). + Removing hal_uart.o(i.hal_uart_transmit_dma), (76 bytes). + Removing norflash.o(.rev16_text), (4 bytes). + Removing norflash.o(.revsh_text), (4 bytes). + Removing norflash.o(i.norflash_best_cfg_init), (44 bytes). + Removing norflash.o(i.norflash_big_end_clear), (14 bytes). + Removing norflash.o(i.norflash_big_end_enable), (20 bytes). + Removing norflash.o(i.norflash_check_crc32), (14 bytes). + Removing norflash.o(i.norflash_check_id), (72 bytes). + Removing norflash.o(i.norflash_dma_callback), (24 bytes). + Removing norflash.o(i.norflash_dma_read), (156 bytes). + Removing norflash.o(i.norflash_dma_write), (252 bytes). + Removing norflash.o(i.norflash_dual_read), (60 bytes). + Removing norflash.o(i.norflash_dual_write), (112 bytes). + Removing norflash.o(i.norflash_en4b), (40 bytes). + Removing norflash.o(i.norflash_en_quad), (116 bytes). + Removing norflash.o(i.norflash_en_quad_check), (64 bytes). + Removing norflash.o(i.norflash_erase_block), (44 bytes). + Removing norflash.o(i.norflash_erase_chip), (28 bytes). + Removing norflash.o(i.norflash_erase_sector), (44 bytes). + Removing norflash.o(i.norflash_ex4b), (40 bytes). + Removing norflash.o(i.norflash_exit_quad), (76 bytes). + Removing norflash.o(i.norflash_get_dual_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_hstatus), (52 bytes). + Removing norflash.o(i.norflash_get_status), (52 bytes). + Removing norflash.o(i.norflash_init), (48 bytes). + Removing norflash.o(i.norflash_quad_read), (76 bytes). + Removing norflash.o(i.norflash_quad_write), (108 bytes). + Removing norflash.o(i.norflash_read), (28 bytes). + Removing norflash.o(i.norflash_read_config_reg), (36 bytes). + Removing norflash.o(i.norflash_read_id), (20 bytes). + Removing norflash.o(i.norflash_reset), (2 bytes). + Removing norflash.o(i.norflash_reset_crc32), (32 bytes). + Removing norflash.o(i.norflash_set_best_cfg), (50 bytes). + Removing norflash.o(i.norflash_set_best_read_cfg), (84 bytes). + Removing norflash.o(i.norflash_set_best_write_cfg), (84 bytes). + Removing norflash.o(i.norflash_switch_fls_spi), (112 bytes). + Removing norflash.o(i.norflash_write), (96 bytes). + Removing norflash.o(i.norflash_write_disable), (64 bytes). + Removing norflash.o(i.norflash_write_enable), (56 bytes). + Removing norflash.o(i.norflash_write_endian_scr), (132 bytes). + Removing norflash.o(.bss), (412 bytes). + Removing norflash.o(.bss), (32 bytes). + Removing norflash.o(.data), (2 bytes). + Removing drv_common.o(.rev16_text), (4 bytes). + Removing drv_common.o(.revsh_text), (4 bytes). + Removing drv_common.o(i.drv_common_disable_systick), (20 bytes). + Removing drv_common.o(i.drv_common_get_tick), (12 bytes). + Removing drv_common.o(i.drv_common_idle_mode), (40 bytes). + Removing drv_common.o(i.drv_common_systick_register_cb), (12 bytes). + Removing drv_crgu.o(.rev16_text), (4 bytes). + Removing drv_crgu.o(.revsh_text), (4 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_all_reset_flags), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_clear_reset_flag), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_div), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_config_clocks_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_ana_clk_status), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_clocks), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_fpga_id), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_get_mipi_ref_src), (16 bytes). + Removing drv_crgu.o(i.drv_crgu_get_reset_flag), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_get_system_clk), (28 bytes). + Removing drv_crgu.o(i.drv_crgu_reset_chip), (12 bytes). + Removing drv_crgu.o(i.drv_crgu_set_200m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_300m_scan_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_abp0_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_adc_src), (24 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb1_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_apb2_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_fls_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_div), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_monitor_src), (20 bytes). + Removing drv_crgu.o(i.drv_crgu_set_swire_div), (20 bytes). + Removing drv_dma.o(.rev16_text), (4 bytes). + Removing drv_dma.o(.revsh_text), (4 bytes). + Removing drv_dma.o(i.drv_dma_abort_transfer), (32 bytes). + Removing drv_dma.o(i.drv_dma_ahb_init), (74 bytes). + Removing drv_dma.o(i.drv_dma_channel_is_active), (20 bytes). + Removing drv_dma.o(i.drv_dma_deinit), (32 bytes). + Removing drv_dma.o(i.drv_dma_disenable_channel_interrupts), (24 bytes). + Removing drv_dma.o(i.drv_dma_enable_cycle), (44 bytes). + Removing drv_dma.o(i.drv_dma_get_remaining_bytes), (32 bytes). + Removing drv_dma.o(i.drv_dma_init), (24 bytes). + Removing drv_dma.o(i.drv_dma_m2m_init), (72 bytes). + Removing drv_dma.o(i.drv_dma_reset), (10 bytes). + Removing drv_dma.o(i.drv_dma_set_ccr), (114 bytes). + Removing drv_dma.o(i.drv_dma_start_transfer), (32 bytes). + Removing drv_fls.o(.rev16_text), (4 bytes). + Removing drv_fls.o(.revsh_text), (4 bytes). + Removing drv_fls.o(i.__NVIC_DisableIRQ), (32 bytes). + Removing drv_fls.o(i.drv_fls_gpio_connect), (28 bytes). + Removing drv_fls.o(i.drv_fls_gpio_disconnect), (32 bytes). + Removing drv_fls.o(i.fls_EnableClk), (12 bytes). + Removing drv_fls.o(i.fls_busy_pending), (12 bytes). + Removing drv_fls.o(i.fls_clear_irq_status), (6 bytes). + Removing drv_fls.o(i.fls_ctrl_cfg_init), (72 bytes). + Removing drv_fls.o(i.fls_ddat_enable), (24 bytes). + Removing drv_fls.o(i.fls_de_init), (52 bytes). + Removing drv_fls.o(i.fls_descr), (10 bytes). + Removing drv_fls.o(i.fls_disable_it), (36 bytes). + Removing drv_fls.o(i.fls_en_scr), (10 bytes). + Removing drv_fls.o(i.fls_enable_it), (48 bytes). + Removing drv_fls.o(i.fls_get_crcout), (4 bytes). + Removing drv_fls.o(i.fls_get_default_fls_config), (20 bytes). + Removing drv_fls.o(i.fls_get_default_spi_config), (44 bytes). + Removing drv_fls.o(i.fls_get_default_tuning), (12 bytes). + Removing drv_fls.o(i.fls_get_tuning), (18 bytes). + Removing drv_fls.o(i.fls_init), (62 bytes). + Removing drv_fls.o(i.fls_qadr_enable), (22 bytes). + Removing drv_fls.o(i.fls_qcmd_enable), (22 bytes). + Removing drv_fls.o(i.fls_qdat_enable), (22 bytes). + Removing drv_fls.o(i.fls_read_byte_data), (130 bytes). + Removing drv_fls.o(i.fls_read_cmd), (104 bytes). + Removing drv_fls.o(i.fls_read_cmd_it), (110 bytes). + Removing drv_fls.o(i.fls_reset_crc), (18 bytes). + Removing drv_fls.o(i.fls_scr_clear), (10 bytes). + Removing drv_fls.o(i.fls_set_addr_dummy), (32 bytes). + Removing drv_fls.o(i.fls_set_addr_len), (32 bytes). + Removing drv_fls.o(i.fls_set_mc_irq_mask), (26 bytes). + Removing drv_fls.o(i.fls_set_read), (10 bytes). + Removing drv_fls.o(i.fls_set_tuning), (24 bytes). + Removing drv_fls.o(i.fls_set_write), (10 bytes). + Removing drv_fls.o(i.fls_single_mode), (16 bytes). + Removing drv_fls.o(i.fls_spi_init), (180 bytes). + Removing drv_fls.o(i.fls_spi_start), (10 bytes). + Removing drv_fls.o(i.fls_swrst), (18 bytes). + Removing drv_fls.o(i.fls_write_byte_data), (164 bytes). + Removing drv_fls.o(i.fls_write_cmd), (58 bytes). + Removing drv_fls.o(.data), (4 bytes). + Removing drv_gpio.o(.rev16_text), (4 bytes). + Removing drv_gpio.o(.revsh_text), (4 bytes). + Removing drv_gpio.o(i.drv_gpio_get_pull_state), (224 bytes). + Removing drv_gpio.o(i.drv_gpio_set_driving_strength), (312 bytes). + Removing drv_gpio.o(i.drv_gpio_set_schmitt_trigger), (168 bytes). + Removing drv_gpio.o(i.drv_gpio_set_slew_rate), (168 bytes). + Removing drv_i2c_dma.o(.rev16_text), (4 bytes). + Removing drv_i2c_dma.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(.rev16_text), (4 bytes). + Removing drv_i2c_master.o(.revsh_text), (4 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_bus_init), (36 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_deinit), (44 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_disable_intr), (16 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_get_fifo_status), (28 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_read_data), (32 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_fifo_threshold), (24 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_set_sys_mask), (48 bytes). + Removing drv_i2c_master.o(i.drv_i2c_m_write_data), (32 bytes). + Removing drv_i2c_slave.o(.rev16_text), (4 bytes). + Removing drv_i2c_slave.o(.revsh_text), (4 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_read_data), (30 bytes). + Removing drv_i2c_slave.o(i.drv_i2c_s_set_fifo_threshold), (16 bytes). + Removing drv_param_init.o(.rev16_text), (4 bytes). + Removing drv_param_init.o(.revsh_text), (4 bytes). + Removing drv_param_init.o(i.drv_param_init_set_sclu_filter), (28 bytes). + Removing drv_pwm.o(.rev16_text), (4 bytes). + Removing drv_pwm.o(.revsh_text), (4 bytes). + Removing drv_pwm.o(i.drv_pwm_in_clear_pwm_int_all), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_counter_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_current_count), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_high_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_get_low_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_in_register_callback), (24 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_pwm_int), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_in_set_sys_int), (64 bytes). + Removing drv_pwm.o(i.drv_pwm_out_enable), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_get_sync_flag), (16 bytes). + Removing drv_pwm.o(i.drv_pwm_out_pause), (28 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_control), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_period), (12 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_sync_mode), (32 bytes). + Removing drv_pwm.o(i.drv_pwm_out_set_threshold), (12 bytes). + Removing drv_pwr.o(.rev16_text), (4 bytes). + Removing drv_pwr.o(.revsh_text), (4 bytes). + Removing drv_pwr.o(i.drv_pwr_enter_deep_sleep_mode), (44 bytes). + Removing drv_pwr.o(i.drv_pwr_set_frame_buff_pd), (28 bytes). + Removing drv_spi_dma.o(.rev16_text), (4 bytes). + Removing drv_spi_dma.o(.revsh_text), (4 bytes). + Removing drv_spi_dma.o(i.__NVIC_ClearPendingIRQ), (24 bytes). + Removing drv_spi_dma.o(i.drv_spi_abort_dma), (108 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_callback), (60 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_ch6_init), (208 bytes). + Removing drv_spi_dma.o(i.drv_spi_dma_init), (220 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_ch6_irq_callback), (48 bytes). + Removing drv_spi_dma.o(i.drv_spi_set_dma_irq_callback), (88 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_read), (96 bytes). + Removing drv_spi_dma.o(i.drv_spim_dma_write), (60 bytes). + Removing drv_spi_dma.o(i.drv_spis_dma_write), (72 bytes). + Removing drv_spi_dma.o(.bss), (480 bytes). + Removing drv_spi_dma.o(.data), (16 bytes). + Removing drv_spi_master.o(.rev16_text), (4 bytes). + Removing drv_spi_master.o(.revsh_text), (4 bytes). + Removing drv_spi_master.o(i.drv_spi_m_deinit), (40 bytes). + Removing drv_spi_master.o(i.drv_spi_m_disable_int), (68 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_int), (72 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_rx_dma), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_enable_tx_dma), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_get_dma_address), (8 bytes). + Removing drv_spi_master.o(i.drv_spi_m_gpio_init), (32 bytes). + Removing drv_spi_master.o(i.drv_spi_m_set_intr_callback), (12 bytes). + Removing drv_spi_master.o(i.drv_spi_m_switch_sclk), (28 bytes). + Removing drv_spi_master.o(i.drv_spi_m_write_data), (44 bytes). + Removing drv_spi_master.o(i.drv_spi_master_init), (164 bytes). + Removing drv_swire.o(.rev16_text), (4 bytes). + Removing drv_swire.o(.revsh_text), (4 bytes). + Removing drv_swire.o(i.drv_swire_register_callback), (12 bytes). + Removing drv_swire.o(i.drv_swire_set_bit_time), (24 bytes). + Removing drv_swire.o(i.drv_swire_set_pulse_count), (12 bytes). + Removing drv_sys_cfg.o(.rev16_text), (4 bytes). + Removing drv_sys_cfg.o(.revsh_text), (4 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_dma_req_mask), (32 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_read_version0_id), (12 bytes). + Removing drv_sys_cfg.o(i.drv_sys_cfg_set_ap_reset), (28 bytes). + Removing drv_timer.o(.rev16_text), (4 bytes). + Removing drv_timer.o(.revsh_text), (4 bytes). + Removing drv_timer.o(i.drv_timer_get_status), (38 bytes). + Removing hal_internal_vsync.o(.rev16_text), (4 bytes). + Removing hal_internal_vsync.o(.revsh_text), (4 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_cmd_mode_rcv_te), (168 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change), (556 bytes). + Removing hal_internal_vsync.o(i.hal_internal_sync_set_fb_setting_manual), (528 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_set_dcs_direct_mode), (48 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_toggle_input_frame_rate), (560 bytes). + Removing hal_internal_vsync.o(i.hal_internal_vsync_update_lcdc_addr), (48 bytes). + Removing dcs_packet_fifo.o(i.dcs_packet_get_fifo_size), (16 bytes). + Removing drv_dsi_rx.o(.rev16_text), (4 bytes). + Removing drv_dsi_rx.o(.revsh_text), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_phy_stopstate), (66 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_get_version), (4 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_phy_resistor_calibration), (236 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_pg_cfg), (32 bytes). + Removing drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_pg_cfg), (48 bytes). + Removing drv_dsi_rx.o(i.drv_rx_phy_test_read), (12 bytes). + Removing drv_dsi_tx.o(.rev16_text), (4 bytes). + Removing drv_dsi_tx.o(.revsh_text), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_force_interrupt), (8 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_get_phy_status), (6 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_forcepll), (12 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_resistor_calibration), (232 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_start), (18 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_pll_lock), (10 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ulpsactivenot), (62 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_trigger), (92 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_enter), (344 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_phy_ulps_exit), (276 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_sdf_3d), (28 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_bta), (22 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_set_vpg), (70 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_version), (4 bytes). + Removing drv_dsi_tx.o(i.drv_dsi_tx_vid_shadow), (16 bytes). + Removing drv_dsi_tx.o(i.drv_tx_phy_test_read), (10 bytes). + Removing drv_lcdc.o(.rev16_text), (4 bytes). + Removing drv_lcdc.o(.revsh_text), (4 bytes). + Removing drv_lcdc.o(i.drv_lcdc_config_rgb_to_pentile), (6 bytes). + Removing drv_lcdc.o(i.drv_lcdc_enable), (42 bytes). + Removing drv_lcdc.o(i.drv_lcdc_set_prefetch), (24 bytes). + Removing drv_lcdc.o(i.drv_lcdc_update_shadow_reg), (12 bytes). + Removing drv_memc.o(.rev16_text), (4 bytes). + Removing drv_memc.o(.revsh_text), (4 bytes). + Removing drv_memc.o(i.drv_memc_set_db_frm_time), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_db_int_frame), (28 bytes). + Removing drv_memc.o(i.drv_memc_set_fb_remaining_line_trigger), (12 bytes). + Removing drv_memc.o(i.drv_memc_set_read_trigger_line), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_te_ind), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_tear_hwclr), (16 bytes). + Removing drv_memc.o(i.drv_memc_set_vidc_fb_arb), (14 bytes). + Removing drv_memc.o(i.drv_memc_set_write_trigger_line), (16 bytes). + Removing drv_rxbr.o(.rev16_text), (4 bytes). + Removing drv_rxbr.o(.revsh_text), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_dsc_flush), (16 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_cur_hline_rcv_cnt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_ipi_vsync_interval), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_get_pix_fmt), (8 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_col_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_compress), (24 bytes). + Removing drv_rxbr.o(i.drv_rxbr_set_page_addr), (4 bytes). + Removing drv_rxbr.o(i.drv_rxbr_soft_reset), (98 bytes). + Removing drv_vidc.o(.rev16_text), (4 bytes). + Removing drv_vidc.o(.revsh_text), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_clear_status0), (14 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_cap_pixel), (24 bytes). + Removing drv_vidc.o(i.drv_vidc_debug_signal_frame), (30 bytes). + Removing drv_vidc.o(i.drv_vidc_get_int_source), (38 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status0), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status1), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_get_status2), (6 bytes). + Removing drv_vidc.o(i.drv_vidc_set_dsc_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_frmst_latency), (12 bytes). + Removing drv_vidc.o(i.drv_vidc_set_inff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_set_irq_line), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_module_enable), (20 bytes). + Removing drv_vidc.o(i.drv_vidc_set_outff_thresh), (4 bytes). + Removing drv_vidc.o(i.drv_vidc_update_src_format), (14 bytes). + Removing irq_redirect .o(.rev16_text), (4 bytes). + Removing irq_redirect .o(.revsh_text), (4 bytes). + Removing drv_efuse.o(.rev16_text), (4 bytes). + Removing drv_efuse.o(.revsh_text), (4 bytes). + Removing drv_efuse.o(i.drv_efuse_crc_cal), (128 bytes). + Removing drv_efuse.o(i.drv_efuse_get_default_config), (26 bytes). + Removing drv_efuse.o(i.drv_efuse_int_disable), (12 bytes). + Removing drv_efuse.o(i.drv_efuse_write), (46 bytes). + Removing drv_efuse.o(i.drv_efuse_write_req), (22 bytes). + Removing drv_phy_common.o(.rev16_text), (4 bytes). + Removing drv_phy_common.o(.revsh_text), (4 bytes). + Removing drv_phy_common.o(i.drv_phy_test_read), (8 bytes). + Removing drv_chip_info.o(.rev16_text), (4 bytes). + Removing drv_chip_info.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(.rev16_text), (4 bytes). + Removing drv_dsc_dec.o(.revsh_text), (4 bytes). + Removing drv_dsc_dec.o(i.drv_dsc_dec_set_u32_pps), (120 bytes). + Removing hal_spi_slave.o(.rev16_text), (4 bytes). + Removing hal_spi_slave.o(.revsh_text), (4 bytes). + Removing hal_spi_slave.o(i.hal_spi_s_set_high_impedance), (100 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_abort), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_auto_transfer_start), (56 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_busy), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_deinit), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_disable), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_enable), (96 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_flush_fifo), (20 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_get_rxfifo_notempty), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_gpio_init), (8 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_init), (76 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_read_data), (10 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_register_callback), (12 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_reset_tx), (68 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_rx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_set_auto_tx_buffer), (16 bytes). + Removing hal_spi_slave.o(i.hal_spi_slave_write_data), (14 bytes). + Removing drv_fls_dma.o(.rev16_text), (4 bytes). + Removing drv_fls_dma.o(.revsh_text), (4 bytes). + Removing drv_fls_dma.o(i.fls_abort_dma), (42 bytes). + Removing drv_fls_dma.o(i.fls_dma_disable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_enable), (10 bytes). + Removing drv_fls_dma.o(i.fls_dma_read_prepare), (86 bytes). + Removing drv_fls_dma.o(i.fls_dma_write_prepare), (82 bytes). + Removing drv_fls_dma.o(i.fls_read_dmacallback), (32 bytes). + Removing drv_fls_dma.o(i.fls_transfer_create_handle_dma), (208 bytes). + Removing drv_fls_dma.o(i.fls_transfer_dma), (112 bytes). + Removing drv_fls_dma.o(i.fls_transfer_get_receive_count_dma), (44 bytes). + Removing drv_fls_dma.o(i.fls_write_dmacallback), (32 bytes). + Removing drv_fls_dma.o(.data), (8 bytes). + Removing drv_spi_slave.o(.rev16_text), (4 bytes). + Removing drv_spi_slave.o(.revsh_text), (4 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_deinit), (40 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_disable_int), (68 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_int), (72 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_rx_dma), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_enable_tx_dma), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_get_dma_address), (8 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_gpio_init), (24 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_read_data), (32 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_switch_sclk), (28 bytes). + Removing drv_spi_slave.o(i.drv_spi_s_write_data), (44 bytes). + Removing drv_spi_slave.o(i.drv_spi_slave_init), (76 bytes). + Removing drv_uart.o(.rev16_text), (4 bytes). + Removing drv_uart.o(.revsh_text), (4 bytes). + Removing drv_uart.o(i.UART_AbortReceive), (30 bytes). + Removing drv_uart.o(i.UART_AbortSend), (30 bytes). + Removing drv_uart.o(i.UART_Deinit), (28 bytes). + Removing drv_uart.o(i.UART_Disable_IT), (68 bytes). + Removing drv_uart.o(i.UART_EnableDma), (32 bytes). + Removing drv_uart.o(i.UART_Enable_IT), (44 bytes). + Removing drv_uart.o(i.UART_GetDefaultConfig), (72 bytes). + Removing drv_uart.o(i.UART_GetFIFO_Ctrl), (20 bytes). + Removing drv_uart.o(i.UART_GetReceiveCount), (22 bytes). + Removing drv_uart.o(i.UART_GetReceiveStatus), (20 bytes). + Removing drv_uart.o(i.UART_GetRxRingBufferLength), (28 bytes). + Removing drv_uart.o(i.UART_GetSendCount), (22 bytes). + Removing drv_uart.o(i.UART_GetSendStatus), (20 bytes). + Removing drv_uart.o(i.UART_ReadBlocking), (32 bytes). + Removing drv_uart.o(i.UART_ReceiveNonBlocking), (50 bytes). + Removing drv_uart.o(i.UART_ResetTxFIFO), (36 bytes). + Removing drv_uart.o(i.UART_SendNonBlocking), (38 bytes). + Removing drv_uart.o(i.UART_TransferCreateHandle), (96 bytes). + Removing drv_uart.o(i.UART_TransferStartRingBuffer), (30 bytes). + Removing drv_uart.o(.constdata), (1 bytes). + Removing drv_uart_dma.o(.rev16_text), (4 bytes). + Removing drv_uart_dma.o(.revsh_text), (4 bytes). + Removing drv_uart_dma.o(i.UART_DMAInit), (76 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortReceiveDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferAbortSendDMA), (16 bytes). + Removing drv_uart_dma.o(i.UART_TransferCreateHandleDMA), (176 bytes). + Removing drv_uart_dma.o(i.UART_TransferGetReceiveCountDMA), (44 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferReceiveDMACallback), (34 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMA), (68 bytes). + Removing drv_uart_dma.o(i.UART_TransferSendDMACallback), (34 bytes). + Removing drv_uart_dma.o(.data), (8 bytes). + Removing drv_wdg.o(.rev16_text), (4 bytes). + Removing drv_wdg.o(.revsh_text), (4 bytes). + Removing drv_wdg.o(i.drv_wdg_enable), (32 bytes). + Removing drv_wdg.o(i.drv_wdg_load_match), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_register_callback), (12 bytes). + Removing drv_wdg.o(i.drv_wdg_sel_mode), (28 bytes). + Removing drv_wdg.o(i.drv_wdg_set_repeat), (12 bytes). + Removing dflti.o(.text), (40 bytes). + +615 unused section(s) (total 26571 bytes) removed from the image. + +============================================================================== + +Image Symbol Table + + Local Symbols + + Symbol Name Value Ov Type Size Object(Section) + + ../clib/../cmprslib/lz77c.c 0x00000000 Number 0 __dclz77c.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uidiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 idiv.o ABSOLUTE + ../clib/microlib/division.c 0x00000000 Number 0 uldiv.o ABSOLUTE + ../clib/microlib/errno.c 0x00000000 Number 0 errno.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry2.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry8a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry7a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry10b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry11a.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry9b.o ABSOLUTE + ../clib/microlib/init/entry.s 0x00000000 Number 0 entry5.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llshl.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llushr.o ABSOLUTE + ../clib/microlib/longlong.c 0x00000000 Number 0 llsshr.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfa.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf8.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf7.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf6.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf5.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf0.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf1.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printfb.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf2.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf3.o ABSOLUTE + ../clib/microlib/printf/printf.c 0x00000000 Number 0 printf4.o ABSOLUTE + ../clib/microlib/printf/stubs.s 0x00000000 Number 0 stubs.o ABSOLUTE + ../clib/microlib/stdio/streams.c 0x00000000 Number 0 stdout.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpyb.o ABSOLUTE + ../clib/microlib/string/memcpy.c 0x00000000 Number 0 memcpya.o ABSOLUTE + ../clib/microlib/string/memset.c 0x00000000 Number 0 memseta.o ABSOLUTE + ../clib/microlib/stubs.s 0x00000000 Number 0 iusefp.o ABSOLUTE + ../fplib/microlib/f2d.c 0x00000000 Number 0 f2d.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 fadd.o ABSOLUTE + ../fplib/microlib/fpadd.c 0x00000000 Number 0 dadd.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 fdiv.o ABSOLUTE + ../fplib/microlib/fpdiv.c 0x00000000 Number 0 ddiv.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 depilogue.o ABSOLUTE + ../fplib/microlib/fpepilogue.c 0x00000000 Number 0 fepilogue.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 ffixui.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixul.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixi.o ABSOLUTE + ../fplib/microlib/fpfix.c 0x00000000 Number 0 dfixui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dflti.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 ffltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 dfltui.o ABSOLUTE + ../fplib/microlib/fpflt.c 0x00000000 Number 0 fflti.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 fmul.o ABSOLUTE + ../fplib/microlib/fpmul.c 0x00000000 Number 0 dmul.o ABSOLUTE + ../fplib/microlib/fpscalb.c 0x00000000 Number 0 fscalb.o ABSOLUTE + ../fplib/microlib/fpsqrt.c 0x00000000 Number 0 dsqrt.o ABSOLUTE + ../mathlib/ceil.c 0x00000000 Number 0 ceil.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt.o ABSOLUTE + ../mathlib/sqrt.c 0x00000000 Number 0 sqrt_x.o ABSOLUTE + ..\..\..\src\common\tau_delay.c 0x00000000 Number 0 tau_delay.o ABSOLUTE + ..\..\..\src\common\tau_log.c 0x00000000 Number 0 tau_log.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_chip_info.c 0x00000000 Number 0 drv_chip_info.o ABSOLUTE + ..\..\..\src\driver\robin\src\drv_dsc_dec.c 0x00000000 Number 0 drv_dsc_dec.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_rx.c 0x00000000 Number 0 drv_dsi_rx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_dsi_tx.c 0x00000000 Number 0 drv_dsi_tx.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_efuse.c 0x00000000 Number 0 drv_efuse.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_lcdc.c 0x00000000 Number 0 drv_lcdc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_memc.c 0x00000000 Number 0 drv_memc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_phy_common.c 0x00000000 Number 0 drv_phy_common.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_rxbr.c 0x00000000 Number 0 drv_rxbr.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\drv_vidc.c 0x00000000 Number 0 drv_vidc.o ABSOLUTE + ..\..\..\src\driver\source\robin\drv\irq_redirect .c 0x00000000 Number 0 irq_redirect .o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\dcs_packet_fifo.c 0x00000000 Number 0 dcs_packet_fifo.o ABSOLUTE + ..\..\..\src\driver\source\robin\hal\internal\hal_internal_vsync.c 0x00000000 Number 0 hal_internal_vsync.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_common.c 0x00000000 Number 0 drv_common.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_crgu.c 0x00000000 Number 0 drv_crgu.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_dma.c 0x00000000 Number 0 drv_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls.c 0x00000000 Number 0 drv_fls.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_fls_dma.c 0x00000000 Number 0 drv_fls_dma.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_gpio.c 0x00000000 Number 0 drv_gpio.o ABSOLUTE + ..\..\..\src\sdk\robin\src\drv\drv_i2c_dma.c 0x00000000 Number 0 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main.o ABSOLUTE + ..\\..\\src\\board\\board.c 0x00000000 Number 0 board.o ABSOLUTE + cdcmple.s 0x00000000 Number 0 cdcmple.o ABSOLUTE + cdrcmple.s 0x00000000 Number 0 cdrcmple.o ABSOLUTE + cfrcmple.s 0x00000000 Number 0 cfrcmple.o ABSOLUTE + dc.s 0x00000000 Number 0 dc.o ABSOLUTE + handlers.s 0x00000000 Number 0 handlers.o ABSOLUTE + init.s 0x00000000 Number 0 init.o ABSOLUTE + RESET 0x00010000 Section 192 startup_armcm0.o(RESET) + .ARM.Collect$$$$00000000 0x000100c0 Section 0 entry.o(.ARM.Collect$$$$00000000) + .ARM.Collect$$$$00000001 0x000100c0 Section 4 entry2.o(.ARM.Collect$$$$00000001) + .ARM.Collect$$$$00000004 0x000100c4 Section 4 entry5.o(.ARM.Collect$$$$00000004) + .ARM.Collect$$$$00000008 0x000100c8 Section 0 entry7b.o(.ARM.Collect$$$$00000008) + .ARM.Collect$$$$0000000A 0x000100c8 Section 0 entry8b.o(.ARM.Collect$$$$0000000A) + .ARM.Collect$$$$0000000B 0x000100c8 Section 8 entry9a.o(.ARM.Collect$$$$0000000B) + .ARM.Collect$$$$0000000D 0x000100d0 Section 0 entry10a.o(.ARM.Collect$$$$0000000D) + .ARM.Collect$$$$0000000F 0x000100d0 Section 0 entry11a.o(.ARM.Collect$$$$0000000F) + .ARM.Collect$$$$00002712 0x000100d0 Section 4 entry2.o(.ARM.Collect$$$$00002712) + __lit__00000000 0x000100d0 Data 4 entry2.o(.ARM.Collect$$$$00002712) + .text 0x000100d4 Section 120 startup_armcm0.o(.text) + .text 0x0001014c Section 0 uidiv.o(.text) + .text 0x00010178 Section 0 idiv.o(.text) + .text 0x000101a0 Section 0 memcpya.o(.text) + .text 0x000101c4 Section 0 memseta.o(.text) + .text 0x000101e8 Section 0 fadd.o(.text) + .text 0x0001029a Section 0 fmul.o(.text) + .text 0x00010314 Section 0 fdiv.o(.text) + .text 0x00010390 Section 0 fscalb.o(.text) + .text 0x000103a8 Section 0 dadd.o(.text) + .text 0x0001050c Section 0 dmul.o(.text) + .text 0x000105dc Section 0 ddiv.o(.text) + .text 0x000106cc Section 0 fflti.o(.text) + .text 0x000106e2 Section 0 ffltui.o(.text) + .text 0x000106f0 Section 0 dfltui.o(.text) + .text 0x0001070c Section 0 ffixi.o(.text) + .text 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0x00010c18 Section 0 irq_redirect .o(i.DMA_IRQn_Handler) + i.EXTI_INT0_IRQn_Handler 0x00010c2c Section 0 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + i.EXTI_INT1_IRQn_Handler 0x00010c48 Section 0 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + i.EXTI_INT2_IRQn_Handler 0x00010c64 Section 0 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + i.EXTI_INT3_IRQn_Handler 0x00010c80 Section 0 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + i.EXTI_INT4_IRQn_Handler 0x00010c9c Section 0 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + i.EXTI_INT5_IRQn_Handler 0x00010cb8 Section 0 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + i.EXTI_INT6_IRQn_Handler 0x00010cd4 Section 0 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + i.EXTI_INT7_IRQn_Handler 0x00010cf0 Section 0 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + i.FLSCTRL_IRQn_Handler 0x00010d0c Section 0 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + i.Gpio_swire_output 0x00010d20 Section 0 ap_demo.o(i.Gpio_swire_output) + i.HardFault_Handler 0x00010d70 Section 0 irq_redirect .o(i.HardFault_Handler) + i.I2C0_IRQn_Handler 0x00010d84 Section 0 irq_redirect .o(i.I2C0_IRQn_Handler) + i.I2C1_IRQn_Handler 0x00010d9c Section 0 irq_redirect .o(i.I2C1_IRQn_Handler) + i.LCDC_IRQn_Handler 0x00010db4 Section 0 irq_redirect .o(i.LCDC_IRQn_Handler) + i.LOG_printf 0x00010dcc Section 0 tau_log.o(i.LOG_printf) + i.MEMC_IRQn_Handler 0x00010df4 Section 0 irq_redirect .o(i.MEMC_IRQn_Handler) + i.MIPI_RX_IRQn_Handler 0x00010e0c Section 0 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + i.MIPI_TX_IRQn_Handler 0x00010e24 Section 0 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + i.PWMDET_IRQn_Handler 0x00010e3c Section 0 irq_redirect .o(i.PWMDET_IRQn_Handler) + i.S20_Start_init 0x00010e58 Section 0 app_tp_transfer.o(i.S20_Start_init) + i.SPIM_IRQn_Handler 0x00010f7c Section 0 irq_redirect .o(i.SPIM_IRQn_Handler) + i.SPIS_IRQn_Handler 0x00010f98 Section 0 irq_redirect .o(i.SPIS_IRQn_Handler) + i.SWIRE_IRQn_Handler 0x00010fb4 Section 0 irq_redirect .o(i.SWIRE_IRQn_Handler) + i.SysTick_Handler 0x00010fd0 Section 0 irq_redirect .o(i.SysTick_Handler) + i.TIMER0_IRQn_Handler 0x00010fe8 Section 0 irq_redirect .o(i.TIMER0_IRQn_Handler) + .ARM.__at_0x11000 0x00011000 Section 20 drv_common.o(.ARM.__at_0x11000) + i.UART_DisableDma 0x00011014 Section 0 drv_uart.o(i.UART_DisableDma) + i.__scatterload_null 0x00011016 Section 2 handlers.o(i.__scatterload_null) + .ARM.__at_0x11018 0x00011018 Section 4 drv_common.o(.ARM.__at_0x11018) + i.TIMER1_IRQn_Handler 0x0001101c Section 0 irq_redirect .o(i.TIMER1_IRQn_Handler) + i.TIMER2_IRQn_Handler 0x00011034 Section 0 irq_redirect .o(i.TIMER2_IRQn_Handler) + i.TIMER3_IRQn_Handler 0x0001104c Section 0 irq_redirect .o(i.TIMER3_IRQn_Handler) + i.UART0_IRQ_Handle 0x00011064 Section 0 drv_uart.o(i.UART0_IRQ_Handle) + i.UART_GetInstance 0x00011080 Section 0 drv_uart.o(i.UART_GetInstance) + i.UART_IRQn_Handler 0x00011084 Section 0 irq_redirect .o(i.UART_IRQn_Handler) + i.UART_ResetRxFIFO 0x0001109c Section 0 drv_uart.o(i.UART_ResetRxFIFO) + i.UART_SetBaudRate 0x000110c0 Section 0 drv_uart.o(i.UART_SetBaudRate) + i.UART_SwitchSCLK 0x00011108 Section 0 drv_uart.o(i.UART_SwitchSCLK) + i.UART_TransferHandleIRQ 0x00011122 Section 0 drv_uart.o(i.UART_TransferHandleIRQ) + i.UART_WriteBlocking 0x00011256 Section 0 drv_uart.o(i.UART_WriteBlocking) + i.UART_init 0x00011270 Section 0 drv_uart.o(i.UART_init) + i.VIDC_IRQn_Handler 0x0001132c Section 0 irq_redirect .o(i.VIDC_IRQn_Handler) + i.VPRE_IRQn_Handler 0x00011344 Section 0 irq_redirect .o(i.VPRE_IRQn_Handler) + i.WDG_IRQn_Handler 0x0001135c Section 0 irq_redirect .o(i.WDG_IRQn_Handler) + i.__0printf 0x00011374 Section 0 printfa.o(i.__0printf) + i.__0vsprintf 0x00011394 Section 0 printfa.o(i.__0vsprintf) + i.__ARM_clz 0x000113b8 Section 0 depilogue.o(i.__ARM_clz) + i.__ARM_common_switch8 0x000113e6 Section 0 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + i.__NVIC_ClearPendingIRQ 0x00011400 Section 0 drv_i2c_master.o(i.__NVIC_ClearPendingIRQ) + __NVIC_ClearPendingIRQ 0x00011401 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+ ap_get_reg_7A 0x00012349 Thumb Code 78 ap_demo.o(i.ap_get_reg_7A) + i.ap_get_reg_df 0x00012398 Section 0 ap_demo.o(i.ap_get_reg_df) + ap_get_reg_df 0x00012399 Thumb Code 150 ap_demo.o(i.ap_get_reg_df) + i.ap_reset_cb 0x00012434 Section 0 ap_demo.o(i.ap_reset_cb) + ap_reset_cb 0x00012435 Thumb Code 38 ap_demo.o(i.ap_reset_cb) + i.ap_set_backlight_51 0x00012464 Section 0 ap_demo.o(i.ap_set_backlight_51) + ap_set_backlight_51 0x00012465 Thumb Code 82 ap_demo.o(i.ap_set_backlight_51) + i.ap_set_display_off 0x000124bc Section 0 ap_demo.o(i.ap_set_display_off) + ap_set_display_off 0x000124bd Thumb Code 30 ap_demo.o(i.ap_set_display_off) + i.ap_set_display_on 0x00012504 Section 0 ap_demo.o(i.ap_set_display_on) + ap_set_display_on 0x00012505 Thumb Code 4 ap_demo.o(i.ap_set_display_on) + i.ap_set_enter_sleep_mode 0x00012508 Section 0 ap_demo.o(i.ap_set_enter_sleep_mode) + ap_set_enter_sleep_mode 0x00012509 Thumb Code 74 ap_demo.o(i.ap_set_enter_sleep_mode) + i.ap_set_exit_sleep_mode 0x00012588 Section 0 ap_demo.o(i.ap_set_exit_sleep_mode) + ap_set_exit_sleep_mode 0x00012589 Thumb Code 22 ap_demo.o(i.ap_set_exit_sleep_mode) + i.ap_tp_calibration 0x000125d0 Section 0 app_tp_transfer.o(i.ap_tp_calibration) + i.ap_update_frame_rate 0x00012680 Section 0 ap_demo.o(i.ap_update_frame_rate) + ap_update_frame_rate 0x00012681 Thumb Code 44 ap_demo.o(i.ap_update_frame_rate) + i.app_ADC_IRQn_Handler 0x000126b0 Section 0 drv_rxbr.o(i.app_ADC_IRQn_Handler) + i.app_AP_NRESET_IRQn_Handler 0x000126cc Section 0 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + i.app_EXTI_INT0_IRQn_Handler 0x000126f0 Section 0 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + i.app_EXTI_INT1_IRQn_Handler 0x0001270c Section 0 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + i.app_EXTI_INT2_IRQn_Handler 0x00012728 Section 0 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + i.app_EXTI_INT3_IRQn_Handler 0x00012744 Section 0 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + i.app_EXTI_INT4_IRQn_Handler 0x00012760 Section 0 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + i.app_EXTI_INT5_IRQn_Handler 0x0001277c Section 0 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + i.app_EXTI_INT6_IRQn_Handler 0x00012798 Section 0 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + i.app_EXTI_INT7_IRQn_Handler 0x000127b4 Section 0 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + i.app_HardFault_Handler 0x000127d0 Section 0 drv_common.o(i.app_HardFault_Handler) + i.app_I2C0_IRQn_Handler 0x00012818 Section 0 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + i.app_I2C1_IRQn_Handler 0x00012830 Section 0 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + i.app_LCDC_IRQn_Handler 0x00012840 Section 0 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + i.app_MEMC_IRQn_Handler 0x000129e4 Section 0 drv_memc.o(i.app_MEMC_IRQn_Handler) + i.app_MIPI_RX_IRQn_Handler 0x00012a6c Section 0 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + i.app_MIPI_TX_IRQn_Handler 0x00012d04 Section 0 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + i.app_PWMDET_IRQn_Handler 0x00012da4 Section 0 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + i.app_SPIM_IRQn_Handler 0x00012dec Section 0 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + i.app_SPIS_IRQn_Handler 0x00012e1c Section 0 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + i.app_SWIRE_IRQn_Handler 0x0001301c Section 0 drv_swire.o(i.app_SWIRE_IRQn_Handler) + i.app_SysTick_Handler 0x0001303c Section 0 drv_common.o(i.app_SysTick_Handler) + i.app_TIMER0_IRQn_Handler 0x00013054 Section 0 drv_timer.o(i.app_TIMER0_IRQn_Handler) + i.app_TIMER1_IRQn_Handler 0x0001305e Section 0 drv_timer.o(i.app_TIMER1_IRQn_Handler) + i.app_TIMER2_IRQn_Handler 0x00013068 Section 0 drv_timer.o(i.app_TIMER2_IRQn_Handler) + i.app_TIMER3_IRQn_Handler 0x00013072 Section 0 drv_timer.o(i.app_TIMER3_IRQn_Handler) + i.app_UART_IRQn_Handler 0x0001307c Section 0 drv_uart.o(i.app_UART_IRQn_Handler) + i.app_VIDC_IRQn_Handler 0x00013084 Section 0 drv_vidc.o(i.app_VIDC_IRQn_Handler) + i.app_VPRE_IRQn_Handler 0x000130a0 Section 0 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + i.app_WDG_IRQn_Handler 0x000130bc Section 0 drv_wdg.o(i.app_WDG_IRQn_Handler) + i.app_dma_irq_handler 0x000130f4 Section 0 drv_dma.o(i.app_dma_irq_handler) + i.app_fls_ctrl_Handler 0x00013104 Section 0 norflash.o(i.app_fls_ctrl_Handler) + i.app_tp_I2C_init 0x00013134 Section 0 app_tp_transfer.o(i.app_tp_I2C_init) + i.app_tp_calibration_exec 0x00013158 Section 0 ap_demo.o(i.app_tp_calibration_exec) + i.app_tp_i2cs_callback 0x000131b8 Section 0 app_tp_transfer.o(i.app_tp_i2cs_callback) + app_tp_i2cs_callback 0x000131b9 Thumb Code 10 app_tp_transfer.o(i.app_tp_i2cs_callback) + i.app_tp_init 0x000131c4 Section 0 app_tp_transfer.o(i.app_tp_init) + i.app_tp_m_read 0x00013208 Section 0 app_tp_transfer.o(i.app_tp_m_read) + app_tp_m_read 0x00013209 Thumb Code 32 app_tp_transfer.o(i.app_tp_m_read) + i.app_tp_m_transfer_complate 0x00013228 Section 0 app_tp_transfer.o(i.app_tp_m_transfer_complate) + i.app_tp_m_write 0x00013230 Section 0 app_tp_transfer.o(i.app_tp_m_write) + app_tp_m_write 0x00013231 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_write) + i.app_tp_phone_analysis_data 0x00013238 Section 0 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + i.app_tp_s_read 0x00013608 Section 0 app_tp_transfer.o(i.app_tp_s_read) + i.app_tp_s_write 0x00013610 Section 0 app_tp_transfer.o(i.app_tp_s_write) + i.app_tp_screen_analysis_int 0x00013618 Section 0 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + i.app_tp_screen_init 0x00013978 Section 0 app_tp_transfer.o(i.app_tp_screen_init) + i.app_tp_screen_int_callback 0x000139a8 Section 0 app_tp_transfer.o(i.app_tp_screen_int_callback) + app_tp_screen_int_callback 0x000139a9 Thumb Code 8 app_tp_transfer.o(i.app_tp_screen_int_callback) + i.app_tp_screen_int_init 0x000139b4 Section 0 app_tp_transfer.o(i.app_tp_screen_int_init) + app_tp_screen_int_init 0x000139b5 Thumb Code 48 app_tp_transfer.o(i.app_tp_screen_int_init) + i.app_tp_screen_int_lvl_low 0x000139ec Section 0 app_tp_transfer.o(i.app_tp_screen_int_lvl_low) + app_tp_screen_int_lvl_low 0x000139ed Thumb Code 22 app_tp_transfer.o(i.app_tp_screen_int_lvl_low) + i.app_tp_transfer_phone 0x00013a08 Section 0 app_tp_transfer.o(i.app_tp_transfer_phone) + app_tp_transfer_phone 0x00013a09 Thumb Code 44 app_tp_transfer.o(i.app_tp_transfer_phone) + i.app_tp_transfer_screen_const 0x00013a38 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_const) + app_tp_transfer_screen_const 0x00013a39 Thumb Code 50 app_tp_transfer.o(i.app_tp_transfer_screen_const) + i.app_tp_transfer_screen_int 0x00013a78 Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_int) + i.app_tp_transfer_screen_start 0x00013b7c Section 0 app_tp_transfer.o(i.app_tp_transfer_screen_start) + i.board_Init 0x00013b90 Section 0 board.o(i.board_Init) + i.calc_framebuffer_setting 0x00013bb4 Section 0 hal_internal_vsync.o(i.calc_framebuffer_setting) + i.ceil 0x000140a4 Section 0 ceil.o(i.ceil) + i.check_mipi_rx_tx_video_info 0x0001416c Section 0 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + check_mipi_rx_tx_video_info 0x0001416d Thumb Code 44 hal_internal_vsync.o(i.check_mipi_rx_tx_video_info) + i.check_pkt_buf_rev 0x00014198 Section 0 hal_internal_vsync.o(i.check_pkt_buf_rev) + check_pkt_buf_rev 0x00014199 Thumb Code 90 hal_internal_vsync.o(i.check_pkt_buf_rev) + i.dcs_packet_fifo_alloc 0x0001422c Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + i.dcs_packet_fifo_init 0x00014284 Section 0 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + i.dcs_packet_free_fifo_header 0x0001429c Section 0 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + i.dcs_packet_get_fifo_header 0x000142e0 Section 0 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + i.dcs_sw_filter 0x00014304 Section 0 hal_internal_vsync.o(i.dcs_sw_filter) + dcs_sw_filter 0x00014305 Thumb Code 24 hal_internal_vsync.o(i.dcs_sw_filter) + i.delayMs 0x00014320 Section 0 tau_delay.o(i.delayMs) + i.delayUs 0x00014338 Section 0 tau_delay.o(i.delayUs) + i.drv_ap_rst_trig_edge_detect 0x0001435c Section 0 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + i.drv_chip_info_get_info 0x00014394 Section 0 drv_chip_info.o(i.drv_chip_info_get_info) + i.drv_chip_info_init 0x000143a0 Section 0 drv_chip_info.o(i.drv_chip_info_init) + i.drv_chip_rx_info_check 0x000143e0 Section 0 drv_chip_info.o(i.drv_chip_rx_info_check) + i.drv_chip_rx_init_done 0x00014490 Section 0 drv_chip_info.o(i.drv_chip_rx_init_done) + i.drv_common_enable_systick 0x000144a4 Section 0 drv_common.o(i.drv_common_enable_systick) + i.drv_common_system_init 0x000144fc Section 0 drv_common.o(i.drv_common_system_init) + i.drv_crgu_config_reset_modules 0x00014504 Section 0 drv_crgu.o(i.drv_crgu_config_reset_modules) + i.drv_crgu_set_ahb_pre_div 0x00014514 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + i.drv_crgu_set_ahb_src 0x00014528 Section 0 drv_crgu.o(i.drv_crgu_set_ahb_src) + i.drv_crgu_set_clock 0x0001453c Section 0 drv_crgu.o(i.drv_crgu_set_clock) + i.drv_crgu_set_dpi_mux_src 0x0001455c Section 0 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + i.drv_crgu_set_dpi_pre_div 0x00014570 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + i.drv_crgu_set_dpi_pre_src 0x00014588 Section 0 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + i.drv_crgu_set_dsc_core_div 0x0001459c Section 0 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + i.drv_crgu_set_dsco_src 0x000145b0 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src) + i.drv_crgu_set_dsco_src_div 0x000145c4 Section 0 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + i.drv_crgu_set_fb_div 0x000145d8 Section 0 drv_crgu.o(i.drv_crgu_set_fb_div) + i.drv_crgu_set_fb_src 0x000145ec Section 0 drv_crgu.o(i.drv_crgu_set_fb_src) + i.drv_crgu_set_lcdc_div 0x00014600 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_div) + i.drv_crgu_set_lcdc_src 0x00014614 Section 0 drv_crgu.o(i.drv_crgu_set_lcdc_src) + i.drv_crgu_set_mipi_cfg_src 0x00014628 Section 0 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + i.drv_crgu_set_mipi_ref_src 0x0001463c Section 0 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + i.drv_crgu_set_reset 0x00014654 Section 0 drv_crgu.o(i.drv_crgu_set_reset) + i.drv_crgu_set_rxbr_div 0x0001466c Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_div) + i.drv_crgu_set_rxbr_src 0x00014680 Section 0 drv_crgu.o(i.drv_crgu_set_rxbr_src) + i.drv_crgu_set_vidc_src 0x00014694 Section 0 drv_crgu.o(i.drv_crgu_set_vidc_src) + i.drv_dma_clear_flag 0x000146a8 Section 0 drv_dma.o(i.drv_dma_clear_flag) + i.drv_dma_create_handle 0x000146c0 Section 0 drv_dma.o(i.drv_dma_create_handle) + i.drv_dma_disenable_channel 0x000146dc Section 0 drv_dma.o(i.drv_dma_disenable_channel) + i.drv_dma_enable_channel 0x000146ec Section 0 drv_dma.o(i.drv_dma_enable_channel) + i.drv_dma_enable_channel_interrupts 0x000146fc Section 0 drv_dma.o(i.drv_dma_enable_channel_interrupts) + i.drv_dma_get_channel_flag 0x00014720 Section 0 drv_dma.o(i.drv_dma_get_channel_flag) + i.drv_dma_irq_handler 0x0001472c Section 0 drv_dma.o(i.drv_dma_irq_handler) + i.drv_dma_prepar_transfer 0x000147bc Section 0 drv_dma.o(i.drv_dma_prepar_transfer) + i.drv_dma_set_burst 0x000147ce Section 0 drv_dma.o(i.drv_dma_set_burst) + i.drv_dma_set_callback 0x000147e8 Section 0 drv_dma.o(i.drv_dma_set_callback) + i.drv_dma_set_transfer 0x000147f0 Section 0 drv_dma.o(i.drv_dma_set_transfer) + i.drv_dsc_dec_convert_pps_rc_parameter 0x00014834 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + i.drv_dsc_dec_disable 0x0001486a Section 0 drv_dsc_dec.o(i.drv_dsc_dec_disable) + i.drv_dsc_dec_enable 0x00014878 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_enable) + i.drv_dsc_dec_get_nslc 0x000148ec Section 0 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + i.drv_dsc_dec_set_u8_pps 0x000148f6 Section 0 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + i.drv_dsi_rx_calc_ipi_tx_delay 0x00014920 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + i.drv_dsi_rx_enable_irq 0x00014a24 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + i.drv_dsi_rx_get_color_bpp 0x00014a64 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + drv_dsi_rx_get_color_bpp 0x00014a65 Thumb Code 62 drv_dsi_rx.o(i.drv_dsi_rx_get_color_bpp) + i.drv_dsi_rx_get_color_pcc 0x00014ab4 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + drv_dsi_rx_get_color_pcc 0x00014ab5 Thumb Code 24 drv_dsi_rx.o(i.drv_dsi_rx_get_color_pcc) + i.drv_dsi_rx_get_compression_en 0x00014ad0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + i.drv_dsi_rx_get_max_ret_size 0x00014ad8 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + i.drv_dsi_rx_power_up 0x00014ade Section 0 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + i.drv_dsi_rx_set_ctrl_cfg 0x00014aec Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + i.drv_dsi_rx_set_ddi_cfg 0x00014b0c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + i.drv_dsi_rx_set_inten 0x00014b1c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + i.drv_dsi_rx_set_ipi_cfg 0x00014b20 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + i.drv_dsi_rx_set_lane_swap 0x00014b30 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + i.drv_dsi_rx_set_resp_cnt 0x00014b76 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + i.drv_dsi_rx_set_up_phy 0x00014b9c Section 0 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + i.drv_dsi_rx_shut_down 0x00014ca0 Section 0 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + i.drv_dsi_tx_command_get_payload 0x00014cae Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) + i.drv_dsi_tx_command_header 0x00014cb2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + i.drv_dsi_tx_command_mode_cfg 0x00014cc6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + i.drv_dsi_tx_command_put_payload 0x00014d32 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + i.drv_dsi_tx_config_eotp 0x00014d36 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + i.drv_dsi_tx_config_int 0x00014d4e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + i.drv_dsi_tx_dpi_lpcmd_time 0x00014d56 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + i.drv_dsi_tx_dpi_mode 0x00014d5e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + i.drv_dsi_tx_dpi_polarity 0x00014d68 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + i.drv_dsi_tx_edpi_cmd_size 0x00014d8c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + i.drv_dsi_tx_get_cmd_status 0x00014d90 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + i.drv_dsi_tx_mode 0x00014d94 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_mode) + i.drv_dsi_tx_phy_clock_lane_auto_lp 0x00014d98 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + i.drv_dsi_tx_phy_clock_lane_req_hs 0x00014db0 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + i.drv_dsi_tx_phy_lane_mode 0x00014dca Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + i.drv_dsi_tx_phy_status_ready 0x00014dd6 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + i.drv_dsi_tx_phy_status_stopstate 0x00014e3a Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + i.drv_dsi_tx_phy_test_setup 0x00014e78 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + i.drv_dsi_tx_phy_time_cfg 0x00014fac Section 0 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + i.drv_dsi_tx_powerup 0x00014fca Section 0 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + i.drv_dsi_tx_response_mode 0x00014fd2 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + i.drv_dsi_tx_set_bta_ack 0x00014fee Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + i.drv_dsi_tx_set_esc_div 0x00015006 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + i.drv_dsi_tx_set_int 0x00015014 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + i.drv_dsi_tx_set_time_out_div 0x00015054 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + i.drv_dsi_tx_set_video_chunk 0x00015064 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + i.drv_dsi_tx_set_video_timing 0x0001506c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + i.drv_dsi_tx_shutdown 0x0001508e Section 0 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + i.drv_dsi_tx_timeout_cfg 0x00015096 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + i.drv_dsi_tx_video_mode_cfg 0x000150bc Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + i.drv_dsi_tx_video_mode_disable_hact_cmd 0x00015166 Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + i.drv_dsi_tx_video_mode_set_lp_cmd 0x0001517c Section 0 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + i.drv_efuse_enter_inactive 0x00015194 Section 0 drv_efuse.o(i.drv_efuse_enter_inactive) + i.drv_efuse_int_enable 0x000151c2 Section 0 drv_efuse.o(i.drv_efuse_int_enable) + i.drv_efuse_read 0x000151ce Section 0 drv_efuse.o(i.drv_efuse_read) + i.drv_efuse_read_req 0x00015200 Section 0 drv_efuse.o(i.drv_efuse_read_req) + i.drv_gpio_get_input_data 0x00015218 Section 0 drv_gpio.o(i.drv_gpio_get_input_data) + i.drv_gpio_register_ap_reset_callback 0x00015230 Section 0 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + i.drv_gpio_register_callback 0x0001523c Section 0 drv_gpio.o(i.drv_gpio_register_callback) + i.drv_gpio_set_int 0x00015250 Section 0 drv_gpio.o(i.drv_gpio_set_int) + i.drv_gpio_set_ioe 0x000152a0 Section 0 drv_gpio.o(i.drv_gpio_set_ioe) + i.drv_gpio_set_mode0 0x000152c0 Section 0 drv_gpio.o(i.drv_gpio_set_mode0) + i.drv_gpio_set_mode1 0x000152d0 Section 0 drv_gpio.o(i.drv_gpio_set_mode1) + i.drv_gpio_set_mode2 0x000152e0 Section 0 drv_gpio.o(i.drv_gpio_set_mode2) + i.drv_gpio_set_mode3 0x000152f0 Section 0 drv_gpio.o(i.drv_gpio_set_mode3) + i.drv_gpio_set_output_data 0x00015300 Section 0 hal_gpio.o(i.drv_gpio_set_output_data) + drv_gpio_set_output_data 0x00015301 Thumb Code 26 hal_gpio.o(i.drv_gpio_set_output_data) + i.drv_gpio_set_pull_state 0x00015320 Section 0 drv_gpio.o(i.drv_gpio_set_pull_state) + i.drv_i2c0_set_callback 0x00015450 Section 0 drv_i2c_slave.o(i.drv_i2c0_set_callback) + i.drv_i2c1_set_callback 0x0001545c Section 0 drv_i2c_master.o(i.drv_i2c1_set_callback) + i.drv_i2c_dma_callback 0x00015468 Section 0 drv_i2c_dma.o(i.drv_i2c_dma_callback) + drv_i2c_dma_callback 0x00015469 Thumb Code 40 drv_i2c_dma.o(i.drv_i2c_dma_callback) + i.drv_i2c_dma_init 0x0001549c Section 0 drv_i2c_dma.o(i.drv_i2c_dma_init) + i.drv_i2c_enable_rx_dma 0x00015548 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + i.drv_i2c_enable_tx_dma 0x00015562 Section 0 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + i.drv_i2c_m_clear_it_pending_bit 0x0001557c Section 0 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + i.drv_i2c_m_enable 0x000155dc Section 0 drv_i2c_master.o(i.drv_i2c_m_enable) + i.drv_i2c_m_enable_intr 0x000155ec Section 0 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + i.drv_i2c_master_init 0x00015624 Section 0 drv_i2c_master.o(i.drv_i2c_master_init) + i.drv_i2c_master_read_dma 0x000156b0 Section 0 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + i.drv_i2c_master_write_dma 0x0001570c Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + i.drv_i2c_master_write_read_cmd 0x00015748 Section 0 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + drv_i2c_master_write_read_cmd 0x00015749 Thumb Code 62 drv_i2c_dma.o(i.drv_i2c_master_write_read_cmd) + i.drv_i2c_s_clear_it_pending_bit 0x00015786 Section 0 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + i.drv_i2c_s_config_intr 0x000157c8 Section 0 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + i.drv_i2c_s_enable 0x000157cc Section 0 drv_i2c_slave.o(i.drv_i2c_s_enable) + i.drv_i2c_s_get_fifo_status 0x000157d4 Section 0 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + i.drv_i2c_s_set_intr 0x000157e8 Section 0 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + i.drv_i2c_s_write_data 0x00015838 Section 0 drv_i2c_slave.o(i.drv_i2c_s_write_data) + i.drv_i2c_set_dma_irq_callback 0x00015854 Section 0 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + i.drv_i2c_slave_init 0x000158ac Section 0 drv_i2c_slave.o(i.drv_i2c_slave_init) + i.drv_i2c_slave_write_dma 0x000158e0 Section 0 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + i.drv_lcdc_config_bypass 0x000158f8 Section 0 drv_lcdc.o(i.drv_lcdc_config_bypass) + i.drv_lcdc_config_ccm 0x00015910 Section 0 drv_lcdc.o(i.drv_lcdc_config_ccm) + i.drv_lcdc_config_disp_mode 0x00015940 Section 0 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + i.drv_lcdc_config_dpi_polarity 0x00015956 Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + i.drv_lcdc_config_dpi_timing 0x0001597a Section 0 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + i.drv_lcdc_config_edpi_mode 0x000159a0 Section 0 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + i.drv_lcdc_config_endianness 0x000159b6 Section 0 drv_lcdc.o(i.drv_lcdc_config_endianness) + i.drv_lcdc_config_input_size 0x000159cc Section 0 drv_lcdc.o(i.drv_lcdc_config_input_size) + i.drv_lcdc_config_int 0x000159d8 Section 0 drv_lcdc.o(i.drv_lcdc_config_int) + i.drv_lcdc_config_int_single 0x000159f6 Section 0 drv_lcdc.o(i.drv_lcdc_config_int_single) + i.drv_lcdc_config_overwrite 0x00015a18 Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite) + i.drv_lcdc_config_overwrite_rgb 0x00015a3a Section 0 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + i.drv_lcdc_config_partial_display_area 0x00015a46 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + i.drv_lcdc_config_partial_display_enable 0x00015a60 Section 0 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + i.drv_lcdc_config_scale_up_coef 0x00015a82 Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + i.drv_lcdc_config_scale_up_step 0x00015a9c Section 0 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + i.drv_lcdc_config_src_parameter 0x00015aa8 Section 0 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + i.drv_lcdc_config_thresh 0x00015af4 Section 0 drv_lcdc.o(i.drv_lcdc_config_thresh) + i.drv_lcdc_ctrl_flow 0x00015afa Section 0 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + i.drv_lcdc_enable_shadow_reg 0x00015b0c Section 0 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + i.drv_lcdc_set_int 0x00015b2c Section 0 drv_lcdc.o(i.drv_lcdc_set_int) + i.drv_lcdc_set_video_hw_mode 0x00015b6c Section 0 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + i.drv_lcdc_start 0x00015b80 Section 0 drv_lcdc.o(i.drv_lcdc_start) + i.drv_memc_clear_status 0x00015ba0 Section 0 drv_memc.o(i.drv_memc_clear_status) + i.drv_memc_enable_irq 0x00015bac Section 0 drv_memc.o(i.drv_memc_enable_irq) + i.drv_memc_gen_a_tear_signal 0x00015bec Section 0 drv_memc.o(i.drv_memc_gen_a_tear_signal) + i.drv_memc_get_status 0x00015bf8 Section 0 drv_memc.o(i.drv_memc_get_status) + i.drv_memc_rate_transfer_sel 0x00015c0a Section 0 drv_memc.o(i.drv_memc_rate_transfer_sel) + i.drv_memc_sel_vsync 0x00015c1a Section 0 drv_memc.o(i.drv_memc_sel_vsync) + i.drv_memc_set_active_height 0x00015c28 Section 0 drv_memc.o(i.drv_memc_set_active_height) + i.drv_memc_set_data_mode 0x00015c3c Section 0 drv_memc.o(i.drv_memc_set_data_mode) + i.drv_memc_set_double_buffer 0x00015c48 Section 0 drv_memc.o(i.drv_memc_set_double_buffer) + i.drv_memc_set_double_buffer_reverse 0x00015c58 Section 0 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + i.drv_memc_set_fs_en_conditions 0x00015c6a Section 0 drv_memc.o(i.drv_memc_set_fs_en_conditions) + i.drv_memc_set_inten 0x00015c7a Section 0 drv_memc.o(i.drv_memc_set_inten) + i.drv_memc_set_lcdc_st_conditions 0x00015c90 Section 0 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + i.drv_memc_set_ltpo_mode 0x00015ca8 Section 0 drv_memc.o(i.drv_memc_set_ltpo_mode) + i.drv_memc_set_tear_mode 0x00015cc2 Section 0 drv_memc.o(i.drv_memc_set_tear_mode) + i.drv_memc_set_tear_waveform 0x00015cd0 Section 0 drv_memc.o(i.drv_memc_set_tear_waveform) + i.drv_memc_set_vidc_sync_cnt 0x00015cf8 Section 0 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + i.drv_param_init_get_ccm 0x00015d08 Section 0 drv_param_init.o(i.drv_param_init_get_ccm) + i.drv_param_init_get_scld_filter_h 0x00015d10 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + i.drv_param_init_get_scld_filter_v 0x00015d24 Section 0 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + i.drv_param_init_get_sclu_filter 0x00015d38 Section 0 drv_param_init.o(i.drv_param_init_get_sclu_filter) + i.drv_param_init_set_ccm 0x00015d40 Section 0 drv_param_init.o(i.drv_param_init_set_ccm) + i.drv_param_init_set_scld_filter 0x00015d54 Section 0 drv_param_init.o(i.drv_param_init_set_scld_filter) + i.drv_param_p2r_filter_init 0x00015db8 Section 0 drv_param_init.o(i.drv_param_p2r_filter_init) + i.drv_phy_enable_calibration 0x00015ddc Section 0 drv_phy_common.o(i.drv_phy_enable_calibration) + i.drv_phy_get_calibration 0x00015dec Section 0 drv_phy_common.o(i.drv_phy_get_calibration) + i.drv_phy_get_pll_para 0x00015e28 Section 0 drv_phy_common.o(i.drv_phy_get_pll_para) + i.drv_phy_get_rate_para 0x00015e88 Section 0 drv_phy_common.o(i.drv_phy_get_rate_para) + i.drv_phy_test_clear 0x00015edc Section 0 drv_phy_common.o(i.drv_phy_test_clear) + i.drv_phy_test_lock 0x00015eec Section 0 drv_phy_common.o(i.drv_phy_test_lock) + i.drv_phy_test_write_1_byte 0x00015f04 Section 0 drv_phy_common.o(i.drv_phy_test_write_1_byte) + i.drv_phy_test_write_2_byte 0x00015f24 Section 0 drv_phy_common.o(i.drv_phy_test_write_2_byte) + i.drv_phy_test_write_code 0x00015f4a Section 0 drv_phy_common.o(i.drv_phy_test_write_code) + i.drv_phy_test_write_data 0x00015f68 Section 0 drv_phy_common.o(i.drv_phy_test_write_data) + drv_phy_test_write_data 0x00015f69 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_data) + i.drv_pwr_set_cp_mode 0x00015f88 Section 0 drv_pwr.o(i.drv_pwr_set_cp_mode) + i.drv_pwr_set_pvd_mode 0x00015fa8 Section 0 drv_pwr.o(i.drv_pwr_set_pvd_mode) + i.drv_pwr_set_system_clk_src 0x00015fc0 Section 0 drv_pwr.o(i.drv_pwr_set_system_clk_src) + i.drv_rx_phy_test_clear 0x00015ff8 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + drv_rx_phy_test_clear 0x00015ff9 Thumb Code 12 drv_dsi_rx.o(i.drv_rx_phy_test_clear) + i.drv_rx_phy_test_lock 0x00016004 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + drv_rx_phy_test_lock 0x00016005 Thumb Code 16 drv_dsi_rx.o(i.drv_rx_phy_test_lock) + i.drv_rx_phy_test_write_1_byte 0x00016014 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + drv_rx_phy_test_write_1_byte 0x00016015 Thumb Code 20 drv_dsi_rx.o(i.drv_rx_phy_test_write_1_byte) + i.drv_rx_phy_test_write_2_byte 0x00016028 Section 0 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + drv_rx_phy_test_write_2_byte 0x00016029 Thumb Code 22 drv_dsi_rx.o(i.drv_rx_phy_test_write_2_byte) + i.drv_rxbr_clear_pkt_buffer 0x0001603e Section 0 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + i.drv_rxbr_clear_status0 0x00016048 Section 0 drv_rxbr.o(i.drv_rxbr_clear_status0) + i.drv_rxbr_enable_irq 0x0001604c Section 0 drv_rxbr.o(i.drv_rxbr_enable_irq) + i.drv_rxbr_frame_drop_cfg 0x000160a8 Section 0 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + i.drv_rxbr_get_clk 0x000160bc Section 0 drv_rxbr.o(i.drv_rxbr_get_clk) + i.drv_rxbr_get_col_addr 0x00016120 Section 0 drv_rxbr.o(i.drv_rxbr_get_col_addr) + i.drv_rxbr_get_int_source 0x00016124 Section 0 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + drv_rxbr_get_int_source 0x00016125 Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_int_source) + i.drv_rxbr_get_page_addr 0x00016136 Section 0 drv_rxbr.o(i.drv_rxbr_get_page_addr) + i.drv_rxbr_get_status0 0x0001613a Section 0 hal_internal_vsync.o(i.drv_rxbr_get_status0) + drv_rxbr_get_status0 0x0001613b Thumb Code 18 hal_internal_vsync.o(i.drv_rxbr_get_status0) + i.drv_rxbr_hline_rcv0_cfg 0x0001614c Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + i.drv_rxbr_hline_rcv_cfg 0x00016158 Section 0 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + i.drv_rxbr_register_irq0_callback 0x00016160 Section 0 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + i.drv_rxbr_register_irq1_callback 0x0001616c Section 0 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + i.drv_rxbr_set_ack_pkt_header 0x00016178 Section 0 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + i.drv_rxbr_set_cmd_filter 0x0001618c Section 0 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + i.drv_rxbr_set_color_format 0x00016258 Section 0 drv_rxbr.o(i.drv_rxbr_set_color_format) + i.drv_rxbr_set_inten 0x0001626c Section 0 drv_rxbr.o(i.drv_rxbr_set_inten) + i.drv_rxbr_set_ltpo_drop_th 0x00016280 Section 0 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + i.drv_rxbr_set_usr_cfg 0x00016290 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + i.drv_rxbr_set_usr_col 0x000162b6 Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_col) + i.drv_rxbr_set_usr_row 0x000162be Section 0 drv_rxbr.o(i.drv_rxbr_set_usr_row) + i.drv_spi_m_read_data 0x000162c8 Section 0 drv_spi_master.o(i.drv_spi_m_read_data) + i.drv_swire_enable 0x000162e8 Section 0 drv_swire.o(i.drv_swire_enable) + i.drv_swire_set_int 0x00016304 Section 0 drv_swire.o(i.drv_swire_set_int) + i.drv_swire_set_power_down 0x00016358 Section 0 drv_swire.o(i.drv_swire_set_power_down) + i.drv_sys_cfg_clear_all_int 0x00016374 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + i.drv_sys_cfg_clear_pending 0x00016380 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + i.drv_sys_cfg_sel_ap_rst_lvl_trig 0x000163a8 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + i.drv_sys_cfg_sel_ap_rst_trig 0x000163c0 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + i.drv_sys_cfg_sel_gpio_group 0x000163dc Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + i.drv_sys_cfg_sel_int_trig 0x00016400 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + i.drv_sys_cfg_set_dma_rx_req 0x00016424 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + i.drv_sys_cfg_set_dma_tx_req 0x00016434 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + i.drv_sys_cfg_set_int 0x00016444 Section 0 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + i.drv_timer_clear_status_flags 0x00016468 Section 0 drv_timer.o(i.drv_timer_clear_status_flags) + drv_timer_clear_status_flags 0x00016469 Thumb Code 26 drv_timer.o(i.drv_timer_clear_status_flags) + i.drv_timer_enable 0x00016482 Section 0 drv_timer.o(i.drv_timer_enable) + i.drv_timer_get_instance 0x000164a4 Section 0 drv_timer.o(i.drv_timer_get_instance) + i.drv_timer_get_prescaler 0x000164b4 Section 0 drv_timer.o(i.drv_timer_get_prescaler) + i.drv_timer_handle_interrupt 0x000164c4 Section 0 drv_timer.o(i.drv_timer_handle_interrupt) + drv_timer_handle_interrupt 0x000164c5 Thumb Code 62 drv_timer.o(i.drv_timer_handle_interrupt) + i.drv_timer_register_callback 0x00016508 Section 0 drv_timer.o(i.drv_timer_register_callback) + i.drv_timer_set_compare_val 0x0001651c Section 0 drv_timer.o(i.drv_timer_set_compare_val) + i.drv_timer_set_int 0x0001652c Section 0 drv_timer.o(i.drv_timer_set_int) + i.drv_timer_set_prescaler 0x00016580 Section 0 drv_timer.o(i.drv_timer_set_prescaler) + i.drv_timer_set_repeat 0x000165a8 Section 0 drv_timer.o(i.drv_timer_set_repeat) + i.drv_tx_phy_test_clear 0x000165b8 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + drv_tx_phy_test_clear 0x000165b9 Thumb Code 10 drv_dsi_tx.o(i.drv_tx_phy_test_clear) + i.drv_tx_phy_test_enter 0x000165c2 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + i.drv_tx_phy_test_exit 0x000165de Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + i.drv_tx_phy_test_write_1_byte 0x000165fa Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + drv_tx_phy_test_write_1_byte 0x000165fb Thumb Code 18 drv_dsi_tx.o(i.drv_tx_phy_test_write_1_byte) + i.drv_tx_phy_test_write_2_byte 0x0001660c Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + drv_tx_phy_test_write_2_byte 0x0001660d Thumb Code 20 drv_dsi_tx.o(i.drv_tx_phy_test_write_2_byte) + i.drv_tx_phy_test_write_code 0x00016620 Section 0 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + drv_tx_phy_test_write_code 0x00016621 Thumb Code 16 drv_dsi_tx.o(i.drv_tx_phy_test_write_code) + i.drv_vidc_clear_irq 0x00016630 Section 0 drv_vidc.o(i.drv_vidc_clear_irq) + i.drv_vidc_enable 0x00016638 Section 0 drv_vidc.o(i.drv_vidc_enable) + i.drv_vidc_enable_irq 0x00016650 Section 0 drv_vidc.o(i.drv_vidc_enable_irq) + i.drv_vidc_get_irq_status 0x00016690 Section 0 drv_vidc.o(i.drv_vidc_get_irq_status) + i.drv_vidc_init_module_enable 0x000166a4 Section 0 drv_vidc.o(i.drv_vidc_init_module_enable) + i.drv_vidc_register_callback 0x000166cc Section 0 drv_vidc.o(i.drv_vidc_register_callback) + i.drv_vidc_reset 0x000166d8 Section 0 drv_vidc.o(i.drv_vidc_reset) + i.drv_vidc_set_dst_parameter 0x000166de Section 0 drv_vidc.o(i.drv_vidc_set_dst_parameter) + i.drv_vidc_set_irqen 0x0001671a Section 0 drv_vidc.o(i.drv_vidc_set_irqen) + i.drv_vidc_set_mirror 0x0001672e Section 0 drv_vidc.o(i.drv_vidc_set_mirror) + i.drv_vidc_set_p2r_hcoef0 0x0001673e Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + i.drv_vidc_set_p2r_hinitb 0x00016746 Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + i.drv_vidc_set_p2r_hinitr 0x0001676c Section 0 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + i.drv_vidc_set_pentile_swap 0x00016794 Section 0 drv_vidc.o(i.drv_vidc_set_pentile_swap) + i.drv_vidc_set_pu_ctrl 0x000167ac Section 0 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + i.drv_vidc_set_rotation 0x000167b6 Section 0 drv_vidc.o(i.drv_vidc_set_rotation) + i.drv_vidc_set_scld_hcoef0 0x000167c6 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + i.drv_vidc_set_scld_hcoef1 0x000167d0 Section 0 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + i.drv_vidc_set_scld_step 0x000167da Section 0 drv_vidc.o(i.drv_vidc_set_scld_step) + i.drv_vidc_set_scld_vcoef0 0x000167ec Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + i.drv_vidc_set_scld_vcoef1 0x000167f6 Section 0 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + i.drv_vidc_set_src_parameter 0x00016800 Section 0 drv_vidc.o(i.drv_vidc_set_src_parameter) + i.drv_wdg_clear_counter 0x00016818 Section 0 drv_wdg.o(i.drv_wdg_clear_counter) + i.drv_wdg_clear_edge_flag 0x00016828 Section 0 drv_wdg.o(i.drv_wdg_clear_edge_flag) + drv_wdg_clear_edge_flag 0x00016829 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_edge_flag) + i.drv_wdg_read_edge_flag 0x00016838 Section 0 drv_wdg.o(i.drv_wdg_read_edge_flag) + drv_wdg_read_edge_flag 0x00016839 Thumb Code 10 drv_wdg.o(i.drv_wdg_read_edge_flag) + i.drv_wdg_set_int 0x00016848 Section 0 drv_wdg.o(i.drv_wdg_set_int) + i.fls_clr_interrupt_flag 0x00016888 Section 0 drv_fls.o(i.fls_clr_interrupt_flag) + i.fputc 0x00016892 Section 0 tau_log.o(i.fputc) + i.hal_dsi_rx_ctrl_create_handle 0x000168a8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + i.hal_dsi_rx_ctrl_deinit 0x000168dc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + i.hal_dsi_rx_ctrl_dsc_async_handler 0x00016978 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + i.hal_dsi_rx_ctrl_gen_a_tear_signal 0x000169fc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + i.hal_dsi_rx_ctrl_get_compressen_en 0x00016a24 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) + i.hal_dsi_rx_ctrl_get_max_ret_size 0x00016a34 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + i.hal_dsi_rx_ctrl_init 0x00016a5c Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + i.hal_dsi_rx_ctrl_init_clk 0x00016abc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + hal_dsi_rx_ctrl_init_clk 0x00016abd Thumb Code 332 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_clk) + i.hal_dsi_rx_ctrl_init_dsi_rx 0x00016c60 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + hal_dsi_rx_ctrl_init_dsi_rx 0x00016c61 Thumb Code 184 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_dsi_rx) + i.hal_dsi_rx_ctrl_init_memc 0x00016d38 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + hal_dsi_rx_ctrl_init_memc 0x00016d39 Thumb Code 334 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_memc) + i.hal_dsi_rx_ctrl_init_rxbr 0x00016e90 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + hal_dsi_rx_ctrl_init_rxbr 0x00016e91 Thumb Code 312 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_rxbr) + i.hal_dsi_rx_ctrl_init_vidc 0x00016fd8 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + hal_dsi_rx_ctrl_init_vidc 0x00016fd9 Thumb Code 544 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init_vidc) + i.hal_dsi_rx_ctrl_send_ack_cmd 0x00017204 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + i.hal_dsi_rx_ctrl_set_cus_scld_filter 0x000172f4 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) + i.hal_dsi_rx_ctrl_set_cus_sync_line 0x00017360 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + i.hal_dsi_rx_ctrl_set_ipi_cfg 0x00017394 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + hal_dsi_rx_ctrl_set_ipi_cfg 0x00017395 Thumb Code 50 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_ipi_cfg) + i.hal_dsi_rx_ctrl_set_rxbr_clk 0x000173cc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + hal_dsi_rx_ctrl_set_rxbr_clk 0x000173cd Thumb Code 114 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_rxbr_clk) + i.hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017440 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + i.hal_dsi_rx_ctrl_set_tear_mode_ex 0x00017474 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + i.hal_dsi_rx_ctrl_start 0x00017484 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + i.hal_dsi_rx_ctrl_stop 0x000174c0 Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + i.hal_dsi_rx_ctrl_toggle_resolution_ex 0x000174fc Section 0 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) + i.hal_dsi_tx_calc_video_chunks 0x0001751c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + hal_dsi_tx_calc_video_chunks 0x0001751d Thumb Code 384 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_calc_video_chunks) + i.hal_dsi_tx_config_params_for_lane_rate 0x000176ac Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + hal_dsi_tx_config_params_for_lane_rate 0x000176ad Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_config_params_for_lane_rate) + i.hal_dsi_tx_count_lane_rate 0x000176e0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + hal_dsi_tx_count_lane_rate 0x000176e1 Thumb Code 1022 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_count_lane_rate) + i.hal_dsi_tx_ctrl_create_handle 0x00017b30 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + i.hal_dsi_tx_ctrl_deinit 0x00017b5c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + i.hal_dsi_tx_ctrl_enter_init_panel_mode 0x00017be0 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + i.hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017c2c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + i.hal_dsi_tx_ctrl_init 0x00017c54 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + i.hal_dsi_tx_ctrl_init_clk 0x00017cf8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + hal_dsi_tx_ctrl_init_clk 0x00017cf9 Thumb Code 36 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init_clk) + i.hal_dsi_tx_ctrl_panel_reset_pin 0x00017d1c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + i.hal_dsi_tx_ctrl_read_cmd 0x00017d28 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) + i.hal_dsi_tx_ctrl_set_ccm 0x00017db4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + i.hal_dsi_tx_ctrl_set_overwrite_rgb 0x00017dd4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + i.hal_dsi_tx_ctrl_set_partial_disp 0x00017de8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + i.hal_dsi_tx_ctrl_set_partial_disp_area 0x00017df8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + i.hal_dsi_tx_ctrl_start 0x00017e1c Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + i.hal_dsi_tx_ctrl_stop 0x00017eb8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + i.hal_dsi_tx_ctrl_write_array_cmd 0x00017efc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + i.hal_dsi_tx_ctrl_write_cmd 0x00017fd4 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + i.hal_dsi_tx_init_data_mode 0x00018084 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + hal_dsi_tx_init_data_mode 0x00018085 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_data_mode) + i.hal_dsi_tx_init_dpi_cfg 0x000180c8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + hal_dsi_tx_init_dpi_cfg 0x000180c9 Thumb Code 42 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_dpi_cfg) + i.hal_dsi_tx_init_interrupt 0x000180f8 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + hal_dsi_tx_init_interrupt 0x000180f9 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_interrupt) + i.hal_dsi_tx_init_phy_cfg 0x00018118 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + hal_dsi_tx_init_phy_cfg 0x00018119 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_phy_cfg) + i.hal_dsi_tx_init_remains 0x00018138 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + hal_dsi_tx_init_remains 0x00018139 Thumb Code 142 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_remains) + i.hal_dsi_tx_init_video_mode 0x000181cc Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + hal_dsi_tx_init_video_mode 0x000181cd Thumb Code 82 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_init_video_mode) + i.hal_dsi_tx_send_cmd 0x00018224 Section 0 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + hal_dsi_tx_send_cmd 0x00018225 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_send_cmd) + i.hal_gpio_ctrl_eint 0x00018268 Section 0 hal_gpio.o(i.hal_gpio_ctrl_eint) + i.hal_gpio_get_input_data 0x00018280 Section 0 hal_gpio.o(i.hal_gpio_get_input_data) + i.hal_gpio_init_eint 0x00018294 Section 0 hal_gpio.o(i.hal_gpio_init_eint) + i.hal_gpio_init_input 0x000182d4 Section 0 hal_gpio.o(i.hal_gpio_init_input) + i.hal_gpio_init_output 0x000182f4 Section 0 hal_gpio.o(i.hal_gpio_init_output) + i.hal_gpio_reg_eint_cb 0x0001831c Section 0 hal_gpio.o(i.hal_gpio_reg_eint_cb) + i.hal_gpio_set_ap_reset_int 0x00018334 Section 0 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + i.hal_gpio_set_mode 0x00018384 Section 0 hal_gpio.o(i.hal_gpio_set_mode) + i.hal_gpio_set_output_data 0x000183e4 Section 0 hal_gpio.o(i.hal_gpio_set_output_data) + i.hal_gpio_set_pull_state 0x000183ec Section 0 hal_gpio.o(i.hal_gpio_set_pull_state) + i.hal_i2c_m_dma_init 0x0001840c Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_init) + i.hal_i2c_m_dma_read 0x00018478 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_read) + i.hal_i2c_m_dma_write 0x00018498 Section 0 hal_i2c_master.o(i.hal_i2c_m_dma_write) + i.hal_i2c_m_transfer_complate 0x000184b4 Section 0 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + i.hal_i2c_master_irq_callback 0x000184c0 Section 0 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + hal_i2c_master_irq_callback 0x000184c1 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_master_irq_callback) + i.hal_i2c_s_dma_user_callback 0x000184e0 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + hal_i2c_s_dma_user_callback 0x000184e1 Thumb Code 12 hal_i2c_slave.o(i.hal_i2c_s_dma_user_callback) + i.hal_i2c_s_dma_write 0x000184f0 Section 0 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + i.hal_i2c_s_init 0x0001853c Section 0 hal_i2c_slave.o(i.hal_i2c_s_init) + i.hal_i2c_s_nonblocking_read 0x00018604 Section 0 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + i.hal_i2c_s_set_transfer 0x00018618 Section 0 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + i.hal_i2c_slave_irq_callback 0x00018624 Section 0 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + hal_i2c_slave_irq_callback 0x00018625 Thumb Code 354 hal_i2c_slave.o(i.hal_i2c_slave_irq_callback) + i.hal_internal_init_memc 0x00018798 Section 0 hal_internal_vsync.o(i.hal_internal_init_memc) + i.hal_internal_sync_get_fb_setting 0x00018894 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + i.hal_internal_sync_get_hight_performan_mode 0x000188a4 Section 0 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + i.hal_internal_sync_input_resolution_change_ex 0x000188b4 Section 0 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) + i.hal_internal_update_dpi_param 0x00018a88 Section 0 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + i.hal_internal_video_mode_auto_sync 0x00018a98 Section 0 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + i.hal_internal_vsync_deinit 0x00018ba4 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + i.hal_internal_vsync_get_rx_state 0x00018bcc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + i.hal_internal_vsync_get_sync_line 0x00018bd8 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + i.hal_internal_vsync_get_tear_mode 0x00018bf0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + i.hal_internal_vsync_get_tx_state 0x00018bfc Section 0 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + i.hal_internal_vsync_init_rx 0x00018c08 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + i.hal_internal_vsync_init_tx 0x00018d20 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + i.hal_internal_vsync_set_auto_hw_filter 0x00018dd0 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + i.hal_internal_vsync_set_rx_state 0x00018eec Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + i.hal_internal_vsync_set_sync_line 0x00018f00 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + i.hal_internal_vsync_set_tear_mode 0x00018f24 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + i.hal_internal_vsync_set_tx_state 0x00018f74 Section 0 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + i.hal_lcdc_config_ccm 0x00018ff4 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + hal_lcdc_config_ccm 0x00018ff5 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_ccm) + i.hal_lcdc_config_remains 0x00019018 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + hal_lcdc_config_remains 0x00019019 Thumb Code 84 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_remains) + i.hal_lcdc_config_rgb_to_pentile 0x00019070 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + hal_lcdc_config_rgb_to_pentile 0x00019071 Thumb Code 14 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_rgb_to_pentile) + i.hal_lcdc_config_upscaler 0x00019084 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + hal_lcdc_config_upscaler 0x00019085 Thumb Code 348 hal_dsi_tx_ctrl.o(i.hal_lcdc_config_upscaler) + i.hal_lcdc_init_cfg 0x000191e8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + hal_lcdc_init_cfg 0x000191e9 Thumb Code 60 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_cfg) + i.hal_lcdc_init_clk 0x00019228 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + hal_lcdc_init_clk 0x00019229 Thumb Code 422 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_clk) + i.hal_lcdc_init_interrupt 0x000193d8 Section 0 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + hal_lcdc_init_interrupt 0x000193d9 Thumb Code 58 hal_dsi_tx_ctrl.o(i.hal_lcdc_init_interrupt) + i.hal_spi_m_clear_rxfifo 0x00019418 Section 0 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + i.hal_swire_deinit 0x00019426 Section 0 hal_swire.o(i.hal_swire_deinit) + i.hal_swire_open 0x00019438 Section 0 hal_swire.o(i.hal_swire_open) + i.hal_system_enable_systick 0x0001944e Section 0 hal_system.o(i.hal_system_enable_systick) + i.hal_system_init 0x00019458 Section 0 hal_system.o(i.hal_system_init) + i.hal_system_init_console 0x000194e0 Section 0 hal_system.o(i.hal_system_init_console) + i.hal_system_set_phy_calibration 0x000194fc Section 0 hal_system.o(i.hal_system_set_phy_calibration) + i.hal_system_set_pvd 0x00019504 Section 0 hal_system.o(i.hal_system_set_pvd) + i.hal_system_set_vcc 0x0001950c Section 0 hal_system.o(i.hal_system_set_vcc) + i.hal_timer_deinit 0x00019514 Section 0 hal_timer.o(i.hal_timer_deinit) + i.hal_timer_init 0x00019542 Section 0 hal_timer.o(i.hal_timer_init) + i.hal_timer_start 0x0001955c Section 0 hal_timer.o(i.hal_timer_start) + i.hal_timer_stop 0x000195a4 Section 0 hal_timer.o(i.hal_timer_stop) + i.hal_uart_init 0x000195cc Section 0 hal_uart.o(i.hal_uart_init) + i.hal_uart_transmit_blocking 0x00019658 Section 0 hal_uart.o(i.hal_uart_transmit_blocking) + i.hal_vsync_reset_lcdc_scaler 0x00019668 Section 0 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + hal_vsync_reset_lcdc_scaler 0x00019669 Thumb Code 460 hal_internal_vsync.o(i.hal_vsync_reset_lcdc_scaler) + i.handle_init 0x00019844 Section 0 irq_redirect .o(i.handle_init) + i.init_mipi_tx 0x00019954 Section 0 ap_demo.o(i.init_mipi_tx) + init_mipi_tx 0x00019955 Thumb Code 92 ap_demo.o(i.init_mipi_tx) + i.init_panel 0x000199b4 Section 0 ap_demo.o(i.init_panel) + init_panel 0x000199b5 Thumb Code 146 ap_demo.o(i.init_panel) + i.main 0x00019a98 Section 0 main.o(i.main) + i.open_mipi_rx 0x00019aa4 Section 0 ap_demo.o(i.open_mipi_rx) + open_mipi_rx 0x00019aa5 Thumb Code 132 ap_demo.o(i.open_mipi_rx) + i.pps_update_handle 0x00019b40 Section 0 ap_demo.o(i.pps_update_handle) + pps_update_handle 0x00019b41 Thumb Code 52 ap_demo.o(i.pps_update_handle) + i.rx_get_dcs_packet_data 0x00019b78 Section 0 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + rx_get_dcs_packet_data 0x00019b79 Thumb Code 654 hal_internal_vsync.o(i.rx_get_dcs_packet_data) + i.rx_partial_update 0x00019f6c Section 0 hal_internal_vsync.o(i.rx_partial_update) + rx_partial_update 0x00019f6d Thumb Code 358 hal_internal_vsync.o(i.rx_partial_update) + i.rx_receive_packet 0x0001a0e4 Section 0 hal_internal_vsync.o(i.rx_receive_packet) + rx_receive_packet 0x0001a0e5 Thumb Code 128 hal_internal_vsync.o(i.rx_receive_packet) + i.rx_receive_pps 0x0001a170 Section 0 hal_internal_vsync.o(i.rx_receive_pps) + rx_receive_pps 0x0001a171 Thumb Code 268 hal_internal_vsync.o(i.rx_receive_pps) + i.rxbr_irq0_callback 0x0001a2f0 Section 0 hal_internal_vsync.o(i.rxbr_irq0_callback) + rxbr_irq0_callback 0x0001a2f1 Thumb Code 158 hal_internal_vsync.o(i.rxbr_irq0_callback) + i.rxbr_irq1_callback 0x0001a394 Section 0 hal_internal_vsync.o(i.rxbr_irq1_callback) + rxbr_irq1_callback 0x0001a395 Thumb Code 316 hal_internal_vsync.o(i.rxbr_irq1_callback) + i.send_panel_init_code 0x0001a568 Section 0 ap_demo.o(i.send_panel_init_code) + send_panel_init_code 0x0001a569 Thumb Code 36 ap_demo.o(i.send_panel_init_code) + i.soft_gen_te 0x0001a58c Section 0 hal_internal_vsync.o(i.soft_gen_te) + soft_gen_te 0x0001a58d Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te) + i.soft_gen_te_double_buffer 0x0001a650 Section 0 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + soft_gen_te_double_buffer 0x0001a651 Thumb Code 166 hal_internal_vsync.o(i.soft_gen_te_double_buffer) + i.soft_timer3_cb 0x0001a710 Section 0 ap_demo.o(i.soft_timer3_cb) + soft_timer3_cb 0x0001a711 Thumb Code 36 ap_demo.o(i.soft_timer3_cb) + i.sqrt 0x0001a740 Section 0 sqrt.o(i.sqrt) + i.tx_display_on 0x0001a788 Section 0 ap_demo.o(i.tx_display_on) + tx_display_on 0x0001a789 Thumb Code 44 ap_demo.o(i.tx_display_on) + i.tx_panel_reset 0x0001a7ec Section 0 ap_demo.o(i.tx_panel_reset) + tx_panel_reset 0x0001a7ed Thumb Code 40 ap_demo.o(i.tx_panel_reset) + i.vidc_callback 0x0001a814 Section 0 hal_internal_vsync.o(i.vidc_callback) + vidc_callback 0x0001a815 Thumb Code 232 hal_internal_vsync.o(i.vidc_callback) + i.vpre_err_reset 0x0001a91c Section 0 hal_internal_vsync.o(i.vpre_err_reset) + vpre_err_reset 0x0001a91d Thumb Code 184 hal_internal_vsync.o(i.vpre_err_reset) + i.vsync_set_te_mode 0x0001a9ec Section 0 hal_internal_vsync.o(i.vsync_set_te_mode) + vsync_set_te_mode 0x0001a9ed Thumb Code 300 hal_internal_vsync.o(i.vsync_set_te_mode) + .constdata 0x0001abb8 Section 10570 ap_demo.o(.constdata) + g_cus_rx_dcs_execute_table 0x0001abb8 Data 120 ap_demo.o(.constdata) + .constdata 0x0001d502 Section 3990 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001e498 Section 1 app_tp_for_custom_s8.o(.constdata) + .constdata 0x0001e49c Section 36 hal_dsi_tx_ctrl.o(.constdata) + .constdata 0x0001e4c0 Section 210 hal_gpio.o(.constdata) + s_gpio_map 0x0001e4c0 Data 120 hal_gpio.o(.constdata) + s_gpio_perf 0x0001e538 Data 90 hal_gpio.o(.constdata) + .constdata 0x0001e594 Section 32 hal_i2c_slave.o(.constdata) + sg_i2c_s_config 0x0001e594 Data 32 hal_i2c_slave.o(.constdata) + .constdata 0x0001e5b4 Section 8 drv_param_init.o(.constdata) + .constdata 0x0001e5bc Section 390 drv_phy_common.o(.constdata) + phy_para_mapping_h 0x0001e5bc Data 184 drv_phy_common.o(.constdata) + phy_para_mapping_l 0x0001e674 Data 128 drv_phy_common.o(.constdata) + phy_data_high_map 0x0001e6f4 Data 48 drv_phy_common.o(.constdata) + phy_data_lp_map 0x0001e724 Data 30 drv_phy_common.o(.constdata) + .conststring 0x0001e744 Section 72 hal_dsi_rx_ctrl.o(.conststring) + .conststring 0x0001e78c Section 67 hal_dsi_tx_ctrl.o(.conststring) + .conststring 0x0001e7d0 Section 224 hal_internal_vsync.o(.conststring) + .ARM.__AT_0x00070100 0x00070100 Section 192 irq_redirect .o(.ARM.__AT_0x00070100) + .data 0x000701d0 Section 548 ap_demo.o(.data) + g_need_enter_sleep_mode 0x000701d0 Data 1 ap_demo.o(.data) + g_calibration_flag 0x000701d1 Data 1 ap_demo.o(.data) + hbm_mode 0x000701d2 Data 1 ap_demo.o(.data) + start_display_on 0x000701d3 Data 1 ap_demo.o(.data) + g_exit_sleep_mode 0x000701d4 Data 1 ap_demo.o(.data) + panel_display_done 0x000701d5 Data 1 ap_demo.o(.data) + R60_Parma_backup 0x000701d8 Data 1 ap_demo.o(.data) + read_bl_data 0x000701dc Data 2 ap_demo.o(.data) + read_bl_data_bak 0x000701de Data 2 ap_demo.o(.data) + g_rx_ctrl_handle 0x000701e8 Data 4 ap_demo.o(.data) + g_tx_ctrl_handle 0x000701ec Data 4 ap_demo.o(.data) + value_reg_df 0x000701f0 Data 4 ap_demo.o(.data) + .data 0x000703f4 Section 46 app_tp_transfer.o(.data) + s_spim_write 0x000703f4 Data 1 app_tp_transfer.o(.data) + s_screen_int_flag 0x000703f5 Data 1 app_tp_transfer.o(.data) + s_phone_reset_flag 0x000703f6 Data 1 app_tp_transfer.o(.data) + s_screen_int_transfer_status 0x000703f7 Data 1 app_tp_transfer.o(.data) + s_screen_const_transfer_count 0x000703f9 Data 1 app_tp_transfer.o(.data) + screen_int_transfer_count 0x000703fa Data 1 app_tp_transfer.o(.data) + screen_int_transfer_buffer_ready 0x000703fb Data 1 app_tp_transfer.o(.data) + .data 0x00070422 Section 5766 app_tp_for_custom_s8.o(.data) + fingerprint_enable 0x0007042d Data 1 app_tp_for_custom_s8.o(.data) + app_tp_count 0x0007042e Data 1 app_tp_for_custom_s8.o(.data) + phone_85_flag 0x0007042f Data 1 app_tp_for_custom_s8.o(.data) + phone_E4_flag 0x00070430 Data 1 app_tp_for_custom_s8.o(.data) + phone_72_flag 0x00070431 Data 1 app_tp_for_custom_s8.o(.data) + phone_75_flag 0x00070432 Data 1 app_tp_for_custom_s8.o(.data) + phone_92_flag 0x00070433 Data 1 app_tp_for_custom_s8.o(.data) + phone_74_flag 0x00070434 Data 1 app_tp_for_custom_s8.o(.data) + u16CoordY 0x00070438 Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX 0x0007043a Data 2 app_tp_for_custom_s8.o(.data) + u16CoordY_back 0x0007043c Data 2 app_tp_for_custom_s8.o(.data) + u16CoordX_back 0x0007043e Data 2 app_tp_for_custom_s8.o(.data) + .data 0x00071aa8 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00071aa9 Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00071aaa Section 1 app_tp_for_custom_s8.o(.data) + .data 0x00071aab Section 3 app_tp_for_custom_s8.o(.data) + .data 0x00071aae Section 5 app_tp_for_custom_s8.o(.data) + .data 0x00071ab4 Section 48 app_tp_for_custom_s8.o(.data) + .data 0x00071ae4 Section 8 hal_dsi_rx_ctrl.o(.data) + g_hw_auto_filter 0x00071ae4 Data 1 hal_dsi_rx_ctrl.o(.data) + g_esc_clk 0x00071ae8 Data 4 hal_dsi_rx_ctrl.o(.data) + .data 0x00071aec Section 3 hal_dsi_tx_ctrl.o(.data) + g_tx_vcom_en 0x00071aec Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_vpg_en 0x00071aed Data 1 hal_dsi_tx_ctrl.o(.data) + g_tx_mode 0x00071aee Data 1 hal_dsi_tx_ctrl.o(.data) + .data 0x00071aef Section 1 hal_i2c_master.o(.data) + s_i2c_m_transfer_end 0x00071aef Data 1 hal_i2c_master.o(.data) + .data 0x00071af0 Section 32 hal_i2c_slave.o(.data) + s_txbuffer_complate 0x00071af0 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_dma_end 0x00071af1 Data 1 hal_i2c_slave.o(.data) + s_i2c_s_receive_cnt 0x00071af2 Data 1 hal_i2c_slave.o(.data) + sg_i2c_s_index 0x00071af3 Data 1 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer 0x00071af4 Data 4 hal_i2c_slave.o(.data) + s_hal_slave_rxbuffer_size 0x00071af8 Data 4 hal_i2c_slave.o(.data) + hal_i2c_s_callback 0x00071afc Data 4 hal_i2c_slave.o(.data) + sg_tx_byte_num 0x00071b00 Data 4 hal_i2c_slave.o(.data) + s_receive_count 0x00071b04 Data 4 hal_i2c_slave.o(.data) + s_tx_buffer_t 0x00071b08 Data 4 hal_i2c_slave.o(.data) + tx_sum 0x00071b0c Data 4 hal_i2c_slave.o(.data) + .data 0x00071b10 Section 18 norflash.o(.data) + tmprg 0x00071b18 Data 4 norflash.o(.data) + .data 0x00071b24 Section 12 drv_common.o(.data) + s_my_tick 0x00071b24 Data 4 drv_common.o(.data) + .data 0x00071b30 Section 4 drv_gpio.o(.data) + g_ap_reset_cb 0x00071b30 Data 4 drv_gpio.o(.data) + .data 0x00071b34 Section 8 drv_i2c_dma.o(.data) + i2c0_dma_callback 0x00071b34 Data 4 drv_i2c_dma.o(.data) + i2c1_dma_callback 0x00071b38 Data 4 drv_i2c_dma.o(.data) + .data 0x00071b3c Section 4 drv_i2c_master.o(.data) + i2c1_intr_callback 0x00071b3c Data 4 drv_i2c_master.o(.data) + .data 0x00071b40 Section 4 drv_i2c_slave.o(.data) + i2c0_intr_callback 0x00071b40 Data 4 drv_i2c_slave.o(.data) + .data 0x00071b44 Section 1188 drv_param_init.o(.data) + .data 0x00071fe8 Section 12 drv_pwm.o(.data) + s_pwm_type 0x00071fe8 Data 1 drv_pwm.o(.data) + s_pwm_cb 0x00071fec Data 8 drv_pwm.o(.data) + .data 0x00071ff4 Section 4 drv_spi_master.o(.data) + SPIM_intr_callback 0x00071ff4 Data 4 drv_spi_master.o(.data) + .data 0x00071ff8 Section 8 drv_swire.o(.data) + s_swire_cb 0x00071ff8 Data 8 drv_swire.o(.data) + .data 0x00072000 Section 1 drv_sys_cfg.o(.data) + sg_ap_rstn_trigger_type 0x00072000 Data 1 drv_sys_cfg.o(.data) + .data 0x00072004 Section 80 drv_timer.o(.data) + sg_timer_info 0x00072004 Data 80 drv_timer.o(.data) + .data 0x00072054 Section 12 hal_internal_vsync.o(.data) + sg_cmd_mode_tx_start 0x00072054 Data 1 hal_internal_vsync.o(.data) + sg_cur_te_info 0x00072058 Data 4 hal_internal_vsync.o(.data) + .data 0x00072060 Section 8 drv_rxbr.o(.data) + .data 0x00072068 Section 4 drv_vidc.o(.data) + .data 0x0007206c Section 1 drv_phy_common.o(.data) + g_phy_calibration 0x0007206c Data 1 drv_phy_common.o(.data) + .data 0x00072070 Section 12 drv_chip_info.o(.data) + sg_chip_info 0x00072070 Data 4 drv_chip_info.o(.data) + sg_chip_function 0x00072074 Data 4 drv_chip_info.o(.data) + sg_chip_encrypt 0x00072078 Data 4 drv_chip_info.o(.data) + .data 0x0007207c Section 8 drv_uart.o(.data) + s_UartFcrReg 0x0007207c Data 4 drv_uart.o(.data) + uart_userData 0x00072080 Data 4 drv_uart.o(.data) + .data 0x00072084 Section 12 drv_wdg.o(.data) + sg_wdg_repeat 0x00072084 Data 1 drv_wdg.o(.data) + sg_wdg_cb 0x00072088 Data 8 drv_wdg.o(.data) + .data 0x00072090 Section 4 stdout.o(.data) + .data 0x00072094 Section 4 errno.o(.data) + _errno 0x00072094 Data 4 errno.o(.data) + .bss 0x00072098 Section 400 app_tp_transfer.o(.bss) + s_screen_read_buffer 0x00072098 Data 200 app_tp_transfer.o(.bss) + s_phone_read_buffer 0x00072160 Data 200 app_tp_transfer.o(.bss) + .bss 0x00072228 Section 654 app_tp_for_custom_s8.o(.bss) + .bss 0x000724b8 Section 196 hal_dsi_rx_ctrl.o(.bss) + g_rx_ctrl_handle 0x000724b8 Data 196 hal_dsi_rx_ctrl.o(.bss) + .bss 0x0007257c Section 76 hal_dsi_tx_ctrl.o(.bss) + g_tx_ctrl_handle 0x0007257c Data 76 hal_dsi_tx_ctrl.o(.bss) + .bss 0x000725c8 Section 256 tau_log.o(.bss) + .bss 0x000726c8 Section 208 hal_uart.o(.bss) + .bss 0x00072798 Section 28 drv_dma.o(.bss) + s_dma_handle 0x00072798 Data 28 drv_dma.o(.bss) + .bss 0x000727b4 Section 64 drv_gpio.o(.bss) + s_gpio_cb 0x000727b4 Data 64 drv_gpio.o(.bss) + .bss 0x000727f4 Section 320 drv_i2c_dma.o(.bss) + i2c0_dma_slave_handle 0x000727f4 Data 160 drv_i2c_dma.o(.bss) + i2c1_dma_master_handle 0x00072894 Data 160 drv_i2c_dma.o(.bss) + .bss 0x00072934 Section 2436 hal_internal_vsync.o(.bss) + g_imm_buffer 0x00073198 Data 255 hal_internal_vsync.o(.bss) + sg_te_info 0x00073298 Data 12 hal_internal_vsync.o(.bss) + g_imm_packet 0x000732a4 Data 20 hal_internal_vsync.o(.bss) + .bss 0x000732b8 Section 4144 dcs_packet_fifo.o(.bss) + .bss 0x000742e8 Section 32 hal_spi_slave.o(.bss) + STACK 0x00074308 Section 4096 startup_armcm0.o(STACK) + + Global Symbols + + Symbol Name Value Ov Type Size Object(Section) + + BuildAttributes$$THM_ISAv3M$S$PE$A:L22$X:L11$S22$IEEE1$IW$USESV6$~STKCKD$USESV7$~SHL$OTIME$ROPI$IEEEJ$EBA8$MICROLIB$REQ8$PRES8$EABIv2 0x00000000 Number 0 anon$$obj.o ABSOLUTE + __ARM_use_no_argv 0x00000000 Number 0 main.o ABSOLUTE + _printf_a 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_c 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_charcount 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_d 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_e 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_f 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_flags 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_fp_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_g 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_i 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_int_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_l 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ll 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lld 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_lli 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llo 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llu 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_llx 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_dec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_hex 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_longlong_oct 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_ls 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_mbtowc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_n 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_o 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_p 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_percent 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_pre_padding 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_return_value 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_s 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_sizespec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_str 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_signed 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_truncate_unsigned 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_u 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wc 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_wctomb 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_widthprec 0x00000000 Number 0 stubs.o ABSOLUTE + _printf_x 0x00000000 Number 0 stubs.o ABSOLUTE + __cpp_initialize__aeabi_ - Undefined Weak Reference + __cxa_finalize - Undefined Weak Reference + _clock_init - Undefined Weak Reference + _microlib_exit - Undefined Weak Reference + __Vectors_Size 0x000000c0 Number 0 startup_armcm0.o ABSOLUTE + __Vectors 0x00010000 Data 4 startup_armcm0.o(RESET) + __Vectors_End 0x000100c0 Data 0 startup_armcm0.o(RESET) + __main 0x000100c1 Thumb Code 0 entry.o(.ARM.Collect$$$$00000000) + _main_stk 0x000100c1 Thumb Code 0 entry2.o(.ARM.Collect$$$$00000001) + _main_scatterload 0x000100c5 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + __main_after_scatterload 0x000100c9 Thumb Code 0 entry5.o(.ARM.Collect$$$$00000004) + _main_clock 0x000100c9 Thumb Code 0 entry7b.o(.ARM.Collect$$$$00000008) + _main_cpp_init 0x000100c9 Thumb Code 0 entry8b.o(.ARM.Collect$$$$0000000A) + _main_init 0x000100c9 Thumb Code 0 entry9a.o(.ARM.Collect$$$$0000000B) + __rt_final_cpp 0x000100d1 Thumb Code 0 entry10a.o(.ARM.Collect$$$$0000000D) + __rt_final_exit 0x000100d1 Thumb Code 0 entry11a.o(.ARM.Collect$$$$0000000F) + Reset_Handler 0x000100d5 Thumb Code 28 startup_armcm0.o(.text) + NMI_Handler 0x000100f1 Thumb Code 2 startup_armcm0.o(.text) + SVC_Handler 0x000100f5 Thumb Code 2 startup_armcm0.o(.text) + PendSV_Handler 0x000100f7 Thumb Code 2 startup_armcm0.o(.text) + OTP_IRQn_Handler 0x00010123 Thumb Code 2 startup_armcm0.o(.text) + PVD_IRQn_Handler 0x00010127 Thumb Code 2 startup_armcm0.o(.text) + __aeabi_uidiv 0x0001014d Thumb Code 0 uidiv.o(.text) + __aeabi_uidivmod 0x0001014d Thumb Code 44 uidiv.o(.text) + __aeabi_idiv 0x00010179 Thumb Code 0 idiv.o(.text) + __aeabi_idivmod 0x00010179 Thumb Code 40 idiv.o(.text) + __aeabi_memcpy 0x000101a1 Thumb Code 36 memcpya.o(.text) + __aeabi_memcpy4 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memcpy8 0x000101a1 Thumb Code 0 memcpya.o(.text) + __aeabi_memset 0x000101c5 Thumb Code 14 memseta.o(.text) + __aeabi_memset4 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memset8 0x000101c5 Thumb Code 0 memseta.o(.text) + __aeabi_memclr 0x000101d3 Thumb Code 4 memseta.o(.text) + __aeabi_memclr4 0x000101d3 Thumb Code 0 memseta.o(.text) + __aeabi_memclr8 0x000101d3 Thumb Code 0 memseta.o(.text) + _memset$wrapper 0x000101d7 Thumb Code 18 memseta.o(.text) + __aeabi_fadd 0x000101e9 Thumb Code 162 fadd.o(.text) + __aeabi_fsub 0x0001028b Thumb Code 8 fadd.o(.text) + __aeabi_frsub 0x00010293 Thumb Code 8 fadd.o(.text) + __aeabi_fmul 0x0001029b Thumb Code 122 fmul.o(.text) + __aeabi_fdiv 0x00010315 Thumb Code 124 fdiv.o(.text) + __ARM_scalbnf 0x00010391 Thumb Code 24 fscalb.o(.text) + scalbnf 0x00010391 Thumb Code 0 fscalb.o(.text) + __aeabi_dadd 0x000103a9 Thumb Code 328 dadd.o(.text) + __aeabi_dsub 0x000104f1 Thumb Code 12 dadd.o(.text) + __aeabi_drsub 0x000104fd Thumb Code 12 dadd.o(.text) + __aeabi_dmul 0x0001050d Thumb Code 202 dmul.o(.text) + __aeabi_ddiv 0x000105dd Thumb Code 234 ddiv.o(.text) + __aeabi_i2f 0x000106cd Thumb Code 22 fflti.o(.text) + __aeabi_ui2f 0x000106e3 Thumb Code 14 ffltui.o(.text) + __aeabi_ui2d 0x000106f1 Thumb Code 24 dfltui.o(.text) + __aeabi_f2iz 0x0001070d Thumb Code 50 ffixi.o(.text) + __aeabi_f2uiz 0x0001073f Thumb Code 40 ffixui.o(.text) + __aeabi_d2iz 0x00010769 Thumb Code 62 dfixi.o(.text) + __aeabi_d2uiz 0x000107b1 Thumb Code 50 dfixui.o(.text) + __aeabi_f2d 0x000107ed Thumb Code 40 f2d.o(.text) + __aeabi_cdcmpeq 0x00010815 Thumb Code 0 cdcmple.o(.text) + __aeabi_cdcmple 0x00010815 Thumb Code 38 cdcmple.o(.text) + __aeabi_cfrcmple 0x0001083d Thumb Code 20 cfrcmple.o(.text) + __aeabi_uldivmod 0x00010851 Thumb Code 96 uldiv.o(.text) + __aeabi_llsl 0x000108b1 Thumb Code 32 llshl.o(.text) + _ll_shift_l 0x000108b1 Thumb Code 0 llshl.o(.text) + __aeabi_llsr 0x000108d1 Thumb Code 34 llushr.o(.text) + _ll_ushift_r 0x000108d1 Thumb Code 0 llushr.o(.text) + __aeabi_lasr 0x000108f3 Thumb Code 38 llsshr.o(.text) + _ll_sshift_r 0x000108f3 Thumb Code 0 llsshr.o(.text) + __I$use$fp 0x00010919 Thumb Code 0 iusefp.o(.text) + _float_round 0x00010919 Thumb Code 16 fepilogue.o(.text) + _float_epilogue 0x00010929 Thumb Code 114 fepilogue.o(.text) + _double_round 0x0001099b Thumb Code 26 depilogue.o(.text) + _double_epilogue 0x000109b5 Thumb Code 164 depilogue.o(.text) + _dsqrt 0x00010a59 Thumb Code 162 dsqrt.o(.text) + __aeabi_d2ulz 0x00010afd Thumb Code 54 dfixul.o(.text) + __aeabi_cdrcmple 0x00010b3d Thumb Code 38 cdrcmple.o(.text) + __scatterload 0x00010b65 Thumb Code 28 init.o(.text) + __scatterload_rt2 0x00010b65 Thumb Code 0 init.o(.text) + __decompress 0x00010b89 Thumb Code 0 __dclz77c.o(.text) + __decompress2 0x00010b89 Thumb Code 96 __dclz77c.o(.text) + ADC_IRQn_Handler 0x00010be9 Thumb Code 18 irq_redirect .o(i.ADC_IRQn_Handler) + AP_NRESET_IRQn_Handler 0x00010c01 Thumb Code 18 irq_redirect .o(i.AP_NRESET_IRQn_Handler) + DMA_IRQn_Handler 0x00010c19 Thumb Code 14 irq_redirect .o(i.DMA_IRQn_Handler) + EXTI_INT0_IRQn_Handler 0x00010c2d Thumb Code 22 irq_redirect .o(i.EXTI_INT0_IRQn_Handler) + EXTI_INT1_IRQn_Handler 0x00010c49 Thumb Code 22 irq_redirect .o(i.EXTI_INT1_IRQn_Handler) + EXTI_INT2_IRQn_Handler 0x00010c65 Thumb Code 22 irq_redirect .o(i.EXTI_INT2_IRQn_Handler) + EXTI_INT3_IRQn_Handler 0x00010c81 Thumb Code 22 irq_redirect .o(i.EXTI_INT3_IRQn_Handler) + EXTI_INT4_IRQn_Handler 0x00010c9d Thumb Code 22 irq_redirect .o(i.EXTI_INT4_IRQn_Handler) + EXTI_INT5_IRQn_Handler 0x00010cb9 Thumb Code 22 irq_redirect .o(i.EXTI_INT5_IRQn_Handler) + EXTI_INT6_IRQn_Handler 0x00010cd5 Thumb Code 22 irq_redirect .o(i.EXTI_INT6_IRQn_Handler) + EXTI_INT7_IRQn_Handler 0x00010cf1 Thumb Code 22 irq_redirect .o(i.EXTI_INT7_IRQn_Handler) + FLSCTRL_IRQn_Handler 0x00010d0d Thumb Code 14 irq_redirect .o(i.FLSCTRL_IRQn_Handler) + Gpio_swire_output 0x00010d21 Thumb Code 78 ap_demo.o(i.Gpio_swire_output) + HardFault_Handler 0x00010d71 Thumb Code 14 irq_redirect .o(i.HardFault_Handler) + I2C0_IRQn_Handler 0x00010d85 Thumb Code 18 irq_redirect .o(i.I2C0_IRQn_Handler) + I2C1_IRQn_Handler 0x00010d9d Thumb Code 18 irq_redirect .o(i.I2C1_IRQn_Handler) + LCDC_IRQn_Handler 0x00010db5 Thumb Code 18 irq_redirect .o(i.LCDC_IRQn_Handler) + LOG_printf 0x00010dcd Thumb Code 30 tau_log.o(i.LOG_printf) + MEMC_IRQn_Handler 0x00010df5 Thumb Code 18 irq_redirect .o(i.MEMC_IRQn_Handler) + MIPI_RX_IRQn_Handler 0x00010e0d Thumb Code 18 irq_redirect .o(i.MIPI_RX_IRQn_Handler) + MIPI_TX_IRQn_Handler 0x00010e25 Thumb Code 18 irq_redirect .o(i.MIPI_TX_IRQn_Handler) + PWMDET_IRQn_Handler 0x00010e3d Thumb Code 22 irq_redirect .o(i.PWMDET_IRQn_Handler) + S20_Start_init 0x00010e59 Thumb Code 270 app_tp_transfer.o(i.S20_Start_init) + SPIM_IRQn_Handler 0x00010f7d Thumb Code 22 irq_redirect .o(i.SPIM_IRQn_Handler) + SPIS_IRQn_Handler 0x00010f99 Thumb Code 22 irq_redirect .o(i.SPIS_IRQn_Handler) + SWIRE_IRQn_Handler 0x00010fb5 Thumb Code 22 irq_redirect .o(i.SWIRE_IRQn_Handler) + SysTick_Handler 0x00010fd1 Thumb Code 18 irq_redirect .o(i.SysTick_Handler) + TIMER0_IRQn_Handler 0x00010fe9 Thumb Code 18 irq_redirect .o(i.TIMER0_IRQn_Handler) + s_RAM_CK 0x00011000 Data 20 drv_common.o(.ARM.__at_0x11000) + UART_DisableDma 0x00011015 Thumb Code 2 drv_uart.o(i.UART_DisableDma) + __scatterload_null 0x00011017 Thumb Code 2 handlers.o(i.__scatterload_null) + s_debug_state 0x00011018 Data 4 drv_common.o(.ARM.__at_0x11018) + TIMER1_IRQn_Handler 0x0001101d Thumb Code 18 irq_redirect .o(i.TIMER1_IRQn_Handler) + TIMER2_IRQn_Handler 0x00011035 Thumb Code 18 irq_redirect .o(i.TIMER2_IRQn_Handler) + TIMER3_IRQn_Handler 0x0001104d Thumb Code 18 irq_redirect .o(i.TIMER3_IRQn_Handler) + UART0_IRQ_Handle 0x00011065 Thumb Code 20 drv_uart.o(i.UART0_IRQ_Handle) + UART_GetInstance 0x00011081 Thumb Code 4 drv_uart.o(i.UART_GetInstance) + UART_IRQn_Handler 0x00011085 Thumb Code 18 irq_redirect .o(i.UART_IRQn_Handler) + UART_ResetRxFIFO 0x0001109d Thumb Code 32 drv_uart.o(i.UART_ResetRxFIFO) + UART_SetBaudRate 0x000110c1 Thumb Code 72 drv_uart.o(i.UART_SetBaudRate) + UART_SwitchSCLK 0x00011109 Thumb Code 26 drv_uart.o(i.UART_SwitchSCLK) + UART_TransferHandleIRQ 0x00011123 Thumb Code 308 drv_uart.o(i.UART_TransferHandleIRQ) + UART_WriteBlocking 0x00011257 Thumb Code 26 drv_uart.o(i.UART_WriteBlocking) + UART_init 0x00011271 Thumb Code 182 drv_uart.o(i.UART_init) + VIDC_IRQn_Handler 0x0001132d Thumb Code 18 irq_redirect .o(i.VIDC_IRQn_Handler) + VPRE_IRQn_Handler 0x00011345 Thumb Code 18 irq_redirect .o(i.VPRE_IRQn_Handler) + WDG_IRQn_Handler 0x0001135d Thumb Code 18 irq_redirect .o(i.WDG_IRQn_Handler) + __0printf 0x00011375 Thumb Code 24 printfa.o(i.__0printf) + __1printf 0x00011375 Thumb Code 0 printfa.o(i.__0printf) + __2printf 0x00011375 Thumb Code 0 printfa.o(i.__0printf) + __c89printf 0x00011375 Thumb Code 0 printfa.o(i.__0printf) + printf 0x00011375 Thumb Code 0 printfa.o(i.__0printf) + __0vsprintf 0x00011395 Thumb Code 30 printfa.o(i.__0vsprintf) + __1vsprintf 0x00011395 Thumb Code 0 printfa.o(i.__0vsprintf) + __2vsprintf 0x00011395 Thumb Code 0 printfa.o(i.__0vsprintf) + __c89vsprintf 0x00011395 Thumb Code 0 printfa.o(i.__0vsprintf) + vsprintf 0x00011395 Thumb Code 0 printfa.o(i.__0vsprintf) + __ARM_clz 0x000113b9 Thumb Code 46 depilogue.o(i.__ARM_clz) + __ARM_common_switch8 0x000113e7 Thumb Code 26 hal_dsi_rx_ctrl.o(i.__ARM_common_switch8) + __scatterload_copy 0x000114ad Thumb Code 14 handlers.o(i.__scatterload_copy) + __scatterload_zeroinit 0x000114bb Thumb Code 14 handlers.o(i.__scatterload_zeroinit) + __set_errno 0x000114c9 Thumb Code 6 errno.o(i.__set_errno) + ap_demo 0x00012151 Thumb Code 316 ap_demo.o(i.ap_demo) + ap_tp_calibration 0x000125d1 Thumb Code 170 app_tp_transfer.o(i.ap_tp_calibration) + app_ADC_IRQn_Handler 0x000126b1 Thumb Code 22 drv_rxbr.o(i.app_ADC_IRQn_Handler) + app_AP_NRESET_IRQn_Handler 0x000126cd Thumb Code 32 drv_gpio.o(i.app_AP_NRESET_IRQn_Handler) + app_EXTI_INT0_IRQn_Handler 0x000126f1 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT0_IRQn_Handler) + app_EXTI_INT1_IRQn_Handler 0x0001270d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT1_IRQn_Handler) + app_EXTI_INT2_IRQn_Handler 0x00012729 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT2_IRQn_Handler) + app_EXTI_INT3_IRQn_Handler 0x00012745 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT3_IRQn_Handler) + app_EXTI_INT4_IRQn_Handler 0x00012761 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT4_IRQn_Handler) + app_EXTI_INT5_IRQn_Handler 0x0001277d Thumb Code 22 drv_gpio.o(i.app_EXTI_INT5_IRQn_Handler) + app_EXTI_INT6_IRQn_Handler 0x00012799 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT6_IRQn_Handler) + app_EXTI_INT7_IRQn_Handler 0x000127b5 Thumb Code 22 drv_gpio.o(i.app_EXTI_INT7_IRQn_Handler) + app_HardFault_Handler 0x000127d1 Thumb Code 12 drv_common.o(i.app_HardFault_Handler) + app_I2C0_IRQn_Handler 0x00012819 Thumb Code 14 drv_i2c_slave.o(i.app_I2C0_IRQn_Handler) + app_I2C1_IRQn_Handler 0x00012831 Thumb Code 8 drv_i2c_master.o(i.app_I2C1_IRQn_Handler) + app_LCDC_IRQn_Handler 0x00012841 Thumb Code 208 hal_internal_vsync.o(i.app_LCDC_IRQn_Handler) + app_MEMC_IRQn_Handler 0x000129e5 Thumb Code 132 drv_memc.o(i.app_MEMC_IRQn_Handler) + app_MIPI_RX_IRQn_Handler 0x00012a6d Thumb Code 232 drv_dsi_rx.o(i.app_MIPI_RX_IRQn_Handler) + app_MIPI_TX_IRQn_Handler 0x00012d05 Thumb Code 56 drv_dsi_tx.o(i.app_MIPI_TX_IRQn_Handler) + app_PWMDET_IRQn_Handler 0x00012da5 Thumb Code 62 drv_pwm.o(i.app_PWMDET_IRQn_Handler) + app_SPIM_IRQn_Handler 0x00012ded Thumb Code 34 drv_spi_master.o(i.app_SPIM_IRQn_Handler) + app_SPIS_IRQn_Handler 0x00012e1d Thumb Code 500 hal_spi_slave.o(i.app_SPIS_IRQn_Handler) + app_SWIRE_IRQn_Handler 0x0001301d Thumb Code 28 drv_swire.o(i.app_SWIRE_IRQn_Handler) + app_SysTick_Handler 0x0001303d Thumb Code 20 drv_common.o(i.app_SysTick_Handler) + app_TIMER0_IRQn_Handler 0x00013055 Thumb Code 10 drv_timer.o(i.app_TIMER0_IRQn_Handler) + app_TIMER1_IRQn_Handler 0x0001305f Thumb Code 10 drv_timer.o(i.app_TIMER1_IRQn_Handler) + app_TIMER2_IRQn_Handler 0x00013069 Thumb Code 10 drv_timer.o(i.app_TIMER2_IRQn_Handler) + app_TIMER3_IRQn_Handler 0x00013073 Thumb Code 10 drv_timer.o(i.app_TIMER3_IRQn_Handler) + app_UART_IRQn_Handler 0x0001307d Thumb Code 8 drv_uart.o(i.app_UART_IRQn_Handler) + app_VIDC_IRQn_Handler 0x00013085 Thumb Code 22 drv_vidc.o(i.app_VIDC_IRQn_Handler) + app_VPRE_IRQn_Handler 0x000130a1 Thumb Code 22 drv_rxbr.o(i.app_VPRE_IRQn_Handler) + app_WDG_IRQn_Handler 0x000130bd Thumb Code 52 drv_wdg.o(i.app_WDG_IRQn_Handler) + app_dma_irq_handler 0x000130f5 Thumb Code 10 drv_dma.o(i.app_dma_irq_handler) + app_fls_ctrl_Handler 0x00013105 Thumb Code 38 norflash.o(i.app_fls_ctrl_Handler) + app_tp_I2C_init 0x00013135 Thumb Code 26 app_tp_transfer.o(i.app_tp_I2C_init) + app_tp_calibration_exec 0x00013159 Thumb Code 30 ap_demo.o(i.app_tp_calibration_exec) + app_tp_init 0x000131c5 Thumb Code 56 app_tp_transfer.o(i.app_tp_init) + app_tp_m_transfer_complate 0x00013229 Thumb Code 8 app_tp_transfer.o(i.app_tp_m_transfer_complate) + app_tp_phone_analysis_data 0x00013239 Thumb Code 910 app_tp_for_custom_s8.o(i.app_tp_phone_analysis_data) + app_tp_s_read 0x00013609 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_read) + app_tp_s_write 0x00013611 Thumb Code 8 app_tp_transfer.o(i.app_tp_s_write) + app_tp_screen_analysis_int 0x00013619 Thumb Code 844 app_tp_for_custom_s8.o(i.app_tp_screen_analysis_int) + app_tp_screen_init 0x00013979 Thumb Code 42 app_tp_transfer.o(i.app_tp_screen_init) + app_tp_transfer_screen_int 0x00013a79 Thumb Code 242 app_tp_transfer.o(i.app_tp_transfer_screen_int) + app_tp_transfer_screen_start 0x00013b7d Thumb Code 16 app_tp_transfer.o(i.app_tp_transfer_screen_start) + board_Init 0x00013b91 Thumb Code 30 board.o(i.board_Init) + calc_framebuffer_setting 0x00013bb5 Thumb Code 1258 hal_internal_vsync.o(i.calc_framebuffer_setting) + ceil 0x000140a5 Thumb Code 180 ceil.o(i.ceil) + dcs_packet_fifo_alloc 0x0001422d Thumb Code 80 dcs_packet_fifo.o(i.dcs_packet_fifo_alloc) + dcs_packet_fifo_init 0x00014285 Thumb Code 18 dcs_packet_fifo.o(i.dcs_packet_fifo_init) + dcs_packet_free_fifo_header 0x0001429d Thumb Code 60 dcs_packet_fifo.o(i.dcs_packet_free_fifo_header) + dcs_packet_get_fifo_header 0x000142e1 Thumb Code 26 dcs_packet_fifo.o(i.dcs_packet_get_fifo_header) + delayMs 0x00014321 Thumb Code 24 tau_delay.o(i.delayMs) + delayUs 0x00014339 Thumb Code 34 tau_delay.o(i.delayUs) + drv_ap_rst_trig_edge_detect 0x0001435d Thumb Code 46 drv_sys_cfg.o(i.drv_ap_rst_trig_edge_detect) + drv_chip_info_get_info 0x00014395 Thumb Code 6 drv_chip_info.o(i.drv_chip_info_get_info) + drv_chip_info_init 0x000143a1 Thumb Code 56 drv_chip_info.o(i.drv_chip_info_init) + drv_chip_rx_info_check 0x000143e1 Thumb Code 98 drv_chip_info.o(i.drv_chip_rx_info_check) + drv_chip_rx_init_done 0x00014491 Thumb Code 16 drv_chip_info.o(i.drv_chip_rx_init_done) + drv_common_enable_systick 0x000144a5 Thumb Code 70 drv_common.o(i.drv_common_enable_systick) + drv_common_system_init 0x000144fd Thumb Code 8 drv_common.o(i.drv_common_system_init) + drv_crgu_config_reset_modules 0x00014505 Thumb Code 10 drv_crgu.o(i.drv_crgu_config_reset_modules) + drv_crgu_set_ahb_pre_div 0x00014515 Thumb Code 14 drv_crgu.o(i.drv_crgu_set_ahb_pre_div) + drv_crgu_set_ahb_src 0x00014529 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_ahb_src) + drv_crgu_set_clock 0x0001453d Thumb Code 26 drv_crgu.o(i.drv_crgu_set_clock) + drv_crgu_set_dpi_mux_src 0x0001455d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_mux_src) + drv_crgu_set_dpi_pre_div 0x00014571 Thumb Code 18 drv_crgu.o(i.drv_crgu_set_dpi_pre_div) + drv_crgu_set_dpi_pre_src 0x00014589 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dpi_pre_src) + drv_crgu_set_dsc_core_div 0x0001459d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsc_core_div) + drv_crgu_set_dsco_src 0x000145b1 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src) + drv_crgu_set_dsco_src_div 0x000145c5 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_dsco_src_div) + drv_crgu_set_fb_div 0x000145d9 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_div) + drv_crgu_set_fb_src 0x000145ed Thumb Code 16 drv_crgu.o(i.drv_crgu_set_fb_src) + drv_crgu_set_lcdc_div 0x00014601 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_div) + drv_crgu_set_lcdc_src 0x00014615 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_lcdc_src) + drv_crgu_set_mipi_cfg_src 0x00014629 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_mipi_cfg_src) + drv_crgu_set_mipi_ref_src 0x0001463d Thumb Code 18 drv_crgu.o(i.drv_crgu_set_mipi_ref_src) + drv_crgu_set_reset 0x00014655 Thumb Code 20 drv_crgu.o(i.drv_crgu_set_reset) + drv_crgu_set_rxbr_div 0x0001466d Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_div) + drv_crgu_set_rxbr_src 0x00014681 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_rxbr_src) + drv_crgu_set_vidc_src 0x00014695 Thumb Code 16 drv_crgu.o(i.drv_crgu_set_vidc_src) + drv_dma_clear_flag 0x000146a9 Thumb Code 24 drv_dma.o(i.drv_dma_clear_flag) + drv_dma_create_handle 0x000146c1 Thumb Code 22 drv_dma.o(i.drv_dma_create_handle) + drv_dma_disenable_channel 0x000146dd Thumb Code 16 drv_dma.o(i.drv_dma_disenable_channel) + drv_dma_enable_channel 0x000146ed Thumb Code 16 drv_dma.o(i.drv_dma_enable_channel) + drv_dma_enable_channel_interrupts 0x000146fd Thumb Code 32 drv_dma.o(i.drv_dma_enable_channel_interrupts) + drv_dma_get_channel_flag 0x00014721 Thumb Code 12 drv_dma.o(i.drv_dma_get_channel_flag) + drv_dma_irq_handler 0x0001472d Thumb Code 138 drv_dma.o(i.drv_dma_irq_handler) + drv_dma_prepar_transfer 0x000147bd Thumb Code 18 drv_dma.o(i.drv_dma_prepar_transfer) + drv_dma_set_burst 0x000147cf Thumb Code 26 drv_dma.o(i.drv_dma_set_burst) + drv_dma_set_callback 0x000147e9 Thumb Code 6 drv_dma.o(i.drv_dma_set_callback) + drv_dma_set_transfer 0x000147f1 Thumb Code 62 drv_dma.o(i.drv_dma_set_transfer) + drv_dsc_dec_convert_pps_rc_parameter 0x00014835 Thumb Code 54 drv_dsc_dec.o(i.drv_dsc_dec_convert_pps_rc_parameter) + drv_dsc_dec_disable 0x0001486b Thumb Code 12 drv_dsc_dec.o(i.drv_dsc_dec_disable) + drv_dsc_dec_enable 0x00014879 Thumb Code 88 drv_dsc_dec.o(i.drv_dsc_dec_enable) + drv_dsc_dec_get_nslc 0x000148ed Thumb Code 10 drv_dsc_dec.o(i.drv_dsc_dec_get_nslc) + drv_dsc_dec_set_u8_pps 0x000148f7 Thumb Code 40 drv_dsc_dec.o(i.drv_dsc_dec_set_u8_pps) + drv_dsi_rx_calc_ipi_tx_delay 0x00014921 Thumb Code 244 drv_dsi_rx.o(i.drv_dsi_rx_calc_ipi_tx_delay) + drv_dsi_rx_enable_irq 0x00014a25 Thumb Code 58 drv_dsi_rx.o(i.drv_dsi_rx_enable_irq) + drv_dsi_rx_get_compression_en 0x00014ad1 Thumb Code 8 drv_dsi_rx.o(i.drv_dsi_rx_get_compression_en) + drv_dsi_rx_get_max_ret_size 0x00014ad9 Thumb Code 6 drv_dsi_rx.o(i.drv_dsi_rx_get_max_ret_size) + drv_dsi_rx_power_up 0x00014adf Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_power_up) + drv_dsi_rx_set_ctrl_cfg 0x00014aed Thumb Code 32 drv_dsi_rx.o(i.drv_dsi_rx_set_ctrl_cfg) + drv_dsi_rx_set_ddi_cfg 0x00014b0d Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ddi_cfg) + drv_dsi_rx_set_inten 0x00014b1d Thumb Code 4 drv_dsi_rx.o(i.drv_dsi_rx_set_inten) + drv_dsi_rx_set_ipi_cfg 0x00014b21 Thumb Code 16 drv_dsi_rx.o(i.drv_dsi_rx_set_ipi_cfg) + drv_dsi_rx_set_lane_swap 0x00014b31 Thumb Code 70 drv_dsi_rx.o(i.drv_dsi_rx_set_lane_swap) + drv_dsi_rx_set_resp_cnt 0x00014b77 Thumb Code 38 drv_dsi_rx.o(i.drv_dsi_rx_set_resp_cnt) + drv_dsi_rx_set_up_phy 0x00014b9d Thumb Code 256 drv_dsi_rx.o(i.drv_dsi_rx_set_up_phy) + drv_dsi_rx_shut_down 0x00014ca1 Thumb Code 14 drv_dsi_rx.o(i.drv_dsi_rx_shut_down) + drv_dsi_tx_command_get_payload 0x00014caf Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_get_payload) + drv_dsi_tx_command_header 0x00014cb3 Thumb Code 20 drv_dsi_tx.o(i.drv_dsi_tx_command_header) + drv_dsi_tx_command_mode_cfg 0x00014cc7 Thumb Code 108 drv_dsi_tx.o(i.drv_dsi_tx_command_mode_cfg) + drv_dsi_tx_command_put_payload 0x00014d33 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_command_put_payload) + drv_dsi_tx_config_eotp 0x00014d37 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_config_eotp) + drv_dsi_tx_config_int 0x00014d4f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_config_int) + drv_dsi_tx_dpi_lpcmd_time 0x00014d57 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_dpi_lpcmd_time) + drv_dsi_tx_dpi_mode 0x00014d5f Thumb Code 10 drv_dsi_tx.o(i.drv_dsi_tx_dpi_mode) + drv_dsi_tx_dpi_polarity 0x00014d69 Thumb Code 36 drv_dsi_tx.o(i.drv_dsi_tx_dpi_polarity) + drv_dsi_tx_edpi_cmd_size 0x00014d8d Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_edpi_cmd_size) + drv_dsi_tx_get_cmd_status 0x00014d91 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_get_cmd_status) + drv_dsi_tx_mode 0x00014d95 Thumb Code 4 drv_dsi_tx.o(i.drv_dsi_tx_mode) + drv_dsi_tx_phy_clock_lane_auto_lp 0x00014d99 Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_auto_lp) + drv_dsi_tx_phy_clock_lane_req_hs 0x00014db1 Thumb Code 26 drv_dsi_tx.o(i.drv_dsi_tx_phy_clock_lane_req_hs) + drv_dsi_tx_phy_lane_mode 0x00014dcb Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_phy_lane_mode) + drv_dsi_tx_phy_status_ready 0x00014dd7 Thumb Code 100 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_ready) + drv_dsi_tx_phy_status_stopstate 0x00014e3b Thumb Code 62 drv_dsi_tx.o(i.drv_dsi_tx_phy_status_stopstate) + drv_dsi_tx_phy_test_setup 0x00014e79 Thumb Code 308 drv_dsi_tx.o(i.drv_dsi_tx_phy_test_setup) + drv_dsi_tx_phy_time_cfg 0x00014fad Thumb Code 30 drv_dsi_tx.o(i.drv_dsi_tx_phy_time_cfg) + drv_dsi_tx_powerup 0x00014fcb Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_powerup) + drv_dsi_tx_response_mode 0x00014fd3 Thumb Code 28 drv_dsi_tx.o(i.drv_dsi_tx_response_mode) + drv_dsi_tx_set_bta_ack 0x00014fef Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_set_bta_ack) + drv_dsi_tx_set_esc_div 0x00015007 Thumb Code 12 drv_dsi_tx.o(i.drv_dsi_tx_set_esc_div) + drv_dsi_tx_set_int 0x00015015 Thumb Code 58 drv_dsi_tx.o(i.drv_dsi_tx_set_int) + drv_dsi_tx_set_time_out_div 0x00015055 Thumb Code 16 drv_dsi_tx.o(i.drv_dsi_tx_set_time_out_div) + drv_dsi_tx_set_video_chunk 0x00015065 Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_set_video_chunk) + drv_dsi_tx_set_video_timing 0x0001506d Thumb Code 34 drv_dsi_tx.o(i.drv_dsi_tx_set_video_timing) + drv_dsi_tx_shutdown 0x0001508f Thumb Code 8 drv_dsi_tx.o(i.drv_dsi_tx_shutdown) + drv_dsi_tx_timeout_cfg 0x00015097 Thumb Code 38 drv_dsi_tx.o(i.drv_dsi_tx_timeout_cfg) + drv_dsi_tx_video_mode_cfg 0x000150bd Thumb Code 170 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_cfg) + drv_dsi_tx_video_mode_disable_hact_cmd 0x00015167 Thumb Code 22 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_disable_hact_cmd) + drv_dsi_tx_video_mode_set_lp_cmd 0x0001517d Thumb Code 24 drv_dsi_tx.o(i.drv_dsi_tx_video_mode_set_lp_cmd) + drv_efuse_enter_inactive 0x00015195 Thumb Code 46 drv_efuse.o(i.drv_efuse_enter_inactive) + drv_efuse_int_enable 0x000151c3 Thumb Code 12 drv_efuse.o(i.drv_efuse_int_enable) + drv_efuse_read 0x000151cf Thumb Code 50 drv_efuse.o(i.drv_efuse_read) + drv_efuse_read_req 0x00015201 Thumb Code 24 drv_efuse.o(i.drv_efuse_read_req) + drv_gpio_get_input_data 0x00015219 Thumb Code 20 drv_gpio.o(i.drv_gpio_get_input_data) + drv_gpio_register_ap_reset_callback 0x00015231 Thumb Code 6 drv_gpio.o(i.drv_gpio_register_ap_reset_callback) + drv_gpio_register_callback 0x0001523d Thumb Code 14 drv_gpio.o(i.drv_gpio_register_callback) + drv_gpio_set_int 0x00015251 Thumb Code 74 drv_gpio.o(i.drv_gpio_set_int) + drv_gpio_set_ioe 0x000152a1 Thumb Code 26 drv_gpio.o(i.drv_gpio_set_ioe) + drv_gpio_set_mode0 0x000152c1 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode0) + drv_gpio_set_mode1 0x000152d1 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode1) + drv_gpio_set_mode2 0x000152e1 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode2) + drv_gpio_set_mode3 0x000152f1 Thumb Code 12 drv_gpio.o(i.drv_gpio_set_mode3) + drv_gpio_set_pull_state 0x00015321 Thumb Code 298 drv_gpio.o(i.drv_gpio_set_pull_state) + drv_i2c0_set_callback 0x00015451 Thumb Code 6 drv_i2c_slave.o(i.drv_i2c0_set_callback) + drv_i2c1_set_callback 0x0001545d Thumb Code 6 drv_i2c_master.o(i.drv_i2c1_set_callback) + drv_i2c_dma_init 0x0001549d Thumb Code 146 drv_i2c_dma.o(i.drv_i2c_dma_init) + drv_i2c_enable_rx_dma 0x00015549 Thumb Code 26 drv_i2c_dma.o(i.drv_i2c_enable_rx_dma) + drv_i2c_enable_tx_dma 0x00015563 Thumb Code 24 drv_i2c_dma.o(i.drv_i2c_enable_tx_dma) + drv_i2c_m_clear_it_pending_bit 0x0001557d Thumb Code 86 drv_i2c_master.o(i.drv_i2c_m_clear_it_pending_bit) + drv_i2c_m_enable 0x000155dd Thumb Code 10 drv_i2c_master.o(i.drv_i2c_m_enable) + drv_i2c_m_enable_intr 0x000155ed Thumb Code 42 drv_i2c_master.o(i.drv_i2c_m_enable_intr) + drv_i2c_master_init 0x00015625 Thumb Code 118 drv_i2c_master.o(i.drv_i2c_master_init) + drv_i2c_master_read_dma 0x000156b1 Thumb Code 82 drv_i2c_dma.o(i.drv_i2c_master_read_dma) + drv_i2c_master_write_dma 0x0001570d Thumb Code 50 drv_i2c_dma.o(i.drv_i2c_master_write_dma) + drv_i2c_s_clear_it_pending_bit 0x00015787 Thumb Code 66 drv_i2c_slave.o(i.drv_i2c_s_clear_it_pending_bit) + drv_i2c_s_config_intr 0x000157c9 Thumb Code 4 drv_i2c_slave.o(i.drv_i2c_s_config_intr) + drv_i2c_s_enable 0x000157cd Thumb Code 8 drv_i2c_slave.o(i.drv_i2c_s_enable) + drv_i2c_s_get_fifo_status 0x000157d5 Thumb Code 20 drv_i2c_slave.o(i.drv_i2c_s_get_fifo_status) + drv_i2c_s_set_intr 0x000157e9 Thumb Code 74 drv_i2c_slave.o(i.drv_i2c_s_set_intr) + drv_i2c_s_write_data 0x00015839 Thumb Code 28 drv_i2c_slave.o(i.drv_i2c_s_write_data) + drv_i2c_set_dma_irq_callback 0x00015855 Thumb Code 68 drv_i2c_dma.o(i.drv_i2c_set_dma_irq_callback) + drv_i2c_slave_init 0x000158ad Thumb Code 50 drv_i2c_slave.o(i.drv_i2c_slave_init) + drv_i2c_slave_write_dma 0x000158e1 Thumb Code 20 drv_i2c_dma.o(i.drv_i2c_slave_write_dma) + drv_lcdc_config_bypass 0x000158f9 Thumb Code 24 drv_lcdc.o(i.drv_lcdc_config_bypass) + drv_lcdc_config_ccm 0x00015911 Thumb Code 48 drv_lcdc.o(i.drv_lcdc_config_ccm) + drv_lcdc_config_disp_mode 0x00015941 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_disp_mode) + drv_lcdc_config_dpi_polarity 0x00015957 Thumb Code 36 drv_lcdc.o(i.drv_lcdc_config_dpi_polarity) + drv_lcdc_config_dpi_timing 0x0001597b Thumb Code 38 drv_lcdc.o(i.drv_lcdc_config_dpi_timing) + drv_lcdc_config_edpi_mode 0x000159a1 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_edpi_mode) + drv_lcdc_config_endianness 0x000159b7 Thumb Code 22 drv_lcdc.o(i.drv_lcdc_config_endianness) + drv_lcdc_config_input_size 0x000159cd Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_input_size) + drv_lcdc_config_int 0x000159d9 Thumb Code 30 drv_lcdc.o(i.drv_lcdc_config_int) + drv_lcdc_config_int_single 0x000159f7 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_int_single) + drv_lcdc_config_overwrite 0x00015a19 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_overwrite) + drv_lcdc_config_overwrite_rgb 0x00015a3b Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_overwrite_rgb) + drv_lcdc_config_partial_display_area 0x00015a47 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_partial_display_area) + drv_lcdc_config_partial_display_enable 0x00015a61 Thumb Code 34 drv_lcdc.o(i.drv_lcdc_config_partial_display_enable) + drv_lcdc_config_scale_up_coef 0x00015a83 Thumb Code 26 drv_lcdc.o(i.drv_lcdc_config_scale_up_coef) + drv_lcdc_config_scale_up_step 0x00015a9d Thumb Code 12 drv_lcdc.o(i.drv_lcdc_config_scale_up_step) + drv_lcdc_config_src_parameter 0x00015aa9 Thumb Code 76 drv_lcdc.o(i.drv_lcdc_config_src_parameter) + drv_lcdc_config_thresh 0x00015af5 Thumb Code 6 drv_lcdc.o(i.drv_lcdc_config_thresh) + drv_lcdc_ctrl_flow 0x00015afb Thumb Code 18 drv_lcdc.o(i.drv_lcdc_ctrl_flow) + drv_lcdc_enable_shadow_reg 0x00015b0d Thumb Code 32 drv_lcdc.o(i.drv_lcdc_enable_shadow_reg) + drv_lcdc_set_int 0x00015b2d Thumb Code 58 drv_lcdc.o(i.drv_lcdc_set_int) + drv_lcdc_set_video_hw_mode 0x00015b6d Thumb Code 20 drv_lcdc.o(i.drv_lcdc_set_video_hw_mode) + drv_lcdc_start 0x00015b81 Thumb Code 32 drv_lcdc.o(i.drv_lcdc_start) + drv_memc_clear_status 0x00015ba1 Thumb Code 12 drv_memc.o(i.drv_memc_clear_status) + drv_memc_enable_irq 0x00015bad Thumb Code 58 drv_memc.o(i.drv_memc_enable_irq) + drv_memc_gen_a_tear_signal 0x00015bed Thumb Code 12 drv_memc.o(i.drv_memc_gen_a_tear_signal) + drv_memc_get_status 0x00015bf9 Thumb Code 18 drv_memc.o(i.drv_memc_get_status) + drv_memc_rate_transfer_sel 0x00015c0b Thumb Code 16 drv_memc.o(i.drv_memc_rate_transfer_sel) + drv_memc_sel_vsync 0x00015c1b Thumb Code 14 drv_memc.o(i.drv_memc_sel_vsync) + drv_memc_set_active_height 0x00015c29 Thumb Code 14 drv_memc.o(i.drv_memc_set_active_height) + drv_memc_set_data_mode 0x00015c3d Thumb Code 12 drv_memc.o(i.drv_memc_set_data_mode) + drv_memc_set_double_buffer 0x00015c49 Thumb Code 16 drv_memc.o(i.drv_memc_set_double_buffer) + drv_memc_set_double_buffer_reverse 0x00015c59 Thumb Code 18 drv_memc.o(i.drv_memc_set_double_buffer_reverse) + drv_memc_set_fs_en_conditions 0x00015c6b Thumb Code 16 drv_memc.o(i.drv_memc_set_fs_en_conditions) + drv_memc_set_inten 0x00015c7b Thumb Code 20 drv_memc.o(i.drv_memc_set_inten) + drv_memc_set_lcdc_st_conditions 0x00015c91 Thumb Code 18 drv_memc.o(i.drv_memc_set_lcdc_st_conditions) + drv_memc_set_ltpo_mode 0x00015ca9 Thumb Code 26 drv_memc.o(i.drv_memc_set_ltpo_mode) + drv_memc_set_tear_mode 0x00015cc3 Thumb Code 14 drv_memc.o(i.drv_memc_set_tear_mode) + drv_memc_set_tear_waveform 0x00015cd1 Thumb Code 34 drv_memc.o(i.drv_memc_set_tear_waveform) + drv_memc_set_vidc_sync_cnt 0x00015cf9 Thumb Code 14 drv_memc.o(i.drv_memc_set_vidc_sync_cnt) + drv_param_init_get_ccm 0x00015d09 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_ccm) + drv_param_init_get_scld_filter_h 0x00015d11 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_h) + drv_param_init_get_scld_filter_v 0x00015d25 Thumb Code 12 drv_param_init.o(i.drv_param_init_get_scld_filter_v) + drv_param_init_get_sclu_filter 0x00015d39 Thumb Code 4 drv_param_init.o(i.drv_param_init_get_sclu_filter) + drv_param_init_set_ccm 0x00015d41 Thumb Code 14 drv_param_init.o(i.drv_param_init_set_ccm) + drv_param_init_set_scld_filter 0x00015d55 Thumb Code 92 drv_param_init.o(i.drv_param_init_set_scld_filter) + drv_param_p2r_filter_init 0x00015db9 Thumb Code 30 drv_param_init.o(i.drv_param_p2r_filter_init) + drv_phy_enable_calibration 0x00015ddd Thumb Code 12 drv_phy_common.o(i.drv_phy_enable_calibration) + drv_phy_get_calibration 0x00015ded Thumb Code 50 drv_phy_common.o(i.drv_phy_get_calibration) + drv_phy_get_pll_para 0x00015e29 Thumb Code 88 drv_phy_common.o(i.drv_phy_get_pll_para) + drv_phy_get_rate_para 0x00015e89 Thumb Code 76 drv_phy_common.o(i.drv_phy_get_rate_para) + drv_phy_test_clear 0x00015edd Thumb Code 16 drv_phy_common.o(i.drv_phy_test_clear) + drv_phy_test_lock 0x00015eed Thumb Code 24 drv_phy_common.o(i.drv_phy_test_lock) + drv_phy_test_write_1_byte 0x00015f05 Thumb Code 32 drv_phy_common.o(i.drv_phy_test_write_1_byte) + drv_phy_test_write_2_byte 0x00015f25 Thumb Code 38 drv_phy_common.o(i.drv_phy_test_write_2_byte) + drv_phy_test_write_code 0x00015f4b Thumb Code 30 drv_phy_common.o(i.drv_phy_test_write_code) + drv_pwr_set_cp_mode 0x00015f89 Thumb Code 26 drv_pwr.o(i.drv_pwr_set_cp_mode) + drv_pwr_set_pvd_mode 0x00015fa9 Thumb Code 18 drv_pwr.o(i.drv_pwr_set_pvd_mode) + drv_pwr_set_system_clk_src 0x00015fc1 Thumb Code 44 drv_pwr.o(i.drv_pwr_set_system_clk_src) + drv_rxbr_clear_pkt_buffer 0x0001603f Thumb Code 10 drv_rxbr.o(i.drv_rxbr_clear_pkt_buffer) + drv_rxbr_clear_status0 0x00016049 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_clear_status0) + drv_rxbr_enable_irq 0x0001604d Thumb Code 90 drv_rxbr.o(i.drv_rxbr_enable_irq) + drv_rxbr_frame_drop_cfg 0x000160a9 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_frame_drop_cfg) + drv_rxbr_get_clk 0x000160bd Thumb Code 66 drv_rxbr.o(i.drv_rxbr_get_clk) + drv_rxbr_get_col_addr 0x00016121 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_col_addr) + drv_rxbr_get_page_addr 0x00016137 Thumb Code 4 drv_rxbr.o(i.drv_rxbr_get_page_addr) + drv_rxbr_hline_rcv0_cfg 0x0001614d Thumb Code 12 drv_rxbr.o(i.drv_rxbr_hline_rcv0_cfg) + drv_rxbr_hline_rcv_cfg 0x00016159 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_hline_rcv_cfg) + drv_rxbr_register_irq0_callback 0x00016161 Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq0_callback) + drv_rxbr_register_irq1_callback 0x0001616d Thumb Code 6 drv_rxbr.o(i.drv_rxbr_register_irq1_callback) + drv_rxbr_set_ack_pkt_header 0x00016179 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_ack_pkt_header) + drv_rxbr_set_cmd_filter 0x0001618d Thumb Code 204 drv_rxbr.o(i.drv_rxbr_set_cmd_filter) + drv_rxbr_set_color_format 0x00016259 Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_color_format) + drv_rxbr_set_inten 0x0001626d Thumb Code 20 drv_rxbr.o(i.drv_rxbr_set_inten) + drv_rxbr_set_ltpo_drop_th 0x00016281 Thumb Code 16 drv_rxbr.o(i.drv_rxbr_set_ltpo_drop_th) + drv_rxbr_set_usr_cfg 0x00016291 Thumb Code 38 drv_rxbr.o(i.drv_rxbr_set_usr_cfg) + drv_rxbr_set_usr_col 0x000162b7 Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_col) + drv_rxbr_set_usr_row 0x000162bf Thumb Code 8 drv_rxbr.o(i.drv_rxbr_set_usr_row) + drv_spi_m_read_data 0x000162c9 Thumb Code 28 drv_spi_master.o(i.drv_spi_m_read_data) + drv_swire_enable 0x000162e9 Thumb Code 24 drv_swire.o(i.drv_swire_enable) + drv_swire_set_int 0x00016305 Thumb Code 76 drv_swire.o(i.drv_swire_set_int) + drv_swire_set_power_down 0x00016359 Thumb Code 24 drv_swire.o(i.drv_swire_set_power_down) + drv_sys_cfg_clear_all_int 0x00016375 Thumb Code 8 drv_sys_cfg.o(i.drv_sys_cfg_clear_all_int) + drv_sys_cfg_clear_pending 0x00016381 Thumb Code 32 drv_sys_cfg.o(i.drv_sys_cfg_clear_pending) + drv_sys_cfg_sel_ap_rst_lvl_trig 0x000163a9 Thumb Code 18 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_lvl_trig) + drv_sys_cfg_sel_ap_rst_trig 0x000163c1 Thumb Code 22 drv_sys_cfg.o(i.drv_sys_cfg_sel_ap_rst_trig) + drv_sys_cfg_sel_gpio_group 0x000163dd Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_gpio_group) + drv_sys_cfg_sel_int_trig 0x00016401 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_sel_int_trig) + drv_sys_cfg_set_dma_rx_req 0x00016425 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_rx_req) + drv_sys_cfg_set_dma_tx_req 0x00016435 Thumb Code 10 drv_sys_cfg.o(i.drv_sys_cfg_set_dma_tx_req) + drv_sys_cfg_set_int 0x00016445 Thumb Code 30 drv_sys_cfg.o(i.drv_sys_cfg_set_int) + drv_timer_enable 0x00016483 Thumb Code 32 drv_timer.o(i.drv_timer_enable) + drv_timer_get_instance 0x000164a5 Thumb Code 10 drv_timer.o(i.drv_timer_get_instance) + drv_timer_get_prescaler 0x000164b5 Thumb Code 12 drv_timer.o(i.drv_timer_get_prescaler) + drv_timer_register_callback 0x00016509 Thumb Code 14 drv_timer.o(i.drv_timer_register_callback) + drv_timer_set_compare_val 0x0001651d Thumb Code 16 drv_timer.o(i.drv_timer_set_compare_val) + drv_timer_set_int 0x0001652d Thumb Code 80 drv_timer.o(i.drv_timer_set_int) + drv_timer_set_prescaler 0x00016581 Thumb Code 36 drv_timer.o(i.drv_timer_set_prescaler) + drv_timer_set_repeat 0x000165a9 Thumb Code 12 drv_timer.o(i.drv_timer_set_repeat) + drv_tx_phy_test_enter 0x000165c3 Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_enter) + drv_tx_phy_test_exit 0x000165df Thumb Code 28 drv_dsi_tx.o(i.drv_tx_phy_test_exit) + drv_vidc_clear_irq 0x00016631 Thumb Code 8 drv_vidc.o(i.drv_vidc_clear_irq) + drv_vidc_enable 0x00016639 Thumb Code 24 drv_vidc.o(i.drv_vidc_enable) + drv_vidc_enable_irq 0x00016651 Thumb Code 58 drv_vidc.o(i.drv_vidc_enable_irq) + drv_vidc_get_irq_status 0x00016691 Thumb Code 18 drv_vidc.o(i.drv_vidc_get_irq_status) + drv_vidc_init_module_enable 0x000166a5 Thumb Code 36 drv_vidc.o(i.drv_vidc_init_module_enable) + drv_vidc_register_callback 0x000166cd Thumb Code 6 drv_vidc.o(i.drv_vidc_register_callback) + drv_vidc_reset 0x000166d9 Thumb Code 6 drv_vidc.o(i.drv_vidc_reset) + drv_vidc_set_dst_parameter 0x000166df Thumb Code 60 drv_vidc.o(i.drv_vidc_set_dst_parameter) + drv_vidc_set_irqen 0x0001671b Thumb Code 20 drv_vidc.o(i.drv_vidc_set_irqen) + drv_vidc_set_mirror 0x0001672f Thumb Code 16 drv_vidc.o(i.drv_vidc_set_mirror) + drv_vidc_set_p2r_hcoef0 0x0001673f Thumb Code 8 drv_vidc.o(i.drv_vidc_set_p2r_hcoef0) + drv_vidc_set_p2r_hinitb 0x00016747 Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitb) + drv_vidc_set_p2r_hinitr 0x0001676d Thumb Code 38 drv_vidc.o(i.drv_vidc_set_p2r_hinitr) + drv_vidc_set_pentile_swap 0x00016795 Thumb Code 18 drv_vidc.o(i.drv_vidc_set_pentile_swap) + drv_vidc_set_pu_ctrl 0x000167ad Thumb Code 10 drv_vidc.o(i.drv_vidc_set_pu_ctrl) + drv_vidc_set_rotation 0x000167b7 Thumb Code 16 drv_vidc.o(i.drv_vidc_set_rotation) + drv_vidc_set_scld_hcoef0 0x000167c7 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef0) + drv_vidc_set_scld_hcoef1 0x000167d1 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_hcoef1) + drv_vidc_set_scld_step 0x000167db Thumb Code 18 drv_vidc.o(i.drv_vidc_set_scld_step) + drv_vidc_set_scld_vcoef0 0x000167ed Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef0) + drv_vidc_set_scld_vcoef1 0x000167f7 Thumb Code 10 drv_vidc.o(i.drv_vidc_set_scld_vcoef1) + drv_vidc_set_src_parameter 0x00016801 Thumb Code 22 drv_vidc.o(i.drv_vidc_set_src_parameter) + drv_wdg_clear_counter 0x00016819 Thumb Code 12 drv_wdg.o(i.drv_wdg_clear_counter) + drv_wdg_set_int 0x00016849 Thumb Code 60 drv_wdg.o(i.drv_wdg_set_int) + fls_clr_interrupt_flag 0x00016889 Thumb Code 10 drv_fls.o(i.fls_clr_interrupt_flag) + fputc 0x00016893 Thumb Code 20 tau_log.o(i.fputc) + hal_dsi_rx_ctrl_create_handle 0x000168a9 Thumb Code 48 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_create_handle) + hal_dsi_rx_ctrl_deinit 0x000168dd Thumb Code 148 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_deinit) + hal_dsi_rx_ctrl_dsc_async_handler 0x00016979 Thumb Code 120 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_dsc_async_handler) + hal_dsi_rx_ctrl_gen_a_tear_signal 0x000169fd Thumb Code 32 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_gen_a_tear_signal) + hal_dsi_rx_ctrl_get_compressen_en 0x00016a25 Thumb Code 10 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_compressen_en) + hal_dsi_rx_ctrl_get_max_ret_size 0x00016a35 Thumb Code 30 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_get_max_ret_size) + hal_dsi_rx_ctrl_init 0x00016a5d Thumb Code 88 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_init) + hal_dsi_rx_ctrl_send_ack_cmd 0x00017205 Thumb Code 212 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_send_ack_cmd) + hal_dsi_rx_ctrl_set_cus_scld_filter 0x000172f5 Thumb Code 98 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_scld_filter) + hal_dsi_rx_ctrl_set_cus_sync_line 0x00017361 Thumb Code 44 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_cus_sync_line) + hal_dsi_rx_ctrl_set_sw_tear_mode 0x00017441 Thumb Code 42 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_sw_tear_mode) + hal_dsi_rx_ctrl_set_tear_mode_ex 0x00017475 Thumb Code 14 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_set_tear_mode_ex) + hal_dsi_rx_ctrl_start 0x00017485 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_start) + hal_dsi_rx_ctrl_stop 0x000174c1 Thumb Code 46 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_stop) + hal_dsi_rx_ctrl_toggle_resolution_ex 0x000174fd Thumb Code 28 hal_dsi_rx_ctrl.o(i.hal_dsi_rx_ctrl_toggle_resolution_ex) + hal_dsi_tx_ctrl_create_handle 0x00017b31 Thumb Code 34 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_create_handle) + hal_dsi_tx_ctrl_deinit 0x00017b5d Thumb Code 118 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_deinit) + hal_dsi_tx_ctrl_enter_init_panel_mode 0x00017be1 Thumb Code 68 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_enter_init_panel_mode) + hal_dsi_tx_ctrl_exit_init_panel_mode 0x00017c2d Thumb Code 32 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_exit_init_panel_mode) + hal_dsi_tx_ctrl_init 0x00017c55 Thumb Code 154 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_init) + hal_dsi_tx_ctrl_panel_reset_pin 0x00017d1d Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_panel_reset_pin) + hal_dsi_tx_ctrl_read_cmd 0x00017d29 Thumb Code 134 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_read_cmd) + hal_dsi_tx_ctrl_set_ccm 0x00017db5 Thumb Code 28 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_ccm) + hal_dsi_tx_ctrl_set_overwrite_rgb 0x00017dd5 Thumb Code 16 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_overwrite_rgb) + hal_dsi_tx_ctrl_set_partial_disp 0x00017de9 Thumb Code 12 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp) + hal_dsi_tx_ctrl_set_partial_disp_area 0x00017df9 Thumb Code 30 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_set_partial_disp_area) + hal_dsi_tx_ctrl_start 0x00017e1d Thumb Code 140 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_start) + hal_dsi_tx_ctrl_stop 0x00017eb9 Thumb Code 56 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_stop) + hal_dsi_tx_ctrl_write_array_cmd 0x00017efd Thumb Code 210 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_array_cmd) + hal_dsi_tx_ctrl_write_cmd 0x00017fd5 Thumb Code 172 hal_dsi_tx_ctrl.o(i.hal_dsi_tx_ctrl_write_cmd) + hal_gpio_ctrl_eint 0x00018269 Thumb Code 18 hal_gpio.o(i.hal_gpio_ctrl_eint) + hal_gpio_get_input_data 0x00018281 Thumb Code 18 hal_gpio.o(i.hal_gpio_get_input_data) + hal_gpio_init_eint 0x00018295 Thumb Code 58 hal_gpio.o(i.hal_gpio_init_eint) + hal_gpio_init_input 0x000182d5 Thumb Code 28 hal_gpio.o(i.hal_gpio_init_input) + hal_gpio_init_output 0x000182f5 Thumb Code 34 hal_gpio.o(i.hal_gpio_init_output) + hal_gpio_reg_eint_cb 0x0001831d Thumb Code 20 hal_gpio.o(i.hal_gpio_reg_eint_cb) + hal_gpio_set_ap_reset_int 0x00018335 Thumb Code 76 hal_gpio.o(i.hal_gpio_set_ap_reset_int) + hal_gpio_set_mode 0x00018385 Thumb Code 90 hal_gpio.o(i.hal_gpio_set_mode) + hal_gpio_set_output_data 0x000183e5 Thumb Code 8 hal_gpio.o(i.hal_gpio_set_output_data) + hal_gpio_set_pull_state 0x000183ed Thumb Code 26 hal_gpio.o(i.hal_gpio_set_pull_state) + hal_i2c_m_dma_init 0x0001840d Thumb Code 92 hal_i2c_master.o(i.hal_i2c_m_dma_init) + hal_i2c_m_dma_read 0x00018479 Thumb Code 26 hal_i2c_master.o(i.hal_i2c_m_dma_read) + hal_i2c_m_dma_write 0x00018499 Thumb Code 24 hal_i2c_master.o(i.hal_i2c_m_dma_write) + hal_i2c_m_transfer_complate 0x000184b5 Thumb Code 6 hal_i2c_master.o(i.hal_i2c_m_transfer_complate) + hal_i2c_s_dma_write 0x000184f1 Thumb Code 62 hal_i2c_slave.o(i.hal_i2c_s_dma_write) + hal_i2c_s_init 0x0001853d Thumb Code 176 hal_i2c_slave.o(i.hal_i2c_s_init) + hal_i2c_s_nonblocking_read 0x00018605 Thumb Code 14 hal_i2c_slave.o(i.hal_i2c_s_nonblocking_read) + hal_i2c_s_set_transfer 0x00018619 Thumb Code 6 hal_i2c_slave.o(i.hal_i2c_s_set_transfer) + hal_internal_init_memc 0x00018799 Thumb Code 170 hal_internal_vsync.o(i.hal_internal_init_memc) + hal_internal_sync_get_fb_setting 0x00018895 Thumb Code 12 hal_internal_vsync.o(i.hal_internal_sync_get_fb_setting) + hal_internal_sync_get_hight_performan_mode 0x000188a5 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_sync_get_hight_performan_mode) + hal_internal_sync_input_resolution_change_ex 0x000188b5 Thumb Code 362 hal_internal_vsync.o(i.hal_internal_sync_input_resolution_change_ex) + hal_internal_update_dpi_param 0x00018a89 Thumb Code 10 hal_internal_vsync.o(i.hal_internal_update_dpi_param) + hal_internal_video_mode_auto_sync 0x00018a99 Thumb Code 238 hal_internal_vsync.o(i.hal_internal_video_mode_auto_sync) + hal_internal_vsync_deinit 0x00018ba5 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_deinit) + hal_internal_vsync_get_rx_state 0x00018bcd Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_rx_state) + hal_internal_vsync_get_sync_line 0x00018bd9 Thumb Code 18 hal_internal_vsync.o(i.hal_internal_vsync_get_sync_line) + hal_internal_vsync_get_tear_mode 0x00018bf1 Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tear_mode) + hal_internal_vsync_get_tx_state 0x00018bfd Thumb Code 6 hal_internal_vsync.o(i.hal_internal_vsync_get_tx_state) + hal_internal_vsync_init_rx 0x00018c09 Thumb Code 236 hal_internal_vsync.o(i.hal_internal_vsync_init_rx) + hal_internal_vsync_init_tx 0x00018d21 Thumb Code 172 hal_internal_vsync.o(i.hal_internal_vsync_init_tx) + hal_internal_vsync_set_auto_hw_filter 0x00018dd1 Thumb Code 222 hal_internal_vsync.o(i.hal_internal_vsync_set_auto_hw_filter) + hal_internal_vsync_set_rx_state 0x00018eed Thumb Code 16 hal_internal_vsync.o(i.hal_internal_vsync_set_rx_state) + hal_internal_vsync_set_sync_line 0x00018f01 Thumb Code 30 hal_internal_vsync.o(i.hal_internal_vsync_set_sync_line) + hal_internal_vsync_set_tear_mode 0x00018f25 Thumb Code 72 hal_internal_vsync.o(i.hal_internal_vsync_set_tear_mode) + hal_internal_vsync_set_tx_state 0x00018f75 Thumb Code 118 hal_internal_vsync.o(i.hal_internal_vsync_set_tx_state) + hal_spi_m_clear_rxfifo 0x00019419 Thumb Code 14 hal_spi_master.o(i.hal_spi_m_clear_rxfifo) + hal_swire_deinit 0x00019427 Thumb Code 18 hal_swire.o(i.hal_swire_deinit) + hal_swire_open 0x00019439 Thumb Code 22 hal_swire.o(i.hal_swire_open) + hal_system_enable_systick 0x0001944f Thumb Code 8 hal_system.o(i.hal_system_enable_systick) + hal_system_init 0x00019459 Thumb Code 104 hal_system.o(i.hal_system_init) + hal_system_init_console 0x000194e1 Thumb Code 28 hal_system.o(i.hal_system_init_console) + hal_system_set_phy_calibration 0x000194fd Thumb Code 8 hal_system.o(i.hal_system_set_phy_calibration) + hal_system_set_pvd 0x00019505 Thumb Code 8 hal_system.o(i.hal_system_set_pvd) + hal_system_set_vcc 0x0001950d Thumb Code 8 hal_system.o(i.hal_system_set_vcc) + hal_timer_deinit 0x00019515 Thumb Code 46 hal_timer.o(i.hal_timer_deinit) + hal_timer_init 0x00019543 Thumb Code 26 hal_timer.o(i.hal_timer_init) + hal_timer_start 0x0001955d Thumb Code 66 hal_timer.o(i.hal_timer_start) + hal_timer_stop 0x000195a5 Thumb Code 40 hal_timer.o(i.hal_timer_stop) + hal_uart_init 0x000195cd Thumb Code 126 hal_uart.o(i.hal_uart_init) + hal_uart_transmit_blocking 0x00019659 Thumb Code 12 hal_uart.o(i.hal_uart_transmit_blocking) + handle_init 0x00019845 Thumb Code 140 irq_redirect .o(i.handle_init) + main 0x00019a99 Thumb Code 10 main.o(i.main) + sqrt 0x0001a741 Thumb Code 66 sqrt.o(i.sqrt) + panel_init_code 0x0001ac30 Data 10450 ap_demo.o(.constdata) + phone_data_21 0x0001d502 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_55 0x0001d503 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_85_00 0x0001d504 Data 1 app_tp_for_custom_s8.o(.constdata) + phone_data_30 0x0001d505 Data 2 app_tp_for_custom_s8.o(.constdata) + phone_data_52 0x0001d507 Data 3 app_tp_for_custom_s8.o(.constdata) + phone_data_A3 0x0001d50a Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A4 0x0001d50e Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_A5 0x0001d512 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_AF 0x0001d516 Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_F1 0x0001d51a Data 4 app_tp_for_custom_s8.o(.constdata) + phone_data_22 0x0001d51e Data 5 app_tp_for_custom_s8.o(.constdata) + phone_data_60_1 0x0001d523 Data 16 app_tp_for_custom_s8.o(.constdata) + phone_data_23 0x0001d533 Data 11 app_tp_for_custom_s8.o(.constdata) + phone_data_85_02 0x0001d53e Data 28 app_tp_for_custom_s8.o(.constdata) + phone_data_90 0x0001d55a Data 10 app_tp_for_custom_s8.o(.constdata) + phone_data_72_03 0x0001d564 Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_05 0x0001da70 Data 1292 app_tp_for_custom_s8.o(.constdata) + phone_data_72_1D 0x0001df7c Data 1292 app_tp_for_custom_s8.o(.constdata) + sleep_on 0x0001e488 Data 16 app_tp_for_custom_s8.o(.constdata) + screen_reg_start_data_size 0x0001e498 Data 1 app_tp_for_custom_s8.o(.constdata) + Region$$Table$$Base 0x0001e8b0 Number 0 anon$$obj.o(Region$$Table) + Region$$Table$$Limit 0x0001e8e0 Number 0 anon$$obj.o(Region$$Table) + g_fun_handle 0x00070100 Data 192 irq_redirect .o(.ARM.__AT_0x00070100) + phone_start_flag 0x000701d6 Data 1 ap_demo.o(.data) + phone_DisplayOFF_flag 0x000701d7 Data 1 ap_demo.o(.data) + panel_mode 0x000701d9 Data 1 ap_demo.o(.data) + phone_DisplayOFF_count 0x000701da Data 2 ap_demo.o(.data) + rd_51_val2 0x000701e0 Data 2 ap_demo.o(.data) + panel_r 0x000701e2 Data 2 ap_demo.o(.data) + panel_g 0x000701e4 Data 2 ap_demo.o(.data) + panel_b 0x000701e6 Data 2 ap_demo.o(.data) + rx_filter_1080_h_4_96 0x000701f4 Data 256 ap_demo.o(.data) + rx_filter_2400_v_4_96 0x000702f4 Data 256 ap_demo.o(.data) + s_screen_init_complate 0x000703f8 Data 1 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data1 0x000703fc Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data3 0x000703ff Data 3 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data4 0x00070402 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data2 0x00070405 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data3 0x00070408 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data6 0x0007040b Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data7 0x0007040e Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data8 0x00070411 Data 3 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data4 0x00070414 Data 4 app_tp_transfer.o(.data) + MI10_PRO_TP_Tuning_data5 0x00070418 Data 4 app_tp_transfer.o(.data) + MI10_PRO_screen_init_data2 0x0007041c Data 6 app_tp_transfer.o(.data) + phone_data_E4 0x00070422 Data 1 app_tp_for_custom_s8.o(.data) + tp_flag 0x00070423 Data 1 app_tp_for_custom_s8.o(.data) + g_phone_output_int_pad 0x00070424 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_in 0x00070425 Data 1 app_tp_for_custom_s8.o(.data) + tp_sleep_count 0x00070426 Data 1 app_tp_for_custom_s8.o(.data) + sleep_double_EN 0x00070427 Data 1 app_tp_for_custom_s8.o(.data) + Flag_EA_EN 0x00070428 Data 1 app_tp_for_custom_s8.o(.data) + Flag_touch_count 0x00070429 Data 1 app_tp_for_custom_s8.o(.data) + touchnum_bak 0x0007042a Data 1 app_tp_for_custom_s8.o(.data) + Flag_blacklight_EN 0x0007042b Data 1 app_tp_for_custom_s8.o(.data) + fingerprint_flag 0x0007042c Data 1 app_tp_for_custom_s8.o(.data) + phone_data_B1 0x00070435 Data 2 app_tp_for_custom_s8.o(.data) + phone_data_72_13 0x00070440 Data 1292 app_tp_for_custom_s8.o(.data) + phone_data_75_7401_7D01 0x0007094c Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_7401_7D03 0x00070bda Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_7402_7D01 0x00070e68 Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_7402_7D03 0x000710f6 Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_7403_7D01 0x00071384 Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_7403_7D03 0x00071612 Data 654 app_tp_for_custom_s8.o(.data) + phone_data_75_FF 0x000718a0 Data 288 app_tp_for_custom_s8.o(.data) + fingerprint_arr_on 0x000719c0 Data 16 app_tp_for_custom_s8.o(.data) + fingerprint_arr_off 0x000719d0 Data 16 app_tp_for_custom_s8.o(.data) + phone_reg_coord_back 0x000719e0 Data 200 app_tp_for_custom_s8.o(.data) + g_screen_input_rst_pad 0x00071aa8 Data 1 app_tp_for_custom_s8.o(.data) + g_screen_input_int_pad 0x00071aa9 Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_1 0x00071aaa Data 1 app_tp_for_custom_s8.o(.data) + screen_data_write_2 0x00071aab Data 3 app_tp_for_custom_s8.o(.data) + screen_data_write_3 0x00071aae Data 5 app_tp_for_custom_s8.o(.data) + screen_reg_int_data 0x00071ab4 Data 48 app_tp_for_custom_s8.o(.data) + g_fls_w_cmd 0x00071b10 Data 1 norflash.o(.data) + g_fls_r_cmd 0x00071b11 Data 1 norflash.o(.data) + g_fls_write_en_status 0x00071b12 Data 1 norflash.o(.data) + isFlsTransferEnd 0x00071b13 Data 1 norflash.o(.data) + isFlsFifoReq 0x00071b14 Data 1 norflash.o(.data) + isNandWriteCompleted 0x00071b15 Data 1 norflash.o(.data) + isNandReadCompleted 0x00071b16 Data 1 norflash.o(.data) + g_fls_error_info 0x00071b1c Data 6 norflash.o(.data) + g_systick_cb_func 0x00071b28 Data 4 drv_common.o(.data) + g_system_clock 0x00071b2c Data 4 drv_common.o(.data) + g_scld_fhd_filter_h 0x00071b44 Data 256 drv_param_init.o(.data) + g_scld_fhd_filter_v 0x00071c44 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_h 0x00071d44 Data 256 drv_param_init.o(.data) + g_scld_hd_filter_v 0x00071e44 Data 256 drv_param_init.o(.data) + g_sclu_lanczos_filter 0x00071f44 Data 128 drv_param_init.o(.data) + g_ccm_setting 0x00071fc4 Data 36 drv_param_init.o(.data) + g_sof_gen_te_func 0x0007205c Data 4 hal_internal_vsync.o(.data) + g_int_rxbr_irq0_cb_func 0x00072060 Data 4 drv_rxbr.o(.data) + g_int_rxbr_irq1_cb_func 0x00072064 Data 4 drv_rxbr.o(.data) + g_int_vidc_cb_func 0x00072068 Data 4 drv_vidc.o(.data) + __stdout 0x00072090 Data 4 stdout.o(.data) + phone_data_75_7401_7D02 0x00072228 Data 654 app_tp_for_custom_s8.o(.bss) + string 0x000725c8 Data 256 tau_log.o(.bss) + hal_dmahandle 0x000726c8 Data 160 hal_uart.o(.bss) + hal_uarthandle_dma 0x00072768 Data 32 hal_uart.o(.bss) + hal_uart_handle_global 0x00072788 Data 16 hal_uart.o(.bss) + g_vsync_hande 0x00072934 Data 100 hal_internal_vsync.o(.bss) + g_dcs_execute_table 0x00072998 Data 2048 hal_internal_vsync.o(.bss) + g_packet_fifo 0x000732b8 Data 4144 dcs_packet_fifo.o(.bss) + g_spis_ctrl_handle 0x000742e8 Data 32 hal_spi_slave.o(.bss) + __stack_limit 0x00074308 Data 0 startup_armcm0.o(STACK) + __initial_sp 0x00075308 Data 0 startup_armcm0.o(STACK) + + + +============================================================================== + +Memory Map of the image + + Image Entry point : 0x000100c1 + + Load Region LR_IROM2 (Base: 0x00010000, Size: 0x000107a8, Max: 0x00010000, ABSOLUTE, COMPRESSED[0x0000f944]) + + Execution Region ER_IROM2 (Exec base: 0x00010000, Load base: 0x00010000, Size: 0x0000e8e0, Max: 0x00010000, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00010000 0x00010000 0x000000c0 Data RO 568 RESET startup_armcm0.o + 0x000100c0 0x000100c0 0x00000000 Code RO 2658 * .ARM.Collect$$$$00000000 mc_p.l(entry.o) + 0x000100c0 0x000100c0 0x00000004 Code RO 2968 .ARM.Collect$$$$00000001 mc_p.l(entry2.o) + 0x000100c4 0x000100c4 0x00000004 Code RO 2971 .ARM.Collect$$$$00000004 mc_p.l(entry5.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2973 .ARM.Collect$$$$00000008 mc_p.l(entry7b.o) + 0x000100c8 0x000100c8 0x00000000 Code RO 2975 .ARM.Collect$$$$0000000A mc_p.l(entry8b.o) + 0x000100c8 0x000100c8 0x00000008 Code RO 2976 .ARM.Collect$$$$0000000B mc_p.l(entry9a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2978 .ARM.Collect$$$$0000000D mc_p.l(entry10a.o) + 0x000100d0 0x000100d0 0x00000000 Code RO 2980 .ARM.Collect$$$$0000000F mc_p.l(entry11a.o) + 0x000100d0 0x000100d0 0x00000004 Code RO 2969 .ARM.Collect$$$$00002712 mc_p.l(entry2.o) + 0x000100d4 0x000100d4 0x00000078 Code RO 569 .text startup_armcm0.o + 0x0001014c 0x0001014c 0x0000002c Code RO 2661 .text mc_p.l(uidiv.o) + 0x00010178 0x00010178 0x00000028 Code RO 2663 .text mc_p.l(idiv.o) + 0x000101a0 0x000101a0 0x00000024 Code RO 2665 .text mc_p.l(memcpya.o) + 0x000101c4 0x000101c4 0x00000024 Code RO 2667 .text mc_p.l(memseta.o) + 0x000101e8 0x000101e8 0x000000b2 Code RO 2932 .text mf_p.l(fadd.o) + 0x0001029a 0x0001029a 0x0000007a Code RO 2934 .text mf_p.l(fmul.o) + 0x00010314 0x00010314 0x0000007c Code RO 2936 .text mf_p.l(fdiv.o) + 0x00010390 0x00010390 0x00000018 Code RO 2938 .text mf_p.l(fscalb.o) + 0x000103a8 0x000103a8 0x00000164 Code RO 2940 .text mf_p.l(dadd.o) + 0x0001050c 0x0001050c 0x000000d0 Code RO 2942 .text mf_p.l(dmul.o) + 0x000105dc 0x000105dc 0x000000f0 Code RO 2944 .text mf_p.l(ddiv.o) + 0x000106cc 0x000106cc 0x00000016 Code RO 2946 .text mf_p.l(fflti.o) + 0x000106e2 0x000106e2 0x0000000e Code RO 2948 .text mf_p.l(ffltui.o) + 0x000106f0 0x000106f0 0x0000001c Code RO 2952 .text mf_p.l(dfltui.o) + 0x0001070c 0x0001070c 0x00000032 Code RO 2954 .text mf_p.l(ffixi.o) + 0x0001073e 0x0001073e 0x00000028 Code RO 2956 .text mf_p.l(ffixui.o) + 0x00010766 0x00010766 0x00000002 PAD + 0x00010768 0x00010768 0x00000048 Code RO 2958 .text mf_p.l(dfixi.o) + 0x000107b0 0x000107b0 0x0000003c Code RO 2960 .text mf_p.l(dfixui.o) + 0x000107ec 0x000107ec 0x00000028 Code RO 2962 .text mf_p.l(f2d.o) + 0x00010814 0x00010814 0x00000028 Code RO 2964 .text mf_p.l(cdcmple.o) + 0x0001083c 0x0001083c 0x00000014 Code RO 2966 .text mf_p.l(cfrcmple.o) + 0x00010850 0x00010850 0x00000060 Code RO 2983 .text mc_p.l(uldiv.o) + 0x000108b0 0x000108b0 0x00000020 Code RO 2985 .text mc_p.l(llshl.o) + 0x000108d0 0x000108d0 0x00000022 Code RO 2987 .text mc_p.l(llushr.o) + 0x000108f2 0x000108f2 0x00000026 Code RO 2989 .text mc_p.l(llsshr.o) + 0x00010918 0x00010918 0x00000000 Code RO 2998 .text mc_p.l(iusefp.o) + 0x00010918 0x00010918 0x00000082 Code RO 2999 .text mf_p.l(fepilogue.o) + 0x0001099a 0x0001099a 0x000000be Code RO 3001 .text mf_p.l(depilogue.o) + 0x00010a58 0x00010a58 0x000000a2 Code RO 3005 .text mf_p.l(dsqrt.o) + 0x00010afa 0x00010afa 0x00000002 PAD + 0x00010afc 0x00010afc 0x00000040 Code RO 3007 .text mf_p.l(dfixul.o) + 0x00010b3c 0x00010b3c 0x00000028 Code RO 3009 .text mf_p.l(cdrcmple.o) + 0x00010b64 0x00010b64 0x00000024 Code RO 3011 .text mc_p.l(init.o) + 0x00010b88 0x00010b88 0x00000060 Code RO 3021 .text mc_p.l(__dclz77c.o) + 0x00010be8 0x00010be8 0x00000018 Code RO 2292 i.ADC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c00 0x00010c00 0x00000018 Code RO 2293 i.AP_NRESET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c18 0x00010c18 0x00000014 Code RO 2294 i.DMA_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c2c 0x00010c2c 0x0000001c Code RO 2295 i.EXTI_INT0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c48 0x00010c48 0x0000001c Code RO 2296 i.EXTI_INT1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c64 0x00010c64 0x0000001c Code RO 2297 i.EXTI_INT2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c80 0x00010c80 0x0000001c Code RO 2298 i.EXTI_INT3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010c9c 0x00010c9c 0x0000001c Code RO 2299 i.EXTI_INT4_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cb8 0x00010cb8 0x0000001c Code RO 2300 i.EXTI_INT5_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cd4 0x00010cd4 0x0000001c Code RO 2301 i.EXTI_INT6_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010cf0 0x00010cf0 0x0000001c Code RO 2302 i.EXTI_INT7_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d0c 0x00010d0c 0x00000014 Code RO 2303 i.FLSCTRL_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d20 0x00010d20 0x0000004e Code RO 99 i.Gpio_swire_output ap_demo.o + 0x00010d6e 0x00010d6e 0x00000002 PAD + 0x00010d70 0x00010d70 0x00000014 Code RO 2304 i.HardFault_Handler CVWL368.lib(irq_redirect .o) + 0x00010d84 0x00010d84 0x00000018 Code RO 2305 i.I2C0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010d9c 0x00010d9c 0x00000018 Code RO 2306 i.I2C1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010db4 0x00010db4 0x00000018 Code RO 2307 i.LCDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010dcc 0x00010dcc 0x00000028 Code RO 1034 i.LOG_printf CVWL368.lib(tau_log.o) + 0x00010df4 0x00010df4 0x00000018 Code RO 2308 i.MEMC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e0c 0x00010e0c 0x00000018 Code RO 2309 i.MIPI_RX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e24 0x00010e24 0x00000018 Code RO 2310 i.MIPI_TX_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e3c 0x00010e3c 0x0000001c Code RO 2311 i.PWMDET_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010e58 0x00010e58 0x00000124 Code RO 288 i.S20_Start_init app_tp_transfer.o + 0x00010f7c 0x00010f7c 0x0000001c Code RO 2312 i.SPIM_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010f98 0x00010f98 0x0000001c Code RO 2313 i.SPIS_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010fb4 0x00010fb4 0x0000001c Code RO 2314 i.SWIRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00010fd0 0x00010fd0 0x00000018 Code RO 2315 i.SysTick_Handler CVWL368.lib(irq_redirect .o) + 0x00010fe8 0x00010fe8 0x00000018 Code RO 2316 i.TIMER0_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011000 0x00011000 0x00000014 Data RO 1156 .ARM.__at_0x11000 CVWL368.lib(drv_common.o) + 0x00011014 0x00011014 0x00000002 Code RO 2540 i.UART_DisableDma CVWL368.lib(drv_uart.o) + 0x00011016 0x00011016 0x00000002 Code RO 3016 i.__scatterload_null mc_p.l(handlers.o) + 0x00011018 0x00011018 0x00000004 Data RO 1157 .ARM.__at_0x11018 CVWL368.lib(drv_common.o) + 0x0001101c 0x0001101c 0x00000018 Code RO 2317 i.TIMER1_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011034 0x00011034 0x00000018 Code RO 2318 i.TIMER2_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001104c 0x0001104c 0x00000018 Code RO 2319 i.TIMER3_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011064 0x00011064 0x0000001c Code RO 2536 i.UART0_IRQ_Handle CVWL368.lib(drv_uart.o) + 0x00011080 0x00011080 0x00000004 Code RO 2546 i.UART_GetInstance CVWL368.lib(drv_uart.o) + 0x00011084 0x00011084 0x00000018 Code RO 2320 i.UART_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001109c 0x0001109c 0x00000024 Code RO 2554 i.UART_ResetRxFIFO CVWL368.lib(drv_uart.o) + 0x000110c0 0x000110c0 0x00000048 Code RO 2557 i.UART_SetBaudRate CVWL368.lib(drv_uart.o) + 0x00011108 0x00011108 0x0000001a Code RO 2558 i.UART_SwitchSCLK CVWL368.lib(drv_uart.o) + 0x00011122 0x00011122 0x00000134 Code RO 2560 i.UART_TransferHandleIRQ CVWL368.lib(drv_uart.o) + 0x00011256 0x00011256 0x0000001a Code RO 2562 i.UART_WriteBlocking CVWL368.lib(drv_uart.o) + 0x00011270 0x00011270 0x000000bc Code RO 2563 i.UART_init CVWL368.lib(drv_uart.o) + 0x0001132c 0x0001132c 0x00000018 Code RO 2321 i.VIDC_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011344 0x00011344 0x00000018 Code RO 2322 i.VPRE_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x0001135c 0x0001135c 0x00000018 Code RO 2323 i.WDG_IRQn_Handler CVWL368.lib(irq_redirect .o) + 0x00011374 0x00011374 0x00000020 Code RO 2904 i.__0printf mc_p.l(printfa.o) + 0x00011394 0x00011394 0x00000024 Code RO 2910 i.__0vsprintf mc_p.l(printfa.o) + 0x000113b8 0x000113b8 0x0000002e Code RO 3003 i.__ARM_clz mf_p.l(depilogue.o) + 0x000113e6 0x000113e6 0x0000001a Code RO 666 i.__ARM_common_switch8 CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00011400 0x00011400 0x00000018 Code RO 1477 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_i2c_master.o) + 0x00011418 0x00011418 0x00000018 Code RO 1640 i.__NVIC_ClearPendingIRQ CVWL368.lib(drv_spi_master.o) + 0x00011430 0x00011430 0x00000020 Code RO 2146 i.__NVIC_DisableIRQ CVWL368.lib(drv_rxbr.o) + 0x00011450 0x00011450 0x00000018 Code RO 2147 i.__NVIC_EnableIRQ CVWL368.lib(drv_rxbr.o) + 0x00011468 0x00011468 0x00000044 Code RO 2442 i.__NVIC_SetPriority CVWL368.lib(hal_spi_slave.o) + 0x000114ac 0x000114ac 0x0000000e Code RO 3015 i.__scatterload_copy mc_p.l(handlers.o) + 0x000114ba 0x000114ba 0x0000000e Code RO 3017 i.__scatterload_zeroinit mc_p.l(handlers.o) + 0x000114c8 0x000114c8 0x0000000c Code RO 2993 i.__set_errno mc_p.l(errno.o) + 0x000114d4 0x000114d4 0x00000174 Code RO 2911 i._fp_digits mc_p.l(printfa.o) + 0x00011648 0x00011648 0x000006ec Code RO 2912 i._printf_core mc_p.l(printfa.o) + 0x00011d34 0x00011d34 0x00000020 Code RO 2913 i._printf_post_padding mc_p.l(printfa.o) + 0x00011d54 0x00011d54 0x0000002c Code RO 2914 i._printf_pre_padding mc_p.l(printfa.o) + 0x00011d80 0x00011d80 0x0000000a Code RO 2916 i._sputc mc_p.l(printfa.o) + 0x00011d8a 0x00011d8a 0x00000002 PAD + 0x00011d8c 0x00011d8c 0x000003c4 Code RO 102 i.ap_dcs_read ap_demo.o + 0x00012150 0x00012150 0x000001bc Code RO 103 i.ap_demo ap_demo.o + 0x0001230c 0x0001230c 0x0000003c Code RO 104 i.ap_get_reg_53 ap_demo.o + 0x00012348 0x00012348 0x0000004e Code RO 105 i.ap_get_reg_7A ap_demo.o + 0x00012396 0x00012396 0x00000002 PAD + 0x00012398 0x00012398 0x0000009c Code RO 106 i.ap_get_reg_df ap_demo.o + 0x00012434 0x00012434 0x00000030 Code RO 107 i.ap_reset_cb ap_demo.o + 0x00012464 0x00012464 0x00000058 Code RO 108 i.ap_set_backlight_51 ap_demo.o + 0x000124bc 0x000124bc 0x00000048 Code RO 109 i.ap_set_display_off ap_demo.o + 0x00012504 0x00012504 0x00000004 Code RO 110 i.ap_set_display_on ap_demo.o + 0x00012508 0x00012508 0x00000080 Code RO 111 i.ap_set_enter_sleep_mode ap_demo.o + 0x00012588 0x00012588 0x00000048 Code RO 112 i.ap_set_exit_sleep_mode ap_demo.o + 0x000125d0 0x000125d0 0x000000b0 Code RO 289 i.ap_tp_calibration app_tp_transfer.o + 0x00012680 0x00012680 0x00000030 Code RO 113 i.ap_update_frame_rate ap_demo.o + 0x000126b0 0x000126b0 0x0000001c Code RO 2148 i.app_ADC_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x000126cc 0x000126cc 0x00000024 Code RO 1401 i.app_AP_NRESET_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000126f0 0x000126f0 0x0000001c Code RO 1402 i.app_EXTI_INT0_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x0001270c 0x0001270c 0x0000001c Code RO 1403 i.app_EXTI_INT1_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012728 0x00012728 0x0000001c Code RO 1404 i.app_EXTI_INT2_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012744 0x00012744 0x0000001c Code RO 1405 i.app_EXTI_INT3_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012760 0x00012760 0x0000001c Code RO 1406 i.app_EXTI_INT4_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x0001277c 0x0001277c 0x0000001c Code RO 1407 i.app_EXTI_INT5_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x00012798 0x00012798 0x0000001c Code RO 1408 i.app_EXTI_INT6_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000127b4 0x000127b4 0x0000001c Code RO 1409 i.app_EXTI_INT7_IRQn_Handler CVWL368.lib(drv_gpio.o) + 0x000127d0 0x000127d0 0x00000048 Code RO 1148 i.app_HardFault_Handler CVWL368.lib(drv_common.o) + 0x00012818 0x00012818 0x00000018 Code RO 1512 i.app_I2C0_IRQn_Handler CVWL368.lib(drv_i2c_slave.o) + 0x00012830 0x00012830 0x00000010 Code RO 1478 i.app_I2C1_IRQn_Handler CVWL368.lib(drv_i2c_master.o) + 0x00012840 0x00012840 0x000001a4 Code RO 1758 i.app_LCDC_IRQn_Handler CVWL368.lib(hal_internal_vsync.o) + 0x000129e4 0x000129e4 0x00000088 Code RO 2090 i.app_MEMC_IRQn_Handler CVWL368.lib(drv_memc.o) + 0x00012a6c 0x00012a6c 0x00000298 Code RO 1862 i.app_MIPI_RX_IRQn_Handler CVWL368.lib(drv_dsi_rx.o) + 0x00012d04 0x00012d04 0x000000a0 Code RO 1918 i.app_MIPI_TX_IRQn_Handler CVWL368.lib(drv_dsi_tx.o) + 0x00012da4 0x00012da4 0x00000048 Code RO 1561 i.app_PWMDET_IRQn_Handler CVWL368.lib(drv_pwm.o) + 0x00012dec 0x00012dec 0x00000030 Code RO 1641 i.app_SPIM_IRQn_Handler CVWL368.lib(drv_spi_master.o) + 0x00012e1c 0x00012e1c 0x00000200 Code RO 2443 i.app_SPIS_IRQn_Handler CVWL368.lib(hal_spi_slave.o) + 0x0001301c 0x0001301c 0x00000020 Code RO 1673 i.app_SWIRE_IRQn_Handler CVWL368.lib(drv_swire.o) + 0x0001303c 0x0001303c 0x00000018 Code RO 1149 i.app_SysTick_Handler CVWL368.lib(drv_common.o) + 0x00013054 0x00013054 0x0000000a Code RO 1723 i.app_TIMER0_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x0001305e 0x0001305e 0x0000000a Code RO 1724 i.app_TIMER1_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x00013068 0x00013068 0x0000000a Code RO 1725 i.app_TIMER2_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x00013072 0x00013072 0x0000000a Code RO 1726 i.app_TIMER3_IRQn_Handler CVWL368.lib(drv_timer.o) + 0x0001307c 0x0001307c 0x00000008 Code RO 2564 i.app_UART_IRQn_Handler CVWL368.lib(drv_uart.o) + 0x00013084 0x00013084 0x0000001c Code RO 2213 i.app_VIDC_IRQn_Handler CVWL368.lib(drv_vidc.o) + 0x000130a0 0x000130a0 0x0000001c Code RO 2149 i.app_VPRE_IRQn_Handler CVWL368.lib(drv_rxbr.o) + 0x000130bc 0x000130bc 0x00000038 Code RO 2623 i.app_WDG_IRQn_Handler CVWL368.lib(drv_wdg.o) + 0x000130f4 0x000130f4 0x00000010 Code RO 1263 i.app_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x00013104 0x00013104 0x00000030 Code RO 1064 i.app_fls_ctrl_Handler CVWL368.lib(norflash.o) + 0x00013134 0x00013134 0x00000024 Code RO 290 i.app_tp_I2C_init app_tp_transfer.o + 0x00013158 0x00013158 0x00000060 Code RO 114 i.app_tp_calibration_exec ap_demo.o + 0x000131b8 0x000131b8 0x0000000a Code RO 291 i.app_tp_i2cs_callback app_tp_transfer.o + 0x000131c2 0x000131c2 0x00000002 PAD + 0x000131c4 0x000131c4 0x00000044 Code RO 292 i.app_tp_init app_tp_transfer.o + 0x00013208 0x00013208 0x00000020 Code RO 293 i.app_tp_m_read app_tp_transfer.o + 0x00013228 0x00013228 0x00000008 Code RO 294 i.app_tp_m_transfer_complate app_tp_transfer.o + 0x00013230 0x00013230 0x00000008 Code RO 295 i.app_tp_m_write app_tp_transfer.o + 0x00013238 0x00013238 0x000003d0 Code RO 449 i.app_tp_phone_analysis_data app_tp_for_custom_s8.o + 0x00013608 0x00013608 0x00000008 Code RO 298 i.app_tp_s_read app_tp_transfer.o + 0x00013610 0x00013610 0x00000008 Code RO 300 i.app_tp_s_write app_tp_transfer.o + 0x00013618 0x00013618 0x00000360 Code RO 451 i.app_tp_screen_analysis_int app_tp_for_custom_s8.o + 0x00013978 0x00013978 0x00000030 Code RO 301 i.app_tp_screen_init app_tp_transfer.o + 0x000139a8 0x000139a8 0x0000000c Code RO 302 i.app_tp_screen_int_callback app_tp_transfer.o + 0x000139b4 0x000139b4 0x00000038 Code RO 303 i.app_tp_screen_int_init app_tp_transfer.o + 0x000139ec 0x000139ec 0x0000001c Code RO 304 i.app_tp_screen_int_lvl_low app_tp_transfer.o + 0x00013a08 0x00013a08 0x00000030 Code RO 305 i.app_tp_transfer_phone app_tp_transfer.o + 0x00013a38 0x00013a38 0x00000040 Code RO 306 i.app_tp_transfer_screen_const app_tp_transfer.o + 0x00013a78 0x00013a78 0x00000104 Code RO 307 i.app_tp_transfer_screen_int app_tp_transfer.o + 0x00013b7c 0x00013b7c 0x00000014 Code RO 308 i.app_tp_transfer_screen_start app_tp_transfer.o + 0x00013b90 0x00013b90 0x00000024 Code RO 548 i.board_Init board.o + 0x00013bb4 0x00013bb4 0x000004f0 Code RO 1759 i.calc_framebuffer_setting CVWL368.lib(hal_internal_vsync.o) + 0x000140a4 0x000140a4 0x000000c8 Code RO 2647 i.ceil m_ps.l(ceil.o) + 0x0001416c 0x0001416c 0x0000002c Code RO 1760 i.check_mipi_rx_tx_video_info CVWL368.lib(hal_internal_vsync.o) + 0x00014198 0x00014198 0x00000094 Code RO 1761 i.check_pkt_buf_rev CVWL368.lib(hal_internal_vsync.o) + 0x0001422c 0x0001422c 0x00000058 Code RO 1849 i.dcs_packet_fifo_alloc CVWL368.lib(dcs_packet_fifo.o) + 0x00014284 0x00014284 0x00000018 Code RO 1850 i.dcs_packet_fifo_init CVWL368.lib(dcs_packet_fifo.o) + 0x0001429c 0x0001429c 0x00000044 Code RO 1851 i.dcs_packet_free_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x000142e0 0x000142e0 0x00000024 Code RO 1852 i.dcs_packet_get_fifo_header CVWL368.lib(dcs_packet_fifo.o) + 0x00014304 0x00014304 0x0000001c Code RO 1762 i.dcs_sw_filter CVWL368.lib(hal_internal_vsync.o) + 0x00014320 0x00014320 0x00000018 Code RO 1026 i.delayMs CVWL368.lib(tau_delay.o) + 0x00014338 0x00014338 0x00000022 Code RO 1027 i.delayUs CVWL368.lib(tau_delay.o) + 0x0001435a 0x0001435a 0x00000002 PAD + 0x0001435c 0x0001435c 0x00000038 Code RO 1692 i.drv_ap_rst_trig_edge_detect CVWL368.lib(drv_sys_cfg.o) + 0x00014394 0x00014394 0x0000000c Code RO 2413 i.drv_chip_info_get_info CVWL368.lib(drv_chip_info.o) + 0x000143a0 0x000143a0 0x00000040 Code RO 2414 i.drv_chip_info_init CVWL368.lib(drv_chip_info.o) + 0x000143e0 0x000143e0 0x000000b0 Code RO 2415 i.drv_chip_rx_info_check CVWL368.lib(drv_chip_info.o) + 0x00014490 0x00014490 0x00000014 Code RO 2416 i.drv_chip_rx_init_done CVWL368.lib(drv_chip_info.o) + 0x000144a4 0x000144a4 0x00000058 Code RO 1151 i.drv_common_enable_systick CVWL368.lib(drv_common.o) + 0x000144fc 0x000144fc 0x00000008 Code RO 1154 i.drv_common_system_init CVWL368.lib(drv_common.o) + 0x00014504 0x00014504 0x00000010 Code RO 1176 i.drv_crgu_config_reset_modules CVWL368.lib(drv_crgu.o) + 0x00014514 0x00014514 0x00000014 Code RO 1189 i.drv_crgu_set_ahb_pre_div CVWL368.lib(drv_crgu.o) + 0x00014528 0x00014528 0x00000014 Code RO 1190 i.drv_crgu_set_ahb_src CVWL368.lib(drv_crgu.o) + 0x0001453c 0x0001453c 0x00000020 Code RO 1193 i.drv_crgu_set_clock CVWL368.lib(drv_crgu.o) + 0x0001455c 0x0001455c 0x00000014 Code RO 1194 i.drv_crgu_set_dpi_mux_src CVWL368.lib(drv_crgu.o) + 0x00014570 0x00014570 0x00000018 Code RO 1195 i.drv_crgu_set_dpi_pre_div CVWL368.lib(drv_crgu.o) + 0x00014588 0x00014588 0x00000014 Code RO 1196 i.drv_crgu_set_dpi_pre_src CVWL368.lib(drv_crgu.o) + 0x0001459c 0x0001459c 0x00000014 Code RO 1197 i.drv_crgu_set_dsc_core_div CVWL368.lib(drv_crgu.o) + 0x000145b0 0x000145b0 0x00000014 Code RO 1198 i.drv_crgu_set_dsco_src CVWL368.lib(drv_crgu.o) + 0x000145c4 0x000145c4 0x00000014 Code RO 1199 i.drv_crgu_set_dsco_src_div CVWL368.lib(drv_crgu.o) + 0x000145d8 0x000145d8 0x00000014 Code RO 1200 i.drv_crgu_set_fb_div CVWL368.lib(drv_crgu.o) + 0x000145ec 0x000145ec 0x00000014 Code RO 1201 i.drv_crgu_set_fb_src CVWL368.lib(drv_crgu.o) + 0x00014600 0x00014600 0x00000014 Code RO 1204 i.drv_crgu_set_lcdc_div CVWL368.lib(drv_crgu.o) + 0x00014614 0x00014614 0x00000014 Code RO 1205 i.drv_crgu_set_lcdc_src CVWL368.lib(drv_crgu.o) + 0x00014628 0x00014628 0x00000014 Code RO 1206 i.drv_crgu_set_mipi_cfg_src CVWL368.lib(drv_crgu.o) + 0x0001463c 0x0001463c 0x00000018 Code RO 1207 i.drv_crgu_set_mipi_ref_src CVWL368.lib(drv_crgu.o) + 0x00014654 0x00014654 0x00000018 Code RO 1210 i.drv_crgu_set_reset CVWL368.lib(drv_crgu.o) + 0x0001466c 0x0001466c 0x00000014 Code RO 1211 i.drv_crgu_set_rxbr_div CVWL368.lib(drv_crgu.o) + 0x00014680 0x00014680 0x00000014 Code RO 1212 i.drv_crgu_set_rxbr_src CVWL368.lib(drv_crgu.o) + 0x00014694 0x00014694 0x00000014 Code RO 1214 i.drv_crgu_set_vidc_src CVWL368.lib(drv_crgu.o) + 0x000146a8 0x000146a8 0x00000018 Code RO 1267 i.drv_dma_clear_flag CVWL368.lib(drv_dma.o) + 0x000146c0 0x000146c0 0x0000001c Code RO 1268 i.drv_dma_create_handle CVWL368.lib(drv_dma.o) + 0x000146dc 0x000146dc 0x00000010 Code RO 1270 i.drv_dma_disenable_channel CVWL368.lib(drv_dma.o) + 0x000146ec 0x000146ec 0x00000010 Code RO 1272 i.drv_dma_enable_channel CVWL368.lib(drv_dma.o) + 0x000146fc 0x000146fc 0x00000024 Code RO 1273 i.drv_dma_enable_channel_interrupts CVWL368.lib(drv_dma.o) + 0x00014720 0x00014720 0x0000000c Code RO 1275 i.drv_dma_get_channel_flag CVWL368.lib(drv_dma.o) + 0x0001472c 0x0001472c 0x00000090 Code RO 1278 i.drv_dma_irq_handler CVWL368.lib(drv_dma.o) + 0x000147bc 0x000147bc 0x00000012 Code RO 1280 i.drv_dma_prepar_transfer CVWL368.lib(drv_dma.o) + 0x000147ce 0x000147ce 0x0000001a Code RO 1282 i.drv_dma_set_burst CVWL368.lib(drv_dma.o) + 0x000147e8 0x000147e8 0x00000006 Code RO 1283 i.drv_dma_set_callback CVWL368.lib(drv_dma.o) + 0x000147ee 0x000147ee 0x00000002 PAD + 0x000147f0 0x000147f0 0x00000044 Code RO 1285 i.drv_dma_set_transfer CVWL368.lib(drv_dma.o) + 0x00014834 0x00014834 0x00000036 Code RO 2426 i.drv_dsc_dec_convert_pps_rc_parameter CVWL368.lib(drv_dsc_dec.o) + 0x0001486a 0x0001486a 0x0000000c Code RO 2427 i.drv_dsc_dec_disable CVWL368.lib(drv_dsc_dec.o) + 0x00014876 0x00014876 0x00000002 PAD + 0x00014878 0x00014878 0x00000074 Code RO 2428 i.drv_dsc_dec_enable CVWL368.lib(drv_dsc_dec.o) + 0x000148ec 0x000148ec 0x0000000a Code RO 2429 i.drv_dsc_dec_get_nslc CVWL368.lib(drv_dsc_dec.o) + 0x000148f6 0x000148f6 0x00000028 Code RO 2431 i.drv_dsc_dec_set_u8_pps CVWL368.lib(drv_dsc_dec.o) + 0x0001491e 0x0001491e 0x00000002 PAD + 0x00014920 0x00014920 0x00000104 Code RO 1863 i.drv_dsi_rx_calc_ipi_tx_delay CVWL368.lib(drv_dsi_rx.o) + 0x00014a24 0x00014a24 0x00000040 Code RO 1864 i.drv_dsi_rx_enable_irq CVWL368.lib(drv_dsi_rx.o) + 0x00014a64 0x00014a64 0x00000050 Code RO 1865 i.drv_dsi_rx_get_color_bpp CVWL368.lib(drv_dsi_rx.o) + 0x00014ab4 0x00014ab4 0x0000001c Code RO 1866 i.drv_dsi_rx_get_color_pcc CVWL368.lib(drv_dsi_rx.o) + 0x00014ad0 0x00014ad0 0x00000008 Code RO 1867 i.drv_dsi_rx_get_compression_en CVWL368.lib(drv_dsi_rx.o) + 0x00014ad8 0x00014ad8 0x00000006 Code RO 1868 i.drv_dsi_rx_get_max_ret_size CVWL368.lib(drv_dsi_rx.o) + 0x00014ade 0x00014ade 0x0000000e Code RO 1872 i.drv_dsi_rx_power_up CVWL368.lib(drv_dsi_rx.o) + 0x00014aec 0x00014aec 0x00000020 Code RO 1873 i.drv_dsi_rx_set_ctrl_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014b0c 0x00014b0c 0x00000010 Code RO 1874 i.drv_dsi_rx_set_ddi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014b1c 0x00014b1c 0x00000004 Code RO 1876 i.drv_dsi_rx_set_inten CVWL368.lib(drv_dsi_rx.o) + 0x00014b20 0x00014b20 0x00000010 Code RO 1877 i.drv_dsi_rx_set_ipi_cfg CVWL368.lib(drv_dsi_rx.o) + 0x00014b30 0x00014b30 0x00000046 Code RO 1879 i.drv_dsi_rx_set_lane_swap CVWL368.lib(drv_dsi_rx.o) + 0x00014b76 0x00014b76 0x00000026 Code RO 1880 i.drv_dsi_rx_set_resp_cnt CVWL368.lib(drv_dsi_rx.o) + 0x00014b9c 0x00014b9c 0x00000104 Code RO 1881 i.drv_dsi_rx_set_up_phy CVWL368.lib(drv_dsi_rx.o) + 0x00014ca0 0x00014ca0 0x0000000e Code RO 1882 i.drv_dsi_rx_shut_down CVWL368.lib(drv_dsi_rx.o) + 0x00014cae 0x00014cae 0x00000004 Code RO 1919 i.drv_dsi_tx_command_get_payload CVWL368.lib(drv_dsi_tx.o) + 0x00014cb2 0x00014cb2 0x00000014 Code RO 1920 i.drv_dsi_tx_command_header CVWL368.lib(drv_dsi_tx.o) + 0x00014cc6 0x00014cc6 0x0000006c Code RO 1921 i.drv_dsi_tx_command_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00014d32 0x00014d32 0x00000004 Code RO 1922 i.drv_dsi_tx_command_put_payload CVWL368.lib(drv_dsi_tx.o) + 0x00014d36 0x00014d36 0x00000018 Code RO 1923 i.drv_dsi_tx_config_eotp CVWL368.lib(drv_dsi_tx.o) + 0x00014d4e 0x00014d4e 0x00000008 Code RO 1924 i.drv_dsi_tx_config_int CVWL368.lib(drv_dsi_tx.o) + 0x00014d56 0x00014d56 0x00000008 Code RO 1925 i.drv_dsi_tx_dpi_lpcmd_time CVWL368.lib(drv_dsi_tx.o) + 0x00014d5e 0x00014d5e 0x0000000a Code RO 1926 i.drv_dsi_tx_dpi_mode CVWL368.lib(drv_dsi_tx.o) + 0x00014d68 0x00014d68 0x00000024 Code RO 1927 i.drv_dsi_tx_dpi_polarity CVWL368.lib(drv_dsi_tx.o) + 0x00014d8c 0x00014d8c 0x00000004 Code RO 1928 i.drv_dsi_tx_edpi_cmd_size CVWL368.lib(drv_dsi_tx.o) + 0x00014d90 0x00014d90 0x00000004 Code RO 1930 i.drv_dsi_tx_get_cmd_status CVWL368.lib(drv_dsi_tx.o) + 0x00014d94 0x00014d94 0x00000004 Code RO 1932 i.drv_dsi_tx_mode CVWL368.lib(drv_dsi_tx.o) + 0x00014d98 0x00014d98 0x00000018 Code RO 1933 i.drv_dsi_tx_phy_clock_lane_auto_lp CVWL368.lib(drv_dsi_tx.o) + 0x00014db0 0x00014db0 0x0000001a Code RO 1934 i.drv_dsi_tx_phy_clock_lane_req_hs CVWL368.lib(drv_dsi_tx.o) + 0x00014dca 0x00014dca 0x0000000c Code RO 1936 i.drv_dsi_tx_phy_lane_mode CVWL368.lib(drv_dsi_tx.o) + 0x00014dd6 0x00014dd6 0x00000064 Code RO 1940 i.drv_dsi_tx_phy_status_ready CVWL368.lib(drv_dsi_tx.o) + 0x00014e3a 0x00014e3a 0x0000003e Code RO 1941 i.drv_dsi_tx_phy_status_stopstate CVWL368.lib(drv_dsi_tx.o) + 0x00014e78 0x00014e78 0x00000134 Code RO 1943 i.drv_dsi_tx_phy_test_setup CVWL368.lib(drv_dsi_tx.o) + 0x00014fac 0x00014fac 0x0000001e Code RO 1944 i.drv_dsi_tx_phy_time_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00014fca 0x00014fca 0x00000008 Code RO 1948 i.drv_dsi_tx_powerup CVWL368.lib(drv_dsi_tx.o) + 0x00014fd2 0x00014fd2 0x0000001c Code RO 1949 i.drv_dsi_tx_response_mode CVWL368.lib(drv_dsi_tx.o) + 0x00014fee 0x00014fee 0x00000018 Code RO 1952 i.drv_dsi_tx_set_bta_ack CVWL368.lib(drv_dsi_tx.o) + 0x00015006 0x00015006 0x0000000c Code RO 1953 i.drv_dsi_tx_set_esc_div CVWL368.lib(drv_dsi_tx.o) + 0x00015012 0x00015012 0x00000002 PAD + 0x00015014 0x00015014 0x00000040 Code RO 1954 i.drv_dsi_tx_set_int CVWL368.lib(drv_dsi_tx.o) + 0x00015054 0x00015054 0x00000010 Code RO 1955 i.drv_dsi_tx_set_time_out_div CVWL368.lib(drv_dsi_tx.o) + 0x00015064 0x00015064 0x00000008 Code RO 1956 i.drv_dsi_tx_set_video_chunk CVWL368.lib(drv_dsi_tx.o) + 0x0001506c 0x0001506c 0x00000022 Code RO 1957 i.drv_dsi_tx_set_video_timing CVWL368.lib(drv_dsi_tx.o) + 0x0001508e 0x0001508e 0x00000008 Code RO 1959 i.drv_dsi_tx_shutdown CVWL368.lib(drv_dsi_tx.o) + 0x00015096 0x00015096 0x00000026 Code RO 1960 i.drv_dsi_tx_timeout_cfg CVWL368.lib(drv_dsi_tx.o) + 0x000150bc 0x000150bc 0x000000aa Code RO 1963 i.drv_dsi_tx_video_mode_cfg CVWL368.lib(drv_dsi_tx.o) + 0x00015166 0x00015166 0x00000016 Code RO 1964 i.drv_dsi_tx_video_mode_disable_hact_cmd CVWL368.lib(drv_dsi_tx.o) + 0x0001517c 0x0001517c 0x00000018 Code RO 1965 i.drv_dsi_tx_video_mode_set_lp_cmd CVWL368.lib(drv_dsi_tx.o) + 0x00015194 0x00015194 0x0000002e Code RO 2364 i.drv_efuse_enter_inactive CVWL368.lib(drv_efuse.o) + 0x000151c2 0x000151c2 0x0000000c Code RO 2367 i.drv_efuse_int_enable CVWL368.lib(drv_efuse.o) + 0x000151ce 0x000151ce 0x00000032 Code RO 2368 i.drv_efuse_read CVWL368.lib(drv_efuse.o) + 0x00015200 0x00015200 0x00000018 Code RO 2369 i.drv_efuse_read_req CVWL368.lib(drv_efuse.o) + 0x00015218 0x00015218 0x00000018 Code RO 1410 i.drv_gpio_get_input_data CVWL368.lib(drv_gpio.o) + 0x00015230 0x00015230 0x0000000c Code RO 1412 i.drv_gpio_register_ap_reset_callback CVWL368.lib(drv_gpio.o) + 0x0001523c 0x0001523c 0x00000014 Code RO 1413 i.drv_gpio_register_callback CVWL368.lib(drv_gpio.o) + 0x00015250 0x00015250 0x00000050 Code RO 1415 i.drv_gpio_set_int CVWL368.lib(drv_gpio.o) + 0x000152a0 0x000152a0 0x00000020 Code RO 1416 i.drv_gpio_set_ioe CVWL368.lib(drv_gpio.o) + 0x000152c0 0x000152c0 0x00000010 Code RO 1417 i.drv_gpio_set_mode0 CVWL368.lib(drv_gpio.o) + 0x000152d0 0x000152d0 0x00000010 Code RO 1418 i.drv_gpio_set_mode1 CVWL368.lib(drv_gpio.o) + 0x000152e0 0x000152e0 0x00000010 Code RO 1419 i.drv_gpio_set_mode2 CVWL368.lib(drv_gpio.o) + 0x000152f0 0x000152f0 0x00000010 Code RO 1420 i.drv_gpio_set_mode3 CVWL368.lib(drv_gpio.o) + 0x00015300 0x00015300 0x00000020 Code RO 774 i.drv_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x00015320 0x00015320 0x00000130 Code RO 1421 i.drv_gpio_set_pull_state CVWL368.lib(drv_gpio.o) + 0x00015450 0x00015450 0x0000000c Code RO 1513 i.drv_i2c0_set_callback CVWL368.lib(drv_i2c_slave.o) + 0x0001545c 0x0001545c 0x0000000c Code RO 1479 i.drv_i2c1_set_callback CVWL368.lib(drv_i2c_master.o) + 0x00015468 0x00015468 0x00000034 Code RO 1453 i.drv_i2c_dma_callback CVWL368.lib(drv_i2c_dma.o) + 0x0001549c 0x0001549c 0x000000ac Code RO 1454 i.drv_i2c_dma_init CVWL368.lib(drv_i2c_dma.o) + 0x00015548 0x00015548 0x0000001a Code RO 1455 i.drv_i2c_enable_rx_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015562 0x00015562 0x00000018 Code RO 1456 i.drv_i2c_enable_tx_dma CVWL368.lib(drv_i2c_dma.o) + 0x0001557a 0x0001557a 0x00000002 PAD + 0x0001557c 0x0001557c 0x00000060 Code RO 1481 i.drv_i2c_m_clear_it_pending_bit CVWL368.lib(drv_i2c_master.o) + 0x000155dc 0x000155dc 0x00000010 Code RO 1484 i.drv_i2c_m_enable CVWL368.lib(drv_i2c_master.o) + 0x000155ec 0x000155ec 0x00000038 Code RO 1485 i.drv_i2c_m_enable_intr CVWL368.lib(drv_i2c_master.o) + 0x00015624 0x00015624 0x0000008c Code RO 1491 i.drv_i2c_master_init CVWL368.lib(drv_i2c_master.o) + 0x000156b0 0x000156b0 0x0000005c Code RO 1457 i.drv_i2c_master_read_dma CVWL368.lib(drv_i2c_dma.o) + 0x0001570c 0x0001570c 0x0000003c Code RO 1458 i.drv_i2c_master_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x00015748 0x00015748 0x0000003e Code RO 1459 i.drv_i2c_master_write_read_cmd CVWL368.lib(drv_i2c_dma.o) + 0x00015786 0x00015786 0x00000042 Code RO 1514 i.drv_i2c_s_clear_it_pending_bit CVWL368.lib(drv_i2c_slave.o) + 0x000157c8 0x000157c8 0x00000004 Code RO 1515 i.drv_i2c_s_config_intr CVWL368.lib(drv_i2c_slave.o) + 0x000157cc 0x000157cc 0x00000008 Code RO 1516 i.drv_i2c_s_enable CVWL368.lib(drv_i2c_slave.o) + 0x000157d4 0x000157d4 0x00000014 Code RO 1517 i.drv_i2c_s_get_fifo_status CVWL368.lib(drv_i2c_slave.o) + 0x000157e8 0x000157e8 0x00000050 Code RO 1520 i.drv_i2c_s_set_intr CVWL368.lib(drv_i2c_slave.o) + 0x00015838 0x00015838 0x0000001c Code RO 1521 i.drv_i2c_s_write_data CVWL368.lib(drv_i2c_slave.o) + 0x00015854 0x00015854 0x00000058 Code RO 1460 i.drv_i2c_set_dma_irq_callback CVWL368.lib(drv_i2c_dma.o) + 0x000158ac 0x000158ac 0x00000032 Code RO 1522 i.drv_i2c_slave_init CVWL368.lib(drv_i2c_slave.o) + 0x000158de 0x000158de 0x00000002 PAD + 0x000158e0 0x000158e0 0x00000018 Code RO 1461 i.drv_i2c_slave_write_dma CVWL368.lib(drv_i2c_dma.o) + 0x000158f8 0x000158f8 0x00000018 Code RO 2032 i.drv_lcdc_config_bypass CVWL368.lib(drv_lcdc.o) + 0x00015910 0x00015910 0x00000030 Code RO 2033 i.drv_lcdc_config_ccm CVWL368.lib(drv_lcdc.o) + 0x00015940 0x00015940 0x00000016 Code RO 2034 i.drv_lcdc_config_disp_mode CVWL368.lib(drv_lcdc.o) + 0x00015956 0x00015956 0x00000024 Code RO 2035 i.drv_lcdc_config_dpi_polarity CVWL368.lib(drv_lcdc.o) + 0x0001597a 0x0001597a 0x00000026 Code RO 2036 i.drv_lcdc_config_dpi_timing CVWL368.lib(drv_lcdc.o) + 0x000159a0 0x000159a0 0x00000016 Code RO 2037 i.drv_lcdc_config_edpi_mode CVWL368.lib(drv_lcdc.o) + 0x000159b6 0x000159b6 0x00000016 Code RO 2038 i.drv_lcdc_config_endianness CVWL368.lib(drv_lcdc.o) + 0x000159cc 0x000159cc 0x0000000c Code RO 2039 i.drv_lcdc_config_input_size CVWL368.lib(drv_lcdc.o) + 0x000159d8 0x000159d8 0x0000001e Code RO 2040 i.drv_lcdc_config_int CVWL368.lib(drv_lcdc.o) + 0x000159f6 0x000159f6 0x00000022 Code RO 2041 i.drv_lcdc_config_int_single CVWL368.lib(drv_lcdc.o) + 0x00015a18 0x00015a18 0x00000022 Code RO 2042 i.drv_lcdc_config_overwrite CVWL368.lib(drv_lcdc.o) + 0x00015a3a 0x00015a3a 0x0000000c Code RO 2043 i.drv_lcdc_config_overwrite_rgb CVWL368.lib(drv_lcdc.o) + 0x00015a46 0x00015a46 0x0000001a Code RO 2044 i.drv_lcdc_config_partial_display_area CVWL368.lib(drv_lcdc.o) + 0x00015a60 0x00015a60 0x00000022 Code RO 2045 i.drv_lcdc_config_partial_display_enable CVWL368.lib(drv_lcdc.o) + 0x00015a82 0x00015a82 0x0000001a Code RO 2047 i.drv_lcdc_config_scale_up_coef CVWL368.lib(drv_lcdc.o) + 0x00015a9c 0x00015a9c 0x0000000c Code RO 2048 i.drv_lcdc_config_scale_up_step CVWL368.lib(drv_lcdc.o) + 0x00015aa8 0x00015aa8 0x0000004c Code RO 2049 i.drv_lcdc_config_src_parameter CVWL368.lib(drv_lcdc.o) + 0x00015af4 0x00015af4 0x00000006 Code RO 2050 i.drv_lcdc_config_thresh CVWL368.lib(drv_lcdc.o) + 0x00015afa 0x00015afa 0x00000012 Code RO 2051 i.drv_lcdc_ctrl_flow CVWL368.lib(drv_lcdc.o) + 0x00015b0c 0x00015b0c 0x00000020 Code RO 2053 i.drv_lcdc_enable_shadow_reg CVWL368.lib(drv_lcdc.o) + 0x00015b2c 0x00015b2c 0x00000040 Code RO 2054 i.drv_lcdc_set_int CVWL368.lib(drv_lcdc.o) + 0x00015b6c 0x00015b6c 0x00000014 Code RO 2056 i.drv_lcdc_set_video_hw_mode CVWL368.lib(drv_lcdc.o) + 0x00015b80 0x00015b80 0x00000020 Code RO 2057 i.drv_lcdc_start CVWL368.lib(drv_lcdc.o) + 0x00015ba0 0x00015ba0 0x0000000c Code RO 2091 i.drv_memc_clear_status CVWL368.lib(drv_memc.o) + 0x00015bac 0x00015bac 0x00000040 Code RO 2092 i.drv_memc_enable_irq CVWL368.lib(drv_memc.o) + 0x00015bec 0x00015bec 0x0000000c Code RO 2093 i.drv_memc_gen_a_tear_signal CVWL368.lib(drv_memc.o) + 0x00015bf8 0x00015bf8 0x00000012 Code RO 2094 i.drv_memc_get_status CVWL368.lib(drv_memc.o) + 0x00015c0a 0x00015c0a 0x00000010 Code RO 2095 i.drv_memc_rate_transfer_sel CVWL368.lib(drv_memc.o) + 0x00015c1a 0x00015c1a 0x0000000e Code RO 2096 i.drv_memc_sel_vsync CVWL368.lib(drv_memc.o) + 0x00015c28 0x00015c28 0x00000014 Code RO 2097 i.drv_memc_set_active_height CVWL368.lib(drv_memc.o) + 0x00015c3c 0x00015c3c 0x0000000c Code RO 2098 i.drv_memc_set_data_mode CVWL368.lib(drv_memc.o) + 0x00015c48 0x00015c48 0x00000010 Code RO 2101 i.drv_memc_set_double_buffer CVWL368.lib(drv_memc.o) + 0x00015c58 0x00015c58 0x00000012 Code RO 2102 i.drv_memc_set_double_buffer_reverse CVWL368.lib(drv_memc.o) + 0x00015c6a 0x00015c6a 0x00000010 Code RO 2104 i.drv_memc_set_fs_en_conditions CVWL368.lib(drv_memc.o) + 0x00015c7a 0x00015c7a 0x00000014 Code RO 2105 i.drv_memc_set_inten CVWL368.lib(drv_memc.o) + 0x00015c8e 0x00015c8e 0x00000002 PAD + 0x00015c90 0x00015c90 0x00000018 Code RO 2106 i.drv_memc_set_lcdc_st_conditions CVWL368.lib(drv_memc.o) + 0x00015ca8 0x00015ca8 0x0000001a Code RO 2107 i.drv_memc_set_ltpo_mode CVWL368.lib(drv_memc.o) + 0x00015cc2 0x00015cc2 0x0000000e Code RO 2111 i.drv_memc_set_tear_mode CVWL368.lib(drv_memc.o) + 0x00015cd0 0x00015cd0 0x00000028 Code RO 2112 i.drv_memc_set_tear_waveform CVWL368.lib(drv_memc.o) + 0x00015cf8 0x00015cf8 0x0000000e Code RO 2114 i.drv_memc_set_vidc_sync_cnt CVWL368.lib(drv_memc.o) + 0x00015d06 0x00015d06 0x00000002 PAD + 0x00015d08 0x00015d08 0x00000008 Code RO 1539 i.drv_param_init_get_ccm CVWL368.lib(drv_param_init.o) + 0x00015d10 0x00015d10 0x00000014 Code RO 1540 i.drv_param_init_get_scld_filter_h CVWL368.lib(drv_param_init.o) + 0x00015d24 0x00015d24 0x00000014 Code RO 1541 i.drv_param_init_get_scld_filter_v CVWL368.lib(drv_param_init.o) + 0x00015d38 0x00015d38 0x00000008 Code RO 1542 i.drv_param_init_get_sclu_filter CVWL368.lib(drv_param_init.o) + 0x00015d40 0x00015d40 0x00000014 Code RO 1543 i.drv_param_init_set_ccm CVWL368.lib(drv_param_init.o) + 0x00015d54 0x00015d54 0x00000064 Code RO 1544 i.drv_param_init_set_scld_filter CVWL368.lib(drv_param_init.o) + 0x00015db8 0x00015db8 0x00000024 Code RO 1546 i.drv_param_p2r_filter_init CVWL368.lib(drv_param_init.o) + 0x00015ddc 0x00015ddc 0x00000010 Code RO 2385 i.drv_phy_enable_calibration CVWL368.lib(drv_phy_common.o) + 0x00015dec 0x00015dec 0x0000003c Code RO 2386 i.drv_phy_get_calibration CVWL368.lib(drv_phy_common.o) + 0x00015e28 0x00015e28 0x00000060 Code RO 2387 i.drv_phy_get_pll_para CVWL368.lib(drv_phy_common.o) + 0x00015e88 0x00015e88 0x00000054 Code RO 2388 i.drv_phy_get_rate_para CVWL368.lib(drv_phy_common.o) + 0x00015edc 0x00015edc 0x00000010 Code RO 2389 i.drv_phy_test_clear CVWL368.lib(drv_phy_common.o) + 0x00015eec 0x00015eec 0x00000018 Code RO 2390 i.drv_phy_test_lock CVWL368.lib(drv_phy_common.o) + 0x00015f04 0x00015f04 0x00000020 Code RO 2392 i.drv_phy_test_write_1_byte CVWL368.lib(drv_phy_common.o) + 0x00015f24 0x00015f24 0x00000026 Code RO 2393 i.drv_phy_test_write_2_byte CVWL368.lib(drv_phy_common.o) + 0x00015f4a 0x00015f4a 0x0000001e Code RO 2394 i.drv_phy_test_write_code CVWL368.lib(drv_phy_common.o) + 0x00015f68 0x00015f68 0x00000020 Code RO 2395 i.drv_phy_test_write_data CVWL368.lib(drv_phy_common.o) + 0x00015f88 0x00015f88 0x00000020 Code RO 1601 i.drv_pwr_set_cp_mode CVWL368.lib(drv_pwr.o) + 0x00015fa8 0x00015fa8 0x00000018 Code RO 1603 i.drv_pwr_set_pvd_mode CVWL368.lib(drv_pwr.o) + 0x00015fc0 0x00015fc0 0x00000038 Code RO 1604 i.drv_pwr_set_system_clk_src CVWL368.lib(drv_pwr.o) + 0x00015ff8 0x00015ff8 0x0000000c Code RO 1883 i.drv_rx_phy_test_clear CVWL368.lib(drv_dsi_rx.o) + 0x00016004 0x00016004 0x00000010 Code RO 1884 i.drv_rx_phy_test_lock CVWL368.lib(drv_dsi_rx.o) + 0x00016014 0x00016014 0x00000014 Code RO 1886 i.drv_rx_phy_test_write_1_byte CVWL368.lib(drv_dsi_rx.o) + 0x00016028 0x00016028 0x00000016 Code RO 1887 i.drv_rx_phy_test_write_2_byte CVWL368.lib(drv_dsi_rx.o) + 0x0001603e 0x0001603e 0x0000000a Code RO 2150 i.drv_rxbr_clear_pkt_buffer CVWL368.lib(drv_rxbr.o) + 0x00016048 0x00016048 0x00000004 Code RO 2151 i.drv_rxbr_clear_status0 CVWL368.lib(drv_rxbr.o) + 0x0001604c 0x0001604c 0x0000005a Code RO 2153 i.drv_rxbr_enable_irq CVWL368.lib(drv_rxbr.o) + 0x000160a6 0x000160a6 0x00000002 PAD + 0x000160a8 0x000160a8 0x00000014 Code RO 2154 i.drv_rxbr_frame_drop_cfg CVWL368.lib(drv_rxbr.o) + 0x000160bc 0x000160bc 0x00000064 Code RO 2155 i.drv_rxbr_get_clk CVWL368.lib(drv_rxbr.o) + 0x00016120 0x00016120 0x00000004 Code RO 2156 i.drv_rxbr_get_col_addr CVWL368.lib(drv_rxbr.o) + 0x00016124 0x00016124 0x00000012 Code RO 1763 i.drv_rxbr_get_int_source CVWL368.lib(hal_internal_vsync.o) + 0x00016136 0x00016136 0x00000004 Code RO 2159 i.drv_rxbr_get_page_addr CVWL368.lib(drv_rxbr.o) + 0x0001613a 0x0001613a 0x00000012 Code RO 1764 i.drv_rxbr_get_status0 CVWL368.lib(hal_internal_vsync.o) + 0x0001614c 0x0001614c 0x0000000c Code RO 2161 i.drv_rxbr_hline_rcv0_cfg CVWL368.lib(drv_rxbr.o) + 0x00016158 0x00016158 0x00000008 Code RO 2162 i.drv_rxbr_hline_rcv_cfg CVWL368.lib(drv_rxbr.o) + 0x00016160 0x00016160 0x0000000c Code RO 2163 i.drv_rxbr_register_irq0_callback CVWL368.lib(drv_rxbr.o) + 0x0001616c 0x0001616c 0x0000000c Code RO 2164 i.drv_rxbr_register_irq1_callback CVWL368.lib(drv_rxbr.o) + 0x00016178 0x00016178 0x00000014 Code RO 2165 i.drv_rxbr_set_ack_pkt_header CVWL368.lib(drv_rxbr.o) + 0x0001618c 0x0001618c 0x000000cc Code RO 2166 i.drv_rxbr_set_cmd_filter CVWL368.lib(drv_rxbr.o) + 0x00016258 0x00016258 0x00000014 Code RO 2168 i.drv_rxbr_set_color_format CVWL368.lib(drv_rxbr.o) + 0x0001626c 0x0001626c 0x00000014 Code RO 2170 i.drv_rxbr_set_inten CVWL368.lib(drv_rxbr.o) + 0x00016280 0x00016280 0x00000010 Code RO 2171 i.drv_rxbr_set_ltpo_drop_th CVWL368.lib(drv_rxbr.o) + 0x00016290 0x00016290 0x00000026 Code RO 2173 i.drv_rxbr_set_usr_cfg CVWL368.lib(drv_rxbr.o) + 0x000162b6 0x000162b6 0x00000008 Code RO 2174 i.drv_rxbr_set_usr_col CVWL368.lib(drv_rxbr.o) + 0x000162be 0x000162be 0x00000008 Code RO 2175 i.drv_rxbr_set_usr_row CVWL368.lib(drv_rxbr.o) + 0x000162c6 0x000162c6 0x00000002 PAD + 0x000162c8 0x000162c8 0x00000020 Code RO 1649 i.drv_spi_m_read_data CVWL368.lib(drv_spi_master.o) + 0x000162e8 0x000162e8 0x0000001c Code RO 1674 i.drv_swire_enable CVWL368.lib(drv_swire.o) + 0x00016304 0x00016304 0x00000054 Code RO 1677 i.drv_swire_set_int CVWL368.lib(drv_swire.o) + 0x00016358 0x00016358 0x0000001c Code RO 1678 i.drv_swire_set_power_down CVWL368.lib(drv_swire.o) + 0x00016374 0x00016374 0x0000000c Code RO 1693 i.drv_sys_cfg_clear_all_int CVWL368.lib(drv_sys_cfg.o) + 0x00016380 0x00016380 0x00000028 Code RO 1694 i.drv_sys_cfg_clear_pending CVWL368.lib(drv_sys_cfg.o) + 0x000163a8 0x000163a8 0x00000018 Code RO 1697 i.drv_sys_cfg_sel_ap_rst_lvl_trig CVWL368.lib(drv_sys_cfg.o) + 0x000163c0 0x000163c0 0x0000001c Code RO 1698 i.drv_sys_cfg_sel_ap_rst_trig CVWL368.lib(drv_sys_cfg.o) + 0x000163dc 0x000163dc 0x00000024 Code RO 1699 i.drv_sys_cfg_sel_gpio_group CVWL368.lib(drv_sys_cfg.o) + 0x00016400 0x00016400 0x00000024 Code RO 1700 i.drv_sys_cfg_sel_int_trig CVWL368.lib(drv_sys_cfg.o) + 0x00016424 0x00016424 0x00000010 Code RO 1702 i.drv_sys_cfg_set_dma_rx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016434 0x00016434 0x00000010 Code RO 1703 i.drv_sys_cfg_set_dma_tx_req CVWL368.lib(drv_sys_cfg.o) + 0x00016444 0x00016444 0x00000024 Code RO 1704 i.drv_sys_cfg_set_int CVWL368.lib(drv_sys_cfg.o) + 0x00016468 0x00016468 0x0000001a Code RO 1727 i.drv_timer_clear_status_flags CVWL368.lib(drv_timer.o) + 0x00016482 0x00016482 0x00000020 Code RO 1728 i.drv_timer_enable CVWL368.lib(drv_timer.o) + 0x000164a2 0x000164a2 0x00000002 PAD + 0x000164a4 0x000164a4 0x00000010 Code RO 1729 i.drv_timer_get_instance CVWL368.lib(drv_timer.o) + 0x000164b4 0x000164b4 0x00000010 Code RO 1730 i.drv_timer_get_prescaler CVWL368.lib(drv_timer.o) + 0x000164c4 0x000164c4 0x00000044 Code RO 1732 i.drv_timer_handle_interrupt CVWL368.lib(drv_timer.o) + 0x00016508 0x00016508 0x00000014 Code RO 1733 i.drv_timer_register_callback CVWL368.lib(drv_timer.o) + 0x0001651c 0x0001651c 0x00000010 Code RO 1734 i.drv_timer_set_compare_val CVWL368.lib(drv_timer.o) + 0x0001652c 0x0001652c 0x00000054 Code RO 1735 i.drv_timer_set_int CVWL368.lib(drv_timer.o) + 0x00016580 0x00016580 0x00000028 Code RO 1736 i.drv_timer_set_prescaler CVWL368.lib(drv_timer.o) + 0x000165a8 0x000165a8 0x00000010 Code RO 1737 i.drv_timer_set_repeat CVWL368.lib(drv_timer.o) + 0x000165b8 0x000165b8 0x0000000a Code RO 1966 i.drv_tx_phy_test_clear CVWL368.lib(drv_dsi_tx.o) + 0x000165c2 0x000165c2 0x0000001c Code RO 1967 i.drv_tx_phy_test_enter CVWL368.lib(drv_dsi_tx.o) + 0x000165de 0x000165de 0x0000001c Code RO 1968 i.drv_tx_phy_test_exit CVWL368.lib(drv_dsi_tx.o) + 0x000165fa 0x000165fa 0x00000012 Code RO 1970 i.drv_tx_phy_test_write_1_byte CVWL368.lib(drv_dsi_tx.o) + 0x0001660c 0x0001660c 0x00000014 Code RO 1971 i.drv_tx_phy_test_write_2_byte CVWL368.lib(drv_dsi_tx.o) + 0x00016620 0x00016620 0x00000010 Code RO 1972 i.drv_tx_phy_test_write_code CVWL368.lib(drv_dsi_tx.o) + 0x00016630 0x00016630 0x00000008 Code RO 2214 i.drv_vidc_clear_irq CVWL368.lib(drv_vidc.o) + 0x00016638 0x00016638 0x00000018 Code RO 2218 i.drv_vidc_enable CVWL368.lib(drv_vidc.o) + 0x00016650 0x00016650 0x00000040 Code RO 2219 i.drv_vidc_enable_irq CVWL368.lib(drv_vidc.o) + 0x00016690 0x00016690 0x00000012 Code RO 2221 i.drv_vidc_get_irq_status CVWL368.lib(drv_vidc.o) + 0x000166a2 0x000166a2 0x00000002 PAD + 0x000166a4 0x000166a4 0x00000028 Code RO 2225 i.drv_vidc_init_module_enable CVWL368.lib(drv_vidc.o) + 0x000166cc 0x000166cc 0x0000000c Code RO 2226 i.drv_vidc_register_callback CVWL368.lib(drv_vidc.o) + 0x000166d8 0x000166d8 0x00000006 Code RO 2227 i.drv_vidc_reset CVWL368.lib(drv_vidc.o) + 0x000166de 0x000166de 0x0000003c Code RO 2229 i.drv_vidc_set_dst_parameter CVWL368.lib(drv_vidc.o) + 0x0001671a 0x0001671a 0x00000014 Code RO 2233 i.drv_vidc_set_irqen CVWL368.lib(drv_vidc.o) + 0x0001672e 0x0001672e 0x00000010 Code RO 2234 i.drv_vidc_set_mirror CVWL368.lib(drv_vidc.o) + 0x0001673e 0x0001673e 0x00000008 Code RO 2237 i.drv_vidc_set_p2r_hcoef0 CVWL368.lib(drv_vidc.o) + 0x00016746 0x00016746 0x00000026 Code RO 2238 i.drv_vidc_set_p2r_hinitb CVWL368.lib(drv_vidc.o) + 0x0001676c 0x0001676c 0x00000026 Code RO 2239 i.drv_vidc_set_p2r_hinitr CVWL368.lib(drv_vidc.o) + 0x00016792 0x00016792 0x00000002 PAD + 0x00016794 0x00016794 0x00000018 Code RO 2240 i.drv_vidc_set_pentile_swap CVWL368.lib(drv_vidc.o) + 0x000167ac 0x000167ac 0x0000000a Code RO 2241 i.drv_vidc_set_pu_ctrl CVWL368.lib(drv_vidc.o) + 0x000167b6 0x000167b6 0x00000010 Code RO 2242 i.drv_vidc_set_rotation CVWL368.lib(drv_vidc.o) + 0x000167c6 0x000167c6 0x0000000a Code RO 2243 i.drv_vidc_set_scld_hcoef0 CVWL368.lib(drv_vidc.o) + 0x000167d0 0x000167d0 0x0000000a Code RO 2244 i.drv_vidc_set_scld_hcoef1 CVWL368.lib(drv_vidc.o) + 0x000167da 0x000167da 0x00000012 Code RO 2245 i.drv_vidc_set_scld_step CVWL368.lib(drv_vidc.o) + 0x000167ec 0x000167ec 0x0000000a Code RO 2246 i.drv_vidc_set_scld_vcoef0 CVWL368.lib(drv_vidc.o) + 0x000167f6 0x000167f6 0x0000000a Code RO 2247 i.drv_vidc_set_scld_vcoef1 CVWL368.lib(drv_vidc.o) + 0x00016800 0x00016800 0x00000016 Code RO 2248 i.drv_vidc_set_src_parameter CVWL368.lib(drv_vidc.o) + 0x00016816 0x00016816 0x00000002 PAD + 0x00016818 0x00016818 0x00000010 Code RO 2624 i.drv_wdg_clear_counter CVWL368.lib(drv_wdg.o) + 0x00016828 0x00016828 0x00000010 Code RO 2625 i.drv_wdg_clear_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016838 0x00016838 0x00000010 Code RO 2628 i.drv_wdg_read_edge_flag CVWL368.lib(drv_wdg.o) + 0x00016848 0x00016848 0x00000040 Code RO 2631 i.drv_wdg_set_int CVWL368.lib(drv_wdg.o) + 0x00016888 0x00016888 0x0000000a Code RO 1322 i.fls_clr_interrupt_flag CVWL368.lib(drv_fls.o) + 0x00016892 0x00016892 0x00000014 Code RO 1036 i.fputc CVWL368.lib(tau_log.o) + 0x000168a6 0x000168a6 0x00000002 PAD + 0x000168a8 0x000168a8 0x00000034 Code RO 577 i.hal_dsi_rx_ctrl_create_handle CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000168dc 0x000168dc 0x0000009c Code RO 579 i.hal_dsi_rx_ctrl_deinit CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016978 0x00016978 0x00000084 Code RO 581 i.hal_dsi_rx_ctrl_dsc_async_handler CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000169fc 0x000169fc 0x00000028 Code RO 583 i.hal_dsi_rx_ctrl_gen_a_tear_signal CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016a24 0x00016a24 0x00000010 Code RO 584 i.hal_dsi_rx_ctrl_get_compressen_en CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016a34 0x00016a34 0x00000028 Code RO 585 i.hal_dsi_rx_ctrl_get_max_ret_size CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016a5c 0x00016a5c 0x00000060 Code RO 587 i.hal_dsi_rx_ctrl_init CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016abc 0x00016abc 0x000001a4 Code RO 588 i.hal_dsi_rx_ctrl_init_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016c60 0x00016c60 0x000000d8 Code RO 589 i.hal_dsi_rx_ctrl_init_dsi_rx CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016d38 0x00016d38 0x00000158 Code RO 590 i.hal_dsi_rx_ctrl_init_memc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016e90 0x00016e90 0x00000148 Code RO 591 i.hal_dsi_rx_ctrl_init_rxbr CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00016fd8 0x00016fd8 0x0000022c Code RO 592 i.hal_dsi_rx_ctrl_init_vidc CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017204 0x00017204 0x000000f0 Code RO 596 i.hal_dsi_rx_ctrl_send_ack_cmd CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000172f4 0x000172f4 0x0000006c Code RO 599 i.hal_dsi_rx_ctrl_set_cus_scld_filter CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017360 0x00017360 0x00000034 Code RO 600 i.hal_dsi_rx_ctrl_set_cus_sync_line CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017394 0x00017394 0x00000038 Code RO 604 i.hal_dsi_rx_ctrl_set_ipi_cfg CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000173cc 0x000173cc 0x00000072 Code RO 609 i.hal_dsi_rx_ctrl_set_rxbr_clk CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001743e 0x0001743e 0x00000002 PAD + 0x00017440 0x00017440 0x00000034 Code RO 610 i.hal_dsi_rx_ctrl_set_sw_tear_mode CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017474 0x00017474 0x0000000e Code RO 612 i.hal_dsi_rx_ctrl_set_tear_mode_ex CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00017482 0x00017482 0x00000002 PAD + 0x00017484 0x00017484 0x0000003c Code RO 613 i.hal_dsi_rx_ctrl_start CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000174c0 0x000174c0 0x0000003c Code RO 614 i.hal_dsi_rx_ctrl_stop CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x000174fc 0x000174fc 0x00000020 Code RO 617 i.hal_dsi_rx_ctrl_toggle_resolution_ex CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001751c 0x0001751c 0x00000190 Code RO 670 i.hal_dsi_tx_calc_video_chunks CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000176ac 0x000176ac 0x00000034 Code RO 671 i.hal_dsi_tx_config_params_for_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000176e0 0x000176e0 0x00000450 Code RO 672 i.hal_dsi_tx_count_lane_rate CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017b30 0x00017b30 0x0000002c Code RO 675 i.hal_dsi_tx_ctrl_create_handle CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017b5c 0x00017b5c 0x00000084 Code RO 676 i.hal_dsi_tx_ctrl_deinit CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017be0 0x00017be0 0x0000004c Code RO 680 i.hal_dsi_tx_ctrl_enter_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017c2c 0x00017c2c 0x00000028 Code RO 682 i.hal_dsi_tx_ctrl_exit_init_panel_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017c54 0x00017c54 0x000000a4 Code RO 684 i.hal_dsi_tx_ctrl_init CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017cf8 0x00017cf8 0x00000024 Code RO 685 i.hal_dsi_tx_ctrl_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017d1c 0x00017d1c 0x0000000c Code RO 686 i.hal_dsi_tx_ctrl_panel_reset_pin CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017d28 0x00017d28 0x0000008c Code RO 687 i.hal_dsi_tx_ctrl_read_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017db4 0x00017db4 0x00000020 Code RO 689 i.hal_dsi_tx_ctrl_set_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017dd4 0x00017dd4 0x00000014 Code RO 695 i.hal_dsi_tx_ctrl_set_overwrite_rgb CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017de8 0x00017de8 0x00000010 Code RO 696 i.hal_dsi_tx_ctrl_set_partial_disp CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017df8 0x00017df8 0x00000024 Code RO 697 i.hal_dsi_tx_ctrl_set_partial_disp_area CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017e1c 0x00017e1c 0x0000009c Code RO 700 i.hal_dsi_tx_ctrl_start CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017eb8 0x00017eb8 0x00000044 Code RO 701 i.hal_dsi_tx_ctrl_stop CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017efc 0x00017efc 0x000000d8 Code RO 702 i.hal_dsi_tx_ctrl_write_array_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00017fd4 0x00017fd4 0x000000b0 Code RO 703 i.hal_dsi_tx_ctrl_write_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018084 0x00018084 0x00000044 Code RO 704 i.hal_dsi_tx_init_data_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180c8 0x000180c8 0x00000030 Code RO 705 i.hal_dsi_tx_init_dpi_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000180f8 0x000180f8 0x00000020 Code RO 706 i.hal_dsi_tx_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018118 0x00018118 0x00000020 Code RO 707 i.hal_dsi_tx_init_phy_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018138 0x00018138 0x00000094 Code RO 708 i.hal_dsi_tx_init_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000181cc 0x000181cc 0x00000058 Code RO 709 i.hal_dsi_tx_init_video_mode CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018224 0x00018224 0x00000044 Code RO 710 i.hal_dsi_tx_send_cmd CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00018268 0x00018268 0x00000018 Code RO 775 i.hal_gpio_ctrl_eint CVWL368.lib(hal_gpio.o) + 0x00018280 0x00018280 0x00000012 Code RO 776 i.hal_gpio_get_input_data CVWL368.lib(hal_gpio.o) + 0x00018292 0x00018292 0x00000002 PAD + 0x00018294 0x00018294 0x00000040 Code RO 779 i.hal_gpio_init_eint CVWL368.lib(hal_gpio.o) + 0x000182d4 0x000182d4 0x00000020 Code RO 780 i.hal_gpio_init_input CVWL368.lib(hal_gpio.o) + 0x000182f4 0x000182f4 0x00000028 Code RO 781 i.hal_gpio_init_output CVWL368.lib(hal_gpio.o) + 0x0001831c 0x0001831c 0x00000018 Code RO 782 i.hal_gpio_reg_eint_cb CVWL368.lib(hal_gpio.o) + 0x00018334 0x00018334 0x00000050 Code RO 783 i.hal_gpio_set_ap_reset_int CVWL368.lib(hal_gpio.o) + 0x00018384 0x00018384 0x00000060 Code RO 785 i.hal_gpio_set_mode CVWL368.lib(hal_gpio.o) + 0x000183e4 0x000183e4 0x00000008 Code RO 786 i.hal_gpio_set_output_data CVWL368.lib(hal_gpio.o) + 0x000183ec 0x000183ec 0x00000020 Code RO 788 i.hal_gpio_set_pull_state CVWL368.lib(hal_gpio.o) + 0x0001840c 0x0001840c 0x0000006c Code RO 814 i.hal_i2c_m_dma_init CVWL368.lib(hal_i2c_master.o) + 0x00018478 0x00018478 0x00000020 Code RO 815 i.hal_i2c_m_dma_read CVWL368.lib(hal_i2c_master.o) + 0x00018498 0x00018498 0x0000001c Code RO 816 i.hal_i2c_m_dma_write CVWL368.lib(hal_i2c_master.o) + 0x000184b4 0x000184b4 0x0000000c Code RO 818 i.hal_i2c_m_transfer_complate CVWL368.lib(hal_i2c_master.o) + 0x000184c0 0x000184c0 0x00000020 Code RO 819 i.hal_i2c_master_irq_callback CVWL368.lib(hal_i2c_master.o) + 0x000184e0 0x000184e0 0x00000010 Code RO 833 i.hal_i2c_s_dma_user_callback CVWL368.lib(hal_i2c_slave.o) + 0x000184f0 0x000184f0 0x0000004c Code RO 834 i.hal_i2c_s_dma_write CVWL368.lib(hal_i2c_slave.o) + 0x0001853c 0x0001853c 0x000000c8 Code RO 836 i.hal_i2c_s_init CVWL368.lib(hal_i2c_slave.o) + 0x00018604 0x00018604 0x00000014 Code RO 837 i.hal_i2c_s_nonblocking_read CVWL368.lib(hal_i2c_slave.o) + 0x00018618 0x00018618 0x0000000c Code RO 845 i.hal_i2c_s_set_transfer CVWL368.lib(hal_i2c_slave.o) + 0x00018624 0x00018624 0x00000174 Code RO 848 i.hal_i2c_slave_irq_callback CVWL368.lib(hal_i2c_slave.o) + 0x00018798 0x00018798 0x000000fc Code RO 1765 i.hal_internal_init_memc CVWL368.lib(hal_internal_vsync.o) + 0x00018894 0x00018894 0x00000010 Code RO 1767 i.hal_internal_sync_get_fb_setting CVWL368.lib(hal_internal_vsync.o) + 0x000188a4 0x000188a4 0x00000010 Code RO 1768 i.hal_internal_sync_get_hight_performan_mode CVWL368.lib(hal_internal_vsync.o) + 0x000188b4 0x000188b4 0x000001d4 Code RO 1770 i.hal_internal_sync_input_resolution_change_ex CVWL368.lib(hal_internal_vsync.o) + 0x00018a88 0x00018a88 0x00000010 Code RO 1772 i.hal_internal_update_dpi_param CVWL368.lib(hal_internal_vsync.o) + 0x00018a98 0x00018a98 0x0000010c Code RO 1773 i.hal_internal_video_mode_auto_sync CVWL368.lib(hal_internal_vsync.o) + 0x00018ba4 0x00018ba4 0x00000028 Code RO 1774 i.hal_internal_vsync_deinit CVWL368.lib(hal_internal_vsync.o) + 0x00018bcc 0x00018bcc 0x0000000c Code RO 1775 i.hal_internal_vsync_get_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018bd8 0x00018bd8 0x00000018 Code RO 1776 i.hal_internal_vsync_get_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00018bf0 0x00018bf0 0x0000000c Code RO 1777 i.hal_internal_vsync_get_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x00018bfc 0x00018bfc 0x0000000c Code RO 1778 i.hal_internal_vsync_get_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018c08 0x00018c08 0x00000118 Code RO 1779 i.hal_internal_vsync_init_rx CVWL368.lib(hal_internal_vsync.o) + 0x00018d20 0x00018d20 0x000000b0 Code RO 1780 i.hal_internal_vsync_init_tx CVWL368.lib(hal_internal_vsync.o) + 0x00018dd0 0x00018dd0 0x0000011c Code RO 1781 i.hal_internal_vsync_set_auto_hw_filter CVWL368.lib(hal_internal_vsync.o) + 0x00018eec 0x00018eec 0x00000014 Code RO 1783 i.hal_internal_vsync_set_rx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018f00 0x00018f00 0x00000024 Code RO 1784 i.hal_internal_vsync_set_sync_line CVWL368.lib(hal_internal_vsync.o) + 0x00018f24 0x00018f24 0x00000050 Code RO 1785 i.hal_internal_vsync_set_tear_mode CVWL368.lib(hal_internal_vsync.o) + 0x00018f74 0x00018f74 0x00000080 Code RO 1786 i.hal_internal_vsync_set_tx_state CVWL368.lib(hal_internal_vsync.o) + 0x00018ff4 0x00018ff4 0x00000024 Code RO 711 i.hal_lcdc_config_ccm CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019018 0x00019018 0x00000058 Code RO 712 i.hal_lcdc_config_remains CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019070 0x00019070 0x00000014 Code RO 713 i.hal_lcdc_config_rgb_to_pentile CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019084 0x00019084 0x00000164 Code RO 714 i.hal_lcdc_config_upscaler CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000191e8 0x000191e8 0x00000040 Code RO 715 i.hal_lcdc_init_cfg CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019228 0x00019228 0x000001b0 Code RO 716 i.hal_lcdc_init_clk CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000193d8 0x000193d8 0x00000040 Code RO 717 i.hal_lcdc_init_interrupt CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00019418 0x00019418 0x0000000e Code RO 926 i.hal_spi_m_clear_rxfifo CVWL368.lib(hal_spi_master.o) + 0x00019426 0x00019426 0x00000012 Code RO 950 i.hal_swire_deinit CVWL368.lib(hal_swire.o) + 0x00019438 0x00019438 0x00000016 Code RO 952 i.hal_swire_open CVWL368.lib(hal_swire.o) + 0x0001944e 0x0001944e 0x00000008 Code RO 967 i.hal_system_enable_systick CVWL368.lib(hal_system.o) + 0x00019456 0x00019456 0x00000002 PAD + 0x00019458 0x00019458 0x00000088 Code RO 975 i.hal_system_init CVWL368.lib(hal_system.o) + 0x000194e0 0x000194e0 0x0000001c Code RO 976 i.hal_system_init_console CVWL368.lib(hal_system.o) + 0x000194fc 0x000194fc 0x00000008 Code RO 979 i.hal_system_set_phy_calibration CVWL368.lib(hal_system.o) + 0x00019504 0x00019504 0x00000008 Code RO 980 i.hal_system_set_pvd CVWL368.lib(hal_system.o) + 0x0001950c 0x0001950c 0x00000008 Code RO 981 i.hal_system_set_vcc CVWL368.lib(hal_system.o) + 0x00019514 0x00019514 0x0000002e Code RO 1008 i.hal_timer_deinit CVWL368.lib(hal_timer.o) + 0x00019542 0x00019542 0x0000001a Code RO 1010 i.hal_timer_init CVWL368.lib(hal_timer.o) + 0x0001955c 0x0001955c 0x00000048 Code RO 1012 i.hal_timer_start CVWL368.lib(hal_timer.o) + 0x000195a4 0x000195a4 0x00000028 Code RO 1014 i.hal_timer_stop CVWL368.lib(hal_timer.o) + 0x000195cc 0x000195cc 0x0000008c Code RO 1047 i.hal_uart_init CVWL368.lib(hal_uart.o) + 0x00019658 0x00019658 0x00000010 Code RO 1050 i.hal_uart_transmit_blocking CVWL368.lib(hal_uart.o) + 0x00019668 0x00019668 0x000001dc Code RO 1789 i.hal_vsync_reset_lcdc_scaler CVWL368.lib(hal_internal_vsync.o) + 0x00019844 0x00019844 0x00000110 Code RO 2324 i.handle_init CVWL368.lib(irq_redirect .o) + 0x00019954 0x00019954 0x00000060 Code RO 115 i.init_mipi_tx ap_demo.o + 0x000199b4 0x000199b4 0x000000e4 Code RO 116 i.init_panel ap_demo.o + 0x00019a98 0x00019a98 0x0000000a Code RO 3 i.main main.o + 0x00019aa2 0x00019aa2 0x00000002 PAD + 0x00019aa4 0x00019aa4 0x0000009c Code RO 117 i.open_mipi_rx ap_demo.o + 0x00019b40 0x00019b40 0x00000038 Code RO 118 i.pps_update_handle ap_demo.o + 0x00019b78 0x00019b78 0x000003f4 Code RO 1790 i.rx_get_dcs_packet_data CVWL368.lib(hal_internal_vsync.o) + 0x00019f6c 0x00019f6c 0x00000178 Code RO 1791 i.rx_partial_update CVWL368.lib(hal_internal_vsync.o) + 0x0001a0e4 0x0001a0e4 0x0000008c Code RO 1792 i.rx_receive_packet CVWL368.lib(hal_internal_vsync.o) + 0x0001a170 0x0001a170 0x00000180 Code RO 1793 i.rx_receive_pps CVWL368.lib(hal_internal_vsync.o) + 0x0001a2f0 0x0001a2f0 0x000000a4 Code RO 1794 i.rxbr_irq0_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a394 0x0001a394 0x000001d4 Code RO 1795 i.rxbr_irq1_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a568 0x0001a568 0x00000024 Code RO 119 i.send_panel_init_code ap_demo.o + 0x0001a58c 0x0001a58c 0x000000c4 Code RO 1796 i.soft_gen_te CVWL368.lib(hal_internal_vsync.o) + 0x0001a650 0x0001a650 0x000000c0 Code RO 1797 i.soft_gen_te_double_buffer CVWL368.lib(hal_internal_vsync.o) + 0x0001a710 0x0001a710 0x00000030 Code RO 120 i.soft_timer3_cb ap_demo.o + 0x0001a740 0x0001a740 0x00000048 Code RO 2651 i.sqrt m_ps.l(sqrt.o) + 0x0001a788 0x0001a788 0x00000064 Code RO 122 i.tx_display_on ap_demo.o + 0x0001a7ec 0x0001a7ec 0x00000028 Code RO 123 i.tx_panel_reset ap_demo.o + 0x0001a814 0x0001a814 0x00000108 Code RO 1798 i.vidc_callback CVWL368.lib(hal_internal_vsync.o) + 0x0001a91c 0x0001a91c 0x000000d0 Code RO 1799 i.vpre_err_reset CVWL368.lib(hal_internal_vsync.o) + 0x0001a9ec 0x0001a9ec 0x000001cc Code RO 1800 i.vsync_set_te_mode CVWL368.lib(hal_internal_vsync.o) + 0x0001abb8 0x0001abb8 0x0000294a Data RO 124 .constdata ap_demo.o + 0x0001d502 0x0001d502 0x00000f96 Data RO 454 .constdata app_tp_for_custom_s8.o + 0x0001e498 0x0001e498 0x00000001 Data RO 477 .constdata app_tp_for_custom_s8.o + 0x0001e499 0x0001e499 0x00000003 PAD + 0x0001e49c 0x0001e49c 0x00000024 Data RO 719 .constdata CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001e4c0 0x0001e4c0 0x000000d2 Data RO 791 .constdata CVWL368.lib(hal_gpio.o) + 0x0001e592 0x0001e592 0x00000002 PAD + 0x0001e594 0x0001e594 0x00000020 Data RO 849 .constdata CVWL368.lib(hal_i2c_slave.o) + 0x0001e5b4 0x0001e5b4 0x00000008 Data RO 1547 .constdata CVWL368.lib(drv_param_init.o) + 0x0001e5bc 0x0001e5bc 0x00000186 Data RO 2396 .constdata CVWL368.lib(drv_phy_common.o) + 0x0001e742 0x0001e742 0x00000002 PAD + 0x0001e744 0x0001e744 0x00000048 Data RO 619 .conststring CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0001e78c 0x0001e78c 0x00000043 Data RO 720 .conststring CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x0001e7cf 0x0001e7cf 0x00000001 PAD + 0x0001e7d0 0x0001e7d0 0x000000e0 Data RO 1802 .conststring CVWL368.lib(hal_internal_vsync.o) + 0x0001e8b0 0x0001e8b0 0x00000030 Data RO 3013 Region$$Table anon$$obj.o + + + Execution Region RW_RAM1 (Exec base: 0x00070000, Load base: 0x0001e8e0, Size: 0x00000000, Max: 0x000000f0, ABSOLUTE) + + **** No section assigned to this execution region **** + + + Execution Region RW_RAM2 (Exec base: 0x00070100, Load base: 0x0001e8e0, Size: 0x000000c0, Max: 0x000000d0, ABSOLUTE) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x00070100 - 0x000000c0 Zero RW 2325 .ARM.__AT_0x00070100 CVWL368.lib(irq_redirect .o) + + + Execution Region RW_RAM3 (Exec base: 0x000701d0, Load base: 0x0001e8e0, Size: 0x00005138, Max: 0x00007e30, ABSOLUTE, COMPRESSED[0x00001064]) + + Exec Addr Load Addr Size Type Attr Idx E Section Name Object + + 0x000701d0 COMPRESSED 0x00000224 Data RW 125 .data ap_demo.o + 0x000703f4 COMPRESSED 0x0000002e Data RW 310 .data app_tp_transfer.o + 0x00070422 COMPRESSED 0x00001686 Data RW 478 .data app_tp_for_custom_s8.o + 0x00071aa8 COMPRESSED 0x00000001 Data RW 481 .data app_tp_for_custom_s8.o + 0x00071aa9 COMPRESSED 0x00000001 Data RW 482 .data app_tp_for_custom_s8.o + 0x00071aaa COMPRESSED 0x00000001 Data RW 487 .data app_tp_for_custom_s8.o + 0x00071aab COMPRESSED 0x00000003 Data RW 488 .data app_tp_for_custom_s8.o + 0x00071aae COMPRESSED 0x00000005 Data RW 489 .data app_tp_for_custom_s8.o + 0x00071ab3 COMPRESSED 0x00000001 PAD + 0x00071ab4 COMPRESSED 0x00000030 Data RW 499 .data app_tp_for_custom_s8.o + 0x00071ae4 COMPRESSED 0x00000008 Data RW 620 .data CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x00071aec COMPRESSED 0x00000003 Data RW 721 .data CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x00071aef COMPRESSED 0x00000001 Data RW 820 .data CVWL368.lib(hal_i2c_master.o) + 0x00071af0 COMPRESSED 0x00000020 Data RW 850 .data CVWL368.lib(hal_i2c_slave.o) + 0x00071b10 COMPRESSED 0x00000012 Data RW 1104 .data CVWL368.lib(norflash.o) + 0x00071b22 COMPRESSED 0x00000002 PAD + 0x00071b24 COMPRESSED 0x0000000c Data RW 1158 .data CVWL368.lib(drv_common.o) + 0x00071b30 COMPRESSED 0x00000004 Data RW 1425 .data CVWL368.lib(drv_gpio.o) + 0x00071b34 COMPRESSED 0x00000008 Data RW 1463 .data CVWL368.lib(drv_i2c_dma.o) + 0x00071b3c COMPRESSED 0x00000004 Data RW 1492 .data CVWL368.lib(drv_i2c_master.o) + 0x00071b40 COMPRESSED 0x00000004 Data RW 1523 .data CVWL368.lib(drv_i2c_slave.o) + 0x00071b44 COMPRESSED 0x000004a4 Data RW 1548 .data CVWL368.lib(drv_param_init.o) + 0x00071fe8 COMPRESSED 0x0000000c Data RW 1578 .data CVWL368.lib(drv_pwm.o) + 0x00071ff4 COMPRESSED 0x00000004 Data RW 1654 .data CVWL368.lib(drv_spi_master.o) + 0x00071ff8 COMPRESSED 0x00000008 Data RW 1680 .data CVWL368.lib(drv_swire.o) + 0x00072000 COMPRESSED 0x00000001 Data RW 1705 .data CVWL368.lib(drv_sys_cfg.o) + 0x00072001 COMPRESSED 0x00000003 PAD + 0x00072004 COMPRESSED 0x00000050 Data RW 1738 .data CVWL368.lib(drv_timer.o) + 0x00072054 COMPRESSED 0x0000000c Data RW 1803 .data CVWL368.lib(hal_internal_vsync.o) + 0x00072060 COMPRESSED 0x00000008 Data RW 2177 .data CVWL368.lib(drv_rxbr.o) + 0x00072068 COMPRESSED 0x00000004 Data RW 2250 .data CVWL368.lib(drv_vidc.o) + 0x0007206c COMPRESSED 0x00000001 Data RW 2397 .data CVWL368.lib(drv_phy_common.o) + 0x0007206d COMPRESSED 0x00000003 PAD + 0x00072070 COMPRESSED 0x0000000c Data RW 2417 .data CVWL368.lib(drv_chip_info.o) + 0x0007207c COMPRESSED 0x00000008 Data RW 2566 .data CVWL368.lib(drv_uart.o) + 0x00072084 COMPRESSED 0x0000000c Data RW 2633 .data CVWL368.lib(drv_wdg.o) + 0x00072090 COMPRESSED 0x00000004 Data RW 2982 .data mc_p.l(stdout.o) + 0x00072094 COMPRESSED 0x00000004 Data RW 2994 .data mc_p.l(errno.o) + 0x00072098 - 0x00000190 Zero RW 309 .bss app_tp_transfer.o + 0x00072228 - 0x0000028e Zero RW 452 .bss app_tp_for_custom_s8.o + 0x000724b6 COMPRESSED 0x00000002 PAD + 0x000724b8 - 0x000000c4 Zero RW 618 .bss CVWL368.lib(hal_dsi_rx_ctrl.o) + 0x0007257c - 0x0000004c Zero RW 718 .bss CVWL368.lib(hal_dsi_tx_ctrl.o) + 0x000725c8 - 0x00000100 Zero RW 1037 .bss CVWL368.lib(tau_log.o) + 0x000726c8 - 0x000000d0 Zero RW 1052 .bss CVWL368.lib(hal_uart.o) + 0x00072798 - 0x0000001c Zero RW 1287 .bss CVWL368.lib(drv_dma.o) + 0x000727b4 - 0x00000040 Zero RW 1424 .bss CVWL368.lib(drv_gpio.o) + 0x000727f4 - 0x00000140 Zero RW 1462 .bss CVWL368.lib(drv_i2c_dma.o) + 0x00072934 - 0x00000984 Zero RW 1801 .bss CVWL368.lib(hal_internal_vsync.o) + 0x000732b8 - 0x00001030 Zero RW 1854 .bss CVWL368.lib(dcs_packet_fifo.o) + 0x000742e8 - 0x00000020 Zero RW 2461 .bss CVWL368.lib(hal_spi_slave.o) + 0x00074308 - 0x00001000 Zero RW 566 STACK startup_armcm0.o + + +============================================================================== + +Image component sizes + + + Code (inc. data) RO Data RW Data ZI Data Debug Object Name + + 3096 614 10570 548 0 36895 ap_demo.o + 1840 86 3991 5825 654 14444 app_tp_for_custom_s8.o + 1182 114 0 46 400 14628 app_tp_transfer.o + 36 6 0 0 0 497 board.o + 10 0 0 0 0 9615 main.o + 120 18 192 0 4096 2084 startup_armcm0.o + + ---------------------------------------------------------------------- + 6292 838 14804 6420 5152 78163 Object Totals + 0 0 48 0 0 0 (incl. Generated) + 8 0 3 1 2 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Member Name + + 216 32 0 0 4144 252 dcs_packet_fifo.o + 272 96 0 12 0 256 drv_chip_info.o + 192 82 24 12 0 264 drv_common.o + 420 90 0 0 0 1200 drv_crgu.o + 410 28 0 0 28 796 drv_dma.o + 232 28 0 0 0 340 drv_dsc_dec.o + 1644 494 0 0 0 1336 drv_dsi_rx.o + 1532 118 0 0 0 2488 drv_dsi_tx.o + 132 0 0 0 0 256 drv_efuse.o + 10 0 0 0 0 60 drv_fls.o + 796 112 0 4 64 1236 drv_gpio.o + 600 82 0 8 320 624 drv_i2c_dma.o + 360 86 0 4 0 456 drv_i2c_master.o + 292 36 0 4 0 580 drv_i2c_slave.o + 680 6 0 0 0 1444 drv_lcdc.o + 492 28 0 0 0 1112 drv_memc.o + 212 44 8 1188 0 452 drv_param_init.o + 428 30 390 1 0 664 drv_phy_common.o + 72 10 0 12 0 76 drv_pwm.o + 112 24 0 0 0 180 drv_pwr.o + 722 84 0 8 0 1456 drv_rxbr.o + 104 24 0 4 0 188 drv_spi_master.o + 172 20 0 8 0 260 drv_swire.o + 300 64 0 1 0 628 drv_sys_cfg.o + 374 34 0 80 0 932 drv_timer.o + 698 18 0 8 0 680 drv_uart.o + 510 28 0 4 0 1452 drv_vidc.o + 168 22 0 12 0 316 drv_wdg.o + 3210 316 72 8 196 1680 hal_dsi_rx_ctrl.o + 4464 308 103 3 76 2492 hal_dsi_tx_ctrl.o + 450 48 210 0 0 752 hal_gpio.o + 212 40 0 1 0 340 hal_i2c_master.o + 696 72 32 32 0 408 hal_i2c_slave.o + 8420 1710 224 12 2436 2696 hal_internal_vsync.o + 14 0 0 0 0 68 hal_spi_master.o + 580 32 0 0 32 136 hal_spi_slave.o + 40 0 0 0 0 136 hal_swire.o + 196 32 0 0 0 408 hal_system.o + 184 6 0 0 0 276 hal_timer.o + 156 18 0 0 208 144 hal_uart.o + 1076 324 0 0 192 1980 irq_redirect .o + 48 10 0 18 0 68 norflash.o + 58 0 0 0 0 128 tau_delay.o + 60 10 0 0 256 156 tau_log.o + 200 20 0 0 0 76 ceil.o + 72 6 0 0 0 76 sqrt.o + 96 0 0 0 0 0 __dclz77c.o + 0 0 0 0 0 0 entry.o + 0 0 0 0 0 0 entry10a.o + 0 0 0 0 0 0 entry11a.o + 8 4 0 0 0 0 entry2.o + 4 0 0 0 0 0 entry5.o + 0 0 0 0 0 0 entry7b.o + 0 0 0 0 0 0 entry8b.o + 8 4 0 0 0 0 entry9a.o + 12 6 0 4 0 60 errno.o + 30 0 0 0 0 0 handlers.o + 40 0 0 0 0 72 idiv.o + 36 8 0 0 0 68 init.o + 0 0 0 0 0 0 iusefp.o + 32 0 0 0 0 68 llshl.o + 38 0 0 0 0 68 llsshr.o + 34 0 0 0 0 68 llushr.o + 36 0 0 0 0 60 memcpya.o + 36 0 0 0 0 100 memseta.o + 2298 104 0 0 0 544 printfa.o + 0 0 0 4 0 0 stdout.o + 44 0 0 0 0 72 uidiv.o + 96 0 0 0 0 84 uldiv.o + 40 2 0 0 0 68 cdcmple.o + 40 2 0 0 0 68 cdrcmple.o + 20 0 0 0 0 68 cfrcmple.o + 356 4 0 0 0 140 dadd.o + 240 6 0 0 0 84 ddiv.o + 236 0 0 0 0 216 depilogue.o + 72 10 0 0 0 72 dfixi.o + 60 10 0 0 0 68 dfixui.o + 64 10 0 0 0 68 dfixul.o + 28 4 0 0 0 68 dfltui.o + 208 6 0 0 0 88 dmul.o + 162 0 0 0 0 80 dsqrt.o + 40 0 0 0 0 60 f2d.o + 178 0 0 0 0 108 fadd.o + 124 0 0 0 0 72 fdiv.o + 130 0 0 0 0 144 fepilogue.o + 50 0 0 0 0 60 ffixi.o + 40 0 0 0 0 60 ffixui.o + 22 0 0 0 0 68 fflti.o + 14 0 0 0 0 68 ffltui.o + 122 0 0 0 0 72 fmul.o + 24 0 0 0 0 60 fscalb.o + + ---------------------------------------------------------------------- + 37452 4852 1068 1460 7952 35128 Library Totals + 46 0 5 8 0 0 (incl. Padding) + + ---------------------------------------------------------------------- + + Code (inc. data) RO Data RW Data ZI Data Debug Library Name + + 32016 4646 1063 1444 7952 31852 CVWL368.lib + 272 26 0 0 0 152 m_ps.l + 2848 126 0 8 0 1264 mc_p.l + 2270 54 0 0 0 1860 mf_p.l + + ---------------------------------------------------------------------- + 37452 4852 1068 1460 7952 35128 Library Totals + + ---------------------------------------------------------------------- + +============================================================================== + + + Code (inc. data) RO Data RW Data ZI Data Debug + + 43744 5690 15872 7880 13104 88851 Grand Totals + 43744 5690 15872 4196 13104 88851 ELF Image Totals (compressed) + 43744 5690 15872 4196 0 0 ROM Totals + +============================================================================== + + Total RO Size (Code + RO Data) 59616 ( 58.22kB) + Total RW Size (RW Data + ZI Data) 20984 ( 20.49kB) + Total ROM Size (Code + RO Data + RW Data) 63812 ( 62.32kB) + +============================================================================== + diff --git a/project/ISP_368/Listings/ap_demo.txt b/project/ISP_368/Listings/ap_demo.txt new file mode 100644 index 0000000..b2f4fdf --- /dev/null +++ b/project/ISP_368/Listings/ap_demo.txt @@ -0,0 +1,5783 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\ap_demo.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\ap_demo.d --cpu=Cortex-M0 --apcs=interwork -O1 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL368 -I.\RTE\_ISP_368 -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_368 --omf_browse=.\objects\ap_demo.crf ..\..\src\app\demo\ap_demo.c] + THUMB + + AREA ||i.Gpio_swire_output||, CODE, READONLY, ALIGN=1 + + Gpio_swire_output PROC +;;;540 *****************************************************************************/ +;;;541 void Gpio_swire_output(uint8_t flag, uint8_t num) +000000 b570 PUSH {r4-r6,lr} +;;;542 { +000002 460d MOV r5,r1 +;;;543 uint8_t ii; +;;;544 +;;;545 if (flag) +000004 2800 CMP r0,#0 +000006 d01d BEQ |L1.68| +;;;546 { +;;;547 if (flag ==2) +000008 2802 CMP r0,#2 +00000a d106 BNE |L1.26| +;;;548 { +;;;549 hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_HIGH); +00000c 2101 MOVS r1,#1 +00000e 2014 MOVS r0,#0x14 +000010 f7fffffe BL hal_gpio_init_output +;;;550 //hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); +;;;551 delayMs(2); +000014 2002 MOVS r0,#2 +000016 f7fffffe BL delayMs + |L1.26| +;;;552 } +;;;553 for (ii =0; ii< num; ii++) +00001a 2400 MOVS r4,#0 +00001c e00f B |L1.62| + |L1.30| +;;;554 { +;;;555 hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_LOW); +00001e 2100 MOVS r1,#0 +000020 2014 MOVS r0,#0x14 +000022 f7fffffe BL hal_gpio_set_output_data +;;;556 delayUs(10); +000026 200a MOVS r0,#0xa +000028 f7fffffe BL delayUs +;;;557 hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); +00002c 2101 MOVS r1,#1 +00002e 2014 MOVS r0,#0x14 +000030 f7fffffe BL hal_gpio_set_output_data +;;;558 delayUs(9); +000034 2009 MOVS r0,#9 +000036 f7fffffe BL delayUs +00003a 1c64 ADDS r4,r4,#1 ;553 +00003c b2e4 UXTB r4,r4 ;553 + |L1.62| +00003e 42ac CMP r4,r5 ;553 +000040 d3ed BCC |L1.30| +;;;559 } +;;;560 } +;;;561 else +;;;562 { +;;;563 hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW); +;;;564 } +;;;565 } +000042 bd70 POP {r4-r6,pc} + |L1.68| +000044 2100 MOVS r1,#0 ;563 +000046 2014 MOVS r0,#0x14 ;563 +000048 f7fffffe BL hal_gpio_init_output +00004c bd70 POP {r4-r6,pc} +;;;566 + ENDP + + + AREA ||i.PWM_OUTPUT_TEST||, CODE, READONLY, ALIGN=2 + + PWM_OUTPUT_TEST PROC +;;;608 +;;;609 void PWM_OUTPUT_TEST(void) +000000 b510 PUSH {r4,lr} +;;;610 { +;;;611 test_pwm_out_adjust(true, true, 30, 20000); +000002 2101 MOVS r1,#1 +000004 4b07 LDR r3,|L2.36| +000006 221e MOVS r2,#0x1e +000008 4608 MOV r0,r1 +00000a f7fffffe BL test_pwm_out_adjust +;;;612 delayMs(2); +00000e 2002 MOVS r0,#2 +000010 f7fffffe BL delayMs +;;;613 test_pwm_out_adjust(false, false, 40, 10000); +000014 2100 MOVS r1,#0 +000016 4b04 LDR r3,|L2.40| +000018 2228 MOVS r2,#0x28 +00001a 4608 MOV r0,r1 +00001c f7fffffe BL test_pwm_out_adjust +;;;614 } +000020 bd10 POP {r4,pc} +;;;615 + ENDP + +000022 0000 DCW 0x0000 + |L2.36| + DCD 0x00004e20 + |L2.40| + DCD 0x00002710 + + AREA ||i.PWM_Task||, CODE, READONLY, ALIGN=2 + + PWM_Task PROC +;;;626 static uint16_t read_bl_data_bak =0; +;;;627 void PWM_Task(void) +000000 b51c PUSH {r2-r4,lr} +;;;628 { +;;;629 uint16_t pwm_h; +;;;630 +;;;631 #ifdef USE_FOR_SUMSUNG_S21U +;;;632 +;;;633 #if AMOLED_NT37701_CSOT667 +;;;634 +;;;635 // s20: read_bl_data = 1~FD +;;;636 +;;;637 uint8_t reg51_val_h=0; +;;;638 uint8_t reg51_val_l=0; +;;;639 if(Flag_blacklight_EN) +000002 4818 LDR r0,|L3.100| +;;;640 { +;;;641 read_bl_data_bak =0; +;;;642 // hal_pwm_out_sync_thr(0, PWM_PERIOD+1); +;;;643 hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x3F); +000004 213f MOVS r1,#0x3f +000006 7802 LDRB r2,[r0,#0] ;639 ; Flag_blacklight_EN +000008 2000 MOVS r0,#0 ;639 +00000a 4c17 LDR r4,|L3.104| +00000c 2a00 CMP r2,#0 ;639 +00000e d009 BEQ |L3.36| +000010 81e0 STRH r0,[r4,#0xe] ;641 +000012 9101 STR r1,[sp,#4] +000014 9000 STR r0,[sp,#0] +000016 2351 MOVS r3,#0x51 +000018 2203 MOVS r2,#3 +00001a 2100 MOVS r1,#0 +00001c 2029 MOVS r0,#0x29 +00001e f7fffffe BL hal_dsi_tx_ctrl_write_cmd + |L3.34| +;;;644 //printf("Flag_blacklight_EN!!!! read_bl_data[%4x] \n", read_bl_data); +;;;645 return; +;;;646 } +;;;647 +;;;648 if (g_need_enter_sleep_mode) +;;;649 { +;;;650 //ΪϨʱ +;;;651 read_bl_data_bak =0; +;;;652 // hal_pwm_out_sync_thr(0, PWM_PERIOD-PWM_MIN); //ΪС +;;;653 hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x3F); +;;;654 // printf("tp_sleep_in!!!! read_bl_data[%4x] \n", read_bl_data); +;;;655 // return; +;;;656 } +;;;657 +;;;658 if(read_bl_data !=read_bl_data_bak) +;;;659 { +;;;660 #if 0 +;;;661 #if 1//Բ +;;;662 if (pwm_h >700) +;;;663 pwm_h = 300+(pwm_h-700)*7/3; +;;;664 else +;;;665 pwm_h = 1+(pwm_h-1)*3/7; +;;;666 #endif +;;;667 if(pwm_h >8; +;;;682 hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, reg51_val_h, reg51_val_l); //0FFF +;;;683 read_bl_data_bak =read_bl_data; +;;;684 } +;;;685 +;;;686 #else +;;;687 // s20: read_bl_data = 1~FD +;;;688 +;;;689 if(Flag_blacklight_EN) +;;;690 { +;;;691 read_bl_data_bak =0; +;;;692 hal_pwm_out_sync_thr(0, PWM_PERIOD+1); +;;;693 //printf("Flag_blacklight_EN!!!! read_bl_data[%4x] \n", read_bl_data); +;;;694 return; +;;;695 } +;;;696 +;;;697 if (g_need_enter_sleep_mode) +;;;698 { +;;;699 //ΪϨʱ +;;;700 read_bl_data_bak =0; +;;;701 hal_pwm_out_sync_thr(0, PWM_PERIOD-PWM_MIN); //ΪС +;;;702 // printf("tp_sleep_in!!!! read_bl_data[%4x] \n", read_bl_data); +;;;703 // return; +;;;704 } +;;;705 +;;;706 if(read_bl_data !=read_bl_data_bak) +;;;707 { +;;;708 pwm_h = PWM_PERIOD*read_bl_data/0xFF; +;;;709 #if 1//Բ +;;;710 if (pwm_h >700) +;;;711 pwm_h = 300+(pwm_h-700)*7/3; +;;;712 else +;;;713 pwm_h = 1+(pwm_h-1)*3/7; +;;;714 #endif +;;;715 if(pwm_h 1600) +;;;2717 { +;;;2718 phone_DisplayOFF_count=0; +;;;2719 phone_start_flag=1; +;;;2720 } +;;;2721 } +;;;2722 else +;;;2723 { +;;;2724 if(phone_DisplayOFF_count>30) +000080 8960 LDRH r0,[r4,#0xa] ; phone_DisplayOFF_count +000082 281e CMP r0,#0x1e +000084 d905 BLS |L5.146| +;;;2725 { +;;;2726 phone_DisplayOFF_count=0; +000086 8165 STRH r5,[r4,#0xa] +;;;2727 phone_start_flag=1; +000088 71a6 STRB r6,[r4,#6] +;;;2728 hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW);//ͣ˫2~3s޴.jason_su +00008a 2100 MOVS r1,#0 +00008c 2002 MOVS r0,#2 +00008e f7fffffe BL hal_gpio_set_output_data + |L5.146| +;;;2729 } +;;;2730 } +;;;2731 +;;;2732 #if 1 +;;;2733 if (hbm_mode) +000092 7860 LDRB r0,[r4,#1] ; hbm_mode +000094 2800 CMP r0,#0 +000096 d01c BEQ |L5.210| +;;;2734 { +;;;2735 if (hbm_mode <91) +000098 285b CMP r0,#0x5b +00009a d21a BCS |L5.210| +;;;2736 { +;;;2737 hbm_mode++; +00009c 1c40 ADDS r0,r0,#1 +00009e 7060 STRB r0,[r4,#1] +;;;2738 delayMs(1); +0000a0 2001 MOVS r0,#1 +0000a2 f7fffffe BL delayMs +;;;2739 if (hbm_mode ==90) +0000a6 7860 LDRB r0,[r4,#1] ; hbm_mode +0000a8 285a CMP r0,#0x5a +0000aa d008 BEQ |L5.190| +0000ac e011 B |L5.210| + |L5.174| +0000ae 8960 LDRH r0,[r4,#0xa] ;2716 ; phone_DisplayOFF_count +0000b0 2119 MOVS r1,#0x19 ;2716 +0000b2 0189 LSLS r1,r1,#6 ;2716 +0000b4 4288 CMP r0,r1 ;2716 +0000b6 d9ec BLS |L5.146| +0000b8 8165 STRH r5,[r4,#0xa] ;2718 +0000ba 71a6 STRB r6,[r4,#6] ;2719 +0000bc e7e9 B |L5.146| + |L5.190| +;;;2740 { +;;;2741 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x07, 0xFF); +0000be 20ff MOVS r0,#0xff +0000c0 2107 MOVS r1,#7 +0000c2 9100 STR r1,[sp,#0] +0000c4 9001 STR r0,[sp,#4] +0000c6 2351 MOVS r3,#0x51 +0000c8 2203 MOVS r2,#3 +0000ca 2100 MOVS r1,#0 +0000cc 2039 MOVS r0,#0x39 +0000ce f7fffffe BL hal_dsi_tx_ctrl_write_cmd + |L5.210| +;;;2742 } +;;;2743 } +;;;2744 } +;;;2745 if (hbm_mode_cnt) +0000d2 78a0 LDRB r0,[r4,#2] ; hbm_mode_cnt +0000d4 2800 CMP r0,#0 +0000d6 d014 BEQ |L5.258| +;;;2746 { +;;;2747 if (hbm_mode_cnt < 7) +0000d8 2807 CMP r0,#7 +0000da d212 BCS |L5.258| +;;;2748 { +;;;2749 hbm_mode_cnt++; +0000dc 1c40 ADDS r0,r0,#1 +0000de 70a0 STRB r0,[r4,#2] +;;;2750 delayMs(1); +0000e0 2001 MOVS r0,#1 +0000e2 f7fffffe BL delayMs +;;;2751 if (hbm_mode_cnt==6) +0000e6 78a0 LDRB r0,[r4,#2] ; hbm_mode_cnt +0000e8 2806 CMP r0,#6 +0000ea d10a BNE |L5.258| +;;;2752 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, rd_51_val2>>8, rd_51_val2&0x00FF); +0000ec 8a20 LDRH r0,[r4,#0x10] ; rd_51_val2 +0000ee 2351 MOVS r3,#0x51 +0000f0 b2c1 UXTB r1,r0 +0000f2 0a00 LSRS r0,r0,#8 +0000f4 9101 STR r1,[sp,#4] +0000f6 9000 STR r0,[sp,#0] +0000f8 2203 MOVS r2,#3 +0000fa 2100 MOVS r1,#0 +0000fc 2039 MOVS r0,#0x39 +0000fe f7fffffe BL hal_dsi_tx_ctrl_write_cmd + |L5.258| +;;;2753 } +;;;2754 } +;;;2755 #endif +;;;2756 +;;;2757 #if ADD_TP_CALIBRATION +;;;2758 tp_heartbeat_exec(); +000102 f7fffffe BL tp_heartbeat_exec +;;;2759 app_tp_calibration_exec(); +000106 f7fffffe BL app_tp_calibration_exec +;;;2760 ap_tp_st_touch_scan_point_record_event_exec(); +00010a f7fffffe BL ap_tp_st_touch_scan_point_record_event_exec +;;;2761 #endif +;;;2762 +;;;2763 #ifndef DISABLE_TDDI_I2C_FUNCTION +;;;2764 /* ȴ TP жϱTP Эת */ +;;;2765 app_tp_transfer_screen_int(); +00010e f7fffffe BL app_tp_transfer_screen_int + |L5.274| +;;;2766 #endif +;;;2767 while (hal_dsi_rx_ctrl_dsc_async_handler(g_rx_ctrl_handle)); +000112 69a0 LDR r0,[r4,#0x18] ; g_rx_ctrl_handle +000114 f7fffffe BL hal_dsi_rx_ctrl_dsc_async_handler +000118 2800 CMP r0,#0 +00011a d1fa BNE |L5.274| +;;;2768 +;;;2769 +;;;2770 #if ENABLE_TP_WAKE_UP +;;;2771 if (g_need_enter_sleep_mode) +00011c 7820 LDRB r0,[r4,#0] ; g_need_enter_sleep_mode +00011e 2800 CMP r0,#0 +000120 d09f BEQ |L5.98| +;;;2772 { +;;;2773 tp_sleep_in=1; +000122 4826 LDR r0,|L5.444| +000124 7006 STRB r6,[r0,#0] +;;;2774 hal_gpio_set_output_data(IO_PAD_TD_LEDPWM, IO_LVL_HIGH); +000126 2101 MOVS r1,#1 +000128 200a MOVS r0,#0xa +00012a f7fffffe BL hal_gpio_set_output_data +;;;2775 +;;;2776 /* FIXME stop more model */ +;;;2777 hal_dsi_tx_ctrl_stop(g_tx_ctrl_handle); +00012e 69e0 LDR r0,[r4,#0x1c] ; g_tx_ctrl_handle +000130 f7fffffe BL hal_dsi_tx_ctrl_stop +;;;2778 hal_dsi_tx_ctrl_deinit(g_tx_ctrl_handle); +000134 69e0 LDR r0,[r4,#0x1c] ; g_tx_ctrl_handle +000136 f7fffffe BL hal_dsi_tx_ctrl_deinit +;;;2779 hal_dsi_rx_ctrl_stop(g_rx_ctrl_handle); +00013a 69a0 LDR r0,[r4,#0x18] ; g_rx_ctrl_handle +00013c f7fffffe BL hal_dsi_rx_ctrl_stop +;;;2780 hal_dsi_rx_ctrl_deinit(g_rx_ctrl_handle); +000140 69a0 LDR r0,[r4,#0x18] ; g_rx_ctrl_handle +000142 f7fffffe BL hal_dsi_rx_ctrl_deinit +;;;2781 +;;;2782 hal_swire_open(DISABLE); +000146 2000 MOVS r0,#0 +000148 f7fffffe BL hal_swire_open +;;;2783 hal_swire_deinit(); +00014c f7fffffe BL hal_swire_deinit +;;;2784 hal_timer_stop(SWIRE_TIMER); +000150 2001 MOVS r0,#1 +000152 f7fffffe BL hal_timer_stop +;;;2785 hal_timer_deinit(SWIRE_TIMER); +000156 2001 MOVS r0,#1 +000158 f7fffffe BL hal_timer_deinit +;;;2786 +;;;2787 hal_system_set_vcc(false); +00015c 2000 MOVS r0,#0 +00015e f7fffffe BL hal_system_set_vcc +;;;2788 TAU_LOGD("disable video path \n"); +000162 4a04 LDR r2,|L5.372| +000164 a104 ADR r1,|L5.376| +000166 326a ADDS r2,r2,#0x6a +000168 a015 ADR r0,|L5.448| +00016a f7fffffe BL LOG_printf +;;;2789 g_need_enter_sleep_mode = false; +00016e 7025 STRB r5,[r4,#0] +000170 e777 B |L5.98| +;;;2790 } +;;;2791 #endif +;;;2792 +;;;2793 /* enter idle mode*/ +;;;2794 //hal_system_idle_mode(true); +;;;2795 } +;;;2796 +;;;2797 } + ENDP + +000172 0000 DCW 0x0000 + |L5.372| + DCD 0x00000a7a + |L5.376| +000178 5331304c DCB "S10Lite_368",0 +00017c 6974655f +000180 33363800 + |L5.388| +000184 5b25735d DCB "[%s] (%04d) S10Lite V100 20230714",0 +000188 20282530 +00018c 34642920 +000190 5331304c +000194 69746520 +000198 56313030 +00019c 20323032 +0001a0 33303731 +0001a4 3400 +0001a6 00 DCB 0 +0001a7 00 DCB 0 + |L5.424| + DCD tp_sleep_count + |L5.428| + DCD tp_sleep_clk_count + |L5.432| + DCD ||.data|| + |L5.436| + DCD soft_timer3_cb + |L5.440| + DCD ap_reset_cb + |L5.444| + DCD tp_sleep_in + |L5.448| +0001c0 5b25735d DCB "[%s] (%04d) disable video path \n",0 +0001c4 20282530 +0001c8 34642920 +0001cc 64697361 +0001d0 626c6520 +0001d4 76696465 +0001d8 6f207061 +0001dc 7468200a +0001e0 00 +0001e1 00 DCB 0 +0001e2 00 DCB 0 +0001e3 00 DCB 0 + + AREA ||i.ap_get_reg_53||, CODE, READONLY, ALIGN=2 + + ap_get_reg_53 PROC +;;;1363 +;;;1364 static bool ap_get_reg_53(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;1365 { +;;;1366 // TAU_LOGD("value_reg_53[%4x], Len[%d]", dcs_packet->packet_param[0],dcs_packet->param_length); +;;;1367 +;;;1368 if (dcs_packet->packet_param[0] ==0xE0) +000002 68c8 LDR r0,[r1,#0xc] +000004 2100 MOVS r1,#0 +000006 7804 LDRB r4,[r0,#0] +;;;1369 { +;;;1370 #ifdef ADD_FINGERPRINT_FUNC +;;;1371 fingerprint_flag =1; +000008 2201 MOVS r2,#1 +00000a 4b06 LDR r3,|L6.36| +;;;1372 #endif +;;;1373 hbm_mode = 1; +00000c 4806 LDR r0,|L6.40| +00000e 2ce0 CMP r4,#0xe0 ;1368 +000010 d004 BEQ |L6.28| +;;;1374 hbm_mode_cnt = 0; +;;;1375 // hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x53, 0XE0); +;;;1376 } +;;;1377 else +;;;1378 { +;;;1379 #ifdef ADD_FINGERPRINT_FUNC +;;;1380 fingerprint_flag =0; +000012 7019 STRB r1,[r3,#0] +;;;1381 #endif +;;;1382 hbm_mode = 0; +000014 7041 STRB r1,[r0,#1] +;;;1383 hbm_mode_cnt = 1; +000016 7082 STRB r2,[r0,#2] + |L6.24| +;;;1384 // hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x53, 0X20); +;;;1385 } +;;;1386 +;;;1387 return true; +000018 2001 MOVS r0,#1 +;;;1388 } +00001a bd10 POP {r4,pc} + |L6.28| +00001c 701a STRB r2,[r3,#0] ;1371 +00001e 7042 STRB r2,[r0,#1] ;1373 +000020 7081 STRB r1,[r0,#2] ;1374 +000022 e7f9 B |L6.24| +;;;1389 + ENDP + + |L6.36| + DCD fingerprint_flag + |L6.40| + DCD ||.data|| + + AREA ||i.ap_get_reg_7A||, CODE, READONLY, ALIGN=1 + + ap_get_reg_7A PROC +;;;1389 +;;;1390 static bool ap_get_reg_7A(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b50e PUSH {r1-r3,lr} +;;;1391 { +;;;1392 uint8_t mode; +;;;1393 uint32_t pk_length; +;;;1394 +;;;1395 pk_length = dcs_packet->param_length; +000002 6888 LDR r0,[r1,#8] +;;;1396 // TAU_LOGD("value_reg_7A[0x%x], Len[%d]", dcs_packet->packet_param[0], pk_length); +;;;1397 if (pk_length == 1) +000004 2801 CMP r0,#1 +000006 d123 BNE |L7.80| +;;;1398 { +;;;1399 mode = dcs_packet->packet_param[0]; +000008 68c8 LDR r0,[r1,#0xc] +00000a 7800 LDRB r0,[r0,#0] +;;;1400 if (mode == 0x21) +00000c 2821 CMP r0,#0x21 +00000e d002 BEQ |L7.22| +;;;1401 { +;;;1402 //HBM Mode2 / FPS Enable +;;;1403 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87,0x1F,0xF8,0x05); +;;;1404 } +;;;1405 else if (mode == 0x23) +000010 2823 CMP r0,#0x23 +000012 d00d BEQ |L7.48| +000014 e01c B |L7.80| + |L7.22| +000016 2005 MOVS r0,#5 ;1403 +000018 21f8 MOVS r1,#0xf8 ;1403 +00001a 221f MOVS r2,#0x1f ;1403 +00001c 9200 STR r2,[sp,#0] ;1403 +00001e 9101 STR r1,[sp,#4] ;1403 +000020 9002 STR r0,[sp,#8] ;1403 +000022 2387 MOVS r3,#0x87 ;1403 +000024 2204 MOVS r2,#4 ;1403 +000026 2100 MOVS r1,#0 ;1403 +000028 2039 MOVS r0,#0x39 ;1403 +00002a f7fffffe BL hal_dsi_tx_ctrl_write_cmd +00002e e00f B |L7.80| + |L7.48| +;;;1406 { +;;;1407 //HBM Mode2 / FPS Disable +;;;1408 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x6F,0x02); +000030 2002 MOVS r0,#2 +000032 4602 MOV r2,r0 +000034 9000 STR r0,[sp,#0] +000036 236f MOVS r3,#0x6f +000038 2100 MOVS r1,#0 +00003a 2039 MOVS r0,#0x39 +00003c f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;1409 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x87,0x04); +000040 2004 MOVS r0,#4 +000042 9000 STR r0,[sp,#0] +000044 2387 MOVS r3,#0x87 +000046 2202 MOVS r2,#2 +000048 2100 MOVS r1,#0 +00004a 2039 MOVS r0,#0x39 +00004c f7fffffe BL hal_dsi_tx_ctrl_write_cmd + |L7.80| +;;;1410 } +;;;1411 ///FPR ON +;;;1412 // 0x39, 0, 4, 0x87,0x13,0xFF,0x05, +;;;1413 ///FPR OFF +;;;1414 // 0x39, 0, 2, 0x6F,0x02, +;;;1415 // 0x39, 0, 2, 0x87,0x04, +;;;1416 } +;;;1417 +;;;1418 return true; +000050 2001 MOVS r0,#1 +;;;1419 } +000052 bd0e POP {r1-r3,pc} +;;;1420 + ENDP + + + AREA ||i.ap_get_reg_df||, CODE, READONLY, ALIGN=2 + + ap_get_reg_df PROC +;;;1153 +;;;1154 static bool ap_get_reg_df(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b570 PUSH {r4-r6,lr} +;;;1155 { +000002 b08e SUB sp,sp,#0x38 +;;;1156 ccm_coef_t ccm; +;;;1157 ccm.coef_c00 = 255; +000004 24ff MOVS r4,#0xff +000006 9405 STR r4,[sp,#0x14] +;;;1158 ccm.coef_c01 = 0; +000008 2000 MOVS r0,#0 +00000a 9006 STR r0,[sp,#0x18] +;;;1159 ccm.coef_c02 = 0; +00000c 9007 STR r0,[sp,#0x1c] +;;;1160 ccm.coef_c10 = 0; +00000e 9008 STR r0,[sp,#0x20] +;;;1161 ccm.coef_c11 = 255; +000010 9409 STR r4,[sp,#0x24] +;;;1162 ccm.coef_c12 = 0; +000012 900a STR r0,[sp,#0x28] +;;;1163 ccm.coef_c20 = 0; +000014 900b STR r0,[sp,#0x2c] +;;;1164 ccm.coef_c21 = 0; +000016 900c STR r0,[sp,#0x30] +;;;1165 ccm.coef_c22 = 255; +000018 940d STR r4,[sp,#0x34] +;;;1166 +;;;1167 #ifdef ADD_PANEL_DISPLAY_MODE +;;;1168 value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; +00001a 68c9 LDR r1,[r1,#0xc] +00001c 4e1e LDR r6,|L8.152| +00001e 4608 MOV r0,r1 +000020 3020 ADDS r0,r0,#0x20 +000022 78c2 LDRB r2,[r0,#3] +000024 7843 LDRB r3,[r0,#1] +000026 0212 LSLS r2,r2,#8 +000028 18d2 ADDS r2,r2,r3 +00002a 6272 STR r2,[r6,#0x24] ; value_reg_df +;;;1169 panel_mode = dcs_packet->packet_param[0]; +00002c 780d LDRB r5,[r1,#0] +00002e 7275 STRB r5,[r6,#9] +;;;1170 panel_r =dcs_packet->packet_param[49]; +000030 7c42 LDRB r2,[r0,#0x11] +000032 8272 STRH r2,[r6,#0x12] +;;;1171 panel_g =dcs_packet->packet_param[51]; +000034 7cc3 LDRB r3,[r0,#0x13] +000036 82b3 STRH r3,[r6,#0x14] +;;;1172 panel_b =dcs_packet->packet_param[53]; +000038 7d40 LDRB r0,[r0,#0x15] +00003a 82f0 STRH r0,[r6,#0x16] +;;;1173 // //TAU_LOGD("value_reg_df[%4x],panel_mode[%4x],panel_r[%4x],panel_g[%4x],panel_b[%4x]", value_reg_df,panel_mode,panel_r,panel_g,panel_b); +;;;1174 +;;;1175 if (panel_mode ==00) +;;;1176 { +;;;1177 //ģʽ +;;;1178 #ifdef USE_FOR_S10_BLUE_MODE +;;;1179 //panel_r =256-RATIO_VALUE*(0xFF-panel_r); +;;;1180 //panel_g =256-RATIO_VALUE*(0xFF-panel_g); +;;;1181 //panel_b =256-RATIO_VALUE*(0xFF-panel_b); +;;;1182 // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); +;;;1183 ccm.coef_c00 = panel_r; +;;;1184 ccm.coef_c11 = panel_g; +;;;1185 ccm.coef_c22 = panel_b; +;;;1186 hal_dsi_tx_ctrl_set_ccm(ccm); +00003c a909 ADD r1,sp,#0x24 +00003e 2d00 CMP r5,#0 ;1175 +000040 d01d BEQ |L8.126| +;;;1187 +;;;1188 #else +;;;1189 value_reg_df =value_reg_df&0xFF; +;;;1190 switch(value_reg_df) +;;;1191 { +;;;1192 case 0xC1: +;;;1193 case 0xC3: +;;;1194 value_blue = BLUE_MIN; +;;;1195 break; +;;;1196 +;;;1197 case 0xCF: +;;;1198 case 0xD0: +;;;1199 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; +;;;1200 break; +;;;1201 +;;;1202 case 0xD8: +;;;1203 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; +;;;1204 break; +;;;1205 +;;;1206 case 0xDE: +;;;1207 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; +;;;1208 break; +;;;1209 +;;;1210 case 0xE4: +;;;1211 case 0xE5: +;;;1212 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; +;;;1213 break; +;;;1214 +;;;1215 case 0xE9: +;;;1216 case 0xEA: +;;;1217 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; +;;;1218 break; +;;;1219 +;;;1220 case 0xED: +;;;1221 case 0xEE: +;;;1222 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; +;;;1223 break; +;;;1224 +;;;1225 case 0xF1: +;;;1226 case 0xF2: +;;;1227 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; +;;;1228 break; +;;;1229 +;;;1230 case 0xF4: +;;;1231 case 0xF5: +;;;1232 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; +;;;1233 break; +;;;1234 +;;;1235 case 0xF7: +;;;1236 case 0xF8: +;;;1237 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; +;;;1238 break; +;;;1239 +;;;1240 case 0xFA: +;;;1241 value_blue = BLUE_MAX; +;;;1242 break; +;;;1243 +;;;1244 default: +;;;1245 case 0xFF: +;;;1246 value_blue = 0; +;;;1247 break; +;;;1248 +;;;1249 } +;;;1250 hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256,256,256); +;;;1251 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;1252 +;;;1253 #endif +;;;1254 +;;;1255 } +;;;1256 else +;;;1257 { +;;;1258 #ifndef USE_FOR_S10_BLUE_MODE +;;;1259 value_blue =0; +;;;1260 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); //ģʽs8+/s9+ +;;;1261 #endif +;;;1262 +;;;1263 //һ㣬ЧԡҪݿͻҪϸ +;;;1264 +;;;1265 panel_r =256-RATIO_VALUE*(0xFF-panel_r); +000042 1aa2 SUBS r2,r4,r2 +000044 0052 LSLS r2,r2,#1 +000046 1c65 ADDS r5,r4,#1 +000048 1aaa SUBS r2,r5,r2 +00004a b292 UXTH r2,r2 +00004c 8272 STRH r2,[r6,#0x12] +;;;1266 panel_g =256-RATIO_VALUE*(0xFF-panel_g); +00004e 1ae3 SUBS r3,r4,r3 +000050 005b LSLS r3,r3,#1 +000052 1aeb SUBS r3,r5,r3 +000054 b29b UXTH r3,r3 +000056 82b3 STRH r3,[r6,#0x14] +;;;1267 panel_b =256-RATIO_VALUE*(0xFF-panel_b); +000058 1a20 SUBS r0,r4,r0 +00005a 0040 LSLS r0,r0,#1 +00005c 1a28 SUBS r0,r5,r0 +00005e b280 UXTH r0,r0 +000060 82f0 STRH r0,[r6,#0x16] +;;;1268 // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); +;;;1269 +;;;1270 ccm.coef_c00 = panel_r; +000062 9205 STR r2,[sp,#0x14] +;;;1271 ccm.coef_c11 = panel_g; +000064 9309 STR r3,[sp,#0x24] +;;;1272 ccm.coef_c22 = panel_b; +000066 900d STR r0,[sp,#0x34] +;;;1273 hal_dsi_tx_ctrl_set_ccm(ccm); +000068 2214 MOVS r2,#0x14 +00006a 4668 MOV r0,sp +00006c f7fffffe BL __aeabi_memcpy4 +000070 a805 ADD r0,sp,#0x14 +000072 c80f LDM r0,{r0-r3} +000074 f7fffffe BL hal_dsi_tx_ctrl_set_ccm + |L8.120| +;;;1274 } +;;;1275 +;;;1276 #ifndef USE_FOR_S10_BLUE_MODE +;;;1277 if (blue_flag==0) +;;;1278 { +;;;1279 blue_flag =1; +;;;1280 delayMs(20); +;;;1281 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;1282 } +;;;1283 #endif +;;;1284 +;;;1285 #else +;;;1286 value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; +;;;1287 +;;;1288 value_reg_df =value_reg_df&0xFF; +;;;1289 switch(value_reg_df) +;;;1290 { +;;;1291 case 0xC1: +;;;1292 case 0xC3: +;;;1293 value_blue = BLUE_MIN; +;;;1294 break; +;;;1295 +;;;1296 case 0xCF: +;;;1297 case 0xD0: +;;;1298 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; +;;;1299 break; +;;;1300 +;;;1301 case 0xD8: +;;;1302 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; +;;;1303 break; +;;;1304 +;;;1305 case 0xDE: +;;;1306 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; +;;;1307 break; +;;;1308 +;;;1309 case 0xE4: +;;;1310 case 0xE5: +;;;1311 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; +;;;1312 break; +;;;1313 +;;;1314 case 0xE9: +;;;1315 case 0xEA: +;;;1316 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; +;;;1317 break; +;;;1318 +;;;1319 case 0xED: +;;;1320 case 0xEE: +;;;1321 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; +;;;1322 break; +;;;1323 +;;;1324 case 0xF1: +;;;1325 case 0xF2: +;;;1326 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; +;;;1327 break; +;;;1328 +;;;1329 case 0xF4: +;;;1330 case 0xF5: +;;;1331 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; +;;;1332 break; +;;;1333 +;;;1334 case 0xF7: +;;;1335 case 0xF8: +;;;1336 value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; +;;;1337 break; +;;;1338 +;;;1339 case 0xFA: +;;;1340 value_blue = BLUE_MAX; +;;;1341 break; +;;;1342 +;;;1343 default: +;;;1344 case 0xFF: +;;;1345 value_blue = 0; +;;;1346 break; +;;;1347 +;;;1348 } +;;;1349 +;;;1350 //TAU_LOGD("df[%4x]", value_reg_df); +;;;1351 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;1352 if (blue_flag==0) +;;;1353 { +;;;1354 blue_flag =1; +;;;1355 delayMs(20); +;;;1356 hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); +;;;1357 } +;;;1358 #endif +;;;1359 +;;;1360 return true; +000078 2001 MOVS r0,#1 +;;;1361 } +00007a b00e ADD sp,sp,#0x38 +00007c bd70 POP {r4-r6,pc} + |L8.126| +00007e 9205 STR r2,[sp,#0x14] ;1183 +000080 9309 STR r3,[sp,#0x24] ;1184 +000082 900d STR r0,[sp,#0x34] ;1185 +000084 2214 MOVS r2,#0x14 ;1186 +000086 4668 MOV r0,sp ;1186 +000088 f7fffffe BL __aeabi_memcpy4 +00008c a805 ADD r0,sp,#0x14 ;1186 +00008e c80f LDM r0,{r0-r3} ;1186 +000090 f7fffffe BL hal_dsi_tx_ctrl_set_ccm +000094 e7f0 B |L8.120| +;;;1362 #endif + ENDP + +000096 0000 DCW 0x0000 + |L8.152| + DCD ||.data|| + + AREA ||i.ap_reset_cb||, CODE, READONLY, ALIGN=2 + + ap_reset_cb PROC +;;;156 #if ENABLE_TP_WAKE_UP +;;;157 static void ap_reset_cb(void *data) +000000 2100 MOVS r1,#0 +;;;158 { +;;;159 /* лԴ */ +;;;160 // hal_gpio_set_output_data_ex(POWER_IO_B, IO_LVL_HIGH, POWER_IO_A, IO_LVL_LOW); +;;;161 hal_gpio_set_output_data(POWER_IO_A, IO_LVL_LOW); +000002 200a MOVS r0,#0xa +000004 f7fffffe BL hal_gpio_set_output_data +;;;162 /* VCC */ +;;;163 //TAU_LOGD("disable reset!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!"); +;;;164 hal_system_set_pvd(true); +000008 2001 MOVS r0,#1 +00000a f7fffffe BL hal_system_set_pvd +;;;165 hal_system_set_vcc(true); +00000e 2001 MOVS r0,#1 +000010 f7fffffe BL hal_system_set_vcc +000014 f3bf8f4f DSB +000018 4904 LDR r1,|L9.44| +00001a 4803 LDR r0,|L9.40| +00001c 60c8 STR r0,[r1,#0xc] +00001e f3bf8f4f DSB + |L9.34| +000022 bf00 NOP +000024 e7fd B |L9.34| +;;;166 NVIC_SystemReset(); +;;;167 } +;;;168 #endif + ENDP + +000026 0000 DCW 0x0000 + |L9.40| + DCD 0x05fa0004 + |L9.44| + DCD 0xe000ed00 + + AREA ||i.ap_set_backlight_51||, CODE, READONLY, ALIGN=2 + + ap_set_backlight_51 PROC +;;;799 +;;;800 static bool ap_set_backlight_51(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b51c PUSH {r2-r4,lr} +;;;801 { +;;;802 +;;;803 #if 1 // video mode +;;;804 uint16_t rd_51_val; // 0x0003~0x03FF(1020) [0x66,м仹һ] ==> 0x006F~0x07FF(1936) +;;;805 +;;;806 rd_51_val = dcs_packet->packet_param[0]; +000002 68c8 LDR r0,[r1,#0xc] +000004 7801 LDRB r1,[r0,#0] +;;;807 rd_51_val = (rd_51_val<<8); +000006 0209 LSLS r1,r1,#8 +;;;808 rd_51_val |= dcs_packet->packet_param[1]; +000008 7840 LDRB r0,[r0,#1] +00000a 4308 ORRS r0,r0,r1 +;;;809 +;;;810 if (hbm_mode ==0){ +00000c 4c12 LDR r4,|L10.88| +00000e 7861 LDRB r1,[r4,#1] ; hbm_mode +000010 2900 CMP r1,#0 +000012 d11f BNE |L10.84| +;;;811 rd_51_val2 = (rd_51_val-0x03)*1936/1020+0x6F; +000014 2179 MOVS r1,#0x79 +000016 1ec0 SUBS r0,r0,#3 +000018 0109 LSLS r1,r1,#4 +00001a 4348 MULS r0,r1,r0 +00001c 21ff MOVS r1,#0xff +00001e 0089 LSLS r1,r1,#2 +000020 f7fffffe BL __aeabi_idivmod +000024 306f ADDS r0,r0,#0x6f +000026 b280 UXTH r0,r0 +000028 8220 STRH r0,[r4,#0x10] +;;;812 if (rd_51_val2 < 0x220 && rd_51_val2 > 0x1B3){ +00002a 38ff SUBS r0,r0,#0xff +00002c 38b5 SUBS r0,r0,#0xb5 +00002e 286c CMP r0,#0x6c +000030 d202 BCS |L10.56| +;;;813 rd_51_val2 = 0x1B3; +000032 20ff MOVS r0,#0xff +000034 30b4 ADDS r0,r0,#0xb4 +000036 8220 STRH r0,[r4,#0x10] + |L10.56| +;;;814 } +;;;815 if (hbm_mode_cnt ==0) +000038 78a0 LDRB r0,[r4,#2] ; hbm_mode_cnt +00003a 2800 CMP r0,#0 +00003c d10a BNE |L10.84| +;;;816 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, rd_51_val2>>8, rd_51_val2&0x00FF); +00003e 8a20 LDRH r0,[r4,#0x10] ; rd_51_val2 +000040 2351 MOVS r3,#0x51 +000042 b2c1 UXTB r1,r0 +000044 0a00 LSRS r0,r0,#8 +000046 9101 STR r1,[sp,#4] +000048 9000 STR r0,[sp,#0] +00004a 2203 MOVS r2,#3 +00004c 2100 MOVS r1,#0 +00004e 2039 MOVS r0,#0x39 +000050 f7fffffe BL hal_dsi_tx_ctrl_write_cmd + |L10.84| +;;;817 // TAU_LOGD("51[%04X][%04X][%d]", rd_51_val, rd_51_val2, hbm_mode); +;;;818 } +;;;819 #else +;;;820 uint8_t cmd_data[2]; +;;;821 +;;;822 cmd_data[0] = dcs_packet->packet_param[0]; +;;;823 cmd_data[1] = dcs_packet->packet_param[1]; +;;;824 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, cmd_data[0], cmd_data[1]); +;;;825 //TAU_LOGD("51:[%x]", (cmd_data[0]<<8)|cmd_data[1]); +;;;826 #endif +;;;827 return true; +000054 2001 MOVS r0,#1 +;;;828 } +000056 bd1c POP {r2-r4,pc} +;;;829 + ENDP + + |L10.88| + DCD ||.data|| + + AREA ||i.ap_set_display_off||, CODE, READONLY, ALIGN=2 + + ap_set_display_off PROC +;;;494 +;;;495 static bool ap_set_display_off(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;496 { +;;;497 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x28); +000002 2328 MOVS r3,#0x28 +000004 2201 MOVS r2,#1 +000006 2100 MOVS r1,#0 +000008 2005 MOVS r0,#5 +00000a f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;498 TAU_LOGD("disp off"); +00000e 22ff MOVS r2,#0xff +000010 32f3 ADDS r2,r2,#0xf3 +000012 a103 ADR r1,|L11.32| +000014 a005 ADR r0,|L11.44| +000016 f7fffffe BL LOG_printf +;;;499 +;;;500 return true; +00001a 2001 MOVS r0,#1 +;;;501 } +00001c bd10 POP {r4,pc} +;;;502 + ENDP + +00001e 0000 DCW 0x0000 + |L11.32| +000020 5331304c DCB "S10Lite_368",0 +000024 6974655f +000028 33363800 + |L11.44| +00002c 5b25735d DCB "[%s] (%04d) disp off",0 +000030 20282530 +000034 34642920 +000038 64697370 +00003c 206f6666 +000040 00 +000041 00 DCB 0 +000042 00 DCB 0 +000043 00 DCB 0 + + AREA ||i.ap_set_display_on||, CODE, READONLY, ALIGN=1 + + ap_set_display_on PROC +;;;488 +;;;489 static bool ap_set_display_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 2001 MOVS r0,#1 +;;;490 { +;;;491 //TAU_LOGD("disp on"); +;;;492 return true; +;;;493 } +000002 4770 BX lr +;;;494 + ENDP + + + AREA ||i.ap_set_enter_sleep_mode||, CODE, READONLY, ALIGN=2 + + ap_set_enter_sleep_mode PROC +;;;503 +;;;504 static bool ap_set_enter_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;505 { +;;;506 hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); +000002 4c11 LDR r4,|L13.72| +000004 69a0 LDR r0,[r4,#0x18] ; g_rx_ctrl_handle +000006 f7fffffe BL hal_dsi_rx_ctrl_set_sw_tear_mode +;;;507 +;;;508 Gpio_swire_output(0, 0); +00000a 2100 MOVS r1,#0 +00000c 4608 MOV r0,r1 +00000e f7fffffe BL Gpio_swire_output +;;;509 delayMs(50); +000012 2032 MOVS r0,#0x32 +000014 f7fffffe BL delayMs +;;;510 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x10); +000018 2310 MOVS r3,#0x10 +00001a 2201 MOVS r2,#1 +00001c 2100 MOVS r1,#0 +00001e 2005 MOVS r0,#5 +000020 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;511 delayMs(20); +000024 2014 MOVS r0,#0x14 +000026 f7fffffe BL delayMs +;;;512 hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_LOW); +00002a 2100 MOVS r1,#0 +00002c 2013 MOVS r0,#0x13 +00002e f7fffffe BL hal_gpio_set_output_data +;;;513 +;;;514 TAU_LOGD("enter sleep mode"); +000032 4a06 LDR r2,|L13.76| +000034 a106 ADR r1,|L13.80| +000036 a009 ADR r0,|L13.92| +000038 f7fffffe BL LOG_printf +;;;515 +;;;516 #if ENABLE_TP_WAKE_UP +;;;517 g_need_enter_sleep_mode = true; +00003c 2001 MOVS r0,#1 +00003e 7020 STRB r0,[r4,#0] +;;;518 #endif +;;;519 g_exit_sleep_mode = false; +000040 2000 MOVS r0,#0 +000042 7120 STRB r0,[r4,#4] +;;;520 +;;;521 return true; +000044 2001 MOVS r0,#1 +;;;522 } +000046 bd10 POP {r4,pc} +;;;523 + ENDP + + |L13.72| + DCD ||.data|| + |L13.76| + DCD 0x00000202 + |L13.80| +000050 5331304c DCB "S10Lite_368",0 +000054 6974655f +000058 33363800 + |L13.92| +00005c 5b25735d DCB "[%s] (%04d) enter sleep mode",0 +000060 20282530 +000064 34642920 +000068 656e7465 +00006c 7220736c +000070 65657020 +000074 6d6f6465 +000078 00 +000079 00 DCB 0 +00007a 00 DCB 0 +00007b 00 DCB 0 + + AREA ||i.ap_set_exit_sleep_mode||, CODE, READONLY, ALIGN=2 + + ap_set_exit_sleep_mode PROC +;;;523 +;;;524 static bool ap_set_exit_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;525 { +;;;526 TAU_LOGD("exit sleep mode"); +000002 4a04 LDR r2,|L14.20| +000004 a104 ADR r1,|L14.24| +000006 a007 ADR r0,|L14.36| +000008 f7fffffe BL LOG_printf +;;;527 g_exit_sleep_mode = true; +00000c 490c LDR r1,|L14.64| +00000e 2001 MOVS r0,#1 +000010 7108 STRB r0,[r1,#4] +;;;528 +;;;529 /* AVDD ϵ, ڽϢPPS */ +;;;530 //hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); +;;;531 //hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x11); +;;;532 return true; +;;;533 } +000012 bd10 POP {r4,pc} +;;;534 + ENDP + + |L14.20| + DCD 0x0000020e + |L14.24| +000018 5331304c DCB "S10Lite_368",0 +00001c 6974655f +000020 33363800 + |L14.36| +000024 5b25735d DCB "[%s] (%04d) exit sleep mode",0 +000028 20282530 +00002c 34642920 +000030 65786974 +000034 20736c65 +000038 6570206d +00003c 6f646500 + |L14.64| + DCD ||.data|| + + AREA ||i.ap_update_frame_rate||, CODE, READONLY, ALIGN=2 + + ap_update_frame_rate PROC +;;;757 static uint8_t R60_Parma_backup = 0x00; +;;;758 static bool ap_update_frame_rate(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b510 PUSH {r4,lr} +;;;759 { +;;;760 #if 0 +;;;761 static uint8_t frame_rate = 100; +;;;762 if (frame_rate != dcs_packet->packet_param[0]) +;;;763 { +;;;764 frame_rate = dcs_packet->packet_param[0]; +;;;765 if (frame_rate == 0x00) +;;;766 { +;;;767 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LINE, TE_HW_MODE); +;;;768 } +;;;769 else +;;;770 { +;;;771 //0x08 120Hz +;;;772 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LINE, TE_SOFT_120HZ_MODE); +;;;773 } +;;;774 //TAU_LOGD("frame_rate:%02x", frame_rate); +;;;775 } +;;;776 #else +;;;777 +;;;778 if (R60_Parma_backup != dcs_packet->packet_param[0]) +000002 68c8 LDR r0,[r1,#0xc] +000004 7801 LDRB r1,[r0,#0] +000006 4809 LDR r0,|L15.44| +000008 7a02 LDRB r2,[r0,#8] ; R60_Parma_backup +00000a 4291 CMP r1,r2 +00000c d007 BEQ |L15.30| +;;;779 { +;;;780 R60_Parma_backup = dcs_packet->packet_param[0]; +00000e 7201 STRB r1,[r0,#8] +;;;781 +;;;782 if (R60_Parma_backup == 0x08) +;;;783 { +;;;784 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, g_rx_ctrl_handle->base_info.src_h, TE_SOFT_120HZ_MODE); +000010 6980 LDR r0,[r0,#0x18] +000012 2908 CMP r1,#8 ;782 +000014 d005 BEQ |L15.34| +;;;785 } +;;;786 +;;;787 else +;;;788 { +;;;789 hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, g_rx_ctrl_handle->base_info.src_h, TE_HW_MODE); +000016 2200 MOVS r2,#0 +000018 6841 LDR r1,[r0,#4] +00001a f7fffffe BL hal_dsi_rx_ctrl_set_tear_mode_ex + |L15.30| +;;;790 //hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle,2000,TE_SOFT_120HZ_MODE); +;;;791 } +;;;792 } +;;;793 +;;;794 #endif +;;;795 +;;;796 return true; +00001e 2001 MOVS r0,#1 +;;;797 } +000020 bd10 POP {r4,pc} + |L15.34| +000022 2205 MOVS r2,#5 ;784 +000024 6841 LDR r1,[r0,#4] ;784 +000026 f7fffffe BL hal_dsi_rx_ctrl_set_tear_mode_ex +00002a e7f8 B |L15.30| +;;;798 + ENDP + + |L15.44| + DCD ||.data|| + + AREA ||i.init_mipi_tx||, CODE, READONLY, ALIGN=2 + + init_mipi_tx PROC +;;;2514 +;;;2515 static void init_mipi_tx(void) +000000 b570 PUSH {r4-r6,lr} +;;;2516 { +;;;2517 if (g_tx_ctrl_handle == NULL) +000002 4c16 LDR r4,|L16.92| +000004 69e0 LDR r0,[r4,#0x1c] ; g_tx_ctrl_handle +000006 2800 CMP r0,#0 +000008 d102 BNE |L16.16| +;;;2518 { +;;;2519 g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); +00000a f7fffffe BL hal_dsi_tx_ctrl_create_handle +00000e 61e0 STR r0,[r4,#0x1c] ; g_tx_ctrl_handle + |L16.16| +;;;2520 } +;;;2521 g_tx_ctrl_handle->channel_id = OUTPUT_VC; +000010 69e0 LDR r0,[r4,#0x1c] ; g_tx_ctrl_handle +000012 2200 MOVS r2,#0 +000014 7082 STRB r2,[r0,#2] +;;;2522 g_tx_ctrl_handle->lane_num = OUTPUT_LANE_NUMBER; +000016 2104 MOVS r1,#4 +000018 7041 STRB r1,[r0,#1] +;;;2523 g_tx_ctrl_handle->vid_mode = OUTPUT_VIDEO_MODEL; +00001a 70c2 STRB r2,[r0,#3] +;;;2524 g_tx_ctrl_handle->cmd_tx_type = _CMD_TYPE; +00001c 2301 MOVS r3,#1 +00001e 7103 STRB r3,[r0,#4] +;;;2525 g_tx_ctrl_handle->dpi_vsa = OUTPUT_VSA; +000020 240c MOVS r4,#0xc +000022 6084 STR r4,[r0,#8] +;;;2526 g_tx_ctrl_handle->dpi_vbp = OUTPUT_VBP; +000024 2108 MOVS r1,#8 +000026 60c1 STR r1,[r0,#0xc] +;;;2527 g_tx_ctrl_handle->dpi_vfp = OUTPUT_VFP; +000028 2538 MOVS r5,#0x38 +00002a 6105 STR r5,[r0,#0x10] +;;;2528 g_tx_ctrl_handle->dpi_hsa = OUTPUT_HSA; +00002c 6141 STR r1,[r0,#0x14] +;;;2529 g_tx_ctrl_handle->dpi_hbp = OUTPUT_HBP; +00002e 6184 STR r4,[r0,#0x18] +;;;2530 g_tx_ctrl_handle->dpi_hfp = OUTPUT_HFP; +000030 2178 MOVS r1,#0x78 +000032 61c1 STR r1,[r0,#0x1c] +;;;2531 g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; +000034 2487 MOVS r4,#0x87 +000036 00e4 LSLS r4,r4,#3 +000038 6204 STR r4,[r0,#0x20] +;;;2532 g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; +00003a 214b MOVS r1,#0x4b +00003c 0149 LSLS r1,r1,#5 +00003e 6241 STR r1,[r0,#0x24] +;;;2533 g_tx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; +000040 6284 STR r4,[r0,#0x28] +;;;2534 g_tx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; +000042 62c1 STR r1,[r0,#0x2c] +;;;2535 g_tx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; +000044 4601 MOV r1,r0 +000046 3120 ADDS r1,r1,#0x20 +000048 740a STRB r2,[r1,#0x10] +;;;2536 g_tx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; +00004a 744b STRB r3,[r1,#0x11] +;;;2537 +;;;2538 // g_tx_ctrl_handle->tx_clkawayshs = true; +;;;2539 // g_tx_ctrl_handle->tx_line_delay = 400; //45; +;;;2540 +;;;2541 hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); +00004c f7fffffe BL hal_dsi_tx_ctrl_init +;;;2542 /* AP ûзʱĬϵʾɫ, Ϊ0 0 0(ɫ), ɫΪdebugʹ */ +;;;2543 hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); +000050 2200 MOVS r2,#0 +000052 4611 MOV r1,r2 +000054 4610 MOV r0,r2 +000056 f7fffffe BL hal_dsi_tx_ctrl_set_overwrite_rgb +;;;2544 } +00005a bd70 POP {r4-r6,pc} +;;;2545 + ENDP + + |L16.92| + DCD ||.data|| + + AREA ||i.init_panel||, CODE, READONLY, ALIGN=2 + + init_panel PROC +;;;2384 +;;;2385 static void init_panel(void) +000000 b500 PUSH {lr} +;;;2386 { +000002 b085 SUB sp,sp,#0x14 +;;;2387 /* reset panel*/ +;;;2388 tx_panel_reset(); +000004 f7fffffe BL tx_panel_reset +;;;2389 +;;;2390 /* enter send initial code mode*/ +;;;2391 hal_dsi_tx_ctrl_enter_init_panel_mode(); +000008 f7fffffe BL hal_dsi_tx_ctrl_enter_init_panel_mode +;;;2392 TAU_LOGD("LCD init code!"); +00000c 4a21 LDR r2,|L17.148| +00000e a122 ADR r1,|L17.152| +000010 a024 ADR r0,|L17.164| +000012 f7fffffe BL LOG_printf +;;;2393 +;;;2394 #if AMOLED_NT37701_CSOT667 +;;;2395 #if PANEL_INIT_CODE_ARRAY +;;;2396 send_panel_init_code(sizeof(panel_init_code), panel_init_code); +000016 492a LDR r1,|L17.192| +000018 482a LDR r0,|L17.196| +00001a f7fffffe BL send_panel_init_code +;;;2397 #endif +;;;2398 +;;;2399 #if 1 //READ +;;;2400 uint8_t test_arr[10]; +;;;2401 hal_dsi_tx_ctrl_read_cmd(0x06, 0, 0x0A, 2, test_arr); +00001e a802 ADD r0,sp,#8 +000020 9000 STR r0,[sp,#0] +000022 2302 MOVS r3,#2 +000024 220a MOVS r2,#0xa +000026 2100 MOVS r1,#0 +000028 2006 MOVS r0,#6 +00002a f7fffffe BL hal_dsi_tx_ctrl_read_cmd +;;;2402 delayMs(20); +00002e 2014 MOVS r0,#0x14 +000030 f7fffffe BL delayMs +;;;2403 TAU_LOGD("F8:=%x, %x.",test_arr[0],test_arr[1]); +000034 4668 MOV r0,sp +000036 7a40 LDRB r0,[r0,#9] +000038 9000 STR r0,[sp,#0] +00003a 4668 MOV r0,sp +00003c 4a15 LDR r2,|L17.148| +00003e 7a03 LDRB r3,[r0,#8] +000040 320b ADDS r2,r2,#0xb +000042 a115 ADR r1,|L17.152| +000044 a020 ADR r0,|L17.200| +000046 f7fffffe BL LOG_printf +;;;2404 #endif +;;;2405 +;;;2406 #if 0//BIST MODE +;;;2407 hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH); //LED_ON +;;;2408 delayMs(90); //90 +;;;2409 Gpio_swire_output(2, 40); +;;;2410 delayMs(20); +;;;2411 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 6,0xF0,0x55,0xAA,0x52,0x08,0x00); +;;;2412 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 8,0xEF,0x01,0x02,0xFF,0xFF,0xFF,0x17,0xFF); +;;;2413 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 5,0xEE,0x87,0x78,0x02,0x40); +;;;2414 delayMs(20); +;;;2415 #else +;;;2416 +;;;2417 hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x00, 0x01); //0FFF +00004a 2001 MOVS r0,#1 +00004c 2100 MOVS r1,#0 +00004e 9001 STR r0,[sp,#4] +000050 2351 MOVS r3,#0x51 +000052 2203 MOVS r2,#3 +000054 9100 STR r1,[sp,#0] +000056 2039 MOVS r0,#0x39 +000058 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;2418 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); +00005c 2311 MOVS r3,#0x11 +00005e 2201 MOVS r2,#1 +000060 2100 MOVS r1,#0 +000062 2005 MOVS r0,#5 +000064 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;2419 hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH); //LED_ON +000068 2101 MOVS r1,#1 +00006a 2013 MOVS r0,#0x13 +00006c f7fffffe BL hal_gpio_init_output +;;;2420 delayMs(90); //90 +000070 205a MOVS r0,#0x5a +000072 f7fffffe BL delayMs +;;;2421 Gpio_swire_output(2, 40); +000076 2128 MOVS r1,#0x28 +000078 2002 MOVS r0,#2 +00007a f7fffffe BL Gpio_swire_output +;;;2422 delayMs(20); +00007e 2014 MOVS r0,#0x14 +000080 f7fffffe BL delayMs +;;;2423 // hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); +;;;2424 // delayMs(20); +;;;2425 #endif +;;;2426 +;;;2427 +;;;2428 #endif +;;;2429 /* exit send initial code mode*/ +;;;2430 hal_dsi_tx_ctrl_exit_init_panel_mode(); +000084 f7fffffe BL hal_dsi_tx_ctrl_exit_init_panel_mode +;;;2431 delayMs(20); +000088 2014 MOVS r0,#0x14 +00008a f7fffffe BL delayMs +;;;2432 } +00008e b005 ADD sp,sp,#0x14 +000090 bd00 POP {pc} +;;;2433 + ENDP + +000092 0000 DCW 0x0000 + |L17.148| + DCD 0x00000958 + |L17.152| +000098 5331304c DCB "S10Lite_368",0 +00009c 6974655f +0000a0 33363800 + |L17.164| +0000a4 5b25735d DCB "[%s] (%04d) LCD init code!",0 +0000a8 20282530 +0000ac 34642920 +0000b0 4c434420 +0000b4 696e6974 +0000b8 20636f64 +0000bc 652100 +0000bf 00 DCB 0 + |L17.192| + DCD ||.constdata||+0x84 + |L17.196| + DCD 0x000028d2 + |L17.200| +0000c8 5b25735d DCB "[%s] (%04d) F8:=%x, %x.",0 +0000cc 20282530 +0000d0 34642920 +0000d4 46383a3d +0000d8 25782c20 +0000dc 25782e00 + + AREA ||i.open_mipi_rx||, CODE, READONLY, ALIGN=2 + + open_mipi_rx PROC +;;;2433 +;;;2434 static void open_mipi_rx(void) +000000 b570 PUSH {r4-r6,lr} +;;;2435 { +;;;2436 /* TE */ +;;;2437 hal_gpio_set_mode(IO_PAD_AP_TE, IO_MODE_TEAR); +000002 2100 MOVS r1,#0 +000004 2003 MOVS r0,#3 +000006 f7fffffe BL hal_gpio_set_mode +;;;2438 +;;;2439 if (g_rx_ctrl_handle == NULL) +00000a 4c1e LDR r4,|L18.132| +00000c 69a0 LDR r0,[r4,#0x18] ; g_rx_ctrl_handle +00000e 2800 CMP r0,#0 +000010 d102 BNE |L18.24| +;;;2440 { +;;;2441 /* rx ctrl handle */ +;;;2442 g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); +000012 f7fffffe BL hal_dsi_rx_ctrl_create_handle +000016 61a0 STR r0,[r4,#0x18] ; g_rx_ctrl_handle + |L18.24| +;;;2443 } +;;;2444 /* ò */ +;;;2445 g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; +000018 2187 MOVS r1,#0x87 +00001a 69a0 LDR r0,[r4,#0x18] ; g_rx_ctrl_handle +00001c 00c9 LSLS r1,r1,#3 +00001e 6001 STR r1,[r0,#0] +;;;2446 g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; +000020 224b MOVS r2,#0x4b +000022 0152 LSLS r2,r2,#5 +000024 6042 STR r2,[r0,#4] +;;;2447 g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; +000026 6081 STR r1,[r0,#8] +;;;2448 g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; +000028 60c2 STR r2,[r0,#0xc] +;;;2449 g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; +00002a 2100 MOVS r1,#0 +00002c 7401 STRB r1,[r0,#0x10] +;;;2450 g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; +00002e 2301 MOVS r3,#1 +000030 7443 STRB r3,[r0,#0x11] +;;;2451 g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; +000032 2204 MOVS r2,#4 +000034 7702 STRB r2,[r0,#0x1c] +;;;2452 g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; +000036 7742 STRB r2,[r0,#0x1d] +;;;2453 g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; /* ɲ */ +000038 7783 STRB r3,[r0,#0x1e] +;;;2454 g_rx_ctrl_handle->rx_vc = INPUT_VC; +00003a 77c1 STRB r1,[r0,#0x1f] +;;;2455 g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; +00003c 2220 MOVS r2,#0x20 +00003e 5411 STRB r1,[r2,r0] +;;;2456 g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; +000040 4a11 LDR r2,|L18.136| +000042 6242 STR r2,[r0,#0x24] +;;;2457 g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; /* ע DCSб */ +000044 4602 MOV r2,r0 +000046 4d11 LDR r5,|L18.140| +000048 3280 ADDS r2,r2,#0x80 +00004a 6295 STR r5,[r2,#0x28] +;;;2458 g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; /* עdsc read ص,ѡ,˺Ϊʱcus_dcs_entry_tableִ */ +00004c 4d10 LDR r5,|L18.144| +00004e 62d5 STR r5,[r2,#0x2c] +;;;2459 g_rx_ctrl_handle->pps_update_entry = pps_update_handle; +000050 4d10 LDR r5,|L18.148| +000052 6315 STR r5,[r2,#0x30] +;;;2460 //򿪻ᵼ¿ӡϢTX +;;;2461 // g_rx_ctrl_handle->pq_marginal = PQ_TYPE_5; +;;;2462 +;;;2463 #if defined(ISP_568) || defined(ISP_368) +;;;2464 g_rx_ctrl_handle->base_info.extra_info.rot_angle = VIDOE_ROT_ANGLE_0; +000054 7581 STRB r1,[r0,#0x16] +;;;2465 g_rx_ctrl_handle->base_info.extra_info.mirror_en = false; +000056 7541 STRB r1,[r0,#0x15] +;;;2466 +;;;2467 g_rx_ctrl_handle->hight_performan_mode = HIGHT_PERFORMAN_L2; +000058 2102 MOVS r1,#2 +00005a 22bf MOVS r2,#0xbf +00005c 5411 STRB r1,[r2,r0] +;;;2468 g_rx_ctrl_handle->base_info.extra_info.ltpo = LTPO_MODE_2; +00005e 7501 STRB r1,[r0,#0x14] +;;;2469 g_rx_ctrl_handle->pu_optimize = true; +000060 21c0 MOVS r1,#0xc0 +000062 540b STRB r3,[r1,r0] +;;;2470 #endif +;;;2471 +;;;2472 /* ǰԤPPS, AP PPS cmdҲ */ +;;;2473 if (g_rx_ctrl_handle->compress_en == true) +;;;2474 { +;;;2475 uint8_t pps[128] = +;;;2476 { +;;;2477 0x11, 0x00, 0x00, 0x89, 0x30, 0x80, 0x0C, 0x80, +;;;2478 0x05, 0xA0, 0x00, 0x28, 0x02, 0xD0, 0x02, 0xD0, +;;;2479 0x02, 0x00, 0x02, 0x0E, 0x00, 0x20, 0x03, 0xDD, +;;;2480 0x00, 0x07, 0x00, 0x0C, 0x02, 0x77, 0x02, 0x8B, +;;;2481 0x18, 0x00, 0x10, 0xF0, 0x03, 0x0C, 0x20, 0x00, +;;;2482 0x06, 0x0B, 0x0B, 0x33, 0x0E, 0x1C, 0x2A, 0x38, +;;;2483 0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7B, +;;;2484 0x7D, 0x7E, 0x01, 0x02, 0x01, 0x00, 0x09, 0x40, +;;;2485 0x09, 0xBE, 0x19, 0xFC, 0x19, 0xFA, 0x19, 0xF8, +;;;2486 0x1A, 0x38, 0x1A, 0x78, 0x1A, 0xB6, 0x2A, 0xF6, +;;;2487 0x2B, 0x34, 0x2B, 0x74, 0x3B, 0x74, 0x6B, 0xF4, +;;;2488 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +;;;2489 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +;;;2490 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +;;;2491 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +;;;2492 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +;;;2493 }; +;;;2494 +;;;2495 hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 88); +;;;2496 } +;;;2497 +;;;2498 /* ʼrx ctrl */ +;;;2499 hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); +000064 f7fffffe BL hal_dsi_rx_ctrl_init +;;;2500 +;;;2501 hal_dsi_rx_ctrl_set_cus_sync_line(g_rx_ctrl_handle, g_rx_ctrl_handle->base_info.src_h); // lss add, ˺1600 +000068 69a0 LDR r0,[r4,#0x18] ; g_rx_ctrl_handle +00006a 6841 LDR r1,[r0,#4] +00006c f7fffffe BL hal_dsi_rx_ctrl_set_cus_sync_line +;;;2502 // hal_dsi_rx_ctrl_hight_performan_mode(g_rx_ctrl_handle); +;;;2503 // /* rx ctrl */ +;;;2504 // hal_dsi_rx_ctrl_set_cus_esc_clk(g_rx_ctrl_handle,20000000); +;;;2505 +;;;2506 // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256, 256, 211); +;;;2507 +;;;2508 // hal_dsi_rx_ctrl_set_hw_cmd_filter(g_rx_ctrl_handle, HAL_RX_DCS_FILTER_0, 0x4C, 0x4C); +;;;2509 // hal_dsi_rx_ctrl_set_hw_cmd_filter(g_rx_ctrl_handle, HAL_RX_DCS_FILTER_1, 0x5C, 0x5C); +;;;2510 hal_dsi_rx_ctrl_set_cus_scld_filter(g_rx_ctrl_handle,rx_filter_1080_h_4_96,rx_filter_2400_v_4_96); +000070 4a09 LDR r2,|L18.152| +000072 69a0 LDR r0,[r4,#0x18] ; g_rx_ctrl_handle +000074 1fd1 SUBS r1,r2,#7 +000076 39f9 SUBS r1,r1,#0xf9 +000078 f7fffffe BL hal_dsi_rx_ctrl_set_cus_scld_filter +;;;2511 hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +00007c 69a0 LDR r0,[r4,#0x18] ; g_rx_ctrl_handle +00007e f7fffffe BL hal_dsi_rx_ctrl_start +;;;2512 } +000082 bd70 POP {r4-r6,pc} +;;;2513 + ENDP + + |L18.132| + DCD ||.data|| + |L18.136| + DCD 0x5ae5a740 + |L18.140| + DCD ||.constdata|| + |L18.144| + DCD ap_dcs_read + |L18.148| + DCD pps_update_handle + |L18.152| + DCD ||.data||+0x128 + + AREA ||i.pps_update_handle||, CODE, READONLY, ALIGN=2 + + pps_update_handle PROC +;;;445 /* PPS update callback ڷֱлcase */ +;;;446 static bool pps_update_handle(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height) +000000 b570 PUSH {r4-r6,lr} +;;;447 { +000002 4614 MOV r4,r2 +000004 461d MOV r5,r3 +;;;448 /* AVDD ϵ, ڽϢPPS */ +;;;449 // hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); +;;;450 +;;;451 +;;;452 if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) +000006 4e0b LDR r6,|L19.52| +000008 69b0 LDR r0,[r6,#0x18] ; g_rx_ctrl_handle +00000a 6801 LDR r1,[r0,#0] +00000c 42a1 CMP r1,r4 +00000e d102 BNE |L19.22| +000010 6841 LDR r1,[r0,#4] +000012 42a9 CMP r1,r5 +000014 d00c BEQ |L19.48| + |L19.22| +;;;453 { +;;;454 //hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); +;;;455 /* PPS Update ҷֱʷ仯 */ +;;;456 g_rx_ctrl_handle->base_info.src_w = pic_width; +000016 6004 STR r4,[r0,#0] +;;;457 g_rx_ctrl_handle->base_info.src_h = pic_height; +000018 6045 STR r5,[r0,#4] +;;;458 /* עⲿֻPPSǰ Compression Mode Command */ +;;;459 g_rx_ctrl_handle->compress_en = hal_dsi_rx_ctrl_get_compressen_en(g_rx_ctrl_handle); +00001a f7fffffe BL hal_dsi_rx_ctrl_get_compressen_en +00001e 4601 MOV r1,r0 +000020 69b0 LDR r0,[r6,#0x18] ; g_rx_ctrl_handle +000022 2220 MOVS r2,#0x20 +000024 5411 STRB r1,[r2,r0] +;;;460 g_tx_ctrl_handle->base_info.src_w = pic_width; +000026 69f1 LDR r1,[r6,#0x1c] ; g_tx_ctrl_handle +000028 620c STR r4,[r1,#0x20] +;;;461 g_tx_ctrl_handle->base_info.src_h = pic_height; +00002a 624d STR r5,[r1,#0x24] +;;;462 +;;;463 //hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); +;;;464 hal_dsi_rx_ctrl_toggle_resolution_ex(g_rx_ctrl_handle); +00002c f7fffffe BL hal_dsi_rx_ctrl_toggle_resolution_ex + |L19.48| +;;;465 +;;;466 #if 0 +;;;467 if (pic_width == 720 && pic_height == 1600) +;;;468 { +;;;469 hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps_1, 88); +;;;470 } +;;;471 else if (pic_width == 1080 && pic_height == 2400) +;;;472 { +;;;473 //hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps_2, 88); +;;;474 } +;;;475 else if (pic_width == 1440 && pic_height == 3200) +;;;476 { +;;;477 //hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps_3, 88);; +;;;478 } +;;;479 #endif +;;;480 //hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); +;;;481 ////TAU_LOGD("resolution update w[%d] h[%d] compress[%d]", pic_width, pic_height, g_rx_ctrl_handle->compress_en); +;;;482 } +;;;483 +;;;484 //TAU_LOGD("PPS Update"); +;;;485 return true; +000030 2001 MOVS r0,#1 +;;;486 } +000032 bd70 POP {r4-r6,pc} +;;;487 + ENDP + + |L19.52| + DCD ||.data|| + + AREA ||i.send_panel_init_code||, CODE, READONLY, ALIGN=1 + + send_panel_init_code PROC +;;;1460 #if PANEL_INIT_CODE_ARRAY +;;;1461 static void send_panel_init_code(uint32_t size, uint8_t * data) +000000 b5f8 PUSH {r3-r7,lr} +;;;1462 { +000002 4607 MOV r7,r0 +000004 460d MOV r5,r1 +;;;1463 uint32_t data_offeset = 0; +000006 2400 MOVS r4,#0 +000008 e009 B |L20.30| + |L20.10| +;;;1464 uint8_t data_type; +;;;1465 uint8_t vc; +;;;1466 uint8_t data_size; +;;;1467 uint8_t * p_data; +;;;1468 +;;;1469 while(data_offeset < size) +;;;1470 { +;;;1471 data_type = data[data_offeset]; +00000a 5d28 LDRB r0,[r5,r4] +;;;1472 vc = data[data_offeset + 1]; +00000c 192b ADDS r3,r5,r4 +00000e 7859 LDRB r1,[r3,#1] +;;;1473 data_size = data[data_offeset + 2]; +000010 789e LDRB r6,[r3,#2] +;;;1474 p_data = &data[data_offeset + 3]; +000012 1cdb ADDS r3,r3,#3 +;;;1475 hal_dsi_tx_ctrl_write_array_cmd(data_type, vc, data_size, p_data); +000014 4632 MOV r2,r6 +000016 f7fffffe BL hal_dsi_tx_ctrl_write_array_cmd +;;;1476 data_offeset = data_offeset + data_size + 3; +00001a 19a4 ADDS r4,r4,r6 +00001c 1ce4 ADDS r4,r4,#3 + |L20.30| +00001e 42bc CMP r4,r7 ;1469 +000020 d3f3 BCC |L20.10| +;;;1477 } +;;;1478 } +000022 bdf8 POP {r3-r7,pc} +;;;1479 + ENDP + + + AREA ||i.soft_timer3_cb||, CODE, READONLY, ALIGN=2 + + soft_timer3_cb PROC +;;;2621 #ifdef ADD_TIMER3_FUNCTION +;;;2622 static void soft_timer3_cb(void *data) +000000 b510 PUSH {r4,lr} +;;;2623 { +;;;2624 hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); +000002 2300 MOVS r3,#0 +000004 4a0a LDR r2,|L21.48| +000006 210a MOVS r1,#0xa +000008 2003 MOVS r0,#3 +00000a f7fffffe BL hal_timer_start +;;;2625 tp_sleep_count++; +00000e 4809 LDR r0,|L21.52| +000010 7801 LDRB r1,[r0,#0] ; tp_sleep_count +000012 1c49 ADDS r1,r1,#1 +000014 7001 STRB r1,[r0,#0] +;;;2626 if (tp_sleep_clk_count < 0xF8) +000016 4908 LDR r1,|L21.56| +000018 7808 LDRB r0,[r1,#0] ; tp_sleep_clk_count +00001a 28f8 CMP r0,#0xf8 +00001c d201 BCS |L21.34| +;;;2627 tp_sleep_clk_count++; +00001e 1c40 ADDS r0,r0,#1 +000020 7008 STRB r0,[r1,#0] + |L21.34| +;;;2628 if(phone_DisplayOFF_count>0) +000022 4906 LDR r1,|L21.60| +000024 8948 LDRH r0,[r1,#0xa] ; phone_DisplayOFF_count +000026 2800 CMP r0,#0 +000028 d001 BEQ |L21.46| +;;;2629 { +;;;2630 phone_DisplayOFF_count++; +00002a 1c40 ADDS r0,r0,#1 +00002c 8148 STRH r0,[r1,#0xa] + |L21.46| +;;;2631 } +;;;2632 +;;;2633 #if AUTO_CAL_TP +;;;2634 if (g_exit_sleep_mode) +;;;2635 { +;;;2636 if (g_cal_cnt > 0) +;;;2637 { +;;;2638 g_cal_cnt--; +;;;2639 if (g_cal_cnt == 0){ +;;;2640 g_calibration_flag = true; +;;;2641 TAU_LOGD("Start cal tp!"); +;;;2642 } +;;;2643 } +;;;2644 } +;;;2645 #endif +;;;2646 } +00002e bd10 POP {r4,pc} +;;;2647 #endif + ENDP + + |L21.48| + DCD soft_timer3_cb + |L21.52| + DCD tp_sleep_count + |L21.56| + DCD tp_sleep_clk_count + |L21.60| + DCD ||.data|| + + AREA ||i.test_pwm_out_adjust||, CODE, READONLY, ALIGN=2 + + test_pwm_out_adjust PROC +;;;579 *****************************************************************************/ +;;;580 static void test_pwm_out_adjust(bool init, bool polarity, uint8_t duty_ratio, uint32_t frequency) +000000 b5ff PUSH {r0-r7,lr} +;;;581 { +000002 b083 SUB sp,sp,#0xc +;;;582 pwm_out_ctrl_e ctl0 = PWMO_CTRL_HIGH; +000004 2502 MOVS r5,#2 +;;;583 pwm_out_ctrl_e ctl1 = PWMO_CTRL_LOW; +000006 2601 MOVS r6,#1 +;;;584 if (polarity) +000008 2900 CMP r1,#0 +00000a d001 BEQ |L22.16| +;;;585 { +;;;586 ctl0 = PWMO_CTRL_LOW; +00000c 2501 MOVS r5,#1 +;;;587 ctl1 = PWMO_CTRL_HIGH; +00000e 2602 MOVS r6,#2 + |L22.16| +;;;588 } +;;;589 uint32_t period = 1000000 / frequency; //λus +000010 4619 MOV r1,r3 +000012 4814 LDR r0,|L22.100| +000014 f7fffffe BL __aeabi_uidivmod +000018 4604 MOV r4,r0 +;;;590 uint32_t thr0 = 0; +00001a 2000 MOVS r0,#0 +00001c 9002 STR r0,[sp,#8] +;;;591 uint32_t thr1 = (period * duty_ratio / 100); +00001e 9905 LDR r1,[sp,#0x14] +000020 4620 MOV r0,r4 +000022 4348 MULS r0,r1,r0 +000024 2164 MOVS r1,#0x64 +000026 f7fffffe BL __aeabi_uidivmod +00002a 4607 MOV r7,r0 +;;;592 +;;;593 if (duty_ratio == 100) +00002c 9805 LDR r0,[sp,#0x14] +00002e 2864 CMP r0,#0x64 +000030 d101 BNE |L22.54| +;;;594 { +;;;595 ctl1 = ctl0; +000032 462e MOV r6,r5 +;;;596 thr1 = period / 2; +000034 0867 LSRS r7,r4,#1 + |L22.54| +;;;597 } +;;;598 if (init) +000036 9803 LDR r0,[sp,#0xc] +000038 2800 CMP r0,#0 +00003a d00a BEQ |L22.82| +;;;599 { +;;;600 hal_pwm_out_init(); +00003c f7fffffe BL hal_pwm_out_init +;;;601 hal_pwm_out_config_all(ctl0, ctl1, thr0, thr1, period); +000040 463b MOV r3,r7 +000042 9400 STR r4,[sp,#0] +000044 4631 MOV r1,r6 +000046 4628 MOV r0,r5 +000048 9a02 LDR r2,[sp,#8] +00004a f7fffffe BL hal_pwm_out_config_all + |L22.78| +;;;602 } +;;;603 else +;;;604 { +;;;605 hal_pwm_out_sync_all(ctl0, ctl1, thr0, thr1, period); +;;;606 } +;;;607 } +00004e b007 ADD sp,sp,#0x1c +000050 bdf0 POP {r4-r7,pc} + |L22.82| +000052 463b MOV r3,r7 ;605 +000054 9400 STR r4,[sp,#0] ;605 +000056 4631 MOV r1,r6 ;605 +000058 4628 MOV r0,r5 ;605 +00005a 9a02 LDR r2,[sp,#8] ;605 +00005c f7fffffe BL hal_pwm_out_sync_all +000060 e7f5 B |L22.78| +;;;608 + ENDP + +000062 0000 DCW 0x0000 + |L22.100| + DCD 0x000f4240 + + AREA ||i.tp_heartbeat_exec||, CODE, READONLY, ALIGN=2 + + tp_heartbeat_exec PROC +;;;2648 +;;;2649 void tp_heartbeat_exec(void) +000000 b570 PUSH {r4-r6,lr} +;;;2650 { +;;;2651 if (s_screen_init_complate) +000002 480e LDR r0,|L23.60| +000004 7800 LDRB r0,[r0,#0] ; s_screen_init_complate +000006 2800 CMP r0,#0 +000008 d007 BEQ |L23.26| +;;;2652 { +;;;2653 if(hal_gpio_get_input_data(IO_PAD_TD_INT)) +00000a 2009 MOVS r0,#9 +00000c f7fffffe BL hal_gpio_get_input_data +000010 2500 MOVS r5,#0 +;;;2654 { +;;;2655 s_heartbeat = 0; +000012 4c0b LDR r4,|L23.64| +000014 2800 CMP r0,#0 ;2653 +000016 d001 BEQ |L23.28| +000018 6225 STR r5,[r4,#0x20] ; s_heartbeat + |L23.26| +;;;2656 } +;;;2657 else +;;;2658 { +;;;2659 if(s_heartbeat < (65536/50)) // 65536*3 = 900ms 65536/50 = 6ms +;;;2660 { +;;;2661 s_heartbeat ++; +;;;2662 }else +;;;2663 { +;;;2664 TAU_LOGD("hb..."); +;;;2665 s_heartbeat = 0; +;;;2666 // ap_tp_st_touch_software_reset(); +;;;2667 ap_tp_st_touch_hardware_reset(); +;;;2668 } +;;;2669 } +;;;2670 } +;;;2671 } +00001a bd70 POP {r4-r6,pc} + |L23.28| +00001c 4909 LDR r1,|L23.68| +00001e 6a20 LDR r0,[r4,#0x20] ;2659 ; s_heartbeat +000020 4288 CMP r0,r1 ;2659 +000022 d202 BCS |L23.42| +000024 1c40 ADDS r0,r0,#1 ;2661 +000026 6220 STR r0,[r4,#0x20] ;2661 ; s_heartbeat +000028 bd70 POP {r4-r6,pc} + |L23.42| +00002a 4a07 LDR r2,|L23.72| +00002c a107 ADR r1,|L23.76| +00002e a00a ADR r0,|L23.88| +000030 f7fffffe BL LOG_printf +000034 6225 STR r5,[r4,#0x20] ;2665 ; s_heartbeat +000036 f7fffffe BL ap_tp_st_touch_hardware_reset +00003a bd70 POP {r4-r6,pc} +;;;2672 + ENDP + + |L23.60| + DCD s_screen_init_complate + |L23.64| + DCD ||.data|| + |L23.68| + DCD 0x0000051e + |L23.72| + DCD 0x00000a68 + |L23.76| +00004c 5331304c DCB "S10Lite_368",0 +000050 6974655f +000054 33363800 + |L23.88| +000058 5b25735d DCB "[%s] (%04d) hb...",0 +00005c 20282530 +000060 34642920 +000064 68622e2e +000068 2e00 +00006a 00 DCB 0 +00006b 00 DCB 0 + + AREA ||i.tx_display_on||, CODE, READONLY, ALIGN=2 + + tx_display_on PROC +;;;2545 +;;;2546 static void tx_display_on(void) +000000 b510 PUSH {r4,lr} +;;;2547 { +;;;2548 init_panel(); +000002 f7fffffe BL init_panel +;;;2549 TAU_LOGD("Pannel init done"); +000006 4a09 LDR r2,|L24.44| +000008 a109 ADR r1,|L24.48| +00000a a00c ADR r0,|L24.60| +00000c f7fffffe BL LOG_printf +;;;2550 hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); +000010 4812 LDR r0,|L24.92| +000012 69c0 LDR r0,[r0,#0x1c] ; g_tx_ctrl_handle +000014 f7fffffe BL hal_dsi_tx_ctrl_start +;;;2551 +;;;2552 delayMs(100); +000018 2064 MOVS r0,#0x64 +00001a f7fffffe BL delayMs +;;;2553 hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); +00001e 2329 MOVS r3,#0x29 +000020 2201 MOVS r2,#1 +000022 2100 MOVS r1,#0 +000024 2005 MOVS r0,#5 +000026 f7fffffe BL hal_dsi_tx_ctrl_write_cmd +;;;2554 } +00002a bd10 POP {r4,pc} +;;;2555 + ENDP + + |L24.44| + DCD 0x000009f5 + |L24.48| +000030 5331304c DCB "S10Lite_368",0 +000034 6974655f +000038 33363800 + |L24.60| +00003c 5b25735d DCB "[%s] (%04d) Pannel init done",0 +000040 20282530 +000044 34642920 +000048 50616e6e +00004c 656c2069 +000050 6e697420 +000054 646f6e65 +000058 00 +000059 00 DCB 0 +00005a 00 DCB 0 +00005b 00 DCB 0 + |L24.92| + DCD ||.data|| + + AREA ||i.tx_panel_reset||, CODE, READONLY, ALIGN=1 + + tx_panel_reset PROC +;;;1443 +;;;1444 static void tx_panel_reset(void) +000000 b510 PUSH {r4,lr} +;;;1445 { +;;;1446 #ifdef USE_WL518_INTERNAL_FLASH +;;;1447 hal_system_share_flash_mode(true); +;;;1448 #endif +;;;1449 hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); +000002 2001 MOVS r0,#1 +000004 f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin +;;;1450 delayMs(10); //10ms +000008 200a MOVS r0,#0xa +00000a f7fffffe BL delayMs +;;;1451 hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW); +00000e 2000 MOVS r0,#0 +000010 f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin +;;;1452 delayMs(10); //10ms +000014 200a MOVS r0,#0xa +000016 f7fffffe BL delayMs +;;;1453 hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); +00001a 2001 MOVS r0,#1 +00001c f7fffffe BL hal_dsi_tx_ctrl_panel_reset_pin +;;;1454 delayMs(10); +000020 200a MOVS r0,#0xa +000022 f7fffffe BL delayMs +;;;1455 } +000026 bd10 POP {r4,pc} +;;;1456 + ENDP + + + AREA ||.constdata||, DATA, READONLY, ALIGN=2 + + g_cus_rx_dcs_execute_table + DCD 0x00000029 + DCD ap_set_display_on +000008 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000028 + DCD ap_set_display_off +000014 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x000000df + DCD ap_get_reg_df +000020 00000000 DCB 0x00,0x00,0x00,0x00 + DCD 0x00000051 + DCD ap_set_backlight_51 +00002c 00000000 DCB 0x00,0x00,0x00,0x00 + DCD 0x00000060 + DCD ap_update_frame_rate +000038 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000053 + DCD ap_get_reg_53 +000044 00000000 DCB 0x00,0x00,0x00,0x00 + DCD 0x0000007a + DCD ap_get_reg_7A +000050 00000000 DCB 0x00,0x00,0x00,0x00 + DCD 0x00000004 + DCD ap_set_tp_calibration_04 +00005c 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000010 + DCD ap_set_enter_sleep_mode +000068 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000011 + DCD ap_set_exit_sleep_mode +000074 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000000 + DCD 0x00000000 +000080 00000000 DCB 0x00,0x00,0x00,0x00 + panel_init_code +000084 390006f0 DCB 0x39,0x00,0x06,0xf0 +000088 55aa5208 DCB 0x55,0xaa,0x52,0x08 +00008c 00390009 DCB 0x00,0x39,0x00,0x09 +000090 ba027900 DCB 0xba,0x02,0x79,0x00 +000094 14039c00 DCB 0x14,0x03,0x9c,0x00 +000098 01390002 DCB 0x01,0x39,0x00,0x02 +00009c 6f083900 DCB 0x6f,0x08,0x39,0x00 +0000a0 09ba01af DCB 0x09,0xba,0x01,0xaf +0000a4 0014001c DCB 0x00,0x14,0x00,0x1c +0000a8 00003900 DCB 0x00,0x00,0x39,0x00 +0000ac 026f1039 DCB 0x02,0x6f,0x10,0x39 +0000b0 0008ba01 DCB 0x00,0x08,0xba,0x01 +0000b4 66001400 DCB 0x66,0x00,0x14,0x00 +0000b8 1c003900 DCB 0x1c,0x00,0x39,0x00 +0000bc 09bb0279 DCB 0x09,0xbb,0x02,0x79 +0000c0 0014039c DCB 0x00,0x14,0x03,0x9c +0000c4 00213900 DCB 0x00,0x21,0x39,0x00 +0000c8 02b58439 DCB 0x02,0xb5,0x84,0x39 +0000cc 00026f06 DCB 0x00,0x02,0x6f,0x06 +0000d0 390004b5 DCB 0x39,0x00,0x04,0xb5 +0000d4 2b0c3339 DCB 0x2b,0x0c,0x33,0x39 +0000d8 00026f0b DCB 0x00,0x02,0x6f,0x0b +0000dc 390004b5 DCB 0x39,0x00,0x04,0xb5 +0000e0 2b233339 DCB 0x2b,0x23,0x33,0x39 +0000e4 00026f10 DCB 0x00,0x02,0x6f,0x10 +0000e8 390006b5 DCB 0x39,0x00,0x06,0xb5 +0000ec 0c0c0c0c DCB 0x0c,0x0c,0x0c,0x0c +0000f0 0c390002 DCB 0x0c,0x39,0x00,0x02 +0000f4 6f013900 DCB 0x6f,0x01,0x39,0x00 +0000f8 02b61939 DCB 0x02,0xb6,0x19,0x39 +0000fc 0013b799 DCB 0x00,0x13,0xb7,0x99 +000100 99999999 DCB 0x99,0x99,0x99,0x99 +000104 99876543 DCB 0x99,0x87,0x65,0x43 +000108 32100000 DCB 0x32,0x10,0x00,0x00 +00010c 00000000 DCB 0x00,0x00,0x00,0x00 +000110 00390002 DCB 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0x01,0x2c,0x01,0x2c +002634 012c012c DCB 0x01,0x2c,0x01,0x2c +002638 012c012c DCB 0x01,0x2c,0x01,0x2c +00263c 01000100 DCB 0x01,0x00,0x01,0x00 +002640 3900026f DCB 0x39,0x00,0x02,0x6f +002644 30390011 DCB 0x30,0x39,0x00,0x11 +002648 bb010001 DCB 0xbb,0x01,0x00,0x01 +00264c 00012c01 DCB 0x00,0x01,0x2c,0x01 +002650 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +002654 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +002658 2c390002 DCB 0x2c,0x39,0x00,0x02 +00265c 6f403900 DCB 0x6f,0x40,0x39,0x00 +002660 11bb012c DCB 0x11,0xbb,0x01,0x2c +002664 012c012c DCB 0x01,0x2c,0x01,0x2c +002668 01000100 DCB 0x01,0x00,0x01,0x00 +00266c 01000100 DCB 0x01,0x00,0x01,0x00 +002670 012c3900 DCB 0x01,0x2c,0x39,0x00 +002674 026f5039 DCB 0x02,0x6f,0x50,0x39 +002678 0011bb01 DCB 0x00,0x11,0xbb,0x01 +00267c 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +002680 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +002684 2c012c01 DCB 0x2c,0x01,0x2c,0x01 +002688 2c012c39 DCB 0x2c,0x01,0x2c,0x39 +00268c 00026f60 DCB 0x00,0x02,0x6f,0x60 +002690 390011bb DCB 0x39,0x00,0x11,0xbb +002694 01000100 DCB 0x01,0x00,0x01,0x00 +002698 01000100 DCB 0x01,0x00,0x01,0x00 +00269c 01000100 DCB 0x01,0x00,0x01,0x00 +0026a0 01000100 DCB 0x01,0x00,0x01,0x00 +0026a4 3900026f DCB 0x39,0x00,0x02,0x6f +0026a8 70390011 DCB 0x70,0x39,0x00,0x11 +0026ac bb010001 DCB 0xbb,0x01,0x00,0x01 +0026b0 00010001 DCB 0x00,0x01,0x00,0x01 +0026b4 00010001 DCB 0x00,0x01,0x00,0x01 +0026b8 00010001 DCB 0x00,0x01,0x00,0x01 +0026bc 00390002 DCB 0x00,0x39,0x00,0x02 +0026c0 6f803900 DCB 0x6f,0x80,0x39,0x00 +0026c4 11bb0100 DCB 0x11,0xbb,0x01,0x00 +0026c8 08000000 DCB 0x08,0x00,0x00,0x00 +0026cc 00000000 DCB 0x00,0x00,0x00,0x00 +0026d0 00000000 DCB 0x00,0x00,0x00,0x00 +0026d4 00003900 DCB 0x00,0x00,0x39,0x00 +0026d8 026f9039 DCB 0x02,0x6f,0x90,0x39 +0026dc 0011bb00 DCB 0x00,0x11,0xbb,0x00 +0026e0 00000000 DCB 0x00,0x00,0x00,0x00 +0026e4 00000000 DCB 0x00,0x00,0x00,0x00 +0026e8 00000000 DCB 0x00,0x00,0x00,0x00 +0026ec 10101039 DCB 0x10,0x10,0x10,0x39 +0026f0 00026fa0 DCB 0x00,0x02,0x6f,0xa0 +0026f4 390005bb DCB 0x39,0x00,0x05,0xbb +0026f8 80808000 DCB 0x80,0x80,0x80,0x00 +0026fc 390002ee DCB 0x39,0x00,0x02,0xee +002700 05390005 DCB 0x05,0x39,0x00,0x05 +002704 ffaa55a5 DCB 0xff,0xaa,0x55,0xa5 +002708 80390002 DCB 0x80,0x39,0x00,0x02 +00270c 6f1d3900 DCB 0x6f,0x1d,0x39,0x00 +002710 02f20539 DCB 0x02,0xf2,0x05,0x39 +002714 00053b00 DCB 0x00,0x05,0x3b,0x00 +002718 14001239 DCB 0x14,0x00,0x12,0x39 +00271c 00020301 DCB 0x00,0x02,0x03,0x01 +002720 39000290 DCB 0x39,0x00,0x02,0x90 +002724 02390013 DCB 0x02,0x39,0x00,0x13 +002728 91892800 DCB 0x91,0x89,0x28,0x00 +00272c 0cc20003 DCB 0x0c,0xc2,0x00,0x03 +002730 1c017e00 DCB 0x1c,0x01,0x7e,0x00 +002734 0f08bb04 DCB 0x0f,0x08,0xbb,0x04 +002738 3d10f039 DCB 0x3d,0x10,0xf0,0x39 +00273c 00012c39 DCB 0x00,0x01,0x2c,0x39 +002740 00055107 DCB 0x00,0x05,0x51,0x07 +002744 ff0fff39 DCB 0xff,0x0f,0xff,0x39 +002748 00025320 DCB 0x00,0x02,0x53,0x20 +00274c 39000135 DCB 0x39,0x00,0x01,0x35 +002750 3900052a DCB 0x39,0x00,0x05,0x2a +002754 00000437 DCB 0x00,0x00,0x04,0x37 +002758 3900052b DCB 0x39,0x00,0x05,0x2b +00275c 0000095f DCB 0x00,0x00,0x09,0x5f +002760 3900022f DCB 0x39,0x00,0x02,0x2f +002764 01390006 DCB 0x01,0x39,0x00,0x06 +002768 f055aa52 DCB 0xf0,0x55,0xaa,0x52 +00276c 08073900 DCB 0x08,0x07,0x39,0x00 +002770 0fc00101 DCB 0x0f,0xc0,0x01,0x01 +002774 00005500 DCB 0x00,0x00,0x55,0x00 +002778 00000000 DCB 0x00,0x00,0x00,0x00 +00277c 00000000 DCB 0x00,0x00,0x00,0x00 +002780 3900026f DCB 0x39,0x00,0x02,0x6f +002784 00390016 DCB 0x00,0x39,0x00,0x16 +002788 c921002a DCB 0xc9,0x21,0x00,0x2a +00278c 402a4000 DCB 0x40,0x2a,0x40,0x00 +002790 003fddac DCB 0x00,0x3f,0xdd,0xac +002794 003fddac DCB 0x00,0x3f,0xdd,0xac +002798 008006f9 DCB 0x00,0x80,0x06,0xf9 +00279c 10003900 DCB 0x10,0x00,0x39,0x00 +0027a0 026f1539 DCB 0x02,0x6f,0x15,0x39 +0027a4 0010c961 DCB 0x00,0x10,0xc9,0x61 +0027a8 b4b0721c DCB 0xb4,0xb0,0x72,0x1c +0027ac 1833e02a DCB 0x18,0x33,0xe0,0x2a +0027b0 400f9898 DCB 0x40,0x0f,0x98,0x98 +0027b4 00003900 DCB 0x00,0x00,0x39,0x00 +0027b8 026f2439 DCB 0x02,0x6f,0x24,0x39 +0027bc 0008c900 DCB 0x00,0x08,0xc9,0x00 +0027c0 00000000 DCB 0x00,0x00,0x00,0x00 +0027c4 00003900 DCB 0x00,0x00,0x39,0x00 +0027c8 026f0039 DCB 0x02,0x6f,0x00,0x39 +0027cc 0016ca27 DCB 0x00,0x16,0xca,0x27 +0027d0 002a402a DCB 0x00,0x2a,0x40,0x2a +0027d4 40000000 DCB 0x40,0x00,0x00,0x00 +0027d8 0000003f DCB 0x00,0x00,0x00,0x3f +0027dc ddac0080 DCB 0xdd,0xac,0x00,0x80 +0027e0 00000000 DCB 0x00,0x00,0x00,0x00 +0027e4 3900026f DCB 0x39,0x00,0x02,0x6f +0027e8 15390010 DCB 0x15,0x39,0x00,0x10 +0027ec ca621db0 DCB 0xca,0x62,0x1d,0xb0 +0027f0 72851833 DCB 0x72,0x85,0x18,0x33 +0027f4 e0000003 DCB 0xe0,0x00,0x00,0x03 +0027f8 68980000 DCB 0x68,0x98,0x00,0x00 +0027fc 3900026f DCB 0x39,0x00,0x02,0x6f +002800 24390008 DCB 0x24,0x39,0x00,0x08 +002804 ca000000 DCB 0xca,0x00,0x00,0x00 +002808 00000000 DCB 0x00,0x00,0x00,0x00 +00280c 3900026f DCB 0x39,0x00,0x02,0x6f +002810 00390016 DCB 0x00,0x39,0x00,0x16 +002814 cb2d002a DCB 0xcb,0x2d,0x00,0x2a +002818 402a4000 DCB 0x40,0x2a,0x40,0x00 +00281c 003fddac DCB 0x00,0x3f,0xdd,0xac +002820 00800000 DCB 0x00,0x80,0x00,0x00 +002824 00000000 DCB 0x00,0x00,0x00,0x00 +002828 00003900 DCB 0x00,0x00,0x39,0x00 +00282c 026f1539 DCB 0x02,0x6f,0x15,0x39 +002830 0010cb71 DCB 0x00,0x10,0xcb,0x71 +002834 b419721c DCB 0xb4,0x19,0x72,0x1c +002838 81339000 DCB 0x81,0x33,0x90,0x00 +00283c 000c9868 DCB 0x00,0x0c,0x98,0x68 +002840 00003900 DCB 0x00,0x00,0x39,0x00 +002844 026f2439 DCB 0x02,0x6f,0x24,0x39 +002848 0008cb00 DCB 0x00,0x08,0xcb,0x00 +00284c 00000000 DCB 0x00,0x00,0x00,0x00 +002850 00003900 DCB 0x00,0x00,0x39,0x00 +002854 026f0039 DCB 0x02,0x6f,0x00,0x39 +002858 0016cc2b DCB 0x00,0x16,0xcc,0x2b +00285c 002a402a DCB 0x00,0x2a,0x40,0x2a +002860 40000000 DCB 0x40,0x00,0x00,0x00 +002864 00000080 DCB 0x00,0x00,0x00,0x80 +002868 0000007f DCB 0x00,0x00,0x00,0x7f +00286c f906f000 DCB 0xf9,0x06,0xf0,0x00 +002870 3900026f DCB 0x39,0x00,0x02,0x6f +002874 15390010 DCB 0x15,0x39,0x00,0x10 +002878 cc721d19 DCB 0xcc,0x72,0x1d,0x19 +00287c 72858133 DCB 0x72,0x85,0x81,0x33 +002880 9fd5c000 DCB 0x9f,0xd5,0xc0,0x00 +002884 68680000 DCB 0x68,0x68,0x00,0x00 +002888 3900026f DCB 0x39,0x00,0x02,0x6f +00288c 24390008 DCB 0x24,0x39,0x00,0x08 +002890 cc000000 DCB 0xcc,0x00,0x00,0x00 +002894 00000000 DCB 0x00,0x00,0x00,0x00 +002898 390006f0 DCB 0x39,0x00,0x06,0xf0 +00289c 55aa5208 DCB 0x55,0xaa,0x52,0x08 +0028a0 02390002 DCB 0x02,0x39,0x00,0x02 +0028a4 6f083900 DCB 0x6f,0x08,0x39,0x00 +0028a8 03d004e4 DCB 0x03,0xd0,0x04,0xe4 +0028ac 3900026f DCB 0x39,0x00,0x02,0x6f +0028b0 0a390003 DCB 0x0a,0x39,0x00,0x03 +0028b4 d009c039 DCB 0xd0,0x09,0xc0,0x39 +0028b8 00026f0c DCB 0x00,0x02,0x6f,0x0c +0028bc 390003d0 DCB 0x39,0x00,0x03,0xd0 +0028c0 06c03900 DCB 0x06,0xc0,0x39,0x00 +0028c4 02d14139 DCB 0x02,0xd1,0x41,0x39 +0028c8 00026f01 DCB 0x00,0x02,0x6f,0x01 +0028cc 390002d1 DCB 0x39,0x00,0x02,0xd1 +0028d0 00390002 DCB 0x00,0x39,0x00,0x02 +0028d4 6f023900 DCB 0x6f,0x02,0x39,0x00 +0028d8 02d10039 DCB 0x02,0xd1,0x00,0x39 +0028dc 00026f03 DCB 0x00,0x02,0x6f,0x03 +0028e0 390005d1 DCB 0x39,0x00,0x05,0xd1 +0028e4 021e0719 DCB 0x02,0x1e,0x07,0x19 +0028e8 3900026f DCB 0x39,0x00,0x02,0x6f +0028ec 07390005 DCB 0x07,0x39,0x00,0x05 +0028f0 d101b006 DCB 0xd1,0x01,0xb0,0x06 +0028f4 b0390002 DCB 0xb0,0x39,0x00,0x02 +0028f8 6f0b3900 DCB 0x6f,0x0b,0x39,0x00 +0028fc 05d10288 DCB 0x05,0xd1,0x02,0x88 +002900 07813900 DCB 0x07,0x81,0x39,0x00 +002904 026f0f39 DCB 0x02,0x6f,0x0f,0x39 +002908 0007d13f DCB 0x00,0x07,0xd1,0x3f +00290c ff200030 DCB 0xff,0x20,0x00,0x30 +002910 00390006 DCB 0x00,0x39,0x00,0x06 +002914 f055aa52 DCB 0xf0,0x55,0xaa,0x52 +002918 08003900 DCB 0x08,0x00,0x39,0x00 +00291c 026f1739 DCB 0x02,0x6f,0x17,0x39 +002920 0003b207 DCB 0x00,0x03,0xb2,0x07 +002924 ff390002 DCB 0xff,0x39,0x00,0x02 +002928 6f1f3900 DCB 0x6f,0x1f,0x39,0x00 +00292c 03b20050 DCB 0x03,0xb2,0x00,0x50 +002930 39000288 DCB 0x39,0x00,0x02,0x88 +002934 01390002 DCB 0x01,0x39,0x00,0x02 +002938 6f013900 DCB 0x6f,0x01,0x39,0x00 +00293c 0588021d DCB 0x05,0x88,0x02,0x1d +002940 08393900 DCB 0x08,0x39,0x39,0x00 +002944 06f055aa DCB 0x06,0xf0,0x55,0xaa +002948 52080039 DCB 0x52,0x08,0x00,0x39 +00294c 0002c077 DCB 0x00,0x02,0xc0,0x77 +002950 39000351 DCB 0x39,0x00,0x03,0x51 +002954 0300 DCB 0x03,0x00 + + AREA ||.data||, DATA, ALIGN=2 + + g_need_enter_sleep_mode +000000 00 DCB 0x00 + hbm_mode +000001 00 DCB 0x00 + hbm_mode_cnt +000002 00 DCB 0x00 + start_display_on +000003 01 DCB 0x01 + g_exit_sleep_mode +000004 00 DCB 0x00 + panel_display_done +000005 00 DCB 0x00 + phone_start_flag +000006 00 DCB 0x00 + phone_DisplayOFF_flag +000007 00 DCB 0x00 + R60_Parma_backup +000008 00 DCB 0x00 + panel_mode +000009 01 DCB 0x01 + phone_DisplayOFF_count +00000a 0000 DCW 0x0000 + read_bl_data +00000c 0000 DCW 0x0000 + read_bl_data_bak +00000e 0000 DCW 0x0000 + rd_51_val2 +000010 0000 DCB 0x00,0x00 + panel_r +000012 0000 DCB 0x00,0x00 + panel_g +000014 0000 DCB 0x00,0x00 + panel_b +000016 0000 DCB 0x00,0x00 + g_rx_ctrl_handle + DCD 0x00000000 + g_tx_ctrl_handle + DCD 0x00000000 + s_heartbeat + DCD 0x00000000 + value_reg_df + DCD 0x00000000 + rx_filter_1080_h_4_96 + DCD 0xb029ec0a + DCD 0x0000000f + DCD 0x904df003 + DCD 0x0000000f + DCD 0x6871f9fb + DCD 0x0000000f + DCD 0x4899fbf4 + DCD 0x0000000f + DCD 0x28c1fded + DCD 0x0000000f + DCD 0x08edfbe7 + DCD 0x0000000f + DCD 0xe119fde0 + DCD 0x0000000e + DCD 0xc145f9db + DCD 0x0000000e + DCD 0xa175f3d6 + DCD 0x0000000e + DCD 0x81a9ebd1 + DCD 0x0000000e + DCD 0x69d9e1cd + DCD 0x0000000e + DCD 0x520dd5c9 + DCD 0x0000000e + DCD 0x3a3dc7c7 + DCD 0x0000000e + DCD 0x2a71b7c4 + DCD 0x0000000e + DCD 0x1a9da7c3 + DCD 0x0000000e + DCD 0x12cd93c2 + DCD 0x0000000e + DCD 0x12f97dc2 + DCD 0x0000000e + DCD 0x132567c2 + DCD 0x0000000e + DCD 0x1b4d4fc3 + DCD 0x0000000e + DCD 0x236d39c5 + DCD 0x0000000e + DCD 0x3b8d1fc7 + DCD 0x0000000e + DCD 0x4ba907ca + DCD 0x0000000e + DCD 0x6bc0edcd + DCD 0x0000000e + DCD 0x8bd4d5d0 + DCD 0x0000000e + DCD 0xb3e4bbd4 + DCD 0x0000000e + DCD 0xdbf0a3d8 + DCD 0x0000000e + DCD 0x03f88ddc + DCD 0x0000000f + DCD 0x3bf477e1 + DCD 0x0000000f + DCD 0x6bf861e5 + DCD 0x0000000f + DCD 0xa3f44de9 + DCD 0x0000000f + DCD 0xdbf039ed + DCD 0x0000000f + DCD 0x1be027f2 + DCD 0x00000000 + rx_filter_2400_v_4_96 + DCD 0xb029ec0a + DCD 0x0000000f + DCD 0x904df003 + DCD 0x0000000f + DCD 0x6871f9fb + DCD 0x0000000f + DCD 0x4899fbf4 + DCD 0x0000000f + DCD 0x28c1fded + DCD 0x0000000f + DCD 0x08edfbe7 + DCD 0x0000000f + DCD 0xe119fde0 + DCD 0x0000000e + DCD 0xc145f9db + DCD 0x0000000e + DCD 0xa175f3d6 + DCD 0x0000000e + DCD 0x81a9ebd1 + DCD 0x0000000e + DCD 0x69d9e1cd + DCD 0x0000000e + DCD 0x520dd5c9 + DCD 0x0000000e + DCD 0x3a3dc7c7 + DCD 0x0000000e + DCD 0x2a71b7c4 + DCD 0x0000000e + DCD 0x1a9da7c3 + DCD 0x0000000e + DCD 0x12cd93c2 + DCD 0x0000000e + DCD 0x12f97dc2 + DCD 0x0000000e + DCD 0x132567c2 + DCD 0x0000000e + DCD 0x1b4d4fc3 + DCD 0x0000000e + DCD 0x236d39c5 + DCD 0x0000000e + DCD 0x3b8d1fc7 + DCD 0x0000000e + DCD 0x4ba907ca + DCD 0x0000000e + DCD 0x6bc0edcd + DCD 0x0000000e + DCD 0x8bd4d5d0 + DCD 0x0000000e + DCD 0xb3e4bbd4 + DCD 0x0000000e + DCD 0xdbf0a3d8 + DCD 0x0000000e + DCD 0x03f88ddc + DCD 0x0000000f + DCD 0x3bf477e1 + DCD 0x0000000f + DCD 0x6bf861e5 + DCD 0x0000000f + DCD 0xa3f44de9 + DCD 0x0000000f + DCD 0xdbf039ed + DCD 0x0000000f + DCD 0x1be027f2 + DCD 0x00000000 + + AREA ||area_number.30||, DATA, ALIGN=1 + + EXPORTAS ||area_number.30||, ||.data|| + value_reg_b1 +000000 0000 DCW 0x0000 + + AREA ||area_number.31||, DATA, ALIGN=1 + + EXPORTAS ||area_number.31||, ||.data|| + value_reg_ca +000000 0000 DCW 0x0000 + + AREA ||area_number.32||, DATA, ALIGN=1 + + EXPORTAS ||area_number.32||, ||.data|| + value_reg_ca_bak +000000 0000 DCW 0x0000 + + AREA ||area_number.33||, DATA, ALIGN=1 + + EXPORTAS ||area_number.33||, ||.data|| + value_reg_b1_bak +000000 0000 DCW 0x0000 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\demo\\ap_demo.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___9_ap_demo_c_c64640cd____REV16| +#line 467 "C:\\Keil_v5\\ARM\\PACK\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___9_ap_demo_c_c64640cd____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___9_ap_demo_c_c64640cd____REVSH| +#line 482 +|__asm___9_ap_demo_c_c64640cd____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/ISP_368/Listings/app_tp_for_custom_s8.txt b/project/ISP_368/Listings/app_tp_for_custom_s8.txt new file mode 100644 index 0000000..b581a05 --- /dev/null +++ b/project/ISP_368/Listings/app_tp_for_custom_s8.txt @@ -0,0 +1,4745 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\app_tp_for_custom_s8.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\app_tp_for_custom_s8.d --cpu=Cortex-M0 --apcs=interwork -O1 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL368 -I.\RTE\_ISP_368 -IC:\Users\ASUS\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Users\ASUS\AppData\Local\Arm\Packs\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_368 --omf_browse=.\objects\app_tp_for_custom_s8.crf ..\..\src\app\demo\app_tp_for_custom_s8.c] + THUMB + + AREA ||i.app_tp_phone_analysis_data||, CODE, READONLY, ALIGN=2 + + app_tp_phone_analysis_data PROC +;;;496 **************************************************************************/ +;;;497 void app_tp_phone_analysis_data(uint8_t *rxbuffer, size_t rxbuffer_size, const uint8_t **txbuffer, size_t *txbuffer_size) +000000 b5f8 PUSH {r3-r7,lr} +;;;498 { +000002 4606 MOV r6,r0 +000004 460f MOV r7,r1 +000006 4614 MOV r4,r2 +000008 461d MOV r5,r3 +;;;499 #ifdef USE_FOR_SUMSUNG_S21U +;;;500 // static uint8_t phone_60_flag =0; +;;;501 static uint8_t phone_85_flag =0; +;;;502 // static uint8_t phone_F6_flag =0; +;;;503 static uint8_t phone_E4_flag =0; +;;;504 static uint8_t phone_72_flag =0; +;;;505 static uint8_t phone_75_flag =0; +;;;506 static uint8_t phone_92_flag =0; +;;;507 static uint8_t phone_74_flag =0; +;;;508 +;;;509 if( (rxbuffer_size ==2) &&(rxbuffer[0] ==0xE4)) +00000a 2f02 CMP r7,#2 +00000c d10b BNE |L1.38| +00000e 7830 LDRB r0,[r6,#0] +000010 28e4 CMP r0,#0xe4 +000012 d108 BNE |L1.38| +;;;510 { +;;;511 phone_E4_flag++; +000014 48ec LDR r0,|L1.968| +000016 7b81 LDRB r1,[r0,#0xe] ; phone_E4_flag +000018 1c49 ADDS r1,r1,#1 +00001a 7381 STRB r1,[r0,#0xe] +;;;512 phone_data_E4[0] =rxbuffer[1]; +00001c 7872 LDRB r2,[r6,#1] +00001e 4601 MOV r1,r0 +000020 700a STRB r2,[r1,#0] +;;;513 tp_sleep_in=0; +000022 2100 MOVS r1,#0 +000024 70c1 STRB r1,[r0,#3] + |L1.38| +;;;514 } +;;;515 if( (rxbuffer_size ==3) &&(rxbuffer[0] ==0x85)) +000026 2f03 CMP r7,#3 +000028 d105 BNE |L1.54| +00002a 7830 LDRB r0,[r6,#0] +00002c 2885 CMP r0,#0x85 +00002e d102 BNE |L1.54| +;;;516 { +;;;517 phone_85_flag=rxbuffer[1]; +000030 48e5 LDR r0,|L1.968| +000032 7871 LDRB r1,[r6,#1] +000034 7341 STRB r1,[r0,#0xd] + |L1.54| +;;;518 } +;;;519 if( (rxbuffer_size ==3) &&(rxbuffer[0] ==0xAE)&&(rxbuffer[1] ==0xA3)) +000036 2f03 CMP r7,#3 +000038 d10a BNE |L1.80| +00003a 7830 LDRB r0,[r6,#0] +00003c 28ae CMP r0,#0xae +00003e d107 BNE |L1.80| +000040 7870 LDRB r0,[r6,#1] +000042 28a3 CMP r0,#0xa3 +000044 d104 BNE |L1.80| +;;;520 { +;;;521 hal_gpio_set_output_data(g_phone_output_int_pad, IO_LVL_LOW); +000046 48e0 LDR r0,|L1.968| +000048 2100 MOVS r1,#0 +00004a 7880 LDRB r0,[r0,#2] ; g_phone_output_int_pad +00004c f7fffffe BL hal_gpio_set_output_data + |L1.80| +;;;522 } +;;;523 if( (rxbuffer_size ==2) &&(rxbuffer[0] ==0x70)) +000050 2f02 CMP r7,#2 +000052 d105 BNE |L1.96| +000054 7830 LDRB r0,[r6,#0] +000056 2870 CMP r0,#0x70 +000058 d102 BNE |L1.96| +;;;524 { +;;;525 phone_72_flag=rxbuffer[1]; +00005a 48db LDR r0,|L1.968| +00005c 7871 LDRB r1,[r6,#1] +00005e 73c1 STRB r1,[r0,#0xf] + |L1.96| +;;;526 } +;;;527 if( (rxbuffer_size ==2) &&(rxbuffer[0] ==0x7D)) +;;;528 { +;;;529 phone_75_flag=rxbuffer[1]; +;;;530 if((phone_74_flag==0x02)&&(phone_75_flag==0x01)) +;;;531 { +;;;532 phone_75_flag=0x04; +000060 2204 MOVS r2,#4 +000062 2f02 CMP r7,#2 ;527 +000064 d13b BNE |L1.222| +000066 7830 LDRB r0,[r6,#0] ;527 +000068 287d CMP r0,#0x7d ;527 +00006a d138 BNE |L1.222| +00006c 4bd6 LDR r3,|L1.968| +00006e 7870 LDRB r0,[r6,#1] ;529 +000070 7418 STRB r0,[r3,#0x10] ;529 +000072 7c99 LDRB r1,[r3,#0x12] ;530 ; phone_74_flag +000074 2902 CMP r1,#2 ;530 +000076 d101 BNE |L1.124| +000078 2801 CMP r0,#1 ;530 +00007a d002 BEQ |L1.130| + |L1.124| +;;;533 } +;;;534 else if((phone_74_flag==0x03)&&(phone_75_flag==0x01)) +00007c 2903 CMP r1,#3 +00007e d002 BEQ |L1.134| +000080 e003 B |L1.138| + |L1.130| +000082 741a STRB r2,[r3,#0x10] ;532 +000084 e02b B |L1.222| + |L1.134| +000086 2801 CMP r0,#1 +000088 d002 BEQ |L1.144| + |L1.138| +;;;535 { +;;;536 phone_75_flag=0x05; +;;;537 } +;;;538 else if((phone_74_flag==0x03)&&(phone_75_flag==0x01)) +00008a 2903 CMP r1,#3 +00008c d003 BEQ |L1.150| +00008e e004 B |L1.154| + |L1.144| +000090 2005 MOVS r0,#5 ;536 +000092 7418 STRB r0,[r3,#0x10] ;536 +000094 e023 B |L1.222| + |L1.150| +000096 2801 CMP r0,#1 +000098 d002 BEQ |L1.160| + |L1.154| +;;;539 { +;;;540 phone_75_flag=0x06; +;;;541 } +;;;542 else if((phone_74_flag==0x03)&&(phone_75_flag==0x03)) +00009a 2903 CMP r1,#3 +00009c d003 BEQ |L1.166| +00009e e004 B |L1.170| + |L1.160| +0000a0 2006 MOVS r0,#6 ;540 +0000a2 7418 STRB r0,[r3,#0x10] ;540 +0000a4 e01b B |L1.222| + |L1.166| +0000a6 2803 CMP r0,#3 +0000a8 d002 BEQ |L1.176| + |L1.170| +;;;543 { +;;;544 phone_75_flag=0x07; +;;;545 } +;;;546 else if((phone_74_flag==0x01)&&(phone_75_flag==0x07)) +0000aa 2901 CMP r1,#1 +0000ac d003 BEQ |L1.182| +0000ae e004 B |L1.186| + |L1.176| +0000b0 2007 MOVS r0,#7 ;544 +0000b2 7418 STRB r0,[r3,#0x10] ;544 +0000b4 e013 B |L1.222| + |L1.182| +0000b6 2807 CMP r0,#7 +0000b8 d002 BEQ |L1.192| + |L1.186| +;;;547 { +;;;548 phone_75_flag=0x09; +;;;549 } +;;;550 else if((phone_74_flag==0x02)&&(phone_75_flag==0x07)) +0000ba 2902 CMP r1,#2 +0000bc d003 BEQ |L1.198| +0000be e004 B |L1.202| + |L1.192| +0000c0 2009 MOVS r0,#9 ;548 +0000c2 7418 STRB r0,[r3,#0x10] ;548 +0000c4 e00b B |L1.222| + |L1.198| +0000c6 2807 CMP r0,#7 +0000c8 d002 BEQ |L1.208| + |L1.202| +;;;551 { +;;;552 phone_75_flag=0x08; +;;;553 } +;;;554 else if((phone_74_flag==0x03)&&(phone_75_flag==0x07)) +0000ca 2903 CMP r1,#3 +0000cc d003 BEQ |L1.214| +0000ce e006 B |L1.222| + |L1.208| +0000d0 2008 MOVS r0,#8 ;552 +0000d2 7418 STRB r0,[r3,#0x10] ;552 +0000d4 e003 B |L1.222| + |L1.214| +0000d6 2807 CMP r0,#7 +0000d8 d101 BNE |L1.222| +;;;555 { +;;;556 phone_75_flag=0x10; +0000da 2010 MOVS r0,#0x10 +0000dc 7418 STRB r0,[r3,#0x10] + |L1.222| +;;;557 } +;;;558 } +;;;559 if( (rxbuffer_size ==2) &&(rxbuffer[0] ==0x74)) +0000de 2f02 CMP r7,#2 +0000e0 d105 BNE |L1.238| +0000e2 7830 LDRB r0,[r6,#0] +0000e4 2874 CMP r0,#0x74 +0000e6 d102 BNE |L1.238| +;;;560 { +;;;561 phone_74_flag=rxbuffer[1]; +0000e8 48b7 LDR r0,|L1.968| +0000ea 7871 LDRB r1,[r6,#1] +0000ec 7481 STRB r1,[r0,#0x12] + |L1.238| +;;;562 } +;;;563 +;;;564 if( (rxbuffer_size ==2) &&(rxbuffer[0] ==0xEA)) +0000ee 2f02 CMP r7,#2 +0000f0 d105 BNE |L1.254| +0000f2 7830 LDRB r0,[r6,#0] +0000f4 28ea CMP r0,#0xea +0000f6 d102 BNE |L1.254| +;;;565 { +;;;566 Flag_EA_EN=rxbuffer[1]; +0000f8 48b3 LDR r0,|L1.968| +0000fa 7871 LDRB r1,[r6,#1] +0000fc 71c1 STRB r1,[r0,#7] + |L1.254| +;;;567 } +;;;568 if( (rxbuffer_size ==3) &&(rxbuffer[0] ==0x92)) +0000fe 2f03 CMP r7,#3 +000100 d105 BNE |L1.270| +000102 7830 LDRB r0,[r6,#0] +000104 2892 CMP r0,#0x92 +000106 d102 BNE |L1.270| +;;;569 { +;;;570 phone_92_flag=rxbuffer[1]; +000108 48af LDR r0,|L1.968| +00010a 7871 LDRB r1,[r6,#1] +00010c 7441 STRB r1,[r0,#0x11] + |L1.270| +;;;571 } +;;;572 if((rxbuffer[0] ==0x9B)&&(rxbuffer[1] ==0x02)) +00010e 7830 LDRB r0,[r6,#0] +000110 2101 MOVS r1,#1 ;512 +000112 289b CMP r0,#0x9b +000114 d104 BNE |L1.288| +000116 7870 LDRB r0,[r6,#1] +000118 2802 CMP r0,#2 +00011a d101 BNE |L1.288| +;;;573 { +;;;574 tp_sleep_in=1; +00011c 48aa LDR r0,|L1.968| +00011e 70c1 STRB r1,[r0,#3] + |L1.288| +;;;575 } +;;;576 +;;;577 #if 0//def ADD_FINGERPRINT_FUNC +;;;578 if (rxbuffer_size ==5) +;;;579 { +;;;580 if((rxbuffer[0] ==0xAC)&&(rxbuffer[1] ==0x07)&&(rxbuffer[2] ==0x18)&&(rxbuffer[3] ==0x02)&&(rxbuffer[4] ==0xD0)) +;;;581 fingerprint_flag =1; +;;;582 else //if((rxbuffer[0] ==0xAC)&&(rxbuffer[1] ==0x07)&&(rxbuffer[2] ==0x0F)&&(rxbuffer[3] ==0x02)&&(rxbuffer[4] ==0xD0)) +;;;583 fingerprint_flag =0; +;;;584 } +;;;585 #endif +;;;586 +;;;587 if(rxbuffer_size ==1) +000120 2f01 CMP r7,#1 +000122 d133 BNE |L1.396| +;;;588 { +;;;589 switch(rxbuffer[0]) +000124 7830 LDRB r0,[r6,#0] +000126 2302 MOVS r3,#2 ;498 +000128 2875 CMP r0,#0x75 +00012a d06e BEQ |L1.522| +00012c dc15 BGT |L1.346| +00012e 2852 CMP r0,#0x52 +000130 d06c BEQ |L1.524| +000132 dc08 BGT |L1.326| +000134 2821 CMP r0,#0x21 +000136 d06a BEQ |L1.526| +000138 2822 CMP r0,#0x22 +00013a d069 BEQ |L1.528| +00013c 2823 CMP r0,#0x23 +00013e d068 BEQ |L1.530| +000140 2830 CMP r0,#0x30 +000142 d11e BNE |L1.386| +000144 e0fc B |L1.832| + |L1.326| +000146 2855 CMP r0,#0x55 +000148 d070 BEQ |L1.556| +;;;590 { +;;;591 #if 1 +;;;592 case 0x60: +;;;593 hal_gpio_set_output_data(g_phone_output_int_pad, IO_LVL_HIGH); +;;;594 if (sleep_double_EN) +;;;595 { +;;;596 tp_flag = 0; +;;;597 sleep_double_EN=0; +;;;598 tp_sleep_in=0; +;;;599 *txbuffer = sleep_on; +;;;600 *txbuffer_size = sizeof(sleep_on); +;;;601 } +;;;602 else +;;;603 { +;;;604 if (tp_flag) +;;;605 { +;;;606 #ifdef ADD_FINGERPRINT_FUNC +;;;607 if (tp_flag == 2) +;;;608 { +;;;609 if ( fingerprint_enable == 1) +;;;610 { +;;;611 *txbuffer = fingerprint_arr_on; +00014a 4ea0 LDR r6,|L1.972| +00014c 2860 CMP r0,#0x60 ;589 +00014e d01e BEQ |L1.398| +000150 2861 CMP r0,#0x61 ;589 +000152 d05f BEQ |L1.532| +000154 2872 CMP r0,#0x72 ;589 +000156 d114 BNE |L1.386| +000158 e082 B |L1.608| + |L1.346| +00015a 28a5 CMP r0,#0xa5 ;589 +00015c d067 BEQ |L1.558| +00015e dc08 BGT |L1.370| +000160 2885 CMP r0,#0x85 ;589 +000162 d071 BEQ |L1.584| +000164 2890 CMP r0,#0x90 ;589 +000166 d070 BEQ |L1.586| +000168 28a3 CMP r0,#0xa3 ;589 +00016a d06f BEQ |L1.588| +00016c 28a4 CMP r0,#0xa4 ;589 +00016e d108 BNE |L1.386| +000170 e112 B |L1.920| + |L1.370| +000172 28af CMP r0,#0xaf ;589 +000174 d06b BEQ |L1.590| +000176 28b1 CMP r0,#0xb1 ;589 +000178 d06d BEQ |L1.598| +00017a 28e4 CMP r0,#0xe4 ;589 +00017c d069 BEQ |L1.594| +00017e 28f1 CMP r0,#0xf1 ;589 +000180 d068 BEQ |L1.596| + |L1.386| +;;;612 *txbuffer_size = sizeof(fingerprint_arr_on); +;;;613 } +;;;614 else if (fingerprint_enable ==0xEE) +;;;615 { +;;;616 fingerprint_enable =0; +;;;617 *txbuffer = fingerprint_arr_off; +;;;618 *txbuffer_size = sizeof(fingerprint_arr_off); +;;;619 } +;;;620 } +;;;621 else if(tp_flag == 3) +;;;622 { +;;;623 *txbuffer = sleep_click_on; +;;;624 *txbuffer_size = sizeof(sleep_click_on); +;;;625 } +;;;626 else +;;;627 #endif +;;;628 { +;;;629 *txbuffer = phone_reg_coord_back; +;;;630 *txbuffer_size = sizeof(phone_reg_coord_back); +;;;631 } +;;;632 +;;;633 tp_flag = 0; +;;;634 } +;;;635 else +;;;636 { +;;;637 tp_flag = 0; +;;;638 *txbuffer = phone_data_60_1; +;;;639 *txbuffer_size = sizeof(phone_data_60_1); +;;;640 } +;;;641 } +;;;642 break; +;;;643 +;;;644 case 0x61: +;;;645 #ifdef ADD_FINGERPRINT_FUNC +;;;646 if ( fingerprint_enable == 1) +;;;647 { +;;;648 *txbuffer = fingerprint_arr_on; +;;;649 *txbuffer_size = sizeof(fingerprint_arr_on); +;;;650 } +;;;651 else if (fingerprint_enable ==0xEE) +;;;652 { +;;;653 fingerprint_enable =0; +;;;654 *txbuffer = fingerprint_arr_off; +;;;655 *txbuffer_size = sizeof(fingerprint_arr_off); +;;;656 } +;;;657 else +;;;658 #endif +;;;659 { +;;;660 *txbuffer = &phone_reg_coord_back[16]; +;;;661 *txbuffer_size = sizeof(phone_reg_coord_back)-16; +;;;662 } +;;;663 break; +;;;664 +;;;665 case 0xB1: +;;;666 *txbuffer = phone_data_B1; +;;;667 *txbuffer_size = sizeof(phone_data_B1); +;;;668 break; +;;;669 #endif +;;;670 +;;;671 #if 1 +;;;672 case 0x72: +;;;673 if (phone_72_flag ==0x03)//0x70,0x03 +;;;674 { +;;;675 *txbuffer = phone_data_72_03; +;;;676 *txbuffer_size = sizeof(phone_data_72_03); +;;;677 } +;;;678 else if (phone_72_flag ==0x05)//0x70,0x05 +;;;679 { +;;;680 *txbuffer = phone_data_72_05;//ռ䲻phone_data_72_0ԣphone_data_72_1 +;;;681 *txbuffer_size = sizeof(phone_data_72_05);//phone_data_72_1 +;;;682 } +;;;683 else if (phone_72_flag ==0x1D)//0x70,0x1D +;;;684 { +;;;685 *txbuffer = phone_data_72_1D; +;;;686 *txbuffer_size = sizeof(phone_data_72_1D); +;;;687 } +;;;688 else if (phone_72_flag ==0x13)//0x70,0x13 +;;;689 { +;;;690 *txbuffer = phone_data_72_13; +;;;691 *txbuffer_size = sizeof(phone_data_72_13); +;;;692 } +;;;693 break; +;;;694 +;;;695 case 0x75: +;;;696 if (phone_75_flag ==0x01)//0x7D,0x01 +;;;697 { +;;;698 *txbuffer = phone_data_75_7401_7D01; +;;;699 *txbuffer_size = sizeof(phone_data_75_7401_7D01); +;;;700 } +;;;701 else if (phone_75_flag ==0x02)//7401_0x7D,0x02,7403_0x7D,0x02 +;;;702 { +;;;703 *txbuffer = phone_data_75_7401_7D02; +;;;704 *txbuffer_size = sizeof(phone_data_75_7401_7D02); +;;;705 } +;;;706 else if (phone_75_flag ==0x03)//0x7D,0x03 +;;;707 { +;;;708 *txbuffer = phone_data_75_7401_7D03; +;;;709 *txbuffer_size = sizeof(phone_data_75_7401_7D03); +;;;710 } +;;;711 else if (phone_75_flag ==0x04)//0x7D,0x01&&74 02 +;;;712 { +;;;713 *txbuffer = phone_data_75_7402_7D01; +;;;714 *txbuffer_size = sizeof(phone_data_75_7403_7D01); +;;;715 } +;;;716 else if (phone_75_flag ==0x05)//0x7D,0x03&&74 02 +;;;717 { +;;;718 *txbuffer = phone_data_75_7402_7D03; +;;;719 *txbuffer_size = sizeof(phone_data_75_7403_7D03); +;;;720 } +;;;721 else if (phone_75_flag ==0x06)//0x7D,0x01&&74 03 +;;;722 { +;;;723 *txbuffer = phone_data_75_7403_7D01; +;;;724 *txbuffer_size = sizeof(phone_data_75_7403_7D01); +;;;725 } +;;;726 else if (phone_75_flag ==0x07)//0x7D,0x03&&74 03 +;;;727 { +;;;728 *txbuffer = phone_data_75_7403_7D03; +;;;729 *txbuffer_size = sizeof(phone_data_75_7403_7D03); +;;;730 } +;;;731 +;;;732 else if (phone_75_flag ==0x08)//0x7D,0x07&&74 02 +;;;733 { +;;;734 *txbuffer = phone_data_75_FF; +;;;735 *txbuffer_size = sizeof(phone_data_75_FF); +;;;736 } +;;;737 else if (phone_75_flag ==0x09)//0x7D,0x07&&74 01 +;;;738 { +;;;739 *txbuffer = phone_data_75_FF; +;;;740 *txbuffer_size = sizeof(phone_data_75_FF); +;;;741 } +;;;742 else if (phone_75_flag ==0x10)//0x7D,0x07&&74 03 +;;;743 { +;;;744 *txbuffer = phone_data_75_FF; +;;;745 *txbuffer_size = sizeof(phone_data_75_FF); +;;;746 } +;;;747 else +;;;748 { +;;;749 *txbuffer = phone_data_75_FF; +;;;750 *txbuffer_size = sizeof(phone_data_75_FF); +;;;751 } +;;;752 break; +;;;753 #endif +;;;754 case 0x21: +;;;755 *txbuffer = phone_data_21; +;;;756 *txbuffer_size = sizeof(phone_data_21); +;;;757 break; +;;;758 case 0x22: +;;;759 *txbuffer = phone_data_22; +;;;760 *txbuffer_size = sizeof(phone_data_22); +;;;761 break; +;;;762 case 0x23: +;;;763 *txbuffer = phone_data_23; +;;;764 *txbuffer_size = sizeof(phone_data_23); +;;;765 break; +;;;766 case 0x30: +;;;767 *txbuffer = phone_data_30; +;;;768 *txbuffer_size = sizeof(phone_data_30); +;;;769 break; +;;;770 case 0x52: +;;;771 *txbuffer = phone_data_52; +;;;772 *txbuffer_size = sizeof(phone_data_52); +;;;773 break; +;;;774 case 0x55: +;;;775 *txbuffer = phone_data_55; +;;;776 *txbuffer_size = sizeof(phone_data_55); +;;;777 break; +;;;778 case 0x85: +;;;779 if(phone_85_flag==0) +;;;780 { +;;;781 *txbuffer = phone_data_85_00; +;;;782 *txbuffer_size = sizeof(phone_data_85_00); +;;;783 } +;;;784 else if(phone_85_flag==0x02) +;;;785 { +;;;786 *txbuffer = phone_data_85_02; +;;;787 *txbuffer_size = sizeof(phone_data_85_02); +;;;788 } +;;;789 break; +;;;790 case 0x90: +;;;791 *txbuffer = phone_data_90; +;;;792 *txbuffer_size = sizeof(phone_data_90); +;;;793 break; +;;;794 +;;;795 case 0xA3: +;;;796 *txbuffer = phone_data_A3; +;;;797 *txbuffer_size = sizeof(phone_data_A3); +;;;798 break; +;;;799 case 0xA4: +;;;800 *txbuffer = phone_data_A4; +;;;801 *txbuffer_size = sizeof(phone_data_A4); +;;;802 break; +;;;803 case 0xA5: +;;;804 *txbuffer = phone_data_A5; +;;;805 *txbuffer_size = sizeof(phone_data_A5); +;;;806 break; +;;;807 case 0xAF: +;;;808 *txbuffer = phone_data_AF; +;;;809 *txbuffer_size = sizeof(phone_data_AF); +;;;810 break; +;;;811 case 0xE4: +;;;812 *txbuffer = phone_data_E4; +;;;813 *txbuffer_size = sizeof(phone_data_E4); +;;;814 break; +;;;815 case 0xF1: +;;;816 *txbuffer = phone_data_F1; +;;;817 *txbuffer_size = sizeof(phone_data_F1); +;;;818 break; +;;;819 #if 0 +;;;820 case 0x92: +;;;821 if(phone_92_flag==0xF0) +;;;822 { +;;;823 *txbuffer = phone_data_92_F0; +;;;824 *txbuffer_size = sizeof(phone_data_92_F0); +;;;825 } +;;;826 else if(phone_92_flag==0x0A) +;;;827 { +;;;828 *txbuffer = phone_data_92_0A; +;;;829 *txbuffer_size = sizeof(phone_data_92_0A); +;;;830 } +;;;831 else if(phone_92_flag==0x15) +;;;832 { +;;;833 *txbuffer = phone_data_92_15; +;;;834 *txbuffer_size = sizeof(phone_data_92_15); +;;;835 } +;;;836 break; +;;;837 case 0xF5: +;;;838 if (phone_F6_flag ==0) +;;;839 { +;;;840 *txbuffer = phone_data_F5_1; +;;;841 *txbuffer_size = sizeof(phone_data_F5_1); +;;;842 } +;;;843 else if (phone_F6_flag ==1) +;;;844 { +;;;845 *txbuffer = phone_data_F5_2; +;;;846 *txbuffer_size = sizeof(phone_data_F5_2); +;;;847 } +;;;848 else if (phone_F6_flag ==2) +;;;849 { +;;;850 *txbuffer = phone_data_F5_3; +;;;851 *txbuffer_size = sizeof(phone_data_F5_3); +;;;852 } +;;;853 else //if (phone_F6_flag ==0) +;;;854 { +;;;855 *txbuffer = phone_data_F5_4; +;;;856 *txbuffer_size = sizeof(phone_data_F5_4); +;;;857 } +;;;858 break; +;;;859 case 0xF6: +;;;860 if (phone_F6_flag ==0) +;;;861 { +;;;862 *txbuffer = phone_data_F6_1; +;;;863 *txbuffer_size = sizeof(phone_data_F6_1); +;;;864 } +;;;865 else if (phone_F6_flag ==1) +;;;866 { +;;;867 *txbuffer = phone_data_F6_2; +;;;868 *txbuffer_size = sizeof(phone_data_F6_2); +;;;869 } +;;;870 else if (phone_F6_flag ==2) +;;;871 { +;;;872 *txbuffer = phone_data_F6_3; +;;;873 *txbuffer_size = sizeof(phone_data_F6_3); +;;;874 } +;;;875 else //if (phone_F6_flag ==0) +;;;876 { +;;;877 *txbuffer = phone_data_F6_4; +;;;878 *txbuffer_size = sizeof(phone_data_F6_4); +;;;879 } +;;;880 phone_F6_flag++; +;;;881 if (phone_F6_flag >3) +;;;882 phone_F6_flag =0; +;;;883 break; +;;;884 #endif +;;;885 default: +;;;886 *txbuffer = phone_reg_coord_back; +000182 4892 LDR r0,|L1.972| +000184 3020 ADDS r0,r0,#0x20 +000186 6020 STR r0,[r4,#0] +;;;887 *txbuffer_size = sizeof(phone_reg_coord_back); +000188 20c8 MOVS r0,#0xc8 +00018a 6028 STR r0,[r5,#0] + |L1.396| +;;;888 break; +;;;889 } +;;;890 } +;;;891 +;;;892 #endif +;;;893 +;;;894 } +00018c bdf8 POP {r3-r7,pc} + |L1.398| +00018e 4f8e LDR r7,|L1.968| +000190 2101 MOVS r1,#1 ;593 +000192 78b8 LDRB r0,[r7,#2] ;593 ; g_phone_output_int_pad +000194 f7fffffe BL hal_gpio_set_output_data +000198 79b8 LDRB r0,[r7,#6] ;594 ; sleep_double_EN +00019a 2800 CMP r0,#0 ;594 +00019c d008 BEQ |L1.432| +00019e 2000 MOVS r0,#0 ;596 +0001a0 7078 STRB r0,[r7,#1] ;596 +0001a2 71b8 STRB r0,[r7,#6] ;597 +0001a4 70f8 STRB r0,[r7,#3] ;598 +0001a6 488a LDR r0,|L1.976| +0001a8 6020 STR r0,[r4,#0] ;599 +0001aa 2010 MOVS r0,#0x10 ;600 +0001ac 6028 STR r0,[r5,#0] ;600 +0001ae bdf8 POP {r3-r7,pc} + |L1.432| +0001b0 7878 LDRB r0,[r7,#1] ;604 ; tp_flag +0001b2 2800 CMP r0,#0 ;604 +0001b4 d022 BEQ |L1.508| +0001b6 2802 CMP r0,#2 ;607 +0001b8 d009 BEQ |L1.462| +0001ba 2803 CMP r0,#3 ;621 +0001bc d018 BEQ |L1.496| +0001be 4883 LDR r0,|L1.972| +0001c0 3020 ADDS r0,r0,#0x20 ;629 +0001c2 6020 STR r0,[r4,#0] ;629 +0001c4 20c8 MOVS r0,#0xc8 ;630 +0001c6 6028 STR r0,[r5,#0] ;630 + |L1.456| +0001c8 2000 MOVS r0,#0 ;633 +0001ca 7078 STRB r0,[r7,#1] ;633 +0001cc bdf8 POP {r3-r7,pc} + |L1.462| +0001ce 7af8 LDRB r0,[r7,#0xb] ;609 ; fingerprint_enable +0001d0 2801 CMP r0,#1 ;609 +0001d2 d009 BEQ |L1.488| +0001d4 28ee CMP r0,#0xee ;614 +0001d6 d1f7 BNE |L1.456| +0001d8 2000 MOVS r0,#0 ;616 +0001da 72f8 STRB r0,[r7,#0xb] ;616 +0001dc 487b LDR r0,|L1.972| +0001de 3010 ADDS r0,r0,#0x10 ;617 +0001e0 6020 STR r0,[r4,#0] ;617 +0001e2 2010 MOVS r0,#0x10 ;618 +0001e4 6028 STR r0,[r5,#0] ;618 +0001e6 e7ef B |L1.456| + |L1.488| +0001e8 6026 STR r6,[r4,#0] ;611 +0001ea 2010 MOVS r0,#0x10 ;612 +0001ec 6028 STR r0,[r5,#0] ;612 +0001ee e7eb B |L1.456| + |L1.496| +0001f0 4877 LDR r0,|L1.976| +0001f2 3010 ADDS r0,r0,#0x10 ;623 +0001f4 6020 STR r0,[r4,#0] ;623 +0001f6 2010 MOVS r0,#0x10 ;624 +0001f8 6028 STR r0,[r5,#0] ;624 +0001fa e7e5 B |L1.456| + |L1.508| +0001fc 2000 MOVS r0,#0 ;637 +0001fe 7078 STRB r0,[r7,#1] ;637 +000200 4874 LDR r0,|L1.980| +000202 6020 STR r0,[r4,#0] ;638 +000204 2010 MOVS r0,#0x10 ;639 +000206 6028 STR r0,[r5,#0] ;639 + |L1.520| +000208 bdf8 POP {r3-r7,pc} + |L1.522| +00020a e046 B |L1.666| + |L1.524| +00020c e09d B |L1.842| + |L1.526| +00020e e086 B |L1.798| + |L1.528| +000210 e08a B |L1.808| + |L1.530| +000212 e08f B |L1.820| + |L1.532| +000214 496c LDR r1,|L1.968| +000216 7ac8 LDRB r0,[r1,#0xb] ;646 ; fingerprint_enable +000218 2801 CMP r0,#1 ;646 +00021a d009 BEQ |L1.560| +00021c 28ee CMP r0,#0xee ;651 +00021e d00b BEQ |L1.568| +000220 486a LDR r0,|L1.972| +000222 3030 ADDS r0,r0,#0x30 ;660 +000224 6020 STR r0,[r4,#0] ;660 +000226 20b8 MOVS r0,#0xb8 ;661 +000228 6028 STR r0,[r5,#0] ;661 +00022a e7ed B |L1.520| + |L1.556| +00022c e093 B |L1.854| + |L1.558| +00022e e0b8 B |L1.930| + |L1.560| +000230 6026 STR r6,[r4,#0] ;648 +000232 2010 MOVS r0,#0x10 ;649 +000234 6028 STR r0,[r5,#0] ;649 +000236 e7e7 B |L1.520| + |L1.568| +000238 2000 MOVS r0,#0 ;653 +00023a 72c8 STRB r0,[r1,#0xb] ;653 +00023c 4863 LDR r0,|L1.972| +00023e 3010 ADDS r0,r0,#0x10 ;654 +000240 6020 STR r0,[r4,#0] ;654 +000242 2010 MOVS r0,#0x10 ;655 +000244 6028 STR r0,[r5,#0] ;655 +000246 e7df B |L1.520| + |L1.584| +000248 e08a B |L1.864| + |L1.586| +00024a e09a B |L1.898| + |L1.588| +00024c e09f B |L1.910| + |L1.590| +00024e e0ad B |L1.940| +000250 e001 B |L1.598| + |L1.594| +000252 e0b0 B |L1.950| + |L1.596| +000254 e0b3 B |L1.958| + |L1.598| +000256 485c LDR r0,|L1.968| +000258 3013 ADDS r0,r0,#0x13 ;666 +00025a 6020 STR r0,[r4,#0] ;666 +00025c 602b STR r3,[r5,#0] ;667 +00025e e7d3 B |L1.520| + |L1.608| +000260 4859 LDR r0,|L1.968| +000262 495d LDR r1,|L1.984| +000264 7bc0 LDRB r0,[r0,#0xf] ;673 ; phone_72_flag +000266 2803 CMP r0,#3 ;673 +000268 d00a BEQ |L1.640| +00026a 2805 CMP r0,#5 ;678 +00026c d00d BEQ |L1.650| +00026e 281d CMP r0,#0x1d ;683 +000270 d00f BEQ |L1.658| +000272 2813 CMP r0,#0x13 ;688 +000274 d1c8 BNE |L1.520| +000276 4854 LDR r0,|L1.968| +000278 301e ADDS r0,r0,#0x1e ;690 +00027a 6020 STR r0,[r4,#0] ;690 +00027c 6029 STR r1,[r5,#0] ;691 + |L1.638| +00027e e7c3 B |L1.520| + |L1.640| +000280 4854 LDR r0,|L1.980| +000282 3041 ADDS r0,r0,#0x41 ;675 +000284 6020 STR r0,[r4,#0] ;675 +000286 6029 STR r1,[r5,#0] ;676 +000288 e7be B |L1.520| + |L1.650| +00028a 4854 LDR r0,|L1.988| +00028c 6020 STR r0,[r4,#0] ;680 +00028e 6029 STR r1,[r5,#0] ;681 +000290 e7ba B |L1.520| + |L1.658| +000292 4853 LDR r0,|L1.992| +000294 6020 STR r0,[r4,#0] ;685 +000296 6029 STR r1,[r5,#0] ;686 +000298 e7b6 B |L1.520| + |L1.666| +00029a 484b LDR r0,|L1.968| +00029c 4951 LDR r1,|L1.996| +00029e 7c00 LDRB r0,[r0,#0x10] ;696 ; phone_75_flag +0002a0 2801 CMP r0,#1 ;696 +0002a2 d017 BEQ |L1.724| +0002a4 2802 CMP r0,#2 ;701 +0002a6 d019 BEQ |L1.732| +0002a8 2803 CMP r0,#3 ;706 +0002aa d01b BEQ |L1.740| +0002ac 2804 CMP r0,#4 ;711 +0002ae d01d BEQ |L1.748| +0002b0 2805 CMP r0,#5 ;716 +0002b2 d01f BEQ |L1.756| +0002b4 2806 CMP r0,#6 ;721 +0002b6 d021 BEQ |L1.764| +0002b8 2807 CMP r0,#7 ;726 +0002ba d023 BEQ |L1.772| +0002bc 22ff MOVS r2,#0xff ;735 +0002be 494a LDR r1,|L1.1000| +0002c0 3221 ADDS r2,r2,#0x21 ;735 +0002c2 2808 CMP r0,#8 ;732 +0002c4 d022 BEQ |L1.780| +0002c6 2809 CMP r0,#9 ;737 +0002c8 d023 BEQ |L1.786| +0002ca 2810 CMP r0,#0x10 ;742 +0002cc d024 BEQ |L1.792| +0002ce 6021 STR r1,[r4,#0] ;749 +0002d0 602a STR r2,[r5,#0] ;750 +0002d2 e799 B |L1.520| + |L1.724| +0002d4 4845 LDR r0,|L1.1004| +0002d6 6020 STR r0,[r4,#0] ;698 +0002d8 6029 STR r1,[r5,#0] ;699 +0002da e795 B |L1.520| + |L1.732| +0002dc 4844 LDR r0,|L1.1008| +0002de 6020 STR r0,[r4,#0] ;703 +0002e0 6029 STR r1,[r5,#0] ;704 +0002e2 e791 B |L1.520| + |L1.740| +0002e4 4843 LDR r0,|L1.1012| +0002e6 6020 STR r0,[r4,#0] ;708 +0002e8 6029 STR r1,[r5,#0] ;709 +0002ea e78d B |L1.520| + |L1.748| +0002ec 4842 LDR r0,|L1.1016| +0002ee 6020 STR r0,[r4,#0] ;713 +0002f0 6029 STR r1,[r5,#0] ;714 +0002f2 e789 B |L1.520| + |L1.756| +0002f4 4841 LDR r0,|L1.1020| +0002f6 6020 STR r0,[r4,#0] ;718 +0002f8 6029 STR r1,[r5,#0] ;719 +0002fa e785 B |L1.520| + |L1.764| +0002fc 4840 LDR r0,|L1.1024| +0002fe 6020 STR r0,[r4,#0] ;723 +000300 6029 STR r1,[r5,#0] ;724 +000302 e781 B |L1.520| + |L1.772| +000304 483f LDR r0,|L1.1028| +000306 6020 STR r0,[r4,#0] ;728 +000308 6029 STR r1,[r5,#0] ;729 +00030a e77d B |L1.520| + |L1.780| +00030c 6021 STR r1,[r4,#0] ;734 +00030e 602a STR r2,[r5,#0] ;735 +000310 e77a B |L1.520| + |L1.786| +000312 6021 STR r1,[r4,#0] ;739 +000314 602a STR r2,[r5,#0] ;740 +000316 e777 B |L1.520| + |L1.792| +000318 6021 STR r1,[r4,#0] ;744 +00031a 602a STR r2,[r5,#0] ;745 +00031c e774 B |L1.520| + |L1.798| +00031e 482d LDR r0,|L1.980| +000320 3821 SUBS r0,r0,#0x21 ;755 +000322 6020 STR r0,[r4,#0] ;755 +000324 6029 STR r1,[r5,#0] ;756 +000326 e76f B |L1.520| + |L1.808| +000328 482a LDR r0,|L1.980| +00032a 1f40 SUBS r0,r0,#5 ;759 +00032c 6020 STR r0,[r4,#0] ;759 +00032e 2005 MOVS r0,#5 ;760 +000330 6028 STR r0,[r5,#0] ;760 +000332 e769 B |L1.520| + |L1.820| +000334 4827 LDR r0,|L1.980| +000336 3010 ADDS r0,r0,#0x10 ;763 +000338 6020 STR r0,[r4,#0] ;763 +00033a 200b MOVS r0,#0xb ;764 +00033c 6028 STR r0,[r5,#0] ;764 +00033e e763 B |L1.520| + |L1.832| +000340 4824 LDR r0,|L1.980| +000342 381e SUBS r0,r0,#0x1e ;767 +000344 6020 STR r0,[r4,#0] ;767 +000346 602b STR r3,[r5,#0] ;768 +000348 e75e B |L1.520| + |L1.842| +00034a 4822 LDR r0,|L1.980| +00034c 381c SUBS r0,r0,#0x1c ;771 +00034e 6020 STR r0,[r4,#0] ;771 +000350 2003 MOVS r0,#3 ;772 +000352 6028 STR r0,[r5,#0] ;772 +000354 e758 B |L1.520| + |L1.854| +000356 481f LDR r0,|L1.980| +000358 3820 SUBS r0,r0,#0x20 ;775 +00035a 6020 STR r0,[r4,#0] ;775 +00035c 6029 STR r1,[r5,#0] ;776 +00035e e753 B |L1.520| + |L1.864| +000360 4819 LDR r0,|L1.968| +000362 7b40 LDRB r0,[r0,#0xd] ;779 ; phone_85_flag +000364 2800 CMP r0,#0 ;779 +000366 d007 BEQ |L1.888| +000368 2802 CMP r0,#2 ;784 +00036a d188 BNE |L1.638| +00036c 4819 LDR r0,|L1.980| +00036e 301b ADDS r0,r0,#0x1b ;786 +000370 6020 STR r0,[r4,#0] ;786 +000372 201c MOVS r0,#0x1c ;787 +000374 6028 STR r0,[r5,#0] ;787 +000376 e747 B |L1.520| + |L1.888| +000378 4816 LDR r0,|L1.980| +00037a 381f SUBS r0,r0,#0x1f ;781 +00037c 6020 STR r0,[r4,#0] ;781 +00037e 6029 STR r1,[r5,#0] ;782 +000380 e742 B |L1.520| + |L1.898| +000382 4814 LDR r0,|L1.980| +000384 3037 ADDS r0,r0,#0x37 ;791 +000386 6020 STR r0,[r4,#0] ;791 +000388 200a MOVS r0,#0xa ;792 +00038a 6028 STR r0,[r5,#0] ;792 +00038c e73c B |L1.520| + |L1.910| +00038e 4811 LDR r0,|L1.980| +000390 3819 SUBS r0,r0,#0x19 ;796 +000392 6020 STR r0,[r4,#0] ;796 +000394 602a STR r2,[r5,#0] ;797 +000396 e737 B |L1.520| + |L1.920| +000398 480e LDR r0,|L1.980| +00039a 3815 SUBS r0,r0,#0x15 ;800 +00039c 6020 STR r0,[r4,#0] ;800 +00039e 602a STR r2,[r5,#0] ;801 +0003a0 e732 B |L1.520| + |L1.930| +0003a2 480c LDR r0,|L1.980| +0003a4 3811 SUBS r0,r0,#0x11 ;804 +0003a6 6020 STR r0,[r4,#0] ;804 +0003a8 602a STR r2,[r5,#0] ;805 +0003aa e72d B |L1.520| + |L1.940| +0003ac 4809 LDR r0,|L1.980| +0003ae 380d SUBS r0,r0,#0xd ;808 +0003b0 6020 STR r0,[r4,#0] ;808 +0003b2 602a STR r2,[r5,#0] ;809 +0003b4 e728 B |L1.520| + |L1.950| +0003b6 4804 LDR r0,|L1.968| +0003b8 6020 STR r0,[r4,#0] ;812 +0003ba 6029 STR r1,[r5,#0] ;813 +0003bc e724 B |L1.520| + |L1.958| +0003be 4805 LDR r0,|L1.980| +0003c0 3809 SUBS r0,r0,#9 ;816 +0003c2 6020 STR r0,[r4,#0] ;816 +0003c4 602a STR r2,[r5,#0] ;817 +0003c6 e71f B |L1.520| +;;;895 + ENDP + + |L1.968| + DCD ||.data|| + |L1.972| + DCD ||.data||+0x159e + |L1.976| + DCD ||.constdata||+0xf86 + |L1.980| + DCD ||.constdata||+0x21 + |L1.984| + DCD 0x0000050c + |L1.988| + DCD ||.constdata||+0x56e + |L1.992| + DCD ||.constdata||+0xa7a + |L1.996| + DCD 0x0000028e + |L1.1000| + DCD ||.data||+0x147e + |L1.1004| + DCD ||.data||+0x52a + |L1.1008| + DCD ||.bss|| + |L1.1012| + DCD ||.data||+0x7b8 + |L1.1016| + DCD ||.data||+0xa46 + |L1.1020| + DCD ||.data||+0xcd4 + |L1.1024| + DCD ||.data||+0xf62 + |L1.1028| + DCD ||.data||+0x11f0 + + AREA ||i.app_tp_screen_analysis_const||, CODE, READONLY, ALIGN=2 + + app_tp_screen_analysis_const PROC +;;;196 **************************************************************************/ +;;;197 uint8_t app_tp_screen_analysis_const(uint8_t transfer_now, uint8_t *rxbuffer, size_t data_size) +000000 b510 PUSH {r4,lr} +;;;198 { +;;;199 static uint8_t app_tp_count = 0; +;;;200 +;;;201 app_tp_count++; +000002 4b0c LDR r3,|L2.52| +000004 7b1a LDRB r2,[r3,#0xc] ; app_tp_count +000006 1c52 ADDS r2,r2,#1 +000008 b2d2 UXTB r2,r2 +00000a 731a STRB r2,[r3,#0xc] +;;;202 if (app_tp_count > 20) //ʼɹreset screen +00000c 2a14 CMP r2,#0x14 +00000e d905 BLS |L2.28| +;;;203 { +;;;204 app_tp_count = 0; +000010 2000 MOVS r0,#0 +000012 7318 STRB r0,[r3,#0xc] +;;;205 app_tp_screen_init(); +000014 f7fffffe BL app_tp_screen_init +;;;206 return 0; +000018 2000 MOVS r0,#0 +;;;207 } +;;;208 +;;;209 if (transfer_now == 0) +;;;210 { +;;;211 if (rxbuffer[2] == 0x03) +;;;212 { +;;;213 // TAU_LOGD("TD TP init done\n"); +;;;214 return 1; +;;;215 } +;;;216 else +;;;217 { +;;;218 // TAU_LOGD("TD TP return false [%d]\n", rxbuffer[2]); +;;;219 return 0; +;;;220 } +;;;221 } +;;;222 +;;;223 return transfer_now + 1; +;;;224 } +00001a bd10 POP {r4,pc} + |L2.28| +00001c 2800 CMP r0,#0 ;209 +00001e d002 BEQ |L2.38| +000020 1c40 ADDS r0,r0,#1 ;223 +000022 b2c0 UXTB r0,r0 ;223 +000024 bd10 POP {r4,pc} + |L2.38| +000026 7888 LDRB r0,[r1,#2] ;211 +000028 2803 CMP r0,#3 ;211 +00002a d001 BEQ |L2.48| +00002c 2000 MOVS r0,#0 ;219 +00002e bd10 POP {r4,pc} + |L2.48| +000030 2001 MOVS r0,#1 ;214 +000032 bd10 POP {r4,pc} +;;;225 + ENDP + + |L2.52| + DCD ||.data|| + + AREA ||i.app_tp_screen_analysis_int||, CODE, READONLY, ALIGN=2 + + app_tp_screen_analysis_int PROC +;;;234 **************************************************************************/ +;;;235 uint8_t app_tp_screen_analysis_int(uint8_t transfer_now, uint8_t *rxbuffer, size_t data_size) +000000 b5f0 PUSH {r4-r7,lr} +;;;236 { +000002 b089 SUB sp,sp,#0x24 +000004 460c MOV r4,r1 +;;;237 #ifdef USE_FOR_SUMSUNG_S21U +;;;238 uint8_t ii,i,j,k,temp_len; +;;;239 uint8_t temp_flag,temp,touchnum; +;;;240 uint8_t temp_8,touch_id; +;;;241 uint16_t temp16; +;;;242 uint32_t xx, yy, zz; +;;;243 uint8_t send_point =0; // ǰҪ͵ı̧ʱҲҪ +000006 2000 MOVS r0,#0 +000008 9000 STR r0,[sp,#0] +;;;244 +;;;245 send_point =0; +;;;246 phone_reg_coord_back[7]=0; +00000a 48e4 LDR r0,|L3.924| +00000c 2100 MOVS r1,#0 +00000e 71c1 STRB r1,[r0,#7] +;;;247 +;;;248 #if 1 +;;;249 temp_8= 0; +;;;250 temp_len=0; +000010 2500 MOVS r5,#0 +;;;251 touchnum=0; +;;;252 touchnum=rxbuffer[7]; +000012 79e0 LDRB r0,[r4,#7] +000014 9003 STR r0,[sp,#0xc] +;;;253 +;;;254 // if(touchnum==0) +;;;255 // { +;;;256 // temp_8= rxbuffer[0]&0xf0; +;;;257 // if((temp_8==0x20)||(temp_8==0x10)) +;;;258 // { +;;;259 // touchnum=1; +;;;260 // } +;;;261 // } +;;;262 if(touchnum>0x10) +000016 9803 LDR r0,[sp,#0xc] +000018 2810 CMP r0,#0x10 +00001a d901 BLS |L3.32| +;;;263 touchnum=0; +00001c 2000 MOVS r0,#0 +00001e 9003 STR r0,[sp,#0xc] + |L3.32| +;;;264 +;;;265 for(ii =0; ii<(touchnum+1); ii++) +000020 2000 MOVS r0,#0 +000022 9903 LDR r1,[sp,#0xc] +000024 1c49 ADDS r1,r1,#1 +000026 9108 STR r1,[sp,#0x20] +000028 e013 B |L3.82| + |L3.42| +;;;266 { +;;;267 temp_8= rxbuffer[ii*8+0]&0xf0; +00002a 00c1 LSLS r1,r0,#3 +00002c 5c61 LDRB r1,[r4,r1] +00002e 0909 LSRS r1,r1,#4 +000030 0109 LSLS r1,r1,#4 +;;;268 if((temp_8==0x20)||(temp_8==0x10)) +000032 2920 CMP r1,#0x20 +000034 d001 BEQ |L3.58| +000036 2910 CMP r1,#0x10 +000038 d105 BNE |L3.70| + |L3.58| +;;;269 { +;;;270 temp_len++; +00003a 1c6d ADDS r5,r5,#1 +00003c b2ed UXTB r5,r5 +;;;271 send_point++; +00003e 9a00 LDR r2,[sp,#0] +000040 1c52 ADDS r2,r2,#1 +000042 b2d2 UXTB r2,r2 +000044 9200 STR r2,[sp,#0] + |L3.70| +;;;272 } +;;;273 if(temp_8==0x30) +000046 2930 CMP r1,#0x30 +000048 d101 BNE |L3.78| +;;;274 { +;;;275 temp_len++; +00004a 1c6d ADDS r5,r5,#1 +00004c b2ed UXTB r5,r5 + |L3.78| +00004e 1c40 ADDS r0,r0,#1 ;265 +000050 b2c0 UXTB r0,r0 ;265 + |L3.82| +000052 9908 LDR r1,[sp,#0x20] ;265 +000054 4288 CMP r0,r1 ;265 +000056 d3e8 BCC |L3.42| +;;;276 } +;;;277 } +;;;278 +;;;279 if(temp_len>0) +000058 2d00 CMP r5,#0 +00005a d001 BEQ |L3.96| +;;;280 { +;;;281 temp_len--; +00005c 1e6d SUBS r5,r5,#1 +00005e b2ed UXTB r5,r5 + |L3.96| +;;;282 } +;;;283 +;;;284 k=0; +000060 2600 MOVS r6,#0 +;;;285 for(ii =0; ii<(touchnum+1); ii++) +000062 2000 MOVS r0,#0 +000064 9005 STR r0,[sp,#0x14] +;;;286 { +;;;287 temp= (rxbuffer[ii*8+0]&0xf0); +;;;288 if((temp==0x20)||(temp==0x10)) +;;;289 { +;;;290 xx = ((rxbuffer[8*ii+3]&0x0f) << 8) | (rxbuffer[8*ii+2]); +;;;291 yy = (rxbuffer[8*ii+4] << 4) | ((rxbuffer[8*ii+3]>>4)&0x0f); +;;;292 zz = rxbuffer[8*ii+5]; +;;;293 touch_id=rxbuffer[8*ii+1]>>4; +;;;294 xx = xx * 4096 / OUTPUT_WIDTH_VALUE; +;;;295 if(xx >4095) +;;;296 xx =4095; +;;;297 yy = yy * 4096 / OUTPUT_HEIGHT_VALUE; +;;;298 if(yy >4095) +;;;299 yy =4095; +;;;300 if(temp == 0x10) +;;;301 { +;;;302 phone_reg_coord_back[16 * k + 0] = 0x40 + ((touch_id + 1) * 4); //(temp*4)+((touch_id+1)*4); //44 press C4 leave 84 move +;;;303 tp_sleep_clk_count = 0; +000066 48ce LDR r0,|L3.928| +;;;304 } +;;;305 else +;;;306 { +;;;307 phone_reg_coord_back[16 * k + 0] = 0x80 + ((touch_id + 1) * 4); //(temp*4)+((touch_id+1)*4); //44 press C4 leave 84 move +;;;308 } +;;;309 phone_reg_coord_back[16*k+1] = (uint8_t)((xx>>4) & 0xFF); //x ߰λ +;;;310 phone_reg_coord_back[16*k+2] = (uint8_t)((yy>>4) & 0xFF); //y ߰λ +;;;311 phone_reg_coord_back[16*k+3] = ((xx & 0x0F) << 4) | (yy & 0x0F); //bit0-bit3:yλ;bit4-bit7:xλ; +;;;312 phone_reg_coord_back[16*k+4] = 0x8; //major +;;;313 phone_reg_coord_back[16*k+5] = 0x8; //minor +;;;314 //touch type0:ָͨ1:2:ף3:;4:;5:;6:ʪ;7:ӽ;8:ҡ +;;;315 phone_reg_coord_back[16*k+6] = 0x20; //bit0-bit5:zֻ6λ;bit6-bit7:touch typeĸλ +;;;316 phone_reg_coord_back[16*k+7] = temp_len--;//rxbuffer[8*ii+7]; //bit0-bit5:bufferʣٸ¼;bit6-bit7touch type λ +;;;317 phone_reg_coord_back[16*k+8] = 0x04; +;;;318 phone_reg_coord_back[16*k+9] = 0x83; +;;;319 phone_reg_coord_back[16*k+10] = 0x02; +;;;320 phone_reg_coord_back[16*k+11] = 0x00; +;;;321 phone_reg_coord_back[16*k+12] = 0x00; +;;;322 phone_reg_coord_back[16*k+13] = 0x00; +;;;323 phone_reg_coord_back[16*k+14] = 0x00; +;;;324 phone_reg_coord_back[16*k+15] = 0x00; +;;;325 k++; +;;;326 +;;;327 #ifdef ADD_FINGERPRINT_FUNC +;;;328 // if((touchnum ==0) && fingerprint_flag) +;;;329 if(touchnum ==0) +;;;330 { +;;;331 if( (xx>FINGER_X_MIN) &&(xxFINGER_Y_MIN) &&(yy>4)&0x0f); +00019a 7903 LDRB r3,[r0,#4] +00019c 011b LSLS r3,r3,#4 +00019e 0909 LSRS r1,r1,#4 +0001a0 430b ORRS r3,r3,r1 +0001a2 9301 STR r3,[sp,#4] +;;;348 zz = rxbuffer[8*ii+5]; +;;;349 touch_id=rxbuffer[8*ii+1]>>4; +0001a4 7840 LDRB r0,[r0,#1] +0001a6 0900 LSRS r0,r0,#4 +0001a8 9002 STR r0,[sp,#8] +;;;350 xx = xx * 4096 / OUTPUT_WIDTH_VALUE; +0001aa 2187 MOVS r1,#0x87 +0001ac 0310 LSLS r0,r2,#12 +0001ae 00c9 LSLS r1,r1,#3 +0001b0 f7fffffe BL __aeabi_uidivmod +0001b4 4607 MOV r7,r0 +;;;351 if(xx >4095) +0001b6 497b LDR r1,|L3.932| +0001b8 428f CMP r7,r1 +0001ba d900 BLS |L3.446| +;;;352 xx =4095; +0001bc 460f MOV r7,r1 + |L3.446| +;;;353 yy = yy * 4096 / OUTPUT_HEIGHT_VALUE; +0001be 9801 LDR r0,[sp,#4] +0001c0 214b MOVS r1,#0x4b +0001c2 0300 LSLS r0,r0,#12 +0001c4 0149 LSLS r1,r1,#5 +0001c6 f7fffffe BL __aeabi_uidivmod +;;;354 if(yy >4095) +0001ca 4976 LDR r1,|L3.932| +0001cc 4288 CMP r0,r1 +0001ce d900 BLS |L3.466| +;;;355 yy =4095; +0001d0 4608 MOV r0,r1 + |L3.466| +;;;356 phone_reg_coord_back[16*k+0] = 0xC0+((touch_id+1)*4); +0001d2 9902 LDR r1,[sp,#8] +0001d4 4b71 LDR r3,|L3.924| +0001d6 1c49 ADDS r1,r1,#1 +0001d8 008a LSLS r2,r1,#2 +0001da 32c0 ADDS r2,r2,#0xc0 +0001dc 0131 LSLS r1,r6,#4 +0001de 545a STRB r2,[r3,r1] +;;;357 phone_reg_coord_back[16*k+1] = (uint8_t)((xx>>4) & 0xFF); //x ߰λ +0001e0 093a LSRS r2,r7,#4 +0001e2 18c9 ADDS r1,r1,r3 +0001e4 704a STRB r2,[r1,#1] +;;;358 phone_reg_coord_back[16*k+2] = (uint8_t)((yy>>4) & 0xFF); //y ߰λ +0001e6 0902 LSRS r2,r0,#4 +0001e8 708a STRB r2,[r1,#2] +;;;359 phone_reg_coord_back[16*k+3] = ((xx & 0x0F) << 4) | (yy & 0x0F); //bit0-bit3:yλ;bit4-bit7:xλ; +0001ea 013a LSLS r2,r7,#4 +0001ec 0703 LSLS r3,r0,#28 +0001ee 0f1b LSRS r3,r3,#28 +0001f0 431a ORRS r2,r2,r3 +0001f2 70ca STRB r2,[r1,#3] +;;;360 phone_reg_coord_back[16*k+4] = 0x8; //major +0001f4 2208 MOVS r2,#8 +0001f6 710a STRB r2,[r1,#4] +;;;361 phone_reg_coord_back[16*k+5] = 0x8; //minor +0001f8 714a STRB r2,[r1,#5] +;;;362 //touch type0:ָͨ1:2:ף3:;4:;5:;6:ʪ;7:ӽ;8:ҡ +;;;363 phone_reg_coord_back[16*k+6] = 0x20; //bit0-bit5:zֻ6λ;bit6-bit7:touch typeĸλ +0001fa 2220 MOVS r2,#0x20 +0001fc 718a STRB r2,[r1,#6] +;;;364 phone_reg_coord_back[16*k+7] = rxbuffer[8*ii+7]; //bit0-bit5:bufferʣٸ¼;bit6-bit7touch type λ +0001fe 9a06 LDR r2,[sp,#0x18] +000200 79d2 LDRB r2,[r2,#7] +000202 71ca STRB r2,[r1,#7] +;;;365 phone_reg_coord_back[16*k+8] = 0x04; +000204 2204 MOVS r2,#4 +000206 720a STRB r2,[r1,#8] +;;;366 phone_reg_coord_back[16*k+9] = 0x83; +000208 2283 MOVS r2,#0x83 +00020a 724a STRB r2,[r1,#9] +;;;367 phone_reg_coord_back[16*k+10] = 0x00; +00020c 2200 MOVS r2,#0 +00020e 728a STRB r2,[r1,#0xa] +;;;368 phone_reg_coord_back[16*k+11] = 0x00; +000210 72ca STRB r2,[r1,#0xb] +;;;369 phone_reg_coord_back[16*k+12] = 0x00; +000212 730a STRB r2,[r1,#0xc] +;;;370 phone_reg_coord_back[16*k+13] = 0x00; +000214 734a STRB r2,[r1,#0xd] +;;;371 phone_reg_coord_back[16*k+14] = 0x00; +000216 738a STRB r2,[r1,#0xe] +;;;372 phone_reg_coord_back[16*ii+15] = 0x00; +000218 9905 LDR r1,[sp,#0x14] +00021a 010b LSLS r3,r1,#4 +00021c 495f LDR r1,|L3.924| +00021e 1859 ADDS r1,r3,r1 +000220 73ca STRB r2,[r1,#0xf] +;;;373 k++; +000222 1c76 ADDS r6,r6,#1 +000224 b2f6 UXTB r6,r6 +;;;374 #ifdef ADD_FINGERPRINT_FUNC +;;;375 // if((touchnum ==0) && fingerprint_flag) +;;;376 if(touchnum ==0) +000226 9903 LDR r1,[sp,#0xc] +000228 2900 CMP r1,#0 +00022a d115 BNE |L3.600| +;;;377 { +;;;378 if( (xx>FINGER_X_MIN) &&(xxFINGER_Y_MIN) &&(yy0)&&(Flag_EA_EN)) +00027e 9800 LDR r0,[sp,#0] +000280 2800 CMP r0,#0 +000282 d01f BEQ |L3.708| +000284 4a46 LDR r2,|L3.928| +000286 79d0 LDRB r0,[r2,#7] ; Flag_EA_EN +000288 2800 CMP r0,#0 +00028a d01b BEQ |L3.708| +;;;398 { +;;;399 for(ii =0; ii<10; ii++) +00028c 2000 MOVS r0,#0 +;;;400 { +;;;401 yy = (rxbuffer[8*ii+4] << 4) | ((rxbuffer[8*ii+3]>>4)&0x0f); +;;;402 if(yy<500) +00028e 26ff MOVS r6,#0xff +000290 36f5 ADDS r6,r6,#0xf5 +;;;403 { +;;;404 if(send_point>touchnum_bak) +000292 7a53 LDRB r3,[r2,#9] +000294 2501 MOVS r5,#1 ;334 + |L3.662| +000296 00c1 LSLS r1,r0,#3 ;401 +000298 1909 ADDS r1,r1,r4 ;401 +00029a 790f LDRB r7,[r1,#4] ;401 +00029c 78c9 LDRB r1,[r1,#3] ;401 +00029e 013f LSLS r7,r7,#4 ;401 +0002a0 0909 LSRS r1,r1,#4 ;401 +0002a2 430f ORRS r7,r7,r1 ;401 +0002a4 42b7 CMP r7,r6 ;402 +0002a6 d209 BCS |L3.700| +0002a8 9900 LDR r1,[sp,#0] +0002aa 4299 CMP r1,r3 +0002ac d902 BLS |L3.692| +;;;405 { +;;;406 Flag_touch_count++; +0002ae 7a11 LDRB r1,[r2,#8] ; Flag_touch_count +0002b0 1c49 ADDS r1,r1,#1 +0002b2 7211 STRB r1,[r2,#8] + |L3.692| +;;;407 } +;;;408 if(Flag_touch_count>1) +0002b4 7a11 LDRB r1,[r2,#8] ; Flag_touch_count +0002b6 2901 CMP r1,#1 +0002b8 d900 BLS |L3.700| +;;;409 { +;;;410 Flag_blacklight_EN=1; +0002ba 7295 STRB r5,[r2,#0xa] + |L3.700| +0002bc 1c40 ADDS r0,r0,#1 ;399 +0002be b2c0 UXTB r0,r0 ;399 +0002c0 280a CMP r0,#0xa ;399 +0002c2 d3e8 BCC |L3.662| + |L3.708| +;;;411 } +;;;412 } +;;;413 } +;;;414 } +;;;415 +;;;416 #ifdef ENABLE_TP_SLEEP +;;;417 if(tp_sleep_in) +0002c4 9807 LDR r0,[sp,#0x1c] +0002c6 4d36 LDR r5,|L3.928| +0002c8 2800 CMP r0,#0 +0002ca d03b BEQ |L3.836| +;;;418 { +;;;419 //ʵ˫ѹ +;;;420 if(send_point==0) +0002cc 9800 LDR r0,[sp,#0] +0002ce 2800 CMP r0,#0 +0002d0 d138 BNE |L3.836| +;;;421 { +;;;422 u16CoordX = (phone_reg_coord_back[1]<<4)+((phone_reg_coord_back[3]>>4)&0x0f); +0002d2 4a32 LDR r2,|L3.924| +0002d4 7850 LDRB r0,[r2,#1] ; phone_reg_coord_back +0002d6 78d1 LDRB r1,[r2,#3] ; phone_reg_coord_back +0002d8 0100 LSLS r0,r0,#4 +0002da 090b LSRS r3,r1,#4 +0002dc 18c0 ADDS r0,r0,r3 +0002de 8328 STRH r0,[r5,#0x18] +;;;423 u16CoordY = (phone_reg_coord_back[2]<<4)+(phone_reg_coord_back[3]&0x0f); +0002e0 7892 LDRB r2,[r2,#2] ; phone_reg_coord_back +0002e2 0709 LSLS r1,r1,#28 +0002e4 0112 LSLS r2,r2,#4 +0002e6 0f09 LSRS r1,r1,#28 +0002e8 1851 ADDS r1,r2,r1 +0002ea 82e9 STRH r1,[r5,#0x16] +;;;424 if((tp_sleep_count>5)&&(tp_sleep_count<60)&&((rxbuffer[0]&0xf0)==0x30)) +0002ec 792a LDRB r2,[r5,#4] ; tp_sleep_count +0002ee 1f92 SUBS r2,r2,#6 +0002f0 2a36 CMP r2,#0x36 +0002f2 d221 BCS |L3.824| +0002f4 7822 LDRB r2,[r4,#0] +0002f6 0912 LSRS r2,r2,#4 +0002f8 2a03 CMP r2,#3 +0002fa d11d BNE |L3.824| +;;;425 { +;;;426 if (u16CoordX > u16CoordX_back) +0002fc 8baa LDRH r2,[r5,#0x1c] ; u16CoordX_back +0002fe 4290 CMP r0,r2 +000300 d902 BLS |L3.776| +;;;427 u16CoordX_back = u16CoordX-u16CoordX_back; +000302 1a80 SUBS r0,r0,r2 +000304 83a8 STRH r0,[r5,#0x1c] +000306 e001 B |L3.780| + |L3.776| +;;;428 else +;;;429 u16CoordX_back = u16CoordX_back-u16CoordX; +000308 1a10 SUBS r0,r2,r0 +00030a 83a8 STRH r0,[r5,#0x1c] + |L3.780| +;;;430 +;;;431 if (u16CoordY > u16CoordY_back) +00030c 8b68 LDRH r0,[r5,#0x1a] ; u16CoordY_back +00030e 4281 CMP r1,r0 +000310 d902 BLS |L3.792| +;;;432 u16CoordY_back = u16CoordY-u16CoordY_back; +000312 1a08 SUBS r0,r1,r0 +000314 8368 STRH r0,[r5,#0x1a] +000316 e001 B |L3.796| + |L3.792| +;;;433 else +;;;434 u16CoordY_back = u16CoordY_back-u16CoordY; +000318 1a40 SUBS r0,r0,r1 +00031a 8368 STRH r0,[r5,#0x1a] + |L3.796| +;;;435 +;;;436 if ( (u16CoordX_back < 360) && (u16CoordY_back < 360)) //δķΧ +00031c 8ba9 LDRH r1,[r5,#0x1c] ; u16CoordX_back +00031e 20ff MOVS r0,#0xff +000320 3069 ADDS r0,r0,#0x69 +000322 4281 CMP r1,r0 +000324 d208 BCS |L3.824| +000326 8b69 LDRH r1,[r5,#0x1a] ; u16CoordY_back +000328 4281 CMP r1,r0 +00032a d205 BCS |L3.824| +;;;437 { +;;;438 //TAU_LOGD("tp_sleep_in!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! \n"); +;;;439 sleep_double_EN=1; +00032c 2001 MOVS r0,#1 +00032e 71a8 STRB r0,[r5,#6] +;;;440 hal_gpio_set_output_data(g_phone_output_int_pad, IO_LVL_LOW); +000330 2100 MOVS r1,#0 +000332 78a8 LDRB r0,[r5,#2] ; g_phone_output_int_pad +000334 f7fffffe BL hal_gpio_set_output_data + |L3.824| +;;;441 } +;;;442 } +;;;443 +;;;444 u16CoordX_back = u16CoordX; +000338 8b28 LDRH r0,[r5,#0x18] ; u16CoordX +00033a 83a8 STRH r0,[r5,#0x1c] +;;;445 u16CoordY_back = u16CoordY; +00033c 8ae8 LDRH r0,[r5,#0x16] ; u16CoordY +00033e 8368 STRH r0,[r5,#0x1a] +;;;446 tp_sleep_count=0; +000340 2000 MOVS r0,#0 +000342 7128 STRB r0,[r5,#4] + |L3.836| +;;;447 } +;;;448 } +;;;449 #endif +;;;450 +;;;451 if(send_point==0) +000344 9800 LDR r0,[sp,#0] +000346 2800 CMP r0,#0 +000348 d101 BNE |L3.846| +;;;452 { +;;;453 Flag_blacklight_EN=0; +00034a 72a8 STRB r0,[r5,#0xa] +;;;454 Flag_touch_count=0; +00034c 7228 STRB r0,[r5,#8] + |L3.846| +;;;455 } +;;;456 touchnum_bak=send_point; +00034e 9800 LDR r0,[sp,#0] +000350 7268 STRB r0,[r5,#9] +;;;457 +;;;458 if (sleep_double_EN == 0) +000352 79a8 LDRB r0,[r5,#6] ; sleep_double_EN +000354 2800 CMP r0,#0 +000356 d11d BNE |L3.916| +;;;459 { +;;;460 if(tp_sleep_in==0) +000358 78e8 LDRB r0,[r5,#3] ; tp_sleep_in +00035a 2800 CMP r0,#0 +00035c d008 BEQ |L3.880| +;;;461 { +;;;462 tp_flag = 1; +;;;463 // sleep_double_EN=0; +;;;464 hal_gpio_set_output_data(g_phone_output_int_pad, IO_LVL_LOW); //TPжϽ,֪ͨAPȡTP +;;;465 } +;;;466 else +;;;467 { +;;;468 if (fingerprint_enable == 1 || fingerprint_enable==0xEE) +00035e 7ae8 LDRB r0,[r5,#0xb] ; fingerprint_enable +000360 2801 CMP r0,#1 +000362 d00c BEQ |L3.894| +000364 28ee CMP r0,#0xee +000366 d00a BEQ |L3.894| +;;;469 { +;;;470 tp_flag = 2; +;;;471 hal_gpio_set_output_data(g_phone_output_int_pad, IO_LVL_LOW); //TPжϽ,֪ͨAPȡTP +;;;472 // TAU_LOGD("tp_flag=%d touchnum=%d tp_sleep_in=%d, fingerprint_enable=0x%x, fingerprint_flag=%d", tp_flag, touchnum, tp_sleep_in, fingerprint_enable, fingerprint_flag); +;;;473 } +;;;474 else if (tp_flag == 3) +000368 7868 LDRB r0,[r5,#1] ; tp_flag +00036a 2803 CMP r0,#3 +00036c d00e BEQ |L3.908| +00036e e011 B |L3.916| + |L3.880| +000370 2001 MOVS r0,#1 ;462 +000372 7068 STRB r0,[r5,#1] ;462 +000374 2100 MOVS r1,#0 ;464 +000376 78a8 LDRB r0,[r5,#2] ;464 ; g_phone_output_int_pad +000378 f7fffffe BL hal_gpio_set_output_data +00037c e00a B |L3.916| + |L3.894| +00037e 2002 MOVS r0,#2 ;470 +000380 7068 STRB r0,[r5,#1] ;470 +000382 2100 MOVS r1,#0 ;471 +000384 78a8 LDRB r0,[r5,#2] ;471 ; g_phone_output_int_pad +000386 f7fffffe BL hal_gpio_set_output_data +00038a e003 B |L3.916| + |L3.908| +;;;475 { +;;;476 // sleep_double_EN = 0; +;;;477 hal_gpio_set_output_data(g_phone_output_int_pad, IO_LVL_LOW); //TPжϽ,֪ͨAPȡTP +00038c 2100 MOVS r1,#0 +00038e 78a8 LDRB r0,[r5,#2] ; g_phone_output_int_pad +000390 f7fffffe BL hal_gpio_set_output_data + |L3.916| +;;;478 } +;;;479 } +;;;480 // TAU_LOGD("tp_flag=%d touchnum=%d tp_sleep_in=%d, fingerprint_enable=0x%x, fingerprint_flag=%d", tp_flag, touchnum, tp_sleep_in, fingerprint_enable, fingerprint_flag); +;;;481 } +;;;482 +;;;483 return screen_reg_int_data_size+1; +000394 2004 MOVS r0,#4 +;;;484 +;;;485 #endif +;;;486 +;;;487 } +000396 b009 ADD sp,sp,#0x24 +000398 bdf0 POP {r4-r7,pc} +;;;488 + ENDP + +00039a 0000 DCW 0x0000 + |L3.924| + DCD ||.data||+0x15be + |L3.928| + DCD ||.data|| + |L3.932| + DCD 0x00000fff + |L3.936| + DCD 0xfffff9af + |L3.940| + DCD 0x0000032f + + AREA ||.bss||, DATA, NOINIT, ALIGN=0 + + phone_data_75_7401_7D02 + % 654 + + AREA ||area_number.6||, DATA, NOINIT, ALIGN=0 + + EXPORTAS ||area_number.6||, ||.bss|| + phone_reg_coord_back_bak + % 200 + + AREA ||.constdata||, DATA, READONLY, ALIGN=0 + + phone_data_21 +000000 80 DCB 0x80 + phone_data_55 +000001 20 DCB 0x20 + phone_data_85_00 +000002 99 DCB 0x99 + phone_data_30 +000003 61 DCB 0x61 +000004 00 DCB 0x00 + phone_data_52 +000005 ac3771 DCB 0xac,0x37,0x71 + phone_data_A3 +000008 17790201 DCB 0x17,0x79,0x02,0x01 + phone_data_A4 +00000c 17790200 DCB 0x17,0x79,0x02,0x00 + phone_data_A5 +000010 17790216 DCB 0x17,0x79,0x02,0x16 + phone_data_AF +000014 00030100 DCB 0x00,0x03,0x01,0x00 + phone_data_F1 +000018 060600a2 DCB 0x06,0x06,0x00,0xa2 + phone_data_22 +00001c 53453771 DCB 0x53,0x45,0x37,0x71 +000020 00 DCB 0x00 + phone_data_60_1 +000021 090010 DCB 0x09,0x00,0x10 +000024 00000000 DCB 0x00,0x00,0x00,0x00 +000028 00000000 DCB 0x00,0x00,0x00,0x00 +00002c 00000000 DCB 0x00,0x00,0x00,0x00 +000030 00 DCB 0x00 + phone_data_23 +000031 100010 DCB 0x10,0x00,0x10 +000034 00043809 DCB 0x00,0x04,0x38,0x09 +000038 60112600 DCB 0x60,0x11,0x26,0x00 + phone_data_85_02 +00003c 01130204 DCB 0x01,0x13,0x02,0x04 +000040 01000350 DCB 0x01,0x00,0x03,0x50 +000044 00000000 DCB 0x00,0x00,0x00,0x00 +000048 00000000 DCB 0x00,0x00,0x00,0x00 +00004c 00000000 DCB 0x00,0x00,0x00,0x00 +000050 00000000 DCB 0x00,0x00,0x00,0x00 +000054 00000100 DCB 0x00,0x00,0x01,0x00 + phone_data_90 +000058 47373730 DCB 0x47,0x37,0x37,0x30 +00005c 00040007 DCB 0x00,0x04,0x00,0x07 +000060 1000 DCB 0x10,0x00 + phone_data_72_03 +000062 fffa DCB 0xff,0xfa +000064 fff2fff2 DCB 0xff,0xf2,0xff,0xf2 +000068 fff5fff4 DCB 0xff,0xf5,0xff,0xf4 +00006c fff5fff2 DCB 0xff,0xf5,0xff,0xf2 +000070 fff5fff4 DCB 0xff,0xf5,0xff,0xf4 +000074 fff2fff3 DCB 0xff,0xf2,0xff,0xf3 +000078 fff3fff3 DCB 0xff,0xf3,0xff,0xf3 +00007c fff2fff5 DCB 0xff,0xf2,0xff,0xf5 +000080 fff4fff0 DCB 0xff,0xf4,0xff,0xf0 +000084 fff2fff2 DCB 0xff,0xf2,0xff,0xf2 +000088 fff2fff1 DCB 0xff,0xf2,0xff,0xf1 +00008c fff3fff1 DCB 0xff,0xf3,0xff,0xf1 +000090 ffefffef DCB 0xff,0xef,0xff,0xef +000094 fff1ffee DCB 0xff,0xf1,0xff,0xee +000098 fff1fff1 DCB 0xff,0xf1,0xff,0xf1 +00009c fff1fff1 DCB 0xff,0xf1,0xff,0xf1 +0000a0 ffeffff0 DCB 0xff,0xef,0xff,0xf0 +0000a4 ffefffec DCB 0xff,0xef,0xff,0xec +0000a8 ffe9ffea DCB 0xff,0xe9,0xff,0xea +0000ac fffafff8 DCB 0xff,0xfa,0xff,0xf8 +0000b0 ffecfff0 DCB 0xff,0xec,0xff,0xf0 +0000b4 ffeffff4 DCB 0xff,0xef,0xff,0xf4 +0000b8 fff7fff6 DCB 0xff,0xf7,0xff,0xf6 +0000bc fff5fff6 DCB 0xff,0xf5,0xff,0xf6 +0000c0 fff6fff3 DCB 0xff,0xf6,0xff,0xf3 +0000c4 fff3fff3 DCB 0xff,0xf3,0xff,0xf3 +0000c8 fff2fff1 DCB 0xff,0xf2,0xff,0xf1 +0000cc fff2fff2 DCB 0xff,0xf2,0xff,0xf2 +0000d0 fff0fff0 DCB 0xff,0xf0,0xff,0xf0 +0000d4 fff2fff1 DCB 0xff,0xf2,0xff,0xf1 +0000d8 fff3ffef DCB 0xff,0xf3,0xff,0xef +0000dc fff1fff1 DCB 0xff,0xf1,0xff,0xf1 +0000e0 ffeffff2 DCB 0xff,0xef,0xff,0xf2 +0000e4 ffefffef DCB 0xff,0xef,0xff,0xef +0000e8 fff3ffef DCB 0xff,0xf3,0xff,0xef +0000ec fff1ffec DCB 0xff,0xf1,0xff,0xec +0000f0 ffedffe8 DCB 0xff,0xed,0xff,0xe8 +0000f4 ffe5ffe2 DCB 0xff,0xe5,0xff,0xe2 +0000f8 fff6fff4 DCB 0xff,0xf6,0xff,0xf4 +0000fc ffeefff6 DCB 0xff,0xee,0xff,0xf6 +000100 fff9fffa DCB 0xff,0xf9,0xff,0xfa +000104 fffbfffe DCB 0xff,0xfb,0xff,0xfe +000108 fffdfffc DCB 0xff,0xfd,0xff,0xfc +00010c fffcfffd DCB 0xff,0xfc,0xff,0xfd +000110 fffdfffb DCB 0xff,0xfd,0xff,0xfb +000114 fffafff7 DCB 0xff,0xfa,0xff,0xf7 +000118 fffafffc DCB 0xff,0xfa,0xff,0xfc +00011c fff8fff6 DCB 0xff,0xf8,0xff,0xf6 +000120 fff8fff9 DCB 0xff,0xf8,0xff,0xf9 +000124 fff9fff9 DCB 0xff,0xf9,0xff,0xf9 +000128 fff9fff9 DCB 0xff,0xf9,0xff,0xf9 +00012c fff9fffc DCB 0xff,0xf9,0xff,0xfc +000130 fff9fff7 DCB 0xff,0xf9,0xff,0xf7 +000134 fff9fff7 DCB 0xff,0xf9,0xff,0xf7 +000138 fff5fff6 DCB 0xff,0xf5,0xff,0xf6 +00013c fff1ffec DCB 0xff,0xf1,0xff,0xec +000140 ffe7ffe2 DCB 0xff,0xe7,0xff,0xe2 +000144 fff8fffa DCB 0xff,0xf8,0xff,0xfa +000148 fff4fff8 DCB 0xff,0xf4,0xff,0xf8 +00014c 00010002 DCB 0x00,0x01,0x00,0x02 +000150 00070006 DCB 0x00,0x07,0x00,0x06 +000154 00030006 DCB 0x00,0x03,0x00,0x06 +000158 00080007 DCB 0x00,0x08,0x00,0x07 +00015c 00030005 DCB 0x00,0x03,0x00,0x05 +000160 00020005 DCB 0x00,0x02,0x00,0x05 +000164 00000002 DCB 0x00,0x00,0x00,0x02 +000168 fffe0000 DCB 0xff,0xfe,0x00,0x00 +00016c 00000003 DCB 0x00,0x00,0x00,0x03 +000170 ffff0001 DCB 0xff,0xff,0x00,0x01 +000174 00010001 DCB 0x00,0x01,0x00,0x01 +000178 00010004 DCB 0x00,0x01,0x00,0x04 +00017c 00010003 DCB 0x00,0x01,0x00,0x03 +000180 00010003 DCB 0x00,0x01,0x00,0x03 +000184 0001fffa DCB 0x00,0x01,0xff,0xfa +000188 fff9fff4 DCB 0xff,0xf9,0xff,0xf4 +00018c ffedffea DCB 0xff,0xed,0xff,0xea +000190 fff8fff8 DCB 0xff,0xf8,0xff,0xf8 +000194 fff4fffa DCB 0xff,0xf4,0xff,0xfa +000198 00000008 DCB 0x00,0x00,0x00,0x08 +00019c 00070008 DCB 0x00,0x07,0x00,0x08 +0001a0 000a000b DCB 0x00,0x0a,0x00,0x0b +0001a4 000b0008 DCB 0x00,0x0b,0x00,0x08 +0001a8 000a0007 DCB 0x00,0x0a,0x00,0x07 +0001ac 00060007 DCB 0x00,0x06,0x00,0x07 +0001b0 00050006 DCB 0x00,0x05,0x00,0x06 +0001b4 00060003 DCB 0x00,0x06,0x00,0x03 +0001b8 00060005 DCB 0x00,0x06,0x00,0x05 +0001bc 00050006 DCB 0x00,0x05,0x00,0x06 +0001c0 00050003 DCB 0x00,0x05,0x00,0x03 +0001c4 00050006 DCB 0x00,0x05,0x00,0x06 +0001c8 00060008 DCB 0x00,0x06,0x00,0x08 +0001cc 00060001 DCB 0x00,0x06,0x00,0x01 +0001d0 00040000 DCB 0x00,0x04,0x00,0x00 +0001d4 fffefff9 DCB 0xff,0xfe,0xff,0xf9 +0001d8 fff0ffea DCB 0xff,0xf0,0xff,0xea +0001dc fff7fffa DCB 0xff,0xf7,0xff,0xfa +0001e0 fff60000 DCB 0xff,0xf6,0x00,0x00 +0001e4 00040008 DCB 0x00,0x04,0x00,0x08 +0001e8 00090010 DCB 0x00,0x09,0x00,0x10 +0001ec 00100011 DCB 0x00,0x10,0x00,0x11 +0001f0 000d000e DCB 0x00,0x0d,0x00,0x0e +0001f4 000a0009 DCB 0x00,0x0a,0x00,0x09 +0001f8 000a0009 DCB 0x00,0x0a,0x00,0x09 +0001fc 00090006 DCB 0x00,0x09,0x00,0x06 +000200 00080009 DCB 0x00,0x08,0x00,0x09 +000204 00060007 DCB 0x00,0x06,0x00,0x07 +000208 00070008 DCB 0x00,0x07,0x00,0x08 +00020c 00090009 DCB 0x00,0x09,0x00,0x09 +000210 0009000a DCB 0x00,0x09,0x00,0x0a +000214 000e000e DCB 0x00,0x0e,0x00,0x0e +000218 00080009 DCB 0x00,0x08,0x00,0x09 +00021c 00060004 DCB 0x00,0x06,0x00,0x04 +000220 0002fff7 DCB 0x00,0x02,0xff,0xf7 +000224 fff0ffe8 DCB 0xff,0xf0,0xff,0xe8 +000228 fff7fffa DCB 0xff,0xf7,0xff,0xfa +00022c fffa0000 DCB 0xff,0xfa,0x00,0x00 +000230 0008000c DCB 0x00,0x08,0x00,0x0c +000234 000d0010 DCB 0x00,0x0d,0x00,0x10 +000238 0010000f DCB 0x00,0x10,0x00,0x0f +00023c 0011000e DCB 0x00,0x11,0x00,0x0e +000240 000c000d DCB 0x00,0x0c,0x00,0x0d +000244 000a000b DCB 0x00,0x0a,0x00,0x0b +000248 000b000a DCB 0x00,0x0b,0x00,0x0a +00024c 000a0009 DCB 0x00,0x0a,0x00,0x09 +000250 000a0007 DCB 0x00,0x0a,0x00,0x07 +000254 0009000a DCB 0x00,0x09,0x00,0x0a +000258 00090009 DCB 0x00,0x09,0x00,0x09 +00025c 0009000c DCB 0x00,0x09,0x00,0x0c +000260 000e000e DCB 0x00,0x0e,0x00,0x0e +000264 000c000d DCB 0x00,0x0c,0x00,0x0d +000268 000a0006 DCB 0x00,0x0a,0x00,0x06 +00026c 0000fff9 DCB 0x00,0x00,0xff,0xf9 +000270 fff0ffe8 DCB 0xff,0xf0,0xff,0xe8 +000274 fff7fffc DCB 0xff,0xf7,0xff,0xfc +000278 fff80002 DCB 0xff,0xf8,0x00,0x02 +00027c 000c000c DCB 0x00,0x0c,0x00,0x0c +000280 00110010 DCB 0x00,0x11,0x00,0x10 +000284 00120013 DCB 0x00,0x12,0x00,0x13 +000288 00110010 DCB 0x00,0x11,0x00,0x10 +00028c 0010000d DCB 0x00,0x10,0x00,0x0d +000290 000e000b DCB 0x00,0x0e,0x00,0x0b +000294 0009000a DCB 0x00,0x09,0x00,0x0a +000298 000c000d DCB 0x00,0x0c,0x00,0x0d +00029c 000a000b DCB 0x00,0x0a,0x00,0x0b +0002a0 00090008 DCB 0x00,0x09,0x00,0x08 +0002a4 000b000d DCB 0x00,0x0b,0x00,0x0d +0002a8 000b000c DCB 0x00,0x0b,0x00,0x0c +0002ac 000e000c DCB 0x00,0x0e,0x00,0x0c +0002b0 000e000f DCB 0x00,0x0e,0x00,0x0f +0002b4 000c0006 DCB 0x00,0x0c,0x00,0x06 +0002b8 0000fff9 DCB 0x00,0x00,0xff,0xf9 +0002bc fff0ffea DCB 0xff,0xf0,0xff,0xea +0002c0 fff9ffff DCB 0xff,0xf9,0xff,0xff +0002c4 fffb0000 DCB 0xff,0xfb,0x00,0x00 +0002c8 000a000d DCB 0x00,0x0a,0x00,0x0d +0002cc 00130014 DCB 0x00,0x13,0x00,0x14 +0002d0 00130014 DCB 0x00,0x13,0x00,0x14 +0002d4 00130011 DCB 0x00,0x13,0x00,0x11 +0002d8 00110010 DCB 0x00,0x11,0x00,0x10 +0002dc 000e000f DCB 0x00,0x0e,0x00,0x0f +0002e0 000d000d DCB 0x00,0x0d,0x00,0x0d +0002e4 0010000d DCB 0x00,0x10,0x00,0x0d +0002e8 000e000a DCB 0x00,0x0e,0x00,0x0a +0002ec 000c000e DCB 0x00,0x0c,0x00,0x0e +0002f0 000d000c DCB 0x00,0x0d,0x00,0x0c +0002f4 000d000f DCB 0x00,0x0d,0x00,0x0f +0002f8 0010000e DCB 0x00,0x10,0x00,0x0e +0002fc 000e000c DCB 0x00,0x0e,0x00,0x0c +000300 000f000a DCB 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0x01,0x24,0x01,0x3b +000f64 0139013a DCB 0x01,0x39,0x01,0x3a +000f68 013c013c DCB 0x01,0x3c,0x01,0x3c +000f6c 013c013e DCB 0x01,0x3c,0x01,0x3e +000f70 013e013f DCB 0x01,0x3e,0x01,0x3f +000f74 01440144 DCB 0x01,0x44,0x01,0x44 +000f78 01460144 DCB 0x01,0x46,0x01,0x44 +000f7c 0147014a DCB 0x01,0x47,0x01,0x4a +000f80 014e014c DCB 0x01,0x4e,0x01,0x4c +000f84 00db DCB 0x00,0xdb + sleep_on +000f86 4601 DCB 0x46,0x01 +000f88 2b85f400 DCB 0x2b,0x85,0xf4,0x00 +000f8c 00000000 DCB 0x00,0x00,0x00,0x00 +000f90 00000000 DCB 0x00,0x00,0x00,0x00 +000f94 0000 DCB 0x00,0x00 + sleep_click_on +000f96 5200 DCB 0x52,0x00 +000f98 2341cd00 DCB 0x23,0x41,0xcd,0x00 +000f9c 00000000 DCB 0x00,0x00,0x00,0x00 +000fa0 00000000 DCB 0x00,0x00,0x00,0x00 +000fa4 0000 DCB 0x00,0x00 + + AREA ||area_number.9||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.9||, ||.constdata|| + phone_data_60_2 +000000 1d610202 DCB 0x1d,0x61,0x02,0x02 +000004 06000000 DCB 0x06,0x00,0x00,0x00 +000008 00000000 DCB 0x00,0x00,0x00,0x00 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.10||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.10||, ||.constdata|| + phone_data_60_3 +000000 1d610600 DCB 0x1d,0x61,0x06,0x00 +000004 02020000 DCB 0x02,0x02,0x00,0x00 +000008 00000000 DCB 0x00,0x00,0x00,0x00 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.11||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.11||, ||.constdata|| + phone_data_60_4 +000000 1d410000 DCB 0x1d,0x41,0x00,0x00 +000004 00000000 DCB 0x00,0x00,0x00,0x00 +000008 00000000 DCB 0x00,0x00,0x00,0x00 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.12||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.12||, ||.constdata|| + phone_data_60_5 +000000 1d610502 DCB 0x1d,0x61,0x05,0x02 +000004 02000000 DCB 0x02,0x00,0x00,0x00 +000008 00000000 DCB 0x00,0x00,0x00,0x00 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.13||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.13||, ||.constdata|| + phone_data_60_6 +000000 1d610202 DCB 0x1d,0x61,0x02,0x02 +000004 05020000 DCB 0x05,0x02,0x00,0x00 +000008 00000000 DCB 0x00,0x00,0x00,0x00 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.14||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.14||, ||.constdata|| + phone_data_60_7 +000000 1d610502 DCB 0x1d,0x61,0x05,0x02 +000004 02020000 DCB 0x02,0x02,0x00,0x00 +000008 00000000 DCB 0x00,0x00,0x00,0x00 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.15||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.15||, ||.constdata|| + phone_data_60_8 +000000 09010100 DCB 0x09,0x01,0x01,0x00 +000004 00000000 DCB 0x00,0x00,0x00,0x00 +000008 00000000 DCB 0x00,0x00,0x00,0x00 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.16||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.16||, ||.constdata|| + phone_data_92_F0 +000000 8a25 DCB 0x8a,0x25 + + AREA ||area_number.17||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.17||, ||.constdata|| + phone_data_92_0A +000000 f300a200 DCB 0xf3,0x00,0xa2,0x00 +000004 f300 DCB 0xf3,0x00 + + AREA ||area_number.18||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.18||, ||.constdata|| + phone_data_92_15 +000000 12122900 DCB 0x12,0x12,0x29,0x00 + + AREA ||area_number.19||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.19||, ||.constdata|| + phone_data_F5_1 +000000 ff DCB 0xff + + AREA ||area_number.20||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.20||, ||.constdata|| + phone_data_F5_2 +000000 13 DCB 0x13 + + AREA ||area_number.21||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.21||, ||.constdata|| + phone_data_F5_3 +000000 00 DCB 0x00 + + AREA ||area_number.22||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.22||, ||.constdata|| + phone_data_F5_4 +000000 06 DCB 0x06 + + AREA ||area_number.23||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.23||, ||.constdata|| + phone_data_F6_1 +000000 faf4fb09 DCB 0xfa,0xf4,0xfb,0x09 +000004 fb09 DCB 0xfb,0x09 + + AREA ||area_number.24||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.24||, ||.constdata|| + phone_data_F6_2 +000000 252323e1 DCB 0x25,0x23,0x23,0xe1 +000004 2186 DCB 0x21,0x86 + + AREA ||area_number.25||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.25||, ||.constdata|| + phone_data_F6_3 +000000 00010001 DCB 0x00,0x01,0x00,0x01 +000004 0000 DCB 0x00,0x00 + + AREA ||area_number.26||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.26||, ||.constdata|| + phone_data_F6_4 +000000 00020000 DCB 0x00,0x02,0x00,0x00 +000004 0000 DCB 0x00,0x00 + + AREA ||area_number.27||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.27||, ||.constdata|| + screen_87_data +000000 87 DCB 0x87 + + AREA ||area_number.28||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.28||, ||.constdata|| + screen_a0_00_ff_data +000000 a000ff DCB 0xa0,0x00,0xff + + AREA ||area_number.29||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.29||, ||.constdata|| + screen_a4_06_c1_data +000000 a406c1 DCB 0xa4,0x06,0xc1 + + AREA ||area_number.30||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.30||, ||.constdata|| + screen_reg_int_data_size +000000 03 DCB 0x03 + + AREA ||area_number.31||, DATA, READONLY, ALIGN=0 + + EXPORTAS ||area_number.31||, ||.constdata|| + screen_reg_start_data_size +000000 04 DCB 0x04 + + AREA ||.data||, DATA, ALIGN=1 + + phone_data_E4 +000000 01 DCB 0x01 + tp_flag +000001 00 DCB 0x00 + g_phone_output_int_pad +000002 02 DCB 0x02 + tp_sleep_in +000003 01 DCB 0x01 + tp_sleep_count +000004 00 DCB 0x00 + tp_sleep_clk_count +000005 00 DCB 0x00 + sleep_double_EN +000006 00 DCB 0x00 + Flag_EA_EN +000007 00 DCB 0x00 + Flag_touch_count +000008 00 DCB 0x00 + touchnum_bak +000009 00 DCB 0x00 + Flag_blacklight_EN +00000a 00 DCB 0x00 + fingerprint_enable +00000b 00 DCB 0x00 + app_tp_count +00000c 00 DCB 0x00 + phone_85_flag +00000d 00 DCB 0x00 + phone_E4_flag +00000e 00 DCB 0x00 + phone_72_flag +00000f 00 DCB 0x00 + phone_75_flag +000010 00 DCB 0x00 + phone_92_flag +000011 00 DCB 0x00 + phone_74_flag +000012 00 DCB 0x00 + phone_data_B1 +000013 00 DCB 0x00 +000014 8200 DCB 0x82,0x00 + u16CoordY +000016 0000 DCB 0x00,0x00 + u16CoordX +000018 0000 DCB 0x00,0x00 + u16CoordY_back +00001a 0000 DCB 0x00,0x00 + u16CoordX_back +00001c 0000 DCB 0x00,0x00 + phone_data_72_13 +00001e 02bc DCB 0x02,0xbc +000020 0307030c DCB 0x03,0x07,0x03,0x0c +000024 03160325 DCB 0x03,0x16,0x03,0x25 +000028 032f033e DCB 0x03,0x2f,0x03,0x3e +00002c 034d0357 DCB 0x03,0x4d,0x03,0x57 +000030 0361036b DCB 0x03,0x61,0x03,0x6b +000034 037a0389 DCB 0x03,0x7a,0x03,0x89 +000038 038e0389 DCB 0x03,0x8e,0x03,0x89 +00003c 0393039d DCB 0x03,0x93,0x03,0x9d +000040 03a703b1 DCB 0x03,0xa7,0x03,0xb1 +000044 03b10393 DCB 0x03,0xb1,0x03,0x93 +000048 03a203ac DCB 0x03,0xa2,0x03,0xac +00004c 03b103bb DCB 0x03,0xb1,0x03,0xbb +000050 03c003c5 DCB 0x03,0xc0,0x03,0xc5 +000054 03c503ca DCB 0x03,0xc5,0x03,0xca +000058 03d403d9 DCB 0x03,0xd4,0x03,0xd9 +00005c 03de03de DCB 0x03,0xde,0x03,0xde +000060 03de03e3 DCB 0x03,0xde,0x03,0xe3 +000064 03e803f7 DCB 0x03,0xe8,0x03,0xf7 +000068 030702b2 DCB 0x03,0x07,0x02,0xb2 +00006c 02f80302 DCB 0x02,0xf8,0x03,0x02 +000070 0307030c DCB 0x03,0x07,0x03,0x0c +000074 03250334 DCB 0x03,0x25,0x03,0x34 +000078 033e0348 DCB 0x03,0x3e,0x03,0x48 +00007c 0352035c DCB 0x03,0x52,0x03,0x5c +000080 036b0375 DCB 0x03,0x6b,0x03,0x75 +000084 037a0375 DCB 0x03,0x7a,0x03,0x75 +000088 0389038e DCB 0x03,0x89,0x03,0x8e +00008c 039803a2 DCB 0x03,0x98,0x03,0xa2 +000090 03a70389 DCB 0x03,0xa7,0x03,0x89 +000094 0398039d DCB 0x03,0x98,0x03,0x9d +000098 03a703b1 DCB 0x03,0xa7,0x03,0xb1 +00009c 03b603bb DCB 0x03,0xb6,0x03,0xbb +0000a0 03bb03c0 DCB 0x03,0xbb,0x03,0xc0 +0000a4 03c503ca DCB 0x03,0xc5,0x03,0xca +0000a8 03cf03d4 DCB 0x03,0xcf,0x03,0xd4 +0000ac 03d403d4 DCB 0x03,0xd4,0x03,0xd4 +0000b0 03d903d9 DCB 0x03,0xd9,0x03,0xd9 +0000b4 02f802b2 DCB 0x02,0xf8,0x02,0xb2 +0000b8 02f302fd DCB 0x02,0xf3,0x02,0xfd +0000bc 0307030c DCB 0x03,0x07,0x03,0x0c +0000c0 0316032f DCB 0x03,0x16,0x03,0x2f +0000c4 033e0348 DCB 0x03,0x3e,0x03,0x48 +0000c8 0352035c DCB 0x03,0x52,0x03,0x5c +0000cc 03660375 DCB 0x03,0x66,0x03,0x75 +0000d0 03750375 DCB 0x03,0x75,0x03,0x75 +0000d4 0384038e DCB 0x03,0x84,0x03,0x8e +0000d8 039803a2 DCB 0x03,0x98,0x03,0xa2 +0000dc 03a20389 DCB 0x03,0xa2,0x03,0x89 +0000e0 0398039d DCB 0x03,0x98,0x03,0x9d +0000e4 03a703ac DCB 0x03,0xa7,0x03,0xac +0000e8 03b603bb DCB 0x03,0xb6,0x03,0xbb +0000ec 03bb03c0 DCB 0x03,0xbb,0x03,0xc0 +0000f0 03c503ca DCB 0x03,0xc5,0x03,0xca +0000f4 03cf03d4 DCB 0x03,0xcf,0x03,0xd4 +0000f8 03d403d4 DCB 0x03,0xd4,0x03,0xd4 +0000fc 03d903d4 DCB 0x03,0xd9,0x03,0xd4 +000100 02f802da DCB 0x02,0xf8,0x02,0xda +000104 02f302fd DCB 0x02,0xf3,0x02,0xfd +000108 0302030c DCB 0x03,0x02,0x03,0x0c +00010c 03200334 DCB 0x03,0x20,0x03,0x34 +000110 033e0348 DCB 0x03,0x3e,0x03,0x48 +000114 03570361 DCB 0x03,0x57,0x03,0x61 +000118 036b0375 DCB 0x03,0x6b,0x03,0x75 +00011c 037a0375 DCB 0x03,0x7a,0x03,0x75 +000120 037f038e DCB 0x03,0x7f,0x03,0x8e +000124 039303a2 DCB 0x03,0x93,0x03,0xa2 +000128 039d038e DCB 0x03,0x9d,0x03,0x8e +00012c 039d03a7 DCB 0x03,0x9d,0x03,0xa7 +000130 03b103b6 DCB 0x03,0xb1,0x03,0xb6 +000134 03c003c0 DCB 0x03,0xc0,0x03,0xc0 +000138 03c503ca DCB 0x03,0xc5,0x03,0xca +00013c 03cf03d4 DCB 0x03,0xcf,0x03,0xd4 +000140 03d903de DCB 0x03,0xd9,0x03,0xde +000144 03de03de DCB 0x03,0xde,0x03,0xde +000148 03de03de DCB 0x03,0xde,0x03,0xde +00014c 034d0014 DCB 0x03,0x4d,0x00,0x14 +000150 00000000 DCB 0x00,0x00,0x00,0x00 +000154 00000000 DCB 0x00,0x00,0x00,0x00 +000158 00000000 DCB 0x00,0x00,0x00,0x00 +00015c fffb0000 DCB 0xff,0xfb,0x00,0x00 +000160 00000000 DCB 0x00,0x00,0x00,0x00 +000164 00000000 DCB 0x00,0x00,0x00,0x00 +000168 fffb0000 DCB 0xff,0xfb,0x00,0x00 +00016c 00000000 DCB 0x00,0x00,0x00,0x00 +000170 00000000 DCB 0x00,0x00,0x00,0x00 +000174 0000fff6 DCB 0x00,0x00,0xff,0xf6 +000178 fff6fff6 DCB 0xff,0xf6,0xff,0xf6 +00017c fff6fff6 DCB 0xff,0xf6,0xff,0xf6 +000180 fff6fff6 DCB 0xff,0xf6,0xff,0xf6 +000184 fff6fff6 DCB 0xff,0xf6,0xff,0xf6 +000188 fff6fff6 DCB 0xff,0xf6,0xff,0xf6 +00018c fff6fff6 DCB 0xff,0xf6,0xff,0xf6 +000190 fff6fff6 DCB 0xff,0xf6,0xff,0xf6 +000194 fffbfff6 DCB 0xff,0xfb,0xff,0xf6 +000198 ffddfffb DCB 0xff,0xdd,0xff,0xfb +00019c 00000005 DCB 0x00,0x00,0x00,0x05 +0001a0 fffbfffb DCB 0xff,0xfb,0xff,0xfb +0001a4 00000000 DCB 0x00,0x00,0x00,0x00 +0001a8 0000fffb DCB 0x00,0x00,0xff,0xfb +0001ac 00000000 DCB 0x00,0x00,0x00,0x00 +0001b0 00000000 DCB 0x00,0x00,0x00,0x00 +0001b4 fffbfffb DCB 0xff,0xfb,0xff,0xfb +0001b8 00000000 DCB 0x00,0x00,0x00,0x00 +0001bc 00000000 DCB 0x00,0x00,0x00,0x00 +0001c0 00000000 DCB 0x00,0x00,0x00,0x00 +0001c4 fffbfffb DCB 0xff,0xfb,0xff,0xfb +0001c8 fffbfffb DCB 0xff,0xfb,0xff,0xfb +0001cc fffbfffb DCB 0xff,0xfb,0xff,0xfb +0001d0 fffbfffb DCB 0xff,0xfb,0xff,0xfb +0001d4 fffbfffb DCB 0xff,0xfb,0xff,0xfb +0001d8 fffbfffb DCB 0xff,0xfb,0xff,0xfb +0001dc fffbfffb DCB 0xff,0xfb,0xff,0xfb +0001e0 fffb0000 DCB 0xff,0xfb,0x00,0x00 +0001e4 ffe2fff6 DCB 0xff,0xe2,0xff,0xf6 +0001e8 00050000 DCB 0x00,0x05,0x00,0x00 +0001ec 00050000 DCB 0x00,0x05,0x00,0x00 +0001f0 00000000 DCB 0x00,0x00,0x00,0x00 +0001f4 00000000 DCB 0x00,0x00,0x00,0x00 +0001f8 00000000 DCB 0x00,0x00,0x00,0x00 +0001fc 00000000 DCB 0x00,0x00,0x00,0x00 +000200 00050000 DCB 0x00,0x05,0x00,0x00 +000204 00000000 DCB 0x00,0x00,0x00,0x00 +000208 00000005 DCB 0x00,0x00,0x00,0x05 +00020c 0005fffb DCB 0x00,0x05,0xff,0xfb +000210 fffb0000 DCB 0xff,0xfb,0x00,0x00 +000214 00000000 DCB 0x00,0x00,0x00,0x00 +000218 00000000 DCB 0x00,0x00,0x00,0x00 +00021c 00000000 DCB 0x00,0x00,0x00,0x00 +000220 0000fffb DCB 0x00,0x00,0xff,0xfb +000224 00000000 DCB 0x00,0x00,0x00,0x00 +000228 fffbfffb DCB 0xff,0xfb,0xff,0xfb +00022c 00000000 DCB 0x00,0x00,0x00,0x00 +000230 ffe70028 DCB 0xff,0xe7,0x00,0x28 +000234 000a000a DCB 0x00,0x0a,0x00,0x0a +000238 000a000a DCB 0x00,0x0a,0x00,0x0a +00023c 000a000a DCB 0x00,0x0a,0x00,0x0a +000240 000a0005 DCB 0x00,0x0a,0x00,0x05 +000244 000a000a DCB 0x00,0x0a,0x00,0x0a +000248 00050005 DCB 0x00,0x05,0x00,0x05 +00024c 00050005 DCB 0x00,0x05,0x00,0x05 +000250 00050005 DCB 0x00,0x05,0x00,0x05 +000254 0005000a DCB 0x00,0x05,0x00,0x0a +000258 000a000a DCB 0x00,0x0a,0x00,0x0a +00025c 000a000a DCB 0x00,0x0a,0x00,0x0a +000260 000a000a DCB 0x00,0x0a,0x00,0x0a +000264 000a000a DCB 0x00,0x0a,0x00,0x0a +000268 000a000a DCB 0x00,0x0a,0x00,0x0a +00026c 000a000a DCB 0x00,0x0a,0x00,0x0a +000270 000a000a DCB 0x00,0x0a,0x00,0x0a +000274 000a000f DCB 0x00,0x0a,0x00,0x0f +000278 000f0014 DCB 0x00,0x0f,0x00,0x14 +00027c 002d02b2 DCB 0x00,0x2d,0x02,0xb2 +000280 02d502df DCB 0x02,0xd5,0x02,0xdf +000284 02e902ee DCB 0x02,0xe9,0x02,0xee +000288 02f80307 DCB 0x02,0xf8,0x03,0x07 +00028c 0320032f DCB 0x03,0x20,0x03,0x2f +000290 03390343 DCB 0x03,0x39,0x03,0x43 +000294 0352035c DCB 0x03,0x52,0x03,0x5c +000298 0361035c DCB 0x03,0x61,0x03,0x5c +00029c 03660370 DCB 0x03,0x66,0x03,0x70 +0002a0 03750384 DCB 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0x00,0x00,0x00,0x00 +000424 fffbfffb DCB 0xff,0xfb,0xff,0xfb +000428 fffbfffb DCB 0xff,0xfb,0xff,0xfb +00042c fffbfffb DCB 0xff,0xfb,0xff,0xfb +000430 fffbfffb DCB 0xff,0xfb,0xff,0xfb +000434 fffbfffb DCB 0xff,0xfb,0xff,0xfb +000438 fffbfffb DCB 0xff,0xfb,0xff,0xfb +00043c fffbfffb DCB 0xff,0xfb,0xff,0xfb +000440 fffbffc9 DCB 0xff,0xfb,0xff,0xc9 +000444 ffc9fff1 DCB 0xff,0xc9,0xff,0xf1 +000448 00000000 DCB 0x00,0x00,0x00,0x00 +00044c 00000000 DCB 0x00,0x00,0x00,0x00 +000450 fffb0000 DCB 0xff,0xfb,0x00,0x00 +000454 0000fffb DCB 0x00,0x00,0xff,0xfb +000458 0000fffb DCB 0x00,0x00,0xff,0xfb +00045c 0000fffb DCB 0x00,0x00,0xff,0xfb +000460 fffb0000 DCB 0xff,0xfb,0x00,0x00 +000464 fffb0000 DCB 0xff,0xfb,0x00,0x00 +000468 00000000 DCB 0x00,0x00,0x00,0x00 +00046c 0000fff6 DCB 0x00,0x00,0xff,0xf6 +000470 fffbfffb DCB 0xff,0xfb,0xff,0xfb +000474 fffbfffb DCB 0xff,0xfb,0xff,0xfb +000478 fffbfffb DCB 0xff,0xfb,0xff,0xfb +00047c fffbfffb DCB 0xff,0xfb,0xff,0xfb +000480 fffbfffb DCB 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0x02,0xdf,0x02,0xe4 +0004e4 02ee02f3 DCB 0x02,0xee,0x02,0xf3 +0004e8 02fd030c DCB 0x02,0xfd,0x03,0x0c +0004ec 0325032f DCB 0x03,0x25,0x03,0x2f +0004f0 033e0348 DCB 0x03,0x3e,0x03,0x48 +0004f4 0352035c DCB 0x03,0x52,0x03,0x5c +0004f8 0361035c DCB 0x03,0x61,0x03,0x5c +0004fc 03660370 DCB 0x03,0x66,0x03,0x70 +000500 0375037f DCB 0x03,0x75,0x03,0x7f +000504 0384037f DCB 0x03,0x84,0x03,0x7f +000508 039803a2 DCB 0x03,0x98,0x03,0xa2 +00050c 03ac03b1 DCB 0x03,0xac,0x03,0xb1 +000510 03b603bb DCB 0x03,0xb6,0x03,0xbb +000514 03bb03c0 DCB 0x03,0xbb,0x03,0xc0 +000518 03c503cf DCB 0x03,0xc5,0x03,0xcf +00051c 03cf03d4 DCB 0x03,0xcf,0x03,0xd4 +000520 03d903d9 DCB 0x03,0xd9,0x03,0xd9 +000524 03de03ed DCB 0x03,0xde,0x03,0xed +000528 0302 DCB 0x03,0x02 + phone_data_75_7401_7D01 +00052a 4654 DCB 0x46,0x54 +00052c 52590102 DCB 0x52,0x59,0x01,0x02 +000530 f400ed06 DCB 0xf4,0x00,0xed,0x06 +000534 06070708 DCB 0x06,0x07,0x07,0x08 +000538 080b0a0c DCB 0x08,0x0b,0x0a,0x0c +00053c 0e0c0d0c DCB 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0x19,0x1d,0x1a,0x1c +0005a0 1e1e1ef7 DCB 0x1e,0x1e,0x1e,0xf7 +0005a4 f90c0c0e DCB 0xf9,0x0c,0x0c,0x0e +0005a8 0f101013 DCB 0x0f,0x10,0x10,0x13 +0005ac 12141413 DCB 0x12,0x14,0x14,0x13 +0005b0 14131514 DCB 0x14,0x13,0x15,0x14 +0005b4 17151815 DCB 0x17,0x15,0x18,0x15 +0005b8 19181819 DCB 0x19,0x18,0x18,0x19 +0005bc 19191919 DCB 0x19,0x19,0x19,0x19 +0005c0 191e1d1e DCB 0x19,0x1e,0x1d,0x1e +0005c4 1e1e1f20 DCB 0x1e,0x1e,0x1f,0x20 +0005c8 1ef8f60e DCB 0x1e,0xf8,0xf6,0x0e +0005cc 0e0f1010 DCB 0x0e,0x0f,0x10,0x10 +0005d0 11141214 DCB 0x11,0x14,0x12,0x14 +0005d4 15131414 DCB 0x15,0x13,0x14,0x14 +0005d8 15151816 DCB 0x15,0x15,0x18,0x16 +0005dc 19161919 DCB 0x19,0x16,0x19,0x19 +0005e0 191c191b DCB 0x19,0x1c,0x19,0x1b +0005e4 1c1c1d1e DCB 0x1c,0x1c,0x1d,0x1e +0005e8 1e1e1e1e DCB 0x1e,0x1e,0x1e,0x1e +0005ec 20211ff8 DCB 0x20,0x21,0x1f,0xf8 +0005f0 f40f0f0f DCB 0xf4,0x0f,0x0f,0x0f +0005f4 10111214 DCB 0x10,0x11,0x12,0x14 +0005f8 12151514 DCB 0x12,0x15,0x15,0x14 +0005fc 15141615 DCB 0x15,0x14,0x16,0x15 +000600 19161918 DCB 0x19,0x16,0x19,0x18 +000604 1a19191c DCB 0x1a,0x19,0x19,0x1c +000608 1a1c1d1c DCB 0x1a,0x1c,0x1d,0x1c +00060c 1c1e1e1f DCB 0x1c,0x1e,0x1e,0x1f +000610 1e1f2022 DCB 0x1e,0x1f,0x20,0x22 +000614 1ff8f60e DCB 0x1f,0xf8,0xf6,0x0e +000618 0e0f1011 DCB 0x0e,0x0f,0x10,0x11 +00061c 11141315 DCB 0x11,0x14,0x13,0x15 +000620 15141514 DCB 0x15,0x14,0x15,0x14 +000624 16151915 DCB 0x16,0x15,0x19,0x15 +000628 19161919 DCB 0x19,0x16,0x19,0x19 +00062c 191c1a1d DCB 0x19,0x1c,0x1a,0x1d +000630 1d1d1d1e DCB 0x1d,0x1d,0x1d,0x1e +000634 1e1f1e1e DCB 0x1e,0x1f,0x1e,0x1e +000638 20211ff8 DCB 0x20,0x21,0x1f,0xf8 +00063c f80c0c0d DCB 0xf8,0x0c,0x0c,0x0d +000640 0f101113 DCB 0x0f,0x10,0x11,0x13 +000644 12141514 DCB 0x12,0x14,0x15,0x14 +000648 15151615 DCB 0x15,0x15,0x16,0x15 +00064c 19181918 DCB 0x19,0x18,0x19,0x18 +000650 1d191b1d DCB 0x1d,0x19,0x1b,0x1d +000654 1d1e1e1f DCB 0x1d,0x1e,0x1e,0x1f +000658 1f212021 DCB 0x1f,0x21,0x20,0x21 +00065c 21222324 DCB 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0x23,0xfc,0xff,0x23 +0012b8 21212323 DCB 0x21,0x21,0x23,0x23 +0012bc 23252123 DCB 0x23,0x25,0x21,0x23 +0012c0 2321211f DCB 0x23,0x21,0x21,0x1f +0012c4 211f231f DCB 0x21,0x1f,0x23,0x1f +0012c8 211c2321 DCB 0x21,0x1c,0x23,0x21 +0012cc 21212121 DCB 0x21,0x21,0x21,0x21 +0012d0 23212123 DCB 0x23,0x21,0x21,0x23 +0012d4 23232323 DCB 0x23,0x23,0x23,0x23 +0012d8 232523fc DCB 0x23,0x25,0x23,0xfc +0012dc 00212121 DCB 0x00,0x21,0x21,0x21 +0012e0 21232323 DCB 0x21,0x23,0x23,0x23 +0012e4 21232321 DCB 0x21,0x23,0x23,0x21 +0012e8 211f211f DCB 0x21,0x1f,0x21,0x1f +0012ec 211c211c DCB 0x21,0x1c,0x21,0x1c +0012f0 23212121 DCB 0x23,0x21,0x21,0x21 +0012f4 21212121 DCB 0x21,0x21,0x21,0x21 +0012f8 21232123 DCB 0x21,0x23,0x21,0x23 +0012fc 21232323 DCB 0x21,0x23,0x23,0x23 +001300 23fa0521 DCB 0x23,0xfa,0x05,0x21 +001304 21212123 DCB 0x21,0x21,0x21,0x23 +001308 21232123 DCB 0x21,0x23,0x21,0x23 +00130c 231f211f DCB 0x23,0x1f,0x21,0x1f +001310 211f231f DCB 0x21,0x1f,0x23,0x1f +001314 1f1c2321 DCB 0x1f,0x1c,0x23,0x21 +001318 1f212121 DCB 0x1f,0x21,0x21,0x21 +00131c 21212123 DCB 0x21,0x21,0x21,0x23 +001320 21232121 DCB 0x21,0x23,0x21,0x21 +001324 21231ffa DCB 0x21,0x23,0x1f,0xfa +001328 07212121 DCB 0x07,0x21,0x21,0x21 +00132c 21232123 DCB 0x21,0x23,0x21,0x23 +001330 2123231f DCB 0x21,0x23,0x23,0x1f +001334 211f211f DCB 0x21,0x1f,0x21,0x1f +001338 231c1f1c DCB 0x23,0x1c,0x1f,0x1c +00133c 23211f21 DCB 0x23,0x21,0x1f,0x21 +001340 21212121 DCB 0x21,0x21,0x21,0x21 +001344 21232123 DCB 0x21,0x23,0x21,0x23 +001348 21212323 DCB 0x21,0x21,0x23,0x23 +00134c 02d70521 DCB 0x02,0xd7,0x05,0x21 +001350 211f2121 DCB 0x21,0x1f,0x21,0x21 +001354 21232121 DCB 0x21,0x23,0x21,0x21 +001358 231f1f1f DCB 0x23,0x1f,0x1f,0x1f +00135c 1f1f211c DCB 0x1f,0x1f,0x21,0x1c +001360 211c2721 DCB 0x21,0x1c,0x27,0x21 +001364 1f211f1f DCB 0x1f,0x21,0x1f,0x1f +001368 211f1f23 DCB 0x21,0x1f,0x1f,0x23 +00136c 21212121 DCB 0x21,0x21,0x21,0x21 +001370 23231ffa DCB 0x23,0x23,0x1f,0xfa +001374 0021211f DCB 0x00,0x21,0x21,0x1f +001378 21212123 DCB 0x21,0x21,0x21,0x23 +00137c 1f21231f DCB 0x1f,0x21,0x23,0x1f +001380 211f1f1f DCB 0x21,0x1f,0x1f,0x1f +001384 211c1f1c DCB 0x21,0x1c,0x1f,0x1c +001388 231f1f21 DCB 0x23,0x1f,0x1f,0x21 +00138c 211f211f DCB 0x21,0x1f,0x21,0x1f +001390 1f212123 DCB 0x1f,0x21,0x21,0x23 +001394 21212323 DCB 0x21,0x21,0x23,0x23 +001398 21fafc21 DCB 0x21,0xfa,0xfc,0x21 +00139c 211f2121 DCB 0x21,0x1f,0x21,0x21 +0013a0 21232123 DCB 0x21,0x23,0x21,0x23 +0013a4 211f211f DCB 0x21,0x1f,0x21,0x1f +0013a8 1f1f211c DCB 0x1f,0x1f,0x21,0x1c +0013ac 1f1c2321 DCB 0x1f,0x1c,0x23,0x21 +0013b0 1f211f1f DCB 0x1f,0x21,0x1f,0x1f +0013b4 21211f23 DCB 0x21,0x21,0x1f,0x23 +0013b8 21212121 DCB 0x21,0x21,0x21,0x21 +0013bc 232321fa DCB 0x23,0x23,0x21,0xfa +0013c0 00211f1f DCB 0x00,0x21,0x1f,0x1f +0013c4 21212123 DCB 0x21,0x21,0x21,0x23 +0013c8 2123211f DCB 0x21,0x23,0x21,0x1f +0013cc 211f1f1f DCB 0x21,0x1f,0x1f,0x1f +0013d0 211c211c DCB 0x21,0x1c,0x21,0x1c +0013d4 231f1f21 DCB 0x23,0x1f,0x1f,0x21 +0013d8 211f211f DCB 0x21,0x1f,0x21,0x1f +0013dc 1f232123 DCB 0x1f,0x23,0x21,0x23 +0013e0 1f212123 DCB 0x1f,0x21,0x21,0x23 +0013e4 21fa0221 DCB 0x21,0xfa,0x02,0x21 +0013e8 211f2121 DCB 0x21,0x1f,0x21,0x21 +0013ec 21231f21 DCB 0x21,0x23,0x1f,0x21 +0013f0 211f1f1f DCB 0x21,0x1f,0x1f,0x1f +0013f4 1f1f211c DCB 0x1f,0x1f,0x21,0x1c +0013f8 1f1c231f DCB 0x1f,0x1c,0x23,0x1f +0013fc 1f211f1f DCB 0x1f,0x21,0x1f,0x1f +001400 211f2123 DCB 0x21,0x1f,0x21,0x23 +001404 21232121 DCB 0x21,0x23,0x21,0x21 +001408 232321fc DCB 0x23,0x23,0x21,0xfc +00140c 07211f1f DCB 0x07,0x21,0x1f,0x1f +001410 21212123 DCB 0x21,0x21,0x21,0x23 +001414 1f21211f DCB 0x1f,0x21,0x21,0x1f +001418 211f1f1f DCB 0x21,0x1f,0x1f,0x1f +00141c 211c1f1c DCB 0x21,0x1c,0x1f,0x1c +001420 23211f21 DCB 0x23,0x21,0x1f,0x21 +001424 211f2121 DCB 0x21,0x1f,0x21,0x21 +001428 1f232123 DCB 0x1f,0x23,0x21,0x23 +00142c 21212323 DCB 0x21,0x21,0x23,0x23 +001430 21fa0921 DCB 0x21,0xfa,0x09,0x21 +001434 1f212121 DCB 0x1f,0x21,0x21,0x21 +001438 21231f23 DCB 0x21,0x23,0x1f,0x23 +00143c 211f1f1f DCB 0x21,0x1f,0x1f,0x1f +001440 1f1f211c DCB 0x1f,0x1f,0x21,0x1c +001444 1f1c231f DCB 0x1f,0x1c,0x23,0x1f +001448 1f212121 DCB 0x1f,0x21,0x21,0x21 +00144c 21212123 DCB 0x21,0x21,0x21,0x23 +001450 21232121 DCB 0x21,0x23,0x21,0x21 +001454 232323fc DCB 0x23,0x23,0x23,0xfc +001458 f11c1c1c DCB 0xf1,0x1c,0x1c,0x1c +00145c 1c1c1c1f DCB 0x1c,0x1c,0x1c,0x1f +001460 1c1c1c1a DCB 0x1c,0x1c,0x1c,0x1a +001464 1a1a1a1a DCB 0x1a,0x1a,0x1a,0x1a +001468 1c181a18 DCB 0x1c,0x18,0x1a,0x18 +00146c 23212121 DCB 0x23,0x21,0x21,0x21 +001470 21212121 DCB 0x21,0x21,0x21,0x21 +001474 21252325 DCB 0x21,0x25,0x23,0x25 +001478 23252529 DCB 0x23,0x25,0x25,0x29 +00147c 29eb DCB 0x29,0xeb + phone_data_75_FF +00147e ffff DCB 0xff,0xff +001480 ffffffff DCB 0xff,0xff,0xff,0xff +001484 ffffffff DCB 0xff,0xff,0xff,0xff +001488 ffffffff DCB 0xff,0xff,0xff,0xff +00148c ffffffff DCB 0xff,0xff,0xff,0xff +001490 ffffffff DCB 0xff,0xff,0xff,0xff +001494 ffffffff DCB 0xff,0xff,0xff,0xff +001498 ffffffff DCB 0xff,0xff,0xff,0xff +00149c ffffffff DCB 0xff,0xff,0xff,0xff +0014a0 ffffffff DCB 0xff,0xff,0xff,0xff +0014a4 ffffffff DCB 0xff,0xff,0xff,0xff +0014a8 ffffffff DCB 0xff,0xff,0xff,0xff +0014ac ffffffff DCB 0xff,0xff,0xff,0xff +0014b0 ffffffff DCB 0xff,0xff,0xff,0xff +0014b4 ffffffff DCB 0xff,0xff,0xff,0xff +0014b8 ffffffff DCB 0xff,0xff,0xff,0xff +0014bc ffffffff DCB 0xff,0xff,0xff,0xff +0014c0 ffffffff DCB 0xff,0xff,0xff,0xff +0014c4 ffffffff DCB 0xff,0xff,0xff,0xff +0014c8 ffffffff DCB 0xff,0xff,0xff,0xff +0014cc ffffffff DCB 0xff,0xff,0xff,0xff +0014d0 ffffffff DCB 0xff,0xff,0xff,0xff +0014d4 ffffffff DCB 0xff,0xff,0xff,0xff +0014d8 ffffffff DCB 0xff,0xff,0xff,0xff +0014dc ffffffff DCB 0xff,0xff,0xff,0xff +0014e0 ffffffff DCB 0xff,0xff,0xff,0xff +0014e4 ffffffff DCB 0xff,0xff,0xff,0xff +0014e8 ffffffff DCB 0xff,0xff,0xff,0xff +0014ec ffffffff DCB 0xff,0xff,0xff,0xff +0014f0 ffffffff DCB 0xff,0xff,0xff,0xff +0014f4 ffffffff DCB 0xff,0xff,0xff,0xff +0014f8 ffffffff DCB 0xff,0xff,0xff,0xff +0014fc ffffffff DCB 0xff,0xff,0xff,0xff +001500 ffffffff DCB 0xff,0xff,0xff,0xff +001504 ffffffff DCB 0xff,0xff,0xff,0xff +001508 ffffffff DCB 0xff,0xff,0xff,0xff +00150c ffffffff DCB 0xff,0xff,0xff,0xff +001510 ffffffff DCB 0xff,0xff,0xff,0xff +001514 ffffffff DCB 0xff,0xff,0xff,0xff +001518 ffffffff DCB 0xff,0xff,0xff,0xff +00151c ffffffff DCB 0xff,0xff,0xff,0xff +001520 ffffffff DCB 0xff,0xff,0xff,0xff +001524 ffffffff DCB 0xff,0xff,0xff,0xff +001528 ffffffff DCB 0xff,0xff,0xff,0xff +00152c ffffffff DCB 0xff,0xff,0xff,0xff +001530 ffffffff DCB 0xff,0xff,0xff,0xff +001534 ffffffff DCB 0xff,0xff,0xff,0xff +001538 ffffffff DCB 0xff,0xff,0xff,0xff +00153c ffffffff DCB 0xff,0xff,0xff,0xff +001540 ffffffff DCB 0xff,0xff,0xff,0xff +001544 ffffffff DCB 0xff,0xff,0xff,0xff +001548 ffffffff DCB 0xff,0xff,0xff,0xff +00154c ffffffff DCB 0xff,0xff,0xff,0xff +001550 ffffffff DCB 0xff,0xff,0xff,0xff +001554 ffffffff DCB 0xff,0xff,0xff,0xff +001558 ffffffff DCB 0xff,0xff,0xff,0xff +00155c ffffffff DCB 0xff,0xff,0xff,0xff +001560 ffffffff DCB 0xff,0xff,0xff,0xff +001564 ffffffff DCB 0xff,0xff,0xff,0xff +001568 ffffffff DCB 0xff,0xff,0xff,0xff +00156c ffffffff DCB 0xff,0xff,0xff,0xff +001570 ffffffff DCB 0xff,0xff,0xff,0xff +001574 ffffffff DCB 0xff,0xff,0xff,0xff +001578 ffffffff DCB 0xff,0xff,0xff,0xff +00157c ffffffff DCB 0xff,0xff,0xff,0xff +001580 ffffffff DCB 0xff,0xff,0xff,0xff +001584 ffffffff DCB 0xff,0xff,0xff,0xff +001588 ffffffff DCB 0xff,0xff,0xff,0xff +00158c ffffffff DCB 0xff,0xff,0xff,0xff +001590 ffffffff DCB 0xff,0xff,0xff,0xff +001594 ffffffff DCB 0xff,0xff,0xff,0xff +001598 ffffffff DCB 0xff,0xff,0xff,0xff +00159c ffff DCB 0xff,0xff + fingerprint_arr_on +00159e 4e01 DCB 0x4e,0x01 +0015a0 2184e300 DCB 0x21,0x84,0xe3,0x00 +0015a4 00000000 DCB 0x00,0x00,0x00,0x00 +0015a8 00000000 DCB 0x00,0x00,0x00,0x00 +0015ac 0000 DCB 0x00,0x00 + fingerprint_arr_off +0015ae 4e02 DCB 0x4e,0x02 +0015b0 2184e300 DCB 0x21,0x84,0xe3,0x00 +0015b4 00000000 DCB 0x00,0x00,0x00,0x00 +0015b8 00000000 DCB 0x00,0x00,0x00,0x00 +0015bc 0000 DCB 0x00,0x00 + phone_reg_coord_back +0015be 1d03 DCB 0x1d,0x03 +0015c0 02020002 DCB 0x02,0x02,0x00,0x02 +0015c4 00000000 DCB 0x00,0x00,0x00,0x00 +0015c8 00000000 DCB 0x00,0x00,0x00,0x00 +0015cc 00000000 DCB 0x00,0x00,0x00,0x00 + % 180 +001684 0000 DCB 0x00,0x00 + + AREA ||area_number.33||, DATA, ALIGN=0 + + EXPORTAS ||area_number.33||, ||.data|| + s8_host_num +000000 02020406 DCB 0x02,0x02,0x04,0x06 +000004 080a0c0e DCB 0x08,0x0a,0x0c,0x0e +000008 101214 DCB 0x10,0x12,0x14 + + AREA ||area_number.34||, DATA, ALIGN=0 + + EXPORTAS ||area_number.34||, ||.data|| + s8_host_id +000000 00102030 DCB 0x00,0x10,0x20,0x30 +000004 40506070 DCB 0x40,0x50,0x60,0x70 +000008 8090 DCB 0x80,0x90 + + AREA ||area_number.35||, DATA, ALIGN=0 + + EXPORTAS ||area_number.35||, ||.data|| + g_screen_input_rst_pad +000000 08 DCB 0x08 + + AREA ||area_number.36||, DATA, ALIGN=0 + + EXPORTAS ||area_number.36||, ||.data|| + g_screen_input_int_pad +000000 09 DCB 0x09 + + AREA ||area_number.37||, DATA, ALIGN=0 + + EXPORTAS ||area_number.37||, ||.data|| + g_phone_input_rst_pad +000000 15 DCB 0x15 + + AREA ||area_number.38||, DATA, ALIGN=1 + + EXPORTAS ||area_number.38||, ||.data|| + first_touch +000000 0000 DCW 0x0000 + + AREA ||area_number.39||, DATA, ALIGN=1 + + EXPORTAS ||area_number.39||, ||.data|| + first_send +000000 0000 DCW 0x0000 + + AREA ||area_number.40||, DATA, ALIGN=1 + + EXPORTAS ||area_number.40||, ||.data|| + flnger_state_flg +000000 0000 DCW 0x0000 + + AREA ||area_number.41||, DATA, ALIGN=0 + + EXPORTAS ||area_number.41||, ||.data|| + screen_data_write_1 +000000 86 DCB 0x86 + + AREA ||area_number.42||, DATA, ALIGN=0 + + EXPORTAS ||area_number.42||, ||.data|| + screen_data_write_2 +000000 a60000 DCB 0xa6,0x00,0x00 + + AREA ||area_number.43||, DATA, ALIGN=0 + + EXPORTAS ||area_number.43||, ||.data|| + screen_data_write_3 +000000 fa200000 DCB 0xfa,0x20,0x00,0x00 +000004 78 DCB 0x78 + + AREA ||area_number.44||, DATA, ALIGN=0 + + EXPORTAS ||area_number.44||, ||.data|| + screen_data_write_4 +000000 ff00 DCB 0xff,0x00 + + AREA ||area_number.45||, DATA, ALIGN=0 + + EXPORTAS ||area_number.45||, ||.data|| + screen_data_write_5 +000000 1fff DCB 0x1f,0xff + + AREA ||area_number.46||, DATA, ALIGN=0 + + EXPORTAS ||area_number.46||, ||.data|| + screen_data_write_6 +000000 0e24 DCB 0x0e,0x24 + + AREA ||area_number.47||, DATA, ALIGN=0 + + EXPORTAS ||area_number.47||, ||.data|| + screen_data_write_7 +000000 2401 DCB 0x24,0x01 + + AREA ||area_number.48||, DATA, ALIGN=0 + + EXPORTAS ||area_number.48||, ||.data|| + screen_data_write_8 +000000 0d00 DCB 0x0d,0x00 + + AREA ||area_number.49||, DATA, ALIGN=0 + + EXPORTAS ||area_number.49||, ||.data|| + screen_data_write_9 +000000 0e00 DCB 0x0e,0x00 + + AREA ||area_number.50||, DATA, ALIGN=0 + + EXPORTAS ||area_number.50||, ||.data|| + screen_data_write_10 +000000 0e07 DCB 0x0e,0x07 + + AREA ||area_number.51||, DATA, ALIGN=0 + + EXPORTAS ||area_number.51||, ||.data|| + screen_data_write_11 +000000 0d DCB 0x0d + + AREA ||area_number.52||, DATA, ALIGN=0 + + EXPORTAS ||area_number.52||, ||.data|| + screen_data_write_12 +000000 05 DCB 0x05 + + AREA ||area_number.53||, DATA, ALIGN=0 + + EXPORTAS ||area_number.53||, ||.data|| + fingerprint_flag +000000 00 DCB 0x00 + + AREA ||area_number.54||, DATA, ALIGN=2 + + EXPORTAS ||area_number.54||, ||.data|| + screen_reg_int_data + DCD screen_data_write_1 + DCD 0x00000001 + DCD 0x00000002 +00000c 01000000 DCB 0x01,0x00,0x00,0x00 + DCD screen_data_write_2 + DCD 0x00000001 + DCD 0x00000002 +00001c 01000000 DCB 0x01,0x00,0x00,0x00 + DCD screen_data_write_3 + DCD 0x00000001 + DCD 0x00000008 +00002c 01000000 DCB 0x01,0x00,0x00,0x00 + + AREA ||area_number.55||, DATA, ALIGN=2 + + EXPORTAS ||area_number.55||, ||.data|| + screen_reg_start_data + DCD screen_data_write_4 + DCD 0x00000002 + DCD 0x00000002 +00000c 00000000 DCB 0x00,0x00,0x00,0x00 + DCD screen_data_write_5 + DCD 0x00000002 + DCD 0x00000002 +00001c 00000000 DCB 0x00,0x00,0x00,0x00 + DCD screen_data_write_6 + DCD 0x00000002 + DCD 0x00000008 +00002c 00000000 DCB 0x00,0x00,0x00,0x00 + DCD screen_data_write_7 + DCD 0x00000002 + DCD 0x00000008 +00003c 00000000 DCB 0x00,0x00,0x00,0x00 + + AREA ||area_number.56||, DATA, ALIGN=0 + + EXPORTAS ||area_number.56||, ||.data|| + phone_reg_point_data +000000 b60023 DCB 0xb6,0x00,0x23 + + AREA ||area_number.57||, DATA, ALIGN=0 + + EXPORTAS ||area_number.57||, ||.data|| + phone_reg_point_back +000000 0502 DCB 0x05,0x02 + + AREA ||area_number.58||, DATA, ALIGN=0 + + EXPORTAS ||area_number.58||, ||.data|| + phone_reg_coord_data +000000 86 DCB 0x86 + + AREA ||area_number.59||, DATA, ALIGN=2 + + EXPORTAS ||area_number.59||, ||.data|| + phone_reg_int_data +000000 03000000 DCB 0x03,0x00,0x00,0x00 + DCD 0x00000002 + DCD phone_reg_point_data + DCD phone_reg_point_back +000010 01000000 DCB 0x01,0x00,0x00,0x00 + DCD 0x00000050 + DCD phone_reg_coord_data + DCD phone_reg_coord_back + + AREA ||area_number.60||, DATA, ALIGN=0 + + EXPORTAS ||area_number.60||, ||.data|| + phone_reg_int_size +000000 02 DCB 0x02 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\demo\\app_tp_for_custom_s8.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___22_app_tp_for_custom_s8_c_0ea31c8a____REV16| +#line 467 "C:\\Users\\ASUS\\AppData\\Local\\Arm\\Packs\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___22_app_tp_for_custom_s8_c_0ea31c8a____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___22_app_tp_for_custom_s8_c_0ea31c8a____REVSH| +#line 482 +|__asm___22_app_tp_for_custom_s8_c_0ea31c8a____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/ISP_368/Listings/app_tp_st_touch.txt b/project/ISP_368/Listings/app_tp_st_touch.txt new file mode 100644 index 0000000..a498200 --- /dev/null +++ b/project/ISP_368/Listings/app_tp_st_touch.txt @@ -0,0 +1,1286 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\app_tp_st_touch.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\app_tp_st_touch.d --cpu=Cortex-M0 --apcs=interwork -O1 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL368 -I.\RTE\_ISP_368 -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_368 --omf_browse=.\objects\app_tp_st_touch.crf ..\..\src\app\demo\app_tp_st_touch.c] + THUMB + + AREA ||i.CRC16_2||, CODE, READONLY, ALIGN=2 + + CRC16_2 PROC +;;;146 +;;;147 unsigned short CRC16_2(unsigned char *pchMsg, unsigned short wDataLen) +000000 b570 PUSH {r4-r6,lr} +;;;148 { +000002 4603 MOV r3,r0 +;;;149 unsigned short wCRC = 0xFFFF; +000004 480c LDR r0,|L1.56| +;;;150 unsigned short i; +;;;151 unsigned char chChar; +;;;152 +;;;153 for (i = 0; i < wDataLen; i++) +000006 2200 MOVS r2,#0 +;;;154 { +;;;155 chChar = *pchMsg++; +;;;156 wCRC = wCRCTalbeAbs[(chChar ^ wCRC) & 15] ^ (wCRC >> 4); +000008 4e0c LDR r6,|L1.60| +00000a e011 B |L1.48| + |L1.12| +00000c 781c LDRB r4,[r3,#0] ;155 +00000e 1c5b ADDS r3,r3,#1 ;155 +000010 4625 MOV r5,r4 +000012 4045 EORS r5,r5,r0 +000014 072d LSLS r5,r5,#28 +000016 0eed LSRS r5,r5,#27 +000018 5b75 LDRH r5,[r6,r5] +00001a 0900 LSRS r0,r0,#4 +00001c 4045 EORS r5,r5,r0 +;;;157 wCRC = wCRCTalbeAbs[((chChar >> 4) ^ wCRC) & 15] ^ (wCRC >> 4); +00001e 0920 LSRS r0,r4,#4 +000020 4068 EORS r0,r0,r5 +000022 0700 LSLS r0,r0,#28 +000024 0ec0 LSRS r0,r0,#27 +000026 5a30 LDRH r0,[r6,r0] +000028 092c LSRS r4,r5,#4 +00002a 4060 EORS r0,r0,r4 +00002c 1c52 ADDS r2,r2,#1 ;153 +00002e b292 UXTH r2,r2 ;153 + |L1.48| +000030 428a CMP r2,r1 ;153 +000032 d3eb BCC |L1.12| +;;;158 } +;;;159 +;;;160 return wCRC; +;;;161 } +000034 bd70 POP {r4-r6,pc} +;;;162 + ENDP + +000036 0000 DCW 0x0000 + |L1.56| + DCD 0x0000ffff + |L1.60| + DCD ||.constdata|| + + AREA ||i.ap_get_tp_calibration_status_01||, CODE, READONLY, ALIGN=2 + + ap_get_tp_calibration_status_01 PROC +;;;271 +;;;272 bool ap_get_tp_calibration_status_01(hal_dsi_rx_ctrl_handle_t *handler, uint8_t param) +000000 b508 PUSH {r3,lr} +;;;273 { +;;;274 // if( param == 0x5A ) +;;;275 { +;;;276 if(s_calibration_correct_flag) // У׼ɹ +000002 490a LDR r1,|L2.44| +000004 7849 LDRB r1,[r1,#1] ; s_calibration_correct_flag +000006 2900 CMP r1,#0 +000008 d007 BEQ |L2.26| +;;;277 { +;;;278 hal_dsi_rx_ctrl_send_ack_cmd(handler, +00000a 215a MOVS r1,#0x5a +00000c 9100 STR r1,[sp,#0] +00000e 2301 MOVS r3,#1 +000010 2200 MOVS r2,#0 +000012 2121 MOVS r1,#0x21 +000014 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd +000018 e006 B |L2.40| + |L2.26| +;;;279 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, //xxx +;;;280 DSI_VC_0, +;;;281 1,ST_TP_CALIBRATION_SUCCESS); +;;;282 } +;;;283 else // У׼ʧ +;;;284 { +;;;285 hal_dsi_rx_ctrl_send_ack_cmd(handler, +00001a 2100 MOVS r1,#0 +00001c 460a MOV r2,r1 +00001e 9100 STR r1,[sp,#0] +000020 2301 MOVS r3,#1 +000022 2121 MOVS r1,#0x21 +000024 f7fffffe BL hal_dsi_rx_ctrl_send_ack_cmd + |L2.40| +;;;286 DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, //xxx +;;;287 DSI_VC_0, +;;;288 1,0x00); +;;;289 } +;;;290 } +;;;291 +;;;292 return true; +000028 2001 MOVS r0,#1 +;;;293 } +00002a bd08 POP {r3,pc} +;;;294 + ENDP + + |L2.44| + DCD ||.data|| + + AREA ||i.ap_set_tp_calibration_04||, CODE, READONLY, ALIGN=2 + + REQUIRE _printf_pre_padding + REQUIRE _printf_percent + REQUIRE _printf_flags + REQUIRE _printf_widthprec + REQUIRE _printf_x + REQUIRE _printf_longlong_hex + ap_set_tp_calibration_04 PROC +;;;170 +;;;171 bool ap_set_tp_calibration_04(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +000000 b570 PUSH {r4-r6,lr} +;;;172 { +000002 b088 SUB sp,sp,#0x20 +000004 460d MOV r5,r1 +;;;173 uint8_t i,crch,crcl,command,param[30] = {0}; +000006 2120 MOVS r1,#0x20 +000008 4668 MOV r0,sp +00000a f7fffffe BL __aeabi_memclr4 +;;;174 unsigned short crc; +;;;175 +;;;176 // CRCֵ +;;;177 for(i=0;iparam_length;i++) +00000e 2400 MOVS r4,#0 +000010 466e MOV r6,sp ;173 +000012 e00a B |L3.42| + |L3.20| +;;;178 { +;;;179 param[i+1] = dcs_packet->packet_param[i]; +000014 68e8 LDR r0,[r5,#0xc] +000016 1931 ADDS r1,r6,r4 +000018 5d00 LDRB r0,[r0,r4] +00001a 7048 STRB r0,[r1,#1] +;;;180 printf("%02x ",dcs_packet->packet_param[i]); +00001c 68e8 LDR r0,[r5,#0xc] +00001e 5d01 LDRB r1,[r0,r4] +000020 a01a ADR r0,|L3.140| +000022 f7fffffe BL __2printf +000026 1c64 ADDS r4,r4,#1 ;177 +000028 b2e4 UXTB r4,r4 ;177 + |L3.42| +00002a 68a8 LDR r0,[r5,#8] ;177 +00002c 42a0 CMP r0,r4 ;177 +00002e d8f1 BHI |L3.20| +;;;181 } +;;;182 +;;;183 param[0] = 0x04; +000030 2004 MOVS r0,#4 +000032 4669 MOV r1,sp +000034 7008 STRB r0,[r1,#0] +;;;184 crc = CRC16_2(param,dcs_packet->param_length-1); +000036 8928 LDRH r0,[r5,#8] +000038 1e40 SUBS r0,r0,#1 +00003a b281 UXTH r1,r0 +00003c 4668 MOV r0,sp +00003e f7fffffe BL CRC16_2 +;;;185 crch = (crc>>8); +;;;186 crcl = crc; +;;;187 +;;;188 // CRCУж +;;;189 // if(crch == dcs_packet->packet_param[dcs_packet->param_length-2] && crcl == dcs_packet->packet_param[dcs_packet->param_length-1]) +;;;190 { +;;;191 command = param[3]; +000042 4669 MOV r1,sp +000044 78c8 LDRB r0,[r1,#3] +;;;192 switch(command) +000046 2100 MOVS r1,#0 +000048 382a SUBS r0,r0,#0x2a +;;;193 { +;;;194 case CMD_TP_CABLIBRATION: // TouchУ׼ +;;;195 if( (param[4] == 0x01) && (param[5] == 0x01) && (param[6] == 0x01) ) +00004a 2401 MOVS r4,#1 +;;;196 { +;;;197 s_calibration_flag = true; +00004c 4a11 LDR r2,|L3.148| +00004e 2800 CMP r0,#0 ;192 +000050 d80d BHI |L3.110| +000052 4668 MOV r0,sp ;195 +000054 7900 LDRB r0,[r0,#4] ;195 +000056 2801 CMP r0,#1 ;195 +000058 d109 BNE |L3.110| +00005a 4668 MOV r0,sp ;195 +00005c 7940 LDRB r0,[r0,#5] ;195 +00005e 2801 CMP r0,#1 ;195 +000060 d105 BNE |L3.110| +000062 4668 MOV r0,sp ;195 +000064 7980 LDRB r0,[r0,#6] ;195 +000066 2801 CMP r0,#1 ;195 +000068 d101 BNE |L3.110| +00006a 7014 STRB r4,[r2,#0] +;;;198 s_calibration_correct_flag = false; +00006c 7051 STRB r1,[r2,#1] + |L3.110| +;;;199 +;;;200 } +;;;201 /* if( (param[4] == 0xA5) && (param[5] == 0x5A) && (param[6] == 0xA5) ) +;;;202 { +;;;203 if(s_calibration_correct_flag) // У׼ɹ +;;;204 { +;;;205 hal_dsi_rx_ctrl_send_ack_cmd(handler, +;;;206 DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx +;;;207 DSI_VC_0, +;;;208 0x7, 0x04,0x02,0x07,0x2A,ST_TP_CALIBRATION_SUCCESS,0x00,0x00); +;;;209 printf("cali. send ok "); +;;;210 } +;;;211 else // У׼ʧ +;;;212 { +;;;213 hal_dsi_rx_ctrl_send_ack_cmd(handler, +;;;214 DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx +;;;215 DSI_VC_0, +;;;216 0x7, 0x04,0x02,0x07,0x2A,0x00,0x00,0x00); +;;;217 } +;;;218 printf("%02x ",s_calibration_correct_flag); +;;;219 } +;;;220 */ +;;;221 break; +;;;222 case CMD_SET_IMAGE_RGB: // Image RGB +;;;223 break; +;;;224 case CMD_SEND_COMMAND: // Command Send +;;;225 break; +;;;226 case CMD_WRITE_GAMMA: // GammaУд +;;;227 break; +;;;228 case CMD_START_GAMMA: +;;;229 break; +;;;230 default: +;;;231 break; +;;;232 } +;;;233 } +;;;234 +;;;235 // ݾɰ汾tp calibration +;;;236 if( (dcs_packet->packet_param[0] == 0x01) && (dcs_packet->packet_param[1] == 0x01) && (dcs_packet->packet_param[2] == 0x01) ) +00006e 68e8 LDR r0,[r5,#0xc] +000070 7803 LDRB r3,[r0,#0] +000072 2b01 CMP r3,#1 +000074 d107 BNE |L3.134| +000076 7843 LDRB r3,[r0,#1] +000078 2b01 CMP r3,#1 +00007a d104 BNE |L3.134| +00007c 7880 LDRB r0,[r0,#2] +00007e 2801 CMP r0,#1 +000080 d101 BNE |L3.134| +;;;237 { +;;;238 s_calibration_flag = true; +000082 7014 STRB r4,[r2,#0] +;;;239 s_calibration_correct_flag = false; +000084 7051 STRB r1,[r2,#1] + |L3.134| +;;;240 } +;;;241 /* +;;;242 if( (dcs_packet->packet_param[0] == 0xA5) && (dcs_packet->packet_param[1] == 0x5A) && (dcs_packet->packet_param[2] == 0xA5) ) +;;;243 { +;;;244 if(s_calibration_correct_flag) // У׼ɹ +;;;245 { +;;;246 hal_dsi_rx_ctrl_send_ack_cmd(handler, +;;;247 DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx +;;;248 DSI_VC_0, +;;;249 0x7, 0x04,0x02,0x07,0x2A,ST_TP_CALIBRATION_SUCCESS,0x00,0x00); +;;;250 } +;;;251 else // У׼ʧ +;;;252 { +;;;253 hal_dsi_rx_ctrl_send_ack_cmd(handler, +;;;254 DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx +;;;255 DSI_VC_0, +;;;256 0x7, 0x04,0x02,0x07,0x2A,0x00,0x00,0x00); +;;;257 } +;;;258 } +;;;259 */ +;;;260 return true; +000086 2001 MOVS r0,#1 +;;;261 } +000088 b008 ADD sp,sp,#0x20 +00008a bd70 POP {r4-r6,pc} +;;;262 + ENDP + + |L3.140| +00008c 25303278 DCB "%02x ",0 +000090 2000 +000092 00 DCB 0 +000093 00 DCB 0 + |L3.148| + DCD ||.data|| + + AREA ||i.ap_tp_st_touch_calibration||, CODE, READONLY, ALIGN=2 + + ap_tp_st_touch_calibration PROC +;;;104 +;;;105 void ap_tp_st_touch_calibration(void) +000000 b510 PUSH {r4,lr} +;;;106 { +;;;107 // app_tp_m_write(st_touch_tp_tuning_reset, sizeof(st_touch_tp_tuning_reset)); // System Reset +;;;108 // while(!hal_i2c_m_transfer_complate()); +;;;109 // delayMs(10); +;;;110 app_tp_m_write(st_touch_tp_tuning_FpnlInit, sizeof(st_touch_tp_tuning_FpnlInit)); // FPnl Init +000002 2103 MOVS r1,#3 +000004 4829 LDR r0,|L4.172| +000006 f7fffffe BL app_tp_m_write + |L4.10| +;;;111 while(!hal_i2c_m_transfer_complate()); +00000a f7fffffe BL hal_i2c_m_transfer_complate +00000e 2800 CMP r0,#0 +000010 d0fb BEQ |L4.10| +;;;112 delayMs(1); +000012 2001 MOVS r0,#1 +000014 f7fffffe BL delayMs +;;;113 app_tp_m_write(st_touch_tp_tuning_PnlInit, sizeof(st_touch_tp_tuning_PnlInit)); // Pnl Init +000018 4824 LDR r0,|L4.172| +00001a 2103 MOVS r1,#3 +00001c 1cc0 ADDS r0,r0,#3 +00001e f7fffffe BL app_tp_m_write + |L4.34| +;;;114 while(!hal_i2c_m_transfer_complate()); +000022 f7fffffe BL hal_i2c_m_transfer_complate +000026 2800 CMP r0,#0 +000028 d0fb BEQ |L4.34| +;;;115 delayMs(1); +00002a 2001 MOVS r0,#1 +00002c f7fffffe BL delayMs +;;;116 app_tp_m_write(st_touch_tp_tuning_TuneM, sizeof(st_touch_tp_tuning_TuneM)); // TuneM +000030 481e LDR r0,|L4.172| +000032 2104 MOVS r1,#4 +000034 3015 ADDS r0,r0,#0x15 +000036 f7fffffe BL app_tp_m_write + |L4.58| +;;;117 while(!hal_i2c_m_transfer_complate()); +00003a f7fffffe BL hal_i2c_m_transfer_complate +00003e 2800 CMP r0,#0 +000040 d0fb BEQ |L4.58| +;;;118 delayMs(1); +000042 2001 MOVS r0,#1 +000044 f7fffffe BL delayMs +;;;119 app_tp_m_write(st_touch_tp_tuning_TuneS, sizeof(st_touch_tp_tuning_TuneS)); // TuneS +000048 4818 LDR r0,|L4.172| +00004a 2104 MOVS r1,#4 +00004c 3019 ADDS r0,r0,#0x19 +00004e f7fffffe BL app_tp_m_write + |L4.82| +;;;120 while(!hal_i2c_m_transfer_complate()); +000052 f7fffffe BL hal_i2c_m_transfer_complate +000056 2800 CMP r0,#0 +000058 d0fb BEQ |L4.82| +;;;121 delayMs(1); +00005a 2001 MOVS r0,#1 +00005c f7fffffe BL delayMs +;;;122 app_tp_m_write(st_touch_tp_tuning_SvCfg, sizeof(st_touch_tp_tuning_SvCfg)); // SvCfg +000060 4812 LDR r0,|L4.172| +000062 2103 MOVS r1,#3 +000064 1d80 ADDS r0,r0,#6 +000066 f7fffffe BL app_tp_m_write + |L4.106| +;;;123 while(!hal_i2c_m_transfer_complate()); +00006a f7fffffe BL hal_i2c_m_transfer_complate +00006e 2800 CMP r0,#0 +000070 d0fb BEQ |L4.106| +;;;124 delayMs(1); +000072 2001 MOVS r0,#1 +000074 f7fffffe BL delayMs +;;;125 app_tp_m_write(st_touch_tp_tuning_SvCx, sizeof(st_touch_tp_tuning_SvCx)); // SvCx +000078 480c LDR r0,|L4.172| +00007a 2103 MOVS r1,#3 +00007c 3009 ADDS r0,r0,#9 +00007e f7fffffe BL app_tp_m_write + |L4.130| +;;;126 while(!hal_i2c_m_transfer_complate()); +000082 f7fffffe BL hal_i2c_m_transfer_complate +000086 2800 CMP r0,#0 +000088 d0fb BEQ |L4.130| +;;;127 delayMs(1); +00008a 2001 MOVS r0,#1 +00008c f7fffffe BL delayMs +;;;128 app_tp_m_write(st_touch_tp_tuning_SvPnl, sizeof(st_touch_tp_tuning_SvPnl)); // SvPnl +000090 4806 LDR r0,|L4.172| +000092 2103 MOVS r1,#3 +000094 300c ADDS r0,r0,#0xc +000096 f7fffffe BL app_tp_m_write + |L4.154| +;;;129 while(!hal_i2c_m_transfer_complate()); +00009a f7fffffe BL hal_i2c_m_transfer_complate +00009e 2800 CMP r0,#0 +0000a0 d0fb BEQ |L4.154| +;;;130 delayMs(1); +0000a2 2001 MOVS r0,#1 +0000a4 f7fffffe BL delayMs +;;;131 } +0000a8 bd10 POP {r4,pc} +;;;132 + ENDP + +0000aa 0000 DCW 0x0000 + |L4.172| + DCD ||.data||+0xb + + AREA ||i.ap_tp_st_touch_error_handler_F3||, CODE, READONLY, ALIGN=1 + + ap_tp_st_touch_error_handler_F3 PROC +;;;541 +;;;542 void ap_tp_st_touch_error_handler_F3(uint8_t* screendata) +000000 b510 PUSH {r4,lr} +;;;543 { +;;;544 // յ TP 쳣ظ 0xF3 0x02 0x00 0x00 0x00 0x00 0x00 0x00 +;;;545 // if(screendata[0] == 0xF3 && screendata[1] == 0x02 && screendata[2] == 0x00) +;;;546 if(screendata[0] == 0xF3) +000002 7800 LDRB r0,[r0,#0] +000004 28f3 CMP r0,#0xf3 +000006 d101 BNE |L5.12| +;;;547 { +;;;548 // ap_tp_st_touch_software_reset(); +;;;549 ap_tp_st_touch_hardware_reset(); +000008 f7fffffe BL ap_tp_st_touch_hardware_reset + |L5.12| +;;;550 } +;;;551 } +00000c bd10 POP {r4,pc} +;;;552 + ENDP + + + AREA ||i.ap_tp_st_touch_error_handler_FF||, CODE, READONLY, ALIGN=1 + + ap_tp_st_touch_error_handler_FF PROC +;;;560 +;;;561 void ap_tp_st_touch_error_handler_FF(uint8_t* screendata) +000000 b510 PUSH {r4,lr} +;;;562 { +;;;563 // յ TP 쳣ظ 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF +;;;564 if(screendata[1] == 0xFF && screendata[2] == 0xFF&& screendata[3] == 0xFF&&screendata[4] == 0xFF) +000002 7841 LDRB r1,[r0,#1] +000004 29ff CMP r1,#0xff +000006 d10a BNE |L6.30| +000008 7881 LDRB r1,[r0,#2] +00000a 29ff CMP r1,#0xff +00000c d107 BNE |L6.30| +00000e 78c1 LDRB r1,[r0,#3] +000010 29ff CMP r1,#0xff +000012 d104 BNE |L6.30| +000014 7900 LDRB r0,[r0,#4] +000016 28ff CMP r0,#0xff +000018 d101 BNE |L6.30| +;;;565 { +;;;566 // ap_tp_st_touch_software_reset(); +;;;567 ap_tp_st_touch_hardware_reset(); +00001a f7fffffe BL ap_tp_st_touch_hardware_reset + |L6.30| +;;;568 } +;;;569 } +00001e bd10 POP {r4,pc} +;;;570 + ENDP + + + AREA ||i.ap_tp_st_touch_get_calibration_success_mark||, CODE, READONLY, ALIGN=2 + + ap_tp_st_touch_get_calibration_success_mark PROC +;;;58 +;;;59 void ap_tp_st_touch_get_calibration_success_mark(void) +000000 b500 PUSH {lr} +;;;60 { +000002 b08d SUB sp,sp,#0x34 +;;;61 uint8_t cali_send_buff[6] = {0xFA,0x20,0x01,0x00,0x00,0x00}; +000004 a024 ADR r0,|L7.152| +000006 c803 LDM r0,{r0,r1} +000008 910c STR r1,[sp,#0x30] +00000a 900b STR r0,[sp,#0x2c] +;;;62 uint8_t cali_send_buff1[3] = {0xA4,0x06,0x01}; +00000c a024 ADR r0,|L7.160| +00000e 6800 LDR r0,[r0,#0] +000010 900a STR r0,[sp,#0x28] +;;;63 uint8_t cali_read_buff[40] = {0}; +000012 2128 MOVS r1,#0x28 +000014 4668 MOV r0,sp +000016 f7fffffe BL __aeabi_memclr4 +;;;64 uint8_t i = 0; +;;;65 +;;;66 app_tp_m_read(cali_send_buff, 5, cali_read_buff, 4); +00001a 2304 MOVS r3,#4 +00001c 466a MOV r2,sp +00001e 2105 MOVS r1,#5 +000020 a80b ADD r0,sp,#0x2c +000022 f7fffffe BL app_tp_m_read + |L7.38| +;;;67 while(!hal_i2c_m_transfer_complate()); +000026 f7fffffe BL hal_i2c_m_transfer_complate +00002a 2800 CMP r0,#0 +00002c d0fb BEQ |L7.38| +;;;68 delayMs(1); +00002e 2001 MOVS r0,#1 +000030 f7fffffe BL delayMs +;;;69 +;;;70 app_tp_m_write(cali_send_buff1, 3); +000034 2103 MOVS r1,#3 +000036 a80a ADD r0,sp,#0x28 +000038 f7fffffe BL app_tp_m_write + |L7.60| +;;;71 while(!hal_i2c_m_transfer_complate()); +00003c f7fffffe BL hal_i2c_m_transfer_complate +000040 2800 CMP r0,#0 +000042 d0fb BEQ |L7.60| +;;;72 delayMs(1); +000044 2001 MOVS r0,#1 +000046 f7fffffe BL delayMs +;;;73 +;;;74 app_tp_m_read(cali_send_buff, 5, cali_read_buff, 4); +00004a 2304 MOVS r3,#4 +00004c 466a MOV r2,sp +00004e 2105 MOVS r1,#5 +000050 a80b ADD r0,sp,#0x2c +000052 f7fffffe BL app_tp_m_read + |L7.86| +;;;75 while(!hal_i2c_m_transfer_complate()); +000056 f7fffffe BL hal_i2c_m_transfer_complate +00005a 2800 CMP r0,#0 +00005c d0fb BEQ |L7.86| +;;;76 delayMs(1); +00005e 2001 MOVS r0,#1 +000060 f7fffffe BL delayMs +;;;77 +;;;78 app_tp_m_read(cali_send_buff, 5, cali_read_buff, 32); +000064 2320 MOVS r3,#0x20 +000066 466a MOV r2,sp +000068 2105 MOVS r1,#5 +00006a a80b ADD r0,sp,#0x2c +00006c f7fffffe BL app_tp_m_read + |L7.112| +;;;79 while(!hal_i2c_m_transfer_complate()); +000070 f7fffffe BL hal_i2c_m_transfer_complate +000074 2800 CMP r0,#0 +000076 d0fb BEQ |L7.112| +;;;80 +;;;81 if((cali_read_buff[20] == 0xFF) && (cali_read_buff[21] == 0xFF)) +000078 4668 MOV r0,sp +00007a 7d01 LDRB r1,[r0,#0x14] +;;;82 { +;;;83 s_calibration_correct_flag = ST_TP_CALIBRATION_SUCCESS; // У׼ɹ +00007c 4809 LDR r0,|L7.164| +00007e 29ff CMP r1,#0xff ;81 +000080 d103 BNE |L7.138| +000082 4669 MOV r1,sp ;81 +000084 7d49 LDRB r1,[r1,#0x15] ;81 +000086 29ff CMP r1,#0xff ;81 +000088 d003 BEQ |L7.146| + |L7.138| +;;;84 } +;;;85 else +;;;86 { +;;;87 s_calibration_correct_flag = 0x00; // У׼ʧ +00008a 2100 MOVS r1,#0 +00008c 7041 STRB r1,[r0,#1] + |L7.142| +;;;88 } +;;;89 /* +;;;90 for(i=0;i<32;i++) +;;;91 { +;;;92 printf("%02x ",cali_read_buff[i]); +;;;93 } +;;;94 */ +;;;95 } +00008e b00d ADD sp,sp,#0x34 +000090 bd00 POP {pc} + |L7.146| +000092 215a MOVS r1,#0x5a ;83 +000094 7041 STRB r1,[r0,#1] ;83 +000096 e7fa B |L7.142| +;;;96 + ENDP + + |L7.152| +000098 fa200100 DCB 250," ",1,0 +00009c 00 DCB 0 +00009d 00 DCB 0 +00009e 00 DCB 0 +00009f 00 DCB 0 + |L7.160| +0000a0 a4060100 DCB 164,6,1,0 + |L7.164| + DCD ||.data|| + + AREA ||i.ap_tp_st_touch_hardware_reset||, CODE, READONLY, ALIGN=2 + + ap_tp_st_touch_hardware_reset PROC +;;;413 **************************************************************************/ +;;;414 void ap_tp_st_touch_hardware_reset(void) +000000 b510 PUSH {r4,lr} +;;;415 { +;;;416 TAU_LOGD("st_touch_hardware_reset \n"); +000002 22ff MOVS r2,#0xff +000004 32a1 ADDS r2,r2,#0xa1 +000006 a121 ADR r1,|L8.140| +000008 a022 ADR r0,|L8.148| +00000a f7fffffe BL LOG_printf +;;;417 ap_tp_st_touch_simulate_finger_release_event(); +00000e f7fffffe BL ap_tp_st_touch_simulate_finger_release_event +;;;418 ap_tp_st_touch_scan_point_init(); +000012 f7fffffe BL ap_tp_st_touch_scan_point_init +;;;419 hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); +000016 4c29 LDR r4,|L8.188| +000018 2101 MOVS r1,#1 +00001a 7820 LDRB r0,[r4,#0] ; g_screen_input_rst_pad +00001c f7fffffe BL hal_gpio_set_output_data +;;;420 delayMs(2); +000020 2002 MOVS r0,#2 +000022 f7fffffe BL delayMs +;;;421 hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_LOW); +000026 2100 MOVS r1,#0 +000028 7820 LDRB r0,[r4,#0] ; g_screen_input_rst_pad +00002a f7fffffe BL hal_gpio_set_output_data +;;;422 delayMs(2); +00002e 2002 MOVS r0,#2 +000030 f7fffffe BL delayMs +;;;423 hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); +000034 2101 MOVS r1,#1 +000036 7820 LDRB r0,[r4,#0] ; g_screen_input_rst_pad +000038 f7fffffe BL hal_gpio_set_output_data +;;;424 delayMs(2); +00003c 2002 MOVS r0,#2 +00003e f7fffffe BL delayMs +;;;425 +;;;426 app_tp_m_write(st_touch_tp_tuning_clearfifo, sizeof(st_touch_tp_tuning_clearfifo));//0xA4,0x00,0x01} +000042 2103 MOVS r1,#3 +000044 481e LDR r0,|L8.192| +000046 f7fffffe BL app_tp_m_write + |L8.74| +;;;427 while(!hal_i2c_m_transfer_complate()); +00004a f7fffffe BL hal_i2c_m_transfer_complate +00004e 2800 CMP r0,#0 +000050 d0fb BEQ |L8.74| +;;;428 delayMs(5); +000052 2005 MOVS r0,#5 +000054 f7fffffe BL delayMs +;;;429 app_tp_m_write(st_touch_init_sensor_off, sizeof(st_touch_init_sensor_off));//0xA0,0x00,0x00 +000058 4819 LDR r0,|L8.192| +00005a 2103 MOVS r1,#3 +00005c 3818 SUBS r0,r0,#0x18 +00005e f7fffffe BL app_tp_m_write + |L8.98| +;;;430 while(!hal_i2c_m_transfer_complate()); +000062 f7fffffe BL hal_i2c_m_transfer_complate +000066 2800 CMP r0,#0 +000068 d0fb BEQ |L8.98| +;;;431 delayMs(5); +00006a 2005 MOVS r0,#5 +00006c f7fffffe BL delayMs +;;;432 app_tp_m_write(st_touch_init_sensor_on, sizeof(st_touch_init_sensor_on));//0xA0,0x00,0x01 +000070 4813 LDR r0,|L8.192| +000072 2103 MOVS r1,#3 +000074 3815 SUBS r0,r0,#0x15 +000076 f7fffffe BL app_tp_m_write + |L8.122| +;;;433 while(!hal_i2c_m_transfer_complate()); +00007a f7fffffe BL hal_i2c_m_transfer_complate +00007e 2800 CMP r0,#0 +000080 d0fb BEQ |L8.122| +;;;434 delayMs(5); +000082 2005 MOVS r0,#5 +000084 f7fffffe BL delayMs +;;;435 } +000088 bd10 POP {r4,pc} +;;;436 + ENDP + +00008a 0000 DCW 0x0000 + |L8.140| +00008c 7461755f DCB "tau_log",0 +000090 6c6f6700 + |L8.148| +000094 5b25735d DCB "[%s] (%04d) st_touch_hardware_reset \n",0 +000098 20282530 +00009c 34642920 +0000a0 73745f74 +0000a4 6f756368 +0000a8 5f686172 +0000ac 64776172 +0000b0 655f7265 +0000b4 73657420 +0000b8 0a00 +0000ba 00 DCB 0 +0000bb 00 DCB 0 + |L8.188| + DCD g_screen_input_rst_pad + |L8.192| + DCD ||.data||+0x1a + + AREA ||i.ap_tp_st_touch_scan_point_init||, CODE, READONLY, ALIGN=2 + + ap_tp_st_touch_scan_point_init PROC +;;;337 +;;;338 void ap_tp_st_touch_scan_point_init(void) +000000 2000 MOVS r0,#0 +;;;339 { +;;;340 uint8_t i=0; +;;;341 +;;;342 for(i=0;i>4)+1; +;;;453 i+=7; +;;;454 +;;;455 if(eventdata == 0x13) // ¼ +;;;456 { +;;;457 for(j=0;j0)) // ͷ¼ +000046 2c33 CMP r4,#0x33 +000048 d005 BEQ |L10.86| +00004a e019 B |L10.128| + |L10.76| +00004c 54b3 STRB r3,[r6,r2] ;472 +00004e 79b2 LDRB r2,[r6,#6] ;473 ; tp_scan_data +000050 1c52 ADDS r2,r2,#1 ;473 +000052 71b2 STRB r2,[r6,#6] ;473 +000054 e7f7 B |L10.70| + |L10.86| +000056 79b2 LDRB r2,[r6,#6] ; tp_scan_data +000058 2a00 CMP r2,#0 +00005a d011 BEQ |L10.128| +;;;482 { +;;;483 for(j=0;j0) // в +;;;524 { +;;;525 printf("release finger %2d\n",tp_scan_data.tp_read_point_counter); +;;;526 tp_scan_data.tp_read_point_counter = 0; +;;;527 ap_tp_st_touch_simulate_finger_release_event(); +;;;528 } +;;;529 ap_tp_st_touch_scan_point_init(); +;;;530 } +;;;531 } +;;;532 } +000016 bd10 POP {r4,pc} + |L11.24| +000018 79a1 LDRB r1,[r4,#6] ;523 ; tp_scan_data +00001a 2900 CMP r1,#0 ;523 +00001c d006 BEQ |L11.44| +00001e a007 ADR r0,|L11.60| +000020 f7fffffe BL __2printf +000024 2000 MOVS r0,#0 ;526 +000026 71a0 STRB r0,[r4,#6] ;526 +000028 f7fffffe BL ap_tp_st_touch_simulate_finger_release_event + |L11.44| +00002c f7fffffe BL ap_tp_st_touch_scan_point_init +000030 bd10 POP {r4,pc} +;;;533 + ENDP + +000032 0000 DCW 0x0000 + |L11.52| + DCD ||.bss|| + |L11.56| + DCD 0x00001999 + |L11.60| +00003c 72656c65 DCB "release finger %2d\n",0 +000040 61736520 +000044 66696e67 +000048 65722025 +00004c 32640a00 + + AREA ||i.ap_tp_st_touch_simulate_finger_release_event||, CODE, READONLY, ALIGN=2 + + ap_tp_st_touch_simulate_finger_release_event PROC +;;;357 +;;;358 void ap_tp_st_touch_simulate_finger_release_event(void) +000000 b51c PUSH {r2-r4,lr} +;;;359 { +;;;360 uint8_t i,temp=0,ap_tp_release_buf[8] = {0x33,0x01,0x00,0x00,0x00,0x00,0x00,0x00}; +000002 a00a ADR r0,|L12.44| +000004 c803 LDM r0,{r0,r1} +000006 9101 STR r1,[sp,#4] +000008 9000 STR r0,[sp,#0] +;;;361 +;;;362 for(i=0;i<5;i++) +00000a 2400 MOVS r4,#0 + |L12.12| +;;;363 { +;;;364 temp = i; +;;;365 ap_tp_release_buf[1] = (temp<<4)|0x01; +00000c 0120 LSLS r0,r4,#4 +00000e 1c40 ADDS r0,r0,#1 +000010 4669 MOV r1,sp +000012 7048 STRB r0,[r1,#1] +;;;366 +;;;367 app_tp_screen_analysis_int(0, ap_tp_release_buf,8); +000014 2208 MOVS r2,#8 +000016 2000 MOVS r0,#0 +000018 f7fffffe BL app_tp_screen_analysis_int +;;;368 +;;;369 delayMs(6); +00001c 2006 MOVS r0,#6 +00001e f7fffffe BL delayMs +000022 1c64 ADDS r4,r4,#1 ;362 +000024 b2e4 UXTB r4,r4 ;362 +000026 2c05 CMP r4,#5 ;362 +000028 d3f0 BCC |L12.12| +;;;370 } +;;;371 } +00002a bd1c POP {r2-r4,pc} +;;;372 + ENDP + + |L12.44| +00002c 330100 DCB "3",1,0 +00002f 00 DCB 0 +000030 00 DCB 0 +000031 00 DCB 0 +000032 00 DCB 0 +000033 00 DCB 0 + + AREA ||i.ap_tp_st_touch_software_reset||, CODE, READONLY, ALIGN=2 + + ap_tp_st_touch_software_reset PROC +;;;380 +;;;381 void ap_tp_st_touch_software_reset(void) +000000 b510 PUSH {r4,lr} +;;;382 { +;;;383 TAU_LOGD("st_touch_software_reset \n"); +000002 22ff MOVS r2,#0xff +000004 3280 ADDS r2,r2,#0x80 +000006 a11c ADR r1,|L13.120| +000008 a01d ADR r0,|L13.128| +00000a f7fffffe BL LOG_printf +;;;384 ap_tp_st_touch_simulate_finger_release_event(); +00000e f7fffffe BL ap_tp_st_touch_simulate_finger_release_event +;;;385 ap_tp_st_touch_scan_point_init(); +000012 f7fffffe BL ap_tp_st_touch_scan_point_init +;;;386 +;;;387 app_tp_m_write(st_touch_tp_tuning_clkreset, sizeof(st_touch_tp_tuning_clkreset)); // clk reset +000016 2103 MOVS r1,#3 +000018 4823 LDR r0,|L13.168| +00001a f7fffffe BL app_tp_m_write + |L13.30| +;;;388 while(!hal_i2c_m_transfer_complate()); +00001e f7fffffe BL hal_i2c_m_transfer_complate +000022 2800 CMP r0,#0 +000024 d0fb BEQ |L13.30| +;;;389 delayMs(5); +000026 2005 MOVS r0,#5 +000028 f7fffffe BL delayMs +;;;390 +;;;391 app_tp_m_write(st_touch_tp_tuning_reset, sizeof(st_touch_tp_tuning_reset)); // System Reset A4 00 00 +00002c 481e LDR r0,|L13.168| +00002e 2103 MOVS r1,#3 +000030 3815 SUBS r0,r0,#0x15 +000032 f7fffffe BL app_tp_m_write + |L13.54| +;;;392 while(!hal_i2c_m_transfer_complate()); +000036 f7fffffe BL hal_i2c_m_transfer_complate +00003a 2800 CMP r0,#0 +00003c d0fb BEQ |L13.54| +;;;393 delayMs(5); +00003e 2005 MOVS r0,#5 +000040 f7fffffe BL delayMs +;;;394 +;;;395 app_tp_m_write(st_touch_tp_tuning_clearfifo, sizeof(st_touch_tp_tuning_clearfifo));//0xA4,0x00,0x01 +000044 4818 LDR r0,|L13.168| +000046 2103 MOVS r1,#3 +000048 1ec0 SUBS r0,r0,#3 +00004a f7fffffe BL app_tp_m_write + |L13.78| +;;;396 while(!hal_i2c_m_transfer_complate()); +00004e f7fffffe BL hal_i2c_m_transfer_complate +000052 2800 CMP r0,#0 +000054 d0fb BEQ |L13.78| +;;;397 delayMs(5); +000056 2005 MOVS r0,#5 +000058 f7fffffe BL delayMs +;;;398 +;;;399 app_tp_m_write(st_touch_init_sensor_on, sizeof(st_touch_init_sensor_on));//0xA0,0x00,0x01 +00005c 4812 LDR r0,|L13.168| +00005e 2103 MOVS r1,#3 +000060 3818 SUBS r0,r0,#0x18 +000062 f7fffffe BL app_tp_m_write + |L13.102| +;;;400 while(!hal_i2c_m_transfer_complate()); +000066 f7fffffe BL hal_i2c_m_transfer_complate +00006a 2800 CMP r0,#0 +00006c d0fb BEQ |L13.102| +;;;401 delayMs(5); +00006e 2005 MOVS r0,#5 +000070 f7fffffe BL delayMs +;;;402 +;;;403 // app_tp_screen_reset(); +;;;404 } +000074 bd10 POP {r4,pc} +;;;405 + ENDP + +000076 0000 DCW 0x0000 + |L13.120| +000078 7461755f DCB "tau_log",0 +00007c 6c6f6700 + |L13.128| +000080 5b25735d DCB "[%s] (%04d) st_touch_software_reset \n",0 +000084 20282530 +000088 34642920 +00008c 73745f74 +000090 6f756368 +000094 5f736f66 +000098 74776172 +00009c 655f7265 +0000a0 73657420 +0000a4 0a00 +0000a6 00 DCB 0 +0000a7 00 DCB 0 + |L13.168| + DCD ||.data||+0x1d + + AREA ||i.app_tp_calibration_exec||, CODE, READONLY, ALIGN=2 + + app_tp_calibration_exec PROC +;;;302 +;;;303 void app_tp_calibration_exec(void) +000000 b5f8 PUSH {r3-r7,lr} +;;;304 { +;;;305 uint8_t i = 0; +000002 2400 MOVS r4,#0 +;;;306 +;;;307 if(s_calibration_flag) +000004 4d12 LDR r5,|L14.80| +000006 7828 LDRB r0,[r5,#0] ; s_calibration_flag +000008 2800 CMP r0,#0 +00000a d018 BEQ |L14.62| +;;;308 { +;;;309 s_calibration_flag = false; +00000c 2000 MOVS r0,#0 +00000e 7028 STRB r0,[r5,#0] +;;;310 for(i=0;i<2;i++) +;;;311 { +;;;312 ap_tp_st_touch_calibration(); +;;;313 delayMs(4000); +000010 267d MOVS r6,#0x7d +;;;314 ap_tp_st_touch_get_calibration_success_mark(); +;;;315 if(s_calibration_correct_flag == ST_TP_CALIBRATION_SUCCESS) +;;;316 { +;;;317 TAU_LOGD("calibration successful \n"); +;;;318 break; +;;;319 } +;;;320 else +;;;321 { +;;;322 TAU_LOGD("calibration failure \n"); +000012 27ff MOVS r7,#0xff +000014 0176 LSLS r6,r6,#5 ;313 +000016 3743 ADDS r7,r7,#0x43 + |L14.24| +000018 f7fffffe BL ap_tp_st_touch_calibration +00001c 4630 MOV r0,r6 ;313 +00001e f7fffffe BL delayMs +000022 f7fffffe BL ap_tp_st_touch_get_calibration_success_mark +000026 7868 LDRB r0,[r5,#1] ;315 ; s_calibration_correct_flag +000028 285a CMP r0,#0x5a ;315 +00002a d009 BEQ |L14.64| +00002c 463a MOV r2,r7 +00002e a109 ADR r1,|L14.84| +000030 a00a ADR r0,|L14.92| +000032 f7fffffe BL LOG_printf +000036 1c64 ADDS r4,r4,#1 ;310 +000038 b2e4 UXTB r4,r4 ;310 +00003a 2c02 CMP r4,#2 ;310 +00003c d3ec BCC |L14.24| + |L14.62| +;;;323 } +;;;324 } +;;;325 +;;;326 } +;;;327 } +00003e bdf8 POP {r3-r7,pc} + |L14.64| +000040 22ff MOVS r2,#0xff ;317 +000042 323e ADDS r2,r2,#0x3e ;317 +000044 a103 ADR r1,|L14.84| +000046 a00e ADR r0,|L14.128| +000048 f7fffffe BL LOG_printf +00004c bdf8 POP {r3-r7,pc} +;;;328 + ENDP + +00004e 0000 DCW 0x0000 + |L14.80| + DCD ||.data|| + |L14.84| +000054 7461755f DCB "tau_log",0 +000058 6c6f6700 + |L14.92| +00005c 5b25735d DCB "[%s] (%04d) calibration failure \n",0 +000060 20282530 +000064 34642920 +000068 63616c69 +00006c 62726174 +000070 696f6e20 +000074 6661696c +000078 75726520 +00007c 0a00 +00007e 00 DCB 0 +00007f 00 DCB 0 + |L14.128| +000080 5b25735d DCB "[%s] (%04d) calibration successful \n",0 +000084 20282530 +000088 34642920 +00008c 63616c69 +000090 62726174 +000094 696f6e20 +000098 73756363 +00009c 65737366 +0000a0 756c200a +0000a4 00 +0000a5 00 DCB 0 +0000a6 00 DCB 0 +0000a7 00 DCB 0 + + AREA ||.bss||, DATA, NOINIT, ALIGN=2 + + tp_scan_data + % 12 + + AREA ||.constdata||, DATA, READONLY, ALIGN=1 + + wCRCTalbeAbs +000000 0000cc01 DCW 0x0000,0xcc01 +000004 d8011400 DCW 0xd801,0x1400 +000008 f0013c00 DCW 0xf001,0x3c00 +00000c 2800e401 DCW 0x2800,0xe401 +000010 a0016c00 DCW 0xa001,0x6c00 +000014 7800b401 DCW 0x7800,0xb401 +000018 50009c01 DCW 0x5000,0x9c01 +00001c 88014400 DCW 0x8801,0x4400 + + AREA ||.data||, DATA, ALIGN=0 + + s_calibration_flag +000000 00 DCB 0x00 + s_calibration_correct_flag +000001 00 DCB 0x00 + st_touch_init_sensor_off +000002 a000 DCB 0xa0,0x00 +000004 00 DCB 0x00 + st_touch_init_sensor_on +000005 a00001 DCB 0xa0,0x00,0x01 + st_touch_tp_tuning_reset +000008 a40000 DCB 0xa4,0x00,0x00 + st_touch_tp_tuning_FpnlInit +00000b a4 DCB 0xa4 +00000c 0003 DCB 0x00,0x03 + st_touch_tp_tuning_PnlInit +00000e a400 DCB 0xa4,0x00 +000010 02 DCB 0x02 + st_touch_tp_tuning_SvCfg +000011 a40501 DCB 0xa4,0x05,0x01 + st_touch_tp_tuning_SvCx +000014 a40502 DCB 0xa4,0x05,0x02 + st_touch_tp_tuning_SvPnl +000017 a4 DCB 0xa4 +000018 0504 DCB 0x05,0x04 + st_touch_tp_tuning_clearfifo +00001a a400 DCB 0xa4,0x00 +00001c 01 DCB 0x01 + st_touch_tp_tuning_clkreset +00001d a40005 DCB 0xa4,0x00,0x05 + st_touch_tp_tuning_TuneM +000020 a4031300 DCB 0xa4,0x03,0x13,0x00 + st_touch_tp_tuning_TuneS +000024 a4030c00 DCB 0xa4,0x03,0x0c,0x00 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\demo\\app_tp_st_touch.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___17_app_tp_st_touch_c_0c52f749____REV16| +#line 467 "C:\\Keil_v5\\ARM\\PACK\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___17_app_tp_st_touch_c_0c52f749____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___17_app_tp_st_touch_c_0c52f749____REVSH| +#line 482 +|__asm___17_app_tp_st_touch_c_0c52f749____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/ISP_368/Listings/app_tp_transfer.txt b/project/ISP_368/Listings/app_tp_transfer.txt new file mode 100644 index 0000000..6b41962 --- /dev/null +++ b/project/ISP_368/Listings/app_tp_transfer.txt @@ -0,0 +1,1208 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\app_tp_transfer.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\app_tp_transfer.d --cpu=Cortex-M0 --apcs=interwork -O1 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL368 -I.\RTE\_ISP_368 -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_368 --omf_browse=.\objects\app_tp_transfer.crf ..\..\src\app\demo\app_tp_transfer.c] + THUMB + + AREA ||i.S20_Start_init||, CODE, READONLY, ALIGN=2 + + S20_Start_init PROC +;;;403 +;;;404 void S20_Start_init(void) +000000 b5f8 PUSH {r3-r7,lr} +;;;405 { +;;;406 uint8_t len=0; +;;;407 uint8_t temp=0; +;;;408 uint8_t temp_start_flag=0; +000002 2400 MOVS r4,#0 +;;;409 // if(phone_start_flag==1) +;;;410 { +;;;411 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); +000004 4d42 LDR r5,|L1.272| +000006 2308 MOVS r3,#8 +000008 4a42 LDR r2,|L1.276| +00000a 2101 MOVS r1,#1 +00000c 6828 LDR r0,[r5,#0] ; screen_reg_int_data +00000e f7fffffe BL app_tp_m_read + |L1.18| +;;;412 while(!hal_i2c_m_transfer_complate()); +000012 f7fffffe BL hal_i2c_m_transfer_complate +000016 2800 CMP r0,#0 +000018 d0fb BEQ |L1.18| +;;;413 delayMs(2); +00001a 2002 MOVS r0,#2 +00001c f7fffffe BL delayMs +;;;414 while(!hal_gpio_get_input_data(g_screen_input_int_pad)) +000020 4e3d LDR r6,|L1.280| +000022 e00c B |L1.62| + |L1.36| +;;;415 { +;;;416 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); +000024 2308 MOVS r3,#8 +000026 4a3b LDR r2,|L1.276| +000028 2101 MOVS r1,#1 +00002a 6828 LDR r0,[r5,#0] ; screen_reg_int_data +00002c f7fffffe BL app_tp_m_read + |L1.48| +;;;417 while(!hal_i2c_m_transfer_complate()); +000030 f7fffffe BL hal_i2c_m_transfer_complate +000034 2800 CMP r0,#0 +000036 d0fb BEQ |L1.48| +;;;418 delayMs(2); +000038 2002 MOVS r0,#2 +00003a f7fffffe BL delayMs + |L1.62| +00003e 7830 LDRB r0,[r6,#0] ;414 ; g_screen_input_int_pad +000040 f7fffffe BL hal_gpio_get_input_data +000044 2800 CMP r0,#0 ;414 +000046 d0ed BEQ |L1.36| +;;;419 } +;;;420 temp=s_screen_read_buffer[0]&0xf0; +000048 4f32 LDR r7,|L1.276| +00004a 7838 LDRB r0,[r7,#0] ; s_screen_read_buffer +00004c 0900 LSRS r0,r0,#4 +00004e 0100 LSLS r0,r0,#4 +;;;421 if((temp==0x10)||(temp==0x20)||(temp==0x30)) +000050 2810 CMP r0,#0x10 +000052 d003 BEQ |L1.92| +000054 2820 CMP r0,#0x20 +000056 d001 BEQ |L1.92| +000058 2830 CMP r0,#0x30 +00005a d100 BNE |L1.94| + |L1.92| +;;;422 { +;;;423 temp_start_flag=1; +00005c 2401 MOVS r4,#1 + |L1.94| +;;;424 } +;;;425 if(temp_start_flag==0) +00005e 2c00 CMP r4,#0 +000060 d146 BNE |L1.240| +;;;426 { +;;;427 app_tp_m_write(MI10_PRO_screen_init_data1, sizeof(MI10_PRO_screen_init_data1));//0xA0,0x00,0x01 +000062 2103 MOVS r1,#3 +000064 482d LDR r0,|L1.284| +000066 f7fffffe BL app_tp_m_write + |L1.106| +;;;428 while(!hal_i2c_m_transfer_complate()); +00006a f7fffffe BL hal_i2c_m_transfer_complate +00006e 2800 CMP r0,#0 +000070 d0fb BEQ |L1.106| +;;;429 delayMs(1); +000072 2001 MOVS r0,#1 +000074 f7fffffe BL delayMs +;;;430 app_tp_m_write(MI10_PRO_screen_init_data2, sizeof(MI10_PRO_screen_init_data2));//0xA2,0x03,0x00,0x00,0x00,0x03 +000078 4828 LDR r0,|L1.284| +00007a 2106 MOVS r1,#6 +00007c 3009 ADDS r0,r0,#9 +00007e f7fffffe BL app_tp_m_write + |L1.130| +;;;431 while(!hal_i2c_m_transfer_complate()); +000082 f7fffffe BL hal_i2c_m_transfer_complate +000086 2800 CMP r0,#0 +000088 d0fb BEQ |L1.130| +;;;432 delayMs(1); +00008a 2001 MOVS r0,#1 +00008c f7fffffe BL delayMs +;;;433 app_tp_m_write(MI10_PRO_screen_init_data3, sizeof(MI10_PRO_screen_init_data3));//0xA2,0x02,0x00 +000090 4822 LDR r0,|L1.284| +000092 2103 MOVS r1,#3 +000094 1cc0 ADDS r0,r0,#3 +000096 f7fffffe BL app_tp_m_write + |L1.154| +;;;434 while(!hal_i2c_m_transfer_complate()); +00009a f7fffffe BL hal_i2c_m_transfer_complate +00009e 2800 CMP r0,#0 +0000a0 d0fb BEQ |L1.154| +;;;435 delayMs(1); +0000a2 2001 MOVS r0,#1 +0000a4 f7fffffe BL delayMs +;;;436 app_tp_m_write(MI10_PRO_screen_init_data4, sizeof(MI10_PRO_screen_init_data4));//0xC0,0x07,0x01 +0000a8 481c LDR r0,|L1.284| +0000aa 2103 MOVS r1,#3 +0000ac 1d80 ADDS r0,r0,#6 +0000ae f7fffffe BL app_tp_m_write + |L1.178| +;;;437 while(!hal_i2c_m_transfer_complate()); +0000b2 f7fffffe BL hal_i2c_m_transfer_complate +0000b6 2800 CMP r0,#0 +0000b8 d0fb BEQ |L1.178| +;;;438 delayMs(1); +0000ba 2001 MOVS r0,#1 +0000bc f7fffffe BL delayMs +;;;439 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); +0000c0 2308 MOVS r3,#8 +0000c2 4a14 LDR r2,|L1.276| +0000c4 2101 MOVS r1,#1 +0000c6 6828 LDR r0,[r5,#0] ; screen_reg_int_data +0000c8 f7fffffe BL app_tp_m_read + |L1.204| +;;;440 while(!hal_i2c_m_transfer_complate()); +0000cc f7fffffe BL hal_i2c_m_transfer_complate +0000d0 2800 CMP r0,#0 +0000d2 d0fb BEQ |L1.204| +;;;441 if(s_screen_read_buffer[7]>0) +0000d4 79f8 LDRB r0,[r7,#7] ; s_screen_read_buffer +0000d6 2800 CMP r0,#0 +0000d8 d00a BEQ |L1.240| +;;;442 { +;;;443 len=s_screen_read_buffer[7]*8; +0000da 06c0 LSLS r0,r0,#27 +0000dc 0e03 LSRS r3,r0,#24 +;;;444 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, len); +0000de 4a0d LDR r2,|L1.276| +0000e0 2101 MOVS r1,#1 +0000e2 6828 LDR r0,[r5,#0] ; screen_reg_int_data +0000e4 f7fffffe BL app_tp_m_read + |L1.232| +;;;445 while(!hal_i2c_m_transfer_complate()); +0000e8 f7fffffe BL hal_i2c_m_transfer_complate +0000ec 2800 CMP r0,#0 +0000ee d0fb BEQ |L1.232| + |L1.240| +;;;446 } +;;;447 } +;;;448 #endif +;;;449 if(hal_gpio_get_input_data(g_screen_input_int_pad)) +0000f0 7830 LDRB r0,[r6,#0] ; g_screen_input_int_pad +0000f2 f7fffffe BL hal_gpio_get_input_data +0000f6 2800 CMP r0,#0 +0000f8 d008 BEQ |L1.268| +;;;450 { +;;;451 s_screen_init_complate = true; +0000fa 4908 LDR r1,|L1.284| +0000fc 2001 MOVS r0,#1 +0000fe 3908 SUBS r1,r1,#8 +000100 7108 STRB r0,[r1,#4] +;;;452 app_tp_screen_int_init(); +000102 f7fffffe BL app_tp_screen_int_init +;;;453 phone_start_flag=0; +000106 4906 LDR r1,|L1.288| +000108 2000 MOVS r0,#0 +00010a 7008 STRB r0,[r1,#0] + |L1.268| +;;;454 } +;;;455 } +;;;456 } +00010c bdf8 POP {r3-r7,pc} +;;;457 + ENDP + +00010e 0000 DCW 0x0000 + |L1.272| + DCD screen_reg_int_data + |L1.276| + DCD ||.bss|| + |L1.280| + DCD g_screen_input_int_pad + |L1.284| + DCD ||.data||+0x8 + |L1.288| + DCD phone_start_flag + + AREA ||i.app_tp_I2C_init||, CODE, READONLY, ALIGN=2 + + app_tp_I2C_init PROC +;;;161 +;;;162 void app_tp_I2C_init(void) +000000 b510 PUSH {r4,lr} +;;;163 { +;;;164 hal_i2c_s_init(CHIP_I2C_ADDRESS, CHIP_I2C_ADDR_BITS); +000002 2107 MOVS r1,#7 +000004 2048 MOVS r0,#0x48 +000006 f7fffffe BL hal_i2c_s_init +;;;165 hal_i2c_s_set_transfer(app_tp_i2cs_callback); +00000a 4804 LDR r0,|L2.28| +00000c f7fffffe BL hal_i2c_s_set_transfer +;;;166 hal_i2c_s_nonblocking_read(s_phone_read_buffer, BUFFER_SIZE_MAX); //ý buffer +000010 21c8 MOVS r1,#0xc8 +000012 4803 LDR r0,|L2.32| +000014 f7fffffe BL hal_i2c_s_nonblocking_read +;;;167 } +000018 bd10 POP {r4,pc} +;;;168 + ENDP + +00001a 0000 DCW 0x0000 + |L2.28| + DCD app_tp_i2cs_callback + |L2.32| + DCD ||.bss||+0xc8 + + AREA ||i.app_tp_i2cs_callback||, CODE, READONLY, ALIGN=1 + + app_tp_i2cs_callback PROC +;;;355 //recieve_numΪյָ +;;;356 static void app_tp_i2cs_callback(e_i2c_s_int_status int_status, size_t recieve_num) +000000 b510 PUSH {r4,lr} +;;;357 { +000002 4608 MOV r0,r1 +;;;358 #if 0 // 1: test +;;;359 if (int_status >2) +;;;360 { +;;;361 s_phone_read_buffer[2]=int_status; +;;;362 s_phone_read_buffer[3]=recieve_num; +;;;363 app_tp_m_write(s_phone_read_buffer, 4); +;;;364 } +;;;365 #endif +;;;366 app_tp_transfer_phone(recieve_num); +000004 f7fffffe BL app_tp_transfer_phone +;;;367 } +000008 bd10 POP {r4,pc} +;;;368 #endif + ENDP + + + AREA ||i.app_tp_init||, CODE, READONLY, ALIGN=2 + + app_tp_init PROC +;;;178 **************************************************************************/ +;;;179 void app_tp_init(void) +000000 b510 PUSH {r4,lr} +;;;180 { +;;;181 #ifdef DISABLE_TDDI_I2C_FUNCTION +;;;182 hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO +;;;183 hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET +;;;184 +;;;185 hal_gpio_set_mode(IO_PAD_TD_SPIM_CLK,IO_MODE_I2C1_SCL); +;;;186 hal_gpio_set_mode(IO_PAD_TD_SPIM_CSN,IO_MODE_I2C1_SDA); +;;;187 +;;;188 return; +;;;189 #else +;;;190 hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CLK, ENABLE, DISABLE); +000002 2200 MOVS r2,#0 +000004 2101 MOVS r1,#1 +000006 2018 MOVS r0,#0x18 +000008 f7fffffe BL hal_gpio_set_pull_state +;;;191 hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CSN, ENABLE, DISABLE); +00000c 2200 MOVS r2,#0 +00000e 2101 MOVS r1,#1 +000010 2019 MOVS r0,#0x19 +000012 f7fffffe BL hal_gpio_set_pull_state +;;;192 #endif +;;;193 +;;;194 app_tp_screen_init(); //ʼֻλIO +000016 f7fffffe BL app_tp_screen_init +;;;195 //app_tp_screen_int_init(); //screenж +;;;196 #ifdef G_PHONE_INT_DEFAULT_LOW +;;;197 hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_LOW); //phoneжIO +00001a 4807 LDR r0,|L4.56| +00001c 2100 MOVS r1,#0 +00001e 7800 LDRB r0,[r0,#0] ; g_phone_output_int_pad +000020 f7fffffe BL hal_gpio_init_output +;;;198 #else +;;;199 hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO +;;;200 #endif +;;;201 hal_gpio_init_input(g_screen_input_int_pad); +000024 4805 LDR r0,|L4.60| +000026 7800 LDRB r0,[r0,#0] ; g_screen_input_int_pad +000028 f7fffffe BL hal_gpio_init_input +;;;202 // hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET +;;;203 +;;;204 #if SCREEN_MASTER_TRANSFER_I2C +;;;205 hal_i2c_m_dma_init(SCREEN_I2C_ADDRESS, SCREEN_I2C_ADDR_BITS, I2C_MASTER_SPEED); +00002c 4a04 LDR r2,|L4.64| +00002e 2107 MOVS r1,#7 +000030 2049 MOVS r0,#0x49 +000032 f7fffffe BL hal_i2c_m_dma_init +;;;206 #elif SCREEN_MASTER_TRANSFER_SPI +;;;207 hal_spi_m_dma_init(SPI_MASTER_SPEED, SCREEN_SPI_CPHA, SCREEN_SPI_CPOL); +;;;208 #endif +;;;209 +;;;210 #if PHONE_SLAVE_TRANSFER_I2C +;;;211 // hal_i2c_s_init(CHIP_I2C_ADDRESS, CHIP_I2C_ADDR_BITS); +;;;212 // hal_i2c_s_set_transfer(app_tp_i2cs_callback); +;;;213 // hal_i2c_s_nonblocking_read(s_phone_read_buffer, BUFFER_SIZE_MAX); //ý buffer +;;;214 #elif PHONE_SLAVE_TRANSFER_SPI +;;;215 hal_spi_slave_init(PHONE_SPI_CPHA, PHONE_SPI_CPOL, true); // ʼspiԼdma +;;;216 hal_spi_slave_register_callback(app_tp_spis_callback); // עص +;;;217 hal_spi_slave_auto_transfer_abort(); // ֹͣ +;;;218 hal_spi_slave_flush_fifo(); // Flush FIFO +;;;219 +;;;220 /* ÿpacketԶ, circle mode Ϊfalse, յbuffer max sizeݺbufferٸ, packetɺûص */ +;;;221 hal_spi_slave_set_auto_rx_buffer(s_phone_read_buffer, BUFFER_SIZE_MAX, false); // auto rx buffer +;;;222 hal_spi_slave_set_auto_tx_buffer(phone_reg_const_data[0].write_back, phone_reg_const_data[0].write_back_size, false); // TX BUFFER +;;;223 +;;;224 hal_spi_slave_enable(); // spis +;;;225 hal_spi_slave_auto_transfer_start(); // rxԶ +;;;226 #endif +;;;227 } +000036 bd10 POP {r4,pc} +;;;228 + ENDP + + |L4.56| + DCD g_phone_output_int_pad + |L4.60| + DCD g_screen_input_int_pad + |L4.64| + DCD 0x000c3500 + + AREA ||i.app_tp_m_read||, CODE, READONLY, ALIGN=1 + + app_tp_m_read PROC +;;;293 **************************************************************************/ +;;;294 void app_tp_m_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size) +000000 b5f8 PUSH {r3-r7,lr} +;;;295 { +000002 4606 MOV r6,r0 +;;;296 #if SCREEN_MASTER_TRANSFER_I2C +;;;297 uint8_t i = 0; +000004 2400 MOVS r4,#0 +;;;298 uint32_t address = 0; +000006 2000 MOVS r0,#0 +000008 e005 B |L5.22| + |L5.10| +;;;299 +;;;300 for (i = 0; i < cmd_size; i++) //ȽҪ͵ϵ address +;;;301 { +;;;302 address |= (uint32_t)cmd[i] << i * 8; +00000a 5d35 LDRB r5,[r6,r4] +00000c 00e7 LSLS r7,r4,#3 +00000e 40bd LSLS r5,r5,r7 +000010 4328 ORRS r0,r0,r5 +000012 1c64 ADDS r4,r4,#1 ;300 +000014 b2e4 UXTB r4,r4 ;300 + |L5.22| +000016 428c CMP r4,r1 ;300 +000018 d3f7 BCC |L5.10| +;;;303 } +;;;304 hal_i2c_m_dma_read(address, cmd_size, data_buffer, data_size); +00001a f7fffffe BL hal_i2c_m_dma_read +;;;305 #elif SCREEN_MASTER_TRANSFER_SPI +;;;306 hal_spi_m_dma_read(cmd, cmd_size, data_buffer, data_size); +;;;307 #endif +;;;308 } +00001e bdf8 POP {r3-r7,pc} +;;;309 + ENDP + + + AREA ||i.app_tp_m_transfer_complate||, CODE, READONLY, ALIGN=1 + + app_tp_m_transfer_complate PROC +;;;236 **************************************************************************/ +;;;237 bool app_tp_m_transfer_complate(void) +000000 b510 PUSH {r4,lr} +;;;238 { +;;;239 #if SCREEN_MASTER_TRANSFER_I2C +;;;240 return hal_i2c_m_transfer_complate(); +000002 f7fffffe BL hal_i2c_m_transfer_complate +;;;241 #elif SCREEN_MASTER_TRANSFER_SPI +;;;242 return hal_spi_m_get_transfer_complate(); +;;;243 #else +;;;244 return true; +;;;245 #endif +;;;246 } +000006 bd10 POP {r4,pc} +;;;247 + ENDP + + + AREA ||i.app_tp_m_write||, CODE, READONLY, ALIGN=1 + + app_tp_m_write PROC +;;;273 **************************************************************************/ +;;;274 void app_tp_m_write(const uint8_t *txbuffer, size_t buffer_size) +000000 b510 PUSH {r4,lr} +;;;275 { +;;;276 #if SCREEN_MASTER_TRANSFER_I2C +;;;277 hal_i2c_m_dma_write(txbuffer, buffer_size); +000002 f7fffffe BL hal_i2c_m_dma_write +;;;278 #elif SCREEN_MASTER_TRANSFER_SPI +;;;279 hal_spi_m_dma_write(txbuffer, buffer_size); +;;;280 s_spim_write = true; +;;;281 #endif +;;;282 } +000006 bd10 POP {r4,pc} +;;;283 + ENDP + + + AREA ||i.app_tp_phone_clear_reset_on||, CODE, READONLY, ALIGN=2 + + app_tp_phone_clear_reset_on PROC +;;;710 **************************************************************************/ +;;;711 void app_tp_phone_clear_reset_on(void) +000000 4901 LDR r1,|L8.8| +;;;712 { +;;;713 s_phone_reset_flag = false; +000002 2000 MOVS r0,#0 +000004 7088 STRB r0,[r1,#2] +;;;714 } +000006 4770 BX lr +;;;715 + ENDP + + |L8.8| + DCD ||.data|| + + AREA ||i.app_tp_phone_reset_on||, CODE, READONLY, ALIGN=2 + + app_tp_phone_reset_on PROC +;;;698 **************************************************************************/ +;;;699 bool app_tp_phone_reset_on(void) +000000 4801 LDR r0,|L9.8| +;;;700 { +;;;701 return s_phone_reset_flag; +000002 7880 LDRB r0,[r0,#2] ; s_phone_reset_flag +;;;702 } +000004 4770 BX lr +;;;703 + ENDP + +000006 0000 DCW 0x0000 + |L9.8| + DCD ||.data|| + + AREA ||i.app_tp_s_read||, CODE, READONLY, ALIGN=1 + + app_tp_s_read PROC +;;;338 **************************************************************************/ +;;;339 void app_tp_s_read(void *rxBuffer, size_t data_size) +000000 b510 PUSH {r4,lr} +;;;340 { +;;;341 #if PHONE_SLAVE_TRANSFER_I2C +;;;342 hal_i2c_s_nonblocking_read(rxBuffer, data_size); +000002 f7fffffe BL hal_i2c_s_nonblocking_read +;;;343 #endif +;;;344 } +000006 bd10 POP {r4,pc} +;;;345 + ENDP + + + AREA ||i.app_tp_s_transfer_complate||, CODE, READONLY, ALIGN=1 + + app_tp_s_transfer_complate PROC +;;;254 **************************************************************************/ +;;;255 bool app_tp_s_transfer_complate(void) +000000 b510 PUSH {r4,lr} +;;;256 { +;;;257 #if SCREEN_MASTER_TRANSFER_I2C +;;;258 return hal_i2c_s_write_complate() && hal_i2c_s_read_complate(); +000002 f7fffffe BL hal_i2c_s_write_complate +000006 2800 CMP r0,#0 +000008 d005 BEQ |L11.22| +00000a f7fffffe BL hal_i2c_s_read_complate +00000e 2800 CMP r0,#0 +000010 d001 BEQ |L11.22| +000012 2001 MOVS r0,#1 +;;;259 #elif SCREEN_MASTER_TRANSFER_SPI +;;;260 return !hal_spi_slave_busy(); +;;;261 #else +;;;262 return true; +;;;263 #endif +;;;264 } +000014 bd10 POP {r4,pc} + |L11.22| +000016 2000 MOVS r0,#0 ;258 +000018 bd10 POP {r4,pc} +;;;265 + ENDP + + + AREA ||i.app_tp_s_write||, CODE, READONLY, ALIGN=1 + + app_tp_s_write PROC +;;;317 **************************************************************************/ +;;;318 void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size) +000000 b510 PUSH {r4,lr} +;;;319 { +;;;320 #if PHONE_SLAVE_TRANSFER_I2C +;;;321 hal_i2c_s_dma_write(txbuffer, buffer_size); +000002 f7fffffe BL hal_i2c_s_dma_write +;;;322 #elif PHONE_SLAVE_TRANSFER_SPI +;;;323 //while (hal_spi_slave_busy()); +;;;324 hal_spi_slave_auto_transfer_abort(); +;;;325 hal_spi_slave_flush_fifo(); +;;;326 hal_spi_slave_set_auto_tx_buffer(txbuffer, buffer_size, true); +;;;327 hal_spi_slave_auto_transfer_start(); +;;;328 #endif +;;;329 } +000006 bd10 POP {r4,pc} +;;;330 + ENDP + + + AREA ||i.app_tp_screen_init||, CODE, READONLY, ALIGN=2 + + app_tp_screen_init PROC +;;;152 **************************************************************************/ +;;;153 void app_tp_screen_init(void) +000000 b510 PUSH {r4,lr} +;;;154 { +;;;155 hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); +000002 4c0a LDR r4,|L13.44| +000004 2101 MOVS r1,#1 +000006 7820 LDRB r0,[r4,#0] ; g_screen_input_rst_pad +000008 f7fffffe BL hal_gpio_init_output +;;;156 delayUs(200); +00000c 20c8 MOVS r0,#0xc8 +00000e f7fffffe BL delayUs +;;;157 hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_LOW); +000012 2100 MOVS r1,#0 +000014 7820 LDRB r0,[r4,#0] ; g_screen_input_rst_pad +000016 f7fffffe BL hal_gpio_set_output_data +;;;158 delayUs(200); +00001a 20c8 MOVS r0,#0xc8 +00001c f7fffffe BL delayUs +;;;159 hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); +000020 2101 MOVS r1,#1 +000022 7820 LDRB r0,[r4,#0] ; g_screen_input_rst_pad +000024 f7fffffe BL hal_gpio_set_output_data +;;;160 } +000028 bd10 POP {r4,pc} +;;;161 + ENDP + +00002a 0000 DCW 0x0000 + |L13.44| + DCD g_screen_input_rst_pad + + AREA ||i.app_tp_screen_int_callback||, CODE, READONLY, ALIGN=2 + + app_tp_screen_int_callback PROC +;;;70 **************************************************************************/ +;;;71 static void app_tp_screen_int_callback(void *data) +000000 4901 LDR r1,|L14.8| +;;;72 { +;;;73 s_screen_int_flag = true; +000002 2001 MOVS r0,#1 +000004 7048 STRB r0,[r1,#1] +;;;74 } +000006 4770 BX lr +;;;75 + ENDP + + |L14.8| + DCD ||.data|| + + AREA ||i.app_tp_screen_int_init||, CODE, READONLY, ALIGN=2 + + app_tp_screen_int_init PROC +;;;112 **************************************************************************/ +;;;113 static void app_tp_screen_int_init(void) +000000 b510 PUSH {r4,lr} +;;;114 { +;;;115 hal_gpio_set_pull_state(g_screen_input_int_pad, ENABLE, DISABLE); // 1. +000002 4c0b LDR r4,|L15.48| +000004 2200 MOVS r2,#0 +000006 2101 MOVS r1,#1 +000008 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +00000a f7fffffe BL hal_gpio_set_pull_state +;;;116 hal_gpio_ctrl_eint(g_screen_input_int_pad, DISABLE); // 2.رж +00000e 2100 MOVS r1,#0 +000010 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +000012 f7fffffe BL hal_gpio_ctrl_eint +;;;117 hal_gpio_init_eint(g_screen_input_int_pad, DETECT_FALLING_EDGE); // 3.жϳʼ,TPһ㶼½شж +000016 2103 MOVS r1,#3 +000018 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +00001a f7fffffe BL hal_gpio_init_eint +;;;118 hal_gpio_reg_eint_cb(g_screen_input_int_pad, app_tp_screen_int_callback); // 4.עص +00001e 4905 LDR r1,|L15.52| +000020 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +000022 f7fffffe BL hal_gpio_reg_eint_cb +;;;119 hal_gpio_ctrl_eint(g_screen_input_int_pad, ENABLE); // 5.ʹж +000026 2101 MOVS r1,#1 +000028 7820 LDRB r0,[r4,#0] ; g_screen_input_int_pad +00002a f7fffffe BL hal_gpio_ctrl_eint +;;;120 } +00002e bd10 POP {r4,pc} +;;;121 + ENDP + + |L15.48| + DCD g_screen_input_int_pad + |L15.52| + DCD app_tp_screen_int_callback + + AREA ||i.app_tp_screen_int_lvl_low||, CODE, READONLY, ALIGN=2 + + app_tp_screen_int_lvl_low PROC +;;;82 **************************************************************************/ +;;;83 static bool app_tp_screen_int_lvl_low(void) +000000 b510 PUSH {r4,lr} +;;;84 { +;;;85 uint8_t i = 1; +;;;86 uint8_t j = 1; +;;;87 #if SCREEN_MASTER_TRANSFER_I2C +;;;88 // i=hal_gpio_get_input_data(g_screen_input_int_pad); +;;;89 // j=hal_gpio_get_input_data(g_screen_input_int_pad); +;;;90 // if((i+j)==0) +;;;91 // { +;;;92 // return true; +;;;93 // } +;;;94 //else +;;;95 // { +;;;96 // return false; +;;;97 // } +;;;98 return !hal_gpio_get_input_data(g_screen_input_int_pad); +000002 4805 LDR r0,|L16.24| +000004 7800 LDRB r0,[r0,#0] ; g_screen_input_int_pad +000006 f7fffffe BL hal_gpio_get_input_data +00000a 2800 CMP r0,#0 +00000c d001 BEQ |L16.18| +00000e 2000 MOVS r0,#0 +;;;99 #elif SCREEN_MASTER_TRANSFER_SPI +;;;100 return !hal_gpio_get_input_data(g_screen_input_int_pad); //ӦSPIͨŹżͻȻCS ͨ쳣 +;;;101 #else +;;;102 return false; +;;;103 #endif +;;;104 } +000010 bd10 POP {r4,pc} + |L16.18| +000012 2001 MOVS r0,#1 ;98 +000014 bd10 POP {r4,pc} +;;;105 + ENDP + +000016 0000 DCW 0x0000 + |L16.24| + DCD g_screen_input_int_pad + + AREA ||i.app_tp_transfer_phone||, CODE, READONLY, ALIGN=2 + + app_tp_transfer_phone PROC +;;;670 **************************************************************************/ +;;;671 static void app_tp_transfer_phone(size_t recieve_num) +000000 b51c PUSH {r2-r4,lr} +;;;672 { +;;;673 const uint8_t *phone_write_buffer; +;;;674 size_t phone_write_buffer_size = 0; +000002 2100 MOVS r1,#0 +000004 9100 STR r1,[sp,#0] +;;;675 /* ݽжǷҪԼ𸴵bufferָ */ +;;;676 if (recieve_num > 0) +000006 2800 CMP r0,#0 +000008 d005 BEQ |L17.22| +;;;677 { +;;;678 #if 0// 1: test +;;;679 s_phone_read_buffer[3]=recieve_num; +;;;680 app_tp_m_write(s_phone_read_buffer, 4); +;;;681 #endif +;;;682 app_tp_phone_analysis_data(s_phone_read_buffer, recieve_num, &phone_write_buffer, &phone_write_buffer_size); +00000a 4601 MOV r1,r0 +00000c 466b MOV r3,sp +00000e aa01 ADD r2,sp,#4 +000010 4806 LDR r0,|L17.44| +000012 f7fffffe BL app_tp_phone_analysis_data + |L17.22| +;;;683 } +;;;684 +;;;685 app_tp_s_read(s_phone_read_buffer, BUFFER_SIZE_MAX); +000016 21c8 MOVS r1,#0xc8 +000018 4804 LDR r0,|L17.44| +00001a f7fffffe BL app_tp_s_read +;;;686 if (phone_write_buffer_size) //0ʾҪֻ÷buffer +00001e 9900 LDR r1,[sp,#0] +000020 2900 CMP r1,#0 +000022 d002 BEQ |L17.42| +;;;687 { +;;;688 app_tp_s_write(phone_write_buffer, phone_write_buffer_size); +000024 9801 LDR r0,[sp,#4] +000026 f7fffffe BL app_tp_s_write + |L17.42| +;;;689 } +;;;690 } +00002a bd1c POP {r2-r4,pc} +;;;691 + ENDP + + |L17.44| + DCD ||.bss||+0xc8 + + AREA ||i.app_tp_transfer_screen_const||, CODE, READONLY, ALIGN=2 + + app_tp_transfer_screen_const PROC +;;;468 **************************************************************************/ +;;;469 static void app_tp_transfer_screen_const(void) +000000 b510 PUSH {r4,lr} +;;;470 { +;;;471 // static bool screen_const_transfer_buffer_ready = true; // buffer Ƿ׼ +;;;472 uint8_t ii; +;;;473 // uint8_t len=0; +;;;474 /**** 1. жϵǰ״̬ͨѽ, ״̬ͨѽҿʼ̻δ****/ +;;;475 #if 0 // test +;;;476 uint8_t test_master_read_buffer[10] = {0x08, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; +;;;477 uint8_t write_buffer[10] = {0x04, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; +;;;478 +;;;479 // for (ii =0x20; ii<0x7F; ii++) +;;;480 { +;;;481 //hal_i2c_m_dma_init(ii, SCREEN_I2C_ADDR_BITS); +;;;482 //delayMs(100); +;;;483 if (hal_i2c_m_dma_write(write_buffer, 1)) +;;;484 { +;;;485 //break; +;;;486 } +;;;487 while(!hal_i2c_m_transfer_complate()); +;;;488 hal_i2c_m_dma_read(test_master_read_buffer, 1, test_master_read_buffer, 2); +;;;489 } +;;;490 #endif +;;;491 +;;;492 +;;;493 if (app_tp_m_transfer_complate() && (s_screen_const_transfer_count < screen_reg_start_data_size)) +000002 f7fffffe BL app_tp_m_transfer_complate +000006 2800 CMP r0,#0 +000008 d012 BEQ |L18.48| +00000a 4c0a LDR r4,|L18.52| +00000c 490a LDR r1,|L18.56| +00000e 7960 LDRB r0,[r4,#5] ; s_screen_const_transfer_count +000010 7809 LDRB r1,[r1,#0] ; screen_reg_start_data_size +000012 4288 CMP r0,r1 +000014 d20c BCS |L18.48| +;;;494 { +;;;495 if (s_spim_write) //SPI дݺҪѽFIFOݶȻӰһζȡ +000016 7820 LDRB r0,[r4,#0] ; s_spim_write +000018 2800 CMP r0,#0 +00001a d003 BEQ |L18.36| +;;;496 { +;;;497 hal_spi_m_clear_rxfifo(); +00001c f7fffffe BL hal_spi_m_clear_rxfifo +;;;498 s_spim_write = false; +000020 2000 MOVS r0,#0 +000022 7020 STRB r0,[r4,#0] + |L18.36| +;;;499 } +;;;500 +;;;501 #if 1 +;;;502 +;;;503 // #ifndef USE_FOR_SUMSUNG_S20 +;;;504 // for (ii =0; ii= screen_reg_start_data_size) +;;;561 { +;;;562 s_screen_init_complate = true; +;;;563 } +;;;564 } +;;;565 #endif +;;;566 } +;;;567 } +000030 bd10 POP {r4,pc} +;;;568 + ENDP + +000032 0000 DCW 0x0000 + |L18.52| + DCD ||.data|| + |L18.56| + DCD screen_reg_start_data_size + |L18.60| + DCD phone_start_flag + + AREA ||i.app_tp_transfer_screen_int||, CODE, READONLY, ALIGN=2 + + app_tp_transfer_screen_int PROC +;;;595 **************************************************************************/ +;;;596 void app_tp_transfer_screen_int(void) +000000 b5f8 PUSH {r3-r7,lr} +;;;597 { +;;;598 uint8_t len=0; +000002 2400 MOVS r4,#0 +;;;599 uint8_t temp_len=0; +000004 2700 MOVS r7,#0 +;;;600 bool screen_gpio_int = false; +;;;601 static uint8_t screen_int_transfer_count = 0; //¼ǰͨŵһ +;;;602 static bool screen_int_transfer_buffer_ready = true; // buffer Ƿ׼ +;;;603 // static uint8_t test_flag = 0; +;;;604 // s_screen_init_complate=false;//Ϊ¼⽫ƬΪ·ݣFT8719̩ĹͨѶ +;;;605 if (!s_screen_init_complate) //TP ʼδɣȽгʼ +000006 4d43 LDR r5,|L19.276| +000008 7928 LDRB r0,[r5,#4] ; s_screen_init_complate +00000a 2800 CMP r0,#0 +00000c d003 BEQ |L19.22| +;;;606 { +;;;607 +;;;608 app_tp_transfer_screen_const(); +;;;609 +;;;610 return; +;;;611 } +;;;612 +;;;613 +;;;614 /**** 1. ж screen Ƿ񷢳жź ****/ +;;;615 // s_screen_int_flag: жźű־λ +;;;616 // app_tp_screen_int_lvl_low : SPI ʱͨʱżcsߵͨ쳣ñ־λڽ +;;;617 screen_gpio_int = s_screen_int_flag || app_tp_screen_int_lvl_low(); +00000e 7868 LDRB r0,[r5,#1] ; s_screen_int_flag +000010 2800 CMP r0,#0 +000012 d107 BNE |L19.36| +000014 e002 B |L19.28| + |L19.22| +000016 f7fffffe BL app_tp_transfer_screen_const + |L19.26| +;;;618 if (screen_gpio_int) +;;;619 { +;;;620 s_screen_int_flag = false; +;;;621 +;;;622 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); +;;;623 while(!hal_i2c_m_transfer_complate()); +;;;624 if(s_screen_read_buffer[7]>0) +;;;625 { +;;;626 len=s_screen_read_buffer[7]*8; +;;;627 app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); +;;;628 while(!hal_i2c_m_transfer_complate()); +;;;629 temp_len=len+7; +;;;630 } +;;;631 if(s_screen_read_buffer[temp_len]>0) +;;;632 { +;;;633 len=s_screen_read_buffer[7]*8; +;;;634 app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[temp_len+1], len); +;;;635 while(!hal_i2c_m_transfer_complate()); +;;;636 } +;;;637 delayUs(100); +;;;638 +;;;639 while(!hal_gpio_get_input_data(g_screen_input_int_pad)) +;;;640 { +;;;641 app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); +;;;642 while(!hal_i2c_m_transfer_complate()); +;;;643 delayUs(100); +;;;644 if(s_screen_read_buffer[7]>0) +;;;645 { +;;;646 len=s_screen_read_buffer[7]*8; +;;;647 app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); +;;;648 while(!hal_i2c_m_transfer_complate()); +;;;649 delayUs(100); +;;;650 } +;;;651 } +;;;652 ap_tp_st_touch_scan_point_record_event(s_screen_read_buffer, len+8); +;;;653 ap_tp_st_touch_error_handler_FF(s_screen_read_buffer); +;;;654 ap_tp_st_touch_error_handler_F3(s_screen_read_buffer); +;;;655 screen_int_transfer_buffer_ready = true; +;;;656 screen_int_transfer_count = app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer,screen_reg_int_data[2].rxbuffer_size); +;;;657 screen_int_transfer_count = 0; +;;;658 s_screen_int_transfer_status = false; +;;;659 } +;;;660 } +00001a bdf8 POP {r3-r7,pc} + |L19.28| +00001c f7fffffe BL app_tp_screen_int_lvl_low +000020 2800 CMP r0,#0 ;617 +000022 d000 BEQ |L19.38| + |L19.36| +000024 2001 MOVS r0,#1 ;617 + |L19.38| +000026 2800 CMP r0,#0 ;618 +000028 d0f7 BEQ |L19.26| +00002a 493a LDR r1,|L19.276| +00002c 2000 MOVS r0,#0 ;620 +00002e 7048 STRB r0,[r1,#1] ;620 +000030 4d39 LDR r5,|L19.280| +000032 2308 MOVS r3,#8 ;622 +000034 4a39 LDR r2,|L19.284| +000036 2101 MOVS r1,#1 ;622 +000038 6828 LDR r0,[r5,#0] ;622 ; screen_reg_int_data +00003a f7fffffe BL app_tp_m_read + |L19.62| +00003e f7fffffe BL hal_i2c_m_transfer_complate +000042 2800 CMP r0,#0 ;623 +000044 d0fb BEQ |L19.62| +000046 4e35 LDR r6,|L19.284| +000048 4631 MOV r1,r6 ;622 +00004a 79f0 LDRB r0,[r6,#7] ;624 ; s_screen_read_buffer +00004c 3108 ADDS r1,r1,#8 ;622 +00004e 9100 STR r1,[sp,#0] ;624 +000050 2800 CMP r0,#0 ;624 +000052 d00d BEQ |L19.112| +000054 06c0 LSLS r0,r0,#27 ;626 +000056 0e04 LSRS r4,r0,#24 ;626 +000058 4623 MOV r3,r4 ;627 +00005a 6828 LDR r0,[r5,#0] ;627 ; screen_reg_int_data +00005c 2101 MOVS r1,#1 ;627 +00005e 9a00 LDR r2,[sp,#0] ;627 +000060 f7fffffe BL app_tp_m_read + |L19.100| +000064 f7fffffe BL hal_i2c_m_transfer_complate +000068 2800 CMP r0,#0 ;628 +00006a d0fb BEQ |L19.100| +00006c 1de0 ADDS r0,r4,#7 ;629 +00006e b2c7 UXTB r7,r0 ;629 + |L19.112| +000070 5df0 LDRB r0,[r6,r7] ;631 +000072 2800 CMP r0,#0 ;631 +000074 d00d BEQ |L19.146| +000076 79f0 LDRB r0,[r6,#7] ;633 ; s_screen_read_buffer +000078 06c0 LSLS r0,r0,#27 ;633 +00007a 0e04 LSRS r4,r0,#24 ;633 +00007c 19f2 ADDS r2,r6,r7 ;634 +00007e 1c52 ADDS r2,r2,#1 ;634 +000080 4623 MOV r3,r4 ;634 +000082 2101 MOVS r1,#1 ;634 +000084 6828 LDR r0,[r5,#0] ;634 ; screen_reg_int_data +000086 f7fffffe BL app_tp_m_read + |L19.138| +00008a f7fffffe BL hal_i2c_m_transfer_complate +00008e 2800 CMP r0,#0 ;635 +000090 d0fb BEQ |L19.138| + |L19.146| +000092 2064 MOVS r0,#0x64 ;637 +000094 f7fffffe BL delayUs +000098 4f21 LDR r7,|L19.288| +00009a e01e B |L19.218| + |L19.156| +00009c 2308 MOVS r3,#8 ;641 +00009e 4a1f LDR r2,|L19.284| +0000a0 2101 MOVS r1,#1 ;641 +0000a2 6828 LDR r0,[r5,#0] ;641 ; screen_reg_int_data +0000a4 f7fffffe BL app_tp_m_read + |L19.168| +0000a8 f7fffffe BL hal_i2c_m_transfer_complate +0000ac 2800 CMP r0,#0 ;642 +0000ae d0fb BEQ |L19.168| +0000b0 2064 MOVS r0,#0x64 ;643 +0000b2 f7fffffe BL delayUs +0000b6 79f0 LDRB r0,[r6,#7] ;644 ; s_screen_read_buffer +0000b8 2800 CMP r0,#0 ;644 +0000ba d00e BEQ |L19.218| +0000bc 06c0 LSLS r0,r0,#27 ;646 +0000be 0e04 LSRS r4,r0,#24 ;646 +0000c0 4623 MOV r3,r4 ;647 +0000c2 6828 LDR r0,[r5,#0] ;647 ; screen_reg_int_data +0000c4 2101 MOVS r1,#1 ;647 +0000c6 9a00 LDR r2,[sp,#0] ;647 +0000c8 f7fffffe BL app_tp_m_read + |L19.204| +0000cc f7fffffe BL hal_i2c_m_transfer_complate +0000d0 2800 CMP r0,#0 ;648 +0000d2 d0fb BEQ |L19.204| +0000d4 2064 MOVS r0,#0x64 ;649 +0000d6 f7fffffe BL delayUs + |L19.218| +0000da 7838 LDRB r0,[r7,#0] ;639 ; g_screen_input_int_pad +0000dc f7fffffe BL hal_gpio_get_input_data +0000e0 2800 CMP r0,#0 ;639 +0000e2 d0db BEQ |L19.156| +0000e4 3408 ADDS r4,r4,#8 ;652 +0000e6 b2e1 UXTB r1,r4 ;652 +0000e8 480c LDR r0,|L19.284| +0000ea f7fffffe BL ap_tp_st_touch_scan_point_record_event +0000ee 480b LDR r0,|L19.284| +0000f0 f7fffffe BL ap_tp_st_touch_error_handler_FF +0000f4 4809 LDR r0,|L19.284| +0000f6 f7fffffe BL ap_tp_st_touch_error_handler_F3 +0000fa 4c06 LDR r4,|L19.276| +0000fc 2001 MOVS r0,#1 ;655 +0000fe 71e0 STRB r0,[r4,#7] ;655 +000100 4906 LDR r1,|L19.284| +000102 79a0 LDRB r0,[r4,#6] ;656 ; screen_int_transfer_count +000104 6aaa LDR r2,[r5,#0x28] ;656 ; screen_reg_int_data +000106 f7fffffe BL app_tp_screen_analysis_int +00010a 2000 MOVS r0,#0 ;657 +00010c 71a0 STRB r0,[r4,#6] ;657 +00010e 70e0 STRB r0,[r4,#3] ;658 +000110 bdf8 POP {r3-r7,pc} +;;;661 + ENDP + +000112 0000 DCW 0x0000 + |L19.276| + DCD ||.data|| + |L19.280| + DCD screen_reg_int_data + |L19.284| + DCD ||.bss|| + |L19.288| + DCD g_screen_input_int_pad + + AREA ||i.app_tp_transfer_screen_start||, CODE, READONLY, ALIGN=2 + + app_tp_transfer_screen_start PROC +;;;575 **************************************************************************/ +;;;576 void app_tp_transfer_screen_start(void) +000000 b570 PUSH {r4-r6,lr} +;;;577 { +;;;578 // s_screen_init_complate = false; +;;;579 s_screen_const_transfer_count = 0; +000002 4c03 LDR r4,|L20.16| +000004 2500 MOVS r5,#0 +000006 7165 STRB r5,[r4,#5] +;;;580 // app_tp_screen_init(); +;;;581 #ifndef DISABLE_I2C_INIT_CODE +;;;582 app_tp_transfer_screen_const(); +000008 f7fffffe BL app_tp_transfer_screen_const +;;;583 #endif +;;;584 s_screen_int_flag = false; +00000c 7065 STRB r5,[r4,#1] +;;;585 } +00000e bd70 POP {r4-r6,pc} +;;;586 + ENDP + + |L20.16| + DCD ||.data|| + + AREA ||.bss||, DATA, NOINIT, ALIGN=0 + + s_screen_read_buffer + % 200 + s_phone_read_buffer + % 200 + + AREA ||.data||, DATA, ALIGN=0 + + s_spim_write +000000 00 DCB 0x00 + s_screen_int_flag +000001 00 DCB 0x00 + s_phone_reset_flag +000002 00 DCB 0x00 + s_screen_int_transfer_status +000003 00 DCB 0x00 + s_screen_init_complate +000004 00 DCB 0x00 + s_screen_const_transfer_count +000005 ff DCB 0xff + screen_int_transfer_count +000006 00 DCB 0x00 + screen_int_transfer_buffer_ready +000007 01 DCB 0x01 + MI10_PRO_screen_init_data1 +000008 a00001 DCB 0xa0,0x00,0x01 + MI10_PRO_screen_init_data3 +00000b a2 DCB 0xa2 +00000c 0200 DCB 0x02,0x00 + MI10_PRO_screen_init_data4 +00000e c007 DCB 0xc0,0x07 +000010 01 DCB 0x01 + MI10_PRO_screen_init_data2 +000011 a20300 DCB 0xa2,0x03,0x00 +000014 000003 DCB 0x00,0x00,0x03 + + AREA ||area_number.25||, DATA, ALIGN=0 + + EXPORTAS ||area_number.25||, ||.data|| + MI10_PRO_screen_init_data5 +000000 a40670 DCB 0xa4,0x06,0x70 + + AREA ||area_number.26||, DATA, ALIGN=0 + + EXPORTAS ||area_number.26||, ||.data|| + MI10_PRO_screen_init_data6 +000000 a60000 DCB 0xa6,0x00,0x00 + + AREA ||area_number.27||, DATA, ALIGN=0 + + EXPORTAS ||area_number.27||, ||.data|| + MI10_PRO_screen_init_data7 +000000 fa200000 DCB 0xfa,0x20,0x00,0x00 +000004 78 DCB 0x78 + + AREA ||area_number.28||, DATA, ALIGN=0 + + EXPORTAS ||area_number.28||, ||.data|| + MI10_PRO_screen_init_data8 +000000 a2032000 DCB 0xa2,0x03,0x20,0x00 +000004 0000 DCB 0x00,0x00 + + AREA ||area_number.29||, DATA, ALIGN=0 + + EXPORTAS ||area_number.29||, ||.data|| + MI10_PRO_screen_init_data9 +000000 a001 DCB 0xa0,0x01 + + AREA ||area_number.30||, DATA, ALIGN=0 + + EXPORTAS ||area_number.30||, ||.data|| + MI10_PRO_screen_init_data10 +000000 a00000 DCB 0xa0,0x00,0x00 + + AREA ||area_number.31||, DATA, ALIGN=0 + + EXPORTAS ||area_number.31||, ||.data|| + read_point +000000 00 DCB 0x00 + + AREA ||area_number.32||, DATA, ALIGN=0 + + EXPORTAS ||area_number.32||, ||.data|| + s_screen_number +000000 0000 DCB 0x00,0x00 + + AREA ||area_number.33||, DATA, ALIGN=0 + + EXPORTAS ||area_number.33||, ||.data|| + s_screen_temp +000000 0000 DCB 0x00,0x00 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\demo\\app_tp_transfer.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___17_app_tp_transfer_c_e672c05a____REV16| +#line 467 "C:\\Keil_v5\\ARM\\PACK\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___17_app_tp_transfer_c_e672c05a____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___17_app_tp_transfer_c_e672c05a____REVSH| +#line 482 +|__asm___17_app_tp_transfer_c_e672c05a____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/ISP_368/Listings/board.txt b/project/ISP_368/Listings/board.txt new file mode 100644 index 0000000..3dfaad0 --- /dev/null +++ b/project/ISP_368/Listings/board.txt @@ -0,0 +1,63 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\board.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\board.d --cpu=Cortex-M0 --apcs=interwork -O1 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL368 -I.\RTE\_ISP_368 -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_368 --omf_browse=.\objects\board.crf ..\..\src\board\board.c] + THUMB + + AREA ||i.board_Init||, CODE, READONLY, ALIGN=2 + + board_Init PROC +;;;13 +;;;14 void board_Init(void) +000000 b510 PUSH {r4,lr} +;;;15 { +;;;16 hal_system_init(SYSTEM_CLOCK); +000002 4807 LDR r0,|L1.32| +000004 f7fffffe BL hal_system_init +;;;17 hal_system_enable_systick(1); +000008 2001 MOVS r0,#1 +00000a f7fffffe BL hal_system_enable_systick +;;;18 #if !EDA_MODE +;;;19 hal_system_init_console(115200); +00000e 20e1 MOVS r0,#0xe1 +000010 0240 LSLS r0,r0,#9 +000012 f7fffffe BL hal_system_init_console +;;;20 #endif +;;;21 #if defined(ISP_568) || defined(ISP_368) +;;;22 /* 从EFUSE读取DPHY校准值并设置 */ +;;;23 hal_system_set_phy_calibration(true); +000016 2001 MOVS r0,#1 +000018 f7fffffe BL hal_system_set_phy_calibration +;;;24 #endif +;;;25 } +00001c bd10 POP {r4,pc} +;;;26 + ENDP + +00001e 0000 DCW 0x0000 + |L1.32| + DCD 0x04c4b400 + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\board\\board.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___7_board_c_bcd01269____REV16| +#line 467 "C:\\Keil_v5\\ARM\\PACK\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___7_board_c_bcd01269____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___7_board_c_bcd01269____REVSH| +#line 482 +|__asm___7_board_c_bcd01269____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** diff --git a/project/ISP_368/Listings/main.txt b/project/ISP_368/Listings/main.txt new file mode 100644 index 0000000..dd176bf --- /dev/null +++ b/project/ISP_368/Listings/main.txt @@ -0,0 +1,55 @@ +; generated by Component: ARM Compiler 5.06 update 6 (build 750) Tool: ArmCC [4d3637] +; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave --gnu -o.\objects\main.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\main.d --cpu=Cortex-M0 --apcs=interwork -O1 --diag_suppress=9931 -I..\..\src -I..\..\src\board -I..\..\src\common -I..\..\src\sdk\include -I..\..\src\app\demo -I..\..\src\sdk\include\M0 -I..\..\src\app -I..\..\src\app\module_demo -I..\..\src\app\touch -I..\..\src\app\S8 -I..\..\src\app\S9 -I..\CVWL368 -I.\RTE\_ISP_368 -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\CMSIS\Core\Include -IC:\Keil_v5\ARM\PACK\ARM\CMSIS\5.5.1\Device\ARM\ARMCM0\Include -D__MICROLIB -D__UVISION_VERSION=528 -D_RTE_ -DARMCM0 -DISP_368 --omf_browse=.\objects\main.crf ..\..\src\app\main.c] + THUMB + + AREA ||i.main||, CODE, READONLY, ALIGN=1 + + main PROC +;;;13 +;;;14 int main() +000000 f7fffffe BL board_Init +;;;15 { +;;;16 // hal_system_init(); +;;;17 board_Init(); +;;;18 +;;;19 while (1) +;;;20 { +;;;21 #if _DEMO_S8_EN +;;;22 ap_demo(); +000004 f7fffffe BL ap_demo + |L1.8| +;;;23 #endif +;;;24 while (1); +000008 e7fe B |L1.8| +;;;25 } +;;;26 } + ENDP + + +;*** Start embedded assembler *** + +#line 1 "..\\..\\src\\app\\main.c" + AREA ||.rev16_text||, CODE + THUMB + EXPORT |__asm___6_main_c_main____REV16| +#line 467 "C:\\Keil_v5\\ARM\\PACK\\ARM\\CMSIS\\5.5.1\\CMSIS\\Core\\Include\\cmsis_armcc.h" +|__asm___6_main_c_main____REV16| PROC +#line 468 + + rev16 r0, r0 + bx lr + ENDP + AREA ||.revsh_text||, CODE + THUMB + EXPORT |__asm___6_main_c_main____REVSH| +#line 482 +|__asm___6_main_c_main____REVSH| PROC +#line 483 + + revsh r0, r0 + bx lr + ENDP + +;*** End embedded assembler *** + + __ARM_use_no_argv EQU 0 diff --git a/project/ISP_368/Objects/WL368_S10LITE_CSOT667.bin b/project/ISP_368/Objects/WL368_S10LITE_CSOT667.bin new file mode 100644 index 0000000..e7e3347 Binary files /dev/null and b/project/ISP_368/Objects/WL368_S10LITE_CSOT667.bin differ diff --git a/project/ISP_368/Objects/WL368_S10LITE_CSOT667_V100_20230714.bin b/project/ISP_368/Objects/WL368_S10LITE_CSOT667_V100_20230714.bin new file mode 100644 index 0000000..5292b50 Binary files /dev/null and b/project/ISP_368/Objects/WL368_S10LITE_CSOT667_V100_20230714.bin differ diff --git a/project/ISP_368/RTE/_ISP_368/RTE_Components.h b/project/ISP_368/RTE/_ISP_368/RTE_Components.h new file mode 100644 index 0000000..9bd4b37 --- /dev/null +++ b/project/ISP_368/RTE/_ISP_368/RTE_Components.h @@ -0,0 +1,21 @@ + +/* + * Auto generated Run-Time-Environment Configuration File + * *** Do not modify ! *** + * + * Project: 'ISP_368' + * Target: 'ISP_368' + */ + +#ifndef RTE_COMPONENTS_H +#define RTE_COMPONENTS_H + + +/* + * Define the Device Header File: + */ +#define CMSIS_device_header "ARMCM0.h" + + + +#endif /* RTE_COMPONENTS_H */ diff --git a/src/app/demo/ap_demo.c b/src/app/demo/ap_demo.c new file mode 100644 index 0000000..954350b --- /dev/null +++ b/src/app/demo/ap_demo.c @@ -0,0 +1,2797 @@ +/******************************************************************************* +* +* File: S20_demo.c +* Description: ϵͳļ +* Version: V0.1 +* Date: 2020-02-22 +* Author: Tempest + *******************************************************************************/ + +#include "ap_demo.h" +#include "ArmCM0.h" +#include "tau_device_datatype.h" +#include "tau_log.h" +#include "tau_operations.h" +#include "tau_common.h" +#include "tau_delay.h" +#include "hal_dsi_rx_ctrl.h" +#include "hal_dsi_tx_ctrl.h" +#include "hal_swire.h" +#include "hal_timer.h" +#include "hal_system.h" +#include "hal_gpio.h" +#include "hal_pwm.h" +#include "app_tp_st_touch.h" + + +#include "app_tp_transfer.h" +#ifdef LOG_TAG + #undef LOG_TAG +#endif +#define LOG_TAG "S10Lite_368" + +/*****************************************/ + +//S8 MIPIϢ +/* ֱ */ +#define INPUT_WIDTH 1080 +#define INPUT_HEIGHT 2400 +/* MIPI lane rate,video modeҪȷãcmd mode */ +#define INPUT_MIPI_LANE_RATE 1525000000//1400000000//1200000000 //898000000 +/* ͼʽ */ +#define INPUT_COLOR_MODE DSI_RGB888 +/* ݸʽ(DSI_DATA_CMD_MODE , DSI_DATA_VIDEO_MODE) */ +#define INPUT_DATA_MODE DSI_DATA_CMD_MODE +/* mipi lane(DSI_RX_LANE_x xΪ1-4) */ +#define INPUT_MIPI_LANE_NUM DSI_LANE_4 +/* Ϊvideo mode ʱݸʽ */ +#define INPUT_VIDEO_MODEL DSI_NONBURST_EVENT +/* ͨ(0-3) */ +#define INPUT_VC DSI_VC_0 +/* ֡(60/90/120/144Hz) */ +#define INPUT_FRAME_RATE DSI_FRAME_RATE_60HZ +/* ǷDSCѹ */ +#define INPUT_COMPRESS false + +#if AMOLED_NT37701_CSOT667 + /* ֱ */ + #define OUTPUT_WIDTH 1080 + #define OUTPUT_HEIGHT 2400 + /* ͨ(0-3) */ + #define OUTPUT_VC DSI_VC_0 + /* mipi lane(DSI_RX_LANE_x xΪ1-4) */ + #define OUTPUT_LANE_NUMBER DSI_LANE_4 + /* Ϊvideo mode ݸʽ */ + #define OUTPUT_VIDEO_MODEL DSI_NONBURST_PULSE + + #define OUTPUT_VSA 12 //8 + /* VBP */ + #define OUTPUT_VBP 8 + /* VBP */ + #define OUTPUT_VFP 56//72 + /* VSA */ + #define OUTPUT_HSA 8 + /* HBP */ + #define OUTPUT_HBP 12//92 + /* HFP */ + #define OUTPUT_HFP 120//100 + /* ʼģʽ */ + #define _CMD_TYPE DSI_CMD_TX_LP //0-HS,1-LP; + +#endif + + +#define SWIRE_TIMER TIMER_NUM1 +#define TE_TIMER TIMER_NUM2 +#define ENABLE_TP_WAKE_UP true +#define SWIRE_MAX_NUM 24 +#define SYNC_LINE 2000 + +#if ENABLE_TP_WAKE_UP + static bool g_need_enter_sleep_mode = false; + #define POWER_IO_A IO_PAD_TD_LEDPWM /* ӦIOҪ */ + #define POWER_IO_B IO_PAD_TD_SPIM_MISO /* ӦIOҪ */ +#endif +//#define DISPLAY_ONLY +#define CUS_SCLD_FILTER false +#define NEW_ACK_CMD_FUNC true + +/******************************************************/ +static hal_dsi_rx_ctrl_handle_t *g_rx_ctrl_handle = NULL; +static hal_dsi_tx_ctrl_handle_t *g_tx_ctrl_handle = NULL; +//S20 SWIRE=50->ELVSS=-1.7V +#define SWIRE_DEFAULT_NUM 50 + +#define ADD_TP_CALIBRATION 1 +#define AUTO_CAL_TP 0 +#define RUN_TEST 0 + +#if ADD_TP_CALIBRATION +static volatile bool g_calibration_flag = false; +#endif + +#ifdef RUN_TEST +static uint8_t g_run_test_cnt = 0; //leo +#endif + +#if AUTO_CAL_TP +static uint16_t g_cal_cnt = 300; //3sʱTPУ׼ +#endif + +#ifdef ADD_FINGERPRINT_FUNC +extern uint8_t fingerprint_flag; +#endif +static uint8_t hbm_mode =0; // 1: ģʽ +uint16_t rd_51_val2; + +static uint8_t swire_num = SWIRE_DEFAULT_NUM; +static uint8_t swire_num_bak = SWIRE_DEFAULT_NUM; +static uint8_t hbm_mode_cnt = 0; + +/* Ĭfalse,ʼ־λ,ʹTP1.8V,AC ʼҪTP1.8Vе */ +static volatile bool start_display_on = true; +static bool g_exit_sleep_mode = false; +extern bool s_screen_init_complate; + + +/* ʼɱ־λ */ +static bool panel_display_done = false; +//static bool g_panel_init_done = false; +static volatile bool g_resolution_change = false; +static void swire_init(void); +void Gpio_swire_output(uint8_t flag, uint8_t num); + +#ifdef USE_FOR_SUMSUNG_S21U +extern uint8_t Flag_blacklight_EN; +extern uint8_t tp_sleep_in; +extern uint8_t tp_sleep_count; +extern uint8_t tp_sleep_clk_count; +uint8_t phone_start_flag = 0; +uint16_t phone_DisplayOFF_count=0; +uint8_t phone_DisplayOFF_flag=0; +#endif + +uint32_t s_heartbeat = 0; + +#if ENABLE_TP_WAKE_UP +static void ap_reset_cb(void *data) +{ + /* лԴ */ + // hal_gpio_set_output_data_ex(POWER_IO_B, IO_LVL_HIGH, POWER_IO_A, IO_LVL_LOW); + hal_gpio_set_output_data(POWER_IO_A, IO_LVL_LOW); + /* VCC */ + //TAU_LOGD("disable reset!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!"); + hal_system_set_pvd(true); + hal_system_set_vcc(true); + NVIC_SystemReset(); +} +#endif + + +/// ȽϺ +uint32_t rx_filter_1080_h_4_96[32][2] = +{ + 0xB029EC0A, 0x0000000F, + 0x904DF003, 0x0000000F, + 0x6871F9FB, 0x0000000F, + 0x4899FBF4, 0x0000000F, + 0x28C1FDED, 0x0000000F, + 0x08EDFBE7, 0x0000000F, + 0xE119FDE0, 0x0000000E, + 0xC145F9DB, 0x0000000E, + 0xA175F3D6, 0x0000000E, + 0x81A9EBD1, 0x0000000E, + 0x69D9E1CD, 0x0000000E, + 0x520DD5C9, 0x0000000E, + 0x3A3DC7C7, 0x0000000E, + 0x2A71B7C4, 0x0000000E, + 0x1A9DA7C3, 0x0000000E, + 0x12CD93C2, 0x0000000E, + 0x12F97DC2, 0x0000000E, + 0x132567C2, 0x0000000E, + 0x1B4D4FC3, 0x0000000E, + 0x236D39C5, 0x0000000E, + 0x3B8D1FC7, 0x0000000E, + 0x4BA907CA, 0x0000000E, + 0x6BC0EDCD, 0x0000000E, + 0x8BD4D5D0, 0x0000000E, + 0xB3E4BBD4, 0x0000000E, + 0xDBF0A3D8, 0x0000000E, + 0x03F88DDC, 0x0000000F, + 0x3BF477E1, 0x0000000F, + 0x6BF861E5, 0x0000000F, + 0xA3F44DE9, 0x0000000F, + 0xDBF039ED, 0x0000000F, + 0x1BE027F2, 0x00000000 +}; + + +uint32_t rx_filter_2400_v_4_96[32][2] = +{ + 0xB029EC0A, 0x0000000F, + 0x904DF003, 0x0000000F, + 0x6871F9FB, 0x0000000F, + 0x4899FBF4, 0x0000000F, + 0x28C1FDED, 0x0000000F, + 0x08EDFBE7, 0x0000000F, + 0xE119FDE0, 0x0000000E, + 0xC145F9DB, 0x0000000E, + 0xA175F3D6, 0x0000000E, + 0x81A9EBD1, 0x0000000E, + 0x69D9E1CD, 0x0000000E, + 0x520DD5C9, 0x0000000E, + 0x3A3DC7C7, 0x0000000E, + 0x2A71B7C4, 0x0000000E, + 0x1A9DA7C3, 0x0000000E, + 0x12CD93C2, 0x0000000E, + 0x12F97DC2, 0x0000000E, + 0x132567C2, 0x0000000E, + 0x1B4D4FC3, 0x0000000E, + 0x236D39C5, 0x0000000E, + 0x3B8D1FC7, 0x0000000E, + 0x4BA907CA, 0x0000000E, + 0x6BC0EDCD, 0x0000000E, + 0x8BD4D5D0, 0x0000000E, + 0xB3E4BBD4, 0x0000000E, + 0xDBF0A3D8, 0x0000000E, + 0x03F88DDC, 0x0000000F, + 0x3BF477E1, 0x0000000F, + 0x6BF861E5, 0x0000000F, + 0xA3F44DE9, 0x0000000F, + 0xDBF039ED, 0x0000000F, + 0x1BE027F2, 0x00000000 +}; + + +static bool ap_dcs_read(uint8_t data_type, uint8_t dcs_cmd, uint8_t param) +{ +// static uint8_t read_7F_count = 0; +// static uint8_t read_A1_count =0; + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + ////TAU_LOGD("rv[%x] [%d] !!\n", dcs_cmd, return_size); //debug + + if (dcs_cmd == 0xDA) + { + phone_DisplayOFF_flag=1; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x81); + } + else if (dcs_cmd == 0x01) + { + ap_get_tp_calibration_status_01(g_rx_ctrl_handle, param); + } + else if (dcs_cmd == 0xDB) + { + phone_DisplayOFF_flag=1; + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x40); + } + else if (dcs_cmd == 0xDC) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x1, 0x01); + } + else if (dcs_cmd == 0x0A) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x01, 0x9F); + } + else if (dcs_cmd == 0x0E) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x01, 0x80); + } + else if (dcs_cmd == 0x05) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 0x01, 0x00); + } + + else if (dcs_cmd == 0xA1) + { + if (return_size == 0x04) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 0x04, 0x0B,0xE9,0x0C,0x8D); + } + else if (return_size == 0x08) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 0x08, 0x0B,0xE9,0x0C,0x8D,0x92,0x1D,0x0B,0x34); + } + else if (return_size == 0x0A) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 0x0A, 0x0B,0xE9,0x0C,0x8D,0x92,0x1D,0x0B,0x34,0x0C,0x14); + } + else if (return_size == 0x0B) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 0x0B, 0x0B,0xE9,0x0C,0x8D,0x92,0x1D,0x0B,0x34,0x0C,0x14,0xE5); + } + else if (return_size == 0x18) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 0x18, 0x0B,0xE9,0x0C,0x8D,0x92,0x1D,0x0B,0x34,0x0C,0x14,0xE5,0x30,0x01,0x01,0xA5,0x41,0x33,0x55,0x4D,0x31,0x53,0x39,0x43,0x35); + } + else if (return_size == 0x1F) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 0x1F, 0x0B,0xE9,0x0C,0x8D,0x92,0x1D,0x0B,0x34,0x0C,0x14,0xE5,0x30,0x01,0x01,0xA5,0x41,0x33,0x55,0x4D,0x31,0x53,0x39,0x43,0x35,0x32,0x4D,0x42,0x44,0x30,0x36,0x30); + } + } + else if (dcs_cmd == 0xD6) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 5, 0x89,0x1D,0xB3,0x78,0x2E); + + } + else if (dcs_cmd == 0xB7) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 0x0A, 0x2A,0x54,0x47,0x85,0x2A,0x54,0x47,0x85,0x00,0x5E); + + } + else if (dcs_cmd == 0x7F) + { + if (return_size == 10) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 10, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); + } + else if (return_size == 24) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 24, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00); + } + else if (return_size == 33) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 33, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00); + } + else if (return_size == 3) + { + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_LONG_RESPONSE, + DSI_VC_0, + 3, + 0x00,0x00,0x00); + } + else + { + TAU_LOGD("r[%x] [%d] err!!!!!!\n", dcs_cmd, return_size); + } + } + else + { + uint32_t return_size = hal_dsi_rx_ctrl_get_max_ret_size(g_rx_ctrl_handle); + hal_dsi_rx_ctrl_send_ack_cmd(g_rx_ctrl_handle, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, + DSI_VC_0, + 1, 0); + TAU_LOGD("r[%x] [%d] err!!!!!!\n", dcs_cmd, return_size); + } + + return true; +} + + +#if 0 +//720*1600 +const uint8_t pps_1[88] = { 0x11,0x00,0x00,0x89,0x30,0x80,0x06,0x40,0x02,0xD0,0x00,0x50,0x01,0x68,0x01,0x68, + 0x02,0x00,0x01,0xB4,0x00,0x20,0x06,0x2F,0x00,0x05,0x00,0x0C,0x01,0x38,0x01,0xE9, + 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, + 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, + 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, + 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x6B,0xF4}; + + //1080*2400 +const uint8_t pps_2[88] = { 0x11,0x00,0x00,0x89,0x30,0x80,0x09,0x60,0x04,0x38,0x00,0x28,0x02,0x1C,0x02,0x1C, + 0x02,0x00,0x02,0x0E,0x00,0x20,0x03,0xDD,0x00,0x07,0x00,0x0C,0x02,0x77,0x02,0x8B, + 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, + 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, + 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, + 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x6B,0xF4}; + + //1440*3200 +const uint8_t pps_3[88] = { 0x11,0x00,0x00,0x89,0x30,0x80,0x0C,0x80,0x05,0xA0,0x00,0x28,0x02,0xD0,0x02,0xD0, + 0x02,0x00,0x02,0x68,0x00,0x20,0x04,0x6C,0x00,0x0A,0x00,0x0C,0x02,0x77,0x01,0xE9, + 0x18,0x00,0x10,0xF0,0x03,0x0C,0x20,0x00,0x06,0x0B,0x0B,0x33,0x0E,0x1C,0x2A,0x38, + 0x46,0x54,0x62,0x69,0x70,0x77,0x79,0x7B,0x7D,0x7E,0x01,0x02,0x01,0x00,0x09,0x40, + 0x09,0xBE,0x19,0xFC,0x19,0xFA,0x19,0xF8,0x1A,0x38,0x1A,0x78,0x1A,0xB6,0x2A,0xF6, + 0x2B,0x34,0x2B,0x74,0x3B,0x74,0x6B,0xF4}; +#endif + +/* PPS update callback ڷֱлcase */ +static bool pps_update_handle(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height) +{ + /* AVDD ϵ, ڽϢPPS */ +// hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); + + + if (pic_width != g_rx_ctrl_handle->base_info.src_w || pic_height != g_rx_ctrl_handle->base_info.src_h) + { + //hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + /* PPS Update ҷֱʷ仯 */ + g_rx_ctrl_handle->base_info.src_w = pic_width; + g_rx_ctrl_handle->base_info.src_h = pic_height; + /* עⲿֻPPSǰ Compression Mode Command */ + g_rx_ctrl_handle->compress_en = hal_dsi_rx_ctrl_get_compressen_en(g_rx_ctrl_handle); + g_tx_ctrl_handle->base_info.src_w = pic_width; + g_tx_ctrl_handle->base_info.src_h = pic_height; + + //hal_dsi_rx_ctrl_toggle_resolution(g_rx_ctrl_handle); + hal_dsi_rx_ctrl_toggle_resolution_ex(g_rx_ctrl_handle); + + #if 0 + if (pic_width == 720 && pic_height == 1600) + { + hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps_1, 88); + } + else if (pic_width == 1080 && pic_height == 2400) + { + //hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps_2, 88); + } + else if (pic_width == 1440 && pic_height == 3200) + { + //hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps_3, 88);; + } + #endif + //hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); + ////TAU_LOGD("resolution update w[%d] h[%d] compress[%d]", pic_width, pic_height, g_rx_ctrl_handle->compress_en); + } + + //TAU_LOGD("PPS Update"); + return true; +} + + +static bool ap_set_display_on(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + //TAU_LOGD("disp on"); + return true; +} + +static bool ap_set_display_off(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x28); + TAU_LOGD("disp off"); + + return true; +} + + +static bool ap_set_enter_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + + Gpio_swire_output(0, 0); + delayMs(50); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x10); + delayMs(20); + hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_LOW); + + TAU_LOGD("enter sleep mode"); + +#if ENABLE_TP_WAKE_UP + g_need_enter_sleep_mode = true; +#endif + g_exit_sleep_mode = false; + + return true; +} + +static bool ap_set_exit_sleep_mode(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + TAU_LOGD("exit sleep mode"); + g_exit_sleep_mode = true; + + /* AVDD ϵ, ڽϢPPS */ + //hal_gpio_set_output_data(IO_PAD_PWMEN, IO_LVL_HIGH); + //hal_dsi_tx_ctrl_write_cmd(0x05, 0, 2, 0x11); + return true; +} + +/***************************************************************************** +*GPIOswire +*flag: =0, SWIRE=0; =1,SWIREź; =2, øٷSWIREź +*num: +*עFLAG=1ʱGPIOʼ!!!!!! +*****************************************************************************/ +void Gpio_swire_output(uint8_t flag, uint8_t num) +{ + uint8_t ii; + + if (flag) + { + if (flag ==2) + { + hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_HIGH); + //hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); + delayMs(2); + } + for (ii =0; ii< num; ii++) + { + hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_LOW); + delayUs(10); + hal_gpio_set_output_data(IO_PAD_ADCIN, IO_LVL_HIGH); + delayUs(9); + } + } + else + { + hal_gpio_init_output(IO_PAD_ADCIN, IO_LVL_LOW); + } +} + + + +#if 1 // 0:test +#ifdef ADD_PWM_OUTPUT_FOR_BL + +/***************************************************************************** +* @brief pwmԿƱ +* @param init: ǷΪʼһαѡʼ +* @param polarity: ԣfalse:ȸߺͣtrue:ȵͺ +* @param duty_ratio: ռձ(0-100) +* @param frequency: ƵʣλHZ +* @retval null +*****************************************************************************/ +static void test_pwm_out_adjust(bool init, bool polarity, uint8_t duty_ratio, uint32_t frequency) +{ + pwm_out_ctrl_e ctl0 = PWMO_CTRL_HIGH; + pwm_out_ctrl_e ctl1 = PWMO_CTRL_LOW; + if (polarity) + { + ctl0 = PWMO_CTRL_LOW; + ctl1 = PWMO_CTRL_HIGH; + } + uint32_t period = 1000000 / frequency; //λus + uint32_t thr0 = 0; + uint32_t thr1 = (period * duty_ratio / 100); + + if (duty_ratio == 100) + { + ctl1 = ctl0; + thr1 = period / 2; + } + if (init) + { + hal_pwm_out_init(); + hal_pwm_out_config_all(ctl0, ctl1, thr0, thr1, period); + } + else + { + hal_pwm_out_sync_all(ctl0, ctl1, thr0, thr1, period); + } +} + +void PWM_OUTPUT_TEST(void) +{ + test_pwm_out_adjust(true, true, 30, 20000); + delayMs(2); + test_pwm_out_adjust(false, false, 40, 10000); +} + +#define PWM_PERIOD 1000 //PWM.λUS +#define PWM_MIN 8 //Сֵɵ +static void PWM_init(void) +{ + // 1ms ڳʼ͵ƽ1000 + hal_pwm_out_init(); + hal_pwm_out_config_all(PWMO_CTRL_LOW, PWMO_CTRL_HIGH, 0, PWM_PERIOD, PWM_PERIOD); +} + +static uint16_t read_bl_data =0; +static uint16_t read_bl_data_bak =0; +void PWM_Task(void) +{ +uint16_t pwm_h; + +#ifdef USE_FOR_SUMSUNG_S21U + +#if AMOLED_NT37701_CSOT667 + + // s20: read_bl_data = 1~FD + + uint8_t reg51_val_h=0; + uint8_t reg51_val_l=0; + if(Flag_blacklight_EN) + { + read_bl_data_bak =0; + // hal_pwm_out_sync_thr(0, PWM_PERIOD+1); + hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x3F); + //printf("Flag_blacklight_EN!!!! read_bl_data[%4x] \n", read_bl_data); + return; + } + + if (g_need_enter_sleep_mode) + { + //ΪϨʱ + read_bl_data_bak =0; + // hal_pwm_out_sync_thr(0, PWM_PERIOD-PWM_MIN); //ΪС + hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, 0x00, 0x3F); +// printf("tp_sleep_in!!!! read_bl_data[%4x] \n", read_bl_data); + // return; + } + + if(read_bl_data !=read_bl_data_bak) + { +#if 0 + #if 1//Բ + if (pwm_h >700) + pwm_h = 300+(pwm_h-700)*7/3; + else + pwm_h = 1+(pwm_h-1)*3/7; + #endif + if(pwm_h >8; + hal_dsi_tx_ctrl_write_cmd(0x29, 0, 3, 0x51, reg51_val_h, reg51_val_l); //0FFF + read_bl_data_bak =read_bl_data; + } + +#else +// s20: read_bl_data = 1~FD + + if(Flag_blacklight_EN) + { + read_bl_data_bak =0; + hal_pwm_out_sync_thr(0, PWM_PERIOD+1); + //printf("Flag_blacklight_EN!!!! read_bl_data[%4x] \n", read_bl_data); + return; + } + + if (g_need_enter_sleep_mode) + { + //ΪϨʱ + read_bl_data_bak =0; + hal_pwm_out_sync_thr(0, PWM_PERIOD-PWM_MIN); //ΪС +// printf("tp_sleep_in!!!! read_bl_data[%4x] \n", read_bl_data); + // return; + } + + if(read_bl_data !=read_bl_data_bak) + { + pwm_h = PWM_PERIOD*read_bl_data/0xFF; + #if 1//Բ + if (pwm_h >700) + pwm_h = 300+(pwm_h-700)*7/3; + else + pwm_h = 1+(pwm_h-1)*3/7; + #endif + if(pwm_h 0: Ϊǡʱ +uint16_t value_reg_ca_bak =0; +uint16_t value_reg_b1_bak =0; +//#define USE_BL_ADJ6 //֮ǰS20ⷽʽ +#define USE_BL_ADJ7 //ĹS20ⷽʽ +#endif + +static uint8_t R60_Parma_backup = 0x00; + static bool ap_update_frame_rate(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ +#if 0 + static uint8_t frame_rate = 100; + if (frame_rate != dcs_packet->packet_param[0]) + { + frame_rate = dcs_packet->packet_param[0]; + if (frame_rate == 0x00) + { + hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LINE, TE_HW_MODE); + } + else + { + //0x08 120Hz + hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, SYNC_LINE, TE_SOFT_120HZ_MODE); + } + //TAU_LOGD("frame_rate:%02x", frame_rate); + } +#else + + if (R60_Parma_backup != dcs_packet->packet_param[0]) + { + R60_Parma_backup = dcs_packet->packet_param[0]; + + if (R60_Parma_backup == 0x08) + { + hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, g_rx_ctrl_handle->base_info.src_h, TE_SOFT_120HZ_MODE); + } + + else + { + hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle, g_rx_ctrl_handle->base_info.src_h, TE_HW_MODE); + //hal_dsi_rx_ctrl_set_tear_mode_ex(g_rx_ctrl_handle,2000,TE_SOFT_120HZ_MODE); + } + } + +#endif + + return true; +} + + +static bool ap_set_backlight_51(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + +#if 1 // video mode + uint16_t rd_51_val; // 0x0003~0x03FF(1020) [0x66,м仹һ] ==> 0x006F~0x07FF(1936) + + rd_51_val = dcs_packet->packet_param[0]; + rd_51_val = (rd_51_val<<8); + rd_51_val |= dcs_packet->packet_param[1]; + + if (hbm_mode ==0){ + rd_51_val2 = (rd_51_val-0x03)*1936/1020+0x6F; + if (rd_51_val2 < 0x220 && rd_51_val2 > 0x1B3){ + rd_51_val2 = 0x1B3; + } + if (hbm_mode_cnt ==0) + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, rd_51_val2>>8, rd_51_val2&0x00FF); +// TAU_LOGD("51[%04X][%04X][%d]", rd_51_val, rd_51_val2, hbm_mode); + } +#else + uint8_t cmd_data[2]; + + cmd_data[0] = dcs_packet->packet_param[0]; + cmd_data[1] = dcs_packet->packet_param[1]; + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, cmd_data[0], cmd_data[1]); + //TAU_LOGD("51:[%x]", (cmd_data[0]<<8)|cmd_data[1]); +#endif + return true; +} + +#if 0 // +static bool ap_set_backlight(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + /* AP 0xC 0xb8d , ʱ0xC,ƽҪһŻ */ + uint8_t temp_u8; + + value_reg_b1 = (dcs_packet->packet_param[0] << 8) + dcs_packet->packet_param[1]; + ////TAU_LOGD("CA[%4x],B1[%4x]", value_reg_ca, value_reg_b1); + +#ifdef USE_BL_ADJ7 + +#ifdef ADD_PWM_OUTPUT_FOR_BL + if (value_reg_b1 &0x8000) + { + // 60Hz + if(value_reg_ca >0x15FE) + { + read_bl_data = 0xFF; + } + else if(value_reg_ca >=0x1550) + { + // value_reg_ca =0x1550Ӧ105(ǵ⼶Ϊ256) + read_bl_data = 105+(value_reg_ca-0x1550)*150/175; + } + else + { + //value_reg_b1_bak=0xC65~0x1E4Ӧ1~104 + if (value_reg_b1_bak>0xC65) + read_bl_data =1; + else if (value_reg_b1_bak<0x1E4) + read_bl_data =104; + else + read_bl_data = 1+(0xC65-value_reg_b1_bak)*103/2689; + } + } + else if (value_reg_b1 &0x4000) + { + // 120Hz + if(value_reg_ca >0x15AD) + { + read_bl_data = 0xFF; + } + else if(value_reg_ca >=0x150F) + { + // value_reg_ca =0x15AD~0x150FӦ256~109(ǵ⼶Ϊ256) + read_bl_data = 109+(value_reg_ca-0x150F)*146/158; + } + else + { + //value_reg_b1_bak=0xC54~0x1E4Ӧ1~108 + if (value_reg_b1_bak>0xC54) + read_bl_data =1; + else if (value_reg_b1_bak<0x1E4) + read_bl_data =108; + else + read_bl_data = 1+(0xC54-value_reg_b1_bak)*107/2672; + } + } + else + { + value_reg_b1_bak = value_reg_b1; + if ((value_reg_ca ==0x2A00) &&(value_reg_b1 >0x500)) + s20_power_on_flag =1; + else + s20_power_on_flag =0; + } + + +#else + if (value_reg_b1 &0x8000) + { + //Ϊ60Hz + if(value_reg_ca >0x15FC) + { + swire_num = SWIRE_MAX_NUM; + } + else if(value_reg_ca >0x15ED) + { + swire_num = SWIRE_MAX_NUM+1; + } + else if(value_reg_ca >0x15DD) + { + swire_num = SWIRE_MAX_NUM+2; + } + else if(value_reg_ca >0x15CC) + { + swire_num = SWIRE_MAX_NUM+3; + } + else if(value_reg_ca >0x15BE) + { + swire_num = SWIRE_MAX_NUM+4; + } + else if(value_reg_ca >0x15AC) + { + swire_num = SWIRE_MAX_NUM+5; + } + else if(value_reg_ca >0x159A) + { + swire_num = SWIRE_MAX_NUM+6; + } + else if(value_reg_ca >0x155E) + { + swire_num = SWIRE_MAX_NUM+7; + } + else + { + if(value_reg_b1_bak <0x500) + { + swire_num = SWIRE_MAX_NUM+8; + } + else if(value_reg_b1_bak <0x900) + { + swire_num = SWIRE_MAX_NUM+9; + } + else if(value_reg_b1_bak <0xAE0) + { + swire_num = SWIRE_MAX_NUM+10; + } + else if(value_reg_b1_bak <0xBE8) + { + swire_num = SWIRE_MAX_NUM+11; + } + else if(value_reg_b1_bak <0xC38) + { + swire_num = SWIRE_MAX_NUM+12; + } + else + { + swire_num = SWIRE_MAX_NUM+13; + } + } + } + else if (value_reg_b1 &0x4000) + { + //Ϊ120Hz + if(value_reg_ca >0x15AC) + { + swire_num = SWIRE_MAX_NUM; + } + else if(value_reg_ca >0x159A) + { + swire_num = SWIRE_MAX_NUM+1; + } + else if(value_reg_ca >0x158B) + { + swire_num = SWIRE_MAX_NUM+2; + } + else if(value_reg_ca >0x157B) + { + swire_num = SWIRE_MAX_NUM+3; + } + else if(value_reg_ca >0x156A) + { + swire_num = SWIRE_MAX_NUM+4; + } + else if(value_reg_ca >0x1559) + { + swire_num = SWIRE_MAX_NUM+5; + } + else if(value_reg_ca >0x1547) + { + swire_num = SWIRE_MAX_NUM+6; + } + else if(value_reg_ca >0x1510) + { + swire_num = SWIRE_MAX_NUM+7; + } + else + { + if(value_reg_b1_bak <0x500) + { + swire_num = SWIRE_MAX_NUM+8; + } + else if(value_reg_b1_bak <0x900) + { + swire_num = SWIRE_MAX_NUM+9; + } + else if(value_reg_b1_bak <0xAE0) + { + swire_num = SWIRE_MAX_NUM+10; + } + else if(value_reg_b1_bak <0xBE8) + { + swire_num = SWIRE_MAX_NUM+11; + } + else if(value_reg_b1_bak <0xC38) + { + swire_num = SWIRE_MAX_NUM+12; + } + else + { + swire_num = SWIRE_MAX_NUM+13; + } + } + } + else + { + value_reg_b1_bak = value_reg_b1; + if ((value_reg_ca ==0x2A00) &&(value_reg_b1 >0x500)) + s20_power_on_flag =1; + else + s20_power_on_flag =0; + } + #if 0 + if (swire_num !=swire_num_bak) + { + swire_num_bak = swire_num; + printf("CA[%4x],B1[%4x]. swire_num[%d]\n", value_reg_ca, value_reg_b1,swire_num); + + } + #endif + +#endif + +#endif // // USE_BL_ADJ7 + +#ifdef USE_BL_ADJ6 + if ( (value_reg_b1 &0xC000) || ((value_reg_b1_bak == value_reg_b1)&&(value_reg_ca_bak == value_reg_ca))) + { + return true; + } + value_reg_b1_bak = value_reg_b1; + value_reg_ca_bak = value_reg_ca; + + if(value_reg_ca >0x15FC) + { + swire_num = SWIRE_MAX_NUM; + } + else if(value_reg_ca >0x15EC) + { + swire_num = SWIRE_MAX_NUM+1; + } + else if(value_reg_ca >0x15EC) + { + swire_num = SWIRE_MAX_NUM+2; + } + else if(value_reg_ca >0x15DD) + { + swire_num = SWIRE_MAX_NUM+3; + } + else if(value_reg_ca >0x15CC) + { + swire_num = SWIRE_MAX_NUM+4; + } + else if(value_reg_ca >0x15BE) + { + swire_num = SWIRE_MAX_NUM+5; + } + else if(value_reg_ca >0x15AC) + { + swire_num = SWIRE_MAX_NUM+7; + } + else if(value_reg_ca >0x159A) + { + swire_num = SWIRE_MAX_NUM+8; + } + else if(value_reg_ca >0x155E) + { + swire_num = SWIRE_MAX_NUM+9; + } + else + { + if(value_reg_b1 <0x500) + { + swire_num = SWIRE_MAX_NUM+10; + } + else if(value_reg_b1 <0x900) + { + swire_num = SWIRE_MAX_NUM+11; + } + else if(value_reg_b1 <0xAE0) + { + swire_num = SWIRE_MAX_NUM+12; + } + else if(value_reg_b1 <0xBE8) + { + swire_num = SWIRE_MAX_NUM+13; + } + else if(value_reg_b1 <0xC38) + { + swire_num = SWIRE_MAX_NUM+14; + } + else + { + swire_num = SWIRE_MAX_NUM+15; + } + } +// printf("CA[%4x],B1[%4x]. swire_num[%d]\n", value_reg_ca, value_reg_b1,swire_num); +#endif // // USE_BL_ADJ4 + + return true; +} +#endif + +static bool ap_get_reg_ca(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + value_reg_ca = (dcs_packet->packet_param[0] << 8) + dcs_packet->packet_param[1]; + ////TAU_LOGD("CA[%x]", value_reg_ca); + + return true; +} + +#if 0 +static bool ap_get_reg_b5(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + value_reg_b5 = (dcs_packet->packet_param[3] << 8) + dcs_packet->packet_param[2]; + //TAU_LOGD("CA[%4x],B1[%4x],B5[%4x]", value_reg_ca,value_reg_b1,value_reg_b5); + + return true; +} +#endif + +#ifdef ADD_PANEL_DISPLAY_MODE +uint8_t panel_mode =1; // DFĴ100:ۿ,01:۹,11:3(ӰԺ/Ƭ/.Ŀǰû) +uint16_t panel_r,panel_g,panel_b; // ¼RGBֵ + +#ifdef USE_FOR_SUMSUNG_S9PLUS +#define RATIO_VALUE 2 //Żϵ +#else +#define RATIO_VALUE 2 //Żϵ +#endif + +#endif + +static bool ap_get_reg_df(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + ccm_coef_t ccm; + ccm.coef_c00 = 255; + ccm.coef_c01 = 0; + ccm.coef_c02 = 0; + ccm.coef_c10 = 0; + ccm.coef_c11 = 255; + ccm.coef_c12 = 0; + ccm.coef_c20 = 0; + ccm.coef_c21 = 0; + ccm.coef_c22 = 255; + +#ifdef ADD_PANEL_DISPLAY_MODE + value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; + panel_mode = dcs_packet->packet_param[0]; + panel_r =dcs_packet->packet_param[49]; + panel_g =dcs_packet->packet_param[51]; + panel_b =dcs_packet->packet_param[53]; +// //TAU_LOGD("value_reg_df[%4x],panel_mode[%4x],panel_r[%4x],panel_g[%4x],panel_b[%4x]", value_reg_df,panel_mode,panel_r,panel_g,panel_b); + + if (panel_mode ==00) + { + //ģʽ + #ifdef USE_FOR_S10_BLUE_MODE + //panel_r =256-RATIO_VALUE*(0xFF-panel_r); + //panel_g =256-RATIO_VALUE*(0xFF-panel_g); + //panel_b =256-RATIO_VALUE*(0xFF-panel_b); + // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); + ccm.coef_c00 = panel_r; + ccm.coef_c11 = panel_g; + ccm.coef_c22 = panel_b; + hal_dsi_tx_ctrl_set_ccm(ccm); + + #else + value_reg_df =value_reg_df&0xFF; + switch(value_reg_df) + { + case 0xC1: + case 0xC3: + value_blue = BLUE_MIN; + break; + + case 0xCF: + case 0xD0: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; + break; + + case 0xD8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; + break; + + case 0xDE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; + break; + + case 0xE4: + case 0xE5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; + break; + + case 0xE9: + case 0xEA: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; + break; + + case 0xED: + case 0xEE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; + break; + + case 0xF1: + case 0xF2: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; + break; + + case 0xF4: + case 0xF5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; + break; + + case 0xF7: + case 0xF8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; + break; + + case 0xFA: + value_blue = BLUE_MAX; + break; + + default: + case 0xFF: + value_blue = 0; + break; + + } + hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256,256,256); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + + #endif + + } + else + { + #ifndef USE_FOR_S10_BLUE_MODE + value_blue =0; + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); //ģʽs8+/s9+ + #endif + + //һ㣬ЧԡҪݿͻҪϸ + + panel_r =256-RATIO_VALUE*(0xFF-panel_r); + panel_g =256-RATIO_VALUE*(0xFF-panel_g); + panel_b =256-RATIO_VALUE*(0xFF-panel_b); + // hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,panel_r,panel_g,panel_b); + + ccm.coef_c00 = panel_r; + ccm.coef_c11 = panel_g; + ccm.coef_c22 = panel_b; + hal_dsi_tx_ctrl_set_ccm(ccm); + } + +#ifndef USE_FOR_S10_BLUE_MODE + if (blue_flag==0) + { + blue_flag =1; + delayMs(20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + } +#endif + +#else + value_reg_df = (dcs_packet->packet_param[35] << 8) + dcs_packet->packet_param[33]; + + value_reg_df =value_reg_df&0xFF; + switch(value_reg_df) + { + case 0xC1: + case 0xC3: + value_blue = BLUE_MIN; + break; + + case 0xCF: + case 0xD0: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)/BLUE_STEP; + break; + + case 0xD8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*2/BLUE_STEP; + break; + + case 0xDE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*3/BLUE_STEP; + break; + + case 0xE4: + case 0xE5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*4/BLUE_STEP; + break; + + case 0xE9: + case 0xEA: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*5/BLUE_STEP; + break; + + case 0xED: + case 0xEE: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*6/BLUE_STEP; + break; + + case 0xF1: + case 0xF2: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*7/BLUE_STEP; + break; + + case 0xF4: + case 0xF5: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*8/BLUE_STEP; + break; + + case 0xF7: + case 0xF8: + value_blue = BLUE_MIN+(BLUE_MAX-BLUE_MIN)*9/BLUE_STEP; + break; + + case 0xFA: + value_blue = BLUE_MAX; + break; + + default: + case 0xFF: + value_blue = 0; + break; + + } + + //TAU_LOGD("df[%4x]", value_reg_df); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + if (blue_flag==0) + { + blue_flag =1; + delayMs(20); + hal_dsi_tx_ctrl_write_cmd(0x15, 0, 2, 0x84, value_blue); + } +#endif + + return true; +} +#endif + +static bool ap_get_reg_53(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ +// TAU_LOGD("value_reg_53[%4x], Len[%d]", dcs_packet->packet_param[0],dcs_packet->param_length); + + if (dcs_packet->packet_param[0] ==0xE0) + { + #ifdef ADD_FINGERPRINT_FUNC + fingerprint_flag =1; + #endif + hbm_mode = 1; + hbm_mode_cnt = 0; +// hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x53, 0XE0); + } + else + { + #ifdef ADD_FINGERPRINT_FUNC + fingerprint_flag =0; + #endif + hbm_mode = 0; + hbm_mode_cnt = 1; +// hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x53, 0X20); + } + + return true; +} + +static bool ap_get_reg_7A(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + uint8_t mode; + uint32_t pk_length; + + pk_length = dcs_packet->param_length; +// TAU_LOGD("value_reg_7A[0x%x], Len[%d]", dcs_packet->packet_param[0], pk_length); + if (pk_length == 1) + { + mode = dcs_packet->packet_param[0]; + if (mode == 0x21) + { + //HBM Mode2 / FPS Enable + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 4, 0x87,0x1F,0xF8,0x05); + } + else if (mode == 0x23) + { + //HBM Mode2 / FPS Disable + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x6F,0x02); + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 2, 0x87,0x04); + } + ///FPR ON + // 0x39, 0, 4, 0x87,0x13,0xFF,0x05, + ///FPR OFF + // 0x39, 0, 2, 0x6F,0x02, + // 0x39, 0, 2, 0x87,0x04, + } + + return true; +} + + +/* ƻDCS command */ +static const hal_dcs_execute_entry_t g_cus_rx_dcs_execute_table[] = +{ + {DCS_SET_DISPLAY_ON, ap_set_display_on, true}, + {DCS_SET_DISPLAY_OFF, ap_set_display_off, true}, + {0xDF, ap_get_reg_df, false}, // +// {0xCA, ap_get_reg_ca, false}, // ⡣ҪB1ܵ +// {0xB1, ap_set_backlight, false}, + {0x51, ap_set_backlight_51, false}, //leo S21U51 + {0x60, ap_update_frame_rate, true}, + {0x53, ap_get_reg_53, false}, + {0x7A, ap_get_reg_7A, false}, + +#if ADD_TP_CALIBRATION +// TP calibration + {0x04, ap_set_tp_calibration_04, true}, +#endif + {DCS_ENTER_SLEEP_MODE, ap_set_enter_sleep_mode, true}, + {DCS_EXIT_SLEEP_MODE, ap_set_exit_sleep_mode, true}, + {0, NULL, false} //{0,NULL,false} һ̶ԱΪtableβжϱ׼ +}; + +static void tx_panel_reset(void) +{ +#ifdef USE_WL518_INTERNAL_FLASH + hal_system_share_flash_mode(true); +#endif + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); + delayMs(10); //10ms + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_LOW); + delayMs(10); //10ms + hal_dsi_tx_ctrl_panel_reset_pin(IO_LVL_HIGH); + delayMs(10); +} + + + + +#if PANEL_INIT_CODE_ARRAY +static void send_panel_init_code(uint32_t size, uint8_t * data) +{ + uint32_t data_offeset = 0; + uint8_t data_type; + uint8_t vc; + uint8_t data_size; + uint8_t * p_data; + + while(data_offeset < size) + { + data_type = data[data_offeset]; + vc = data[data_offeset + 1]; + data_size = data[data_offeset + 2]; + p_data = &data[data_offeset + 3]; + hal_dsi_tx_ctrl_write_array_cmd(data_type, vc, data_size, p_data); + data_offeset = data_offeset + data_size + 3; + } +} + +const uint8_t panel_init_code[] = { +#if AMOLED_NT37701_CSOT667 + + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 9, 0xBA,0x02,0x79,0x00,0x14,0x03,0x9C,0x00,0x01, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 9, 0xBA,0x01,0xAF,0x00,0x14,0x00,0x1C,0x00,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 8, 0xBA,0x01,0x66,0x00,0x14,0x00,0x1C,0x00, + 0x39, 0, 9, 0xBB,0x02,0x79,0x00,0x14,0x03,0x9C,0x00,0x21, + 0x39, 0, 2, 0xB5,0x84, + 0x39, 0, 2, 0x6F,0x06, + 0x39, 0, 4, 0xB5,0x2B,0x0C,0x33, + 0x39, 0, 2, 0x6F,0x0B, + 0x39, 0, 4, 0xB5,0x2B,0x23,0x33, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 6, 0xB5,0x0C,0x0C,0x0C,0x0C,0x0C, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 2, 0xB6,0x19, + 0x39, 0, 19, 0xB7,0x99,0x99,0x99,0x99,0x99,0x99,0x87,0x65,0x43,0x32,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x13, + 0x39, 0, 13, 0xB7,0x00,0x00,0x01,0x13,0x78,0x89,0x9A,0xAB,0xBC,0xCD,0xDE,0xEF, + 0x39, 0, 2, 0x6F,0x1F, + 0x39, 0, 25, 0xB7,0x08,0x31,0x66,0x8F,0xF5,0xC1,0xC2,0x33,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0x7F,0xFF,0xFF, + 0x39, 0, 3, 0xB2,0x98,0x60, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 2, 0xB2,0x40, + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 9, 0xB2,0x20,0x20,0x21,0xC2,0x21,0xC2,0x2F,0xFF, + 0x39, 0, 13, 0xB3,0x00,0x08,0x00,0x1C,0x00,0x1C,0x00,0x3C,0x00,0x3C,0x00,0x70, + 0x39, 0, 2, 0x6F,0x0C, + 0x39, 0, 13, 0xB3,0x00,0x70,0x00,0xC8,0x00,0xC8,0x01,0x48,0x01,0x48,0x01,0xAD, + 0x39, 0, 2, 0x6F,0x18, + 0x39, 0, 13, 0xB3,0x01,0xAD,0x01,0xC2,0x01,0xC2,0x01,0xC2,0x07,0xFF,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 9, 0xB3,0x01,0x55,0x08,0xCC,0x08,0xCC,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x2C, + 0x39, 0, 15, 0xB3,0x09,0x90,0x08,0xDC,0x08,0x70,0x08,0x70,0x07,0xC8,0x07,0xC8,0x06,0xB8, + 0x39, 0, 2, 0x6F,0x3A, + 0x39, 0, 13, 0xB3,0x06,0xB8,0x04,0xE8,0x04,0xE8,0x02,0x48,0x02,0x48,0x00,0x38, + 0x39, 0, 2, 0x6F,0x46, + 0x39, 0, 13, 0xB3,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38, + 0x39, 0, 15, 0xB4,0x0D,0x10,0x0C,0x1C,0x0B,0x88,0x0B,0x88,0x0A,0xA0,0x0A,0xA0,0x09,0x28, + 0x39, 0, 2, 0x6F,0x0E, + 0x39, 0, 13, 0xB4,0x09,0x28,0x06,0xB0,0x06,0xB0,0x03,0x18,0x03,0x18,0x00,0x48, + 0x39, 0, 2, 0x6F,0x1A, + 0x39, 0, 13, 0xB4,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48, + 0x39, 0, 2, 0x6F,0x26, + 0x39, 0, 11, 0xB4,0x0D,0x10,0x00,0x48,0x00,0x48,0x00,0x48,0x00,0x48, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 15, 0xB4,0x09,0x90,0x08,0xDC,0x08,0x70,0x08,0x70,0x07,0xC8,0x07,0xC8,0x06,0xB8, + 0x39, 0, 2, 0x6F,0x3E, + 0x39, 0, 13, 0xB4,0x06,0xB8,0x04,0xE8,0x04,0xE8,0x02,0x48,0x02,0x48,0x00,0x38, + 0x39, 0, 2, 0x6F,0x4A, + 0x39, 0, 13, 0xB4,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38,0x00,0x38, + 0x39, 0, 2, 0x6F,0xAC, + 0x39, 0, 21, 0xB2,0x0F,0xFF,0x0F,0xFF,0x08,0x09,0x08,0x6C,0x08,0xCA,0x09,0x24,0x09,0x79,0x09,0xCB,0x0A,0x1A,0x0A,0x66, + 0x39, 0, 2, 0x6F,0xC0, + 0x39, 0, 21, 0xB2,0x0A,0xB0,0x0A,0xF7,0x0B,0x3D,0x0B,0x80,0x0B,0xC1,0x0C,0x01,0x0C,0x40,0x0C,0x7C,0x0C,0xB8,0x0C,0xF2, + 0x39, 0, 2, 0x6F,0xD4, + 0x39, 0, 21, 0xB2,0x0D,0x2B,0x0D,0x63,0x0D,0x9A,0x0D,0xCF,0x0E,0x04,0x0E,0x38,0x0E,0x6B,0x0E,0x9D,0x0E,0xCF,0x0E,0xFF, + 0x39, 0, 2, 0x6F,0xE8, + 0x39, 0, 11, 0xB2,0x0F,0x2F,0x0F,0x5E,0x0F,0x8D,0x0F,0xBB,0x0F,0xFF, + 0x39, 0, 2, 0x6F,0x52, + 0x39, 0, 21, 0xB3,0x01,0xC2,0x01,0xC3,0x01,0xF5,0x02,0x27,0x02,0x59,0x02,0x8B,0x02,0xBD,0x02,0xEF,0x03,0x21,0x03,0x53, + 0x39, 0, 2, 0x6F,0x66, + 0x39, 0, 21, 0xB3,0x03,0x84,0x03,0xB6,0x03,0xE8,0x04,0x1A,0x04,0x4C,0x04,0x7E,0x04,0xB0,0x04,0xE2,0x05,0x14,0x05,0x46, + 0x39, 0, 2, 0x6F,0x7A, + 0x39, 0, 21, 0xB3,0x05,0x78,0x05,0xA9,0x05,0xDB,0x06,0x0D,0x06,0x3F,0x06,0x71,0x06,0xA3,0x06,0xD5,0x07,0x07,0x07,0x39, + 0x39, 0, 2, 0x6F,0x8E, + 0x39, 0, 9, 0xB3,0x07,0x6B,0x07,0x9D,0x07,0xCE,0x07,0xFF, + 0x39, 0, 3, 0xB9,0x00,0x96, + 0x39, 0, 3, 0xBD,0x04,0xB0, + 0x39, 0, 4, 0xC0,0x76,0xF3,0xC1, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 2, 0xC0,0x40, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 3, 0xC0,0x20,0x20, + 0x39, 0, 2, 0x6F,0x02, + 0x39, 0, 7, 0xC1,0x24,0x86,0x00,0x57,0x00,0x45, + 0x39, 0, 2, 0x6F,0x0A, + 0x39, 0, 3, 0xC1,0x00,0x86, + 0x39, 0, 2, 0xC5,0x05, + 0x39, 0, 2, 0x6F,0x08, + 0x39, 0, 2, 0xC3,0x00, + 0x39, 0, 15, 0xC6,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55,0x55, + 0x39, 0, 2, 0xCA,0x12, + 0x39, 0, 2, 0xB9,0x00, + 0x39, 0, 5, 0xBE,0x0E,0x0B,0x14,0x13, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 2, 0xBE,0x8A, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 2, 0x6F,0x2A, + 0x39, 0, 2, 0xD9,0x43, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x01, + 0x39, 0, 11, 0xB5,0x00,0xB0,0x00,0x98,0x00,0x98,0x00,0xB0,0x00,0x98, + 0x39, 0, 11, 0xB6,0x01,0x38,0x00,0xD0,0x00,0xD0,0x01,0x38,0x00,0xD0, + 0x39, 0, 13, 0xC2,0x00,0xB0,0x01,0x38,0x00,0xB0,0x01,0x38,0x00,0xB0,0x01,0x38, + 0x39, 0, 3, 0xB0,0x04,0x04, + 0x39, 0, 3, 0xB3,0x13,0x13, + 0x39, 0, 7, 0xB7,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B, + 0x39, 0, 3, 0xB1,0x08,0x08, + 0x39, 0, 3, 0xB4,0x13,0x13, + 0x39, 0, 8, 0xB8,0x46,0x46,0x46,0x46,0x46,0x46,0x46, + 0x39, 0, 29, 0xB9,0x00,0x1F,0x00,0x00,0x00,0x1F,0x00,0x00,0x1F,0x00,0x00,0x1F,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0x1F,0x1F,0x1F,0x1F,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 6, 0xBB,0x03,0x94,0x00,0x19,0x3C, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 2, 0x6F,0x18, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 2, 0x6F,0x2B, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 2, 0x6F,0x3E, + 0x39, 0, 20, 0xBB,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x1B,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20,0x20, + 0x39, 0, 5, 0xBA,0x10,0x10,0x10,0x10, + 0x39, 0, 3, 0xC4,0x80,0x03, + 0x39, 0, 2, 0xC7,0x01, + 0x39, 0, 3, 0xCD,0x05,0x81, + 0x39, 0, 2, 0xCF,0x1D, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 5, 0xCE,0x00,0x01,0x00,0x00, + 0x39, 0, 2, 0x6F,0x09, + 0x39, 0, 2, 0xD2,0x00, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 2, 0xD8,0x0C, + 0x39, 0, 2, 0xD9,0xAB, + 0x39, 0, 2, 0xD1,0x07, + 0x39, 0, 2, 0x6F,0x02, + 0x39, 0, 2, 0xD1,0x06, + 0x39, 0, 2, 0x6F,0x05, + 0x39, 0, 2, 0xD1,0x06, + 0x39, 0, 3, 0xD6,0x00,0x40, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 25, 0xB9,0x00,0x04,0x00,0x0C,0x00,0x14,0x00,0x1C,0x00,0x2C,0x00,0x3C,0x00,0x4C,0x00,0x5C,0x00,0x7C,0x00,0x9C,0x00,0xBC,0x00,0xDC, + 0x39, 0, 25, 0xBA,0x00,0xFC,0x01,0x3C,0x01,0x7C,0x01,0xBC,0x01,0xFC,0x02,0x7C,0x02,0xFC,0x03,0x7C,0x03,0xBC,0x03,0xDC,0x03,0xFC,0x03,0xFF, + 0x39, 0, 2, 0xBC,0x11, + 0x39, 0, 17, 0xBD,0x96,0x00,0x69,0x00,0x00,0x96,0x00,0x69,0xBB,0x44,0x44,0xBB,0xEE,0x11,0x11,0xEE, + 0x39, 0, 2, 0xC1,0x02, + 0x39, 0, 9, 0xC2,0x19,0x00,0x91,0x00,0x19,0x00,0x91,0x00, + 0x39, 0, 3, 0xC0,0x00,0x00, + 0x39, 0, 2, 0xCE,0x01, + 0x39, 0, 2, 0xCC,0x00, + +#if 1 + ///////////#1_gamma.txt/////////////// + + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0xCC,0x30, + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, + 0x39, 0, 2, 0xBF,0x09, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0x3C,0x02,0x8A,0x02,0xD8,0x03,0x19,0x03,0x99,0x04,0x02,0x04,0x58,0x04,0xAC, + 0x39, 0, 19, 0xB1,0x05,0x37,0x05,0xA7,0x06,0x15,0x06,0x6F,0x06,0xC7,0x07,0x5D,0x07,0xE1,0x08,0x5E,0x08,0xD2, + 0x39, 0, 15, 0xB2,0x09,0xB8,0x0A,0x91,0x0B,0x68,0x0B,0xD7,0x0C,0x12,0x0C,0x4A,0x0C,0x4A, + 0x39, 0, 19, 0xB3,0x00,0x00,0x01,0xB0,0x02,0x29,0x02,0x75,0x02,0xB7,0x03,0x38,0x03,0x98,0x03,0xE4,0x04,0x2E, + 0x39, 0, 19, 0xB4,0x04,0xA4,0x05,0x05,0x05,0x65,0x05,0xB3,0x06,0x00,0x06,0x7F,0x06,0xF5,0x07,0x60,0x07,0xC1, + 0x39, 0, 15, 0xB5,0x08,0x80,0x09,0x33,0x09,0xE4,0x0A,0x38,0x0A,0x61,0x0A,0x8C,0x0A,0x8C, + 0x39, 0, 19, 0xB6,0x00,0x00,0x01,0xE6,0x02,0x6C,0x02,0xDC,0x03,0x31,0x03,0xD7,0x04,0x53,0x04,0xB4,0x05,0x14, + 0x39, 0, 19, 0xB7,0x05,0xA4,0x06,0x1A,0x06,0x8E,0x06,0xEF,0x07,0x4E,0x07,0xEC,0x08,0x7D,0x09,0x03,0x09,0x83, + 0x39, 0, 15, 0xB8,0x0A,0x7F,0x0B,0x79,0x0C,0x72,0x0C,0xFB,0x0D,0x42,0x0D,0x8E,0x0D,0x8E, + 0x39, 0, 2, 0xBF,0x08, + 0x39, 0, 19, 0xB0,0x00,0x00,0x02,0x90,0x02,0xCC,0x03,0x08,0x03,0x40,0x03,0xAD,0x04,0x04,0x04,0x59,0x04,0x9D, + 0x39, 0, 19, 0xB1,0x05,0x22,0x05,0x8D,0x05,0xEB,0x06,0x47,0x06,0x96,0x07,0x1B,0x07,0x9F,0x08,0x0F,0x08,0x7D, + 0x39, 0, 15, 0xB2,0x09,0x42,0x0A,0x05,0x0A,0xBF,0x0B,0x1B,0x0B,0x4C,0x0B,0x7C,0x0B,0x7C, + 0x39, 0, 19, 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0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x50, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00, + 0x39, 0, 2, 0x6F,0x60, + 0x39, 0, 17, 0xBA,0x02,0x00,0x02,0x00,0x02,0x00,0x02,0x00,0x05,0xD1,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0x70, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0x80, + 0x39, 0, 17, 0xBA,0x08,0x00,0x05,0x3E,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36, + 0x39, 0, 2, 0x6F,0x90, + 0x39, 0, 17, 0xBA,0x07,0x36,0x07,0x36,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x05,0x3E,0x07,0x36, + 0x39, 0, 2, 0x6F,0xA0, + 0x39, 0, 17, 0xBA,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x07,0x36,0x08,0x00, + 0x39, 0, 2, 0x6F,0xB0, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x05,0xD1,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0xC0, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0xD0, + 0x39, 0, 17, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 2, 0x6F,0xE0, + 0x39, 0, 11, 0xBA,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x10, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x20, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x00,0x01,0x00, + 0x39, 0, 2, 0x6F,0x30, + 0x39, 0, 17, 0xBB,0x01,0x00,0x01,0x00,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x40, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x50, + 0x39, 0, 17, 0xBB,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C,0x01,0x2C, + 0x39, 0, 2, 0x6F,0x60, + 0x39, 0, 17, 0xBB,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00, + 0x39, 0, 2, 0x6F,0x70, + 0x39, 0, 17, 0xBB,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00, + 0x39, 0, 2, 0x6F,0x80, + 0x39, 0, 17, 0xBB,0x01,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x90, + 0x39, 0, 17, 0xBB,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x10,0x10,0x10, + 0x39, 0, 2, 0x6F,0xA0, + 0x39, 0, 5, 0xBB,0x80,0x80,0x80,0x00, + 0x39, 0, 2, 0xEE,0x05, + 0x39, 0, 5, 0xFF,0xAA,0x55,0xA5,0x80, + 0x39, 0, 2, 0x6F,0x1D, + 0x39, 0, 2, 0xF2,0x05, + 0x39, 0, 5, 0x3B,0x00,0x14,0x00,0x12, + 0x39, 0, 2, 0x03,0x01, + 0x39, 0, 2, 0x90,0x02, + 0x39, 0, 19, 0x91,0x89,0x28,0x00,0x0C,0xC2,0x00,0x03,0x1C,0x01,0x7E,0x00,0x0F,0x08,0xBB,0x04,0x3D,0x10,0xF0, + 0x39, 0, 1, 0x2C, + 0x39, 0, 5, 0x51,0x07,0xFF,0x0F,0xFF, + 0x39, 0, 2, 0x53,0x20, + 0x39, 0, 1, 0x35, + 0x39, 0, 5, 0x2A,0x00,0x00,0x04,0x37, + 0x39, 0, 5, 0x2B,0x00,0x00,0x09,0x5F, + 0x39, 0, 2, 0x2F,0x01, + +#if FINGERPRINT_USE_DRIVERIC_FPR + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x07, +// ##Enable Round + 0x39, 0, 15, 0xC0,0x01,0x01,0x00,0x00,0x55,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xC9,0x21,0x00,0x2A,0x40,0x2A,0x40,0x00,0x00,0x3F,0xDD,0xAC,0x00,0x3F,0xDD,0xAC,0x00,0x80,0x06,0xF9,0x10,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xC9,0x61,0xB4,0xB0,0x72,0x1C,0x18,0x33,0xE0,0x2A,0x40,0x0F,0x98,0x98,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xC9,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCA,0x27,0x00,0x2A,0x40,0x2A,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xDD,0xAC,0x00,0x80,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCA,0x62,0x1D,0xB0,0x72,0x85,0x18,0x33,0xE0,0x00,0x00,0x03,0x68,0x98,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCA,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCB,0x2D,0x00,0x2A,0x40,0x2A,0x40,0x00,0x00,0x3F,0xDD,0xAC,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCB,0x71,0xB4,0x19,0x72,0x1C,0x81,0x33,0x90,0x00,0x00,0x0C,0x98,0x68,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCB,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x39, 0, 2, 0x6F,0x00, + 0x39, 0, 22, 0xCC,0x2B,0x00,0x2A,0x40,0x2A,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x7F,0xF9,0x06,0xF0,0x00, + 0x39, 0, 2, 0x6F,0x15, + 0x39, 0, 16, 0xCC,0x72,0x1D,0x19,0x72,0x85,0x81,0x33,0x9F,0xD5,0xC0,0x00,0x68,0x68,0x00,0x00, + 0x39, 0, 2, 0x6F,0x24, + 0x39, 0, 8, 0xCC,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + ///////////////// + + // ڸ + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x02, //S10¼ܽ⣬ɫɫOK + 0x39, 0, 2, 0x6F,0x08, //R + 0x39, 0, 3, 0xD0,0x04,0xE4, + 0x39, 0, 2, 0x6F,0x0A,//G + 0x39, 0, 3, 0xD0,0x09,0xC0, + 0x39, 0, 2, 0x6F,0x0C,//B + 0x39, 0, 3, 0xD0,0x06,0xC0, + + + 0x39, 0, 2, 0xD1,0x41, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 2, 0xD1,0x00, + 0x39, 0, 2, 0x6F,0x02, + 0x39, 0, 2, 0xD1,0x00, + + 0x39, 0, 2, 0x6F,0x03, + 0x39, 0, 5, 0xD1,0x02,0x1E,0x07,0x19, + 0x39, 0, 2, 0x6F,0x07, + 0x39, 0, 5, 0xD1,0x01,0xB0,0x06,0xB0, + 0x39, 0, 2, 0x6F,0x0B, + 0x39, 0, 5, 0xD1,0x02,0x88,0x07,0x81, + + 0x39, 0, 2, 0x6F,0x0F, + 0x39, 0, 7, 0xD1,0x3F,0xFF,0x20,0x00,0x30,0x00, +//////////////////////////////////// + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 2, 0x6F,0x17, + 0x39, 0, 3, 0xB2,0x07,0xFF, // DBV + 0x39, 0, 2, 0x6F,0x1F, + 0x39, 0, 3, 0xB2,0x00,0x50, +/////////////////// +// FPR1_CENTER_X=540, FPR1_CENTER_Y=2093 1080 2400[540 2105] +// FPR1_EN = 1 + 0x39, 0, 2, 0x88,0x01, + 0x39, 0, 2, 0x6F,0x01, + 0x39, 0, 5, 0x88,0x02,0x1D,0x08,0x39, +///FPR ON +// 0x39, 0, 4, 0x87,0x13,0xFF,0x05, +///FPR OFF +// 0x39, 0, 2, 0x6F,0x02, +// 0x39, 0, 2, 0x87,0x04, +#endif + + + 0x39, 0, 6, 0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 2, 0xC0,0x77, +// 0x39, 0, 5, 0x3B,0x00,0x10,0x09,0x90, +// 0x39, 0, 2, 0x90,0x00, +// 0x05, 0, 1, 0x2C, + 0x39, 0, 3, 0x51,0x03,0x00, + +#if 0//BIST MODE + 0x39, 0, 6,0xF0,0x55,0xAA,0x52,0x08,0x00, + 0x39, 0, 8,0xEF,0x01,0x02,0xFF,0xFF,0xFF,0x17,0xFF, + 0x39, 0, 5,0xEE,0x87,0x78,0x02,0x40 +#endif + +#endif +}; + +#endif + + +static void init_panel(void) +{ + /* reset panel*/ + tx_panel_reset(); + + /* enter send initial code mode*/ + hal_dsi_tx_ctrl_enter_init_panel_mode(); + TAU_LOGD("LCD init code!"); + +#if AMOLED_NT37701_CSOT667 +#if PANEL_INIT_CODE_ARRAY + send_panel_init_code(sizeof(panel_init_code), panel_init_code); +#endif + +#if 1 //READ + uint8_t test_arr[10]; + hal_dsi_tx_ctrl_read_cmd(0x06, 0, 0x0A, 2, test_arr); + delayMs(20); + TAU_LOGD("F8:=%x, %x.",test_arr[0],test_arr[1]); +#endif + +#if 0//BIST MODE + hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH); //LED_ON + delayMs(90); //90 + Gpio_swire_output(2, 40); + delayMs(20); + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 6,0xF0,0x55,0xAA,0x52,0x08,0x00); + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 8,0xEF,0x01,0x02,0xFF,0xFF,0xFF,0x17,0xFF); + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 5,0xEE,0x87,0x78,0x02,0x40); + delayMs(20); +#else + + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x00, 0x01); //0FFF + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x11); + hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_HIGH); //LED_ON + delayMs(90); //90 + Gpio_swire_output(2, 40); + delayMs(20); +// hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); +// delayMs(20); +#endif + + +#endif + /* exit send initial code mode*/ + hal_dsi_tx_ctrl_exit_init_panel_mode(); + delayMs(20); +} + +static void open_mipi_rx(void) +{ + /* TE */ + hal_gpio_set_mode(IO_PAD_AP_TE, IO_MODE_TEAR); + + if (g_rx_ctrl_handle == NULL) + { + /* rx ctrl handle */ + g_rx_ctrl_handle = hal_dsi_rx_ctrl_create_handle(); + } + /* ò */ + g_rx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_rx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_rx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; + g_rx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; + g_rx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; + g_rx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; + g_rx_ctrl_handle->rx_color_mode = INPUT_COLOR_MODE; + g_rx_ctrl_handle->rx_lanes = INPUT_MIPI_LANE_NUM; + g_rx_ctrl_handle->rx_nonburst_models = INPUT_VIDEO_MODEL; /* ɲ */ + g_rx_ctrl_handle->rx_vc = INPUT_VC; + g_rx_ctrl_handle->compress_en = INPUT_COMPRESS; + g_rx_ctrl_handle->rx_hsclk_rate = INPUT_MIPI_LANE_RATE; + g_rx_ctrl_handle->cus_dcs_entry_table = g_cus_rx_dcs_execute_table; /* ע DCSб */ + g_rx_ctrl_handle->rx_dcs_read_entry = ap_dcs_read; /* עdsc read ص,ѡ,˺Ϊʱcus_dcs_entry_tableִ */ + g_rx_ctrl_handle->pps_update_entry = pps_update_handle; + //򿪻ᵼ¿ӡϢTX +// g_rx_ctrl_handle->pq_marginal = PQ_TYPE_5; + +#if defined(ISP_568) || defined(ISP_368) + g_rx_ctrl_handle->base_info.extra_info.rot_angle = VIDOE_ROT_ANGLE_0; + g_rx_ctrl_handle->base_info.extra_info.mirror_en = false; + + g_rx_ctrl_handle->hight_performan_mode = HIGHT_PERFORMAN_L2; + g_rx_ctrl_handle->base_info.extra_info.ltpo = LTPO_MODE_2; + g_rx_ctrl_handle->pu_optimize = true; +#endif + + /* ǰԤPPS, AP PPS cmdҲ */ + if (g_rx_ctrl_handle->compress_en == true) + { + uint8_t pps[128] = + { + 0x11, 0x00, 0x00, 0x89, 0x30, 0x80, 0x0C, 0x80, + 0x05, 0xA0, 0x00, 0x28, 0x02, 0xD0, 0x02, 0xD0, + 0x02, 0x00, 0x02, 0x0E, 0x00, 0x20, 0x03, 0xDD, + 0x00, 0x07, 0x00, 0x0C, 0x02, 0x77, 0x02, 0x8B, + 0x18, 0x00, 0x10, 0xF0, 0x03, 0x0C, 0x20, 0x00, + 0x06, 0x0B, 0x0B, 0x33, 0x0E, 0x1C, 0x2A, 0x38, + 0x46, 0x54, 0x62, 0x69, 0x70, 0x77, 0x79, 0x7B, + 0x7D, 0x7E, 0x01, 0x02, 0x01, 0x00, 0x09, 0x40, + 0x09, 0xBE, 0x19, 0xFC, 0x19, 0xFA, 0x19, 0xF8, + 0x1A, 0x38, 0x1A, 0x78, 0x1A, 0xB6, 0x2A, 0xF6, + 0x2B, 0x34, 0x2B, 0x74, 0x3B, 0x74, 0x6B, 0xF4, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }; + + hal_dsi_rx_ctrl_pre_init_pps(g_rx_ctrl_handle, pps, 88); + } + + /* ʼrx ctrl */ + hal_dsi_rx_ctrl_init(g_rx_ctrl_handle); + + hal_dsi_rx_ctrl_set_cus_sync_line(g_rx_ctrl_handle, g_rx_ctrl_handle->base_info.src_h); // lss add, ˺1600 +// hal_dsi_rx_ctrl_hight_performan_mode(g_rx_ctrl_handle); +// /* rx ctrl */ +// hal_dsi_rx_ctrl_set_cus_esc_clk(g_rx_ctrl_handle,20000000); + +// hal_dsi_rx_ctrl_set_cus_pq_gain(g_rx_ctrl_handle,256, 256, 211); + +// hal_dsi_rx_ctrl_set_hw_cmd_filter(g_rx_ctrl_handle, HAL_RX_DCS_FILTER_0, 0x4C, 0x4C); +// hal_dsi_rx_ctrl_set_hw_cmd_filter(g_rx_ctrl_handle, HAL_RX_DCS_FILTER_1, 0x5C, 0x5C); + hal_dsi_rx_ctrl_set_cus_scld_filter(g_rx_ctrl_handle,rx_filter_1080_h_4_96,rx_filter_2400_v_4_96); + hal_dsi_rx_ctrl_start(g_rx_ctrl_handle); +} + + +static void init_mipi_tx(void) +{ + if (g_tx_ctrl_handle == NULL) + { + g_tx_ctrl_handle = hal_dsi_tx_ctrl_create_handle(); + } + g_tx_ctrl_handle->channel_id = OUTPUT_VC; + g_tx_ctrl_handle->lane_num = OUTPUT_LANE_NUMBER; + g_tx_ctrl_handle->vid_mode = OUTPUT_VIDEO_MODEL; + g_tx_ctrl_handle->cmd_tx_type = _CMD_TYPE; + g_tx_ctrl_handle->dpi_vsa = OUTPUT_VSA; + g_tx_ctrl_handle->dpi_vbp = OUTPUT_VBP; + g_tx_ctrl_handle->dpi_vfp = OUTPUT_VFP; + g_tx_ctrl_handle->dpi_hsa = OUTPUT_HSA; + g_tx_ctrl_handle->dpi_hbp = OUTPUT_HBP; + g_tx_ctrl_handle->dpi_hfp = OUTPUT_HFP; + g_tx_ctrl_handle->base_info.src_w = INPUT_WIDTH; + g_tx_ctrl_handle->base_info.src_h = INPUT_HEIGHT; + g_tx_ctrl_handle->base_info.dst_w = OUTPUT_WIDTH; + g_tx_ctrl_handle->base_info.dst_h = OUTPUT_HEIGHT; + g_tx_ctrl_handle->base_info.src_frate = INPUT_FRAME_RATE; + g_tx_ctrl_handle->base_info.src_mode = INPUT_DATA_MODE; + +// g_tx_ctrl_handle->tx_clkawayshs = true; +// g_tx_ctrl_handle->tx_line_delay = 400; //45; + + hal_dsi_tx_ctrl_init(g_tx_ctrl_handle); + /* AP ûзʱĬϵʾɫ, Ϊ0 0 0(ɫ), ɫΪdebugʹ */ + hal_dsi_tx_ctrl_set_overwrite_rgb(0x00, 0x00, 0x00); +} + +static void tx_display_on(void) +{ + init_panel(); + TAU_LOGD("Pannel init done"); + hal_dsi_tx_ctrl_start(g_tx_ctrl_handle); + + delayMs(100); + hal_dsi_tx_ctrl_write_cmd(0x05, 0, 1, 0x29); +} + +static void swire_timer_callback(void *data) +{ +#if 0 //def USE_FOR_SUMSUNG_S21U + if(Flag_blacklight_EN) + { + hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); + } + else if(s20_power_on_flag) + { + hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); + } + else +#endif + { + hal_swire_start(12, 12, 12, 12, swire_num); + } +} + +static void swire_callback(void *data) +{ + /* swire ǷҪһֱҪֻֻͬͬ */ + //if(start_display_on == false) + { + hal_timer_start(SWIRE_TIMER, 26, swire_timer_callback, NULL); + } +} + +/* swire ʼ,ͨ hal_swire_start , ѭһֱ */ +static void swire_init() +{ + hal_swire_open(DISABLE); + hal_swire_init(); + /* swire ηɺص */ + hal_swire_register_callback(swire_callback); + hal_swire_open(ENABLE); + //hal_swire_start(12, 12, 12, 12, 43); + hal_swire_start(12, 12, 12, 12, SWIRE_DEFAULT_NUM); //3~27,~,9.45V~7.43V + hal_timer_init(SWIRE_TIMER); + hal_timer_start(SWIRE_TIMER, 26, swire_timer_callback, NULL); +} + +static void soft_te_timer_cb(void *data) +{ + /* + S8 ӵTP1.8V, AC ҪȵTP1.8 ٳʼ, TP ǰҪͨTEֻֻ + */ + if (panel_display_done == false) + { + hal_dsi_rx_ctrl_gen_a_tear_signal(g_rx_ctrl_handle); + hal_timer_start(TE_TIMER, 17, soft_te_timer_cb, NULL); + } + else + { + hal_dsi_rx_ctrl_set_hw_tear_mode(g_rx_ctrl_handle); + } +} + +static void soft_te_timer_init() +{ + TAU_LOGD("soft_te_timer_init"); + hal_dsi_rx_ctrl_set_sw_tear_mode(g_rx_ctrl_handle); + hal_timer_init(TE_TIMER); + hal_timer_start(TE_TIMER, 1, soft_te_timer_cb, NULL); +} + +#ifdef ADD_TIMER3_FUNCTION +static void soft_timer3_cb(void *data) +{ + hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); + tp_sleep_count++; + if (tp_sleep_clk_count < 0xF8) + tp_sleep_clk_count++; + if(phone_DisplayOFF_count>0) + { + phone_DisplayOFF_count++; + } + +#if AUTO_CAL_TP + if (g_exit_sleep_mode) + { + if (g_cal_cnt > 0) + { + g_cal_cnt--; + if (g_cal_cnt == 0){ + g_calibration_flag = true; + TAU_LOGD("Start cal tp!"); + } + } + } +#endif +} +#endif + +void tp_heartbeat_exec(void) +{ + if (s_screen_init_complate) + { + if(hal_gpio_get_input_data(IO_PAD_TD_INT)) + { + s_heartbeat = 0; + } + else + { + if(s_heartbeat < (65536/50)) // 65536*3 = 900ms 65536/50 = 6ms + { + s_heartbeat ++; + }else + { + TAU_LOGD("hb..."); + s_heartbeat = 0; + // ap_tp_st_touch_software_reset(); + ap_tp_st_touch_hardware_reset(); + } + } + } +} + +void ap_demo(void) +{ + hal_gpio_init_output(IO_PAD_TD_LEDPWM, IO_LVL_LOW);// C2 MOS + hal_gpio_init_output(IO_PAD_TD_TPRSTN, IO_LVL_HIGH); + hal_gpio_init_output(IO_PAD_AP_SWIRE, IO_LVL_LOW); + hal_gpio_init_output(IO_PAD_PWMEN, IO_LVL_LOW); // LED_ON + + open_mipi_rx(); +// TAU_LOGD("S10Lite [%s %s]", __DATE__, __TIME__); + TAU_LOGD("S10Lite V100 20230714"); + app_tp_I2C_init(); +// soft_te_timer_init(); + init_mipi_tx(); + + app_tp_init(); +#ifdef ADD_TIMER3_FUNCTION + tp_sleep_count=0; + tp_sleep_clk_count = 0; + phone_DisplayOFF_count=1; + hal_timer_init(TIMER_NUM3); + hal_timer_start(TIMER_NUM3, 10, soft_timer3_cb, NULL); +#endif + +#ifndef DISABLE_TDDI_I2C_FUNCTION + /* TP ģͨѶʼ */ + app_tp_transfer_screen_start(); +#endif + + while (1) + { + if (start_display_on == true ) + { + tx_display_on(); + start_display_on = false; + panel_display_done = true; + + #if ENABLE_TP_WAKE_UP + hal_gpio_set_ap_reset_int(ENABLE, ap_reset_cb, DETECT_RISING_EDGE); + #endif + } + + if(phone_DisplayOFF_flag==1) + { + if(phone_DisplayOFF_count>1600) + { + phone_DisplayOFF_count=0; + phone_start_flag=1; + } + } + else + { + if(phone_DisplayOFF_count>30) + { + phone_DisplayOFF_count=0; + phone_start_flag=1; + hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW);//ͣ˫2~3s޴.jason_su + } + } + + #if 1 + if (hbm_mode) + { + if (hbm_mode <91) + { + hbm_mode++; + delayMs(1); + if (hbm_mode ==90) + { + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, 0x07, 0xFF); + } + } + } + if (hbm_mode_cnt) + { + if (hbm_mode_cnt < 7) + { + hbm_mode_cnt++; + delayMs(1); + if (hbm_mode_cnt==6) + hal_dsi_tx_ctrl_write_cmd(0x39, 0, 3, 0x51, rd_51_val2>>8, rd_51_val2&0x00FF); + } + } + #endif + + #if ADD_TP_CALIBRATION + tp_heartbeat_exec(); + app_tp_calibration_exec(); + ap_tp_st_touch_scan_point_record_event_exec(); + #endif + + #ifndef DISABLE_TDDI_I2C_FUNCTION + /* ȴ TP жϱTP Эת */ + app_tp_transfer_screen_int(); + #endif + while (hal_dsi_rx_ctrl_dsc_async_handler(g_rx_ctrl_handle)); + + + #if ENABLE_TP_WAKE_UP + if (g_need_enter_sleep_mode) + { + tp_sleep_in=1; + hal_gpio_set_output_data(IO_PAD_TD_LEDPWM, IO_LVL_HIGH); + + /* FIXME stop more model */ + hal_dsi_tx_ctrl_stop(g_tx_ctrl_handle); + hal_dsi_tx_ctrl_deinit(g_tx_ctrl_handle); + hal_dsi_rx_ctrl_stop(g_rx_ctrl_handle); + hal_dsi_rx_ctrl_deinit(g_rx_ctrl_handle); + + hal_swire_open(DISABLE); + hal_swire_deinit(); + hal_timer_stop(SWIRE_TIMER); + hal_timer_deinit(SWIRE_TIMER); + + hal_system_set_vcc(false); + TAU_LOGD("disable video path \n"); + g_need_enter_sleep_mode = false; + } + #endif + + /* enter idle mode*/ + //hal_system_idle_mode(true); + } + +} diff --git a/src/app/demo/ap_demo.h b/src/app/demo/ap_demo.h new file mode 100644 index 0000000..65b7f8d --- /dev/null +++ b/src/app/demo/ap_demo.h @@ -0,0 +1,48 @@ +/******************************************************************************* +* +* +* File: s8_demo.h +* Description: s8ͷļ +* Version: V0.1 +* Date: 2021-02-22 +* Author: Tempest + *******************************************************************************/ + +#ifndef __AP_DEMO_H__ +#define __AP_DEMO_H__ + +//#define DISABLE_TDDI_I2C_FUNCTION +//#define USE_WL518_INTERNAL_FLASH + + +/* ͬѡѡѡ1*/ +#define USE_FOR_SUMSUNG_S21U + +#ifdef USE_FOR_SUMSUNG_S21U +#define AMOLED_NT37701_CSOT667 1 +#define FINGERPRINT_USE_DRIVERIC_FPR 1 // ָʶʹdriver icFPRʵ + +#define PANEL_INIT_CODE_ARRAY 1 + +#define G_PHONE_INT_DEFAULT_LOW + +#define USE_FOR_S10_BLUE_MODE //S10ģʽ +#define ADD_PANEL_DISPLAY_MODE //Ļģʽܡƽ⹦ +#define ADD_TIMER3_FUNCTION +#define ENABLE_TP_SLEEP + +#define USE_FILTER_20220513 +#define ADD_PWM_OUTPUT_FOR_BL //PWMƱ 20220510 + +#define ADD_FINGERPRINT_FUNC //ָƹ +#endif + + +/** +* @brief test system +* @param none +* @retval none +*/ +void ap_demo(void); +void app_tp_I2C_init(void); +#endif diff --git a/src/app/demo/ap_demo_version.txt b/src/app/demo/ap_demo_version.txt new file mode 100644 index 0000000..bbcf86c --- /dev/null +++ b/src/app/demo/ap_demo_version.txt @@ -0,0 +1,16 @@ +//////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////// + + ISP368_S10Lite_NT37701AH_CSOT667_V100_20230711 + + 1、解决偶发触摸卡问题：将ST触摸芯片的软件复位全部改成硬件复位。 + 2、增加版本号打印和BIN文件版本 + 3、增加INT被拉死问题，强制硬件复位 + + + +//////////////////////////////////////////////////////////////////////// +//////////////////////////////////////////////////////////////////////// + + + diff --git a/src/app/demo/app_tp_for_custom_s8.h b/src/app/demo/app_tp_for_custom_s8.h new file mode 100644 index 0000000..173f33d --- /dev/null +++ b/src/app/demo/app_tp_for_custom_s8.h @@ -0,0 +1,150 @@ +/******************************************************************************* +* +* +* File: app_tp_for_custom.h +* Description tp Э鴦ļضõĺ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __APP_TP_FOR_CUSTOM_S8_H__ +#define __APP_TP_FOR_CUSTOM_S8_H__ +#include "test_cfg_global.h" + +#include "string.h" +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "app_tp_transfer.h" +#include "hal_gpio.h" + +#define AP_TP_TRANSFER 1 + +#if AMOLED_NT37280 + #define PHONE_SLAVE_TRANSFER_I2C 1 //1:ʾֻоƬ֮䣬touch ݲ I2C ͨţ + #define PHONE_SLAVE_TRANSFER_SPI 0 //1:ʾֻоƬ֮䣬touch ݲ SPI ͨţ + #define SCREEN_MASTER_TRANSFER_I2C 0 //1:ʾĻоƬ֮䣬touch ݲ I2C ͨţ + #define SCREEN_MASTER_TRANSFER_SPI 1 //1:ʾĻоƬ֮䣬touch ݲ SPI ͨţ +#elif LCD_HX83112A + #define PHONE_SLAVE_TRANSFER_I2C 1 //1:ʾֻоƬ֮䣬touch ݲ I2C ͨţ + #define PHONE_SLAVE_TRANSFER_SPI 0 //1:ʾֻоƬ֮䣬touch ݲ SPI ͨţ + #define SCREEN_MASTER_TRANSFER_I2C 0 //1:ʾĻоƬ֮䣬touch ݲ I2C ͨţ + #define SCREEN_MASTER_TRANSFER_SPI 0 //1:ʾĻоƬ֮䣬touch ݲ SPI ͨţ +#else // #if LCD_TD4310 + #define PHONE_SLAVE_TRANSFER_I2C 1 //1:ʾֻоƬ֮䣬touch ݲ I2C ͨţ + #define PHONE_SLAVE_TRANSFER_SPI 0 //1:ʾֻоƬ֮䣬touch ݲ SPI ͨţ + #define SCREEN_MASTER_TRANSFER_I2C 1 //1:ʾĻоƬ֮䣬touch ݲ I2C ͨţ + #define SCREEN_MASTER_TRANSFER_SPI 0 //1:ʾĻоƬ֮䣬touch ݲ SPI ͨţ +#endif + +#ifdef USE_FOR_SUMSUNG_S21U +#define CHIP_I2C_ADDRESS 0x48 //оƬ I2C ӻַ.I2Cַ +#define SCREEN_I2C_ADDRESS 0x49 //Ļ I2C ӻַ + +#elif defined(USE_FOR_SUMSUNG_S9PLUS) +#define CHIP_I2C_ADDRESS 0x48 //оƬ I2C ӻַ +#define SCREEN_I2C_ADDRESS 0x20 //Ļ I2C ӻַ + +#else +#define CHIP_I2C_ADDRESS 0x48 //оƬ I2C ӻַ +#define SCREEN_I2C_ADDRESS 0x49 //Ļ I2C ӻַ +#endif + +#define CHIP_I2C_ADDR_BITS I2C_ADDR_BITS_7 //Ļ I2C ַλ 7/10ĬΪ7 +#define SCREEN_I2C_ADDR_BITS I2C_ADDR_BITS_7 //Ļ I2C ַλ 7/10ĬΪ7 +#define I2C_MASTER_SPEED 800000 // I2C ͨ + +#define SPI_MASTER_SPEED 10000000 // SPI ͨ + +#define BUFFER_SIZE_MAX 200 // bufrer ֽ + +#define INPUT_WIDTH_VALUE 1440 //ԭװ X ֵֵ +#define INPUT_HEIGHT_VALUE 3200 //ԭװ Y ֵֵ + +#define OUTPUT_WIDTH_VALUE 1080 //ά X ֵֵ +#define OUTPUT_HEIGHT_VALUE 2400 //ά Y ֵֵ + + +#define SCREEN_TRANSFER_WRITE false //յscreen ioжϣ֮ö +#define SCREEN_TRANSFER_READ true //յscreen ioжϣ֮Ҫ + +typedef enum +{ + I2C_ADDR_BITS_7 = 7, + I2C_ADDR_BITS_10 = 10 +} en_I2C_ADDR_BITS_mdoe; + +typedef struct +{ + uint8_t *buffer; //յscreen ioжϺͨŵķbufferָ + size_t txbuffer_size; // buffer ݳȣҪʱĿǰֻ֧4ֽ + size_t rxbuffer_size; //֮Ҫصݳ + bool read_flag; //true յscreen ioжϣ֮Ҫ +} st_screen_data; + +typedef struct +{ + const uint8_t *buffer; //ͨŵķbufferָ + size_t txbuffer_size; // buffer ݳȣҪʱĿǰֻ֧4ֽ + size_t rxbuffer_size; //֮Ҫصݳ + bool read_flag; //true յscreen ioжϣ֮Ҫ +} st_screen_const_data; + +typedef struct +{ + uint8_t reg_size; //bufferĸ + size_t write_back_size; //Ҫ͵ݳ + const uint8_t *reg_data; //buffer + const uint8_t *write_back; //bufer +} st_reg_const_data; + +typedef struct +{ + uint8_t reg_size; //bufferĸ + size_t write_back_size; //Ҫ͵ݳ + uint8_t *reg_data; //buffer + uint8_t *write_back; //bufer +} st_reg_data; + +extern io_pad_e g_screen_input_rst_pad; +extern io_pad_e g_screen_input_int_pad; +extern io_pad_e g_phone_input_rst_pad; +extern io_pad_e g_phone_output_int_pad; + +extern uint8_t phone_start_flag; +extern uint8_t phone_touch_flag; +extern const uint8_t screen_reg_int_data_size; +extern const uint8_t screen_reg_start_data_size; +extern st_screen_data screen_reg_int_data[]; +extern st_screen_const_data screen_reg_start_data[]; +//extern st_reg_const_data phone_reg_const_data[]; + +/************************************************************************** +* @name : app_tp_screen_analysis_const +* @brief : screen start ׶ݽɿͻ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +uint8_t app_tp_screen_analysis_const(uint8_t transfer_now, uint8_t *rxbuffer, size_t data_size); + +/************************************************************************** +* @name : app_tp_screen_analysis_int +* @brief : screen IOжϺ ݽɿͻ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +uint8_t app_tp_screen_analysis_int(uint8_t transfer_now, uint8_t *rxbuffer, size_t data_size); + +/************************************************************************** +* @name : app_tp_phone_analysis_data +* @brief : phone ݽɿͻ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_phone_analysis_data(uint8_t *rxbuffer, size_t rxbuffer_size, const uint8_t **txbuffer, size_t *txbuffer_size); + + +#endif + diff --git a/src/app/demo/app_tp_screen_transfer_data_s8.h b/src/app/demo/app_tp_screen_transfer_data_s8.h new file mode 100644 index 0000000..c511a3e --- /dev/null +++ b/src/app/demo/app_tp_screen_transfer_data_s8.h @@ -0,0 +1,23 @@ +/******************************************************************************* +* +* +* File: hal_tp_screen_transfer_data.h +* Description start/sleep/awake ģʽҪ͵ֵ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __HAL_TP_SCREEN_TRANSFER_DATA_S8_H__ +#define __HAL_TP_SCREEN_TRANSFER_DATA_S8_H__ + +#include "tau_common.h" + +/***************send to screen***************/ +const uint8_t screen_87_data[] = {0x87}; +const uint8_t screen_a0_00_ff_data[] = {0xa0, 0x00, 0xff}; +const uint8_t screen_a4_06_c1_data[] = {0xa4, 0x06, 0xc1}; + +/*******************************************/ + +#endif + diff --git a/src/app/demo/app_tp_st_touch.c b/src/app/demo/app_tp_st_touch.c new file mode 100644 index 0000000..c3b10ee --- /dev/null +++ b/src/app/demo/app_tp_st_touch.c @@ -0,0 +1,573 @@ +/******************************************************************************* +* +* +* File: app_tp_st_touch.c +* Description ST touch У׼λȹܺ +* Version V0.1 +* Date 2023-03-13 +* Author sfy + +* Description ST touch У׼ضܣŽӿڸλȡǷɹ +* Version V0.2 +* Date 2023-03-22 +* Author sfy + +*******************************************************************************/ + +#include "test_cfg_global.h" +#include "app_tp_transfer.h" +#include "hal_i2c_master.h" +#include "hal_i2c_slave.h" +#include "hal_spi_master.h" +#include "hal_spi_slave.h" +#include "tau_log.h" +#include "app_tp_st_touch.h" +#include "app_tp_transfer.h" +#include "app_tp_for_custom_s8.h" + +#define ST_TP_CALIBRATION_SUCCESS 0x5A // У׼ɹ־ + +static volatile bool s_calibration_flag = false; +static volatile uint8_t s_calibration_correct_flag = false; + +st_tp_scan_data tp_scan_data; + +uint8_t st_touch_init_sensor_off[3] = {0xA0,0x00,0x00}; //2 sensor OFF +uint8_t st_touch_init_sensor_on[3] = {0xA0,0x00,0x01}; //2 sensor on + + +uint8_t st_touch_tp_tuning_reset[3] = {0xA4,0x00,0x00}; // 3 System Reset +uint8_t st_touch_tp_tuning_FpnlInit[3] = {0xA4,0x00,0x03}; // FPnl Init +uint8_t st_touch_tp_tuning_PnlInit[3] = {0xA4,0x00,0x02}; // Pnl Init +uint8_t st_touch_tp_tuning_TuneM[4] = {0xA4,0x03,0x13,0x00}; // TuneM +uint8_t st_touch_tp_tuning_TuneS[4] = {0xA4,0x03,0x0C,0x00}; // TuneS +uint8_t st_touch_tp_tuning_SvCfg[3] = {0xA4,0x05,0x01}; // SvCfg +uint8_t st_touch_tp_tuning_SvCx[3] = {0xA4,0x05,0x02}; // SvCx +uint8_t st_touch_tp_tuning_SvPnl[3] = {0xA4,0x05,0x04}; // SvPnl +uint8_t st_touch_tp_tuning_clearfifo[3] = {0xA4,0x00,0x01}; // 1 clear fifo + +uint8_t st_touch_tp_tuning_clkreset[3] = {0xA4,0x00,0x05}; // clk reset + +/************************************************************************** +* @name : ap_tp_st_touch_get_calibration_success_mark +* @brief : st touch ȡУ׼ɹ־ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_get_calibration_success_mark(void) +{ + uint8_t cali_send_buff[6] = {0xFA,0x20,0x01,0x00,0x00,0x00}; + uint8_t cali_send_buff1[3] = {0xA4,0x06,0x01}; + uint8_t cali_read_buff[40] = {0}; + uint8_t i = 0; + + app_tp_m_read(cali_send_buff, 5, cali_read_buff, 4); + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + + app_tp_m_write(cali_send_buff1, 3); + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + + app_tp_m_read(cali_send_buff, 5, cali_read_buff, 4); + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + + app_tp_m_read(cali_send_buff, 5, cali_read_buff, 32); + while(!hal_i2c_m_transfer_complate()); + + if((cali_read_buff[20] == 0xFF) && (cali_read_buff[21] == 0xFF)) + { + s_calibration_correct_flag = ST_TP_CALIBRATION_SUCCESS; // У׼ɹ + } + else + { + s_calibration_correct_flag = 0x00; // У׼ʧ + } +/* + for(i=0;i<32;i++) + { + printf("%02x ",cali_read_buff[i]); + } +*/ +} + +/************************************************************************** +* @name : ap_tp_st_touch_calibration +* @brief : st touch У׼ָ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_calibration(void) +{ + // app_tp_m_write(st_touch_tp_tuning_reset, sizeof(st_touch_tp_tuning_reset)); // System Reset + // while(!hal_i2c_m_transfer_complate()); + // delayMs(10); + app_tp_m_write(st_touch_tp_tuning_FpnlInit, sizeof(st_touch_tp_tuning_FpnlInit)); // FPnl Init + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_PnlInit, sizeof(st_touch_tp_tuning_PnlInit)); // Pnl Init + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_TuneM, sizeof(st_touch_tp_tuning_TuneM)); // TuneM + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_TuneS, sizeof(st_touch_tp_tuning_TuneS)); // TuneS + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_SvCfg, sizeof(st_touch_tp_tuning_SvCfg)); // SvCfg + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_SvCx, sizeof(st_touch_tp_tuning_SvCx)); // SvCx + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(st_touch_tp_tuning_SvPnl, sizeof(st_touch_tp_tuning_SvPnl)); // SvPnl + while(!hal_i2c_m_transfer_complate()); + delayMs(1); +} + +const unsigned short wCRCTalbeAbs[] = +{ + 0x0000, 0xCC01, 0xD801, 0x1400, 0xF001, 0x3C00, 0x2800, 0xE401, + 0xA001, 0x6C00, 0x7800, 0xB401, 0x5000, 0x9C01, 0x8801, 0x4400, +}; + +/************************************************************************** +* @name : CRC16_2 +* @brief : CRC ֵ +* @param[in] :pchMsg ַָ; wDataLen CRC 鳤 +* @return : 16λCRCֵ +* @retval : +**************************************************************************/ + +unsigned short CRC16_2(unsigned char *pchMsg, unsigned short wDataLen) +{ + unsigned short wCRC = 0xFFFF; + unsigned short i; + unsigned char chChar; + + for (i = 0; i < wDataLen; i++) + { + chChar = *pchMsg++; + wCRC = wCRCTalbeAbs[(chChar ^ wCRC) & 15] ^ (wCRC >> 4); + wCRC = wCRCTalbeAbs[((chChar >> 4) ^ wCRC) & 15] ^ (wCRC >> 4); + } + + return wCRC; +} + +/************************************************************************** +* @name : ap_set_tp_calibration_04 +* @brief : ȡ04 02ִУ׼gammaУ׼ȹ +* @param[in] :handler rx handler; dcs_packet ָͳȵϢṹ +* @return : true +* @retval : +**************************************************************************/ + +bool ap_set_tp_calibration_04(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet) +{ + uint8_t i,crch,crcl,command,param[30] = {0}; + unsigned short crc; + + // CRCֵ + for(i=0;iparam_length;i++) + { + param[i+1] = dcs_packet->packet_param[i]; + printf("%02x ",dcs_packet->packet_param[i]); + } + + param[0] = 0x04; + crc = CRC16_2(param,dcs_packet->param_length-1); + crch = (crc>>8); + crcl = crc; + + // CRCУж +// if(crch == dcs_packet->packet_param[dcs_packet->param_length-2] && crcl == dcs_packet->packet_param[dcs_packet->param_length-1]) + { + command = param[3]; + switch(command) + { + case CMD_TP_CABLIBRATION: // TouchУ׼ + if( (param[4] == 0x01) && (param[5] == 0x01) && (param[6] == 0x01) ) + { + s_calibration_flag = true; + s_calibration_correct_flag = false; + + } + /* if( (param[4] == 0xA5) && (param[5] == 0x5A) && (param[6] == 0xA5) ) + { + if(s_calibration_correct_flag) // У׼ɹ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx + DSI_VC_0, + 0x7, 0x04,0x02,0x07,0x2A,ST_TP_CALIBRATION_SUCCESS,0x00,0x00); + printf("cali. send ok "); + } + else // У׼ʧ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx + DSI_VC_0, + 0x7, 0x04,0x02,0x07,0x2A,0x00,0x00,0x00); + } + printf("%02x ",s_calibration_correct_flag); + } + */ + break; + case CMD_SET_IMAGE_RGB: // Image RGB + break; + case CMD_SEND_COMMAND: // Command Send + break; + case CMD_WRITE_GAMMA: // GammaУд + break; + case CMD_START_GAMMA: + break; + default: + break; + } + } + + // ݾɰ汾tp calibration + if( (dcs_packet->packet_param[0] == 0x01) && (dcs_packet->packet_param[1] == 0x01) && (dcs_packet->packet_param[2] == 0x01) ) + { + s_calibration_flag = true; + s_calibration_correct_flag = false; + } +/* + if( (dcs_packet->packet_param[0] == 0xA5) && (dcs_packet->packet_param[1] == 0x5A) && (dcs_packet->packet_param[2] == 0xA5) ) + { + if(s_calibration_correct_flag) // У׼ɹ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx + DSI_VC_0, + 0x7, 0x04,0x02,0x07,0x2A,ST_TP_CALIBRATION_SUCCESS,0x00,0x00); + } + else // У׼ʧ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_GEN_LONG_RESPONSE, //xxx + DSI_VC_0, + 0x7, 0x04,0x02,0x07,0x2A,0x00,0x00,0x00); + } + } +*/ + return true; +} + + +/************************************************************************** +* @name : ap_get_tp_calibration_status_01 +* @brief : ȡУ׼״̬ +* @param[in] :param 01 +* @return : true +* @retval : +**************************************************************************/ + +bool ap_get_tp_calibration_status_01(hal_dsi_rx_ctrl_handle_t *handler, uint8_t param) +{ +// if( param == 0x5A ) + { + if(s_calibration_correct_flag) // У׼ɹ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, //xxx + DSI_VC_0, + 1,ST_TP_CALIBRATION_SUCCESS); + } + else // У׼ʧ + { + hal_dsi_rx_ctrl_send_ack_cmd(handler, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B, //xxx + DSI_VC_0, + 1,0x00); + } + } + + return true; +} + +/************************************************************************** +* @name : app_tp_calibration_exec +* @brief : st touch У׼ִк +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void app_tp_calibration_exec(void) +{ + uint8_t i = 0; + + if(s_calibration_flag) + { + s_calibration_flag = false; + for(i=0;i<2;i++) + { + ap_tp_st_touch_calibration(); + delayMs(4000); + ap_tp_st_touch_get_calibration_success_mark(); + if(s_calibration_correct_flag == ST_TP_CALIBRATION_SUCCESS) + { + TAU_LOGD("calibration successful \n"); + break; + } + else + { + TAU_LOGD("calibration failure \n"); + } + } + + } +} + + +/************************************************************************** +* @name : ap_tp_st_touch_scan_point_init +* @brief : st touch tp_scan_dataṹʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_scan_point_init(void) +{ + uint8_t i=0; + + for(i=0;i>4)+1; + i+=7; + + if(eventdata == 0x13) // ¼ + { + for(j=0;j0)) // ͷ¼ + { + for(j=0;j0) // в + { + printf("release finger %2d\n",tp_scan_data.tp_read_point_counter); + tp_scan_data.tp_read_point_counter = 0; + ap_tp_st_touch_simulate_finger_release_event(); + } + ap_tp_st_touch_scan_point_init(); + } + } +} + +/************************************************************************** +* @name : ap_tp_st_touch_error_handler_F3 +* @brief : st touch 쳣 F3 02 +* @param[in] : screendata +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_error_handler_F3(uint8_t* screendata) +{ + // յ TP 쳣ظ 0xF3 0x02 0x00 0x00 0x00 0x00 0x00 0x00 +// if(screendata[0] == 0xF3 && screendata[1] == 0x02 && screendata[2] == 0x00) + if(screendata[0] == 0xF3) + { +// ap_tp_st_touch_software_reset(); + ap_tp_st_touch_hardware_reset(); + } +} + +/************************************************************************** +* @name : ap_tp_st_touch_error_handler_F3 +* @brief : st touch 쳣 FF FF +* @param[in] : screendata +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_error_handler_FF(uint8_t* screendata) +{ + // յ TP 쳣ظ 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF 0xFF + if(screendata[1] == 0xFF && screendata[2] == 0xFF&& screendata[3] == 0xFF&&screendata[4] == 0xFF) + { +// ap_tp_st_touch_software_reset(); + ap_tp_st_touch_hardware_reset(); + } +} + + + + diff --git a/src/app/demo/app_tp_st_touch.h b/src/app/demo/app_tp_st_touch.h new file mode 100644 index 0000000..e7ad4ef --- /dev/null +++ b/src/app/demo/app_tp_st_touch.h @@ -0,0 +1,170 @@ +/******************************************************************************* +* +* +* File: app_tp_st_touch.h +* Description ST touch оƬغ +* Version V0.1 +* Date 2023-03-13 +* Author sfy +*******************************************************************************/ + +#ifndef __APP_TP_ST_TOUCH_H__ +#define __APP_TP_ST_TOUCH_H__ + +#include "string.h" +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "hal_dsi_rx_ctrl.h" + +typedef enum +{ + CMD_TP_CABLIBRATION = 0x2A, + CMD_SET_IMAGE_RGB = 0x2B, + CMD_SEND_COMMAND = 0x2C, + CMD_WRITE_GAMMA = 0x2D, + CMD_START_GAMMA = 0x2E +} st_tp_calibration_command; + + +#define ST_TP_SCAN_POINT_NUMBER_MAX 6 // TP + +typedef struct +{ + uint8_t tp_point_buffer[ST_TP_SCAN_POINT_NUMBER_MAX]; // ¼TPID + uint8_t tp_read_point_counter; // IDͳ + uint8_t tp_point_up_error_flag; // ¼ҪִUP¼ + uint32_t tp_point_error_time_counter; // ûյmove¼release¼ʱ +} st_tp_scan_data; + +/************************************************************************** +* @name : ap_tp_st_touch_calibration +* @brief : st touch У׼ָ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_calibration(void); + +/************************************************************************** +* @name : app_tp_calibration_exec +* @brief : st touch У׼ִк +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void app_tp_calibration_exec(void); + +/************************************************************************** +* @name : ap_tp_st_touch_get_calibration_success_mark +* @brief : st touch ȡУ׼ɹ־ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_get_calibration_success_mark(void); + +/************************************************************************** +* @name : ap_set_tp_calibration_04 +* @brief : ȡ04 02ִУ׼gammaУ׼ȹ +* @param[in] :handler rx handler; dcs_packet ָͳȵϢṹ +* @return : true +* @retval : +**************************************************************************/ + +bool ap_set_tp_calibration_04(hal_dsi_rx_ctrl_handle_t *handler, hal_dcs_packet_t *dcs_packet); + +/************************************************************************** +* @name : ap_get_tp_calibration_status_01 +* @brief : ȡУ׼״̬ +* @param[in] :param 01 +* @return : true +* @retval : +**************************************************************************/ + +bool ap_get_tp_calibration_status_01(hal_dsi_rx_ctrl_handle_t *handler, uint8_t param); + +/************************************************************************** +* @name : ap_tp_st_touch_scan_point_init +* @brief : st touch tp_scan_dataṹʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_scan_point_init(void); + +/************************************************************************** +* @name : ap_tp_st_touch_simulate_finger_release_event +* @brief : st touch ģST ָͷ¼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_simulate_finger_release_event(void); + +/************************************************************************** +* @name : ap_tp_st_touch_software_reset +* @brief : st touch оƬλָ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_software_reset(void); + +/************************************************************************** +* @name : app_tp_st_touch_hardware_reset +* @brief : st touch оƬӲλָ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void ap_tp_st_touch_hardware_reset(void); + +/************************************************************************** +* @name : ap_tp_st_touch_scan_point_record_event +* @brief : st touch ¼¼ +* @param[in] : screendata buflen ݳ +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_scan_point_record_event(uint8_t* screendata,uint8_t len); + +/************************************************************************** +* @name : ap_tp_st_touch_scan_point_record_event_exec +* @brief : st touch в㣬ʱִкҪwhile(1)ִ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_scan_point_record_event_exec(void); + +/************************************************************************** +* @name : ap_tp_st_touch_error_handler_F3 +* @brief : st touch 쳣 F3 02 +* @param[in] : screendata +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_error_handler_F3(uint8_t* screendata); + +/************************************************************************** +* @name : ap_tp_st_touch_error_handler_F3 +* @brief : st touch 쳣 FF FF +* @param[in] : screendata +* @return : +* @retval : +**************************************************************************/ + +void ap_tp_st_touch_error_handler_FF(uint8_t* screendata); + + +#endif + diff --git a/src/app/demo/app_tp_transfer.c b/src/app/demo/app_tp_transfer.c new file mode 100644 index 0000000..c2125dd --- /dev/null +++ b/src/app/demo/app_tp_transfer.c @@ -0,0 +1,759 @@ +/******************************************************************************* +* +* +* File: app_tp_transfer.c +* Description touch I2C/SPI ʼԼͨ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#include "test_cfg_global.h" +#include "app_tp_transfer.h" +#include "hal_i2c_master.h" +#include "hal_i2c_slave.h" +#include "hal_spi_master.h" +#include "hal_spi_slave.h" +#include "tau_log.h" +#include "tau_delay.h" +#include "app_tp_st_touch.h" + + +#if 1//def AP_TP_TRANSFER +uint8_t read_point; //ǰҪıһ8BYTE +uint8_t s_screen_number[2]; +uint8_t s_screen_temp[2]; +//uint8_t s_screen_read_bak[200]; +static uint8_t s_screen_read_buffer[BUFFER_SIZE_MAX]; +static uint8_t s_phone_read_buffer[BUFFER_SIZE_MAX]; + +static bool s_spim_write = false; //¼SPIǷ÷ͣǵĻҪRXFIFO +static bool s_screen_int_flag = false; //¼ǷյĻıж +static bool s_phone_reset_flag = false; //¼ǷյֻĿλź +static bool s_screen_int_transfer_status = false; //¼ǷѾʼͨ +bool s_screen_init_complate = false; //ĻTPʼɱ־ +static uint8_t s_screen_const_transfer_count = 0xff; //¼ǰͨŵһ,ʼֵ screen_reg_start_data_size + +#ifdef USE_FOR_SUMSUNG_S20 +uint16_t u16TouchID; +#endif + +static void app_tp_transfer_phone(size_t recieve_num); +//static void app_tp_reset_callback(void *data); +#if PHONE_SLAVE_TRANSFER_I2C //warning + static void app_tp_i2cs_callback(e_i2c_s_int_status int_status, size_t recieve_num); +#endif +#if PHONE_SLAVE_TRANSFER_SPI //warning + static void app_tp_spis_callback(hal_spis_event_e event, hal_spi_packet_info_t *packet_info); +#endif + +#ifdef USE_FOR_SUMSUNG_S21U +uint8_t MI10_PRO_screen_init_data1[3] = {0xA0,0x00,0x01}; +uint8_t MI10_PRO_screen_init_data2[6] = {0xA2,0x03,0x00,0x00,0x00,0x03}; +uint8_t MI10_PRO_screen_init_data3[3] = {0xA2,0x02,0x00}; +uint8_t MI10_PRO_screen_init_data4[3] = {0xC0,0x07,0x01}; + +uint8_t MI10_PRO_screen_init_data5[3] = {0xA4,0x06,0x70}; +uint8_t MI10_PRO_screen_init_data6[3] = {0xA6,0x00,0x00}; +uint8_t MI10_PRO_screen_init_data7[5] = {0xFA,0x20,0x00,0x00,0x78}; + +uint8_t MI10_PRO_screen_init_data8[6] = {0xA2,0x03,0x20,0x00,0x00,0x00}; +uint8_t MI10_PRO_screen_init_data9[2] = {0xA0,0x01}; +uint8_t MI10_PRO_screen_init_data10[3] = {0xA0,0x00,0x00}; +#endif + +/************************************************************************** +* @name : app_tp_screen_int_callback +* @brief : screen ж ص +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_screen_int_callback(void *data) +{ + s_screen_int_flag = true; +} + +/************************************************************************** +* @name : app_tp_screen_int_lvl_low +* @brief : ȡ screen ж IO ƽ +* @param[in] : +* @return : trueIO Ϊ͵ƽ +* @retval : +**************************************************************************/ +static bool app_tp_screen_int_lvl_low(void) +{ + uint8_t i = 1; + uint8_t j = 1; +#if SCREEN_MASTER_TRANSFER_I2C +// i=hal_gpio_get_input_data(g_screen_input_int_pad); +// j=hal_gpio_get_input_data(g_screen_input_int_pad); +// if((i+j)==0) +// { +// return true; +// } +//else +// { +// return false; +// } + return !hal_gpio_get_input_data(g_screen_input_int_pad); +#elif SCREEN_MASTER_TRANSFER_SPI + return !hal_gpio_get_input_data(g_screen_input_int_pad); //ӦSPIͨŹżͻȻCS ͨ쳣 +#else + return false; +#endif +} + +/************************************************************************** +* @name : app_tp_screen_int_init +* @brief : screen ж IO ʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_screen_int_init(void) +{ + hal_gpio_set_pull_state(g_screen_input_int_pad, ENABLE, DISABLE); // 1. + hal_gpio_ctrl_eint(g_screen_input_int_pad, DISABLE); // 2.رж + hal_gpio_init_eint(g_screen_input_int_pad, DETECT_FALLING_EDGE); // 3.жϳʼ,TPһ㶼½شж + hal_gpio_reg_eint_cb(g_screen_input_int_pad, app_tp_screen_int_callback); // 4.עص + hal_gpio_ctrl_eint(g_screen_input_int_pad, ENABLE); // 5.ʹж +} + +#if 0 +/************************************************************************** +* @name : app_tp_phone_reset_init +* @brief : phone reset ж IO ʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_phone_reset_init(void) +{ + /*0.Ϊ*/ + hal_gpio_init_input(g_phone_input_rst_pad); + /*1.رж*/ + hal_gpio_ctrl_eint(g_phone_input_rst_pad, DISABLE); + /*2.жϳʼ*/ + hal_gpio_init_eint(g_phone_input_rst_pad, DETECT_RISING_EDGE); + /*3.עص*/ + hal_gpio_reg_eint_cb(g_phone_input_rst_pad, app_tp_reset_callback); + /*4.ʹж*/ + hal_gpio_ctrl_eint(g_phone_input_rst_pad, ENABLE); +} +#endif + + +/************************************************************************** +* @name : app_tp_screen_init +* @brief : screen IO 䣬ʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_screen_init(void) +{ + hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); + delayUs(200); + hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_LOW); + delayUs(200); + hal_gpio_set_output_data(g_screen_input_rst_pad, IO_LVL_HIGH); +} + +void app_tp_I2C_init(void) +{ + hal_i2c_s_init(CHIP_I2C_ADDRESS, CHIP_I2C_ADDR_BITS); + hal_i2c_s_set_transfer(app_tp_i2cs_callback); + hal_i2c_s_nonblocking_read(s_phone_read_buffer, BUFFER_SIZE_MAX); //ý buffer +} + + + + +/************************************************************************** +* @name : app_tp_init +* @brief : ʼͨ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_init(void) +{ +#ifdef DISABLE_TDDI_I2C_FUNCTION + hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO + hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET + + hal_gpio_set_mode(IO_PAD_TD_SPIM_CLK,IO_MODE_I2C1_SCL); + hal_gpio_set_mode(IO_PAD_TD_SPIM_CSN,IO_MODE_I2C1_SDA); + + return; +#else + hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CLK, ENABLE, DISABLE); + hal_gpio_set_pull_state(IO_PAD_TD_SPIM_CSN, ENABLE, DISABLE); +#endif + + app_tp_screen_init(); //ʼֻλIO +//app_tp_screen_int_init(); //screenж +#ifdef G_PHONE_INT_DEFAULT_LOW + hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_LOW); //phoneжIO +#else + hal_gpio_init_output(g_phone_output_int_pad, IO_LVL_HIGH); //phoneжIO +#endif + hal_gpio_init_input(g_screen_input_int_pad); +// hal_gpio_init_output(g_screen_input_rst_pad, IO_LVL_HIGH); //ģTP RESET + +#if SCREEN_MASTER_TRANSFER_I2C + hal_i2c_m_dma_init(SCREEN_I2C_ADDRESS, SCREEN_I2C_ADDR_BITS, I2C_MASTER_SPEED); +#elif SCREEN_MASTER_TRANSFER_SPI + hal_spi_m_dma_init(SPI_MASTER_SPEED, SCREEN_SPI_CPHA, SCREEN_SPI_CPOL); +#endif + +#if PHONE_SLAVE_TRANSFER_I2C +// hal_i2c_s_init(CHIP_I2C_ADDRESS, CHIP_I2C_ADDR_BITS); +// hal_i2c_s_set_transfer(app_tp_i2cs_callback); +// hal_i2c_s_nonblocking_read(s_phone_read_buffer, BUFFER_SIZE_MAX); //ý buffer +#elif PHONE_SLAVE_TRANSFER_SPI + hal_spi_slave_init(PHONE_SPI_CPHA, PHONE_SPI_CPOL, true); // ʼspiԼdma + hal_spi_slave_register_callback(app_tp_spis_callback); // עص + hal_spi_slave_auto_transfer_abort(); // ֹͣ + hal_spi_slave_flush_fifo(); // Flush FIFO + + /* ÿpacketԶ, circle mode Ϊfalse, յbuffer max sizeݺbufferٸ, packetɺûص */ + hal_spi_slave_set_auto_rx_buffer(s_phone_read_buffer, BUFFER_SIZE_MAX, false); // auto rx buffer + hal_spi_slave_set_auto_tx_buffer(phone_reg_const_data[0].write_back, phone_reg_const_data[0].write_back_size, false); // TX BUFFER + + hal_spi_slave_enable(); // spis + hal_spi_slave_auto_transfer_start(); // rxԶ +#endif +} + + +/************************************************************************** +* @name : app_tp_m_transfer_complate +* @brief : ȡͨ״̬ +* @param[in] : +* @return :true: ͨ +* @retval : +**************************************************************************/ +bool app_tp_m_transfer_complate(void) +{ +#if SCREEN_MASTER_TRANSFER_I2C + return hal_i2c_m_transfer_complate(); +#elif SCREEN_MASTER_TRANSFER_SPI + return hal_spi_m_get_transfer_complate(); +#else + return true; +#endif +} + +/************************************************************************** +* @name : app_tp_s_transfer_complate +* @brief : ȡӻͨ״̬ +* @param[in] : +* @return :true: ͨ +* @retval : +**************************************************************************/ +bool app_tp_s_transfer_complate(void) +{ +#if SCREEN_MASTER_TRANSFER_I2C + return hal_i2c_s_write_complate() && hal_i2c_s_read_complate(); +#elif SCREEN_MASTER_TRANSFER_SPI + return !hal_spi_slave_busy(); +#else + return true; +#endif +} + +/************************************************************************** +* @name : app_tp_m_write +* @brief : ͨŷʽ÷txbufferе +* @param[in] :txbuffer: buffer ͷַ +* @param[in] :buffer_size: buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_m_write(const uint8_t *txbuffer, size_t buffer_size) +{ +#if SCREEN_MASTER_TRANSFER_I2C + hal_i2c_m_dma_write(txbuffer, buffer_size); +#elif SCREEN_MASTER_TRANSFER_SPI + hal_spi_m_dma_write(txbuffer, buffer_size); + s_spim_write = true; +#endif +} + +/************************************************************************** +* @name : app_tp_m_read +* @brief : ͨŷʽ÷txbufferеݺrxbuffer +* @param[in] :cmd: buffer ͷַ +* @param[in] :cmd_size: buffer +* @param[in] :data_buffer: ȡ buffer ͷַ +* @param[in] :data_size: ȡ buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_m_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size) +{ +#if SCREEN_MASTER_TRANSFER_I2C + uint8_t i = 0; + uint32_t address = 0; + + for (i = 0; i < cmd_size; i++) //ȽҪ͵ϵ address + { + address |= (uint32_t)cmd[i] << i * 8; + } + hal_i2c_m_dma_read(address, cmd_size, data_buffer, data_size); +#elif SCREEN_MASTER_TRANSFER_SPI + hal_spi_m_dma_read(cmd, cmd_size, data_buffer, data_size); +#endif +} + +/************************************************************************** +* @name : app_tp_s_write +* @brief : ͨŷʽ÷txbufferе +* @param[in] :txbuffer: buffer ͷַ +* @param[in] :buffer_size: buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size) +{ +#if PHONE_SLAVE_TRANSFER_I2C + hal_i2c_s_dma_write(txbuffer, buffer_size); +#elif PHONE_SLAVE_TRANSFER_SPI + //while (hal_spi_slave_busy()); + hal_spi_slave_auto_transfer_abort(); + hal_spi_slave_flush_fifo(); + hal_spi_slave_set_auto_tx_buffer(txbuffer, buffer_size, true); + hal_spi_slave_auto_transfer_start(); +#endif +} + +/************************************************************************** +* @name : app_tp_s_read +* @brief : ͨŷʽrxbuffer +* @param[in] :rxBuffer: ȡ buffer ͷַ +* @param[in] :data_size: ȡ buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_s_read(void *rxBuffer, size_t data_size) +{ +#if PHONE_SLAVE_TRANSFER_I2C + hal_i2c_s_nonblocking_read(rxBuffer, data_size); +#endif +} + +/************************************************************************** +* @name : app_tp_spis_callback +* @brief : SPI slave жϴ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +#if PHONE_SLAVE_TRANSFER_I2C //warning +//ԡint_status=0Ϊ=2ΪSTOP=1δԵ +//recieve_numΪյָ +static void app_tp_i2cs_callback(e_i2c_s_int_status int_status, size_t recieve_num) +{ +#if 0 // 1: test + if (int_status >2) + { + s_phone_read_buffer[2]=int_status; + s_phone_read_buffer[3]=recieve_num; + app_tp_m_write(s_phone_read_buffer, 4); + } +#endif + app_tp_transfer_phone(recieve_num); +} +#endif + +/************************************************************************** +* @name : app_tp_spis_callback +* @brief : SPI slave жϴ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +#if PHONE_SLAVE_TRANSFER_SPI //warning +static void app_tp_spis_callback(hal_spis_event_e event, hal_spi_packet_info_t *packet_info) +{ + app_tp_transfer_phone(packet_info->packet_size); +} +#endif + +#if 0 +/************************************************************************** +* @name : app_tp_reset_callback +* @brief : ֻ IO临λжϴ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +static void app_tp_reset_callback(void *data) +{ + TAU_LOGD("app_tp_reset_callback\n"); + s_phone_reset_flag = true; + app_tp_s_write(phone_reg_const_data[0].write_back, phone_reg_const_data[0].write_back_size); +#if PHONE_SLAVE_TRANSFER_SPI + hal_gpio_set_output_data(IO_PAD_AP_INT, IO_LVL_LOW); +#endif +} +#endif + + +void S20_Start_init(void) +{ + uint8_t len=0; + uint8_t temp=0; + uint8_t temp_start_flag=0; + // if(phone_start_flag==1) + { + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + delayMs(2); + while(!hal_gpio_get_input_data(g_screen_input_int_pad)) + { + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + delayMs(2); + } + temp=s_screen_read_buffer[0]&0xf0; + if((temp==0x10)||(temp==0x20)||(temp==0x30)) + { + temp_start_flag=1; + } + if(temp_start_flag==0) + { + app_tp_m_write(MI10_PRO_screen_init_data1, sizeof(MI10_PRO_screen_init_data1));//0xA0,0x00,0x01 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_screen_init_data2, sizeof(MI10_PRO_screen_init_data2));//0xA2,0x03,0x00,0x00,0x00,0x03 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_screen_init_data3, sizeof(MI10_PRO_screen_init_data3));//0xA2,0x02,0x00 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_write(MI10_PRO_screen_init_data4, sizeof(MI10_PRO_screen_init_data4));//0xC0,0x07,0x01 + while(!hal_i2c_m_transfer_complate()); + delayMs(1); + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + if(s_screen_read_buffer[7]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, len); + while(!hal_i2c_m_transfer_complate()); + } + } +#endif + if(hal_gpio_get_input_data(g_screen_input_int_pad)) + { + s_screen_init_complate = true; + app_tp_screen_int_init(); + phone_start_flag=0; + } + } +} + + + +/************************************************************************** +* @name : app_tp_transfer_screen_const +* @brief : flowдscreen screen ʼ +* @param[in] : +* @return : +* @retval : +*޸TP1ģʼ +*ִscreen_reg_start_data[] +**************************************************************************/ +static void app_tp_transfer_screen_const(void) +{ +// static bool screen_const_transfer_buffer_ready = true; // buffer Ƿ׼ + uint8_t ii; +// uint8_t len=0; + /**** 1. жϵǰ״̬ͨѽ, ״̬ͨѽҿʼ̻δ****/ +#if 0 // test + uint8_t test_master_read_buffer[10] = {0x08, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; + uint8_t write_buffer[10] = {0x04, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19}; + +// for (ii =0x20; ii<0x7F; ii++) + { + //hal_i2c_m_dma_init(ii, SCREEN_I2C_ADDR_BITS); + //delayMs(100); + if (hal_i2c_m_dma_write(write_buffer, 1)) + { + //break; + } + while(!hal_i2c_m_transfer_complate()); + hal_i2c_m_dma_read(test_master_read_buffer, 1, test_master_read_buffer, 2); + } +#endif + + + if (app_tp_m_transfer_complate() && (s_screen_const_transfer_count < screen_reg_start_data_size)) + { + if (s_spim_write) //SPI дݺҪѽFIFOݶȻӰһζȡ + { + hal_spi_m_clear_rxfifo(); + s_spim_write = false; + } + + #if 1 + +// #ifndef USE_FOR_SUMSUNG_S20 +// for (ii =0; ii= screen_reg_start_data_size) + { + s_screen_init_complate = true; + } + } + #endif + } +} + +/************************************************************************** +* @name : app_tp_transfer_screen_start +* @brief : flowдscreenʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_transfer_screen_start(void) +{ +// s_screen_init_complate = false; + s_screen_const_transfer_count = 0; +// app_tp_screen_init(); +#ifndef DISABLE_I2C_INIT_CODE + app_tp_transfer_screen_const(); +#endif + s_screen_int_flag = false; +} + +/************************************************************************** +* @name : app_tp_transfer_screen_int +* @brief : screenжϺ󣬰flowдscreenЭת +* @param[in] : +* @return : +* @retval : +*޸TP2ȡģ鱨㣡 +*ִscreen_reg_int_data[]ҲԼд +**************************************************************************/ +void app_tp_transfer_screen_int(void) +{ + uint8_t len=0; + uint8_t temp_len=0; + bool screen_gpio_int = false; + static uint8_t screen_int_transfer_count = 0; //¼ǰͨŵһ + static bool screen_int_transfer_buffer_ready = true; // buffer Ƿ׼ + // static uint8_t test_flag = 0; + // s_screen_init_complate=false;//Ϊ¼⽫ƬΪ·ݣFT8719̩ĹͨѶ + if (!s_screen_init_complate) //TP ʼδɣȽгʼ + { + + app_tp_transfer_screen_const(); + + return; + } + + + /**** 1. ж screen Ƿ񷢳жź ****/ + // s_screen_int_flag: жźű־λ + // app_tp_screen_int_lvl_low : SPI ʱͨʱżcsߵͨ쳣ñ־λڽ + screen_gpio_int = s_screen_int_flag || app_tp_screen_int_lvl_low(); + if (screen_gpio_int) + { + s_screen_int_flag = false; + + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + if(s_screen_read_buffer[7]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); + while(!hal_i2c_m_transfer_complate()); + temp_len=len+7; + } + if(s_screen_read_buffer[temp_len]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[temp_len+1], len); + while(!hal_i2c_m_transfer_complate()); + } + delayUs(100); + + while(!hal_gpio_get_input_data(g_screen_input_int_pad)) + { + app_tp_m_read(screen_reg_int_data[0].buffer, 1, s_screen_read_buffer, 8); + while(!hal_i2c_m_transfer_complate()); + delayUs(100); + if(s_screen_read_buffer[7]>0) + { + len=s_screen_read_buffer[7]*8; + app_tp_m_read(screen_reg_int_data[0].buffer, 1, &s_screen_read_buffer[8], len); + while(!hal_i2c_m_transfer_complate()); + delayUs(100); + } + } + ap_tp_st_touch_scan_point_record_event(s_screen_read_buffer, len+8); + ap_tp_st_touch_error_handler_FF(s_screen_read_buffer); + ap_tp_st_touch_error_handler_F3(s_screen_read_buffer); + screen_int_transfer_buffer_ready = true; + screen_int_transfer_count = app_tp_screen_analysis_int(screen_int_transfer_count, s_screen_read_buffer,screen_reg_int_data[2].rxbuffer_size); + screen_int_transfer_count = 0; + s_screen_int_transfer_status = false; + } +} + + + +/************************************************************************** +* @name : app_tp_transfer_phone +* @brief : ݽӦĴ +* @param[in] : recieve_numݳ +* @return : +* @retval : +**************************************************************************/ +static void app_tp_transfer_phone(size_t recieve_num) +{ + const uint8_t *phone_write_buffer; + size_t phone_write_buffer_size = 0; + /* ݽжǷҪԼ𸴵bufferָ */ + if (recieve_num > 0) + { + #if 0// 1: test + s_phone_read_buffer[3]=recieve_num; + app_tp_m_write(s_phone_read_buffer, 4); + #endif + app_tp_phone_analysis_data(s_phone_read_buffer, recieve_num, &phone_write_buffer, &phone_write_buffer_size); + } + + app_tp_s_read(s_phone_read_buffer, BUFFER_SIZE_MAX); + if (phone_write_buffer_size) //0ʾҪֻ÷buffer + { + app_tp_s_write(phone_write_buffer, phone_write_buffer_size); + } +} + +/************************************************************************** +* @name : app_tp_phone_reset_on +* @brief : ȡֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +bool app_tp_phone_reset_on(void) +{ + return s_phone_reset_flag; +} + +/************************************************************************** +* @name : app_tp_phone_clear_reset_on +* @brief : ֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_phone_clear_reset_on(void) +{ + s_phone_reset_flag = false; +} + +#else + +void app_tp_screen_init(void) +{ + +} + +void app_tp_init(void) +{ + +} + +void app_tp_transfer_screen_int(void) +{ + +} + +void app_tp_transfer_screen_start(void) +{ + +} + +bool app_tp_phone_reset_on(void) +{ + return false; +} + +void app_tp_phone_clear_reset_on(void) +{ + +} + +void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size) +{ + +} + +bool app_tp_enter_sleep_on(void) +{ + return false; +} + +#endif + diff --git a/src/app/demo/app_tp_transfer.h b/src/app/demo/app_tp_transfer.h new file mode 100644 index 0000000..52615a9 --- /dev/null +++ b/src/app/demo/app_tp_transfer.h @@ -0,0 +1,107 @@ +/******************************************************************************* +* +* +* File: app_tp_transfer.h +* Description touch I2C/SPI ͨغ +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ +#ifndef __APP_TP_TRANSFER_H__ +#define __APP_TP_TRANSFER_H__ + +#include "string.h" +#include "tau_device_datatype.h" +#include "tau_common.h" + +#define SCREEN_TRANSFER_WRITE false //յscreen ioжϣ֮ö +#define SCREEN_TRANSFER_READ true //յscreen ioжϣ֮Ҫ + +/************************************************************************** +* @name : ap_tp_calibration +* @brief : ����У׼���� +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void ap_tp_calibration(void); + +/************************************************************************** +* @name : app_tp_screen_init +* @brief : screen IO 䣬ʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_screen_init(void); + +/************************************************************************** +* @name : app_tp_init +* @brief : ʼͨ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_init(void); + +/************************************************************************** +* @name : app_tp_transfer_screen_int +* @brief : screenжϺ󣬰flowдscreenЭת +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_transfer_screen_int(void); + +/************************************************************************** +* @name : app_tp_transfer_screen_start +* @brief : flowдscreenʼʼ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_transfer_screen_start(void); + +/************************************************************************** +* @name : app_tp_phone_reset_on +* @brief : ȡֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +bool app_tp_phone_reset_on(void); + +/************************************************************************** +* @name : app_tp_phone_clear_reset_on +* @brief : ֻλźŵ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void app_tp_phone_clear_reset_on(void); + +/************************************************************************** +* @name : app_tp_s_write +* @brief : ͨŷʽ÷txbufferе +* @param[in] :txbuffer: buffer ͷַ +* @param[in] :buffer_size: buffer +* @return : +* @retval : +**************************************************************************/ +void app_tp_s_write(const uint8_t *txbuffer, size_t buffer_size); + +/************************************************************************** +* @name : app_tp_enter_sleep_on +* @brief : ȡ tp ͨ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +bool app_tp_enter_sleep_on(void); + +void app_tp_m_write(const uint8_t *txbuffer, size_t buffer_size); + +void app_tp_m_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size); + +#endif + diff --git a/src/app/main.c b/src/app/main.c new file mode 100644 index 0000000..a3b4715 --- /dev/null +++ b/src/app/main.c @@ -0,0 +1,26 @@ +#include +#include +#include +#include "test_cfg_global.h" +#include "tau_log.h" +#include "hal_system.h" +#include "board.h" +#include "tau_delay.h" + + + +//test_cfg_global.h file choice what you want test or completely demo of S8 or S8+ Felix + +int main() +{ +// hal_system_init(); + board_Init(); + + while (1) + { +#if _DEMO_S8_EN + ap_demo(); +#endif + while (1); + } +} diff --git a/src/app/test_cfg_global.h b/src/app/test_cfg_global.h new file mode 100644 index 0000000..37f4546 --- /dev/null +++ b/src/app/test_cfg_global.h @@ -0,0 +1,84 @@ +/******************************************************************************* +* Copyright (C) 2019-2022, 518 Systems (R),All Rights Reserved. +* +* File: test_cfg_global.h +* Description ȫͷļ +* Version V0.1 +* Date 2021-05-01 +* Author kevin + *******************************************************************************/ + +#ifndef __TEST_GLOBAL_CONFIG_H__ +#define __TEST_GLOBAL_CONFIG_H__ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +#define _TEST_TIMER_EN 0 +#define _TEST_DSI_TX_EN 0 +#define _TEST_DSI_RX_EN 0 +#define _TEST_PWM_EN 0 +#define _TEST_SWIRE_EN 0 +#define _TEST_WDG_EN 0 +#define _TEST_GPIO_EN 0 +#define _TEST_I2C_EN 0 +#define _TEST_SPI_EN 0 + +#define _DEMO_S8_EN 1 +#define _DEMO_S8P_EN 0 +#if _TEST_TIMER_EN + #include "test_hal_timer.h" +#endif + +#if _TEST_I2C_EN + #include "test_hal_i2c.h" +#endif + +#if _TEST_SPI_EN + #include "test_hal_spi.h" +#endif + +#if _TEST_DSI_TX_EN + #include "test_hal_dsi_tx.h" +#endif + +#if _TEST_DSI_RX_EN + #include "test_hal_dsi_rx.h" +#endif + +#if _TEST_PWM_EN + #include "test_hal_pwm.h" +#endif + +#if _TEST_SWIRE_EN + #include "test_hal_swire.h" +#endif + +#if _TEST_WDG_EN + #include "test_hal_wdg.h" +#endif + +#if _TEST_GPIO_EN + #include "test_hal_gpio.h" +#endif + +#if _TEST_I2C_TP_EN + #include "test_hal_i2c_tp.h" +#endif + +#if _DEMO_S8_EN + #include "ap_demo.h" + #include "app_tp_for_custom_s8.h" +#endif + +#if _DEMO_S8P_EN + #include "s8p_demo.h" + #include "app_tp_for_custom_s8p.h" +#endif + +#endif + diff --git a/src/board/board.c b/src/board/board.c new file mode 100644 index 0000000..aea5ad9 --- /dev/null +++ b/src/board/board.c @@ -0,0 +1,26 @@ +/******************************************************************************* +* Copyright (C) 2019-2022, ISP Systems (R),All Rights Reserved. +* +* File: board.c +* Description 板级文件 +* Version V0.1 +* Date 2020-12-07 +* Author linyw +*******************************************************************************/ +#include "board.h" +#include "hal_system.h" +#include "ArmCM0.h" + +void board_Init(void) +{ + hal_system_init(SYSTEM_CLOCK); + hal_system_enable_systick(1); +#if !EDA_MODE + hal_system_init_console(115200); +#endif +#if defined(ISP_568) || defined(ISP_368) + /* 从EFUSE读取DPHY校准值并设置 */ + hal_system_set_phy_calibration(true); +#endif +} + diff --git a/src/board/board.h b/src/board/board.h new file mode 100644 index 0000000..b450fd3 --- /dev/null +++ b/src/board/board.h @@ -0,0 +1,16 @@ +/******************************************************************************* +* Copyright (C) 2019-2022, CVA Systems (R),All Rights Reserved. +* +* File: board.h +* Description: baord 初始化头文件 +* Version: V0.1 +* Date: 2020-01-08 +* Author: lzy + *******************************************************************************/ + +#ifndef __BOARD_H__ +#define __BOARD_H__ + +void board_Init(void); + +#endif diff --git a/src/board/startup/startup_ARMCM0.s b/src/board/startup/startup_ARMCM0.s new file mode 100644 index 0000000..4a17757 --- /dev/null +++ b/src/board/startup/startup_ARMCM0.s @@ -0,0 +1,226 @@ +;/**************************************************************************//** +; * @file startup_ARMCM0.s +; * @brief CMSIS Core Device Startup File for +; * ARMCM0 Device +; * @version V5.4.0 +; * @date 12. December 2018 +; ******************************************************************************/ +;/* +; * Copyright (c) 2009-2018 Arm Limited. All rights reserved. +; * +; * SPDX-License-Identifier: Apache-2.0 +; * +; * Licensed under the Apache License, Version 2.0 (the License); you may +; * not use this file except in compliance with the License. +; * You may obtain a copy of the License at +; * +; * www.apache.org/licenses/LICENSE-2.0 +; * +; * Unless required by applicable law or agreed to in writing, software +; * distributed under the License is distributed on an AS IS BASIS, WITHOUT +; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +; * See the License for the specific language governing permissions and +; * limitations under the License. +; */ + +;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ + + +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00001000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +__stack_limit +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000C00 + + IF Heap_Size != 0 ; Heap is provided + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + ENDIF + + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; -14 NMI Handler + DCD HardFault_Handler ; -13 Hard Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; -5 SVCall Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD PendSV_Handler ; -2 PendSV Handler + DCD SysTick_Handler ; -1 SysTick Handler + + + ; Interrupts + DCD VIDC_IRQn_Handler ; 0 Interrupt 0 + DCD LCDC_IRQn_Handler ; 1 Interrupt 1 + DCD MIPI_RX_IRQn_Handler ; 2 Interrupt 2 + DCD MIPI_TX_IRQn_Handler ; 3 Interrupt 3 + DCD MEMC_IRQn_Handler ; 4 Interrupt 4 + DCD VPRE_IRQn_Handler ; 5 Interrupt 5 + DCD FLSCTRL_IRQn_Handler ; 6 Interrupt 6 + DCD DMA_IRQn_Handler ; 7 Interrupt 7 + DCD TIMER0_IRQn_Handler ; 8 Interrupt 8 + DCD TIMER1_IRQn_Handler ; 9 Interrupt 9 + DCD TIMER2_IRQn_Handler ; 10 Interrupt 10 + DCD TIMER3_IRQn_Handler ; 11 Interrupt 11 + DCD WDG_IRQn_Handler ; 12 Interrupt 12 + DCD UART_IRQn_Handler ; 13 Interrupt 13 + DCD I2C0_IRQn_Handler ; 14 Interrupt 14 + DCD I2C1_IRQn_Handler ; 15 Interrupt 15 + DCD SPIS_IRQn_Handler ; 16 Interrupt 16 + DCD SPIM_IRQn_Handler ; 17 Interrupt 17 + DCD ADC_IRQn_Handler ; 18 Interrupt 18 + DCD PWMDET_IRQn_Handler ; 19 Interrupt 19 + DCD OTP_IRQn_Handler ; 20 Interrupt 20 + DCD SWIRE_IRQn_Handler ; 21 Interrupt 21 + DCD PVD_IRQn_Handler ; 22 Interrupt 22 + DCD AP_NRESET_IRQn_Handler ; 23 Interrupt 23 + DCD EXTI_INT0_IRQn_Handler ; 24 Interrupt 24 + DCD EXTI_INT1_IRQn_Handler ; 25 Interrupt 25 + DCD EXTI_INT2_IRQn_Handler ; 26 Interrupt 26 + DCD EXTI_INT3_IRQn_Handler ; 27 Interrupt 27 + DCD EXTI_INT4_IRQn_Handler ; 28 Interrupt 28 + DCD EXTI_INT5_IRQn_Handler ; 29 Interrupt 29 + DCD EXTI_INT6_IRQn_Handler ; 30 Interrupt 30 + DCD EXTI_INT7_IRQn_Handler ; 31 Interrupt 31 + + SPACE ( 0 * 4) ; Interrupts 10 .. 31 are left out + +__Vectors_End +__Vectors_Size EQU __Vectors_End - __Vectors +_NVIC_ICER0 EQU 0xE000E180 ;清中断使能寄存器地址 +_NVIC_ICPR0 EQU 0xE000E280 ;清中断pending寄存器地址 + + AREA |.text|, CODE, READONLY + +; Reset Handler + +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT __main + +;清中断使能和pending ——开始—— + CPSID I ; 屏蔽中断 + LDR R0, =_NVIC_ICER0 + LDR R1, =_NVIC_ICPR0 + LDR R2, =0xFFFFFFFF + MOVS R3, #1 ; 设置循环次数 M0只有1组(32个)中断，故只需要循环1次 +_irq_clear + ;CBZ R3, _irq_clear_end + CMP R3,#0 ; 循环次数等于0，跳转到_irq_clear_end + BEQ _irq_clear_end + STR R2, [R0] ;,#4 ; NVIC_ICER0 - 清 enable IRQ 寄存器 + STR R2, [R1] ;,#4 ; NVIC_ICPR0 - 清 pending IRQ 寄存器 + SUBS R3, #1 ; 循环数自减1 + B _irq_clear +_irq_clear_end +;清中断使能和pending ——结束—— + CPSIE I ; 开启中断 + LDR R0, =__main + BX R0 + ENDP + + +; Macro to define default exception/interrupt handlers. +; Default handler are weak symbols with an endless loop. +; They can be overwritten by real handlers. + MACRO + Set_Default_Handler $Handler_Name +$Handler_Name PROC + EXPORT $Handler_Name [WEAK] + B . + ENDP + MEND + + +; Default exception/interrupt handler + + Set_Default_Handler NMI_Handler + Set_Default_Handler HardFault_Handler + Set_Default_Handler SVC_Handler + Set_Default_Handler PendSV_Handler + Set_Default_Handler SysTick_Handler + + Set_Default_Handler VIDC_IRQn_Handler + Set_Default_Handler LCDC_IRQn_Handler + Set_Default_Handler MIPI_RX_IRQn_Handler + Set_Default_Handler MIPI_TX_IRQn_Handler + Set_Default_Handler MEMC_IRQn_Handler + Set_Default_Handler VPRE_IRQn_Handler + Set_Default_Handler FLSCTRL_IRQn_Handler + Set_Default_Handler DMA_IRQn_Handler + Set_Default_Handler TIMER0_IRQn_Handler + Set_Default_Handler TIMER1_IRQn_Handler + + Set_Default_Handler TIMER2_IRQn_Handler + Set_Default_Handler TIMER3_IRQn_Handler + Set_Default_Handler WDG_IRQn_Handler + Set_Default_Handler UART_IRQn_Handler + Set_Default_Handler I2C0_IRQn_Handler + Set_Default_Handler I2C1_IRQn_Handler + Set_Default_Handler SPIS_IRQn_Handler + Set_Default_Handler SPIM_IRQn_Handler + Set_Default_Handler ADC_IRQn_Handler + Set_Default_Handler PWMDET_IRQn_Handler + + Set_Default_Handler OTP_IRQn_Handler + Set_Default_Handler SWIRE_IRQn_Handler + Set_Default_Handler PVD_IRQn_Handler + Set_Default_Handler AP_NRESET_IRQn_Handler + Set_Default_Handler EXTI_INT0_IRQn_Handler + Set_Default_Handler EXTI_INT1_IRQn_Handler + Set_Default_Handler EXTI_INT2_IRQn_Handler + Set_Default_Handler EXTI_INT3_IRQn_Handler + Set_Default_Handler EXTI_INT4_IRQn_Handler + Set_Default_Handler EXTI_INT5_IRQn_Handler + + Set_Default_Handler EXTI_INT6_IRQn_Handler + Set_Default_Handler EXTI_INT7_IRQn_Handler + ALIGN + + +; User setup Stack & Heap + + IF :LNOT::DEF:__MICROLIB + IMPORT __use_two_region_memory + ENDIF + + EXPORT __stack_limit + EXPORT __initial_sp + IF Heap_Size != 0 ; Heap is provided + EXPORT __heap_base + EXPORT __heap_limit + ENDIF + + END diff --git a/src/common/tau_common.h b/src/common/tau_common.h new file mode 100644 index 0000000..575a466 --- /dev/null +++ b/src/common/tau_common.h @@ -0,0 +1,216 @@ +/******************************************************************************* +* +* +* File: tau_common.h +* Description ͨضͷļ +* Version V0.1 +* Date 2020-09-07 +* Author lzy + *******************************************************************************/ + +#ifndef __TAU_COMMON_H +#define __TAU_COMMON_H + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "stdint.h" +#include "math.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +/** + * \name ͨó + * @{ + */ +//#define ENABLE 1 +//#define DISABLE 0 + +#define ON 1 +#define OFF 0 + +#define NONE 0 +#define EOS '\0' + +/* +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif +*/ + +#ifndef __cplusplus + #define true 1 + #define false 0 + #define bool _Bool +#endif /* ifndef __cplusplus */ + +#ifndef NULL + #define NULL ((void *)0) +#endif + +#define TAU_LITTLE_ENDIAN 1234 /**< \brief Сģʽ */ +#define TAU_BIG_ENDIAN 3412 /**< \brief ģʽ */ + +/** @} */ + +/******************************************************************************/ + +/** + * \name ú궨 + * @{ + */ + +#ifdef __cplusplus + #define __I volatile /*!< Defines 'read only' permissions */ +#else + #define __I volatile const /*!< Defines 'read only' permissions */ +#endif +#define __O volatile /*!< Defines 'write only' permissions */ +#define __IO volatile /*!< Defines 'read / write' permissions */ + +#define TAU_INLINE inline +#define TAU_STATIC_INLINE static inline +#define TAU_STATIC static +#define TAU_CONST const +#define TAU_EXTERN extern + +#define MIN(x, y) (((x) < (y)) ? (x) : (y)) +#define MAX(x, y) (((x) > (y)) ? (x) : (y)) + +/** + * \brief ṹԱƫ + * \attention ͬƽ̨ϣڳԱСڴԭ + * ͬһṹԱƫƿDzһ + * + * \par ʾ + * \code + * struct my_struct { + * int m1; + * char m2; + * }; + * int offset_m2; + * + * offset_m2 = TAU_OFFSET(struct my_struct, m2); + * \endcode + */ +#define TAU_OFFSET(structure, member) ((uint32_t)(&(((structure *)0)->member))) + +/** @} */ + +/** + * \brief ͨṹԱָȡýṹԱĽṹ + * + * \param ptr ָṹԱָ + * \param type ṹ + * \param member ṹиóԱ + * + * \par ʾ + * \code + * struct my_struct = { + * int m1; + * char m2; + * }; + * struct my_struct my_st; + * char *p_m2 = &my_st.m2; + * struct my_struct *p_st = TAU_CONTAINER_OF(p_m2, struct my_struct, m2); + * \endcode + */ +#define TAU_CONTAINER_OF(ptr, type, member) \ + ((type *)((char *)(ptr)-TAU_OFFSET(type, member))) + +/** + * \brief ṹԱĴС + * + * \code + * struct a = { + * uint32_t m1; + * uint32_t m2; + * }; + * int size_m2; + * + * size_m2 = TAU_MEMBER_SIZE(a, m2); //size_m2 = 4 + * \endcode + */ +#define TAU_MEMBER_SIZE(structure, member) (sizeof(((structure *)0)->member)) + +/** + * \brief Ԫظ + * + * \code + * int a[] = {0, 1, 2, 3}; + * int element_a = TAU_NELEMENTS(a); // element_a = 4 + * \endcode + */ +#define TAU_NELEMENTS(array) (sizeof(array) / sizeof((array)[0])) + +/** + * \brief + * + * \param x + * \param align + * + * \code + * int size = TAU_ROUND_UP(15, 4); // size = 16 + * \endcode + */ +#define TAU_ROUND_UP(x, align) (((int)(x)/(align))*(align) + (((int)(x)%(align)) ? (align) : 0)) + +/** + * \brief + * + * \param x + * \param align + * + * \code + * int size = TAU_ROUND_DOWN(15, 4); // size = 12 + * \endcode + */ +#define TAU_ROUND_DOWN(x, align) (((int)(x)/(align))*(align)) + +/** \brief */ +#define TAU_DIV_ROUND_UP(n, d) (((n) + (d)-1) / (d)) + +/** + * \brief Ƿ + * + * \param x + * \param align أΪ2ij˷ + * + * \code + * if (TAU_ALIGNED(x, 4) { + * ; // x + * } else { + * ; // x + * } + * \endcode + */ +#define TAU_ALIGNED(x, align) (((int)(x) & (align - 1)) == 0) + +/** \brief 1ֽBCDתΪ16 */ +#define TAU_BCD_TO_HEX(val) (((val)&0x0f) + ((val) >> 4) * 10) + +/** \brief 1ֽ16תΪBCD */ +#define TAU_HEX_TO_BCD(val) ((((val) / 10) << 4) + (val) % 10) + +/** + * \brief ȡ + */ +#define TAU_CEIL(val) ceil(val) + + +/*! @brief Construct the version number for drivers. */ +#define MAKE_VERSION(major, minor, bugfix) (((major) << 16) | ((minor) << 8) | (bugfix)) + + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/* \brief ͨûصָ붨 */ +typedef void (*fcb_type)(void *data); + +#endif /* __TAU_COMMON_H */ diff --git a/src/common/tau_delay.h b/src/common/tau_delay.h new file mode 100644 index 0000000..aa3a2bf --- /dev/null +++ b/src/common/tau_delay.h @@ -0,0 +1,34 @@ +/** + * File Name: tau_delay.h + * + * + * + * Author: Fortsense 3D Firmware Team + * + * Date: 2020/12/04 + * + * Project: Taurus + * + * Description: + * + * HISTORY: +**/ +#ifndef _DELAY_H_ +#define _DELAY_H_ +#include "stdint.h" + +/** +* @brief delay ms ,2% +* @param ms:delayʱ +* @retval none +*/ +void delayMs(uint32_t ms); + +/** +* @brief delay us ,2% +* @param us:delayʱ +* @retval none +*/ +void delayUs(uint32_t us); + +#endif diff --git a/src/common/tau_device_datatype.h b/src/common/tau_device_datatype.h new file mode 100644 index 0000000..c121f0c --- /dev/null +++ b/src/common/tau_device_datatype.h @@ -0,0 +1,167 @@ +/******************************************************************************* + * + * + * File: tau_device_datatype.h + * Description device datatype + * Version V0.1 + * Date 2020-12-04 + * Author kevin + *******************************************************************************/ + +#ifndef _TAU_DEVICE_DATATYPE_H_ +#define _TAU_DEVICE_DATATYPE_H_ + + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ + +#include "stdint.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief ״̬ */ +#define MAKE_STATUS(group, code) ((((group)*100) + (code))) + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief ״ֵ̬ */ +enum _status_groups +{ + STATUS_GROUP_GENERIC = 0, + STATUS_GROUP_I2C = 1, + STATUS_GROUP_UART = 2, + STATUS_GROUP_SPI = 3, + kStatusGroup_Timer = 4, +}; + +/*! @brief ״̬ */ +enum _generic_status +{ + STATUS_SUCCESS = MAKE_STATUS(STATUS_GROUP_GENERIC, 0), + STATUS_FAIL = MAKE_STATUS(STATUS_GROUP_GENERIC, 1), + STATUS_READ_ONLY = MAKE_STATUS(STATUS_GROUP_GENERIC, 2), + STATUS_OUT_OF_RANGE = MAKE_STATUS(STATUS_GROUP_GENERIC, 3), + STATUS_INVALID_ARGUMENT = MAKE_STATUS(STATUS_GROUP_GENERIC, 4), + STATUS_TIME_OUT = MAKE_STATUS(STATUS_GROUP_GENERIC, 5), + STATUS_NO_TRANSFER_IN_PROGRESS = MAKE_STATUS(STATUS_GROUP_GENERIC, 6), +}; + +/*! + * @brief timer״̬ + */ +typedef enum +{ + TIMER_STATUS_IDLE = MAKE_STATUS(kStatusGroup_Timer, 0), /*!< */ + TIMER_STATUS_RUNNING = MAKE_STATUS(kStatusGroup_Timer, 1), /*!< */ + TIMER_STATUS_TIMEOUT = MAKE_STATUS(kStatusGroup_Timer, 2), /*!< ʱ */ +} timer_status_e; + +/*! + * @brief system¼(ж/λ)ģʽ + */ +typedef enum +{ + DETECT_HIGH_LVL = 0, + DETECT_LOW_LVL, + DETECT_RISING_EDGE, + DETECT_FALLING_EDGE +} sys_cfg_trigger_e; + +/** +* @brief GPIO interrupt type +*/ +typedef enum +{ + TIMER_NUM0 = 0, + TIMER_NUM1, + TIMER_NUM2, + TIMER_NUM3, + TIMER_NUM_MAX +} timer_num_e; + +/** +* @brief GPIO interrupt type +*/ +typedef enum +{ + GPIO_INT_EXTI_INT0 = 0, + GPIO_INT_EXTI_INT1, + GPIO_INT_EXTI_INT2, + GPIO_INT_EXTI_INT3, + GPIO_INT_EXTI_INT4, + GPIO_INT_EXTI_INT5, + GPIO_INT_EXTI_INT6, + GPIO_INT_EXTI_INT7, + GPIO_INT_MAX +} gpio_int_e; + +/*! @brief PWMIж */ +typedef enum _pwm_int_type +{ + PWM_INT_HIGH_OVERFLOW = 0, + PWM_INT_LOW_OVERFLOW, + PWM_INT_TOTAL_OVERFLOW, + PWM_INT_HIGH_DONE, + PWM_INT_LOW_DONE, + PWM_INT_TOTAL_DONE, + PWM_INT_MAX +} pwm_int_type_e; + +/** +* @brief I2C chose +*/ +typedef enum +{ + I2C_SELECT_0 = 0, //slave + I2C_SELECT_1, //master +} i2c_select_e; + +/*! + * @brief ٶ + * @note + */ +typedef enum _i2c_rate +{ + I2C_RATE_STANDARD = 1, //100kHz + I2C_RATE_FAST, //400kHz + I2C_RATE_HIGH, //1MHz +} i2c_rate_e; + +/*! @brief DMA channel type */ +typedef enum +{ + DMA_CH0 = 0, /*!< SPIM */ + DMA_CH1 = 1, /*!< IIC0 */ + DMA_CH2 = 2, /*!< SPIS */ + DMA_CH3 = 3, /*!< IIC1 */ + DMA_CH4 = 4, /*!< SPI FLASH */ + DMA_CH5 = 5, /*!< UART */ +} dma_channel_e; + + +/*! @brief Type used for all status and error return values. */ + +typedef enum +{ + DISABLE = 0, + ENABLE = !DISABLE +} function_state_e; +/*!< @brief ڷ״̬ʹ */ +typedef int32_t status_t; + + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +#endif + diff --git a/src/common/tau_dsi_datatype.h b/src/common/tau_dsi_datatype.h new file mode 100644 index 0000000..c25630c --- /dev/null +++ b/src/common/tau_dsi_datatype.h @@ -0,0 +1,374 @@ +/******************************************************************************* +* +* +* File: tau_dsi_datatype.h +* Description: mipi dsi ͨͷļ +* Version: V0.1 +* Date: 2021-01-13 +* Author: lzy + *******************************************************************************/ + +#ifndef __MIPI_DSI_COMMON_H__ +#define __MIPI_DSI_COMMON_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#define DSC_PPS_SIZE 128 + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/** +* @brief Data Types for Peripheral-sourced Packets,From Mipi DSI Spec +*/ +typedef enum +{ + DSI_ACK_DT_ERROR = 0x02, + DSI_ACK_DT_EOTP = 0x08, + DSI_ACK_DT_GEN_SHORT_RESPONSE_1B = 0x11, + DSI_ACK_DT_GEN_SHORT_RESPONSE_2B = 0x12, + DSI_ACK_DT_GEN_LONG_RESPONSE = 0x1A, + DSI_ACK_DT_DSC_LONG_RESPONSE = 0x1C, + DSI_ACK_DT_DSC_SHORT_RESPONSE_1B = 0x21, + DSI_ACK_DT_DSC_SHORT_RESPONSE_2B = 0x22, + DSI_ACK_DT_MAX +} dsi_ack_data_type_e; + +/** +* @brief Software handle data types +*/ +typedef enum +{ + DSI_RECV_DT_PPS = 0x0A, //Picture Parameter Set + DSI_RECV_DT_GEN_WRITE_1B = 0x13, //Generic Short WRITE, 1 parameter + DSI_RECV_DT_GEN_WRITE_2B = 0x23, //Generic Short WRITE, 2 parameters + DSI_RECV_DT_GEN_READ_0B = 0x04, //Generic READ, no parameters + DSI_RECV_DT_GEN_READ_1B = 0x14, //Generic READ, 1 parameter + DSI_RECV_DT_GEN_READ_2B = 0x24, //Generic READ, 2 parameters + DSI_RECV_DT_DCS_WRITE_0B = 0x05, //DCS Short WRITE, no parameters + DSI_RECV_DT_DCS_WRITE_1B = 0x15, //DCS Short WRITE, 1 parameter + DSI_RECV_DT_DCS_READ_0B = 0x06, //DCS READ, no parameters + DSI_RECV_DT_GEN_WRITE_LONG = 0x29, //Generic Long Write + DSI_RECV_DT_DCS_WRITE_LONG = 0x39, //DCS Long Write/write_LUT Command Packet + DSI_RECV_DT_MAX +} dsi_data_type_e; + +typedef enum +{ + DCS_ENTER_IDLE_MODE = 0x39, + DCS_ENTER_INVERT_MODE = 0x21, + DCS_ENTER_NORMAL_MODE = 0x13, + DCS_ENTER_PARTIAL_MODE = 0x12, + DCS_ENTER_SLEEP_MODE = 0x10, + DCS_EXIT_IDLE_MODE = 0x38, + DCS_EXIT_INVERT_MODE = 0x20, + DCS_EXIT_SLEEP_MODE = 0x11, + DCS_GET_3D_CONTROL = 0x3F, + DCS_GET_ADDRESS_MODE = 0x0B, + DCS_GET_BLUE_CHANNEL = 0x08, + DCS_GET_COMPRESSION_MODE = 0x03, + DCS_GET_DIAGNOSTIC_RESULT = 0x0F, + DCS_GET_DISPLAY_MODE = 0x0D, + DCS_GET_GREEN_CHANNEL = 0x07, + DCS_GET_PIXEL_FORMAT = 0x0C, + DCS_GET_POWER_MODE = 0x0A, + DCS_GET_RED_CHANNEL = 0x06, + DCS_GET_SCANLINE = 0x45, + DCS_GET_SIGNAL_MODE = 0x0E, + DCS_NOP = 0x00, + DCS_READ_DDB_CONTINUE = 0xA8, + DCS_READ_DDB_START = 0xA1, + DCS_READ_MEMORY_CONTINUE = 0x3E, + DCS_READ_MEMORY_START = 0x2E, + DCS_SET_3D_CONTROL = 0x3D, + DCS_SET_ADDRESS_MODE = 0x36, + DCS_SET_COLUMN_ADDRESS = 0x2A, + DCS_SET_DISPLAY_OFF = 0x28, + DCS_SET_DISPLAY_ON = 0x29, + DCS_SET_GAMMA_CURVE = 0x26, + DCS_SET_PAGE_ADDRESS = 0x2B, + DCS_SET_PARTIAL_COLUMNS = 0x31, + DCS_SET_PARTIAL_ROWS = 0x30, + DCS_SET_PIXEL_FORMAT = 0x3A, + DCS_SET_SCROLL_AREA = 0x33, + DCS_SET_SCROLL_START = 0x37, + DCS_SET_TEAR_OFF = 0x34, + DCS_SET_TEAR_ON = 0x35, + DCS_SET_TEAR_SCANLINE = 0x44, + DCS_SET_VSYNC_TIMING = 0x40, + DCS_SOFT_RESET = 0x01, + DCS_WRITE_LUT = 0x2D, + DCS_WRITE_MEMORY_CONTINUE = 0x3C, + DCS_WRITE_MEMORY_START = 0x2C +} dsi_dcs_cmd_type_e; + +/** +* @brief video data transfer mode +*/ +typedef enum +{ + DSI_DATA_VIDEO_MODE = 0, + DSI_DATA_CMD_MODE = 1, + DSI_DATA_MODE_MAX +} dsi_video_data_mode_e; + +/** +* @brief dsi virtual channel +*/ +typedef enum +{ + DSI_VC_0 = 0, + DSI_VC_1 = 1, + DSI_VC_2 = 2, + DSI_VC_3 = 3, + DSI_VC_MAX +} dsi_virtual_channel_e; + +/** +* @brief video data mode +*/ +typedef enum +{ + DSI_FRAME_RATE_60HZ = 0, + DSI_FRAME_RATE_90HZ = 1, + DSI_FRAME_RATE_120HZ = 2, + DSI_FRAME_RATE_144HZ = 3, + DSI_FRAME_RATE_160HZ = 4, + DSI_FRAME_RATE_MAX +} dsi_video_frame_rate_e; + +/** +* @brief dsi rx color coding +*/ +typedef enum +{ + DSI_RGB565 = 1, + DSI_RGB666 = 2, /*!< 18 bbp(18bits per pixel) */ + DSI_RGB666_LOOSELY = 3, /*!< 24 bbp(24bits per pixel) */ + DSI_RGB888 = 4, /*!< 24 bbp(24bits per pixel) */ + DSI_RGB10_10_10 = 5, + DSI_RGB12_12_12 = 6, + DSI_YCbCr422_16 = 7, + DSI_PENTILE_16 = DSI_YCbCr422_16, + DSI_YCbCr422_20_LOOSELY = 8, + DSI_YCbCr422_24 = 9, + DSI_YCbCr420_12 = 10, + DSI_COLOR_CODE_MAX +} dsi_color_code_e; + +/** +* @brief dpi endianness type +*/ +typedef enum +{ + DPI_ENDIAN_RGB = 0, + DPI_ENDIAN_BGR +} dpi_endianness_type_e; + +/** +* @brief dpi polarity type +*/ +typedef enum +{ + DPI_SIG_ACTIVE_HIGH = 0, + DPI_SIG_ACTIVE_LOW = 1 +} dpi_polarity_e; + +/** +* @brief mipi lane number +*/ +typedef enum +{ + DSI_LANE_1 = 1, + DSI_LANE_2 = 2, + DSI_LANE_3 = 3, + DSI_LANE_4 = 4, + DSI_LANE_NUME_MAX +} dsi_lane_nume_e; + +/** +* @brief video mode +*/ +typedef enum +{ + DSI_NONBURST_PULSE = 0, + DSI_NONBURST_EVENT = 1, + DSI_BURST_MODE = 2, + DSI_VIDEO_MODE_MAX +} dsi_video_mode_type_e; + +/** +* @brief panel init cmd transfer type +*/ +typedef enum +{ + DSI_CMD_TX_HS = 0, + DSI_CMD_TX_LP = 1 +} dsi_tx_cmd_tx_type_e; + +/** +* @brief dpi tx vpg style +*/ +typedef enum +{ + TX_VPG_V_COLOR = 0, + TX_VPG_H_COLOR = 1, + TX_VPG_V_BER = 2, + TX_VPG_FLICKER = 3, + TX_VPG_CHESSBOARD = 4, + TX_VPG_MAX +} dsi_tx_vpg_style_e; + +#if defined(ISP_568) || defined(ISP_368) +/** +* @brief angle of rotation +*/ +typedef enum +{ + VIDOE_ROT_ANGLE_0 = 0, /* ת */ + VIDOE_ROT_ANGLE_90 = 1, /* ת90 */ + VIDOE_ROT_ANGLE_180 = 2, /* ת180 */ + VIDOE_ROT_ANGLE_270 = 3, /* תת270 */ + VIDOE_ROT_ANGLE_MAX +} video_rotate_angle_e; + +/** +* @brief mipi rx lane swap +*/ +typedef enum +{ + RX_LANE_ORDER_DEFAULT = 0x0, + RX_LANE_ORDER_3012 = RX_LANE_ORDER_DEFAULT, + RX_LANE_ORDER_3210 = 0x1, + RX_LANE_ORDER_MAX +} dsi_rx_lane_swap_e; + +/** +* @brief LTPO mode +*/ +typedef enum +{ + LTPO_MODE_NONE = 0, + LTPO_MODE_1 = 1, + LTPO_MODE_2 = 2, + LTPO_MODE_MAX +} ltpo_mode_e; + +/** +* @brief transform Ϣ +*/ +typedef struct +{ + ltpo_mode_e ltpo; /* ltpo ģʽ */ + bool mirror_en; /* video ˮƽ־λ */ + video_rotate_angle_e rot_angle; /* video תĽǶ */ + dsi_video_data_mode_e dst_mode; /* mipi tx video ݴģʽ(video/cmd mode) */ + dsi_rx_lane_swap_e rx_lane_swap; /* rx lane swap */ +} dsi_base_extra_info_t; +#endif + +/** +* @brief mipi P/N lane swap flag +* eg: pn_swap = RX_LANE_0_PN_SWAP | RX_LANE_CLK_PN_SWAP; +* ʾ lane0 CLK PNlane +*/ +typedef enum +{ + RX_LANE_0_PN_SWAP = 0x1, + RX_LANE_1_PN_SWAP = 0x2, + RX_LANE_2_PN_SWAP = 0x4, + RX_LANE_3_PN_SWAP = 0x8, + RX_LANE_CLK_PN_SWAP = 0x10 +} dsi_rx_lane_pn_swap_e; + +/** +* @brief error processing level +*/ +typedef enum +{ + ERR_HANDLE_NONE = 0, + ERR_HANDLE_L1 = 1, + ERR_HANDLE_L2 = 2, + ERR_HANDLE_L3 = 3, + ERR_HANDLE_MAX +} hal_err_handle_level_e; + +/** +* @brief transform Ϣ +*/ +typedef struct +{ + uint32_t src_w; /* mipi rx յ width */ + uint32_t src_h; /* mipi rx յ height */ + uint32_t dst_w; /* mipi tx ͵ width */ + uint32_t dst_h; /* mipi tx ͵ height */ + dsi_video_frame_rate_e src_frate; /* mipi rx յframe rate */ + dsi_video_data_mode_e src_mode; /* mipi rx video ݴģʽ(video/cmd mode) */ + uint16_t pn_swap; /* mipi rx P/N swap־λ */ +#if defined(ISP_568) || defined(ISP_368) + dsi_base_extra_info_t extra_info; /* ISP_568/ISP_368 */ +#endif +} dsi_base_trans_info_t; + +/** +* @brief ccmϵ +*/ +typedef struct +{ + uint32_t coef_c00; + uint32_t coef_c01; + uint32_t coef_c02; + uint32_t coef_c10; + uint32_t coef_c11; + uint32_t coef_c12; + uint32_t coef_c20; + uint32_t coef_c21; + uint32_t coef_c22; +} ccm_coef_t; + +/** +* @brief video mode display timing +*/ +typedef struct +{ + uint32_t vsa; + uint32_t vbp; + uint32_t vact; + uint32_t vfp; + uint32_t hsa; + uint32_t hbp; + uint32_t hact; + uint32_t hfp; +} vid_disp_timing_t; + +/** +* @brief dpi +*/ +typedef struct +{ + dpi_polarity_e vsync_active_level; //vsync + dpi_polarity_e hsync_active_level; //hsync + dpi_polarity_e dataen_active_level; //dataen + dpi_polarity_e shutdown_active_level; //shutdown + dpi_polarity_e colorm_active_level; //colorm +} dpi_polarity_t; + +/** +* @brief hight performan mode level +*/ +typedef enum +{ + HIGHT_PERFORMAN_NONE = 0, + HIGHT_PERFORMAN_L1 = 1, + HIGHT_PERFORMAN_L2 = 2, + HIGHT_PERFORMAN_MAX +} hight_performan_mode_e; + + +#endif //__MIPI_DSI_COMMON_H__ diff --git a/src/common/tau_log.h b/src/common/tau_log.h new file mode 100644 index 0000000..669976b --- /dev/null +++ b/src/common/tau_log.h @@ -0,0 +1,108 @@ +/******************************************************************************* +* +* +* File: tau_log.h +* Description log file +* Version V0.1 +* Date 2020-12-08 +* Author linyw +*******************************************************************************/ +#ifndef _TAU_LOG_H_ +#define _TAU_LOG_H_ + + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include +#include +#include +#include "ArmCM0.h" +#if LOG_MODE_RTT + #include "SEGGER_RTT.h" +#endif +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +#ifdef LOG_TAG + #undef LOG_TAG +#endif +#define LOG_TAG "tau_log" +#define LOG_CURREN_LEVEL kLOG_LEVEL_DBG /* ôӡȼ TODO:ÿģôӡȼ */ + +/* + * Using the following three macros for conveniently logging. + */ +#if EDA_MODE +#define TAU_LOGD(format,...) +#define TAU_LOGI(format,...) +#define TAU_LOGE(format,...) +#else +#if LOG_MODE_RTT +#define TAU_LOGD(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_DBG) { \ + SEGGER_RTT_printf(0,"[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + + +#define TAU_LOGI(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_INF) { \ + SEGGER_RTT_printf(0,"[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + +#define TAU_LOGE(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_ERR) { \ + SEGGER_RTT_printf(0,"error [%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) +#else +#define TAU_LOGD(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_DBG) { \ + LOG_printf("[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + + +#define TAU_LOGI(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_INF) { \ + LOG_printf("[%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) + +#define TAU_LOGE(format,...) \ + do { \ + if (LOG_CURREN_LEVEL <= kLOG_LEVEL_ERR) { \ + LOG_printf("error [%s] (%04d) " format, LOG_TAG, __LINE__, ##__VA_ARGS__); \ + }; \ + } while (0) +#endif +#endif +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef enum +{ + kLOG_LEVEL_DBG = 0, + kLOG_LEVEL_INF, + kLOG_LEVEL_ERR, + kLOG_LEVEL_NONE /* ӡκβ */ +} log_level_t; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +void LOG_printf(const char *fmt, ...); + +#endif diff --git a/src/common/tau_operations.h b/src/common/tau_operations.h new file mode 100644 index 0000000..35862b3 --- /dev/null +++ b/src/common/tau_operations.h @@ -0,0 +1,229 @@ +/******************************************************************************* +* +* +* File: tau_operations.h +* Description λֽڲضͷļ +* Version V0.1 +* Date 2020-09-07 +* Author lzy + *******************************************************************************/ +#ifndef __TAU_BYTEOPS_H +#define __TAU_BYTEOPS_H + +/** + * \name ͨλ + * @{ + */ + +/** \brief λ */ +#ifndef TAU_BITS_PER_LONG + #define TAU_BITS_PER_LONG 32 +#endif + +/** \brief ֽλ */ +#define TAU_BITS_PER_BYTE 8 + +/** @} */ + + +/******************************************************************************/ + +/** + * \name ͨλ + * @{ + */ + +/** \brief bitλ + * TAU_BIT(2) is 0x4 + */ +#define TAU_BIT(bit) (1u << (bit)) + +/** \brief ֵλ + * TAU_SBF(0xFF, 8) is 0xff00 + */ +#define TAU_SBF(value, field) ((value) << (field)) + +/** \brief bitλ + * TAU_BIT_SET(0, 8) is 0x100 + */ +#define TAU_BIT_SET(data, bit) ((data) |= TAU_BIT(bit)) + +/** \brief bit + * TAU_BIT_CLR(0xFF, 2) is 0xfb + */ +#define TAU_BIT_CLR(data, bit) ((data) &= ~TAU_BIT(bit)) + +/** \brief bitλ, mask ָλ + * TAU_BIT_SET_MASK(0xF0F0, 0xF00) is 0xfff0 + */ +#define TAU_BIT_SET_MASK(data, mask) ((data) |= (mask)) + +/** \brief bit, mask ָλ + * TAU_BIT_CLR_MASK(0xFFFF, 0xFF00) is 0xff + */ +#define TAU_BIT_CLR_MASK(data, mask) ((data) &= ~(mask)) + +/** \brief bitת + * TAU_BIT_TOGGLE(0xFFFF, 0) is 0xfffe + * TAU_BIT_TOGGLE(0x0000, 1) is 0x2 + */ +#define TAU_BIT_TOGGLE(data, bit) ((data) ^= TAU_BIT(bit)) + +/** \brief bit޸ + * TAU_BIT_MODIFY(0, 8, 1) is 0x100 + * TAU_BIT_MODIFY(0xFFFF, 1, 0) is 0xfffd + */ +#define TAU_BIT_MODIFY(data, bit, value) \ + ((value) ? TAU_BIT_SET(data, bit) : TAU_BIT_CLR(data, bit)) + +/** \brief bitǷλ + * TAU_BIT_ISSET(0xF0F1, 1) is 0 + * TAU_BIT_ISSET(0xF0F2, 1) is 2 + */ +#define TAU_BIT_ISSET(data, bit) ((data) & TAU_BIT(bit)) + +/** \brief ȡbitֵ + * TAU_BIT_GET(0xF0F1, 1) is 0 + * TAU_BIT_GET(0xF0F2, 1) is 1 + */ +#define TAU_BIT_GET(data, bit) (TAU_BIT_ISSET(data, bit) ? 1 : 0) + +/** \brief bitֵ + * TAU_BIT_CHECK(0xF5FF, 4) is 1 + */ +#define TAU_BIT_CHECK(data, bit) \ + (((data) & TAU_BIT(bit)) ? 1 : 0) + +/** \brief ȡ n bits ֵ + * TAU_BITS_MASK(2) is 0x3 + */ +#define TAU_BITS_MASK(n) (~((~0u) << (n))) + +/** \brief ȡλֵ + * TAU_BITS_GET(0xF5FF, 0x0F00, 8) is 0x5 + */ +#define TAU_BITS_GET(data, mask, pos) \ + (((data) & (mask)) >> (pos)) + +/** \brief ȡλֵ + * TAU_BITS_CHECK(0xF5FF, 0x0F00) is 1 + */ +#define TAU_BITS_CHECK(data, mask) \ + (((data) & (mask)) ? 1 : 0) + +/** \brief ޸λֵ + * TAU_BITS_MODIFY(0xF5FF, 0x0FF0, 0x8A0) is 0xF8AF +*/ +#define TAU_BITS_MODIFY(data, clear_mask, set_mask) \ + (data) = (((data) & (~(clear_mask))) | (set_mask)) + +/** \brief λֵ + * TAU_WRITE_REG32(0x05FF, 0xFFFA) is 0xFFFA +*/ +#define TAU_WRITE_REG32(data, value) ((data) = (value)) + +/** \brief λֵ + * TAU_READ_REG32(0x05FF) is 0x05FF +*/ +#define TAU_READ_REG32(data) (data) + + +/** @} */ + +/******************************************************************************/ + +/** + * \brief ȡ2-byteĸλbyte + * + * \par ʾ + * \code + * uint16_t a = 0x1234; + * uint16_t b; + * + * b = TAU_MSB(a); //b=0x12 + * \endcode + */ +#define TAU_MSB(x) (((x) >> 8) & 0xff) + +/** + * \brief ȡ2-byteĵλbyte + * + * \par ʾ + * \code + * uint16_t a = 0x1234; + * uint16_t b; + * + * b = TAU_LSB(a); //b=0x34 + * \endcode + */ +#define TAU_LSB(x) ((x) & 0xff) + +/** + * \brief ȡ2-wordĸλword + * + * \par ʾ + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_MSW(a); //b=0x1234 + * \endcode + */ +#define TAU_MSW(x) (((x) >> 16) & 0xffff) + +/** + * \brief ȡ2-wordĵλword + * + * \par ʾ + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_LSW(a); //b=0x5678 + * \endcode + */ +#define TAU_LSW(x) ((x) & 0xffff) + +/** + * \brief 32-bitĸλword͵λword + * + * \par ʾ + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_WORDSWAP(a); //b=0x56781234 + * \endcode + */ +#define TAU_WORDSWAP(x) (TAU_MSW(x) | (TAU_LSW(x) << 16)) + +/** + * \brief 32-bitֽ˳ + * + * \par ʾ + * \code + * uint32_t a = 0x12345678; + * uint32_t b; + * + * b = TAU_LONGSWAP(a); //b=0x78563412 + * \endcode + */ +#define TAU_LONGSWAP(x) ((TAU_LLSB(x) << 24) | \ + (TAU_LNLSB(x) << 16) | \ + (TAU_LNMSB(x) << 8) | \ + (TAU_LMSB(x))) + +#define TAU_LLSB(x) ((x) & 0xff) /**< \brief ȡ32bit1ֽ */ +#define TAU_LNLSB(x) (((x) >> 8) & 0xff) /**< \brief ȡ32bit2ֽ */ +#define TAU_LNMSB(x) (((x) >> 16) & 0xff) /**< \brief ȡ32bit3ֽ */ +#define TAU_LMSB(x) (((x) >> 24) & 0xff) /**< \brief ȡ32bit4ֽ */ +#define TAU_LNSB(x,n) (((x) >> ((n) * 8) ) & 0xff) /**< \brief ȡ32bitnֽ , 0 - 3*/ + +/** + * @} + */ + +#endif /* __TAU_BYTEOPS_H */ + +/* end of file */ + diff --git a/src/sdk/CVWL368/lib/CVWL368.lib b/src/sdk/CVWL368/lib/CVWL368.lib new file mode 100644 index 0000000..713a2d3 Binary files /dev/null and b/src/sdk/CVWL368/lib/CVWL368.lib differ diff --git a/src/sdk/CVWL368/lib/WL368_S10LITE_CSOT667_TP.lib b/src/sdk/CVWL368/lib/WL368_S10LITE_CSOT667_TP.lib new file mode 100644 index 0000000..0ef4a43 Binary files /dev/null and b/src/sdk/CVWL368/lib/WL368_S10LITE_CSOT667_TP.lib differ diff --git a/src/sdk/include/M0/ArmCM0.h b/src/sdk/include/M0/ArmCM0.h new file mode 100644 index 0000000..0683670 --- /dev/null +++ b/src/sdk/include/M0/ArmCM0.h @@ -0,0 +1,213 @@ +/**************************************************************************//** + * @file ARMCM0.h + * @brief CMSIS Core Peripheral Access Layer Header File for + * ARMCM0 Device + * @version V5.3.1 + * @date 09. July 2018 + ******************************************************************************/ +/* + * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ARMCM0_H +#define ARMCM0_H + +#ifdef __cplusplus +extern "C" { +#endif + + +/* ------------------------- Interrupt Number Definition ------------------------ */ + +typedef enum IRQn +{ + /* ------------------- Processor Exceptions Numbers ----------------------------- */ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + HardFault_IRQn = -13, /* 3 HardFault Interrupt */ + SVCall_IRQn = -5, /* 11 SV Call Interrupt */ + PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 System Tick Interrupt */ + + /* ------------------- Processor Interrupt Numbers ------------------------------ */ + VIDC_IRQn = 0, + LCDC_IRQn = 1, + MIPI_RX_IRQn = 2, + MIPI_TX_IRQn = 3, + MEMC_IRQn = 4, + VPRE_IRQn = 5, + FLSCTRL_IRQn = 6, + DMA_IRQn = 7, + TIMER0_IRQn = 8, + TIMER1_IRQn = 9, + TIMER2_IRQn = 10, + TIMER3_IRQn = 11, + WDG_IRQn = 12, + UART_IRQn = 13, + I2C0_IRQn = 14, + I2C1_IRQn = 15, + SPIS_IRQn = 16, + SPIM_IRQn = 17, + ADC_IRQn = 18, + PWMDET_IRQn = 19, + OTP_IRQn = 20, + SWIRE_IRQn = 21, + PVD_IRQn = 22, + AP_NRESET_IRQn = 23, + EXTI_INT0_IRQn = 24, + EXTI_INT1_IRQn = 25, + EXTI_INT2_IRQn = 26, + EXTI_INT3_IRQn = 27, + EXTI_INT4_IRQn = 28, + EXTI_INT5_IRQn = 29, + EXTI_INT6_IRQn = 30, + EXTI_INT7_IRQn = 31 + /* Interrupts 10 .. 31 are left out */ +} IRQn_Type; + + + + +/* ================================================================================ */ +/* ================ Processor and Core Peripheral Section ================ */ +/* ================================================================================ */ + +/* ------- Start of section using anonymous unions and disabling warnings ------- */ +#if defined (__CC_ARM) +#pragma push +#pragma anon_unions +#elif defined (__ICCARM__) +#pragma language=extended +#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) +#pragma clang diagnostic push +#pragma clang diagnostic ignored "-Wc11-extensions" +#pragma clang diagnostic ignored "-Wreserved-id-macro" +#elif defined (__GNUC__) +/* anonymous unions are enabled by default */ +#elif defined (__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined (__TASKING__) +#pragma warning 586 +#elif defined (__CSMC__) +/* anonymous unions are enabled by default */ +#else +#warning Not supported compiler type +#endif + +/* -------- Configuration of Core Peripherals ----------------------------------- */ +#define __CM0_REV 0x0000U /* Core revision r0p0 */ +#define __MPU_PRESENT 0U /* no MPU present */ +#define __VTOR_PRESENT 0U /* no VTOR present */ +#define __NVIC_PRIO_BITS 2U /* Number of Bits used for Priority Levels */ //20220228 +#define __Vendor_SysTickConfig 0U /* Set to 1 if different SysTick Config is used */ + +#define __FPU_PRESENT 0U /* Set to 1 if FPU is present */ +#define __FPU_DP 0U /* single precision FPU */ +#define __ICACHE_PRESENT 0U /* Set to 1 if I-CACHE is present */ +#define __DCACHE_PRESENT 0U /* Set to 1 if D-CACHE is present */ +#define __DSP_PRESENT 0U /* no DSP extension present */ + +#define FPGA_MODE 0 +#define EDA_MODE 0 +#define EXTERN_24M 0 +#define CPU_CLK_100M 0 + +#define LOG_MODE_RTT 0 /* 0:UART MODE 1: rtt MODE */ + +#include "core_cm0.h" /* Processor and core peripherals */ +#include "system_ARMCM0.h" /* System Header */ + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (500000000UL) /* Oscillator frequency */ + +#if FPGA_MODE +#define SYSTEM_CLOCK (33300000U) +#else +/* ʹⲿʱ,ϵͳʱֻ100M,ʹⲿʱ,ϵͳʱӿ100M/80M*/ +#if EXTERN_24M +#define SYSTEM_CLOCK (100000000U) +#else +#if CPU_CLK_100M +#define SYSTEM_CLOCK (100000000U) +#else +#define SYSTEM_CLOCK (80000000U) +#endif +#endif +#endif + +/* -------- End of section using anonymous unions and disabling warnings -------- */ +#if defined (__CC_ARM) +#pragma pop +#elif defined (__ICCARM__) +/* leave anonymous unions enabled */ +#elif (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) +#pragma clang diagnostic pop +#elif defined (__GNUC__) +/* anonymous unions are enabled by default */ +#elif defined (__TMS470__) +/* anonymous unions are enabled by default */ +#elif defined (__TASKING__) +#pragma warning restore +#elif defined (__CSMC__) +/* anonymous unions are enabled by default */ +#else +#warning Not supported compiler type +#endif + +/* In HS mode and when the DMA is used, all variables and data structures dealing + with the DMA during the transaction process should be 4-bytes aligned */ +#define DMA_WORD_ALIGN_EN +#ifdef DMA_WORD_ALIGN_EN +#if defined (__GNUC__) /* GNU Compiler */ +#define __ALIGN_END __attribute__ ((aligned (4))) +#define __ALIGN_BEGIN +#else +#define __ALIGN_END +#if defined (__CC_ARM) /* ARM Compiler */ +#define __ALIGN_BEGIN __align(4) +#elif defined (__ICCARM__) /* IAR Compiler */ +#define __ALIGN_BEGIN +#elif defined (__TASKING__) /* TASKING Compiler */ +#define __ALIGN_BEGIN __align(4) +#endif /* __CC_ARM */ +#endif /* __GNUC__ */ +#else + +#define __ALIGN_BEGIN +#define __ALIGN_END + +#define __ALIGN_END_1 __attribute__ ((aligned (1))) +#endif /* DMA_WORD_ALIGN_EN */ + +/* __packed keyword used to decrease the data type alignment to 1-byte */ +#if defined (__CC_ARM) /* ARM Compiler */ +#define __packed __packed +#elif defined (__ICCARM__) /* IAR Compiler */ +#define __packed __packed +#elif defined ( __GNUC__ ) /* GNU Compiler */ +#define __packed __attribute__ ((__packed__)) +#define __weak __attribute__((weak)) +#elif defined (__TASKING__) /* TASKING Compiler */ +#define __packed __unaligned +#endif /* __CC_ARM */ + +#ifdef __cplusplus +} +#endif + +#endif /* ARMCM0_H */ diff --git a/src/sdk/include/hal_dsi_rx_ctrl.h b/src/sdk/include/hal_dsi_rx_ctrl.h new file mode 100644 index 0000000..7786929 --- /dev/null +++ b/src/sdk/include/hal_dsi_rx_ctrl.h @@ -0,0 +1,558 @@ +/******************************************************************************* +* +* +* File: hal_dsi_rx_ctrl.h +* Description: hal mipi dsi rx path control ͷļ +* Version: V0.1 +* Date: 2021-04-06 +* Author: lzy + *******************************************************************************/ +#ifndef __HAL_DSI_RX_CTRL_H__ +#define __HAL_DSI_RX_CTRL_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +#define RX_DCS_QUEUE_MAX_SIZE 20 /* DCS洢г */ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef struct hal_dcs_execute_entry_t hal_dcs_execute_entry_t; + +typedef struct hal_dcs_packet_t hal_dcs_packet_t; + +typedef struct hal_dsi_rx_ctrl_handle_t hal_dsi_rx_ctrl_handle_t; + +/* DCS CMD ص, עcus_dcs_entry_table, ƥӦDCS ص*/ +typedef bool (*hal_dsi_rx_ctrl_dcs_execute)(hal_dsi_rx_ctrl_handle_t *rx_handle, hal_dcs_packet_t *dcs_packet); + +/* AP cmd ص, ҪٻCMD ʱע, ΪNULL ʱDSC ָдָparsecus_dcs_entry_tableص */ +typedef bool (*hal_dsi_rx_ctrl_read_entry)(uint8_t data_type, uint8_t dcs_cmd, uint8_t param); + +/* AP PPS »ص,ΪPPS ԼPPS picture width/height, ڷֱл, עýӿʱڲPPS */ +typedef bool (*hal_dsi_rx_ctrl_pps_entry)(uint8_t *pps, uint8_t size, uint32_t pic_width, uint32_t pic_height); + +/** +* @brief hal_rx_dbg_event_e select +*/ +typedef enum hal_rx_dbg_event_e +{ + HAL_RX_DBG_FS = 0, /* Frame start */ + HAL_RX_DBG_EVENT_MAX +} hal_rx_dbg_event_e; + +/* RX debug ص,ڻȡframe start ȹdebug */ +typedef void (*hal_dsi_rx_ctrl_dbg_entry)(hal_rx_dbg_event_e event); + +/** +* @brief dsi rx ctrl handle struct +*/ +typedef struct hal_dsi_rx_ctrl_handle_t +{ + dsi_base_trans_info_t base_info; /* mipi video תϢ */ + dsi_color_code_e rx_color_mode; /* color mode */ + dsi_lane_nume_e rx_lanes; /* mipi data lane */ + dsi_video_mode_type_e rx_nonburst_models; /* transmission packet sequences */ + dsi_virtual_channel_e rx_vc; /* virtual channel number */ + bool compress_en; /* DSC ѹ־ */ + uint32_t rx_hsclk_rate; /* mipi źlane rate */ + uint8_t rx_dsc_pps[DSC_PPS_SIZE]; /* DSC ѹPPS */ + const hal_dcs_execute_entry_t *cus_dcs_entry_table; /* DCSб */ + hal_dsi_rx_ctrl_read_entry rx_dcs_read_entry; /* Hostָݺ,ΪNULLʱrx_dcs_queueעcmd */ + hal_dsi_rx_ctrl_pps_entry pps_update_entry; /* PPS Update ʱص,ڷֱлPPS,ΪNULLʱڲ */ + bool used; /* handleʹñ־λ */ + uint8_t pq_marginal; /* picture quality,Ϊhal_rx_pq_marginal_type_e */ + bool direct_mode; /* video mode ֱͨģʽ,Ԥ,debugʹ */ + hal_dsi_rx_ctrl_dbg_entry rx_debug_cb; /* rx debug ص,ĿǰΪյframe start֮صԤdebug */ + hal_err_handle_level_e err_handler_level; /* RXմʱģresetȼ, ȼԽresetģԽ */ + bool draw_mode; /* ģʽ,debugʹ */ +#if defined(ISP_568) || defined(ISP_368) + uint8_t rx_strength; /* ڵRXźǿȣڿУ׼ģʽλ0~7Ĭ3 */ + hight_performan_mode_e hight_performan_mode; /* ģʽȼ,οhight_performan_mode_e */ + bool pu_optimize; /* ŻPUʾЧĬΪfalse;true:ŻPUʾʾЧ,߹;false:ͨPUģʽ,͹ */ +#endif + bool video_auto_sync; /* Video mode Զͬ */ +} hal_dsi_rx_ctrl_handle_t; + +/** +* @brief DCS command execute entry +*/ +typedef struct hal_dcs_execute_entry_t +{ + uint32_t dcs_command; /* DCS command */ + hal_dsi_rx_ctrl_dcs_execute execute_func; /* command Ӧ */ + bool immediately_func; /* ִл:true-жִ,false-DCS첽ִ */ +} hal_dcs_execute_entry_t; + +/** +* @brief 洢 DCS packet ṹ +*/ +typedef struct hal_dcs_packet_t +{ + uint32_t data_type; /* data type */ + uint32_t dcs_command; /* dcs command */ + uint32_t param_length; /* dcs param length */ + uint8_t *packet_param; /* dcs param */ + const hal_dcs_execute_entry_t *dcs_execute_entry; /* dcs packet */ +} hal_dcs_packet_t; + +/** +* @brief dcs command filter select +*/ +typedef enum +{ + HAL_RX_DCS_FILTER_0 = 0, + HAL_RX_DCS_FILTER_1 = 1, + HAL_RX_DCS_FILTER_2 = 2, + HAL_RX_DCS_FILTER_3 = 3, + HAL_RX_DCS_FILTER_4 = 4, + HAL_RX_DCS_FILTER_5 = 5, + HAL_RX_DCS_FILTER_6 = 6, + HAL_RX_DCS_FILTER_7 = 7, + HAL_RX_DCS_FILTER_MAX +} hal_rx_dcs_filter_sel_e; + +/** +* @brief pentile source color format +*/ +typedef enum +{ + PENTILE_SRC_FORMAT_RGB = 0x0, + PENTILE_SRC_FORMAT_BGR = 0x1, + PENTILE_SRC_FORMAT_RGBG_BGRG = 0x8, + PENTILE_SRC_FORMAT_GBGR_GRGB = 0x9, + PENTILE_SRC_FORMAT_BGRG_RGBG = 0xA, + PENTILE_SRC_FORMAT_GRGB_GBGR = 0xB, + PENTILE_SRC_FORMAT_RGBG_RGBG = 0xC, + PENTILE_SRC_FORMAT_GBGR_GBGR = 0xD, + PENTILE_SRC_FORMAT_BGRG_BGRG = 0xE, + PENTILE_SRC_FORMAT_GRGB_GRGB = 0xF, + PENTILE_SRC_FORMAT_MAX +} pentile_src_format_e; + +/** +* @brief pential G0 G1 swap mode +*/ +typedef enum +{ + PENTILE_G0G1 = 0, + PENTILE_G1G0 = 1 +} pentile_g_swap_e; + +/** +* @brief pential R B swap mode +*/ +typedef enum +{ + PENTILE_RGBG_BGRG = 0, + PENTILE_GGRB_RBGG = 1, + PENTILE_GGBR_BRGG = 3 +} pentile_rb_swap_e; + +/** +* @brief TE źŲģʽ +*/ +typedef enum +{ + TE_HW_MODE = 0, /* TEӲ,Ƶ֡һ */ + TE_USER_MODE = 1, /* ײ㲻TE, hal_dsi_rx_ctrl_gen_a_tear_signal ӿڲ */ + TE_SOFT_60HZ_MODE = 2, /* ײͬ60Hz TE */ + TE_SOFT_90HZ_MODE = 4, /* ײͬ90Hz TE */ + TE_SOFT_120HZ_MODE = 5, /* ײͬ120Hz TE */ + TE_HW_MAX +} te_mode_e; + +/** +* @brief pq_marginal_type select +*/ +typedef enum +{ + PQ_TYPE_0 = 0x0, + PQ_TYPE_1 = 0x1, + PQ_TYPE_2 = 0x3, + PQ_TYPE_3 = 0x2, + PQ_TYPE_4 = 0xA, + PQ_TYPE_5 = 0xE, + PQ_TYPE_6 = 0xC, + PQ_TYPE_7 = 0x1A, + PQ_TYPE_8 = 0x18, + PQ_TYPE_MAX +} hal_rx_pq_marginal_type_e; + +/** +* @brief RX CLK +*/ +typedef enum +{ + RX_CLK_100M = 0, + RX_CLK_150M = 1, + RX_CLK_200M = 2, + RX_CLK_300M = 3, + RX_CLK_MAX +} hal_rx_clk_e; + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief dsi rx ctrl handle (ͷʱhal_dsi_rx_ctrl_release_handle) +* @param none +* @retval dsi rx handle +*/ +hal_dsi_rx_ctrl_handle_t *hal_dsi_rx_ctrl_create_handle(void); + +/** +* @brief ͷdsi rx ctrl handle +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_release_handle(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief rx ctrl handle PPS +* @param rx_ctrl_handle: dsi rx handle +* @param pps: pps +* @param pps_size: pps +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_pre_init_pps(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t pps[], uint32_t pps_size); + +/** +* @brief ʼdsi rx ģ +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_init(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief dsi rx ģȥʼ +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_deinit(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief dsi rx +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_start(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief dsi rxָ״̬ (debugʹ, rx_ctrl_handleøýӿ) +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_restart(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief ֹͣdsi rx +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_stop(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief ֶRX clk,һRX CLK ɵײԶ,video modeFIFO FULLʹ +* @param rxbr_clk: rx clk, Ҫhs_lane_rate/8 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_rx_clk(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, hal_rx_clk_e rxbr_clk); + +/** +* @brief MIPI HOSTĶӦ CMD +* @param rx_ctrl_handle: dsi rx handle +* @param data_type: data type +* @param vc: virtual channel +* @param cmd_count: ack command ij +* @param ... : Ҫ͵command(cmd_count һ) +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_send_ack_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, dsi_ack_data_type_e data_type, dsi_virtual_channel_e vc, uint8_t cmd_count, ...); + +/** +* @brief ʹ鷽ʽظ̰,hal_dsi_rx_ctrl_send_ack_cmdһ +* @param rx_ctrl_handle: dsi rx handle +* @param data_size: 鳤,̶Ϊ4 +* @param data: ظcmd,ϸ涨: +* data[0]:DI(data type) +* data[1]:data 0 +* data[2]:data 1 +* data[3]:ڲpkt type,̶̰Ϊ0 +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_ack_short_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t data_size, uint8_t data[]); + +/** +* @brief ʹ鷽ʽظ,hal_dsi_rx_ctrl_send_ack_cmdһ +* @param rx_ctrl_handle: dsi rx handle +* @param data_size: 鳤,ΪWord Count + header (header̶Ϊ4) +* @param data: ظcmd,ϸ涨: +* data[0]:DI(data type) +* data[1]:wc 0 (Word Count Ͱλ) +* data[2]:wc 1 (Word Count ߰λ) +* data[3]:ڲpkt type,̶Ϊ1 +* data[N]: +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_ack_long_cmd(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t data_size, uint8_t data[]); + +/** +* @brief 첽DSCӿ,ִcus_dcs_entry_tableӦDCS immediately_funcΪfalseĺ +* @param rx_ctrl_handle: dsi rx handle +* @retval true - 1DSC , false - DSC +*/ +bool hal_dsi_rx_ctrl_dsc_async_handler(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief ʹӲfilterҪCMD,MCUԴЧCMDռ +* @param rx_ctrl_handle: dsi rx handle +* @param filter_number: filter (0-7) +* @param cmd_start: Ҫcommand codeʼλ +* @param cmd_end: Ҫcommand codeֹλ +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_hw_cmd_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, + hal_rx_dcs_filter_sel_e filter_number, + uint32_t cmd_start, uint32_t cmd_end); + +/** +* @brief ͬ,ڵͼ˺ +* @param rx_ctrl_handle: dsi rx handle +* @param line_num: ͬк,Χ1 ~ input height +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_sync_line(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t line_num); + +/** +* @brief ʹpatternmipi(ڲ) +* @param rx_ctrl_handle: dsi rx handle +* @param pg_orient: pattern (0:Vertical mode ; 1:Horizontal mode) +* @param enable: /رpattern +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_enable_test_pattern(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t pg_orient, bool enable); + +/** +* @brief TEź +* @param rx_ctrl_handle: dsi rx handle +* @param inverse_poly: tearźż +* @param te_width: tearźſ(0-1023) +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_te_waveform(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, bool inverse_poly, uint32_t te_width); + +/** +* @brief ƻscld filter,ͼ +* @param rx_ctrl_handle: dsi rx handle +* @param scld_filter_h: ˮƽfilter +* @param scld_filter_v: ֱfilter +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_scld_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t scld_filter_h[32][2], uint32_t scld_filter_v[32][2]); + +/** +* @brief ȡAP BTAظsize +* @param rx_ctrl_handle: dsi rx handle +* @retval ݴС +*/ +uint32_t hal_dsi_rx_ctrl_get_max_ret_size(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief ȡAP Compression Mode Command,ĬΪ0,ʹ +* @param rx_ctrl_handle: dsi rx handle +* @retval AP compressen_en +*/ +bool hal_dsi_rx_ctrl_get_compressen_en(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief һTEź +* @param rx_ctrl_handle: dsi rx handle +* @retval none +*/ +bool hal_dsi_rx_ctrl_gen_a_tear_signal(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief ֱлӿ +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_toggle_resolution(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief ģʽ,ͨΪdebugʹ +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_hight_performan_mode(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief TEźΪģʽ +* @param rx_ctrl_handle: dsi rx handle +* @retval none +*/ +bool hal_dsi_rx_ctrl_set_sw_tear_mode(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief TEźΪӲģʽ +* @param rx_ctrl_handle: dsi rx handle +* @retval none +*/ +bool hal_dsi_rx_ctrl_set_hw_tear_mode(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +/** +* @brief pentileʽ +* @param rx_ctrl_handle: dsi rx handle +* @param src_format: pentile format +* @param g_swap: swap G0 G1 +* @param rb_swap: swap R B +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_pentile_format(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, pentile_src_format_e src_format, pentile_g_swap_e g_swap, pentile_rb_swap_e rb_swap); + +/** +* @brief RX escape clk +* @param rx_ctrl_handle: dsi rx handle +* @param esc_clk: escape clk λHz,10000000ʱCMDΪ10Mhz +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_cus_esc_clk(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t esc_clk); + +/** +* @brief Զ㲢Ӳfilter +* @param rx_ctrl_handle: dsi rx handle +* @param enable: /ر Ӳfilter +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_auto_hw_filter(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, bool enable); + +/* +* @brief DCS cmd ͸ģʽ, Tx init ֮Ч +* @param enable/disable +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_set_dcs_direct_mode(bool enable); + +/* +* @brief ֡޸(video mode) +* @param rx_ctrl_handle: dsi rx handle +* @param frame_rateframe rate +*/ +bool hal_dsi_rx_ctrl_toggle_input_frame_rate(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, dsi_video_frame_rate_e frame_rate); + +/** +* @brief TEģʽչӿ +* @param line_num: ͬк,Χ1 ~ input height +ʼ,stepΪ100𲽼С,ֱȫ˺ +* @param te_mode: te ģʽ,ʹHW mode +* @retval none +*/ +bool hal_dsi_rx_ctrl_set_tear_mode_ex(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t line_num, te_mode_e te_mode); + +/** +* @brief ֱлչӿ +* @param rx_ctrl_handle: dsi rx handle +* @retval true/false +*/ +bool hal_dsi_rx_ctrl_toggle_resolution_ex(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle); + +#if !defined(ISP_568) && !defined(ISP_368) + /* ISP_518/ISP_308 ӿ */ + /** + * @brief ƻ Channel Gain ,ͼ + * @param rx_ctrl_handle: dsi rx handle + * @param gain_r: channel gain coefficient for R + * @param gain_g: channel gain coefficient for G + * @param gain_b: channel gain coefficient for B + * @retval true/false + */ + bool hal_dsi_rx_ctrl_set_cus_pq_gain(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, int r_gain, int g_gain, int b_gain); + + /** + * @brief ƻenhance for luma,ͼ + * @param rx_ctrl_handle: dsi rx handle + * @param enhl_str: Enhance Str + * @param enhl_edgeslope: Enhance Edge Slope + * @retval none + */ + bool hal_dsi_rx_ctrl_set_cus_pq_enh_lum(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t enhl_str, uint32_t enhl_edgeslope); + + /** + * @brief ƻfalse color remove for chroma,ͼ + * @param rx_ctrl_handle: dsi rx handle + * @param desatstr: Ͷȵ Χ:0-4095 + * @param desatslope: Ͷȵб Χ:0-4095 + * @retval none + */ + bool hal_dsi_rx_ctrl_set_cus_pq_enh_chr(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t desatstr, uint32_t desatslope); + + /** + * @brief ƻfalse color remove for chroma2,ͼ + * @param rx_ctrl_handle: dsi rx handle + * @param desatmode: Ͷȵģʽ 0-ͱͶ 1-Ͷ + * @param fc_final_alpha: Ͷȵ Χ:0 - 255 + * @param edge_med_slope: Ͷȵ Χ:0 - 4095 + * @retval none + */ + bool hal_dsi_rx_ctrl_set_cus_pq_enh_chr2(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t desatmode, uint32_t fc_final_alpha, uint32_t edge_med_slope); + +#else + /* ISP_568/ISP_368 ӿ */ + /** + * @brief üvideoಿ֣ڲֻͱmipi900x1792,ʵЧΪ828x1792,ڲüұ߸± + * @param rx_ctrl_handle: dsi rx handle + * @param crop_width: Ҫü + * @param crop_height: Ҫü + * @retval true/false + */ + bool hal_dsi_rx_ctrl_crop_video(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint32_t crop_width, uint32_t crop_height); + + /* + * @brief ʼģʽ,ȫֵ + * @param rx_ctrl_handle: dsi rx handle + * @param red_data: صR + * @param green_data: صG + * @param blue_data: صB + * @retval none + */ + void hal_dsi_rx_ctrl_draw_mode_init(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, uint8_t red_data, uint8_t green_data, uint8_t blue_data); + + /* + * @brief ɫ + * @param rx_ctrl_handle: dsi rx handle + * @param x: صx + * @param y: صy + * @param red_data: صR + * @param green_data: صG + * @param blue_data: صB + * @retval none + */ + void hal_dsi_rx_ctrl_set_pixel_data(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, int x, int y, uint8_t red_data, uint8_t green_data, uint8_t blue_data); + + /* + * @brief ɫ + * @param rx_ctrl_handle: dsi rx handle + * @param x1,y1: ʼ + * @param x2,y2: յ + * @param red_data: صR + * @param green_data: صG + * @param blue_data: صB + * @retval none + */ + void hal_dsi_rx_ctrl_set_rect_pixel_data(hal_dsi_rx_ctrl_handle_t *rx_ctrl_handle, int x1, int x2, int y1, int y2, uint8_t red_data, uint8_t green_data, uint8_t blue_data); +#endif + +#endif //__HAL_DSI_RX_CTRL_H__ diff --git a/src/sdk/include/hal_dsi_tx_ctrl.h b/src/sdk/include/hal_dsi_tx_ctrl.h new file mode 100644 index 0000000..cfcb976 --- /dev/null +++ b/src/sdk/include/hal_dsi_tx_ctrl.h @@ -0,0 +1,284 @@ +/******************************************************************************* +* +* +* File: hal_dsi_tx_ctrl.h +* Description: hal mipi dsi tx ͷļ +* Version: V0.1 +* Date: 2021-04-23 +* Author: wuc + *******************************************************************************/ +#ifndef __HAL_DSI_TX_CTRL_H__ +#define __HAL_DSI_TX_CTRL_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "hal_gpio.h" +#include "stdint.h" +#include "stdbool.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/** +* @brief ƻMIPI TXṹ +*/ +typedef struct +{ + bool used; /* handleʹñ־λ */ + uint8_t lane_num; + dsi_virtual_channel_e channel_id; + dsi_video_mode_type_e vid_mode; + dsi_tx_cmd_tx_type_e cmd_tx_type; /* ʼģʽʽ0:HS; 1:LP */ + uint8_t pclk_offset; /* lane byte clkHFPLONG HTP */ + uint32_t dpi_vsa; + uint32_t dpi_vbp; + uint32_t dpi_vfp; + uint32_t dpi_hsa; + uint32_t dpi_hbp; + uint32_t dpi_hfp; + dsi_base_trans_info_t base_info; /* mipi video תϢ */ + uint32_t tx_line_delay; /* tx ʾӳ,˾,ڷֱлʱȷлʱ */ + float tx_frame_rate; /* Ĭ60Hz,Ϊ,Ϊdebugʹ */ + bool tx_clkawayshs; /* ĬΪfalse, Ϊtrueʱvideo modeڼclkLP */ + uint8_t blank_rows; /* ĬΪ0, ʹã0ʱЧʾ²blank_rows */ + uint8_t blank_columns; /* ĬΪ0, ʹã0ʱЧʾҲblank_columns */ + bool lp_exit_lpdt; /* ÿһLP CMD˳LPDT */ + bool tx_cmd_mode_sync; /* TX command mode ͬ */ +} hal_dsi_tx_ctrl_handle_t; + +/** +* @brief crop parameters +*/ +typedef struct +{ + uint16_t crop_top; + uint16_t crop_bottom; + uint16_t crop_left; + uint16_t crop_right; +} hal_dsi_tx_crop_t; + +/** +* @brief MIPI TXʼ +* @param tx_ctrl_handle: MIPI TXʵ +* @retval ɹ:0 ʧ:-1 +*/ +bool hal_dsi_tx_ctrl_init(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TXʼ +* @param tx_ctrl_handle: MIPI TXʵ +* @retval ɹ:0 ʧ:-1 +*/ +bool hal_dsi_tx_ctrl_deinit(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TXʵ +* @param +* @retval tx_ctrl_handle: MIPI TXʵ +*/ +hal_dsi_tx_ctrl_handle_t *hal_dsi_tx_ctrl_create_handle(void); + +/** +* @brief MIPI TXͷʵ +* @param tx_ctrl_handle: MIPI TXʵ +* @retval ɹ:0 ʧ:-1 +*/ +bool hal_dsi_tx_ctrl_release_handle(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TXʼ +* @param tx_ctrl_handle: MIPI TXʵ +* @retval ɹ:0 ʧ:-1 +*/ +bool hal_dsi_tx_ctrl_start(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief MIPI TXֹͣ +* @param tx_ctrl_handle: MIPI TXʵ +* @retval ɹ:0 ʧ:-1 +*/ +bool hal_dsi_tx_ctrl_stop(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); + +/** +* @brief ʼpanel +* @param +* @retval +*/ +void hal_dsi_tx_ctrl_enter_init_panel_mode(void); + +/** +* @brief ˳ʼpanel +* @param +* @retval +*/ +void hal_dsi_tx_ctrl_exit_init_panel_mode(void); + +/** +* @brief MIPI TX +* @param data_type: ͣοödsi_data_type_e +* @param vc: ͨţοödsi_virtual_channel_e +* @param cmd: DCSָ +* @param size: ȡݳ +* @param data: ݴŵַ +* @retval +*/ +void hal_dsi_tx_ctrl_read_cmd(uint8_t data_type, uint8_t vc, uint8_t cmd, uint8_t size, uint8_t *data); + +/** +* @brief MIPI TX +* @param data_type: ͣοödsi_data_type_e +* @param vc: ͨţοödsi_virtual_channel_e +* @param cmd_count: ɱ +* @param ...: ɱ +* @retval +*/ +void hal_dsi_tx_ctrl_write_cmd(uint8_t data_type, uint8_t vc, uint8_t cmd_count, ...); + +/** +* @brief MIPI TX +* @param data_type: ͣοödsi_data_type_e +* @param vc: ͨţοödsi_virtual_channel_e +* @param size: data +* @param data: data +* @retval +*/ +void hal_dsi_tx_ctrl_write_array_cmd(uint8_t data_type, uint8_t vc, uint8_t size, const uint8_t *data); + +/** +* @brief TXʱӷƵϵͳ +* @param esc_div: TXʱӷƵϵ +* @retval +*/ +void hal_dsi_tx_ctrl_set_escape_clock_div(uint8_t esc_div); + +/** +* @brief ˸λŲ +* @param state: Resetߡ +* @retval +*/ +void hal_dsi_tx_ctrl_panel_reset_pin(gpio_level_e state); + +/** +* @brief òʾ +* @param st_line: ʼ +* @param st_col: ʼ +* @param end_line: +* @param end_col: +* @retval +*/ +void hal_dsi_tx_ctrl_set_partial_disp_area(uint32_t st_line, uint32_t st_col, uint32_t end_line, uint32_t end_col); + +/** +* @brief ʾܿ +* @param pd_en: زʾ +* @retval +*/ +void hal_dsi_tx_ctrl_set_partial_disp(function_state_e pd_en); + +/** +* @brief øдɫ +* @param R: RGBR +* @param G: RGBG +* @param B: RGBB +* @retval +*/ +void hal_dsi_tx_ctrl_set_overwrite_rgb(uint8_t R, uint8_t G, uint8_t B); + +/** +* @brief ȫд +* @param ow_en: ȫд +* @retval +*/ +void hal_dsi_tx_ctrl_set_overwrite(function_state_e ow_en); + +/** +* @brief RGBBGR +* @param endianness: ѡRGBBGRʾ +* @retval +*/ +void hal_dsi_tx_ctrl_set_endianness(dpi_endianness_type_e endianness); + +/** +* @brief CCM +* @param coef: ƻοṹccm_coef_t +* @retval +*/ +void hal_dsi_tx_ctrl_set_ccm(ccm_coef_t coef); + +/** +* @brief TX VPG +* @param vpg_en: ʹVPG +* @param style: VPGʽ +* @retval +*/ +void hal_dsi_tx_ctrl_set_vpg(function_state_e vpg_en, dsi_tx_vpg_style_e style); + +/** +* @brief video modeʹLP CMD +* @param lp_en:ʹLP CMD +* @retval +*/ +void hal_dsi_tx_ctrl_set_lp_cmd(function_state_e lp_en); + +/** +* @brief ütxͼ +* @param tx_ctrl_handle: dsi tx handle +* @param crop: ü +* @retval +*/ +void hal_dsi_tx_crop_pic(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, hal_dsi_tx_crop_t *crop); + +#if !defined(ISP_568) && !defined(ISP_368) + /* ISP_518/ISP_308 ӿ */ + /** + * @brief ˮƽת + * @param flip_en: ˮƽת + * @retval + */ + void hal_dsi_tx_ctrl_set_horizon_flip(function_state_e flip_en); + + /** + * @brief tx filter + * @param tx_ctrl_handle: dsi tx handle + * @param filter_h: ˮƽfilter + * @param filter_v: ֱfilter + * @retval true/false + */ + bool hal_dsi_tx_ctrl_set_cus_pq_filter(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint32_t filter_h[32][2], uint32_t filter_v[32][2]); + + /** + * @brief txԵ,ֻ + * @param tx_ctrl_handle: dsi tx handle + * @param threshold: Եǿǿ + * @param slope: ԵǿΧ + * @retval true/false + */ + bool hal_dsi_tx_ctrl_set_cus_pq_edge(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint8_t threshold, uint16_t slope); +#else + /* ISP_568/ISP_368 ӿ */ + /** + * @brief tx filter + * @param tx_ctrl_handle: dsi tx handle + * @param filter: tx filter + * @retval true/false + */ + bool hal_dsi_tx_ctrl_set_cus_pq_filter(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle, uint32_t filter[32]); + + /** + * @brief TX command mode ͬӿ,յTEźźãֹ˺ + * @param tx_ctrl_handle: dsi tx handle + * @retval true/false + */ + bool hal_dsi_tx_ctrl_cmd_mode_rcv_te(hal_dsi_tx_ctrl_handle_t *tx_ctrl_handle); +#endif + +#endif //__HAL_DSI_TX_CTRL_H__ diff --git a/src/sdk/include/hal_gpio.h b/src/sdk/include/hal_gpio.h new file mode 100644 index 0000000..3c8ae01 --- /dev/null +++ b/src/sdk/include/hal_gpio.h @@ -0,0 +1,537 @@ +/******************************************************************************* +* +* +* File: hal_gpio.h +* Description gpio HALͷļ +* Version V0.1 +* Date 2021-03-17 +* Author wuc + *******************************************************************************/ +#ifndef __HAL_GPIO_H__ +#define __HAL_GPIO_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ +/** +* @brief GPIO pin +*/ +typedef enum +{ + /*GPIOPIN*/ + IO_PAD_GPIO0 = 0, + IO_PAD_GPIO1, + IO_PAD_GPIO2, + IO_PAD_GPIO3, + IO_PAD_GPIO4, + IO_PAD_GPIO5, + IO_PAD_GPIO6, + IO_PAD_RESV, + IO_PAD_GPIO8, + IO_PAD_GPIO9, + IO_PAD_GPIO10, + IO_PAD_GPIO11, + IO_PAD_GPIO12, + IO_PAD_GPIO13, + IO_PAD_GPIO14, + IO_PAD_RESV1, + IO_PAD_RESV2, + IO_PAD_GPIO17, + IO_PAD_GPIO18, + IO_PAD_GPIO19, + IO_PAD_GPIO20, + IO_PAD_GPIO21, + + /*ʵPAD NAMEPIN*/ + IO_PAD_AP_SPIS_MISO = IO_PAD_GPIO0, + IO_PAD_AP_SPIS_MOSI = IO_PAD_GPIO1, + IO_PAD_AP_INT = IO_PAD_GPIO2, + IO_PAD_AP_TE = IO_PAD_GPIO3, + IO_PAD_AP_SWIRE = IO_PAD_GPIO4, + IO_PAD_TD_SPIM_MISO = IO_PAD_GPIO5, + IO_PAD_TD_SPIM_MOSI = IO_PAD_GPIO6, + IO_PAD_TD_RSTN = IO_PAD_RESV, + IO_PAD_TD_TPRSTN = IO_PAD_GPIO8, + IO_PAD_TD_INT = IO_PAD_GPIO9, + IO_PAD_TD_LEDPWM = IO_PAD_GPIO10, + IO_PAD_TD_FC_CLK = IO_PAD_GPIO11, + IO_PAD_TD_FC_CSN = IO_PAD_GPIO12, + IO_PAD_TD_FC_MISO = IO_PAD_GPIO13, + IO_PAD_TD_FC_MOSI = IO_PAD_GPIO14, + IO_PAD_UART_RX = IO_PAD_GPIO17, + IO_PAD_UART_TX = IO_PAD_GPIO18, + IO_PAD_PWMEN = IO_PAD_GPIO19, + IO_PAD_ADCIN = IO_PAD_GPIO20, + IO_PAD_AP_TPRSTN = IO_PAD_GPIO21, + + IO_PAD_AP_SPIS_CLK, + IO_PAD_AP_SPIS_CSN, + IO_PAD_TD_SPIM_CLK, + IO_PAD_TD_SPIM_CSN, + IO_PAD_SFC_CLK, + IO_PAD_SFC_CSN, + IO_PAD_SFC_IO0, + IO_PAD_SFC_IO1, + + IO_PAD_MAX, + + /*ʵBALLPIN*/ + IO_PIN_A1 = IO_PAD_TD_TPRSTN, + IO_PIN_A2 = IO_PAD_TD_FC_CSN, + IO_PIN_A3 = IO_PAD_TD_SPIM_MISO, + IO_PIN_A4 = IO_PAD_TD_SPIM_CLK, + IO_PIN_A5 = IO_PAD_PWMEN, + IO_PIN_A6 = IO_PAD_ADCIN, + IO_PIN_A7 = IO_PAD_AP_INT, + IO_PIN_A8 = IO_PAD_AP_SPIS_MOSI, + IO_PIN_B1 = IO_PAD_TD_FC_CLK, + IO_PIN_B2 = IO_PAD_TD_FC_MISO, + IO_PIN_B3 = IO_PAD_TD_SPIM_MOSI, + IO_PIN_B4 = IO_PAD_TD_SPIM_CSN, + IO_PIN_B5 = IO_PAD_AP_SWIRE, + IO_PIN_B7 = IO_PAD_AP_SPIS_MISO, + IO_PIN_B8 = IO_PAD_AP_SPIS_CSN, + IO_PIN_C1 = IO_PAD_TD_FC_MOSI, + IO_PIN_C2 = IO_PAD_TD_LEDPWM, + IO_PIN_C4 = IO_PAD_UART_TX, + IO_PIN_C5 = IO_PAD_UART_RX, + IO_PIN_C6 = IO_PAD_AP_TE, + IO_PIN_D1 = IO_PAD_TD_RSTN, + IO_PIN_D2 = IO_PAD_TD_INT, + IO_PIN_D7 = IO_PAD_AP_TPRSTN, + IO_PIN_D8 = IO_PAD_AP_SPIS_CLK, +} io_pad_e; + +/** +* @brief PAD_AP_SPIS_CLKѡmode +*/ +typedef enum +{ + IO_MODE_JTAG_TCK = 0, + IO_MODE_SPIS_SCLK = 1, + IO_MODE_I2C0_SCL = 3, +} pad_ap_spis_clk_mode_e; + +/** +* @brief PAD_AP_SPIS_CSNѡmode +*/ +typedef enum +{ + IO_MODE_JTAG_TRSTN = 0, + IO_MODE_SPIS_CSN = 1, + IO_MODE_I2C0_SDA = 3, +} pad_ap_spis_csn_mode_e; + +/** +* @brief PAD_AP_SPIS_MISOѡmode +*/ +typedef enum +{ + IO_MODE_JTAG_TDO = 0, + IO_MODE_SPIS_MISO = 1, + IO_MODE_GPIO0 = 2, + IO_MODE_UART_RX_AP = 3, + IO_MODE_SPIM_MISO_AP = 4, +} pad_ap_spis_miso_mode_e; + +/** +* @brief PAD_AP_SPIS_MOSIѡmode +*/ +typedef enum +{ + IO_MODE_JTAG_TMS = 0, + IO_MODE_SPIS_MOSI = 1, + IO_MODE_GPIO1 = 2, + IO_MODE_UART_TX_AP = 3, + IO_MODE_SPIM_MOSI_AP = 4, +} pad_ap_spis_mosi_mode_e; + +/** +* @brief PAD_AP_TPRSTNѡmode +*/ +typedef enum +{ + IO_MODE_JTAG_TDI = 0, + IO_MODE_GPIO21 = 2, +} pad_ap_tprstn_mode_e; + +/** +* @brief PAD_AP_INTѡmode +*/ +typedef enum +{ + IO_MODE_GPIO2 = 2, +} pad_ap_int_mode_e; + +/** +* @brief PAD_AP_TEѡmode +*/ +typedef enum +{ + IO_MODE_TEAR = 0, + IO_MODE_GPIO3 = 2, +} pad_ap_te_mode_e; + +/** +* @brief PAD_AP_SWIREѡmode +*/ +typedef enum +{ + IO_MODE_SWIRE = 0, + IO_MODE_PWMO = 1, + IO_MODE_GPIO4 = 2, +} pad_ap_swire_mode_e; + +/** +* @brief PAD_TD_SPIM_CLKѡmode +*/ +typedef enum +{ + IO_MODE_SPIM_SCLK = 0, + IO_MODE_I2C1_SCL = 1, +} pad_td_spim_clk_mode_e; + +/** +* @brief PAD_TD_SPIM_CSNѡmode +*/ +typedef enum +{ + IO_MODE_SPIM_CSN = 0, + IO_MODE_I2C1_SDA = 1, +} pad_td_spim_csn_mode_e; + +/** +* @brief PAD_TD_SPIM_MISOѡmode +*/ +typedef enum +{ + IO_MODE_SPIM_MISO = 0, +#if defined(ISP_568) || defined(ISP_368) + IO_MODE_PWMO1 = 1, +#endif + IO_MODE_GPIO5 = 2, +} pad_td_spim_miso_mode_e; + +/** +* @brief PAD_TD_SPIM_MOSIѡmode +*/ +typedef enum +{ + IO_MODE_SPIM_MOSI = 0, + IO_MODE_GPIO6 = 2, +} pad_td_spim_mosi_mode_e; + +/** +* @brief PAD_TD_TPRSTNѡmode +*/ +typedef enum +{ + IO_MODE_GPIO8 = 2, +} pad_td_tprstn_mode_e; + +/** +* @brief PAD_TD_INTѡmode +*/ +typedef enum +{ + IO_MODE_GPIO9_FUNC = 0, + IO_MODE_GPIO9 = 2, +} pad_td_int_mode_e; + +/** +* @brief PAD_TD_LEDPWMѡmode +*/ +typedef enum +{ + IO_MODE_PWMI = 0, +#if defined(ISP_568) || defined(ISP_368) + IO_MODE_PWMO2 = 1, +#endif + IO_MODE_GPIO10 = 2, +} pad_td_ledpwm_mode_e; + +/** +* @brief PAD_TD_FC_CLKѡmode +*/ +typedef enum +{ + IO_MODE_TSPIS_CLK = 0, + IO_MODE_GPIO11 = 2, +} pad_td_fc_clk_mode_e; + +/** +* @brief PAD_TD_FC_CSNѡmode +*/ +typedef enum +{ + IO_MODE_TSPIS_CSN = 0, + IO_MODE_GPIO12 = 2, +} pad_td_fc_csn_mode_e; + +/** +* @brief PAD_TD_FC_MISOѡmode +*/ +typedef enum +{ + IO_MODE_TSPIS_MISO = 0, + IO_MODE_GPIO13 = 2, +} pad_td_fc_miso_mode_e; + +/** +* @brief PAD_TD_FC_MOSIѡmode +*/ +typedef enum +{ + IO_MODE_TSPIS_MOSI = 0, + IO_MODE_GPIO14 = 2, +} pad_td_fc_mosi_mode_e; + +/** +* @brief PAD_UART_RXѡmode +*/ +typedef enum +{ + IO_MODE_UART_RX = 0, + IO_MODE_GPIO17 = 2, +} pad_uart_rx_mode_e; + +/** +* @brief PAD_UART_TXѡmode +*/ +typedef enum +{ + IO_MODE_UART_TX = 0, + IO_MODE_GPIO18 = 2, +} pad_uart_tx_mode_e; + +/** +* @brief PAD_PWMENѡmode +*/ +typedef enum +{ + IO_MODE_GPIO19 = 2, +} pad_pwmen_mode_e; + +/** +* @brief PAD_ADCINѡmode +*/ +typedef enum +{ + IO_MODE_GPIO20 = 2, +} pad_adcin_mode_e; + +/** +* @brief PAD_SFC_CLKѡmode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_CLK = 0, + IO_MODE_EXT_FLS_CLK = 1, +} pad_sfc_clk_mode_e; + +/** +* @brief PAD_SFC_CSNѡmode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_CSN = 0, + IO_MODE_EXT_FLS_CSN = 1, +} pad_sfc_csn_mode_e; + +/** +* @brief PAD_SFC_IO0ѡmode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_IO0 = 0, + IO_MODE_EXT_FLS_MISO = 1, +} pad_sfc_io0_mode_e; + +/** +* @brief PAD_SFC_IO1ѡmode +*/ +typedef enum +{ + IO_MODE_INTER_FLS_IO1 = 0, + IO_MODE_EXT_FLS_MOSI = 1, +} pad_sfc_io1_mode_e; + +/** +* @brief PADѹת +*/ +typedef enum +{ + IO_SLEW_RATE_SLOW = 0, + IO_SLEW_RATE_FAST = 1, +} pad_slew_rate_e; + +/******************************************************************************* +* IOE +*******************************************************************************/ +/** +* @brief GPIO io +*/ +typedef enum +{ + IO_IOE_INPUT = 0, + IO_IOE_OUTPUT +} gpio_ioe_direct_e; + +/** +* @brief GPIO level +*/ +typedef enum +{ + IO_LVL_LOW = 0, + IO_LVL_HIGH +} gpio_level_e; + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief ָPADΪGPIO modeΪinputָжϴʽ +* @param padGPIOţοögpio_pad_e +* @param trig4жϴʽοösys_cfg_trigger_e +* @retval +*/ +void hal_gpio_init_eint(io_pad_e pad, sys_cfg_trigger_e trig); + +/** +* @brief עGPIOжϻص +* @param padGPIOţοögpio_pad_e +* @param cb_funcصַ +* @param dataصַ +* @retval +*/ +void hal_gpio_reg_eint_cb(io_pad_e pad, fcb_type cb_func); + +/** +* @brief GPIOж +* @param padGPIOţοögpio_pad_e +* @param stateؿ +* @retval +*/ +void hal_gpio_ctrl_eint(io_pad_e pad, function_state_e state); + +/** +* @brief ȡGPIOж +* @param padGPIOţοögpio_pad_e +* @retval +*/ +gpio_int_e hal_gpio_get_int_type(io_pad_e pad); + +/** +* @brief ָPADΪGPIO modeΪoutputָʼƽ +* @param padGPIOţοögpio_pad_e +* @param lvlʼƽοögpio_level_e +* @retval +*/ +void hal_gpio_init_output(io_pad_e pad, gpio_level_e lvl); + +/** +* @brief װӿ +* @param padGPIOţοögpio_pad_e +* @param lvlʼƽοögpio_level_e +* @retval +*/ +void hal_gpio_set_output_data(io_pad_e pad, gpio_level_e lvl); + +/** +* @brief װӿչ֧ͬʱ֪ͨIOƽ +* @param pad1GPIOţοögpio_pad_e +* @param pad1_lvlõƽοögpio_level_e +* @param pad2GPIOţοögpio_pad_e +* @param pad2_lvlõƽοögpio_level_e +* @retval +*/ +void hal_gpio_set_output_data_ex(io_pad_e pad1, gpio_level_e pad1_lvl, io_pad_e pad2, gpio_level_e pad2_lvl); + +/** +* @brief ָPADΪGPIO modeΪinput +* @param padGPIOţοögpio_pad_e +* @retval +*/ +void hal_gpio_init_input(io_pad_e pad); + +/** +* @brief ȡƽ +* @param padGPIOţοögpio_pad_e +* @retval +*/ +gpio_level_e hal_gpio_get_input_data(io_pad_e pad); + +/** +* @brief io mode +* @param padGPIOţοögpio_pad_e +* @param modeģʽοPADӦmodeö +* @retval +*/ +void hal_gpio_set_mode(io_pad_e pad, uint8_t mode); + +/** +* @brief ȡָPADĬ״̬ +* @param padGPIOţοögpio_pad_e +* @param up_enableĬ״̬ +* @param down_enableĬ״̬ +* @retval +*/ +void hal_gpio_get_pull_state(io_pad_e pad, function_state_e *up_enable, function_state_e *down_enable); + +/** +* @brief ָPADĬ״̬ +* @param padGPIOţοögpio_pad_e +* @param up_enableĬ״̬ +* @param down_enableĬ״̬ +* @retval +*/ +void hal_gpio_set_pull_state(io_pad_e pad, function_state_e up_enable, function_state_e down_enable); + +/** +* @brief ָPADǷΪʩش +* @param padGPIOţοögpio_pad_e +* @param st_enable1Ϊʩش0Ϊ +* @retval +*/ +void hal_gpio_set_schmitt_trigger(io_pad_e pad, function_state_e st_enable); + +/** +* @brief ָPAD +* @param padGPIOţοögpio_pad_e +* @param strengthǿȣȡֵΪ0~3 +* @retval +*/ +void hal_gpio_set_driving_strength(io_pad_e pad, uint8_t strength); + +/** +* @brief ָPADĵѹת +* @param padGPIOţοögpio_pad_e +* @param rateǿȣȡֵΪ0~3 +* @retval +*/ +void hal_gpio_set_slew_rate(io_pad_e pad, pad_slew_rate_e rate); + +/** +* @brief AP_RSTNж +* @param enable: жϿ +* @param cb_funcص +* @param trigģʽ +* @retval +*/ +void hal_gpio_set_ap_reset_int(bool enable, fcb_type cb_func, sys_cfg_trigger_e trig); + +#endif /* __HAL_GPIO_H__ */ diff --git a/src/sdk/include/hal_i2c_master.h b/src/sdk/include/hal_i2c_master.h new file mode 100644 index 0000000..7d60cb3 --- /dev/null +++ b/src/sdk/include/hal_i2c_master.h @@ -0,0 +1,80 @@ +/******************************************************************************* +* +* +* File: hal_i2c_master.h +* Description i2c hal file +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ + +#ifndef __HAL_I2C_MASTER_H__ +#define __HAL_I2C_MASTER_H__ + +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +/************************************************************************** +* @name : hal_i2c_m_dma_init +* @brief : i2c master dma ʼ +* @param[in] : slave_addrĿӻַ +* @param[in] : addr_bitsĿӻַλ +* @param[in] : i2c_speed_hz: ͨ +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_m_dma_init(uint8_t slave_addr, uint8_t addr_bits, uint32_t i2c_speed_hz); + +/************************************************************************** +* @name : hal_i2c_m_dma_write +* @brief : i2c master dma +* @param[in] : txBufferbuffer +* @param[in] : data_sizeݸ +* @return : STATUS_SUCCESS DMA ͨһȫ +* @return : ͳҪµú +* @retval : +**************************************************************************/ +status_t hal_i2c_m_dma_write(const uint8_t *txBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_m_dma_read +* @brief : i2c master dma +* @param[in] : reg_addressȷͼĴַӻ +* @param[in] : reg_sizeַֽ +* @param[in] : rxBufferbuffer +* @param[in] : data_sizeݳ +* @return : STATUS_SUCCESSĴַͳɹDMAͨһɽ +* @return : ճҪµú +* @retval : +**************************************************************************/ +status_t hal_i2c_m_dma_read(uint32_t reg_address, size_t reg_size, uint8_t *rxBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_m_transfer_complate +* @brief : ȡ i2c master ״̬ +* @param[in] : +* @return : trueݷ +* @return : falseݻڷ +* @retval : +**************************************************************************/ +bool hal_i2c_m_transfer_complate(void); + +/************************************************************************** +* @name : hal_i2c_m_set_high_impedance +* @brief : I2C IOΪ̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_m_set_high_impedance(void); +/************************************************************************** +* @name : hal_i2c_m_deinit +* @brief : i2c IPȥʼصʹܡʱӣ +* @param[in] : +* @return : +* @retval : +***************************************************************************/ +void hal_i2c_m_deinit(void); +#endif /* __HAL_I2C_MASTER_H__*/ + diff --git a/src/sdk/include/hal_i2c_slave.h b/src/sdk/include/hal_i2c_slave.h new file mode 100644 index 0000000..96ecb00 --- /dev/null +++ b/src/sdk/include/hal_i2c_slave.h @@ -0,0 +1,179 @@ +/******************************************************************************* +* +* +* File: hal_i2c_slave.h +* Description i2c hal file +* Version V0.1 +* Date 2021-10-14 +* Author zhanghz +*******************************************************************************/ + +#ifndef __HAL_I2C_SLAVE_H__ +#define __HAL_I2C_SLAVE_H__ + +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +typedef enum +{ + I2C_S_INT_READ = 0, // ж + I2C_S_INT_RX, // ж + I2C_S_INT_STOP // stop ж +} e_i2c_s_int_status; + +#if defined(ISP_568) || defined(ISP_368) +typedef enum +{ + I2C_S_0 = 0, + I2C_S_1, + I2C_S_MAX +} i2c_s_index_e; +#endif + +typedef void (*hal_i2c_s_callback_t)(e_i2c_s_int_status int_status, size_t receive_num); + +/************************************************************************** +* @name : hal_i2c_s_init +* @brief : i2c slave ʼ +* @param[in] : slave_addrӻַ +* @param[in] : addr_bitsӻַλ +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_init(uint8_t slave_addr, uint8_t addr_bits); + +/************************************************************************** +* @name : hal_i2c_s_dma_write +* @brief : i2c slave dma +* @param[in] : txBufferbuffer +* @param[in] : data_sizeݸ +* @return : STATUS_SUCCESS DMA ͨһȫ +* @return : ͳҪµú +* @retval : +**************************************************************************/ +status_t hal_i2c_s_dma_write(const uint8_t *txBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_s_nonblocking_read +* @brief : i2c slave ׼ +* @param[in] : rxBufferbuffer +* @param[in] : data_size +* @return : STATUS_SUCCESS׼գʱͨŲһʼ +* @return : óҪµú +* @retval : +**************************************************************************/ +status_t hal_i2c_s_nonblocking_read(uint8_t *rxBuffer, size_t data_size); + +/************************************************************************** +* @name : hal_i2c_s_transfer_complate +* @brief : ȡ i2c slave ״̬ +* @param[in] : +* @return : trueݷ +* @return : falseݻڷ +* @retval : +**************************************************************************/ +bool hal_i2c_s_write_complate(void); + +/************************************************************************** +* @name : hal_i2c_s_read_complate +* @brief : ȡ i2c slave ״̬ +* @param[in] : +* @return : ݽո +* @retval : +**************************************************************************/ +uint8_t hal_i2c_s_read_complate(void); + +/************************************************************************** +* @name : hal_i2c_s_read_complate_clear +* @brief : i2c slave ״̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_read_complate_clear(void); + +/************************************************************************** +* @name : hal_i2c_s_set_dma_tx_cycle +* @brief : I2C cycle ģʽ +* @param[in] : +* @return : ENABLEcycleģʽDISABLEcycleģʽ +* @retval : +**************************************************************************/ +void hal_i2c_s_set_dma_tx_cycle(bool enable); + +/************************************************************************** +* @name : hal_i2c_s_set_transfer +* @brief : i2c ӻݽ +* @param[in] :hal_tp_transfer_phone_tmpָ +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_set_transfer(hal_i2c_s_callback_t hal_i2c_s_callback_tmp); + +/************************************************************************** +* @name : hal_i2c_s_read_data +* @brief :read data +* @param[in] : rx_data: +* @return : 1: ɹȡ +* @return : 0: fifo Ϊ +* @retval : +**************************************************************************/ +status_t hal_i2c_s_read_data(uint8_t *rx_data); + +/************************************************************************** +* @name : hal_i2c_s_write_data +* @brief :write data +* @param[in] : tx_data: ׼͵ +* @return : 1: ÷ͳɹ +* @return : 0: fifo +* @retval : +**************************************************************************/ +status_t hal_i2c_s_write_data(const uint8_t tx_data); + +/************************************************************************** + * @name : hal_i2c_s_rxfifo_notempty + * @brief : жϵǰ rxfifo Ƿ + * @param[in] : + * @return : true: rxfifo + * @return : false: rxfifo û + * @retval : + **************************************************************************/ +bool hal_i2c_s_rxfifo_notempty(void); + +/************************************************************************** +* @name : hal_i2c_s_set_high_impedance +* @brief : I2C ӻIOΪ̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_i2c_s_set_high_impedance(void); +/************************************************************************** +* @name : hal_i2c_s_get_tx_byte_num +* @brief : ȡI2Cӻͳɹֽ +* @param[in] : +* @return :ֽ +* @retval : +**************************************************************************/ +int hal_i2c_s_get_tx_byte_num(void); +/************************************************************************** +* @name : hal_i2c_s_deinit +* @brief : i2c IPȥʼصʹܡʱӣ +* @param[in] :slave_num ӻ +* @return : +* @retval : +***************************************************************************/ +void hal_i2c_s_deinit(void); +#if defined(ISP_568) || defined(ISP_368) + /************************************************************************** + * @name : hal_i2c_s_sel + * @brief : i2c slave ѡ + * @param[in] : slaverӻ + * @return : + * @retval : + **************************************************************************/ + void hal_i2c_s_sel(i2c_s_index_e slaver); +#endif +#endif /* __HAL_I2C_SLAVE_H__*/ + diff --git a/src/sdk/include/hal_pwm.h b/src/sdk/include/hal_pwm.h new file mode 100644 index 0000000..9741707 --- /dev/null +++ b/src/sdk/include/hal_pwm.h @@ -0,0 +1,219 @@ +/******************************************************************************* +* +* +* File: hal_pwm.h +* Description pwm HALͷļ +* Version V0.1 +* Date 2021-03-17 +* Author wuc + *******************************************************************************/ +#ifndef __HAL_PWM_H__ +#define __HAL_PWM_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "hal_gpio.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! @brief PWMܵĶ */ +typedef enum _pwm_out_ctrl_e +{ + PWMO_CTRL_KEEP = 0, + PWMO_CTRL_LOW = 1, + PWMO_CTRL_HIGH = 2, + PWMO_CTRL_TOGGLE = 3, + PWMO_CTRL_MAX +} pwm_out_ctrl_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief PWMOʼ +* @param +* @retval +*/ +void hal_pwm_out_init(void); + +/** +* @brief PWMOʼ +* @param +* @retval +*/ +void hal_pwm_out_deinit(void); + +/** +* @brief PWMOָͣ +* @param stateؿ +* @retval +*/ +void hal_pwm_out_pause(function_state_e state); + +/** +* @brief PWMO岢ʼ +* @param ctl0ֵthr0ʱIJοöpwm_out_ctrl_e +* @param ctl1ֵthr1ʱIJοöpwm_out_ctrl_e +* @param thr0ֵ0λus +* @param thr1ֵ1λus +* @param periodһڵʱ䣬λus +* @retval +*/ +void hal_pwm_out_config_all(pwm_out_ctrl_e ctl0, pwm_out_ctrl_e ctl1, uint32_t thr0, uint32_t thr1, uint32_t period); + +/** +* @brief ͬģʽPWMOв +* @param ctl0ֵthr0ʱIJοöpwm_out_ctrl_e +* @param ctl1ֵthr1ʱIJοöpwm_out_ctrl_e +* @param thr0ֵ0λus +* @param thr1ֵ1λus +* @param periodһڵʱ䣬λus +* @retval +*/ +void hal_pwm_out_sync_all(pwm_out_ctrl_e ctl0, pwm_out_ctrl_e ctl1, uint32_t thr0, uint32_t thr1, uint32_t period); + +/** +* @brief pwmԿƱ +* @param polarity: ԣfalse:ȸߺͣtrue:ȵͺ +* @param duty_ratio: ռձ(0-total_ratio) +* @param total_ratio: ϸ +* @param frequency: ƵʣλHZ +* @retval +*/ +void hal_pwm_out_config_duty_ratio(bool polarity, uint16_t duty_ratio, uint16_t total_ratio, uint32_t frequency); + +/** +* @brief ͬģʽPWMO +* @param periodһڵʱ䣬λus +* @retval +*/ +void hal_pwm_out_sync_period(uint32_t period); + +/** +* @brief ͬģʽPWMOĿ +* @param ctl0ֵthr0ʱIJοöpwm_out_ctrl_e +* @param ctl1ֵthr1ʱIJοöpwm_out_ctrl_e +* @retval +*/ +void hal_pwm_out_sync_ctl(pwm_out_ctrl_e ctl0, pwm_out_ctrl_e ctl1); + +/** +* @brief ֵͬģʽPWMOֵ +* @param thr0ֵ0λus +* @param thr1ֵ1λus +* @retval +*/ +void hal_pwm_out_sync_thr(uint32_t thr0, uint32_t thr1); + +/** +* @brief ͬͣģʽָͣPWMO +* @param pause_stateָͣ +* @retval +*/ +void hal_pwm_out_sync_pause(function_state_e pause_state); + +/** +* @brief PWMIʼ +* @param +* @retval +*/ +void hal_pwm_in_init(void); + +/** +* @brief PWMIʼ +* @param +* @retval +*/ +void hal_pwm_in_deinit(void); + +/** +* @brief עPWMIжϻصشPWMIжָ룬οpwm_int_type_e +* @param cb_funcصַ +* @retval +*/ +void hal_pwm_in_register_callback(fcb_type cb_func); + +/** +* @brief PWMIжϵĿ +* @param high_overflow_enhigh overflowжʹܿ +* @param low_overflow_enlow overflowжʹܿ +* @param total_overflow_entotal overflowжʹܿ +* @param high_done_enhigh doneжʹܿ +* @param low_done_enlow doneжʹܿ +* @param total_done_entotal doneжʹܿ +* @retval +*/ +void hal_pwm_in_config_int(function_state_e high_overflow_en, function_state_e low_overflow_en, function_state_e total_overflow_en, + function_state_e high_done_en, function_state_e low_done_en, function_state_e total_done_en); + +/** +* @brief PWMIжϵĿ +* @param pwm_intжͣοöpwm_int_type_e +* @param enableƿ +* @retval +*/ +void hal_pwm_in_set_int(pwm_int_type_e pwm_int, function_state_e enable); + +/** +* @brief رPWMIж +* @param +* @retval +*/ +void hal_pwm_in_clear_int(void); + +/** +* @brief PWMIж +* @param stateؿ +* @retval +*/ +void hal_pwm_in_ctrl_int(function_state_e state); + +/** +* @brief ȡPWMIʱ +* @param +* @retval ʱλus +*/ +uint32_t hal_pwm_in_get_total_period(void); + +/** +* @brief ȡPWMIߵƽʱ +* @param +* @retval ߵƽʱλus +*/ +uint32_t hal_pwm_in_get_high_period(void); + +/** +* @brief ȡPWMI͵ƽʱ +* @param +* @retval ͵ƽʱλus +*/ +uint32_t hal_pwm_in_get_low_period(void); + +/** +* @brief ȡPWMIۻ +* @param +* @retval ģʹܵǰʱظ32λ¼ +*/ +uint32_t hal_pwm_in_get_current_count(void); + +#if defined(ISP_568) || defined(ISP_368) + /** + * @brief ѡPWMOIO + * @param pad: PWMOIO,ĬΪIO_PAD_AP_SWIRE,ѡͨIO_PAD_TD_SPIM_MISOIO_PAD_TD_LEDPWM + * @retval + */ + void hal_pwm_out_sel_io(io_pad_e pad); +#endif +#endif /* __HAL_PWM_H__ */ diff --git a/src/sdk/include/hal_spi_master.h b/src/sdk/include/hal_spi_master.h new file mode 100644 index 0000000..00c9b50 --- /dev/null +++ b/src/sdk/include/hal_spi_master.h @@ -0,0 +1,89 @@ +/******************************************************************************* +* +* +* File: hal_spi_touch.h +* Description spi hal file +* Version V0.1 +* Date 2021-10-25 +* Author zhanghz +*******************************************************************************/ + +#ifndef __HAL_SPI_MASTER_H__ +#define __HAL_SPI_MASTER_H__ + +#include "tau_device_datatype.h" +#include "tau_common.h" +#include "string.h" + +/************************************************************************** +* @name : hal_spi_m_dma_init +* @brief : SPIM DMA ʼ +* @param[in] :speedͨ +* @param[in] :cpha: õһʱػߵڶʱЧ +* @param[in] :cpol: ߿ʱʱӵƽ +* @return : +* @retval : +**************************************************************************/ +void hal_spi_m_dma_init(uint32_t speed, uint8_t cpha, uint8_t cpol); + +/************************************************************************** +* @name : hal_spi_m_dma_write +* @brief : SPIM +* @param[in] :data_buffer: buffer ͷַ +* @param[in] :data_size: buffer +* @return :STATUS_SUCCESS: óɹݲһ +* @return :òɹҪ÷ +* @retval : +**************************************************************************/ +status_t hal_spi_m_dma_write(const uint8_t *data_buffer, size_t data_size); + +/************************************************************************** +* @name : hal_spi_m_dma_read +* @brief : SPIM ȡ +* @param[in] :cmd: buffer ͷַ +* @param[in] :cmd_size: buffer +* @param[in] :data_buffer: ȡ buffer ͷַ +* @param[in] :data_size: ȡ buffer +* @return :STATUS_SUCCESS: óɹݲһȡ +* @return :òɹҪ÷ +* @retval : +**************************************************************************/ +status_t hal_spi_m_dma_read(const uint8_t *cmd, size_t cmd_size, uint8_t *data_buffer, size_t data_size); + +/************************************************************************** +* @name : hal_spi_m_get_transfer_complate +* @brief : ȡ SPIM ͨ״̬ +* @param[in] : +* @return :trueͨ +* @retval : +**************************************************************************/ +bool hal_spi_m_get_transfer_complate(void); + +/************************************************************************** +* @name : hal_spi_m_clear_rxfifo +* @brief : rxfifo е +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_spi_m_clear_rxfifo(void); + +/************************************************************************** +* @name : hal_spi_m_set_high_impedance +* @brief : SPI IOΪ̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_spi_m_set_high_impedance(void); +/************************************************************************** +* @name : hal_spi_m_deinit +* @brief : SPI ȥʼ(صSPIM) +* @param[in] : +* @return :true +* @retval : +**************************************************************************/ +bool hal_spi_m_deinit(void); + +#endif + diff --git a/src/sdk/include/hal_spi_slave.h b/src/sdk/include/hal_spi_slave.h new file mode 100644 index 0000000..fc0c57f --- /dev/null +++ b/src/sdk/include/hal_spi_slave.h @@ -0,0 +1,181 @@ +/******************************************************************************* +* Copyright (C) 2021-2022, All Rights Reserved. +* +* File: hal_spi_slave.h +* Description spi slave hal file +* Version V0.1 +* Date 2021-10-23 +* Author lzy +*******************************************************************************/ +#ifndef __HAL_SPI_SLAVE_H__ +#define __HAL_SPI_SLAVE_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_dsi_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/* +Զģʽevent eg:rx_buffer_size=8, host16byte, +յǰ8byteʱSPI_EVENT_RCV_FULL¼,¼, +ɺhostCS,SPI_EVENT_RCV_CS_HIGH¼ +*/ +typedef enum +{ + SPI_EVENT_RCV_DATA = 0, /* ֶģʽ£SPIS ÿһݼ¼ */ + SPI_EVENT_RCV_FULL, /* Զģʽ SPIS ݵbuffer size¼ */ + SPI_EVENT_RCV_CS_HIGH, /* Զģʽ SPIS յCS ߵź */ +} hal_spis_event_e; + +typedef struct hal_spi_packet_info_t +{ + uint8_t *rx_buffer; /* buffer */ + uint32_t rx_buffer_size; /* buffer size */ + bool rx_circle; /* circle mode */ + const uint8_t *tx_buffer; /* buffer */ + uint32_t tx_buffer_size; /* buffer size */ + bool tx_circle; /* circle mode */ + uint32_t packet_size; /* packet size */ +} hal_spi_packet_info_t; + +typedef void (*hal_spi_slave_cb)(hal_spis_event_e event, hal_spi_packet_info_t *packet_info); + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief ʼspi slave ģ +* @param cpha: λ +* @param cpol: +* @param dma: ԶģʽDMA enable +* @retval true/false +*/ +bool hal_spi_slave_init(uint8_t cpha, uint8_t cpol, bool dma); + +/** +* @brief spi slave ģȥʼ +* @param none +* @retval true/false +*/ +bool hal_spi_slave_deinit(void); + +/** +* @brief spi slave עص +* @param cbcall back +* @retval true/false +*/ +bool hal_spi_slave_register_callback(hal_spi_slave_cb cb); + +/** +* @brief spi slave enable +* @param none +* @retval true/false +*/ +bool hal_spi_slave_enable(void); + +/** +* @brief spi slave disable +* @param none +* @retval true/false +*/ +bool hal_spi_slave_disable(void); + +/** +* @brief spi slave Զbuffer, ײԶݺcallback, bufferΪNULLʱΪԶģʽ +* @param bufferԶģʽݽbuffer +* @param size Զģʽݽbuffer size +* @param circlecircle modepacket size buffer size ʱoffset 0д(ݲ֧) +* @retval true/false +*/ +bool hal_spi_slave_set_auto_rx_buffer(uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief spi slave Զbuffer +* @param bufferԶģʽݷbuffer, bufferΪNULLΪлΪԶģʽ +* @param size Զģʽݷbuffer size +* @param circlecircle modeظbuffer +* @retval true/false +*/ +bool hal_spi_slave_set_auto_tx_buffer(const uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief spi slave Զ +* @param none +* @retval true/false +*/ +bool hal_spi_slave_auto_transfer_start(void); + +/** +* @brief spi slave ֹͣԶ(circle mode packetʹ) +* @param none +* @retval true/false +*/ +bool hal_spi_slave_auto_transfer_abort(void); + +/** +* @brief spi slave flush fifo(circle mode packetʹ) +* @param none +* @retval true/false +*/ +bool hal_spi_slave_flush_fifo(void); + +/** +* @brief reset spis tx,spis +* @param bufferԶģʽݷbuffer +* @param size Զģʽݷbuffer size +* @param circlecircle modeظbuffer +* @retval true/false +*/ +bool hal_spi_slave_reset_tx(const uint8_t *buffer, uint32_t size, bool circle); + +/** +* @brief check spi slave busy(CS status) +* @param none +* @retval true/false +*/ +bool hal_spi_slave_busy(void); + +/** +* @brief ȡrx fifo ǿ +* @param none +* @retval true/false +*/ +bool hal_spi_slave_get_rxfifo_notempty(void); + +/** +* @brief ֶģʽ´rx fifo ȡ +* @param none +* @retval true/false +*/ +bool hal_spi_slave_read_data(uint32_t *data); + +/** +* @brief ֶģʽtx fifo д +* @param none +* @retval true/false +*/ +bool hal_spi_slave_write_data(const uint8_t data); + +/************************************************************************** +* @name : hal_spi_s_set_high_impedance +* @brief : SPI ӻIOΪ̬ +* @param[in] : +* @return : +* @retval : +**************************************************************************/ +void hal_spi_s_set_high_impedance(void); + +#endif /* __HAL_SPI_SLAVE_H__*/ + diff --git a/src/sdk/include/hal_swire.h b/src/sdk/include/hal_swire.h new file mode 100644 index 0000000..9660e83 --- /dev/null +++ b/src/sdk/include/hal_swire.h @@ -0,0 +1,75 @@ +/******************************************************************************* +* +* +* File: hal_swire.h +* Description swire HALͷļ +* Version V0.1 +* Date 2021-03-17 +* Author wuc + *******************************************************************************/ +#ifndef __HAL_SWIRE_H__ +#define __HAL_SWIRE_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief SWIREʼ +* @param +* @retval +*/ +void hal_swire_init(void); + +/** +* @brief SWIREʼ +* @param +* @retval +*/ +void hal_swire_deinit(void); + +/** +* @brief SWIRE岢ʼ +* @param start_timeʼʱλus +* @param stop_timeʱλus300us +* @param high_timeߵƽʱλus +* @param low_time͵ƽʱλus +* @param pulseظ +* @retval +*/ +void hal_swire_start(uint32_t start_time, uint32_t stop_time, + uint32_t high_time, uint32_t low_time, + uint32_t pulse); + +/** +* @brief 򿪻رձ +* @param stateؿ +* @retval +*/ +void hal_swire_open(function_state_e state); + +/** +* @brief עص +* @param cb_funcصַ +* @retval +*/ +void hal_swire_register_callback(fcb_type cb_func); + +#endif /* __HAL_SWIRE_H__ */ diff --git a/src/sdk/include/hal_system.h b/src/sdk/include/hal_system.h new file mode 100644 index 0000000..84f7320 --- /dev/null +++ b/src/sdk/include/hal_system.h @@ -0,0 +1,181 @@ +/******************************************************************************* +* +* +* File: hal_system.h +* Description hal ͨϵͳӿͷļ +* Version V0.1 +* Date 2021-05-21 +* Author lzy + *******************************************************************************/ +#ifndef __HAL_SYSTEM_H__ +#define __HAL_SYSTEM_H__ +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ + +/** +* @brief system ʼ +* @param none +* @retval none +*/ +void hal_system_init(uint32_t sysclk); + +/** +* @brief system ʼ console +* @param baud_rate +* @retval none +*/ +void hal_system_init_console(uint32_t baud_rate); + +/** +* @brief mcuidleģʽ,ȴжϻ +* @param disable_systick: idleʱǷرsystick(˳idle ָsystick) +* @retval none +*/ +void hal_system_idle_mode(bool disable_systick); + +/** +* @brief עsystickص +* @param cb_funcصַ +* @retval +*/ +void hal_system_register_systick_cb(fcb_type cb_func); + +/** +* @brief sys tickt +* @param ms: sys tickt , Χ1-10ms +* @retval true/false +*/ +bool hal_system_enable_systick(uint8_t ms); + +/** +* @brief ȡsystickt +* @param none +* @retval ǰsysticktֵ +*/ +bool hal_system_disable_systick(void); + +/** +* @brief ȡsystickt +* @param none +* @retval ǰsysticktֵ +*/ +uint32_t hal_system_get_tick(void); + +/** +* @brief deep sleep mode ģʽ, ȴAP_RSTN +* @param polarity true:ػ, false:½ػ +* @retval none +*/ +void hal_system_deep_sleep_mode(bool polarity); + +/** +* @brief ùflash(ʹùעر,Ļ) +* @param enable:true:ͨF_SPIڲflash , false:ͨF_SPIڲflash +* @retval true/false +*/ +bool hal_system_share_flash_mode(bool enable); + +/** +* @brief sleep mode +* @param enable +* @retval none +*/ +void hal_system_sleep_mode(bool enable); + +/** +* @brief reset chip +* @param none +* @retval none +*/ +void hal_system_reset_chip(void); + +/** +* @brief PVD +* @param none +* @retval none +*/ +void hal_system_set_pvd(bool enable); + +/** +* @brief VCCԴأ +* ʹó: VCC磬13D13MʹԴʱرڲVCC,ֹԴ +* @param enable: true:CP, false:رCP +* @retval none +*/ +void hal_system_set_vcc(bool enable); + +/** +* @brief ûֽʽflashȡ,ҳȡÿҳ1024ֽ +* @param *usr_cfg_t_addr(׵ַ), + usr_cfg_t_size(СԳ1024԰ҳҲҳ) + flash_page ҳ0~63 +* @retval bool +*/ +bool hal_system_flash_read(uint8_t *usr_cfg_t_addr, uint16_t usr_cfg_t_size, uint8_t flash_page); + +/** +* @brief ûֽʽflash(ޣƵд),ҳд룬ÿҳ1024ֽ +* @param *usr_cfg_t_addr(׵ַ), + usr_cfg_t_size(СԳ1024԰ҳдҲҳд) + Ƽҳ˳д뷽ʽһα0ҳʼд룬ſ1~63ҳд + flash_page дҳ0~63 +* @retval bool УsizeǷ񳬳 +*/ +bool hal_system_flash_write(uint8_t *usr_cfg_t_addr, uint16_t usr_cfg_t_size, uint8_t flash_page); + +/** +* @brief flash˳deep sleep power mode +* @param 0xABָ +* @retval null +*/ +void hal_system_flash_release_power_down(void); + +/** +* @brief flashdeep sleep power mode +* @param 0xB9ָ +* @retval null +*/ +void hal_system_flash_power_down(void); + +#if defined(ISP_568) || defined(ISP_368) + /** + * @brief DPHYڲУ׼ + * @param en: ʹܿ + * @retval none + */ + void hal_system_set_phy_calibration(bool en); +#endif + +/** +* @brief ȡλõdebug state +* @param none +* @retval debug state +*/ +uint32_t hal_system_get_debug_state(void); + +/** +* @brief clear debug state(debug only) +* @param none +* @retval none +*/ +void hal_system_clear_debug_state(void); + +#endif //__HAL_SYSTEM_H__ diff --git a/src/sdk/include/hal_timer.h b/src/sdk/include/hal_timer.h new file mode 100644 index 0000000..4930676 --- /dev/null +++ b/src/sdk/include/hal_timer.h @@ -0,0 +1,92 @@ +/******************************************************************************* +* +* +* File: hal_timer.h +* Description timer HALͷļ +* Version V0.1 +* Date 2021-03-16 +* Author wuc + *******************************************************************************/ +#ifndef __HAL_TIMER_H__ +#define __HAL_TIMER_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief ָʱʼ +* @param indexʵ(0~3)οötimer_num_e +* @retval +*/ +void hal_timer_init(timer_num_e index); + +/** +* @brief ָʱʼ +* @param indexʵ(0~3)οötimer_num_e +* @retval +*/ +void hal_timer_deinit(timer_num_e index); + +/** +* @brief ָʱ +* @param indexʵ(0~3)οötimer_num_e +* @param msʱʱ䣬λmsӦóһmsģӦÿҪʱ + ֱʱ䣬ڽӿڲʱмĴá +* @param cb_funcصַҪNULL +* @param dataصIJַҪNULL +* @retval +*/ +void hal_timer_start(timer_num_e index, uint32_t ms, fcb_type cb_func, void *data); + +/** +* @brief ָʱ +* @param indexʵ(0~3)οötimer_num_e +* @param usʱʱ䣬λusӦóһusģӦÿҪʱ + ֱʱ䣬ڽӿڲʱмĴá +* @param cb_funcصַҪNULL +* @param dataصIJַҪNULL +* @retval +*/ +void hal_timer_start_ex(timer_num_e index, uint32_t us, fcb_type cb_func, void *data); + +/** +* @brief ָֹͣʱ +* @param indexʵ(0~3)οötimer_num_e +* @retval +*/ +void hal_timer_stop(timer_num_e index); + +/** +* @brief öʱǷѭʱ +* @param indexʵ(0~3)οötimer_num_e +* @param bool enableѭʱʹ +* @retval +*/ +void hal_timer_set_repeat(timer_num_e index, bool repeat); + +/** +* @brief ȡָָʾ״̬ +* @param indexʵ(0~3)οötimer_num_e +* @retval οtimer_status_e +*/ +timer_status_e hal_timer_get_status(timer_num_e index); + +#endif /* __HAL_TIMER_H__ */ diff --git a/src/sdk/include/hal_uart.h b/src/sdk/include/hal_uart.h new file mode 100644 index 0000000..82efe74 --- /dev/null +++ b/src/sdk/include/hal_uart.h @@ -0,0 +1,131 @@ +/******************************************************************************* +* +* +* File: hal_uart.h +* Description +* Version V0.1 +* Date 2021-11-24 +* Author kc +*******************************************************************************/ + +#ifndef __HAL_UART_H__ +#define __HAL_UART_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "stdint.h" +#include "tau_common.h" + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +typedef enum +{ + HAL_UART_STOPBIT_1 = 0, + HAL_UART_STOPBIT_2 = 1 +} hal_uart_stopbit_e; + +typedef enum +{ + HAL_UART_PARITY_NO = 0, + HAL_UART_PARITY_ODD = 0x01, + HAL_UART_PARITY_EVEN = 0x03, +} hal_uart_parity_e; + +typedef enum +{ + HAL_UART_DATAWIDTH_6 = 1, + HAL_UART_DATAWIDTH_7 = 2, + HAL_UART_DATAWIDTH_8 = 3 +} hal_uart_datawidth_e; + + +typedef struct +{ + uint32_t baudrate; + hal_uart_stopbit_e stopbits; + hal_uart_datawidth_e data_width; + hal_uart_parity_e parity; +} hal_uart_config_t; + + +typedef struct _hal_uart_handle_t +{ + hal_uart_config_t uart_config; + void (* txdmacallback)(void); + void (* rxdmacallback)(void); +} hal_uart_handle_t; + + +typedef enum +{ + HAL_UART_OK = 0x00U, + HAL_UART_ERROR = 0x01U, + HAL_UART_BUSY = 0x02U, + HAL_UART_TIMEOUT = 0x03U +} hal_uart_status; + + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief ʼuart IJʡλȲ +* @param hal_uart_handle_t +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_init(hal_uart_handle_t *huart); + +/** +* @brief رuart +* @param hal_uart_handle_t +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_deinit(hal_uart_handle_t *huart); + +/** +* @brief ʽ +* @param hal_uart_handle_t +* @param pdata:ָ +* @param size:ݴС +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_transmit_blocking(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +/** +* @brief ʽ +* @param hal_uart_handle_t +* @param pdata:ָ +* @param size:ݴС +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_receive_blocking(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +/** +* @brief ʹDMAݣTXRXһDMA ͨҪTX/RXܽRX/TXĴ +* @param hal_uart_handle_t +* @param pdata:ָ +* @param size:ݴС +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_transmit_dma(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +/** +* @brief ʹDMAݣTXRXһDMA ͨҪTX/RXܽRX/TXĴ +* @param hal_uart_handle_t +* @param pdata:ָ +* @param size:ݴС +* @retval hal_uart_status +*/ +hal_uart_status hal_uart_receive_dma(hal_uart_handle_t *huart, uint8_t *pdata, uint16_t size); + +#endif /* __HAL_UART_H__ */ diff --git a/src/sdk/include/hal_wdg.h b/src/sdk/include/hal_wdg.h new file mode 100644 index 0000000..2cc0247 --- /dev/null +++ b/src/sdk/include/hal_wdg.h @@ -0,0 +1,94 @@ +/******************************************************************************* +* +* +* File: hal_wdg.h +* Description wdg HALͷļ +* Version V0.1 +* Date 2021-03-16 +* Author wuc + *******************************************************************************/ +#ifndef __HAL_WDG_H__ +#define __HAL_WDG_H__ + +/******************************************************************************* +* 1.Included files +*******************************************************************************/ +#include "tau_device_datatype.h" +#include "tau_common.h" + + +/******************************************************************************* +* 2.Global constant and macro definitions using #define +*******************************************************************************/ + +/******************************************************************************* +* 3.Global structures, unions and enumerations using typedef +*******************************************************************************/ +/*! + * @brief watch dogģʽ + */ +typedef enum +{ + WDG_MODE_RESET = 0, //λģʽܷɸλ + WDG_MODE_INTERRUPT = 1 //жģʽܷɽж +} wdg_mode_e; + +/******************************************************************************* +* 4.Global variable extern declarations +*******************************************************************************/ + +/******************************************************************************* +* 5.Global function prototypes +*******************************************************************************/ +/** +* @brief Źʼ +* @param +* @retval +*/ +void hal_wdg_init(void); + +/** +* @brief Źʼ +* @param +* @retval +*/ +void hal_wdg_deinit(void); + +/** +* @brief Ź +* @param wdg_mode_e modeSel: λжģʽ +* @param uint32_t load: ʱʱ䣬λms +* @retval +*/ +void hal_wdg_start(wdg_mode_e modeSel, uint32_t load); + +/** +* @brief ֹͣŹ +* @param +* @retval +*/ +void hal_wdg_stop(void); + +/** +* @brief WDGǷѭʱ +* @param enableѭʱʹ +* @retval +*/ +void hal_wdg_set_repeat(bool repeat); + +/** +* @brief עжϻص +* @param cb_funcصַ +* @param dataصַ +* @retval +*/ +void hal_wdg_register_callback(fcb_type cb_func, void *data); + +/** +* @brief ι +* @param +* @retval +*/ +void hal_wdg_kick_dog(void); + +#endif /* __HAL_WDG_H__ */ diff --git a/src/sdk/sdk_version.h b/src/sdk/sdk_version.h new file mode 100644 index 0000000..def350e --- /dev/null +++ b/src/sdk/sdk_version.h @@ -0,0 +1 @@ +#define SDK_REVISION 4243 \ No newline at end of file